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x86-crash-course.tex
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\documentclass[]{beamer}
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\title{x86 Crash Course}
\subtitle{With a focus on Linux and a glance to x86\_64}
\author[NECSTLab]{Mario Polino, Armando Bellante, Lorenzo Binosi}
\institute{DEIB, Politecnico di Milano}
\date{\today}
\begin{document}
\begin{frame}
\titlepage
\end{frame}
% \begin{frame}{Credits --- contributors as of \today}
% \begin{itemize}
% \item Main contributor: Andrea Mambretti (wrote the first version)
% \item Mario Polino
% \item Marcello Pogliani
% \item Stefano Zanero
% \item Federico Maggi
% \end{itemize}
% \end{frame}
%\section{Crash course on x86 Assembly}
% \begin{frame}
% \frametitle{How to Read the Matrix!}
% \hspace*{-11mm}
% \includegraphics[width=\paperwidth]{./images/pwndbg.png}
% \end{frame}
% \begin{frame}
% \frametitle{Outline}
% \tableofcontents
% \end{frame}
\section{The x86 Architecture}
\subsection{Overview on the common 32-bit Intel Architecture (IA)}
\begin{frame}
\frametitle{Instruction Set Architecture (ISA)}
\begin{itemize}
\item ``Logical'' specification of a computer architecture
\item Concerned with programming concepts
\begin{itemize}
\item instructions, registers, interrupts, memory architecture, \dots
\end{itemize}
\item May differ (widely) from the actual microarchitecture
\item Examples:
\begin{itemize}
\item x86 (IA-32 and x86\_64)
\item ARM (mobile devices)
\item MIPS (embedded devices, e.g.,~consumer routers)
\item AVR, SPARC, Power, RISC V, \dots
\end{itemize}
\end{itemize}
\end{frame}
\begin{frame}{The x86 ISA}
\begin{itemize}
\item Born in 1978, 16-bit ISA (Intel 8086)
\item Evolved to a 32-bit ISA (1985, Intel 80386)
\item Evolved to a 64-bit ISA (2003, AMD Opteron)
\item CISC design (e.g.,~string operations)
\item Many legacy features (e.g,~segmentation)
\item We'll see the basics of the ``core'' ISA
\begin{itemize}
\item There is also the floating point unit, processor-specific features, and extensions such as SIMD (MMX, SSE, SSE2) with their own instructions and registers\footnote{Complete reference: Intel Software Developer's Manual, about 5,000 pages (\url{https://software.intel.com/en-us/articles/intel-sdm})}
\end{itemize}
\end{itemize}
\end{frame}
\begin{frame}
\frametitle{Von Neumann Architecture}
%https://docs.google.com/drawings/d/1dDiokZZ4ba9V6rM9EnOCCIvbmxemN7DxXvL0ipsYPnE/edit?usp=sharing
\begin{figure}
\includegraphics[height=2.3in]{images/Von-Neumann-architecture.pdf}
\end{figure}
\end{frame}
\begin{frame}
\frametitle{Memory}
\begin{tikzpicture}[font=\tiny]
% Draw the memory layout
\matrix[matrix of nodes,
ampersand replacement=\&,
row sep=-\pgflinewidth,
column sep=-\pgflinewidth,
nodes={draw, minimum size=5.5mm, anchor=center, font=\tiny},
column 1/.style={nodes={fill=lightorange}},
column 2/.style={nodes={fill=lightorange}},
column 3/.style={nodes={fill=lightorange}},
column 4/.style={nodes={fill=lightorange}},
column 5/.style={nodes={fill=lightblue}},
column 6/.style={nodes={fill=lightblue}},
column 7/.style={nodes={fill=lightblue}},
column 8/.style={nodes={fill=lightblue}},
column 9/.style={nodes={fill=lightorange}},
column 10/.style={nodes={fill=lightorange}},
column 11/.style={nodes={fill=lightorange}},
column 12/.style={nodes={fill=lightorange}},
column 13/.style={nodes={fill=lightblue}},
column 14/.style={nodes={fill=lightblue}},
column 15/.style={nodes={fill=lightblue}},
column 16/.style={nodes={fill=lightblue}},
] (mem) at (0,0)
{
00 \& 01 \& 02 \& 03 \& 04 \& 05 \& 06 \& 07 \& 08 \& 09 \& 0A \& 0B \& 0C \& 0D \& 0E \& 0F \\
E8 \& FF \& FF \& FF \& E0 \& FF \& FF \& FF \& D8 \& FF \& FF \& FF \& D0 \& FF \& FF \& FF \\
50 \& 20 \& 40 \& 80 \& 60 \& 20 \& 40 \& 80 \& 70 \& 20 \& 40 \& 80 \& 80 \& 20 \& 40 \& 80 \\
48 \& 65 \& 6C \& 6C \& 6F \& 20 \& 77 \& 6F \& 72 \& 6C \& 64 \& 00 \& 00 \& 00 \& 00 \& 00 \\
'H' \& 'e' \& 'l' \& 'l' \& 'o' \& ' ' \& 'w' \& 'o' \& 'r' \& 'l' \& 'd' \& 00 \& 00 \& 00 \& 00 \& 00 \\
};
% Add column labels above
\foreach \col in {1,...,16}{
\pgfmathparse{hex(\col-1)}
\edef\hexValue{\pgfmathresult}
\expandafter\MakeUppercase\expandafter{\hexValue}
\node[above=3mm of mem-1-\col] {\MakeUppercase{\hexValue}};
}
% Add addresses to the left
\foreach \row in {1,...,5}{
\node[left=3mm of mem-\row-1] {0x804020\pgfmathparse{int(5-\row)}\pgfmathresult...};
}
\end{tikzpicture}
\end{frame}
\begin{frame}
\frametitle{IA-32: Registers}
\begin{columns}
\begin{column}{2in}
\begin{figure}
\centering
\includegraphics[width=\textwidth]{images/x86-isa}
\end{figure}
\end{column}
\begin{column}{2.7in}
\begin{itemize}
\item General-purpose registers
\begin{itemize}
\item {\tt EAX}, {\tt EBX}, {\tt ECX}, {\tt EDX}
\item {\tt ESI}, {\tt EDI} (source and destination index for string operations)
\item {\tt EBP} (base pointer)
\item {\tt ESP} (stack pointer)
\end{itemize}
\item Instruction pointer: {\tt EIP}
\begin{itemize}
\item No explicit access
\item Modified by {\tt jmp}, {\tt call}, {\tt ret}
\item Read through the stack (saved IP)
\end{itemize}
\item Program status and control: {\tt EFLAGS}
\item (segment registers)
\end{itemize}
\end{column}
\end{columns}
\end{frame}
\begin{frame}
\frametitle{IA-32: {\tt EFLAGS} register}
\begin{itemize}
\item 32-bits register, boolean flags
\item \textbf{Program status}: overflow, sign, zero, auxiliary carry (BCD), parity, carry
\begin{itemize}
\item Indicate the result of arithmetic instructions
\item Extremely important for control flow
\end{itemize}
\item \textbf{Program control}: direction flag
\begin{itemize}
\item controls string instructions (auto-increment or auto-decrement)
\end{itemize}
\item \textbf{System}: control operating-system operations
\end{itemize}
\end{frame}
\begin{frame}
\frametitle{IA-32: {\tt EFLAGS} register}
\begin{figure}
\includegraphics[height=2.8in]{images/intel-manual-eflags.png}
\end{figure}
\end{frame}
\begin{frame}{Fundamental data types}
\begin{description}
\item[byte] 8 bits
\item[word] 2 bytes
\item[dword] Doubleword, 4 bytes (32 bits)
\item[qword] Quadword, 8 bytes (64 bits)
\end{description}
\end{frame}
\begin{frame}{Assembly and Machine Code}
Assembly language: specific to each ISA, mapped to binary code
\begin{figure}
\includegraphics[width=\linewidth]{images/asm-disasm}
\end{figure}
For simplicity, we don't deal with the \emph{linking} process.
\end{frame}
\begin{frame}{Assembly: Syntax}
Two main syntaxes:
\begin{itemize}
\item \textbf{Intel}: default in most Windows programs (e.g.,~IDA)
\item \textbf{AT\&T}: default in most UNIX tools (e.g.,~{\tt gdb}, {\tt objdump})
\end{itemize}
Beware: The order of the operands is \textbf{different} \\[.5em]
We will use the Intel syntax
\end{frame}
\begin{frame}{Assembly: Syntax}
\begin{center}
\emph{move the value 0 to \texttt{EAX}}
\par\vskip 0.8em\begin{tabular}{ccc}
\textbf{Intel} & $\qquad$ & \textbf{AT\&T} \\
\texttt{mov eax, 0h} & & \texttt{movl \$0x0,\%eax}\end{tabular}
\end{center}
\vskip 1em
\begin{center}
\emph{move the value 0 to the address contained in \texttt{EBX}+4}
\par\vskip 0.8em\begin{tabular}{ccc}
\textbf{Intel} & $\qquad$ & \textbf{AT\&T} \\
\texttt{mov [ebx+4h],0h} & & \texttt{movl \$0x0,0x4(\%ebx)}\end{tabular}
\end{center}
\end{frame}
\begin{frame}{x86: data movement}
\begin{block}{Examples}
\begin{tabular}{ll}
\multicolumn{2}{l}{Immediate to register:}\\
{\tt mov eax, 4h} & {\small EAX = 4} \\[.4em]
\multicolumn{2}{l}{Register to register:}\\
{\tt mov eax, ebx} & {\small EAX = EBX} \\[.4em]
\multicolumn{2}{l}{Memory to register (and register to memory):}\\
{\tt mov eax, [ebx]} & {\small EAX = *EBX} \\
{\tt mov eax, [ebx + 4h]} & {\small EAX = *(EBC + 4)} \\
{\tt mov eax, [edx + ebx*4 + 8]} & {\small EAX = *(EDX + EBX * 4 + 8)}
\end{tabular}
\end{block}
Note: memory to memory is an \textbf{invalid} combination\footnote{Except in some instructions, such as {\tt movs} (move from string to string).}
\end{frame}
\begin{frame}{x86 Assembly and Machine Code}
Instruction = opcode + operand
\begin{block}{Example}
\centering
\includegraphics[width=.95\linewidth]{images/asm-machine-map}
\end{block}
Beware: in x86, instructions have \textbf{variable length}.
\end{frame}
\subsection{Basic Instructions}
%\begin{frame}
% \frametitle{Instructions}
% \begin{itemize}
% \item{Every processor has a large instruction set (see, e.g., Intel Software Developer's Manual\footnote{\url{https://software.intel.com/en-us/articles/intel-sdm}})}
% \item{A subset of the whole instruction set is usually processor dependent}
% \item{We will focus on a small subset of the general purpose x86 instructions}
% \item{We will use the Intel syntax}
% \item Very good reference: \url{http://ref.x86asm.net/geek32.html}
% \end{itemize}
%\end{frame}
\begin{frame}{Basic instructions}
\begin{itemize}
\item \textbf{Data Transfer}: {\tt mov}, {\tt push}, {\tt pop}, {\tt xchg}, {\tt lea}
\item \textbf{Integer Arithmetic}: {\tt add}, {\tt sub}, {\tt mul}, {\tt imul}, {\tt div}, {\tt idiv}, {\tt inc}, {\tt dec}
\item \textbf{Logical}: {\tt and}, {\tt or}, {\tt not}, {\tt xor}
\item \textbf{Control Transfer}: {\tt jmp}, {\tt jne}, {\tt call}, {\tt ret}
\item and lots more\dots
\end{itemize}
\end{frame}
\begin{frame}{Data Transfer: {\tt mov}}
\begin{itemize}
\item {\tt mov} \underline{\textbf{destination}}, \underline{\textbf{source}}\\
\textbf{source}: immediate, register, memory location\\
\textbf{destination}: register or memory location\\
\item Basic load/store operations
\begin{itemize}
\item Register to register, register to memory, immediate to register, immediate to memory
\item Memory to memory is INVALID (in every instruction)
\end{itemize}
\end{itemize}
\begin{block}{Examples}
\centering
\begin{tabular}{c|c|c}
{\tt MOV eax, ebx} & {\tt MOV eax, FFFFFFFFh} & {\tt MOV ax, bx}\\[.4em]
{\tt MOV [eax],ecx} & {\tt MOV [eax],[ecx]} \color{red}NO!!! & {\tt MOV al, FFh}\\
\end{tabular}
\end{block}
\end{frame}
\begin{frame}{Integer Arithmetics: {\tt add} and {\tt sub}}
\begin{table}
\centering
\begin{tabular}{l|l}
{\tt add} \underline{\textbf{destination}}, \underline{\textbf{source}} & {\tt sub} \underline{\textbf{destination}}, \underline{\textbf{source}} \\
dest $\leftarrow$ dest $+$ source & dest $\leftarrow$ dest $-$ source \\
\end{tabular}
\end{table}
\begin{itemize}
\item Addressing: \\
\textbf{source}: immediate, register, memory location\\
\textbf{destination}: register or memory location\\
(the destination has to be at least as large as the source)
\item Negate a value: {\tt neg} [op]
\item Bitwise operations: {\tt and}, {\tt or}, {\tt xor}, {\tt not} work similarly
\end{itemize}
\begin{block}{Examples}
\centering
\begin{tabular}{c|c|c}
{\tt add esp, 44h} & {\tt add edx, cx} & {\tt add al, dh} \\[.4em]
{\tt sub esp, 33h} & {\tt sub eax, ebx} & {\tt sub [eax], 1h} \\
\end{tabular}
\end{block}
\end{frame}
\begin{frame}{Integer Arithmetics: unsigned multiply ({\tt mul})}
\begin{itemize}
\item{{\tt mul} \underline{\textbf{source}}}\\
\textbf{source}: register or memory location
\item dest $\leftarrow$ implied\_op $\times$ source
\item \textbf{Implied operands} according to the size of \textbf{source}
\begin{itemize}
\item First operand: {\tt AL}, {\tt AX}, or {\tt EAX}
\item Destination: {\tt AX}, {\tt DX:AX}, {\tt EDX:EAX} (double the size of \textbf{source})
\end{itemize}
\item Signed multiply: {\tt imul}
\end{itemize}
\begin{block}{Example}
\begin{itemize}
\item {\tt mul ebx}: {\tt EDX:EAX $\leftarrow$ EAX * EBX}
\begin{itemize}
\item most significant bits of the result in {\tt EDX}
\item least significant bits of the result in {\tt EAX}
\end{itemize}
\item {\tt mul cx}: {\tt DX:AX $\leftarrow$ AX * CX}
\item {\tt mul cl}: {\tt AX $\leftarrow$ AL * CL}
\end{itemize}
\end{block}
\end{frame}
\begin{frame}{Integer Arithmetics: unsigned divide ({\tt div})}
\begin{itemize}
\item{{\tt div} \underline{\textbf{source}}}\\
\textbf{source}: register or a memory location
\item Computes quotient and remainder
\item Implied operand: {\tt EDX:EAX} (according to the size of \textbf{source})
\item Signed divide: {\tt idiv}
\end{itemize}
\begin{block}{Examples}
\begin{itemize}
\item {\tt div ebx} (4 bytes)
\begin{itemize}
\item {\tt EAX $\leftarrow$ EDX:EAX / EBX}
\item {\tt EDX $\leftarrow$ EDX:EAX \% EBX}
\end{itemize}
\item {\tt div bx} (2 bytes)
\begin{itemize}
\item {\tt AX $\leftarrow$ DX:AX / BX} $\qquad$ {\tt DX = DX:AX \% BX}
\end{itemize}
\item {\tt div bl} (1 byte)
\begin{itemize}
\item {\tt AL $\leftarrow$ AX / BX} $\qquad$ {\tt AH = AX \% BX}
\end{itemize}
\end{itemize}
\end{block}
\end{frame}
\begin{frame}{Integer Arithmetics: {\tt cmp} and {\tt test}}
\begin{table}
\centering
\begin{tabular}{l|l}
{\tt cmp} \underline{\textbf{op1}}, \underline{\textbf{op2}} & {\tt test} \underline{\textbf{op1}}, \underline{\textbf{op2}} \\
Computes op1 $-$ op2 & Computes op1 $\&$ op2 \\
\end{tabular}
\end{table}
\begin{itemize}
\item Sets the flags ({\tt ZF},{\tt CF}, {\tt OF}, \dots)
\item Discards the result
\end{itemize}
\begin{block}{Examples}
\centering
\begin{tabular}{c|c|c}
{\tt cmp eax, ebx} & {\tt cmp eax, 44BBCCDDh} & {\tt cmp al, dh}\\[.4em]
{\tt cmp al, 44h}&{\tt cmp ax,FFFFh} & {\tt cmp [eax],4h}\\
\end{tabular}
\end{block}
\end{frame}
\begin{frame}
\frametitle{Control-Flow Instructions: conditional jumps}
{\tt j<cc>} \underline{\textbf{address}} or \underline{\textbf{offset}}
Jump to \textbf{address} if and only if a certain condition is verified
\begin{columns}
\begin{column}{2.5in}
\begin{figure}
\includegraphics[width=\textwidth]{images/x86-jcc.pdf}
\end{figure}
\end{column}
\begin{column}{2.5in}
{\tt <cc>}: condition
\begin{itemize}
\item O,NO,S,NS,E,Z,NE, \dots
\item based on one or more status flags of {\tt EFLAGS}
\end{itemize}
Examples:
\begin{itemize}
\item {\tt jz} = jump if zero
\item {\tt jg} = jump if greater than
\item {\tt jlt} = jump if less than
\end{itemize}
Reference: \url{http://www.unixwiz.net/techtips/x86-jumps.html}
\end{column}
\end{columns}
\end{frame}
\begin{frame}
\frametitle{Control-Flow Instructions: unconditional jump {\tt jmp}}
\begin{columns}
\begin{column}{0.4\columnwidth}
\begin{figure}
\includegraphics[width=1.1\textwidth]{images/x86-jmp.pdf}
\label{Control Flow JMP}
\end{figure}
\end{column}
\begin{column}{0.6\columnwidth}
\begin{itemize}
\item{{\tt jmp} \underline{\textbf{address}} or \underline{\textbf{offset}}}\\
\item Unconditional jump: just set the {\tt EIP} to \textbf{address}
\item Can be also \emph{relative}: increment or decrement {\tt EIP} by an offset
\end{itemize}
\end{column}
\end{columns}
\end{frame}
\begin{frame}[fragile]{Exercise 1}
Translate the following C code in assembly x86. Assume EBX $\leftarrow$ \texttt{b}, ECX $\leftarrow$ \texttt{c}. Finally, \texttt{a} goes in EAX.
\begin{lstlisting}[language={C}]
if (c == 0)
a = b;
else
a = -b;
\end{lstlisting}
\end{frame}
\begin{frame}[fragile]{Solution}
\begin{lstlisting}[language={[x86masm]Assembler}]
mov edx, 0
cmp ecx, edx
jne ELSE
mov eax, ebx
jmp ENDIF
ELSE:
mov eax, 0
sub eax, ebx
ENDIF:
nop
...
\end{lstlisting}
\end{frame}
\begin{frame}[fragile]{Exercise 2}
Translate the following C code in assembly x86. The variable \texttt{a} goes in EAX.
\begin{lstlisting}[language={C}]
a = 0;
for(i = 0; i < 10; i++)
a += i;
\end{lstlisting}
\end{frame}
\begin{frame}[fragile]{Solution}
\begin{lstlisting}[language={[x86masm]Assembler}]
mov eax, 0
mov ebx, 0
mov ecx, 10
LOOP:
cmp ebx, ecx
jge END
add eax, ebx
inc ebx
jmp LOOP
END:
nop
...
\end{lstlisting}
\end{frame}
\begin{frame}[fragile]{A very simple example (what does it do?)}
Assume that the input is in registers: {\tt ECX} and {\tt EDX}; output: {\tt EAX}
\begin{lstlisting}[language={[x86masm]Assembler}]
mov eax, ecx
mov ebx, edx
cmp ebx, 0
jz LABEL
LOOP:
cmp ebx, 1
jle RET
mul ecx
sub ebx, 1
jmp LOOP
LABEL:
mov eax, 1
RET:
...
\end{lstlisting}
\end{frame}
\begin{frame}{Load effective address ({\tt lea})}
\begin{itemize}
\item{{\tt lea} \underline{\textbf{destination}}, \underline{\textbf{source}}}\\
\textbf{source}: memory location\\
\textbf{destination}: register\\
\item{Like a {\tt mov}, but it is storing the pointer, not the value}
\item \alert{It does NOT access memory}
\end{itemize}
\begin{block}{Example}
\par\noindent{}
\centerline{\includegraphics[width=0.7\textwidth]{images/x86-lea}}
\centerline{\tt lea eax, [ebx + 8] $\rightarrow$ \texttt{EAX = 0x00403A48}}
\centerline{\textbf{N.B.}: with {\tt mov eax, [ebx+8]} $\rightarrow$ {\tt EAX = 0x0012C140}}
\end{block}
\end{frame}
\begin{frame}{Basic Instructions: {\tt nop}}
\begin{itemize}
\item{{\tt nop} = \textbf{No Operation}. Just move to next instruction.}
\item{The opcode is pretty famous and is {\tt 0x90}}
\item{Really useful in exploitation (we will see!)}
\end{itemize}
\end{frame}
\begin{frame}{Interrupts and Syscalls}
\begin{itemize}
\item {\tt int} \underline{\textbf{value}}
\begin{itemize}
\item \textbf{value}: software interrupt number to generate (0-255)
\item Every OS has its set of interrupt numbers (e.g., {\tt 80h} for Linux system calls)
\end{itemize}
\item {\tt syscall} used for Linux 64-bit
\item {\tt sysenter} used by Microsoft Windows
\end{itemize}
\end{frame}
\subsection{x86\_64}
\begin{frame}{The x86\_64 ISA}
\centering
\includegraphics[width=1\linewidth]{images/x86-64}
\end{frame}
\begin{frame}
\frametitle{Endianness}
\textbf{Endianness}: convention that specifies in which order the bytes of a data word are lined up sequentially in memory.
\begin{block}{Big-endian (left)}
\begin{columns}
\begin{column}{0.6\textwidth}
Systems in which the \emph{most significant byte} of the word is stored in the \emph{smallest address} given.
\end{column}
\begin{column}{0.25\textwidth}
\includegraphics[width=\textwidth]{images/Big-Endian.pdf}
\end{column}
\end{columns}
\end{block}
\begin{block}{Little-endian}
\begin{columns}
\begin{column}{0.25\columnwidth}
\includegraphics[width=\textwidth]{images/Little-Endian.pdf}
\label{Little-Endian (right)}
\end{column}
\begin{column}{0.6\columnwidth}
Systems in
which the \emph{least significant} byte is stored in the
\emph{smallest address}. \alert{IA-32 is ``little endian''}.
\end{column}
\end{columns}
\end{block}
\end{frame}
\section{Program Layout and Functions}
\subsection{Memory Layout}
\begin{frame}
\begin{changemargin}{-1cm}{-1cm}
\frametitle{How an executable is mapped to memory in Linux (ELF)}
\begin{table}[l]
\scalebox{0.7}{
\begin{tabular}{ll}
\toprule
\textbf{Executable}&\textbf{Description}\\
\midrule
.plt& This section holds stubs which are responsible of \\
&external functions linking.\\\midrule
.text&This section holds the "text," or executable instructions, of a program.\\\midrule
.rodata& This section holds read-only data that contribute to \\
&the program's memory image\\\midrule
.data& This section holds initialized data that contribute to \\
&the program's memory image\\\midrule
.bss&This section holds uninitialized data that contributes to the program's memory image.\\
&By definition, the system initializes the data with zeros when the program begins to run.\\\midrule
.debug&This section holds information symbolic debugging.\\\midrule
.init&This section holds executable instructions that contribute to the process initialization code.\\
&That is, when a program starts to run, the system arranges to execute the code in this\\
§ion before calling the main program entry point (called main for C programs).\\
\midrule
.got&This section holds the global offset table.\\
\bottomrule
\end{tabular}
}
\end{table}
\end{changemargin}
\end{frame}
\begin{frame}[fragile]{Simplified program memory layout}
\begin{center}
{\footnotesize Low addresses ({\tt 0x80000000})}
\begin{tikzpicture}[scale=0.6, font=\footnotesize]
\cell{Shared libraries}
\cell{{\tt .text}}
\cell{{\tt .bss}}
\cell{Heap (grows $\downarrow$)}
\padding{2}{\dots}
\cell{Stack (grows $\uparrow$)}
\cell{{\tt env}}
\cell{{\tt argv}}
\end{tikzpicture}
{\footnotesize High addresses ({\tt 0xbfffffff})}
\end{center}
\end{frame}
\subsection{The Stack}
\begin{frame}{The Stack}
\begin{itemize}
\item LIFO (last in first out) data structure
\item Used to manage functions
\begin{itemize}
\item local variables
\item return addresses
\item ...
\end{itemize}
\item Handled through the register {\tt ESP} (stack pointer)
\item Remember: the stack grows \textbf{toward lower addresses} (downward the address space)
\end{itemize}
\end{frame}
\begin{frame}[fragile]{Stack Management Instructions: {\tt push}}
\par\noindent{}
\centerline{{\tt push} \underline{{\bf immediate}} or \underline{\bf register}}
\par\noindent Stores the immediate or register value at the top of the stack and decrements the {\tt ESP} of the operand size
\begin{block}{Example}
\begin{columns}
\begin{column}{0.45\textwidth}
\only<-2>{Initial}\only<3->{Final} condition: {\tt EAX} = $30$ \\[.5em]
{\tt push eax} \\[1em]
is equivalent to: \\[1em]
\alert<2>{{\small\tt sub esp, 4} \\}
\alert<3>{{\small\tt mov DWORD PTR [esp], eax}}
\end{column}
\begin{column}{0.4\textwidth}
\centering\par
{\scriptsize Low addresses ({\tt 0x80000000})}\\[.5em]
\begin{drawstack}[scale=0.7]
\cell{}
\only<2->{\bcell{\only<3->{$30$}}\cellptr{{\tt ESP}}}
\only<-1>\cell{}
\bcell{$100$} \only<1>{\cellptr{{\tt ESP}}}
\end{drawstack}
{\scriptsize High addresses ({\tt 0xbfffffff})}
\end{column}
\end{columns}
\end{block}
\end{frame}
\begin{frame}[fragile]{Stack Management Instructions: {\tt pop}}
\par\noindent{}
\centerline{{\tt pop} \underline{{\bf destination}}}
\par\noindent Loads to the destination a word off the top of the stack, then it increases {\tt ESP} of the operand's size.
\begin{block}{Example}
\begin{columns}
\begin{column}{0.45\textwidth}
\only<-2>{Initial}\only<3->{Final} condition: {\tt EAX} = \only<-1>{???}\only<2->{$30$} \\[.5em]
{\tt pop eax} \\[1em]
is equivalent to: \\[1em]
\alert<2>{{\tt mov eax, DWORD PTR [esp]} \\}
\alert<3>{{\tt add esp, 4} \\}
\end{column}
\begin{column}{0.4\textwidth}
\centering\par
{\scriptsize Low addresses ({\tt 0x80000000})}\\[.5em]
\begin{drawstack}[scale=0.7]
\cell{}
\only<-2>{\bcell{$30$}\cellptr{{\tt ESP}}}
\only<3->{\cell{$30$}}
\bcell{$100$}\only<3->{\cellptr{{\tt ESP}}}
\end{drawstack}
{\scriptsize High addresses ({\tt 0xbfffffff})}
\end{column}
\end{columns}
\end{block}
\end{frame}
\subsection{Functions}
\begin{frame}[fragile]{Calling a function}
Instruction {\tt call}:
\begin{itemize}
\item Push to the stack the address of the next instruction
\item Move the address of the first instruction of the callee into {\tt EIP}
\end{itemize}
\begin{block}{Example: Let's call {\tt func}, located at 0x800bff00}
\vskip 0.4em
\begin{columns}
\begin{column}{0.45\textwidth}
Equivalent to:
\begin{itemize}
\item \alert<2>{\tt push address(of the instruction after the call!)}
\item \alert<3>{\tt jmp func}
\end{itemize}
(reminder: we can't read or set {\tt EIP} directly!)
\end{column}
\begin{column}{0.4\textwidth}
{\scriptsize Low addresses ({\tt 0x80000000})}\\[.5em]
\begin{drawstack}[scale=0.7, font=\footnotesize]
\cell{}
\cell{\only<2->{0x8001025}}\only<2->{\cellptr{\tt ESP}}
\bcell{Stack top}\only<-1>{\cellptr{\tt ESP}}
\end{drawstack}
{\scriptsize High addresses ({\tt 0xbfffffff})}
\only<-2>{EIP = 0x8001020}
\only<3->{EIP = 0x800bff00}
\end{column}
\end{columns}
\end{block}
\end{frame}
\begin{frame}[fragile]{Returning from a function}
Instruction {\tt ret}:
\begin{itemize}
\item Restores the return address saved by {\tt call} from the top of the stack
\end{itemize}
\begin{block}{Example: let's return from {\tt func}}
\vskip 0.4em
\begin{columns}
\begin{column}{0.45\textwidth}
Equivalent to:
\begin{itemize}
\item \alert<2>{\tt pop eip}
\end{itemize}
(reminde: we can't read or set {\tt EIP} directly!)
\end{column}
\begin{column}{0.4\textwidth}
{\scriptsize Low addresses ({\tt 0x80000000})}\\[.5em]
\begin{drawstack}[scale=0.7, font=\footnotesize]
\cell{}
\cell{\only<-1>{0x8001025}}\only<-1>{\cellptr{\tt ESP}}
\bcell{Stack top}\only<2->{\cellptr{\tt ESP}}
\end{drawstack}
{\scriptsize High addresses ({\tt 0xbfffffff})}
\only<2->{EIP = 0x8001025}
\only<-1>{EIP = 0x800bff00}
\end{column}
\end{columns}
\end{block}
\end{frame}
\renewcommand{\finishframe}[1]{
\draw[snake=brace, line width=0.6pt, segment amplitude=7pt]
(-2,\value{cellnb}-0.5) -- (-2,\value{startframe}-0.5);
\draw (-3cm,\value{cellnb}*0.5+\value{startframe}*0.5-0.5) node {#1};
}
\begin{frame}[fragile]{Functions and Stack Frames}
\begin{columns}
\begin{column}{0.45\linewidth}
At the beginning of a function, the function itself must reserve space for its local variables.
\begin{lstlisting}[language={C}]
void foo() {
int a;
int b;
int c;
b = 0;
}
\end{lstlisting}
\end{column}
\begin{column}{0.4\linewidth}
\par
{\scriptsize Low addresses ({\tt 0x80000000})}\\[.5em]
\begin{tikzpicture}[scale=.7, font=\footnotesize]
\stacktop{}
\startframe
\cell{}
\cell{}
\cell{}
\cell{}
\cell{}
\cell{}
\bcell{Return addr (s{\tt EIP})}\cellptr{{\tt ESP}}
\stackbottom
\end{tikzpicture}
{\scriptsize High addresses ({\tt 0xbfffffff})}
\end{column}
\end{columns}
\end{frame}
\begin{frame}[fragile]{Functions and Stack Frames}
\begin{columns}
\begin{column}{0.45\linewidth}
At the beginning of a function, the function itself must reserve space for its local variables.
\begin{lstlisting}[language={[x86masm]Assembler}]
FOO:
mov ebp, esp
sub esp, 0xc
mov [ebp - 0x8], 0x0
add esp, 0xc
ret
\end{lstlisting}
\end{column}
\begin{column}{0.4\linewidth}
\par
{\scriptsize Low addresses ({\tt 0x80000000})}\\[.5em]
\begin{tikzpicture}[scale=.7, font=\footnotesize]
\stacktop{}
\startframe
\cell{}
\cell{}
\cell{}
\cell{}
\cell{}
\cell{}
\bcell{Return addr (s{\tt EIP})}\cellptr{{\tt ESP}}
\stackbottom
\end{tikzpicture}
{\scriptsize High addresses ({\tt 0xbfffffff})}
\end{column}
\end{columns}
\end{frame}
\begin{frame}[fragile]{Functions and Stack Frames}
\begin{columns}
\begin{column}{0.45\linewidth}
At the beginning of a function, the function itself must reserve space for its local variables.
\begin{lstlisting}[language={[x86masm]Assembler}, escapechar=\%]
FOO:
mov ebp, esp %$\leftarrow$%
sub esp, 0xc
mov [ebp - 0x8], 0x0
add esp, 0xc
ret
\end{lstlisting}
\end{column}
\begin{column}{0.4\linewidth}
\par
{\scriptsize Low addresses ({\tt 0x80000000})}\\[.5em]
\begin{tikzpicture}[scale=.7, font=\footnotesize]
\stacktop{}
\startframe
\cell{}
\cell{}
\cell{}
\cell{}
\cell{}
\cell{}
\bcell{Return addr (s{\tt EIP})}\cellptr{{\tt ESP, EBP}}
\stackbottom
\end{tikzpicture}
{\scriptsize High addresses ({\tt 0xbfffffff})}
\end{column}
\end{columns}
\end{frame}