From a44c38134cefe17a81c269b6ec23d91cfe4e7216 Mon Sep 17 00:00:00 2001 From: bhsueh Date: Fri, 15 Apr 2022 18:28:30 +0800 Subject: [PATCH] feat: update v5.0 --- .gitmodules | 8 +- 3rdparty/CMakeLists.txt | 2 +- .../CMakeLists.txt | 2 +- .../trt_fused_multihead_attention/common.cuh | 6 + ...ith_relPosBias_fp16_128_32_kernel.sm75.cpp | 27603 ++++++++++++++++ ...ith_relPosBias_fp16_128_32_kernel.sm80.cpp | 24915 ++++++++++++++ ...ith_relPosBias_fp16_128_32_kernel.sm86.cpp | 24926 ++++++++++++++ ...ith_relPosBias_fp16_256_32_kernel.sm75.cpp | 21929 ++++++++++++ ...ith_relPosBias_fp16_256_32_kernel.sm80.cpp | 19699 +++++++++++ ...ith_relPosBias_fp16_256_32_kernel.sm86.cpp | 19699 +++++++++++ ...with_relPosBias_fp16_64_32_kernel.sm75.cpp | 12051 +++++++ ...with_relPosBias_fp16_64_32_kernel.sm80.cpp | 11187 +++++++ ...with_relPosBias_fp16_64_32_kernel.sm86.cpp | 11294 +++++++ ...ith_relPosBias_int8_256_32_kernel.sm75.cpp | 24755 ++++++++++++++ ...ith_relPosBias_int8_256_32_kernel.sm80.cpp | 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src/fastertransformer/utils/gemm.cc create mode 100644 src/fastertransformer/utils/gemm.h create mode 100644 src/fastertransformer/utils/gemm_test/swin_gemm_func.cc create mode 100644 src/fastertransformer/utils/gemm_test/swin_gemm_func.h create mode 100644 src/fastertransformer/utils/gemm_test/swin_igemm_func.cc create mode 100644 src/fastertransformer/utils/gemm_test/swin_igemm_func.h create mode 100644 src/fastertransformer/utils/string_utils.h create mode 100644 src/fastertransformer/utils/word_list.cc create mode 100644 src/fastertransformer/utils/word_list.h create mode 100644 tests/CMakeLists.txt create mode 100644 tests/unittests/CMakeLists.txt create mode 100644 tests/unittests/test_gemm.cu create mode 100644 tests/unittests/test_logprob_kernels.cu create mode 100644 tests/unittests/test_sampling.cu diff --git a/.gitmodules b/.gitmodules index a7bd15978..79d882151 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,7 +1,13 @@ [submodule "3rdparty/Megatron-LM"] path = 3rdparty/Megatron-LM url = https://github.com/NVIDIA/Megatron-LM.git - branch = v2.4 + branch = v2.6 [submodule "examples/tensorflow/bert/tensorflow_bert/bert"] path = examples/tensorflow/bert/tensorflow_bert/bert url = https://github.com/google-research/bert.git +[submodule "examples/pytorch/swin/Swin-Transformer-Quantization/SwinTransformer"] + path = examples/pytorch/swin/Swin-Transformer-Quantization/SwinTransformer + url = https://github.com/microsoft/Swin-Transformer +[submodule "examples/pytorch/vit/ViT-quantization/ViT-pytorch"] + path = examples/pytorch/vit/ViT-quantization/ViT-pytorch + url = https://github.com/jeonsworld/ViT-pytorch diff --git a/3rdparty/CMakeLists.txt b/3rdparty/CMakeLists.txt index 248879dfa..b2e6e1778 100644 --- a/3rdparty/CMakeLists.txt +++ b/3rdparty/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/CMakeLists.txt b/3rdparty/trt_fused_multihead_attention/CMakeLists.txt index e9541122e..870722071 100644 --- a/3rdparty/trt_fused_multihead_attention/CMakeLists.txt +++ b/3rdparty/trt_fused_multihead_attention/CMakeLists.txt @@ -1,5 +1,5 @@ # -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/3rdparty/trt_fused_multihead_attention/common.cuh b/3rdparty/trt_fused_multihead_attention/common.cuh index 752455d8b..b17e6a013 100644 --- a/3rdparty/trt_fused_multihead_attention/common.cuh +++ b/3rdparty/trt_fused_multihead_attention/common.cuh @@ -18,7 +18,13 @@ #define COMMON_CUH #include "cublas_v2.h" +#ifndef CUDART_VERSION +#error CUDART_VERSION Undefined! +#elif (CUDART_VERSION >= 11050) +#include +#else #include "3rdparty/cub/cub.cuh" +#endif #define HDI inline __host__ __device__ diff --git a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_128_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_128_32_kernel.sm75.cpp new file mode 100644 index 000000000..f07640e86 --- /dev/null +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_128_32_kernel.sm75.cpp @@ -0,0 +1,27603 @@ +/* +* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char fused_mha_with_relPosBias_fp16_128_32_kernel_sm75_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x6f, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x0c, 0x05, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x80, 0x06, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x4b, 0x05, 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b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_128_32_kernel.sm80.cpp new file mode 100644 index 000000000..c37a83b81 --- /dev/null +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_128_32_kernel.sm80.cpp @@ -0,0 +1,24915 @@ +/* +* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char fused_mha_with_relPosBias_fp16_128_32_kernel_sm80_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x6f, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x8e, 0x04, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x50, 0x05, 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100644 index 000000000..1d8a3fb72 --- /dev/null +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_128_32_kernel.sm86.cpp @@ -0,0 +1,24926 @@ +/* +* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char fused_mha_with_relPosBias_fp16_128_32_kernel_sm86_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x6f, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x8e, 0x04, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x89, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x56, 0x05, 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All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char fused_mha_with_relPosBias_fp16_256_32_kernel_sm75_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x6f, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x02, 0x04, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x80, 0xfc, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x4b, 0x05, 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All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char fused_mha_with_relPosBias_fp16_256_32_kernel_sm80_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x6f, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x99, 0x03, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x94, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x50, 0x05, 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All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char fused_mha_with_relPosBias_fp16_256_32_kernel_sm86_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x6f, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x99, 0x03, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x94, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x56, 0x05, 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All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char fused_mha_with_relPosBias_fp16_64_32_kernel_sm75_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x6f, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x33, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x80, 0x2d, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x4b, 0x05, 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b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_64_32_kernel.sm80.cpp new file mode 100644 index 000000000..ee352d348 --- /dev/null +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_64_32_kernel.sm80.cpp @@ -0,0 +1,11187 @@ +/* +* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char fused_mha_with_relPosBias_fp16_64_32_kernel_sm80_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x6f, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x0a, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x50, 0x05, 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b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_64_32_kernel.sm86.cpp new file mode 100644 index 000000000..fb8b6224c --- /dev/null +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_fp16_64_32_kernel.sm86.cpp @@ -0,0 +1,11294 @@ +/* +* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char fused_mha_with_relPosBias_fp16_64_32_kernel_sm86_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x6f, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x0f, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x56, 0x05, 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mode 100644 index 000000000..107962728 --- /dev/null +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_256_32_kernel.sm75.cpp @@ -0,0 +1,24755 @@ +/* +* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char fused_mha_with_relPosBias_int8_256_32_kernel_sm75_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x6f, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x86, 0x04, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x81, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x4b, 0x05, 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a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_256_32_kernel.sm80.cpp b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_256_32_kernel.sm80.cpp new file mode 100644 index 000000000..2ccffb8c8 --- /dev/null +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_256_32_kernel.sm80.cpp @@ -0,0 +1,22718 @@ +/* +* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char fused_mha_with_relPosBias_int8_256_32_kernel_sm80_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x6f, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x27, 0x04, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x80, 0x21, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x50, 0x05, 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= 272360; +} diff --git a/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_64_32_kernel.sm75.cpp b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_64_32_kernel.sm75.cpp new file mode 100644 index 000000000..26ad77054 --- /dev/null +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_64_32_kernel.sm75.cpp @@ -0,0 +1,8526 @@ +/* +* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char fused_mha_with_relPosBias_int8_64_32_kernel_sm75_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x6f, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8e, 0x01, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x80, 0x89, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x4b, 0x05, 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000000000..8511bf41a --- /dev/null +++ b/3rdparty/trt_fused_multihead_attention/fused_mha_with_relPosBias_int8_64_32_kernel.sm80.cpp @@ -0,0 +1,8195 @@ +/* +* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*/ +namespace fastertransformer +{ +unsigned char fused_mha_with_relPosBias_int8_64_32_kernel_sm80_cubin[] = { + 0x7f, 0x45, 0x4c, 0x46, 0x02, 0x01, 0x01, 0x33, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0xbe, 0x00, 0x6f, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x7e, 0x01, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x7a, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x50, 0x05, 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0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +}; +unsigned int fused_mha_with_relPosBias_int8_64_32_kernel_sm80_cubin_len = 98088; +} diff --git a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2.h b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2.h index 61b8a73e6..d7bc6c944 100644 --- a/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2.h +++ b/3rdparty/trt_fused_multihead_attention/fused_multihead_attention_v2.h @@ -20,14 +20,13 @@ #include #include -namespace fastertransformer -{ -struct Fused_multihead_attention_params_v2 -{ +namespace fastertransformer{ +struct Fused_multihead_attention_params_v2{ // The QKV matrices. void* qkv_ptr; // The mask to implement drop-out. void* packed_mask_ptr; + // The O matrix (output). void* o_ptr; @@ -70,10 +69,17 @@ struct Fused_multihead_attention_params_v2 bool force_unroll = false; bool use_int8_scale_max = false; + //***The additional paramters for fused_mha_with_relPosBias kernels + // The relative position bias. + void* packed_relative_position_bias_ptr = nullptr; + + int window_num, actual_seqlen; + void clear() { qkv_ptr = nullptr; packed_mask_ptr = nullptr; + packed_relative_position_bias_ptr = nullptr; o_ptr = nullptr; qkv_stride_in_bytes = 0; @@ -109,6 +115,15 @@ struct Fused_multihead_attention_params_v2 } }; //////////////////////////////////////////////////////////////////////////////////////////////////// +extern unsigned char fused_mha_with_relPosBias_fp16_64_32_kernel_sm75_cubin[]; +extern unsigned char fused_mha_with_relPosBias_fp16_64_32_kernel_sm80_cubin[]; +extern unsigned char fused_mha_with_relPosBias_fp16_64_32_kernel_sm86_cubin[]; +extern unsigned char fused_mha_with_relPosBias_fp16_128_32_kernel_sm75_cubin[]; +extern unsigned char fused_mha_with_relPosBias_fp16_128_32_kernel_sm80_cubin[]; +extern unsigned char fused_mha_with_relPosBias_fp16_128_32_kernel_sm86_cubin[]; +extern unsigned char fused_mha_with_relPosBias_fp16_256_32_kernel_sm75_cubin[]; +extern unsigned char fused_mha_with_relPosBias_fp16_256_32_kernel_sm80_cubin[]; +extern unsigned char fused_mha_with_relPosBias_fp16_256_32_kernel_sm86_cubin[]; extern unsigned char fused_multihead_attention_v2_fp16_128_64_kernel_sm75_cubin[]; extern unsigned char fused_multihead_attention_v2_fp16_128_64_kernel_sm80_cubin[]; extern unsigned char fused_multihead_attention_v2_fp16_128_64_kernel_sm86_cubin[]; @@ -130,6 +145,10 @@ extern unsigned char fused_multihead_attention_v2_fp16_128_64_kernel_sm70_cubin[ extern unsigned char fused_multihead_attention_v2_fp16_256_64_kernel_sm70_cubin[]; extern unsigned char fused_multihead_attention_v2_fp16_384_64_kernel_sm70_cubin[]; +extern unsigned char fused_mha_with_relPosBias_int8_64_32_kernel_sm75_cubin[]; +extern unsigned char fused_mha_with_relPosBias_int8_64_32_kernel_sm80_cubin[]; +extern unsigned char fused_mha_with_relPosBias_int8_256_32_kernel_sm75_cubin[]; +extern unsigned char fused_mha_with_relPosBias_int8_256_32_kernel_sm80_cubin[]; extern unsigned char fused_multihead_attention_v2_int8_64_64_kernel_sm75_cubin[]; extern unsigned char fused_multihead_attention_v2_int8_64_64_kernel_sm80_cubin[]; extern unsigned char fused_multihead_attention_v2_int8_128_64_kernel_cubin[]; @@ -149,6 +168,15 @@ extern unsigned char fused_multihead_attention_v2_int8_384_64_kernel_sm75_cubin[ extern unsigned char fused_multihead_attention_v2_int8_384_64_kernel_sm80_cubin[]; extern unsigned char fused_multihead_attention_v2_int8_384_64_kernel_sm86_cubin[]; +extern unsigned int fused_mha_with_relPosBias_fp16_64_32_kernel_sm75_cubin_len; +extern unsigned int fused_mha_with_relPosBias_fp16_64_32_kernel_sm80_cubin_len; +extern unsigned int fused_mha_with_relPosBias_fp16_64_32_kernel_sm86_cubin_len; +extern unsigned int fused_mha_with_relPosBias_fp16_128_32_kernel_sm75_cubin_len; +extern unsigned int fused_mha_with_relPosBias_fp16_128_32_kernel_sm80_cubin_len; +extern unsigned int fused_mha_with_relPosBias_fp16_128_32_kernel_sm86_cubin_len; +extern unsigned int fused_mha_with_relPosBias_fp16_256_32_kernel_sm75_cubin_len; +extern unsigned int fused_mha_with_relPosBias_fp16_256_32_kernel_sm80_cubin_len; +extern unsigned int fused_mha_with_relPosBias_fp16_256_32_kernel_sm86_cubin_len; extern unsigned int fused_multihead_attention_v2_fp16_128_64_kernel_sm75_cubin_len; extern unsigned int fused_multihead_attention_v2_fp16_128_64_kernel_sm80_cubin_len; extern unsigned int fused_multihead_attention_v2_fp16_128_64_kernel_sm86_cubin_len; @@ -170,6 +198,10 @@ extern unsigned int fused_multihead_attention_v2_fp16_128_64_kernel_sm70_cubin_l extern unsigned int fused_multihead_attention_v2_fp16_256_64_kernel_sm70_cubin_len; extern unsigned int fused_multihead_attention_v2_fp16_384_64_kernel_sm70_cubin_len; +extern unsigned int fused_mha_with_relPosBias_int8_64_32_kernel_sm75_cubin_len; +extern unsigned int fused_mha_with_relPosBias_int8_64_32_kernel_sm80_cubin_len; +extern unsigned int fused_mha_with_relPosBias_int8_256_32_kernel_sm75_cubin_len; +extern unsigned int fused_mha_with_relPosBias_int8_256_32_kernel_sm80_cubin_len; extern unsigned int fused_multihead_attention_v2_int8_64_64_kernel_sm75_cubin_len; extern unsigned int fused_multihead_attention_v2_int8_64_64_kernel_sm80_cubin_len;; extern unsigned int fused_multihead_attention_v2_int8_128_64_kernel_cubin_len; @@ -261,6 +293,24 @@ static const struct FusedMultiHeadAttentionKernelMetaInfoV2 "fused_multihead_attention_v2_fp16_384_64_kernel_sm70_noloop", 69632, 256, 32, false}, // Turing + {DATA_TYPE_FP16, 64, 32, kSM_75, fused_mha_with_relPosBias_fp16_64_32_kernel_sm75_cubin, + fused_mha_with_relPosBias_fp16_64_32_kernel_sm75_cubin_len, + "fused_mha_with_relPosBias_fp16_64_32_kernel_sm75", 12288, 128, 0, false}, + {DATA_TYPE_FP16, 64, 32, kSM_75, fused_mha_with_relPosBias_fp16_64_32_kernel_sm75_cubin, + fused_mha_with_relPosBias_fp16_64_32_kernel_sm75_cubin_len, + "fused_mha_with_relPosBias_fp16_64_32_kernel_sm75_noloop", 10240, 128, 32, false}, + {DATA_TYPE_FP16, 128, 32, kSM_75, fused_mha_with_relPosBias_fp16_128_32_kernel_sm75_cubin, + fused_mha_with_relPosBias_fp16_128_32_kernel_sm75_cubin_len, + "fused_mha_with_relPosBias_fp16_128_32_kernel_sm75", 16384, 128, 0, false}, + {DATA_TYPE_FP16, 128, 32, kSM_75, fused_mha_with_relPosBias_fp16_128_32_kernel_sm75_cubin, + fused_mha_with_relPosBias_fp16_128_32_kernel_sm75_cubin_len, + "fused_mha_with_relPosBias_fp16_128_32_kernel_sm75_noloop", 10240, 128, 32, false}, + {DATA_TYPE_FP16, 256, 32, kSM_75, fused_mha_with_relPosBias_fp16_256_32_kernel_sm75_cubin, + fused_mha_with_relPosBias_fp16_256_32_kernel_sm75_cubin_len, + "fused_mha_with_relPosBias_fp16_256_32_kernel_sm75", 18432, 128, 0, false}, + {DATA_TYPE_FP16, 256, 32, kSM_75, fused_mha_with_relPosBias_fp16_256_32_kernel_sm75_cubin, + fused_mha_with_relPosBias_fp16_256_32_kernel_sm75_cubin_len, + "fused_mha_with_relPosBias_fp16_256_32_kernel_sm75_noloop", 18432, 128, 32, false}, {DATA_TYPE_FP16, 64, 64, kSM_75, fused_multihead_attention_v2_fp16_64_64_kernel_sm75_cubin, fused_multihead_attention_v2_fp16_64_64_kernel_sm75_cubin_len, "fused_multihead_attention_v2_fp16_64_64_kernel_sm75", 24576, 128, 0, false}, @@ -286,6 +336,12 @@ static const struct FusedMultiHeadAttentionKernelMetaInfoV2 fused_multihead_attention_v2_fp16_384_64_kernel_sm75_cubin_len, "fused_multihead_attention_v2_fp16_384_64_kernel_sm75", 53248, 256, 0, false}, + {DATA_TYPE_INT8, 64, 32, kSM_75, fused_mha_with_relPosBias_int8_64_32_kernel_sm75_cubin, + fused_mha_with_relPosBias_int8_64_32_kernel_sm75_cubin_len, + "fused_mha_with_relPosBias_int8_64_32_kernel_sm75", 10240, 128, 0, false}, + {DATA_TYPE_INT8, 256, 32, kSM_75, fused_mha_with_relPosBias_int8_256_32_kernel_sm75_cubin, + fused_mha_with_relPosBias_int8_256_32_kernel_sm75_cubin_len, + "fused_mha_with_relPosBias_int8_256_32_kernel_sm75", 10240, 128, 0, false}, {DATA_TYPE_INT8, 64, 64, kSM_75, fused_multihead_attention_v2_int8_64_64_kernel_sm75_cubin, fused_multihead_attention_v2_int8_64_64_kernel_sm75_cubin_len, "fused_multihead_attention_v2_int8_64_64_kernel_sm75", 20480, 128, 0, false}, @@ -340,6 +396,24 @@ static const struct FusedMultiHeadAttentionKernelMetaInfoV2 #if CUDA_VERSION >= 11000 // Ampere + {DATA_TYPE_FP16, 64, 32, kSM_80, fused_mha_with_relPosBias_fp16_64_32_kernel_sm80_cubin, + fused_mha_with_relPosBias_fp16_64_32_kernel_sm80_cubin_len, + "fused_mha_with_relPosBias_fp16_64_32_kernel_sm80", 12288, 128, 0, false}, + {DATA_TYPE_FP16, 64, 32, kSM_80, fused_mha_with_relPosBias_fp16_64_32_kernel_sm80_cubin, + fused_mha_with_relPosBias_fp16_64_32_kernel_sm80_cubin_len, + "fused_mha_with_relPosBias_fp16_64_32_kernel_sm80_noloop", 10240, 128, 32, false}, + {DATA_TYPE_FP16, 128, 32, kSM_80, fused_mha_with_relPosBias_fp16_128_32_kernel_sm80_cubin, + fused_mha_with_relPosBias_fp16_128_32_kernel_sm80_cubin_len, + "fused_mha_with_relPosBias_fp16_128_32_kernel_sm80", 16384, 128, 0, false}, + {DATA_TYPE_FP16, 128, 32, kSM_80, fused_mha_with_relPosBias_fp16_128_32_kernel_sm80_cubin, + fused_mha_with_relPosBias_fp16_128_32_kernel_sm80_cubin_len, + "fused_mha_with_relPosBias_fp16_128_32_kernel_sm80_noloop", 10240, 128, 32, false}, + {DATA_TYPE_FP16, 256, 32, kSM_80, fused_mha_with_relPosBias_fp16_256_32_kernel_sm80_cubin, + fused_mha_with_relPosBias_fp16_256_32_kernel_sm80_cubin_len, + "fused_mha_with_relPosBias_fp16_256_32_kernel_sm80", 18432, 128, 0, false}, + {DATA_TYPE_FP16, 256, 32, kSM_80, fused_mha_with_relPosBias_fp16_256_32_kernel_sm80_cubin, + fused_mha_with_relPosBias_fp16_256_32_kernel_sm80_cubin_len, + "fused_mha_with_relPosBias_fp16_256_32_kernel_sm80_noloop", 18432, 128, 32, false}, {DATA_TYPE_FP16, 64, 64, kSM_80, fused_multihead_attention_v2_fp16_64_64_kernel_sm80_cubin, fused_multihead_attention_v2_fp16_64_64_kernel_sm80_cubin_len, "fused_multihead_attention_v2_fp16_64_64_kernel_sm80", 32768, 128, 0, false}, @@ -364,6 +438,12 @@ static const struct FusedMultiHeadAttentionKernelMetaInfoV2 {DATA_TYPE_FP16, 384, 64, kSM_80, fused_multihead_attention_v2_fp16_384_64_kernel_sm80_cubin, fused_multihead_attention_v2_fp16_384_64_kernel_sm80_cubin_len, "fused_multihead_attention_v2_fp16_384_64_kernel_sm80", 114688, 256, 0, false}, + {DATA_TYPE_INT8, 64, 32, kSM_80, fused_mha_with_relPosBias_int8_64_32_kernel_sm80_cubin, + fused_mha_with_relPosBias_int8_64_32_kernel_sm80_cubin_len, + "fused_mha_with_relPosBias_int8_64_32_kernel_sm80", 10240, 128, 0, false}, + {DATA_TYPE_INT8, 256, 32, kSM_80, fused_mha_with_relPosBias_int8_256_32_kernel_sm80_cubin, + fused_mha_with_relPosBias_int8_256_32_kernel_sm80_cubin_len, + "fused_mha_with_relPosBias_int8_256_32_kernel_sm80", 10240, 128, 0, false}, {DATA_TYPE_INT8, 64, 64, kSM_80, fused_multihead_attention_v2_int8_64_64_kernel_sm80_cubin, fused_multihead_attention_v2_int8_64_64_kernel_sm80_cubin_len, "fused_multihead_attention_v2_int8_64_64_kernel_sm80", 24576, 128, 0, false}, @@ -418,6 +498,24 @@ static const struct FusedMultiHeadAttentionKernelMetaInfoV2 // GA10x // Note: For GA10X keep only kernels whose sharedMemBytes < 100KiB + {DATA_TYPE_FP16, 64, 32, kSM_86, fused_mha_with_relPosBias_fp16_64_32_kernel_sm86_cubin, + fused_mha_with_relPosBias_fp16_64_32_kernel_sm86_cubin_len, + "fused_mha_with_relPosBias_fp16_64_32_kernel_sm86", 12288, 128, 0, false}, + {DATA_TYPE_FP16, 64, 32, kSM_86, fused_mha_with_relPosBias_fp16_64_32_kernel_sm86_cubin, + fused_mha_with_relPosBias_fp16_64_32_kernel_sm86_cubin_len, + "fused_mha_with_relPosBias_fp16_64_32_kernel_sm86_noloop", 10240, 128, 32, false}, + {DATA_TYPE_FP16, 128, 32, kSM_86, fused_mha_with_relPosBias_fp16_128_32_kernel_sm86_cubin, + fused_mha_with_relPosBias_fp16_128_32_kernel_sm86_cubin_len, + "fused_mha_with_relPosBias_fp16_128_32_kernel_sm86", 16384, 128, 0, false}, + {DATA_TYPE_FP16, 128, 32, kSM_86, fused_mha_with_relPosBias_fp16_128_32_kernel_sm86_cubin, + fused_mha_with_relPosBias_fp16_128_32_kernel_sm86_cubin_len, + "fused_mha_with_relPosBias_fp16_128_32_kernel_sm86_noloop", 10240, 128, 32, false}, + {DATA_TYPE_FP16, 256, 32, kSM_86, fused_mha_with_relPosBias_fp16_256_32_kernel_sm86_cubin, + fused_mha_with_relPosBias_fp16_256_32_kernel_sm86_cubin_len, + "fused_mha_with_relPosBias_fp16_256_32_kernel_sm86", 18432, 128, 0, false}, + {DATA_TYPE_FP16, 256, 32, kSM_86, fused_mha_with_relPosBias_fp16_256_32_kernel_sm86_cubin, + fused_mha_with_relPosBias_fp16_256_32_kernel_sm86_cubin_len, + "fused_mha_with_relPosBias_fp16_256_32_kernel_sm86_noloop", 18432, 128, 32, false}, {DATA_TYPE_FP16, 64, 64, kSM_86, fused_multihead_attention_v2_fp16_64_64_kernel_sm86_cubin, fused_multihead_attention_v2_fp16_64_64_kernel_sm86_cubin_len, "fused_multihead_attention_v2_fp16_64_64_kernel_sm80", 32768, 128, 0, false}, @@ -506,20 +604,20 @@ class FusedMultiHeadAttentionXMMAKernelV2 { } - inline uint64_t hashID(unsigned int s, bool interleaved, bool unroll) const + inline uint64_t hashID(unsigned int s, unsigned int d, bool interleaved, bool unroll) const { - return (uint64_t) s << 32 | (interleaved ? 2ull : 0ull) | (unroll ? 1ull : 0ull); + return (uint64_t) s << 32 | d |(interleaved ? 2ull : 0ull) | (unroll ? 1ull : 0ull); } virtual uint64_t hashID(const KernelMeta& kernelMeta) const { - assert(kernelMeta.mD == 64); - return hashID(kernelMeta.mS, kernelMeta.mInterleaved, kernelMeta.mUnrollStep); + assert(kernelMeta.mD == 64 || kernelMeta.mD == 32); + return hashID(kernelMeta.mS, kernelMeta.mD, kernelMeta.mInterleaved, kernelMeta.mUnrollStep); } virtual void run(Fused_multihead_attention_params_v2& params, cudaStream_t ss) const { - assert(params.d == 64); + assert(params.d == 64 || params.d == 32); if (params.interleaved) { assert(mDataType == fastertransformer::DATA_TYPE_INT8); @@ -533,35 +631,36 @@ class FusedMultiHeadAttentionXMMAKernelV2 unsigned int mSM; Data_type mDataType; int mS; + int mD; int mMaxBatch; } unrollList[] - = { {kSM_75, fastertransformer::DATA_TYPE_FP16, 256, 1}, - {kSM_75, fastertransformer::DATA_TYPE_FP16, 384, 1}, - {kSM_75, fastertransformer::DATA_TYPE_INT8, 128, 1}, - {kSM_75, fastertransformer::DATA_TYPE_INT8, 192, 2}, - {kSM_75, fastertransformer::DATA_TYPE_INT8, 256, 1}, - {kSM_75, fastertransformer::DATA_TYPE_INT8, 384, 1}, + = { {kSM_75, fastertransformer::DATA_TYPE_FP16, 256, 64, 1}, + {kSM_75, fastertransformer::DATA_TYPE_FP16, 384, 64, 1}, + {kSM_75, fastertransformer::DATA_TYPE_INT8, 128, 64, 1}, + {kSM_75, fastertransformer::DATA_TYPE_INT8, 192, 64, 2}, + {kSM_75, fastertransformer::DATA_TYPE_INT8, 256, 64, 1}, + {kSM_75, fastertransformer::DATA_TYPE_INT8, 384, 64, 1}, #if CUDA_VERSION >= 11000 - {kSM_80, fastertransformer::DATA_TYPE_FP16, 128, 4}, - {kSM_80, fastertransformer::DATA_TYPE_FP16, 256, 4}, - {kSM_80, fastertransformer::DATA_TYPE_FP16, 384, 4}, - {kSM_80, fastertransformer::DATA_TYPE_INT8, 128, 4}, - {kSM_80, fastertransformer::DATA_TYPE_INT8, 192, 16}, - {kSM_80, fastertransformer::DATA_TYPE_INT8, 256, 8}, - {kSM_80, fastertransformer::DATA_TYPE_INT8, 384, 8}, - - {kSM_86, fastertransformer::DATA_TYPE_FP16, 128, 4}, - {kSM_86, fastertransformer::DATA_TYPE_FP16, 256, 4}, - {kSM_86, fastertransformer::DATA_TYPE_INT8, 128, 4}, - {kSM_86, fastertransformer::DATA_TYPE_INT8, 192, 16}, - {kSM_86, fastertransformer::DATA_TYPE_INT8, 256, 8}, - {kSM_86, fastertransformer::DATA_TYPE_INT8, 384, 8}, + {kSM_80, fastertransformer::DATA_TYPE_FP16, 128, 64, 4}, + {kSM_80, fastertransformer::DATA_TYPE_FP16, 256, 64, 4}, + {kSM_80, fastertransformer::DATA_TYPE_FP16, 384, 64, 4}, + {kSM_80, fastertransformer::DATA_TYPE_INT8, 128, 64, 4}, + {kSM_80, fastertransformer::DATA_TYPE_INT8, 192, 64, 16}, + {kSM_80, fastertransformer::DATA_TYPE_INT8, 256, 64, 8}, + {kSM_80, fastertransformer::DATA_TYPE_INT8, 384, 64, 8}, + + {kSM_86, fastertransformer::DATA_TYPE_FP16, 128, 64, 4}, + {kSM_86, fastertransformer::DATA_TYPE_FP16, 256, 64, 4}, + {kSM_86, fastertransformer::DATA_TYPE_INT8, 128, 64, 4}, + {kSM_86, fastertransformer::DATA_TYPE_INT8, 192, 64, 16}, + {kSM_86, fastertransformer::DATA_TYPE_INT8, 256, 64, 8}, + {kSM_86, fastertransformer::DATA_TYPE_INT8, 384, 64, 8}, #endif }; for (unsigned int i = 0u; i < sizeof(unrollList) / sizeof(unrollList[0]); ++i) { if (mSM == unrollList[i].mSM && mDataType == unrollList[i].mDataType && params.s == unrollList[i].mS - && params.b <= unrollList[i].mMaxBatch) + &¶ms.d == unrollList[i].mD && params.b <= unrollList[i].mMaxBatch) { forceUnroll = true; break; @@ -569,7 +668,7 @@ class FusedMultiHeadAttentionXMMAKernelV2 } } - const auto findIter = mFunctions.find(hashID(params.s, params.interleaved, forceUnroll)); + const auto findIter = mFunctions.find(hashID(params.s, params.d, params.interleaved, forceUnroll)); // ASSERT(findIter != mFunctions.end()); const auto& kernelMeta = mKernelMeta[findIter->second.mMetaInfoIndex]; diff --git a/3rdparty/trt_fused_multihead_attention/qkvToContext.cu b/3rdparty/trt_fused_multihead_attention/qkvToContext.cu index b0a90067d..6b5c448f4 100644 --- a/3rdparty/trt_fused_multihead_attention/qkvToContext.cu +++ b/3rdparty/trt_fused_multihead_attention/qkvToContext.cu @@ -147,6 +147,56 @@ public: params.o_stride_in_bytes = interface->mNumHeads * interface->mHeadSize * sizeof(half); } + void setup(const int S, const int B, const int window_num) + { + // TODO these implementation details might be better centralized into the XMMA code, since they are needed in + // several places (also outside of this plugin) + size_t warps_m = 2, warps_n = 2, warps_k = 1; + if (S == 64 || S == 128) { + warps_m = 2; + warps_n = 2; + } + else if (S == 256) { + warps_m = 1; + warps_n = 4; + } + else if (S == 384) { + warps_m = 1; + warps_n = 8; + } + else { + assert(false && "Unsupporte seqlen"); + } + // The number of threads per CTA. + threads_per_cta = warps_m * warps_n * warps_k * 32; + // The number of xmmas in the M dimension. We use one uint32_t per XMMA in the M dimension. + xmmas_m = (S + 16 * warps_m - 1) / (16 * warps_m); + // The number of xmmas in the N dimension. + xmmas_n = (S + 16 * warps_n - 1) / (16 * warps_n); + + const float scale_bmm1 = interface->mRsqrtHeadSize; + const float scale_softmax = 1.f; // Seems to be only required for int8 + const float scale_bmm2 = 1.f; + + Data_type scale_type = DATA_TYPE_FP16; + set_alpha(params.scale_bmm1, scale_bmm1, scale_type); + set_alpha(params.scale_softmax, scale_softmax, scale_type); + set_alpha(params.scale_bmm2, scale_bmm2, scale_type); + + params.b = B; + params.h = interface->mNumHeads; + params.s = S; + params.d = interface->mHeadSize; + params.window_num = window_num; + + // mLdQKV = 3 * B * mNumHeads * mHeadSize; + // mLdOut = B * mNumHeads * mHeadSize; + + params.qkv_stride_in_bytes = 3 * interface->mNumHeads * interface->mHeadSize * sizeof(half); + params.packed_mask_stride_in_bytes = S * sizeof(half); + params.o_stride_in_bytes = interface->mNumHeads * interface->mHeadSize * sizeof(half); + } + void run(const void* qkvPtr, const void* maskPtr, const void* cuSeqlenPtr, void* output, void* workspace, cudaStream_t stream) { params.qkv_ptr = const_cast(qkvPtr); @@ -160,6 +210,29 @@ public: check_cuda_error(cudaPeekAtLastError()); } + void run(const void* qkvPtr, + const void* maskPtr, + const void* relative_position_bias, + const int actual_seqlen, + void* output, + void* workspace, + cudaStream_t stream) + { + params.qkv_ptr = const_cast(qkvPtr); + + params.packed_mask_ptr = const_cast(maskPtr); + + params.packed_relative_position_bias_ptr = const_cast(relative_position_bias); + + params.o_ptr = output; + + params.actual_seqlen = actual_seqlen; + + params.cu_seqlens = nullptr; + xmmaKernel->run(params, stream); + check_cuda_error(cudaPeekAtLastError()); + } + bool isValid(int s) const { return xmmaKernel->isValid(s); @@ -218,6 +291,12 @@ void FusedMHARunnerFP16v2::setup(const int S, const int B) pimpl->setup(S, B); } +void FusedMHARunnerFP16v2::setup(const int S, const int B, const int window_num) +{ + MHARunner::setup(S, B, window_num); + pimpl->setup(S, B, window_num); +} + size_t FusedMHARunnerFP16v2::getWorkspaceSize() const { return 0; @@ -233,6 +312,17 @@ void FusedMHARunnerFP16v2::run(const void* input, const void* mask, const void* pimpl->run(input, mask, seqlen, output, workspace, stream); } +void FusedMHARunnerFP16v2::run(const void* input, + const void* mask, + const void* relatice_position_bias, + const int actual_seqlen, + void* workspace, + void* output, + cudaStream_t stream) +{ + pimpl->run(input, mask, relatice_position_bias, actual_seqlen, output, workspace, stream); +} + bool FusedMHARunnerFP16v2::isValid(int s) const { return pimpl->isValid(s); @@ -273,6 +363,87 @@ public: return interface->mB * xmmas_m * threads_per_cta * sizeof(uint32_t); } + void setup(const int S, const int B, const int window_num) + { + size_t warps_m, warps_n, warps_k = 1; + if (S == 64) { + warps_m = 2; + warps_n = 2; + } + else if (S == 128) { + warps_m = 2; + warps_n = 2; + } + else if (S == 256) { + warps_m = 1; + warps_n = 4; + } + else if (S == 384) { + warps_m = 1; + warps_n = 8; + } + else { + assert(false && "Unsupported seqlen."); + } + // The number of threads per CTA. + threads_per_cta = warps_m * warps_n * warps_k * 32; + // The number of xmmas in the M dimension. We use one uint32_t per XMMA in the M dimension. + xmmas_m = (S + 16 * warps_m - 1) / (16 * warps_m); + // The number of xmmas in the N dimension. + xmmas_n = (S + 16 * warps_n - 1) / (16 * warps_n); + + params.b = B; + params.h = interface->mNumHeads; + params.s = S; + params.d = interface->mHeadSize; + params.window_num = window_num; + params.use_int8_scale_max = true; + params.packed_mask_stride_in_bytes = S * sizeof(half); + params.qkv_stride_in_bytes = 3 * interface->mNumHeads * interface->mHeadSize * sizeof(int8_t); + params.o_stride_in_bytes = interface->mNumHeads * interface->mHeadSize * sizeof(int8_t); + + float scaleQkv = interface->mScaleQkv; + float scaleCtx = interface->mScaleCtx; + + // float scaleBmm1 = scaleQkv * scaleQkv;// * (1.f / sqrtf(interface->mHeadSize)); + // float scaleBmm2 = interface->mDqProbs * scaleQkv / scaleCtx; + // float scaleSoftmax = 1.f / interface->mDqProbs; + //TODO: unify 3 scales + float scaleBmm1 = scaleQkv * (1.f / sqrtf(interface->mHeadSize)); + float scaleBmm2 = scaleCtx; + float scaleSoftmax = interface->mDqProbs; + + params.scale_bmm1 = reinterpret_cast(scaleBmm1); + params.scale_bmm2 = reinterpret_cast(scaleBmm2); + params.scale_softmax = reinterpret_cast(scaleSoftmax); + + params.enable_i2f_trick = + -double(1 << 22) * double(scaleBmm2) <= -128.f && double(1 << 22) * double(scaleBmm2) >= 127.f; + } + + void run(const void* qkvPtr, + const void* maskPtr, + const void* relativePositionBiasPtr, + int actual_seqlen, + void* output, + void* workspace, + cudaStream_t stream) + { + params.qkv_ptr = const_cast(qkvPtr); + + params.packed_mask_ptr = const_cast(maskPtr); + + params.packed_relative_position_bias_ptr = const_cast(relativePositionBiasPtr); + + params.actual_seqlen = actual_seqlen; + + params.o_ptr = output; + + params.cu_seqlens = nullptr; + + xmmaKernel->run(params, stream); + } + void setup(const int S, const int B) { size_t warps_m, warps_n, warps_k = 1; @@ -430,6 +601,11 @@ void FusedMHARunnerInt8v2::setScaleList(const float scaleQkv, const float dqProb mScaleCtx = scaleCtx; } +void FusedMHARunnerInt8v2::setup(const int S, const int B, const int window_num) +{ + pimpl->setup(S, B, window_num); +} + void FusedMHARunnerInt8v2::setup(const int S, const int B) { pimpl->setup(S, B); @@ -445,6 +621,18 @@ void FusedMHARunnerInt8v2::run(const void* input, const void* mask, void* worksp assert(false && "Not implemented"); } +void FusedMHARunnerInt8v2::run(const void* input, + const void* mask, + const void* relatice_position_bias, + int actual_seqlen, + void* workspace, + void* output, + cudaStream_t stream) +{ + pimpl->run(input, mask, relatice_position_bias, actual_seqlen, output, workspace, stream); +} + + void FusedMHARunnerInt8v2::run(const void* input, const void* mask, const void* seqlen, void* workspace, void* output, cudaStream_t stream) { pimpl->run(input, mask, seqlen, output, workspace, stream); diff --git a/3rdparty/trt_fused_multihead_attention/qkvToContext.h b/3rdparty/trt_fused_multihead_attention/qkvToContext.h index ef325fe1b..f5d2ff2b3 100644 --- a/3rdparty/trt_fused_multihead_attention/qkvToContext.h +++ b/3rdparty/trt_fused_multihead_attention/qkvToContext.h @@ -68,8 +68,14 @@ class MHARunner mNumMats = B * mNumHeads; } + virtual void setup(const int S, const int B, const int window_num) + { + setup(S, B); + } + virtual void run(const void* input, const void* mask, void* workspace, void* output, cudaStream_t stream) = 0; virtual void run(const void* input, const void* mask, const void* seqlen, void* workspace, void* output, cudaStream_t stream) = 0; + virtual void run(const void* input, const void* mask, const void* relatice_position_bias, const int actual_seqlen, void* workspace, void* output, cudaStream_t stream) = 0; virtual void setScaleList(const float scaleQkv, const float dqProbs, const float scaleCtx) = 0; @@ -102,9 +108,11 @@ class FusedMHARunnerFP16v2 : public MHARunner ~FusedMHARunnerFP16v2() = default; // for pimpl virtual void setup(const int S, const int B) override; + virtual void setup(const int S, const int B, const int window_num) override; void run(const void* input, const void* mask, void* workspace, void* output, cudaStream_t stream); void run(const void* input, const void* mask, const void* seqlen, void* workspace, void* output, cudaStream_t stream) override; + void run(const void* input, const void* mask, const void* relatice_position_bias, const int actual_seqlen, void* workspace, void* output, cudaStream_t stream) override; void setScaleList(const float scaleQkv, const float dqProbs, const float scaleCtx) override; @@ -129,9 +137,11 @@ class FusedMHARunnerInt8v2 : public MHARunner void setScaleList(const float scaleQkv, const float dqProbs, const float scaleCtx); virtual void setup(const int S, const int B) override; + virtual void setup(const int S, const int B, const int window_num) override; void run(const void* input, const void* mask, void* workspace, void* output, cudaStream_t stream); void run(const void* input, const void* mask, const void* seqlen, void* workspace, void* output, cudaStream_t stream) override; + void run(const void* input, const void* mask, const void* relatice_position_bias, const int actual_seqlen, void* workspace, void* output, cudaStream_t stream) override; size_t getWorkspaceSize() const override; diff --git a/CMakeLists.txt b/CMakeLists.txt index 24a315a88..ea210143e 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -14,19 +14,28 @@ cmake_minimum_required(VERSION 3.8 FATAL_ERROR) # for PyTorch extensions, version should be greater than 3.13 project(FasterTransformer LANGUAGES CXX CUDA) -find_package(CUDA 10.1 REQUIRED) +find_package(CUDA 10.2 REQUIRED) + +if(${CUDA_VERSION_MAJOR} VERSION_GREATER_EQUAL "11") + add_definitions("-DENABLE_BF16") + message("CUDA_VERSION ${CUDA_VERSION_MAJOR} is greater or equal than 11, enable -DENABLE_BF16 flag") +endif() option(BUILD_TF "Build in TensorFlow mode" OFF) option(BUILD_PYT "Build in PyTorch TorchScript class mode" OFF) -if(NOT BUILD_GPT) - option(BUILD_GPT "Build project with gpt" OFF) +option(BUILD_TRT "Build projects about TensorRT" OFF) +if(NOT BUILD_MULTI_GPU) + option(BUILD_MULTI_GPU "Build project about multi-GPU" OFF) +endif() +if(NOT USE_TRITONSERVER_DATATYPE) + option(USE_TRITONSERVER_DATATYPE "Build triton backend for triton server" OFF) endif() option(SPARSITY_SUPPORT "Build project with Ampere sparsity feature support" OFF) -if(BUILD_GPT) - message(STATUS "Add DBUILD_GPT, requires MPI and NCCL") - add_definitions("-DBUILD_GPT") +if(BUILD_MULTI_GPU) + message(STATUS "Add DBUILD_MULTI_GPU, requires MPI and NCCL") + add_definitions("-DBUILD_MULTI_GPU") set(CMAKE_MODULE_PATH ${PROJECT_SOURCE_DIR}/cmake/Modules) find_package(MPI REQUIRED) find_package(NCCL REQUIRED) @@ -47,12 +56,13 @@ if(BUILD_PYT) endif() endif() -if(BUILD_PYT OR BUILD_GPT) - set(CXX_STD "14" CACHE STRING "C++ standard") -else() - set(CXX_STD "11" CACHE STRING "C++ standard") +if(USE_TRITONSERVER_DATATYPE) + message("-- USE_TRITONSERVER_DATATYPE") + add_definitions("-DUSE_TRITONSERVER_DATATYPE") endif() +set(CXX_STD "14" CACHE STRING "C++ standard") + set(CUDA_PATH ${CUDA_TOOLKIT_ROOT_DIR}) set(TF_PATH "" CACHE STRING "TensorFlow path") @@ -64,11 +74,6 @@ endif() list(APPEND CMAKE_MODULE_PATH ${CUDA_PATH}/lib64) -if (${CUDA_VERSION} GREATER_EQUAL 11.0) - message(STATUS "Add DCUDA11_MODE") - add_definitions("-DCUDA11_MODE") -endif() - # profiling option(USE_NVTX "Whether or not to use nvtx" OFF) if(USE_NVTX) @@ -161,6 +166,7 @@ set(COMMON_HEADER_DIRS ${PROJECT_SOURCE_DIR} ${CUDA_PATH}/include ) +message("-- COMMON_HEADER_DIRS: ${COMMON_HEADER_DIRS}") set(COMMON_LIB_DIRS ${CUDA_PATH}/lib64 @@ -207,6 +213,10 @@ endif() list(APPEND COMMON_HEADER_DIRS ${MPI_INCLUDE_PATH}) +if(USE_TRITONSERVER_DATATYPE) + list(APPEND COMMON_HEADER_DIRS ${PROJECT_SOURCE_DIR}/../repo-core-src/include) +endif() + include_directories( ${COMMON_HEADER_DIRS} ) @@ -221,10 +231,11 @@ link_directories( add_subdirectory(3rdparty) add_subdirectory(src) add_subdirectory(examples) +add_subdirectory(tests) ######################################## -if(BUILD_GPT) +if(BUILD_MULTI_GPU) # Following feature requires cmake 3.15 # TODO Remove this part or modify such that we can run it under cmake 3.10 cmake_minimum_required(VERSION 3.15 FATAL_ERROR) @@ -234,6 +245,7 @@ add_library(transformer-static STATIC $ $ $ + $ $ $ $ @@ -268,6 +280,8 @@ add_library(transformer-static STATIC $ $ $ + $ + $ $ $ $ @@ -285,6 +299,7 @@ add_library(transformer-static STATIC $ $ $ + $ $ $ $ @@ -293,7 +308,8 @@ add_library(transformer-static STATIC $ $ $ - $) + $ + $) set_property(TARGET transformer-static PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET transformer-static PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) target_link_libraries(transformer-static PUBLIC -lcudart -lnccl -lmpi -lcublas -lcublasLt -lcurand) @@ -304,6 +320,7 @@ add_library(transformer-shared SHARED $ $ $ + $ $ $ $ @@ -338,6 +355,8 @@ add_library(transformer-shared SHARED $ $ $ + $ + $ $ $ $ @@ -355,6 +374,9 @@ add_library(transformer-shared SHARED $ $ $ + $ + $ + $ $ $ $ @@ -363,7 +385,8 @@ add_library(transformer-shared SHARED $ $ $ - $) + $ + $) set_target_properties(transformer-shared PROPERTIES POSITION_INDEPENDENT_CODE ON) set_target_properties(transformer-shared PROPERTIES CUDA_RESOLVE_DEVICE_SYMBOLS ON) set_target_properties(transformer-shared PROPERTIES LINKER_LANGUAGE CXX) @@ -427,4 +450,4 @@ export( export(PACKAGE FasterTransformer) -endif() # BUILD_GPT +endif() # BUILD_MULTI_GPU diff --git a/README.md b/README.md index 2b460f642..a60983c92 100644 --- a/README.md +++ b/README.md @@ -24,26 +24,35 @@ This repository provides a script and recipe to run the highly optimized transfo ## Model overview -In NLP, encoder and decoder are two important components, with the transformer layer becoming a popular architecture for both components. FasterTransformer implements a highly optimized transformer layer for both the encoder and decoder for inference. On Volta, Turing and Ampere GPUs, the computing power of Tensor Cores are used automatically when the precision of the data and weights are FP16. +In NLP, encoder and decoder are two important components, with the transformer layer becoming a popular architecture for both components. FasterTransformer implements a highly optimized transformer layer for both the encoder and decoder for inference. On Volta, Turing and Ampere GPUs, the computing power of Tensor Cores are used automatically when the precision of the data and weights are FP16. FasterTransformer is built on top of CUDA, cuBLAS, cuBLASLt and C++. We provide at least one API of the following frameworks: TensorFlow, PyTorch and Triton backend. Users can integrate FasterTransformer into these frameworks directly. For supporting frameworks, we also provide example codes to demonstrate how to use, and show the performance on these frameworks. ### Support matrix -| Models | Framework | FP16 | INT8 (after Turing) | Sparsity (after Ampere) | Tensor parallel | Pipeline parallel | -| ---------- | -------------- | ---- | ------------------- | ----------------------- | --------------- | ----------------- | -| BERT | TensorFlow | Yes | Yes | - | - | - | -| BERT | PyTorch | Yes | Yes | Yes | - | - | -| Encoder | TensorFlow | Yes | Yes | - | - | - | -| Encoder | PyTorch | Yes | Yes | Yes | - | - | -| Decoder | TensorFlow | Yes | - | - | - | - | -| Decoder | PyTorch | Yes | - | - | - | - | -| Decoding | TensorFlow | Yes | - | - | - | - | -| Decoding | PyTorch | Yes | - | - | - | - | -| GPT | TensorFlow | Yes | - | - | - | - | -| GPT | PyTorch | Yes | - | - | Yes | Yes | -| GPT | Triton backend | Yes | - | - | Yes | Yes | -| Longformer | PyTorch | Yes | - | - | - | - | +| Models | Framework | FP16 | INT8 (after Turing) | Sparsity (after Ampere) | Tensor parallel | Pipeline parallel | +| ---------------- | -------------- | ---- | ------------------- | ----------------------- | --------------- | ----------------- | +| BERT | TensorFlow | Yes | Yes | - | - | - | +| BERT | PyTorch | Yes | Yes | Yes | - | - | +| XLNet | C++ | Yes | - | - | - | - | +| Encoder | TensorFlow | Yes | Yes | - | - | - | +| Encoder | PyTorch | Yes | Yes | Yes | - | - | +| Decoder | TensorFlow | Yes | - | - | - | - | +| Decoder | PyTorch | Yes | - | - | - | - | +| Decoding | TensorFlow | Yes | - | - | - | - | +| Decoding | PyTorch | Yes | - | - | - | - | +| GPT | TensorFlow | Yes | - | - | - | - | +| GPT | PyTorch | Yes | - | - | Yes | Yes | +| GPT | Triton backend | Yes | - | - | Yes | Yes | +| GPT-J | Triton backend | Yes | - | - | Yes | Yes | +| Longformer | PyTorch | Yes | - | - | - | - | +| T5 | PyTorch | Yes | - | - | Yes | Yes | +| T5 | Triton backend | Yes | - | - | Yes | Yes | +| T5 | TensorRT | Yes | - | - | Yes | Yes | +| Swin Transformer | PyTorch | Yes | Yes | - | - | - | +| Swin Transformer | TensorRT | Yes | Yes | - | - | - | +| ViT | PyTorch | Yes | Yes | - | - | - | +| ViT | TensorRT | Yes | Yes | - | - | - | * Note that the FasterTransformer supports the models above on C++ because all source codes are built on C++. @@ -51,13 +60,14 @@ More details of specific models are put in `xxx_guide.md` of [`docs/`](docs), wh ## Advanced -The following code lists the directory structure of FasterTransformer: +The following code lists the directory structure of FasterTransformer: ```bash /src/fastertransformer: source code of FasterTransformer |--/models: Implementation of different models, like BERT, GPT. |--/layers: Implementation of layer modeuls, like attention layer, ffn layer. |--/kernels: CUDA kernels for different models/layers and operations, like addBiasResiual. + |--/tensorrt_plugin: encapluate FasterTransformer into TensorRT plugin. |--/tf_op: custom Tensorflow OP implementation |--/th_op: custom PyTorch OP implementation |--/triton_backend: custom triton backend implementation @@ -66,6 +76,7 @@ The following code lists the directory structure of FasterTransformer: |--/cpp: C++ interface examples |--/pytorch: PyTorch OP examples |--/tensorflow: TensorFlow OP examples + |--tensorrt: TensorRT examples /docs: Documents to explain the details of implementation of different models, and show the benchmark /benchmark: Contains the scripts to run the benchmarks of different models /tests: Unit tests @@ -74,7 +85,7 @@ The following code lists the directory structure of FasterTransformer: Note that many folders contains many sub-folders to split different models. Quantization tools are move to `examples`, like `examples/tensorflow/bert/bert-quantization/` and `examples/pytorch/bert/bert-quantization-sparsity/`. -## Performance +## Performance Hardware settings: @@ -111,7 +122,7 @@ For large batch size and sequence length, both EFF-FT and FT-INT8-v2 bring about The following figure compares the performances of different features of FasterTransformer and TensorFlow XLA under FP16 on T4. -For small batch size and sequence length, using FasterTransformer can bring about 3x speedup. +For small batch size and sequence length, using FasterTransformer can bring about 3x speedup. For large batch size and sequence length, using Effective FasterTransformer with INT8-v2 quantization can bring about 5x speedup. @@ -131,12 +142,12 @@ For large batch size and sequence length, using Effective FasterTransformer with The results of TensorFlow were obtained by running the `benchmarks/decoding/tf_decoding_beamsearch_benchmark.sh` and `benchmarks/decoding/tf_decoding_sampling_benchmark.sh` -The results of PyTorch were obtained by running the `benchmarks/decoding/pyt_decoding_beamsearch_benchmark.sh`. +The results of PyTorch were obtained by running the `benchmarks/decoding/pyt_decoding_beamsearch_benchmark.sh`. In the experiments of decoding, we updated the following parameters: * head_num = 8 -* size_per_head = 64 +* size_per_head = 64 * num_layers = 6 for both encoder and decoder * vocabulary_size = 32001 for TensorFlow sample codes, 31538 for PyTorch sample codes * memory_hidden_dim = 512 @@ -178,10 +189,37 @@ In the experiments of decoding, we updated the following parameters: ### Changelog +April 2022 +- Change the default accumulation type of all gemm to FP32. +- Support bfloat16 inference in GPT model. +- Support Nemo Megatron T5 and Megatron-LM T5 model. +- Support ViT. + +March 2022 +- Support `stop_ids` and `ban_bad_ids` in GPT-J. +- Support dynamice `start_id` and `end_id` in GPT-J, GPT, T5 and Decoding. + +Febuary 2022 +- Support Swin Transformer. +- Optimize the k/v cache update of beam search by in-direction buffer. +- Support runtime input for GPT-J, T5 and GPT. +- Support soft prompt in GPT and GPT-J. +- Support custom all reduce kernel. + - Limitation: + 1. Only support tensor parallel size = 8 on DGX-A100. + 2. Only support CUDA with cudaMallocAsync. + +December 2021 +- Add TensorRT plugin of T5 model. +- Change some hyper-parameters of GPT model to runtime query. +- Optimize the memory allocator under C++ code. +- Fix bug of CUB including when using CUDA 11.5 or newer version. + November 2021 +- **Update the FasterTransformer 5.0 beta** - Add GPT-3 INT8 weight only qauntization for batch size <= 2. - Support multi-node multi-gpu support on T5. -- Enhance the multi-node multi-gpu supporting in GPT-3. +- Enhance the multi-node multi-gpu supporting in GPT-3. August 2021 - **Release the FasterTransformer 5.0 beta** @@ -228,7 +266,7 @@ Nov 2020 - Support PyTorch INT8 inference. - Provide PyTorch INT8 quantiztion tools. - Integrate the fused multi-head attention kernel of TensorRT into FasterTransformer. -- Add unit test of SQuAD. +- Add unit test of SQuAD. - Update the missed NGC checkpoints. Sep 2020 @@ -249,7 +287,7 @@ June 2020 May 2020 - Fix the bug that seq_len of encoder must be larger than 3. -- Add the position_encoding of decoding as the input of FasterTransformer decoding. This is convenient to use different types of position encoding. FasterTransformer does not compute the position encoding value, but only lookup the table. +- Add the position_encoding of decoding as the input of FasterTransformer decoding. This is convenient to use different types of position encoding. FasterTransformer does not compute the position encoding value, but only lookup the table. - Modifying the method of loading model in `translate_sample.py`. April 2020 @@ -262,9 +300,9 @@ April 2020 - Merge `bert_transformer_op.h`, `bert_transformer_op.cu.cc` into `bert_transformer_op.cc` - Merge `decoder.h`, `decoder.cu.cc` into `decoder.cc` - Merge `decoding_beamsearch.h`, `decoding_beamsearch.cu.cc` into `decoding_beamsearch.cc` -- Fix the bugs of finalize function decoding.py. +- Fix the bugs of finalize function decoding.py. - Fix the bug of tf DiverseSiblingSearch. -- Add BLEU scorer `bleu_score.py` into `utils`. Note that the BLEU score requires python3. +- Add BLEU scorer `bleu_score.py` into `utils`. Note that the BLEU score requires python3. - Fuse QKV Gemm of encoder and masked_multi_head_attention of decoder. - Add dynamic batch size and dynamic sequence length features into all ops. @@ -273,25 +311,25 @@ March 2020 - Add `translate_sample.py` to demonstrate how to translate a sentence by restoring the pretrained model of OpenNMT-tf. - Fix bugs of Fastertransformer 2.0 - Fix the bug of maximum sequence length of decoder cannot be larger than 128. - - Fix the bug that decoding does not check finish or not after each step. + - Fix the bug that decoding does not check finish or not after each step. - Fix the bug of decoder about max_seq_len. - - Modify the decoding model structure to fit the OpenNMT-tf decoding model. + - Modify the decoding model structure to fit the OpenNMT-tf decoding model. - Add a layer normalization layer after decoder. - Add a normalization for inputs of decoder Febuary 2020 - **Release the FasterTransformer 2.0** - - Provide a highly optimized OpenNMT-tf based decoder and decoding, including C++ API and TensorFlow op. + - Provide a highly optimized OpenNMT-tf based decoder and decoding, including C++ API and TensorFlow op. - Refine the sample codes of encoder. - Add dynamic batch size feature into encoder op. July 2019 - **Release the FasterTransformer 1.0** - - Provide a highly optimized bert equivalent transformer layer, including C++ API, TensorFlow op and TensorRT plugin. + - Provide a highly optimized bert equivalent transformer layer, including C++ API, TensorFlow op and TensorRT plugin. ### Known issues - Undefined symbol errors when import the extension - Please `import torch` first. If this has been done, it is due to the incompatible C++ ABI. You may need to check the PyTorch used during compilation and execution are the same, or you need to check how your PyTorch is compiled, or the version of your GCC, etc. -- Results of TensorFlow and OP would be different in decoding. This problem is caused by the accumulated log probability, and we do not avoid this problem. -- If encounter some problem in the custom environment, try to use the gcc/g++ 4.8 to build the project of TensorFlow op, especially for TensorFlow 1.14. +- Results of TensorFlow and OP would be different in decoding. This problem is caused by the accumulated log probability, and we do not avoid this problem. +- If encounter some problem in the custom environment, try to use the gcc/g++ 4.8 to build the project of TensorFlow op, especially for TensorFlow 1.14. diff --git a/benchmarks/bert/pyt_benchmark.sh b/benchmarks/bert/pyt_benchmark.sh index b7ad1b49b..a8c866828 100644 --- a/benchmarks/bert/pyt_benchmark.sh +++ b/benchmarks/bert/pyt_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/bert/pyt_int8_benchmark.sh b/benchmarks/bert/pyt_int8_benchmark.sh index c8e0df303..97dede8b8 100644 --- a/benchmarks/bert/pyt_int8_benchmark.sh +++ b/benchmarks/bert/pyt_int8_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/bert/pyt_sp_fp16_benchmark.sh b/benchmarks/bert/pyt_sp_fp16_benchmark.sh index 26bb7e040..8d477724f 100644 --- a/benchmarks/bert/pyt_sp_fp16_benchmark.sh +++ b/benchmarks/bert/pyt_sp_fp16_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/bert/pyt_sp_int8_mode2_benchmark.sh b/benchmarks/bert/pyt_sp_int8_mode2_benchmark.sh index 67f92e8f1..4665180c7 100644 --- a/benchmarks/bert/pyt_sp_int8_mode2_benchmark.sh +++ b/benchmarks/bert/pyt_sp_int8_mode2_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/bert/tf_benchmark.sh b/benchmarks/bert/tf_benchmark.sh index 6f7adea96..608acc94b 100644 --- a/benchmarks/bert/tf_benchmark.sh +++ b/benchmarks/bert/tf_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/bert/tf_int8_benchmark.sh b/benchmarks/bert/tf_int8_benchmark.sh index 75d125f3f..dfc295a2d 100644 --- a/benchmarks/bert/tf_int8_benchmark.sh +++ b/benchmarks/bert/tf_int8_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/decoding/pyt_decoding_beamsearch_benchmark.sh b/benchmarks/decoding/pyt_decoding_beamsearch_benchmark.sh index 206d9008c..74f78bc6e 100644 --- a/benchmarks/decoding/pyt_decoding_beamsearch_benchmark.sh +++ b/benchmarks/decoding/pyt_decoding_beamsearch_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/decoding/tf_decoding_beamsearch_benchmark.sh b/benchmarks/decoding/tf_decoding_beamsearch_benchmark.sh index 957e344c4..592697eb9 100644 --- a/benchmarks/decoding/tf_decoding_beamsearch_benchmark.sh +++ b/benchmarks/decoding/tf_decoding_beamsearch_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/decoding/tf_decoding_sampling_benchmark.sh b/benchmarks/decoding/tf_decoding_sampling_benchmark.sh index b45b78c11..10d46b7de 100644 --- a/benchmarks/decoding/tf_decoding_sampling_benchmark.sh +++ b/benchmarks/decoding/tf_decoding_sampling_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/benchmarks/t5/pyt_benchmark.sh b/benchmarks/t5/pyt_benchmark.sh index efb728ce2..49c2ad016 100644 --- a/benchmarks/t5/pyt_benchmark.sh +++ b/benchmarks/t5/pyt_benchmark.sh @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/cmake/FasterTransformerConfig.cmake.in b/cmake/FasterTransformerConfig.cmake.in index 2ff8e57dd..d91a016f8 100644 --- a/cmake/FasterTransformerConfig.cmake.in +++ b/cmake/FasterTransformerConfig.cmake.in @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions diff --git a/cmake/Modules/FindNCCL.cmake b/cmake/Modules/FindNCCL.cmake index 9b5babe25..4ee6612a9 100644 --- a/cmake/Modules/FindNCCL.cmake +++ b/cmake/Modules/FindNCCL.cmake @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # From PyTorch: # diff --git a/docs/bert_guide.md b/docs/bert_guide.md index 5707727d4..94921ebe8 100644 --- a/docs/bert_guide.md +++ b/docs/bert_guide.md @@ -106,10 +106,10 @@ The following section lists the requirements to use FasterTransformer BERT. ### Requirements - CMake >= 3.8 for Tensorflow, CMake >= 3.13 for PyTorch -- CUDA 10.1 or newer version +- CUDA 11.0 or newer version - Python 3 is recommended because some features are not supported in python 2 -- Tensorflow 1.13 or 1.14 or 1.15 -- PyTorch >= 1.4.0 +- Tensorflow: Verify on 1.15, 1.13 and 1.14 should work. +- PyTorch: Verify on 1.8.0, >= 1.5.0 should work. These components are readily available within the NGC TensorFlow/PyTorch Docker image below. @@ -218,7 +218,7 @@ For those unable to use the NGC container, to set up the required environment or - `sequence_length`=32 - `head_number`=12 - `size_per_head`=64 - - `data_type`=FP32 + - `data_type`=0 (FP32) or 1 (FP16) or 2 (BF16) - `int8_mode`=0 Then the following scripts can generate the best GEMM configuration under such settings and record the configuration into the `gemm_config.in` file. diff --git a/docs/decoder_guide.md b/docs/decoder_guide.md index 93d5db33c..24b778913 100644 --- a/docs/decoder_guide.md +++ b/docs/decoder_guide.md @@ -130,10 +130,10 @@ The following section lists the requirements to use FasterTransformer. ### Requirements - CMake >= 3.8 for Tensorflow, CMake >= 3.13 for PyTorch -- CUDA 10.1 or newer version +- CUDA 11.0 or newer version - Python 3 is recommended because some features are not supported in python 2 -- Tensorflow 1.13 or 1.14 or 1.15 -- PyTorch >= 1.4.0 +- Tensorflow: Verify on 1.15, 1.13 and 1.14 should work. +- PyTorch: Verify on 1.8.0, >= 1.5.0 should work. These components are readily available within the NGC TensorFlow Docker image below. @@ -212,7 +212,7 @@ For those unable to use the NGC container, to set up the required environment or `./bin/decoding_gemm` can generate the best GEMM configuration. The arguments of `decoding_gemm` are: ```bash - ./bin/decoding_gemm + ./bin/decoding_gemm ``` Assume the settings of decoding are as follows. @@ -224,7 +224,7 @@ For those unable to use the NGC container, to set up the required environment or - `vocabulary_size`=30000 - `sequence_length`=32 - `encoder's hidden dimension`=512 - - `data_type`=FP32 + - `data_type`=0 (FP32) or 1 (FP16) or 2 (BF16) Then the following scripts can generate the best GEMM configuration under such settings and record the configuration into the `gemm_config.in` file. diff --git a/docs/gpt_guide.md b/docs/gpt_guide.md index d32fe8b8c..afcba9a1e 100644 --- a/docs/gpt_guide.md +++ b/docs/gpt_guide.md @@ -5,6 +5,7 @@ - [GPT](#gpt) - [Table Of Contents](#table-of-contents) - [Introduction](#introduction) + - [Supported features](#supported-features) - [Model architecture](#model-architecture) - [Workflow](#workflow) - [Optimization](#optimization) @@ -19,10 +20,12 @@ - [gpt with triton backend](#gpt-with-triton-backend) - [Performance](#performance) - [Large model inference with model parallel](#large-model-inference-with-model-parallel) + - [Performance of Megatron-530B](#performance-of-megatron-530b) - [Performance of GPT-175B](#performance-of-gpt-175b) - [Perofrmance of GPT-89B](#perofrmance-of-gpt-89b) - - [Performance of GPT-1.3B](#performance-of-gpt-13b) + - [Performance of GPT-20B](#performance-of-gpt-20b) - [Performance of GPT-6.7B](#performance-of-gpt-67b) + - [Performance of GPT-1.3B](#performance-of-gpt-13b) - [Performance of GPT-350M](#performance-of-gpt-350m) - [TODO](#todo) @@ -31,7 +34,30 @@ This document describes what FasterTransformer provides for the GPT model, explaining the workflow and optimization. We also provide a guide to help users to run the GPT model on FasterTransformer. Finally, we provide benchmark to demonstrate the speed of FasterTransformer on GPT. GPT is a variant of Decoding model, which does not have the encoder module, cross multi-head attention, and uses GeLU as the activation. In 2020, OpenAI shows that using very giant model and lots of training data can significantly improve the capacity of GPT model in [their paper](https://arxiv.org/abs/2005.14165). However, it is impossible to put such model into a single GPU. For example, the largest model, GPT-3, has 175 billion parameters, which takes about 350 GBs under half data type. Therefore, multi-gpus, even multi-nodes, is necessary. To solve the bottleneck of latency and memory due to the model size, FasterTransformer provides kernels with high efficiency, optimized memory usage, and model parallelism on multiple frameworks. -  + +### Supported features + +* Checkpoint converter + * Huggingface + * Megatron + * Nemo Megatron + * TensorFlow  +* Data type + * FP32 + * FP16 + * INT8 weight only PTQ for bs 1 and 2 +* Feature + * Multi-GPU multi-node inference + * Dynamic random seed + * Stop tokens + * Beam search and sampling are both supported + * Loading FP32 or FP16 weights +* Frameworks + * TensorFlow + * PyTorch + * C++ + * Triton backend + ## Model architecture ### Workflow @@ -69,10 +95,10 @@ In c++ example codes, we skip the step 4 and step 6, loading the request by `exa The source codes are put in `src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.cc`. The arguments, input tensors and output tensors of GPT: * Arguments: - 1. Maximum batch size - 2. Maximum sequence length - 3. Maximum input sequence length - 4. beam width for beam search. If setting b to be 1, then we don’t use beam search but use sampling. + 1. Maximum batch size (Deprecated, move to input) + 2. Maximum sequence length (Deprecated, move to input) + 3. Maximum input sequence length (Deprecated, move to input) + 4. beam width for beam search. If setting b to be 1, then we don’t use beam search but use sampling. (Deprecated, move to input) 5. Head number 6. Size per head 7. Intermediate size. The inter size of feed forward network. It is often set to 4 * head_num * size_per_head. @@ -80,37 +106,50 @@ The source codes are put in `src/fastertransformer/models/multi_gpu_gpt/Parallel 9. Vocab size 10. Start id of the vocabulary 11. End id of the vocabulary - 12. Diversity rate of beam search. A hyper hyper-parameter for [simple diverse decoding](https://arxiv.org/pdf/1611.08562.pdf). - 13. top_k value for top k sampling. - 14. top_p value for top p sampling - 15. Random seed for sampling - 16. Temperature for logit. Setting to be 1.0 if you don’t want to apply the temperature. - 17. Length penalty for logit. Setting to be 1.0 if you don’t want to apply the length penalty. - 18. Repetition penalty for logit. Setting to be 1.0 if you don’t want to apply the repetition penalty. - 19. Size of tensor parallelism. Must be able to divide the head number. - 20. Rank of tensor parallelism. - 21. Comm of tensor parallelism. - 22. Size of pipeline parallelism. Must be able to devide the number of decoder layers. - 23. Rank of pipeline parallelism. - 24. Comm of pipeline parallelism. - 25. CUDA stream. - 26. Pointer of cuBLAS wrapper, which is declared in `src/fastertransformer/utils/cublasMMWrapper.h`. - 27. Pointer of memory allocator, which is declared in `src/fastertransformer/utils/allocator.h` - 28. “is_free_buffer_after_forward” flag. If setting to be true, FasterTransformer will allocate buffer before forward, and free buffer after forward. If the memory is controlled by memory pool and the cost of allocating/releasing memory is small, setting the flag to be true can save some memory. - 29. Pointer of CUDA device properties, which is used to get the properties of hardware like size of shared memory. + 12. Diversity rate of beam search. A hyper hyper-parameter for [simple diverse decoding](https://arxiv.org/pdf/1611.08562.pdf). (Deprecated, move to input) + 13. top_k value for top k sampling. (Deprecated, move to input) + 14. top_p value for top p sampling. (Deprecated, move to input) + 15. Random seed for sampling. (Deprecated, move to input) + 16. Temperature for logit. Setting to be 1.0 if you don’t want to apply the temperature. (Deprecated, move to input) + 17. Length penalty for logit. Setting to be 1.0 if you don’t want to apply the length penalty. (Deprecated, move to input) + 18. Repetition penalty for logit. Setting to be 1.0 if you don’t want to apply the repetition penalty. (Deprecated, move to input) + 19. Tensor Parallel information, which is declared in `src/fastertransformer/utils/nccl_utils.h`. + 20. Pipeline Parallel information, which is declared in `src/fastertransformer/utils/nccl_utils.h`. + 21. CUDA stream. + 22. Pointer of cuBLAS wrapper, which is declared in `src/fastertransformer/utils/cublasMMWrapper.h`. + 23. Pointer of memory allocator, which is declared in `src/fastertransformer/utils/allocator.h` + 24. “is_free_buffer_after_forward” flag. If setting to be true, FasterTransformer will allocate buffer before forward, and free buffer after forward. If the memory is controlled by memory pool and the cost of allocating/releasing memory is small, setting the flag to be true can save some memory. + 25. Pointer of CUDA device properties, which is used to get the properties of hardware like size of shared memory. + 26. Is using sparsity. + 27. Int8 mode. + 28. Custom all reduction communication for custom all reduction in model parallelism. It is only supported in 8-way tensor parallelism. + 29. Flag of enable custom all reduction or not. * Input tensors: 1. Input ids (context). The shape is \[ request batch size * beam width, request maximum input length \]. 2. Input lengths. The shape is \[ request batch size * beam width \]. 3. Maximum output sequence length. An integer to describe the largest number of tokens you hope for results. Note that it includes the input ids. + 4. Stop word list. When FT generates words in this list, it will stop the generation. An extension of stop id, optional. + 5. Start id in runtime. The shape is \[batch_size\] on cpu, optional. If FT receives this input, FT will replace default start id by it, optional. + 6. End id in runtime. The shape is \[batch_size\] on cpu, optional. If FT receives this input, FT will replace default end id by it, optional. + 7. top_k value for top k sampling. The shape is \[1\] or \[batch_size, 1\] on cpu, optional. + 8. top_p value for top p sampling. The shape is \[1\] or \[batch_size, 1\] on cpu, optional. + 9. Diversity rate of beam search (beam_search_diversity_rate). A hyper hyper-parameter for [simple diverse decoding](https://arxiv.org/pdf/1611.08562.pdf). [1] or \[batch_size, 1\] on cpu, optional. + 10. Temperature for logit (temperature). The sahpe \[1\] or \[batch_size, 1\] on cpu, optional. + 11. Length penalty for logit (len_penalty). The shape is \[1\] or \[batch_size, 1\] on cpu, optional + 12. Repetition penalty for logit (repetition_penalty). The shape is \[1\] or \[batch_size, 1\] on cpu, optional + 13. Random_seed \[1\] or \[batch_size, 1\] on cpu, optional + 14. Length of prefix soft prompt embedding. This describes how many tokens of soft prompt embedding in each sentence. The shape is \[batch_size\], optional. + 15. Prefix soft prompt embedding. FT will concat them with results of embedding lookup kernel. The shape is \[batch_size, max_prefix_soft_prompt_length, hidden_units\], optional. * Output tensors: - 1. Output ids. The shape is \[maximum output sequence length, batch size, beam width \]. + 1. Output ids. The shape is \[batch size, beam width, maximum output sequence length \]. 2. Parent ids. It is used to find the best path in beam search. It is deprecated now. 3. Sequence lengths. The shape is \[batch size * beam width\]. It records the final sequence lengths of all sentences. - 4. Log probability for sampling. The shape is \[requested token number, batch size, beam \]. It records the log probability of logits at each step. + 4. Log probability for sampling. The shape is \[requested token number, batch size, beam \]. It records the log probability of logits at each step. Optional outputs in FP32. + 5. Cumulative log probability of generated senteces. The shape is \[batch size, beam\]. Optional outputs in FP32. -Although there are many arguments, most of them are fixed. For example, arguments 5 ~ 11 are model hyper-parameters and fixed after we determine the model hyper-parameters. Arguments 19 ~ 27 and 29 are some settings about CUDA and NCCL, and progress are fixed. +The `beam_width` value is set by the output shape directly. When the `beam_width` is larger than 1, FT will use beam search to generate tokens; otherwise, FT will use topk or topp sampling. -We also provide the module `Gpt` in `src/fastertransformer/models/gpt/Gpt.cc`, which is a GPT model without model parallelism. It does not need the arguments 20 ~ 24, and other are same. +We also provide the module `Gpt` in `src/fastertransformer/models/gpt/Gpt.cc`, which is a GPT model without model parallelism. It does not need the arguments 19 and 20, while others are same. ### Optimization @@ -126,12 +165,29 @@ The following guide demonstrates how to run the examples of c++, PyTorch and Tri ### Requirements - CMake >= 3.8 for Tensorflow, CMake >= 3.13 for PyTorch -- CUDA 10.1 or newer version +- CUDA 11.0 or newer version +- NCCL 2.10 or newer version - Python 3 is recommended because some features are not supported in python 2 -- Tensorflow 1.13 or 1.14 or 1.15 -- PyTorch >= 1.5.0 +- Tensorflow: Verify on 1.15, 1.13 and 1.14 should work. +- PyTorch: Verify on 1.8.0, >= 1.5.0 should work. + +Recommend use nvcr image like `nvcr.io/nvidia/tensorflow:21.11-tf1-py3` or `nvcr.io/nvidia/pytorch:21.11-py3`. + +These components are readily available within the NGC TensorFlow Docker image below. + +Ensure you have the following components: +- [NVIDIA Docker](https://github.com/NVIDIA/nvidia-docker) and NGC container are recommended +- [NVIDIA Pascal](https://www.nvidia.com/en-us/data-center/pascal-gpu-architecture/) or [Volta](https://www.nvidia.com/en-us/data-center/volta-gpu-architecture/) or [Turing](https://www.nvidia.com/en-us/geforce/turing/) or [Ampere](https://www.nvidia.com/en-us/data-center/nvidia-ampere-gpu-architecture/) based GPU + +For more information about how to get started with NGC containers, see the following sections from the NVIDIA GPU Cloud Documentation and the Deep Learning Documentation: + +- [Getting Started Using NVIDIA GPU Cloud](https://docs.nvidia.com/ngc/ngc-getting-started-guide/index.html) +- [Accessing And Pulling From The NGC Container Registry](https://docs.nvidia.com/deeplearning/frameworks/user-guide/index.html#accessing_registry) +- [Running TensorFlow](https://docs.nvidia.com/deeplearning/frameworks/tensorflow-release-notes/running.html#running) +- [Running PyTorch](https://docs.nvidia.com/deeplearning/frameworks/pytorch-release-notes/index.html) + +For those unable to use the NGC container, to set up the required environment or create your own container, see the versioned [NVIDIA Container Support Matrix](https://docs.nvidia.com/deeplearning/frameworks/support-matrix/index.html). -Recommend use nvcr image like `nvcr.io/nvidia/tensorflow:21.02-tf1-py3` or `nvcr.io/nvidia/pytorch:21.02-py3`. ### Build the FasterTransformer @@ -139,16 +195,10 @@ Recommend use nvcr image like `nvcr.io/nvidia/tensorflow:21.02-tf1-py3` or `nvcr You can choose the tensorflow version and python version you want. Here, we list some possible images: - - `nvcr.io/nvidia/tensorflow:19.07-py2` contains the TensorFlow 1.14 and python 2.7. - - `nvcr.io/nvidia/tensorflow:20.12-tf1-py3` contains the TensorFlow 1.15 and python 3.8. - - `nvcr.io/nvidia/pytorch:20.03-py3` contains the PyTorch 1.5.0 and python 3.6 - - `nvcr.io/nvidia/pytorch:20.07-py3` contains the PyTorch 1.6.0 and python 3.6 - - `nvcr.io/nvidia/pytorch:20.12-py3` contains the PyTorch 1.8.0 and python 3.8 - - To achieve best performance, we recommand to use the latest image. For example, running image `nvcr.io/nvidia/tensorflow:20.12-tf1-py3` by + To achieve best performance, we recommand to use the latest image. For example, running image `nvcr.io/nvidia/tensorflow:21.11-tf1-py3` by ```bash - nvidia-docker run -ti --rm nvcr.io/nvidia/tensorflow:20.12-tf1-py3 bash + nvidia-docker run -ti --rm nvcr.io/nvidia/tensorflow:21.11-tf1-py3 bash git clone https://github.com/NVIDIA/FasterTransformer.git mkdir -p FasterTransformer/build cd FasterTransformer/build @@ -162,23 +212,23 @@ Recommend use nvcr image like `nvcr.io/nvidia/tensorflow:21.02-tf1-py3` or `nvcr 1. build with C++ ```bash - cmake -DSM=xx -DCMAKE_BUILD_TYPE=Release -DBUILD_GPT=ON .. + cmake -DSM=xx -DCMAKE_BUILD_TYPE=Release -DBUILD_MULTI_GPU=ON .. make ``` 2. build with TensorFlow - Uses need to set the path of TensorFlow. For example, if we use `nvcr.io/nvidia/tensorflow:20.12-tf1-py3`, then + Uses need to set the path of TensorFlow. For example, if we use `nvcr.io/nvidia/tensorflow:21.11-tf1-py3`, then ```bash - cmake -DSM=xx -DCMAKE_BUILD_TYPE=Release -DBUILD_TF=ON -DTF_PATH=/usr/local/lib/python3.8/dist-packages/tensorflow_core/ -DBUILD_GPT=ON .. + cmake -DSM=xx -DCMAKE_BUILD_TYPE=Release -DBUILD_TF=ON -DTF_PATH=/usr/local/lib/python3.8/dist-packages/tensorflow_core/ -DBUILD_MULTI_GPU=ON .. make ``` 3. build with PyTorch ```bash - cmake -DSM=xx -DCMAKE_BUILD_TYPE=Release -DBUILD_PYT=ON -DBUILD_GPT=ON .. + cmake -DSM=xx -DCMAKE_BUILD_TYPE=Release -DBUILD_PYT=ON -DBUILD_MULTI_GPU=ON .. make ``` @@ -251,7 +301,7 @@ python ../examples/pytorch/gpt/utils/megatron_ckpt_convert_2.py -i ../models/meg * How to use `checkpoint_saver_fastertransformer.py` to convert the megatron model. Note that this tool is only available for newer checkpoint. Need to get more details from ADLR team. ```bash -git clone -b checkpoint_util https://gitlab-master.nvidia.com/ADLR/megatron-lm.git +git clone -b checkpoint_util https://gitlab-master.nvidia.com/ADLR/megatron-lm.git # This is still an internal tool. cp ../examples/pytorch/gpt/utils/checkpoint_saver_fastertransformer.py megatron-lm/tools cd megatron-lm python tools/checkpoint_util.py --model-type GPT --loader megatron --saver fastertransformer --input ../megatron_new_ckpt/357m-pipeline-2-tensor-2/ --output ../tmp --target-tensor-parallel-size 1 @@ -267,14 +317,23 @@ python ../examples/onnx/multi_gpu_gpt/onnx_ckpt_convert.py -i gpt2-10.onnx -o .. python ../examples/onnx/multi_gpu_gpt/onnx_ckpt_convert.py -i gpt2-10.onnx -o ../models/onnx-models/c-model/124m/ -i_g 4 ``` +* Downlaod huggingface gpt model and convert + +```bash +git clone https://huggingface.co/gpt2-xl +python ../examples/pytorch/gpt/utils/huggingface_gpt_convert.py -i gpt2-xl/ -o ../models/huggingface-models/c-model/gpt2-xl -i_g 1 +``` + + ### Run GPT 1. Run GPT under on C++ with multiple gpu - 1.1 Generate the `gemm_config.in` file. + 1.1 Generate the `gemm_config.in` file.\ + Data Type = 0 (FP32) or 1 (FP16) or 2 (BF16) ```bash - ./bin/gpt_gemm + ./bin/gpt_gemm E.g., ./bin/gpt_gemm 8 1 32 12 128 6144 51200 1 1 ``` @@ -313,7 +372,7 @@ python ../examples/onnx/multi_gpu_gpt/onnx_ckpt_convert.py -i gpt2-10.onnx -o .. srun -N2 -n2 -t 600 --pty bash # Assume we get 2 nodes: prm-dgx-09 and prm-dgx-10 srun -N2 -n2 docker pull nvcr.io/nvidia/tensorflow:20.07-tf1-py3 - srun -N2 -n2 nvidia-docker run -itd --rm --privileged --network=host --pid=host --cap-add=IPC_LOCK --device=/dev/infiniband -v $PWD:$PWD -w $PWD --name ft-test nvcr.io/nvidia/tensorflow:20.12-tf1-py3 /bin/bash + srun -N2 -n2 nvidia-docker run -itd --rm --privileged --network=host --pid=host --cap-add=IPC_LOCK --device=/dev/infiniband -v $PWD:$PWD -w $PWD --name ft-test nvcr.io/nvidia/tensorflow:21.11-tf1-py3 /bin/bash srun -N2 -n2 nvidia-docker exec -i --env SLURM_NTASKS --env SLURM_NODEID --env SLURM_PROCID --env SLURM_STEP_NODELIST --env SLURMD_NODENAME --privileged ft-test bash -c "mkdir /root/.ssh && cp $PWD/ssh/* /root/.ssh && chmod 700 /root/.ssh && chmod 640 /root/.ssh/authorized_keys2 && chmod 400 /root/.ssh/id_rsa && apt-get update && apt-get install ssh -y && mkdir /run/sshd/ && /usr/sbin/sshd -p 11068 && nvidia-smi -lgc 1530" @@ -401,13 +460,70 @@ Details are in [transformer_backend](https://github.com/triton-inference-server/ ## Performance -Hardware settings: -* 8xA100-80GBs (with mclk 1593MHz, pclk 1410MHz) with AMD EPYC 7742 64-Core Processor +Hardware settings (A100 SuperPod architecture): + +* Intra node: 8xA100-80GBs (with mclk 1593MHz, pclk 1410MHz) with AMD EPYC 7742 64-Core Processor, linked by NVSwitch +* Inter node: Linked by Infiniband, 8x200Gb/s NICs ### Large model inference with model parallel We demonstrate the inference time of Megatron and FasterTransformer on Triton, and show the speedup of FasterTransformer compare to Megatron for GPT-175B and GPT-89B. In the experiments of GPT, we updated the following parameters: +#### Performance of Megatron-530B + +* head_num = 128 +* size_per_head = 160 +* num_layers = 105 +* data_type = FP16 +* vocab_size = 51200 +* top_p = 0.9 + +TP means tensor parallelism, PP means pipeline parallelism. + +
+
Fig 4. Latency on input length 60, output length 20. TP means tensor parallelism and PP means pipeline parallelism.
+ +
+
Fig 5. Throughput per GPU on input length 60, output length 20. TP means tensor parallelism and PP means pipeline parallelism.
+ +
+
Fig 6. Latency on fixing output length 20, 16 ways tensor parallelism, different input length and batch size.
+ +
+
Fig 7. Latency on fixing input length 128, 16 ways tensor parallelism, different output length and batch size.
+ +| Batch Size | Input Length | Output Length | Latency of TP-16, PP-1 (ms) | Latency of TP-32, PP-1 (ms) | Latency of TP-8, PP-3 (ms) | +| :--------: | :----------: | :-----------: | :-------------------------: | :-------------------------: | :------------------------: | +| 1 | 20 | 8 | 565 | 431 | 842 | +| 2 | 20 | 8 | 598 | 455 | 860 | +| 4 | 20 | 8 | 616 | 493 | 867 | +| 8 | 20 | 8 | 660 | 523 | 929 | +| 16 | 20 | 8 | 730 | 575 | 1049 | +| 32 | 20 | 8 | 865 | 672 | 1283 | +| 64 | 20 | 8 | 1191 | 942 | 1722 | +| 128 | 20 | 8 | 1862 | 1431 | 2124 | +| 256 | 20 | 8 | 3341 | 2483 | 3140 | +| | | | | | | +| 1 | 60 | 20 | 1379 | 1037 | 2085 | +| 2 | 60 | 20 | 1515 | 1110 | 2122 | +| 4 | 60 | 20 | 1512 | 1198 | 2184 | +| 8 | 60 | 20 | 1631 | 1295 | 2367 | +| 16 | 60 | 20 | 1868 | 1454 | 2753 | +| 32 | 60 | 20 | 2361 | 1804 | 3543 | +| 64 | 60 | 20 | 3383 | 2646 | 4117 | +| 128 | 60 | 20 | 5406 | 4099 | 5319 | +| 256 | 60 | 20 | OOM | 7203 | 8318 | +| | | | | | | +| 1 | 128 | 8 | 585 | 866 | 451 | +| 2 | 128 | 8 | 667 | 932 | 508 | +| 4 | 128 | 8 | 765 | 1097 | 606 | +| 8 | 128 | 8 | 990 | 1434 | 766 | +| 16 | 128 | 8 | 1377 | 2104 | 1074 | +| 32 | 128 | 8 | 2251 | 2623 | 1741 | +| 64 | 128 | 8 | 4002 | 3578 | 3114 | +| 128 | 128 | 8 | OOM | 5512 | 5784 | +| 256 | 128 | 8 | OOM | 9614 | 11232 | + #### Performance of GPT-175B * head_num = 96 @@ -462,33 +578,68 @@ We demonstrate the inference time of Megatron and FasterTransformer on Triton, a | 8 | 512 | 32 | 3341.66 | 1415.02 | 2.36 | | 16 | 512 | 32 | 6090.07 | 1952.2 | 3.12 | -#### Performance of GPT-1.3B +#### Performance of GPT-20B -* head_num = 32 -* size_per_head = 64 -* num_layers = 24 +* head_num = 48 +* size_per_head = 128 +* num_layers = 44 * data_type = FP16 * vocab_size = 51200 * top_p = 0.9 -* tensor_para_size = 1 -| Batch_size | Input Seqlen | Output Seqlen | FT
Latency (ms) | Memory Usage (GB) | -| :--------: | :----------: | :-----------: | :-------------------: | :---------------: | -| 1 | 128 | 8 | 36.76 | 8.67 | -| 2 | 128 | 8 | 39.16 | 5.39 | -| 4 | 128 | 8 | 43.32 | 5.49 | -| 8 | 128 | 8 | 52.92 | 5.66 | -| 16 | 128 | 8 | 74.44 | 6.00 | -| 32 | 128 | 8 | 116.74 | 6.66 | -| 64 | 128 | 8 | 201.71 | 7.97 | -| | | | | | -| 1 | 512 | 32 | 135.85 | 5.58 | -| 2 | 512 | 32 | 150.57 | 5.71 | -| 4 | 512 | 32 | 178.25 | 5.97 | -| 8 | 512 | 32 | 232.11 | 6.64 | -| 16 | 512 | 32 | 345.96 | 7.98 | -| 32 | 512 | 32 | 578.52 | 10.52 | -| 64 | 512 | 32 | 1036.21 | 15.61 | +TP means tensor parallelism + +| Batch_size | Input Length | Output Length | Latency of
single GPU (ms) | Latency of
2-way TP (ms) | Latency of
4-way TP (ms) | Latency of
8-way TP (ms) | +| :--------: | :----------: | :-----------: | :------------------------------: | :----------------------------: | :----------------------------: | :----------------------------: | +| 1 | 20 | 8 | 225 | 147 | 102 | 89 | +| 2 | 20 | 8 | 225 | 152 | 108 | 94 | +| 4 | 20 | 8 | 228 | 158 | 113 | 100 | +| 8 | 20 | 8 | 239 | 169 | 121 | 107 | +| 16 | 20 | 8 | 268 | 191 | 133 | 113 | +| 32 | 20 | 8 | 331 | 230 | 155 | 127 | +| 64 | 20 | 8 | 452 | 314 | 200 | 169 | +| 128 | 20 | 8 | 726 | 484 | 318 | 256 | +| 256 | 20 | 8 | 1352 | 844 | 533 | 416 | +| | | | | | | | +| 1 | 60 | 20 | 560 | 358 | 248 | 212 | +| 2 | 60 | 20 | 562 | 378 | 262 | 222 | +| 4 | 60 | 20 | 582 | 393 | 274 | 236 | +| 8 | 60 | 20 | 635 | 429 | 299 | 247 | +| 16 | 60 | 20 | 748 | 510 | 345 | 272 | +| 32 | 60 | 20 | 933 | 620 | 418 | 325 | +| 64 | 60 | 20 | 1352 | 887 | 574 | 454 | +| 128 | 60 | 20 | 2218 | 1384 | 928 | 699 | +| 256 | 60 | 20 | 4141 | 2424 | 1574 | 1152 | +| | | | | | | | +| 1 | 128 | 20 | 566 | 362 | 254 | 217 | +| 2 | 128 | 20 | 580 | 385 | 267 | 227 | +| 4 | 128 | 20 | 629 | 421 | 290 | 244 | +| 8 | 128 | 20 | 740 | 487 | 333 | 267 | +| 16 | 128 | 20 | 931 | 618 | 405 | 312 | +| 32 | 128 | 20 | 1335 | 862 | 547 | 418 | +| 64 | 128 | 20 | 2157 | 1379 | 832 | 634 | +| 128 | 128 | 20 | 3830 | 2365 | 1439 | 1072 | +| 256 | 128 | 20 | OOM | 4414 | 2639 | 1943 | +| | | | | | | | +| 1 | 80 | 200 | 5609 | 3532 | 2438 | 2053 | +| 2 | 80 | 200 | 5588 | 3682 | 2544 | 2095 | +| 4 | 80 | 200 | 5661 | 3797 | 2646 | 2206 | +| 8 | 80 | 200 | 5838 | 3984 | 2741 | 2268 | +| 16 | 80 | 200 | 6167 | 4356 | 2964 | 2307 | +| 32 | 80 | 200 | 6864 | 4817 | 3233 | 2566 | +| 64 | 80 | 200 | 8290 | 6003 | 3815 | 3173 | +| 128 | 80 | 200 | OOM | 7884 | 5239 | 4303 | +| 256 | 80 | 200 | OOM | 12007 | 7603 | 6087 | +| | | | | | | | +| 1 | 200 | 200 | 5648 | 3544 | 2481 | 2080 | +| 2 | 200 | 200 | 5686 | 3739 | 2597 | 2131 | +| 4 | 200 | 200 | 5830 | 3876 | 2719 | 2249 | +| 8 | 200 | 200 | 6146 | 4123 | 2851 | 2338 | +| 16 | 200 | 200 | 6815 | 4672 | 3152 | 2475 | +| 32 | 200 | 200 | 8111 | 5488 | 3634 | 2811 | +| 64 | 200 | 200 | 10766 | 7256 | 4536 | 3621 | +| 128 | 200 | 200 | OOM | 10538 | 6618 | 5229 | +| 256 | 200 | 200 | OOM | OOM | 10447 | 7895 | #### Performance of GPT-6.7B @@ -518,6 +669,34 @@ We demonstrate the inference time of Megatron and FasterTransformer on Triton, a | 32 | 512 | 32 | 1814.03 | 28.73 | | 64 | 512 | 32 | 3306.41 | 41.84 | +#### Performance of GPT-1.3B + +* head_num = 32 +* size_per_head = 64 +* num_layers = 24 +* data_type = FP16 +* vocab_size = 51200 +* top_p = 0.9 +* tensor_para_size = 1 + +| Batch_size | Input Seqlen | Output Seqlen | FT
Latency (ms) | Memory Usage (GB) | +| :--------: | :----------: | :-----------: | :-------------------: | :---------------: | +| 1 | 128 | 8 | 36.76 | 8.67 | +| 2 | 128 | 8 | 39.16 | 5.39 | +| 4 | 128 | 8 | 43.32 | 5.49 | +| 8 | 128 | 8 | 52.92 | 5.66 | +| 16 | 128 | 8 | 74.44 | 6.00 | +| 32 | 128 | 8 | 116.74 | 6.66 | +| 64 | 128 | 8 | 201.71 | 7.97 | +| | | | | | +| 1 | 512 | 32 | 135.85 | 5.58 | +| 2 | 512 | 32 | 150.57 | 5.71 | +| 4 | 512 | 32 | 178.25 | 5.97 | +| 8 | 512 | 32 | 232.11 | 6.64 | +| 16 | 512 | 32 | 345.96 | 7.98 | +| 32 | 512 | 32 | 578.52 | 10.52 | +| 64 | 512 | 32 | 1036.21 | 15.61 | + #### Performance of GPT-350M * head_num = 16 @@ -547,7 +726,3 @@ We demonstrate the inference time of Megatron and FasterTransformer on Triton, a | 64 | 512 | 32 | 529.18 | 8.67 | ## TODO - -* [ ] Add benchmark for more model size, batch size with different model parallel size. -* [ ] Add benchmark for Pipeline parallel. (how local batch size influences: some benchmarks to show the trade off between micro batches computing and the total batch computing) -* [ ] Add benchmark for With and without recompute diff --git a/docs/gptj_guide.md b/docs/gptj_guide.md index 84786d67b..c757db8c9 100644 --- a/docs/gptj_guide.md +++ b/docs/gptj_guide.md @@ -1,14 +1,125 @@ # GPT-J +## Table Of Contents + +- [GPT-J](#gpt-j) + - [Table Of Contents](#table-of-contents) + - [Introduction](#introduction) + - [Supported features](#supported-features) + - [Setup](#setup) + - [Requirements](#requirements) + - [Docker image](#docker-image) + - [Setup](#setup-1) + - [Build](#build) + - [Download the model](#download-the-model) + - [Run GPT-J](#run-gpt-j) + - [Compare with reference implementation](#compare-with-reference-implementation) + - [gpt-j with triton backend](#gpt-j-with-triton-backend) + + ## Introduction This document describes the step to run the GPT-J model on FasterTransformer. GPT-J was developed by EleutherAI and trained on The Pile, a 825GB dataset from curated sources (e.g. Wikipedia, arXiv, GitHub, StackExchange, PubMed, ...). With 6 billion parameters, GPT-J is one of the largest GPT-like publicly released models as of 2021. +### Supported features + +* Checkpoint converter + * EleutherAI +* Data type + * FP32 + * FP16 +* Feature + * Multi-GPU multi-node inference + * Dynamic random seed + * Stop tokens + * Bad words list + * Beam search and sampling are both supported +* Frameworks + * Triton backend + +Optimization in GPT-j are similar to optimization in GPT, describing in the [gpt_guide.md](gpt_guide.md#optimization). + +* Arguments: + 1. Maximum batch size (Deprecated, move to input) + 2. Maximum sequence length (Deprecated, move to input) + 3. Maximum input sequence length (Deprecated, move to input) + 4. beam width for beam search. If setting b to be 1, then we don’t use beam search but use sampling. (Deprecated, move to input) + 5. Head number + 6. Size per head + 7. Intermediate size. The inter size of feed forward network. It is often set to 4 * head_num * size_per_head. + 8. Number of decoder layers. + 9. Vocab size. + 10. Rotary embedding for attetnion. + 11. Start id of the vocabulary. + 12. End id of the vocabulary. + 13. Diversity rate of beam search. A hyper hyper-parameter for [simple diverse decoding](https://arxiv.org/pdf/1611.08562.pdf). (Deprecated, move to input) + 14. top_k value for top k sampling. (Deprecated, move to input) + 15. top_p value for top p sampling. (Deprecated, move to input) + 16. Random seed for sampling. (Deprecated, move to input) + 17. Temperature for logit. Setting to be 1.0 if you don’t want to apply the temperature. (Deprecated, move to input) + 18. Length penalty for logit. Setting to be 1.0 if you don’t want to apply the length penalty. (Deprecated, move to input) + 19. Repetition penalty for logit. Setting to be 1.0 if you don’t want to apply the repetition penalty. (Deprecated, move to input) + 20. Tensor Parallel information, which is declared in `src/fastertransformer/utils/nccl_utils.h`. + 21. Pipeline Parallel information, which is declared in `src/fastertransformer/utils/nccl_utils.h`. + 22. CUDA stream. + 23. Pointer of cuBLAS wrapper, which is declared in `src/fastertransformer/utils/cublasMMWrapper.h`. + 24. Pointer of memory allocator, which is declared in `src/fastertransformer/utils/allocator.h` + 25. “is_free_buffer_after_forward” flag. If setting to be true, FasterTransformer will allocate buffer before forward, and free buffer after forward. If the memory is controlled by memory pool and the cost of allocating/releasing memory is small, setting the flag to be true can save some memory. + 26. Pointer of CUDA device properties, which is used to get the properties of hardware like size of shared memory. + 27. Custom all reduction communication for custom all reduction in model parallelism. It is only supported in 8-way tensor parallelism. + 28. Flag of enable custom all reduction or not. +* Input tensors: + 1. Input ids (context). The shape is \[ request batch size * beam width, request maximum input length \]. + 2. Input lengths. The shape is \[ request batch size * beam width \]. + 3. Maximum output sequence length. An integer to describe the largest number of tokens you hope for results. Note that it includes the input ids. + 4. Start id in runtime. The shape is \[batch_size\] on cpu, optional. If FT receives this input, FT will replace default start id by it, optional. + 5. End id in runtime. The shape is \[batch_size\] on cpu, optional. If FT receives this input, FT will replace default end id by it, optional. + 6. Stop word list. When FT generates words in this list, it will stop the generation. An extension of stop id, optional. + 7. Bad word list. FT won't generates words in this list, optional. + 8. top_k value for top k sampling. The shape is \[1\] or \[batch_size, 1\] on cpu, optional. + 9. top_p value for top p sampling. The shape is \[1\] or \[batch_size, 1\] on cpu, optional. + 10. Diversity rate of beam search (beam_search_diversity_rate). A hyper hyper-parameter for [simple diverse decoding](https://arxiv.org/pdf/1611.08562.pdf). [1] or \[batch_size, 1\] on cpu, optional. + 11. Temperature for logit (temperature). The sahpe \[1\] or \[batch_size, 1\] on cpu, optional. + 12. Length penalty for logit (len_penalty). The shape is \[1\] or \[batch_size, 1\] on cpu, optional + 13. Repetition penalty for logit (repetition_penalty). The shape is \[1\] or \[batch_size, 1\] on cpu, optional + 14. Random_seed \[1\] or \[batch_size, 1\] on cpu, optional + 15. Length of prefix soft prompt embedding. This describes how many tokens of soft prompt embedding in each sentence. The shape is \[batch_size\], optional. + 16. Prefix soft prompt embedding. FT will concat them with results of embedding lookup kernel. The shape is \[batch_size, max_prefix_soft_prompt_length, hidden_units\], optional. +* Output tensors: + 1. Output ids. The shape is \[batch size, beam width, maximum output sequence length \]. + 2. Sequence lengths. The shape is \[batch size * beam width\]. It records the final sequence lengths of all sentences. + 3. Log probability for sampling. The shape is \[requested token number, batch size, beam \]. It records the log probability of logits at each step. Optional outputs in FP32. + +The beam_width value is set by the output shape directly. When the beam_width is larger than 1, FT will use beam search to generate tokens; otherwise, FT will use topk or topp sampling. ## Setup +### Requirements + +- CMake >= 3.13 for PyTorch +- CUDA 11.0 or newer version +- NCCL 2.10 or newer version +- Python 3 is recommended because some features are not supported in python 2 +- PyTorch: Verify on 1.8.0, >= 1.5.0 should work. + +Recommend use nvcr image like `nvcr.io/nvidia/pytorch:21.11-py3`. + +These components are readily available within the NGC Docker image below. + +Ensure you have the following components: +- [NVIDIA Docker](https://github.com/NVIDIA/nvidia-docker) and NGC container are recommended +- [NVIDIA Pascal](https://www.nvidia.com/en-us/data-center/pascal-gpu-architecture/) or [Volta](https://www.nvidia.com/en-us/data-center/volta-gpu-architecture/) or [Turing](https://www.nvidia.com/en-us/geforce/turing/) or [Ampere](https://www.nvidia.com/en-us/data-center/nvidia-ampere-gpu-architecture/) based GPU + +For more information about how to get started with NGC containers, see the following sections from the NVIDIA GPU Cloud Documentation and the Deep Learning Documentation: + +- [Getting Started Using NVIDIA GPU Cloud](https://docs.nvidia.com/ngc/ngc-getting-started-guide/index.html) +- [Accessing And Pulling From The NGC Container Registry](https://docs.nvidia.com/deeplearning/frameworks/user-guide/index.html#accessing_registry) +- [Running PyTorch](https://docs.nvidia.com/deeplearning/frameworks/pytorch-release-notes/index.html) + +For those unable to use the NGC container, to set up the required environment or create your own container, see the versioned [NVIDIA Container Support Matrix](https://docs.nvidia.com/deeplearning/frameworks/support-matrix/index.html). + ### Docker image * The model was built and tested with the use nvcr image `nvcr.io/nvidia/pytorch:21.07-py3`. e.g. @@ -17,15 +128,6 @@ With 6 billion parameters, GPT-J is one of the largest GPT-like publicly release nvidia-docker run -ti --rm nvcr.io/nvidia/pytorch:21.07-py3 bash ``` -* (internal) On Selene: - - ```bash - srun -A devtech -p luna -N 1 --mpi=pmix --ntasks-per-node=8 \ - --container-image=nvcr.io#nvidia/pytorch:21.07-py3 \ - --container-mounts=$(pwd):$(pwd),/lustre/fsw/adlr:/lustre/fsw/adlr \ - --container-workdir=$(pwd) --pty /bin/bash - ``` - ### Setup * Get the code and install all dependencies: @@ -44,25 +146,22 @@ With 6 billion parameters, GPT-J is one of the largest GPT-like publicly release ```bash - cmake -DSM=xx -DCMAKE_BUILD_TYPE=Release -DBUILD_GPT=ON .. + cmake -DSM=xx -DCMAKE_BUILD_TYPE=Release -DBUILD_MULTI_GPU=ON .. make -j ``` ### Download the model -To run the GPT on c, users need to convert the checkpoint of TensorFlow or PyTorch to binary files, and then load by FasterTransformer c api. Unfortunately, there is no published large model. So, users are only able to verify the correctness by smaller model. Currently, FasterTransformer provides two kinds of samples. First one is using the checkpoint of [OpenAI GPT-2 model](https://github.com/openai/gpt-2) (which is trained by TensorFlow); Another choice is using the checkpoint of [Megatron](https://github.com/NVIDIA/Megatron-LM) (which is trained by pytorch). - -* Download openai-gpt model and convert - +* Download the public model and convert ```bash - wget https://the-eye.eu/public/AI/GPT-J-6B/step_383500_slim.tar.gz + wget https://mystic.the-eye.eu/public/AI/GPT-J-6B/step_383500_slim.tar.zstd tar -axf step_383500_slim.tar.gz - python3 ../examples/pytorch/gptj/utils/gptj_ckpt_convert.py --output-dir ../models/j6b_ckpt --ckpt-dir ./step_383500 + python3 ../examples/pytorch/gptj/utils/gptj_ckpt_convert.py --output-dir ../models/j6b_ckpt --ckpt-dir ./step_383500/ ``` The script accepts the following arguments: -1. `--output-dir` is the path of the base directory where the weight binary files will be saved. If `--output-dir` terminates with `.pt` the script just converts the checkpoint to a Pytorch model file that can be read by the [GPT-J implementation in HuggingFace's transformer](https://github.com/finetuneanon/transformers). +1. `--output-dir` is the path of the base directory where the weight binary files will be saved. If `--output-dir` terminates with `.pt` the script just converts the checkpoint to a Pytorch model file that can be read by the [GPT-J implementation in HuggingFace's transformer](https://github.com/finetuneanon/transformers). 2. `--ckpt-dir` is the path to the extracted checkpoint. If `--ckpt-dir` terminates with `.pt` then the script reads the Pytorch model file instead than the public checkpoint, which is faster. 3. `--n-inference-gpus` number of GPUs used for inference, defaults to 1. The binary model parameters are saved to `${output-dir}/${n-inference-gpus}-gpu/` @@ -76,10 +175,10 @@ The script accepts the following arguments: ### Run GPT-J -* Generate the `gemm_config.in` file. - +* Generate the `gemm_config.in` file.\ + Data Type = 0 (FP32) or 1 (FP16) or 2 (BF16) ```bash - ./bin/gpt_gemm + ./bin/gpt_gemm E.g., ./bin/gpt_gemm 8 1 32 16 128 16384 50400 1 1 ``` @@ -96,11 +195,13 @@ E.g. by setting the `is_half` of `gpt_config.ini` to 1, users can run gpt model * Convert the token ids to sentence. ```bash - python ../examples/pytorch/gpt/utils/gpt_token_converter.py + python ../examples/pytorch/gpt/utils/gpt_token_converter.py ``` * The model supports both pipeline and tensor parallelism. Users can use `tensor_para_size` and `pipeline_para_size` in `../examples/cpp/gptj/gptj_config.ini` to control the size of model parallel. Note that the number of processes must equal to `tensor_para_size * pipeline_para_size`. For tensor parallelism, the model parameters need to be prepared with the `gptj_ckpt_convert.py` script and `--n-inference-gpus=$NGPUS` as described above. +* Provide a bad tokens list that should not be generated (optional). You can use the script `../examples/pytorch/gpt/utils/word_list.py` to convert a python `List[List[int]]` to a format understandable by FasterTransformer. Beware of tokenizer subtleties, "word" and "\word" are usually mapped to two uniques token. + * There is also an example of running GPT-J as a Triton model. This example does not involve a client. ```bash @@ -132,76 +233,6 @@ E.g. by setting the `is_half` of `gpt_config.ini` to 1, users can run gpt model Testing was performed by comparing the logits for the model given the context. -### Run through tritonserver - -* This step requires setting up a new Docker instance with `tritonserver`. The following was tested with `nvcr.io#nvidia/tritonserver:21.07-py3` and install dependencies: - - ```bash - # Needed for server and compilation: - apt-get update - apt-get install --yes python3-dev rapidjson-dev - wget https://github.com/Kitware/CMake/releases/download/v3.21.1/cmake-3.21.1-linux-x86_64.tar.gz - tar -axf cmake-3.21.1-linux-x86_64.tar.gz - export PATH=`pwd`/cmake-3.21.1-linux-x86_64/bin/:$PATH - # Needed for client and token conversion: - pip3 install tritonclient[all] fire regex - ``` - -* Get up to date code (FasterTransformer is not needed, only used for token conversion): - - ```bash - git clone https://gitlab-master.nvidia.com/bhsueh/fastertransformer_backend -b dev-gptj - git clone https://gitlab-master.nvidia.com/zehuanw/FasterTransformer -b v5.0-dev-gptj - git clone https://github.com/triton-inference-server/server.git # We need some tools when we test this backend - ln -s server/qa/common . - ``` - -* Set up env variables: +### gpt-j with triton backend - ```bash - export WORKSPACE=$(pwd) - export SRC_MODELS_DIR=${WORKSPACE}/models - export TRITON_MODELS_STORE=${WORKSPACE}/triton-model-store - export CONTAINER_VERSION=21.07 - export TRITON_DOCKER_IMAGE=triton_with_ft:${CONTAINER_VERSION} - ``` - -* Install FT backend: - - ```bash - mkdir -p fastertransformer_backend/build - cd fastertransformer_backend/build - cmake -DCMAKE_EXPORT_COMPILE_COMMANDS=1 -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/opt/tritonserver -DTRITON_COMMON_REPO_TAG="r${NVIDIA_TRITON_SERVER_VERSION}" -DTRITON_CORE_REPO_TAG="r${NVIDIA_TRITON_SERVER_VERSION}" -DTRITON_BACKEND_REPO_TAG="r${NVIDIA_TRITON_SERVER_VERSION}" .. - make -j install - ``` - -* Prepare the model store directory: - - ```bash - cd ${WORKSPACE} - mkdir -p ${TRITON_MODELS_STORE}/fastertransformer/1 - cp fastertransformer_backend/all_models/fastertransformer/config.pbtxt ${TRITON_MODELS_STORE}/fastertransformer - ``` - The model parameter files should be placed in `${TRITON_MODELS_STORE}/fastertransformer/1/$NGPUS-gpu`. E.g.: - ```bash - python3 FasterTransformer/examples/pytorch/gptj/utils/gptj_ckpt_convert.py --output-dir ${TRITON_MODELS_STORE}/fastertransformer/1/ --ckpt-dir /path/to/step_383500 - ``` - -* Run server: - - ```bash - mpirun -n 1 --allow-run-as-root tritonserver --model-repository=${HOME}/triton-model-store & - ``` - -* Run client: - - ```bash - bash fastertransformer_backend/tools/run_client.sh - ``` - -* Decode: - ```bash - wget https://s3.amazonaws.com/models.huggingface.co/bert/gpt2-vocab.json - wget https://s3.amazonaws.com/models.huggingface.co/bert/gpt2-merges.txt - python3 FasterTransformer/examples/pytorch/gpt/utils/gpt_token_converter.py --out_file=triton_out --vocab_file=gpt2-vocab.json --bpe_file=gpt2-merges.txt - ``` +Details are in [transformer_backend](https://github.com/triton-inference-server/fastertransformer_backend) diff --git a/docs/images/FP-swin-flowchart.png b/docs/images/FP-swin-flowchart.png new file mode 100644 index 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These components are readily available within the NGC PyTorch Docker image below. diff --git a/docs/swin_guide.md b/docs/swin_guide.md new file mode 100644 index 000000000..05b781171 --- /dev/null +++ b/docs/swin_guide.md @@ -0,0 +1,302 @@ +# Faster Swin-Transformer +The Faster Swin-Transformer contains the Swin-Transformer model, a state-of-the-art vision transformer model which was presented in [Swin Transformer: Hierarchical Vision Transformer using Shifted Windows](https://arxiv.org/pdf/2103.14030). The abstract of the paper is the following: + +>This paper presents a new vision Transformer, called +Swin Transformer, that capably serves as a general-purpose +backbone for computer vision. Challenges in adapting +Transformer from language to vision arise from differences +between the two domains, such as large variations in the +scale of visual entities and the high resolution of pixels +in images compared to words in text. To address these +differences, we propose a hierarchical Transformer whose +representation is computed with Shifted windows. The +shifted windowing scheme brings greater efficiency by limiting self-attention computation to non-overlapping local +windows while also allowing for cross-window connection. +This hierarchical architecture has the flexibility to model +at various scales and has linear computational complexity +with respect to image size. These qualities of Swin Transformer make it compatible with a broad range of vision +tasks, including image classification (87.3 top-1 accuracy +on ImageNet-1K) and dense prediction tasks such as object +detection (58.7 box AP and 51.1 mask AP on COCO testdev) and semantic segmentation (53.5 mIoU on ADE20K +val). Its performance surpasses the previous state-of-theart by a large margin of +2.7 box AP and +2.6 mask AP on +COCO, and +3.2 mIoU on ADE20K, demonstrating the potential of Transformer-based models as vision backbones. +The hierarchical design and the shifted window approach +also prove beneficial for all-MLP architectures. The code +and models are publicly available at https://github.com/microsoft/Swin-Transformer. + +Our implementation is aligned with the official PyTorch implementation [Swin-Transformer Github](https://github.com/microsoft/Swin-Transformer). + +## Table of Contents +- [Faster Swin-Transformer](#faster-swin-transformer) + - [Table of Contents](#table-of-contents) + - [Swin-Transformer Computation Flow](#swin-transformer-computation-flow) + - [Demo](#demo) + - [Requirements](#requirements) + - [Setup](#setup) + - [Run](#run) + - [Run Swin-Transformer on C++](#run-swin-transformer-on-c) + - [Run with PyTorch op](#run-with-pytorch-op) + - [Run with TensorRT plugin](#run-with-tensorrt-plugin) + - [Performance](#performance) + - [Swin Performance on T4](#swin-performance-on-t4) + - [FP32](#fp32) + - [FP16](#fp16) + - [INT8](#int8) + - [Swin Performance on A100](#swin-performance-on-a100) + - [TF32](#tf32) + - [FP16](#fp16-1) + - [INT8](#int8-1) + +## Swin-Transformer Computation Flow +
+
Fig. 1 Flowchart of FP16/FP32 Swin-Transformer.
+ +
+
Fig. 2 Flowchart of INT8 Swin-Transformer (with fused MHA and int8-mode=1).
+ +## Demo + +In this demo, you can run Faster Swin-Transformer as a C++ program. + +### Requirements + +- CMake >= 3.13 for PyTorch +- CUDA 11.0 or newer version +- NCCL 2.10 or newer version +- Python 3 is recommended because some features are not supported in python 2 +- PyTorch: Verify on 1.10.0, >= 1.5.0 should work. + +Recommand to use image `nvcr.io/nvidia/pytorch:21.07-py3`. + +> docker run -ti --gpus all --rm nvcr.io/nvidia/pytorch:21.07-py3 bash + +### Setup + +1. Start the docker container, ensure mounting the project directory into it. For example: + ```bash + docker run \ + -it \ + --rm \ + --gpus=all \ + -v {YOUR_FASTER_TRANSFORMER_PROJECT_DIR_ON_HOST}:/workspace/FasterTransformer \ + --workdir /workspace/FasterTransformer \ + nvcr.io/nvidia/pytorch:21.07-py3 bash + export WORKSPACE = /workspace/FasterTransformer + ``` + +Here, we use `nvcr.io/nvidia/pytorch:21.07-py3`, you can also switch it to another CUDA-enabled PyTorch containers, but need to comply with the previous requirements. + +2. Build the FasterTransformer with C++: + ```bash + cd $WORKSPACE + git submodule update --init + mkdir -p build + cd build + cmake -DSM=xx -DCMAKE_BUILD_TYPE=Release -DBUILD_PYT=ON -DBUILD_TRT=ON .. + make + ``` +Note: **xx** is the compute capability of your GPU. For example, 60 (P40) or 61 (P4) or 70 (V100) or 75(T4) or 80 (A100). + +### Run + +#### Run Swin-Transformer on C++ + +Firstly we use `./bin/swin_gemm` as the tool to search the best GEMM configuration. And then run `./bin/swin_example` or `./bin/swin_int8_example`.\ +Data Type = 0 (FP32) or 1 (FP16) or 2 (BF16) +```bash +# is_fp16=0 indicates FP32, is_fp16=1 indicates FP16 +# model_type={0,1,2,3,4,5} +# 0: swin-TINY with window size 7x7 +# 1: swin-SMALL with window size 7x7 +# 2: swin-BASE with window size 7x7 +# 3: swin-BASE with window size 12x12 +# 4: swin-LARGE with window size 7x7 +# 5: swin-LARGE with window size 12x12 +./bin/swin_gemm +./bin/swin_example +./bin/swin_int8_example +``` +Take swin-TINY with batch=32 as an example: +```bash +# Run Swin-Transformer(TINY) under FP32 on C++: +./bin/swin_gemm 32 224 7 3 32 0 0 +./bin/swin_example 0 0 32 + +# Run Swin-Transformer(TINY) under FP16 on C++ +./bin/swin_gemm 32 224 7 3 32 1 0 +./bin/swin_example 1 0 32 + +# Run Swin-Transformer(TINY) under INT8 on C++ +./bin/swin_gemm 32 224 7 3 32 0 1 +./bin/swin_int8_example 0 32 +``` + +#### Run with PyTorch op +Download checkpoint +```bash +cd $WORKSPACE/examples/pytorch/swin/Swin-Transformer-Quantization +wget https://github.com/SwinTransformer/storage/releases/download/v1.0.0/swin_tiny_patch4_window7_224.pth +``` + +**Run FP16/FP32 pytorch op** +```bash +cd $WORKSPACE/examples/pytorch/swin +pip install timm==0.4.12 +pip install termcolor==1.1.0 + +bash -x run_test.sh ##profile of FP16/FP32 model +``` + +**Run INT8 pytorch op** +1. Get calibrated checkpoint + + Refer to [Guide of Swin-Transformer Quantization Toolkit](../examples/pytorch/swin/Swin-Transformer-Quantization/README.md#usage) when installing dependencies and setting up datasets +```bash +cd $WORKSPACE/examples/pytorch/swin/Swin-Transformer-Quantization +python -m torch.distributed.launch --nproc_per_node 1 \ + --master_port 12345 main.py \ + --calib \ + --cfg SwinTransformer/configs/swin_tiny_patch4_window7_224.yaml \ + --resume swin_tiny_patch4_window7_224.pth \ + --data-path \ + --num-calib-batch 10 \ + --calib-batchsz 8\ + --int8-mode 1\ + --calib-output-path calib-checkpoint + +``` +**NOTE**: If you **ONLY** want to use PTQ instead of QAT: when calibrating TINY/SMALL/BASE model, `--int8-mode 1` suffices. When calibrating LARGE model, we have to specify `--int8-mode 2` instead of `--int8-mode 1`. The reason is, `Swin-L` is much harder to quantize, and we have to disable more quantization nodes in order to obtain satisfactory PTQ accuracy results. + +(When `int8_mode=1`, all GEMMs are INT8-in-INT8-out. +When `int8_mode=2`, GEMM of all `fc2` layers and `patchMerge` are relaxed to INT8-in-INT32-out, while other GEMMs keep INT8-I/O. ) + +If you want to insists on using `--int8-mode 1` for LARGE model (because speed of mode=1 is much faster), we recommend using QAT to finetune paramters of LARGE checkpoint. + +2. Run test +```bash +cd $WORKSPACE/examples/pytorch/swin +pip install timm==0.4.12 +pip install termcolor==1.1.0 + +bash -x run_test_int8.sh batch_size ##profile of INT8 model +bash -x run_test_int8_accuracy.sh batch_size ##test accuracy of INT8 model +``` +Note: When testing PTQ accuracy for INT8 Swin-LARGE, we have to specify `--int8-mode 2` instead of `--int8-mode 1` in **run_test_int8.sh**. + +However, if you have finetuned a Swin-LARGE using QAT and `--int8-mode 1`, then you can do inference with `--int8-mode 1` too. In a word, consistency have to be ensured. + +3. Accuracy loss of INT8 Post-Training-Quantization(PTQ) compared with FP16 + +| name | resolution | acc@1 | acc@5 | acc@1(I) | acc@5(I) | +| :----: | :--------: | :----: | :----: | :------------: | :------------: | +| Swin-T | 224x224 | 81.182 | 95.522 | 80.748(-0.434) | 95.328(-0.194) | +| Swin-S | 224x224 | 83.214 | 96.242 | 82.904(-0.288) | 96.196(-0.036) | +| Swin-B | 224x224 | 83.424 | 96.446 | 83.116(-0.354) | 96.322(-0.144) | +| Swin-B | 384x384 | 84.474 | 96.956 | 84.034(-0.440) | 96.782(-0.174) | +| Swin-L | 224x224 | 86.246 | 97.876 | 85.892(-0.354) | 97.822(-0.054) | +| Swin-L | 384x384 | 87.246 | 98.248 | 86.916(-0.330) | 98.174(-0.074) | + +#### Run with TensorRT plugin +**FP16/FP32 TensorRT plugin** +```bash +cd $WORKSPACE/examples/tensorrt/swin +#FP16 engine build & infer +sh run_builder_fp16.sh +sh run_infer_fp16.sh batch_size +#FP32 engine build & infer +sh run_builder_fp32.sh +sh run_infer_fp32.sh batch_size +``` + +**INT8 TensorRT plugin** +```bash +cd $WORKSPACE/examples/tensorrt/swin +#INT8 engine build & infer +sh run_builder_int8.sh +sh run_infer_int8.sh batch_size +``` + +## Performance + +Hardware settings: +* T4 (with mclk 5000MHz, pclk 1590MHz) with Intel(R) Xeon(R) Gold 6132 CPU @ 2.60GHz +* A100 (with mclk 1215, pclk 1410MHz) with Intel(R) Xeon(R) Gold 6132 CPU @ 2.60GHz + +Software settings: +* CUDA 11.4 + +We here compared the performance between Swin-Transformer and FT Swin-Transformer on T4 & A100. Here we used Swin-TINY as an example, and the hyper-parameters of the model are: + +* head_num = {3,6,12,24} +* size_per_head = 32 +* num_of_blocks = {2,2,6,2} + +### Swin Performance on T4 +Here, `torch.jit.trace` means using tracing to convert Torch model to TorchScript model and then profile its performace. +#### FP32 +| Batch_size | torch.jit.trace | cpp | speedup | trt plugin | speedup | torch op | speedup | +| :--------: | :-------------: | :----: | :-----: | :--------: | :-----: | :------: | :-----: | +| 1 | 12.10 | 4.60 | 2.63 | 4.86 | 2.49 | 4.66 | 2.60 | +| 8 | 36.94 | 28.70 | 1.29 | 30.42 | 1.21 | 29.45 | 1.25 | +| 16 | 72.17 | 55.90 | 1.29 | 60.35 | 1.20 | 57.72 | 1.25 | +| 32 | 142.30 | 108.60 | 1.31 | 118.00 | 1.21 | 112.57 | 1.26 | + +#### FP16 +| Batch_size | torch.jit.trace | cpp | speedup | trt plugin | speedup | torch op | speedup | +| :--------: | :-------------: | :---: | :-----: | :--------: | :-----: | :------: | :-----: | +| 1 | 10.81 | 1.40 | 7.72 | 1.48 | 7.30 | 2.15 | 5.03 | +| 8 | 18.77 | 6.80 | 2.76 | 7.32 | 2.56 | 7.00 | 2.68 | +| 16 | 37.63 | 13.30 | 2.83 | 14.52 | 2.59 | 13.87 | 2.71 | +| 32 | 75.36 | 26.10 | 2.89 | 28.98 | 2.60 | 27.70 | 2.72 | + +#### INT8 +| Batch_size | torch.jit.trace | cpp | speedup(vs FP16) | trt plugin | speedup(vs FP16) | torch op | speedup(vs FP16) | +| :--------: | :-------------: | :---: | :--------------: | :--------: | :--------------: | :------: | :--------------: | +| 1 | | 1.24 | 1.13 | 1.27 | 1.17 | 1.24 | 1.73 | +| 8 | | 4.83 | 1.41 | 5.46 | 1.34 | 5.16 | 1.36 | +| 16 | | 9.73 | 1.37 | 11.03 | 1.32 | 10.32 | 1.34 | +| 32 | | 19.19 | 1.36 | 21.78 | 1.33 | 20.46 | 1.35 | + +INT8 vs. FP16 speedup on Swin TINY/SMALL/BASE/LARGE: +| Batch_size | TINY (FP16) | TINY (INT8) | Speedup | SMALL (FP16) | SMALL (INT8) | Speedup | BASE (FP16) | BASE (INT8) | Speedup | LARGE (FP16) | LARGE (INT8) | Speedup | +| :--------: | :---------: | :---------: | :-----: | :----------: | :----------: | :-----: | :---------: | :---------: | :-----: | :----------: | :----------: | :-----: | +| 1 | 1.40 | 1.24 | 1.13 | 2.54 | 2.24 | 1.13 | 3.40 | 2.72 | 1.25 | 6.19 | 3.99 | 1.55 | +| 8 | 6.80 | 4.83 | 1.41 | 11.31 | 7.80 | 1.45 | 17.28 | 11.20 | 1.54 | 31.14 | 19.58 | 1.59 | +| 16 | 13.30 | 9.73 | 1.37 | 22.40 | 15.60 | 1.44 | 32.51 | 21.88 | 1.49 | 61.32 | 39.58 | 1.55 | +| 32 | 26.10 | 19.19 | 1.36 | 44.04 | 30.66 | 1.44 | 64.53 | 42.84 | 1.51 | 121.06 | 76.34 | 1.59 | + +### Swin Performance on A100 +Here, `torch.jit.trace` means using tracing to convert Torch model to TorchScript model and then profile its performace. +#### TF32 +On chips with Ampere architectures (like A30, A100), user can use `export NVIDIA_TF32_OVERRIDE=1` to enforce the program run under TF32, otherwise FP32 GEMM is used by default, which is much slower. +| Batch_size | torch.jit.trace | cpp | speedup | trt plugin | speedup | torch op | speedup | +| :--------: | :-------------: | :---: | :-----: | :--------: | :-----: | :------: | :-----: | +| 1 | 7.04 | 1.58 | 4.46 | 1.61 | 4.37 | 1.92 | 3.67 | +| 8 | 6.99 | 4.89 | 1.43 | 5.30 | 1.32 | 4.89 | 1.43 | +| 16 | 11.82 | 8.78 | 1.35 | 9.56 | 1.24 | 8.89 | 1.33 | +| 32 | 22.74 | 16.91 | 1.34 | 18.44 | 1.23 | 16.88 | 1.35 | + +#### FP16 +| Batch_size | torch.jit.trace | cpp | speedup | trt plugin | speedup | torch op | speedup | +| :--------: | :-------------: | :---: | :-----: | :--------: | :-----: | :------: | :-----: | +| 1 | 7.02 | 0.90 | 7.80 | 0.93 | 7.55 | 1.46 | 4.81 | +| 8 | 7.17 | 1.73 | 4.14 | 1.83 | 3.92 | 1.77 | 4.05 | +| 16 | 7.92 | 2.91 | 2.72 | 3.08 | 2.57 | 2.94 | 2.69 | +| 32 | 14.76 | 5.38 | 2.74 | 5.77 | 2.56 | 5.43 | 2.72 | + +#### INT8 +| Batch_size | torch.jit.trace | cpp | speedup(vs FP16) | trt plugin | speedup(vs FP16) | torch op | speedup(vs FP16) | +| :--------: | :-------------: | :---: | :--------------: | :--------: | :--------------: | :------: | :--------------: | +| 1 | | 1.07 | 0.84 | 1.13 | 0.82 | 1.08 | 1.35 | +| 8 | | 1.62 | 1.07 | 1.73 | 1.06 | 1.63 | 1.09 | +| 16 | | 2.34 | 1.24 | 2.50 | 1.23 | 2.34 | 1.26 | +| 32 | | 3.96 | 1.36 | 4.27 | 1.35 | 4.07 | 1.33 | + +INT8 vs. FP16 speedup on Swin TINY/SMALL/BASE/LARGE: +| Batch_size | TINY (FP16) | TINY (INT8) | Speedup | SMALL (FP16) | SMALL (INT8) | Speedup | BASE (FP16) | BASE (INT8) | Speedup | LARGE (FP16) | LARGE (INT8) | Speedup | +| :--------: | :---------: | :---------: | :-----: | :----------: | :----------: | :-----: | :---------: | :---------: | :-----: | :----------: | :----------: | :-----: | +| 1 | 0.90 | 1.07 | 0.84 | 1.64 | 2.02 | 0.81 | 1.81 | 2.20 | 0.82 | 2.22 | 2.66 | 0.83 | +| 8 | 1.73 | 1.62 | 1.07 | 3.02 | 2.85 | 1.06 | 3.60 | 3.33 | 1.08 | 6.04 | 4.61 | 1.31 | +| 16 | 2.91 | 2.34 | 1.24 | 4.79 | 3.94 | 1.22 | 6.11 | 4.81 | 1.27 | 10.92 | 7.55 | 1.45 | +| 32 | 5.38 | 3.96 | 1.36 | 8.60 | 6.42 | 1.34 | 11.42 | 8.29 | 1.38 | 20.49 | 13.82 | 1.48 | +| 64 | 10.31 | 7.42 | 1.39 | 16.48 | 11.74 | 1.40 | 22.26 | 15.85 | 1.40 | 39.62 | 27.25 | 1.45 | diff --git a/docs/t5_guide.md b/docs/t5_guide.md index 7b14d31b1..c5ac716ce 100644 --- a/docs/t5_guide.md +++ b/docs/t5_guide.md @@ -7,6 +7,7 @@ The FasterTransformer T5 implements the huggingface t5 model (https://huggingfac - [FasterTransformer T5](#fastertransformer-t5) - [Table Of Contents](#table-of-contents) - [Introduction](#introduction) + - [Supported features](#supported-features) - [Model architecture](#model-architecture) - [Workflow](#workflow) - [Optimization](#optimization) @@ -19,11 +20,33 @@ The FasterTransformer T5 implements the huggingface t5 model (https://huggingfac - [Translation process](#translation-process) - [Performance](#performance) - [End-to-end translation performance on PyTorch](#end-to-end-translation-performance-on-pytorch) + - [T5-base on A100-40GB](#t5-base-on-a100-40gb) + - [T5-base on V100-16GB](#t5-base-on-v100-16gb) + - [T5-small on V100-16GB](#t5-small-on-v100-16gb) ## Introduction This document describes what FasterTransformer provides for the `T5` model, explaining the workflow and optimization. We also provide a guide to help users to run the `T5` model on FasterTransformer. Finally, we provide benchmark to demonstrate the speed of FasterTransformer on `T5`. +### Supported features + +* Checkpoint converter + * Huggingface + * Megatron + * NeMo Megatron +* Data type + * FP32 + * FP16 +* Feature + * Multi-GPU multi-node inference + * Dynamic random seed + * Stop tokens + * Beam search and sampling are both supported + * Loading FP32 or FP16 weights +* Frameworks + * PyTorch + * Triton backend + ## Model architecture ### Workflow @@ -49,13 +72,13 @@ The following section lists the requirements to use FasterTransformer. ### Requirements -- CMake >= 3.8 for Tensorflow, CMake >= 3.13 for PyTorch -- CUDA 10.1 or newer version +- CMake >= 3.13 for PyTorch +- CUDA 11.0 or newer version +- NCCL 2.10 or newer version - Python 3 is recommended because some features are not supported in python 2 -- Tensorflow 1.13 or 1.14 or 1.15 -- PyTorch >= 1.4.0 +- PyTorch: Verify on 1.10.0, >= 1.5.0 should work. -These components are readily available within the NGC TensorFlow Docker image below. +Recommend use nvcr image like `nvcr.io/nvidia/pytorch:21.11-py3`. Ensure you have the following components: - [NVIDIA Docker](https://github.com/NVIDIA/nvidia-docker) and NGC container are recommended @@ -65,7 +88,6 @@ For more information about how to get started with NGC containers, see the follo - [Getting Started Using NVIDIA GPU Cloud](https://docs.nvidia.com/ngc/ngc-getting-started-guide/index.html) - [Accessing And Pulling From The NGC Container Registry](https://docs.nvidia.com/deeplearning/frameworks/user-guide/index.html#accessing_registry) -- [Running TensorFlow](https://docs.nvidia.com/deeplearning/frameworks/tensorflow-release-notes/running.html#running) - [Running PyTorch](https://docs.nvidia.com/deeplearning/frameworks/pytorch-release-notes/index.html) For those unable to use the NGC container, to set up the required environment or create your own container, see the versioned [NVIDIA Container Support Matrix](https://docs.nvidia.com/deeplearning/frameworks/support-matrix/index.html). @@ -74,10 +96,10 @@ For those unable to use the NGC container, to set up the required environment or #### Prepare -You can choose the tensorflow version and python version you want. Here, we suggest image `nvcr.io/nvidia/pytorch:21.02-py3`, which contains the PyTorch 1.8.0 and python 3.8. +You can choose the pytorch version and python version you want. Here, we suggest image `nvcr.io/nvidia/pytorch:21.11-py3`, which contains the PyTorch 1.8.0 and python 3.8. ```bash - nvidia-docker run -ti --rm nvcr.io/nvidia/pytorch:21.02-py3 bash + nvidia-docker run -ti --rm nvcr.io/nvidia/pytorch:21.11-py3 bash git clone https://github.com/NVIDIA/FasterTransformer.git mkdir -p FasterTransformer/build cd FasterTransformer/build @@ -91,12 +113,21 @@ You can choose the tensorflow version and python version you want. Here, we sugg 1. build with PyTorch ```bash - cmake -DSM=xx -DCMAKE_BUILD_TYPE=Release -DBUILD_PYT=ON -DBUILD_GPT=ON .. + cmake -DSM=xx -DCMAKE_BUILD_TYPE=Release -DBUILD_PYT=ON -DBUILD_MULTI_GPU=ON .. make ``` This will build the TorchScript custom class. Please make sure that the `PyTorch >= 1.5.0`. +2. build with TensorRT + + Can use `nvcr.io/nvidia/pytorch:21.11-py3` docker image, too. + + ```bash + cmake -DSM=xx -DCMAKE_BUILD_TYPE=Release -DBUILD_TRT=ON -DBUILD_MULTI_GPU=ON .. + make + ``` + ## How to use ### Translation process @@ -105,7 +136,7 @@ You can choose the tensorflow version and python version you want. Here, we sugg Please install transformers first before running the demos by ```bash - pip install transformers + pip install -r ../examples/pytorch/t5/requirement.txt ``` 1.1 Generate the `gemm_config.in` file: @@ -126,7 +157,7 @@ You can choose the tensorflow version and python version you want. Here, we sugg - `decoder_size_per_head` = 64 - `decoder_inter_size` = 2048 - `decoder_vocab_size` = 32128 - - `data_type` = fp32 + - `data_type` = 0 (FP32) or 1 (FP16) or 2 (BF16) - `tensor_para_size` = 2 Then the following scripts can generate the best GEMM configuration under such settings and record the configuration into the `gemm_config.in` file. @@ -173,11 +204,89 @@ You can choose the tensorflow version and python version you want. Here, we sugg --pipeline_para_size 2 ``` +2. Run FasterTransformer T5 on TensorRT + + Please install transformers first before running the demos by + + ```bash + pip install -r ../examples/pytorch/t5/requirement.txt + ``` + + ```bash + python ../examples/tensorrt/t5/createT5TestData.py # get T5PluginTestIO.npz for test + + python ../examples/tensorrt/t5/extractT5ModelToBIN.py # get T5Model weight for test (need Internet) + + python ../examples/tensorrt/t5/testT5Plugin.py \ + --batch_size 32 \ + --beam_width 4 \ + --max_seq_len 128 \ + --data_type fp32 \ + --sampling_topk 4 + ``` +* Input/Output Tensor/Parameter of T5Encoder Plugin + +| Classification | Tensor/Parameter Shape | Data Type | Description | +| :-------------: | :------------------------------: | :------------: | :------------------------------------: | +| input tensor | | | | +| [0] | [batch_size,max_seq_len] | int32 | input token after tokenization | +| [1] | [batch_size] | int32 | real sequence length of each input | +| input parameter | | | | +| [0] | [] | int32 | max_batch_size | +| [1] | [] | int32 | max_seq_len | +| [2] | [] | int32 | beam_width (keep the same as decoding) | +| [3] | [] | int32 | head_num | +| [4] | [] | int32 | size_per_head | +| [5] | [] | int32 | inter_size | +| [6] | [] | int32 | d_model | +| [7] | [] | int32 | num_layer | +| [8] | [] | int32 | num_bucket | +| [9] | [] | int32 | max_distance | +| [10] | [] | int32 | sm | +| [11] | [] | float32 | q_scaling | +| [12] | [] | int32 | useFP16 | +| output tensor | | | | +| [0] | [batch_size,max_seq_len,d_model] | foat32/float16 | encoder output | + +* Input/Output Tensor/Parameter of T5Decoding Plugin + +| Classification | Tensor/Parameter Shape | Data Type | Description | +| :-------------: | :---------------------------------: | :-------------: | :---------------------------------: | +| input tensor | | | | +| [0] | [batch_size,max_seq_len,d_model] | foat32/float16 | encoder output | +| [1] | [batch_size] | int32 | real sequence length of each input | +| input parameter | | | | +| [0] | [] | int32 | max_batch_size | +| [1] | [] | int32 | max_seq_len | +| [2] | [] | int32 | mem_max_seq_len | +| [3] | [] | int32 | beam_width | +| [4] | [] | int32 | head_num | +| [5] | [] | int32 | size_per_head | +| [6] | [] | int32 | inter_size | +| [7] | [] | int32 | d_model | +| [8] | [] | int32 | num_layer | +| [9] | [] | int32 | vocab_size | +| [10] | [] | int32 | num_bucket | +| [11] | [] | int32 | max_distance | +| [12] | [] | int32 | start_id | +| [13] | [] | int32 | end_id | +| [14] | [] | float32 | beam_search_diversity_rate | +| [15] | [] | int32 | top_k | +| [16] | [] | float32 | top_p | +| [17] | [] | float32 | temperature | +| [18] | [] | float32 | len_penalty | +| [19] | [] | float32 | repetition_penalty | +| [20] | [] | int32 | usaeFP16 | +| output tensor | | | | +| [0] | [batch_size,beam_width,max_seq_len] | float32/float16 | decoding output | +| [1] | [batch_size,beam_width] | float32/float16 | real sequence length of each output | + ## Performance Hardware settings: * CPU: Intel(R) Xeon(R) Gold 6132 CPU @ 2.60GHz -* V100 (with mclk 877MHz, pclk 1380MHz) with Intel(R) Xeon(R) CPU E5-2698 v4 @ 2.20GHz (dgx-1 server) +* V100-16GB (with mclk 877MHz, pclk 1380MHz) with Intel(R) Xeon(R) CPU E5-2698 v4 @ 2.20GHz (dgx-1 server) +* A100-40GB To run the following benchmark, we need to install the unix computing tool "bc" by @@ -191,112 +300,166 @@ We demonstrate the throughput of huggingface and FT for end-to-end translation o Although the bleu scores of all methods are close, the results may be little different, and the number of generated tokens may be also different. So, we use throughput but not latency to show the performance in this benchmark. -#### T5-base +#### T5-base on A100-40GB + +* T5-base on FP32 with beamsearch + +| Batch Size | beamsearch | Precision | Huggingface
Throughput (token/sec) | FT Decoding
Throughput (token/sec) | FT Decoding
Speedup | +| :--------: | :--------: | :-------: | :--------------------------------------: | :--------------------------------------: | :-----------------------: | +| 1 | 4 | FP32 | 46 | 422 | 9.17 | +| 1 | 32 | FP32 | 34 | 339 | 9.97 | +| 8 | 4 | FP32 | 194 | 1779 | 9.17 | +| 8 | 32 | FP32 | 98 | 516 | 5.26 | +| 32 | 4 | FP32 | 486 | 2939 | 6.04 | +| 32 | 32 | FP32 | OOM | OOM | - | +| 128 | 4 | FP32 | 810 | 3445 | 4.25 | +| 128 | 32 | FP32 | OOM | OOM | - | + +* T5-base on FP16 with beamsearch + +| Batch Size | beamsearch | Precision | Huggingface
Throughput (token/sec) | FT Decoding
Throughput (token/sec) | FT Decoding
Speedup | +| :--------: | :--------: | :-------: | :--------------------------------------: | :--------------------------------------: | :-----------------------: | +| 1 | 4 | FP16 | 44 | 671 | 15.25 | +| 1 | 32 | FP16 | 25 | 517 | 20.68 | +| 8 | 4 | FP16 | 139 | 2807 | 20.19 | +| 8 | 32 | FP16 | 77 | 1573 | 20.42 | +| 32 | 4 | FP16 | 368 | 7102 | 19.29 | +| 32 | 32 | FP16 | 123 | 1830 | 14.87 | +| 128 | 4 | FP16 | 656 | 11312 | 17.24 | +| 128 | 32 | FP16 | OOM | 1845 | - | + +* T5-base on FP32 with sampling + +| Batch Size | sampling | Precision | Huggingface
Throughput (token/sec) | FT Decoding
Throughput (token/sec) | FT Decoding
Speedup | +| :--------: | :------: | :-------: | :--------------------------------------: | :--------------------------------------: | :-----------------------: | +| 1 | 4 | FP32 | 66 | 334 | 5.06 | +| 1 | 0.5 | FP32 | 65 | 323 | 4.97 | +| 8 | 4 | FP32 | 217 | 1887 | 8.70 | +| 8 | 0.5 | FP32 | 200 | 1765 | 8.83 | +| 32 | 4 | FP32 | 718 | 5211 | 7.26 | +| 32 | 0.5 | FP32 | 656 | 4731 | 7.21 | +| 128 | 4 | FP32 | 2115 | 8782 | 4.15 | +| 128 | 0.5 | FP32 | 1805 | 8212 | 4.55 | + +* T5-base on FP16 with sampling + +| Batch Size | sampling | Precision | Huggingface
Throughput (token/sec) | FT Decoding
Throughput (token/sec) | FT Decoding
Speedup | +| :--------: | :------: | :-------: | :--------------------------------------: | :--------------------------------------: | :-----------------------: | +| 1 | 4 | FP16 | 46 | 746 | 16.21 | +| 1 | 0.5 | FP16 | 43 | 706 | 16.41 | +| 8 | 4 | FP16 | 212 | 3293 | 15.53 | +| 8 | 0.5 | FP16 | 191 | 3049 | 15.96 | +| 32 | 4 | FP16 | 501 | 8783 | 17.53 | +| 32 | 0.5 | FP16 | 432 | 7961 | 18.42 | +| 128 | 4 | FP16 | 1426 | 18137 | 12.71 | +| 128 | 0.5 | FP16 | 1414 | 16680 | 11.79 | + +#### T5-base on V100-16GB * T5-base on FP32 with beamsearch | Batch Size | beamsearch | Precision | Huggingface
Throughput (token/sec) | FT Decoding
Throughput (token/sec) | FT Decoding
Speedup | -|:----------:|:--------------:|:---------:|:----------------------------------------:|:----------------------------------------:|:-------------------------:| -| 1 | 4 | FP32 | 28 | 257 | 9.17 | -| 1 | 32 | FP32 | 20 | 175 | 8.75 | -| 8 | 4 | FP32 | 105 | 953 | 9.07 | -| 8 | 32 | FP32 | 50 | 196 | 3.92 | -| 32 | 4 | FP32 | 247 | 1400 | 5.66 | -| 32 | 32 | FP32 | 0 | OOM | x | -| 128 | 4 | FP32 | 0 | 1448 | x | -| 128 | 32 | FP32 | OOM | OOM | x | +| :--------: | :--------: | :-------: | :--------------------------------------: | :--------------------------------------: | :-----------------------: | +| 1 | 4 | FP32 | 28 | 257 | 9.17 | +| 1 | 32 | FP32 | 20 | 175 | 8.75 | +| 8 | 4 | FP32 | 105 | 953 | 9.07 | +| 8 | 32 | FP32 | 50 | 196 | 3.92 | +| 32 | 4 | FP32 | 247 | 1400 | 5.66 | +| 32 | 32 | FP32 | 0 | OOM | x | +| 128 | 4 | FP32 | 0 | 1448 | x | +| 128 | 32 | FP32 | OOM | OOM | x | * T5-base on FP16 with beam search | Batch Size | beamsearch | Precision | Huggingface
Throughput (token/sec) | FT Decoding
Throughput (token/sec) | FT Decoding
Speedup | -|:----------:|:--------------:|:---------:|:----------------------------------------:|:----------------------------------------:|:-------------------------:| -| 1 | 4 | FP16 | 21 | 359 | 17.09 | -| 1 | 32 | FP16 | 14 | 250 | 17.85 | -| 8 | 4 | FP16 | 76 | 1418 | 18.65 | -| 8 | 32 | FP16 | 40 | 526 | 13.15 | -| 32 | 4 | FP16 | 221 | 2962 | 13.40 | -| 32 | 32 | FP16 | OOM | 684 | x | -| 128 | 4 | FP16 | 345 | 4079 | 11.82 | -| 128 | 32 | FP16 | OOM | OOM | x | +| :--------: | :--------: | :-------: | :--------------------------------------: | :--------------------------------------: | :-----------------------: | +| 1 | 4 | FP16 | 21 | 359 | 17.09 | +| 1 | 32 | FP16 | 14 | 250 | 17.85 | +| 8 | 4 | FP16 | 76 | 1418 | 18.65 | +| 8 | 32 | FP16 | 40 | 526 | 13.15 | +| 32 | 4 | FP16 | 221 | 2962 | 13.40 | +| 32 | 32 | FP16 | OOM | 684 | x | +| 128 | 4 | FP16 | 345 | 4079 | 11.82 | +| 128 | 32 | FP16 | OOM | OOM | x | * T5-base on FP32 with sampling | Batch Size | sampling | Precision | Huggingface
Throughput (token/sec) | FT Decoding
Throughput (token/sec) | FT Decoding
Speedup | -|:----------:|:--------------:|:---------:|:----------------------------------------:|:----------------------------------------:|:-------------------------:| -| 1 | 4 | FP32 | 26 | 226 | 8.69 | -| 1 | 0.5 | FP32 | 27 | 219 | 8.11 | -| 8 | 4 | FP32 | 115 | 1153 | 10.02 | -| 8 | 0.5 | FP32 | 130 | 1075 | 8.26 | -| 32 | 4 | FP32 | 327 | 3021 | 9.23 | -| 32 | 0.5 | FP32 | 297 | 2773 | 9.33 | -| 128 | 4 | FP32 | 1162 | 4184 | 3.60 | -| 128 | 0.5 | FP32 | 797 | 3975 | 4.98 | +| :--------: | :------: | :-------: | :--------------------------------------: | :--------------------------------------: | :-----------------------: | +| 1 | 4 | FP32 | 26 | 226 | 8.69 | +| 1 | 0.5 | FP32 | 27 | 219 | 8.11 | +| 8 | 4 | FP32 | 115 | 1153 | 10.02 | +| 8 | 0.5 | FP32 | 130 | 1075 | 8.26 | +| 32 | 4 | FP32 | 327 | 3021 | 9.23 | +| 32 | 0.5 | FP32 | 297 | 2773 | 9.33 | +| 128 | 4 | FP32 | 1162 | 4184 | 3.60 | +| 128 | 0.5 | FP32 | 797 | 3975 | 4.98 | * T5-base on FP16 with sampling | Batch Size | sampling | Precision | Huggingface
Throughput (token/sec) | FT Decoding
Throughput (token/sec) | FT Decoding
Speedup | -|:----------:|:--------------:|:---------:|:----------------------------------------:|:----------------------------------------:|:-------------------------:| -| 1 | 4 | FP16 | 19 | 364 | 19.15 | -| 1 | 0.5 | FP16 | 20 | 353 | 17.65 | -| 8 | 4 | FP16 | 83 | 1733 | 20.87 | -| 8 | 0.5 | FP16 | 98 | 1599 | 16.31 | -| 32 | 4 | FP16 | 337 | 4517 | 13.40 | -| 32 | 0.5 | FP16 | 301 | 4207 | 13.97 | -| 128 | 4 | FP16 | 956 | 8519 | 8.91 | -| 128 | 0.5 | FP16 | 723 | 7997 | 11.06 | - -#### T5-small +| :--------: | :------: | :-------: | :--------------------------------------: | :--------------------------------------: | :-----------------------: | +| 1 | 4 | FP16 | 19 | 364 | 19.15 | +| 1 | 0.5 | FP16 | 20 | 353 | 17.65 | +| 8 | 4 | FP16 | 83 | 1733 | 20.87 | +| 8 | 0.5 | FP16 | 98 | 1599 | 16.31 | +| 32 | 4 | FP16 | 337 | 4517 | 13.40 | +| 32 | 0.5 | FP16 | 301 | 4207 | 13.97 | +| 128 | 4 | FP16 | 956 | 8519 | 8.91 | +| 128 | 0.5 | FP16 | 723 | 7997 | 11.06 | + +#### T5-small on V100-16GB * T5-small on FP32 with beamsearch | Batch Size | beamsearch | Precision | Huggingface
Throughput (token/sec) | FT Decoding
Throughput (token/sec) | FT Decoding
Speedup | -|:----------:|:--------------:|:---------:|:----------------------------------------:|:----------------------------------------:|:-------------------------:| -| 1 | 4 | FP32 | 51 | 626 | 12.27 | -| 1 | 32 | FP32 | 30 | 413 | 13.76 | -| 8 | 4 | FP32 | 192 | 2462 | 12.82 | -| 8 | 32 | FP32 | 72 | 563 | 7.81 | -| 32 | 4 | FP32 | 383 | 4316 | 11.26 | -| 32 | 32 | FP32 | 104 | 668 | 6.42 | -| 128 | 4 | FP32 | 554 | 4747 | 8.56 | -| 128 | 32 | FP32 | OOM | OOM | x | +| :--------: | :--------: | :-------: | :--------------------------------------: | :--------------------------------------: | :-----------------------: | +| 1 | 4 | FP32 | 51 | 626 | 12.27 | +| 1 | 32 | FP32 | 30 | 413 | 13.76 | +| 8 | 4 | FP32 | 192 | 2462 | 12.82 | +| 8 | 32 | FP32 | 72 | 563 | 7.81 | +| 32 | 4 | FP32 | 383 | 4316 | 11.26 | +| 32 | 32 | FP32 | 104 | 668 | 6.42 | +| 128 | 4 | FP32 | 554 | 4747 | 8.56 | +| 128 | 32 | FP32 | OOM | OOM | x | * T5-small on FP16 with beamsearch | Batch Size | beamsearch | Precision | Huggingface
Throughput (token/sec) | FT Decoding
Throughput (token/sec) | FT Decoding
Speedup | -|:----------:|:--------------:|:---------:|:----------------------------------------:|:----------------------------------------:|:-------------------------:| -| 1 | 4 | FP16 | 35 | 776 | 22.17 | -| 1 | 32 | FP16 | 28 | 553 | 19.75 | -| 8 | 4 | FP16 | 163 | 3467 | 21.26 | -| 8 | 32 | FP16 | 71 | 1140 | 16.05 | -| 32 | 4 | FP16 | 365 | 7154 | 19.60 | -| 32 | 32 | FP16 | 108 | 1359 | 12.58 | -| 128 | 4 | FP16 | 524 | 11285 | 21.53 | -| 128 | 32 | FP16 | 0 | 942※| 0.00 | +| :--------: | :--------: | :-------: | :--------------------------------------: | :--------------------------------------: | :-----------------------: | +| 1 | 4 | FP16 | 35 | 776 | 22.17 | +| 1 | 32 | FP16 | 28 | 553 | 19.75 | +| 8 | 4 | FP16 | 163 | 3467 | 21.26 | +| 8 | 32 | FP16 | 71 | 1140 | 16.05 | +| 32 | 4 | FP16 | 365 | 7154 | 19.60 | +| 32 | 32 | FP16 | 108 | 1359 | 12.58 | +| 128 | 4 | FP16 | 524 | 11285 | 21.53 | +| 128 | 32 | FP16 | 0 | 942※ | 0.00 | ※: Out of memory on single GPU. Run by 2 ways tensor parallel. * T5-small on FP32 with sampling | Batch Size | sampling | Precision | Huggingface
Throughput (token/sec) | FT Decoding
Throughput (token/sec) | FT Decoding
Speedup | -|:----------:|:--------------:|:---------:|:----------------------------------------:|:----------------------------------------:|:-------------------------:| -| 1 | 4 | FP32 | 60 | 577 | 9.61 | -| 1 | 0.5 | FP32 | 57 | 524 | 9.19 | -| 8 | 4 | FP32 | 243 | 2821 | 11.60 | -| 8 | 0.5 | FP32 | 221 | 2345 | 10.61 | -| 32 | 4 | FP32 | 765 | 7865 | 10.28 | -| 32 | 0.5 | FP32 | 634 | 6365 | 10.03 | -| 128 | 4 | FP32 | 2238 | 12134 | 5.42 | -| 128 | 0.5 | FP32 | 1611 | 10439 | 6.47 | +| :--------: | :------: | :-------: | :--------------------------------------: | :--------------------------------------: | :-----------------------: | +| 1 | 4 | FP32 | 60 | 577 | 9.61 | +| 1 | 0.5 | FP32 | 57 | 524 | 9.19 | +| 8 | 4 | FP32 | 243 | 2821 | 11.60 | +| 8 | 0.5 | FP32 | 221 | 2345 | 10.61 | +| 32 | 4 | FP32 | 765 | 7865 | 10.28 | +| 32 | 0.5 | FP32 | 634 | 6365 | 10.03 | +| 128 | 4 | FP32 | 2238 | 12134 | 5.42 | +| 128 | 0.5 | FP32 | 1611 | 10439 | 6.47 | * T5-small on FP16 with sampling | Batch Size | sampling | Precision | Huggingface
Throughput (token/sec) | FT Decoding
Throughput (token/sec) | FT Decoding
Speedup | -|:----------:|:--------------:|:---------:|:----------------------------------------:|:----------------------------------------:|:-------------------------:| -| 1 | 4 | FP16 | 46 | 934 | 20.30 | -| 1 | 0.5 | FP16 | 42 | 862 | 20.52 | -| 8 | 4 | FP16 | 194 | 3510 | 18.09 | -| 8 | 0.5 | FP16 | 182 | 3235 | 17.77 | -| 32 | 4 | FP16 | 592 | 10692 | 18.06 | -| 32 | 0.5 | FP16 | 553 | 9008 | 16.28 | -| 128 | 4 | FP16 | 1921 | 19446 | 10.12 | -| 128 | 0.5 | FP16 | 1307 | 16810 | 12.86 | +| :--------: | :------: | :-------: | :--------------------------------------: | :--------------------------------------: | :-----------------------: | +| 1 | 4 | FP16 | 46 | 934 | 20.30 | +| 1 | 0.5 | FP16 | 42 | 862 | 20.52 | +| 8 | 4 | FP16 | 194 | 3510 | 18.09 | +| 8 | 0.5 | FP16 | 182 | 3235 | 17.77 | +| 32 | 4 | FP16 | 592 | 10692 | 18.06 | +| 32 | 0.5 | FP16 | 553 | 9008 | 16.28 | +| 128 | 4 | FP16 | 1921 | 19446 | 10.12 | +| 128 | 0.5 | FP16 | 1307 | 16810 | 12.86 | diff --git a/docs/vit_guide.md b/docs/vit_guide.md new file mode 100644 index 000000000..54ffaf811 --- /dev/null +++ b/docs/vit_guide.md @@ -0,0 +1,322 @@ +# Faster Vision Transformer(ViT) +The Faster Transformer contains the Vision Transformer model which was presented in [An Image is Worth 16x16 Words: Transformers for Image Recognition at Scale](https://arxiv.org/abs/2010.11929). The abstract of the paper is the following: + +>While the Transformer architecture has become the de-facto standard for natural +language processing tasks, its applications to computer vision remain limited. In +vision, attention is either applied in conjunction with convolutional networks, or +used to replace certain components of convolutional networks while keeping their +overall structure in place. We show that this reliance on CNNs is not necessary +and a pure transformer applied directly to sequences of image patches can perform +very well on image classification tasks. When pre-trained on large amounts of +data and transferred to multiple mid-sized or small image recognition benchmarks +(ImageNet, CIFAR-100, VTAB, etc.), Vision Transformer (ViT) attains excellent +results compared to state-of-the-art convolutional networks while requiring substantially +fewer computational resources to train. + +Our implementation is aligned with OpenSource PyTorch implementation [ViT Github](https://github.com/jeonsworld/ViT-pytorch). + +## Table of Contents +- [Faster Vision Transformer(ViT)](#faster-vision-transformervit) + - [Table of Contents](#table-of-contents) + - [Computation Flow](#computation-flow) + - [Demo](#demo) + - [Requirements](#requirements) + - [Setup](#setup) + - [Run](#run) + - [Run ViT on C++](#run-vit-on-c) + - [Run with PyTorch op](#run-with-pytorch-op) + - [Run with TensorRT plugin](#run-with-tensorrt-plugin) + - [Performance](#performance) + - [ViT Performance on T4](#vit-performance-on-t4) + - [FP32](#fp32) + - [FP16](#fp16) + - [INT8](#int8) + - [ViT Performance on A100](#vit-performance-on-a100) + - [FP32](#fp32-1) + - [FP16](#fp16-1) + - [INT8](#int8-1) + - [INT8 vs. FP16 speedup on ViT:](#int8-vs-fp16-speedup-on-vit) + +## Computation Flow +
+
Fig. 1 Flowchart of FP16/FP32 ViT.
+ +
+
Fig. 2 Flowchart of INT8 ViT (with fused MHA and quant_mode='ft2').
+ +## Demo + +In this demo, you can run Faster ViT as a C++ program. + +### Requirements + +- CMake >= 3.13 for PyTorch +- CUDA 11.0 or newer version +- NCCL 2.10 or newer version +- Python 3 is recommended because some features are not supported in python 2 +- PyTorch: Verify on 1.10.0, >= 1.5.0 should work. + +Recommand to use image `nvcr.io/nvidia/pytorch:21.07-py3`. + +> docker run -ti --gpus all --rm nvcr.io/nvidia/pytorch:21.07-py3 bash + +### Setup + +1. Start the docker container, ensure mounting the project directory into it. For example: + ```bash + docker run \ + -it \ + --rm \ + --gpus=all \ + "--cap-add=SYS_ADMIN" \ + --shm-size=16g \ + --ulimit memlock=-1 \ + --ulimit stack=67108864 \ + -v {YOUR_FASTER_TRANSFORMER_PROJECT_DIR_ON_HOST}:/workspace/FasterTransformer \ + --workdir /workspace/FasterTransformer \ + nvcr.io/nvidia/pytorch:21.07-py3 bash + export WORKSPACE = /workspace/FasterTransformer + ``` + Here, we use `nvcr.io/nvidia/pytorch:21.07-py3`, you can also switch it to another CUDA-enabled PyTorch containers, but need to comply with the previous requirements. + +2. Install additional dependencies (not included by container) + ```bash + cd $WORKSPACE + pip install -r examples/pytorch/vit/requirement.txt + ``` + +3. Build the FasterTransformer with C++: + ```bash + cd $WORKSPACE + git submodule update --init + mkdir -p build + cd build + cmake -DSM=xx -DCMAKE_BUILD_TYPE=Release -DBUILD_PYT=ON -DBUILD_TRT=ON .. + make + ``` + Note: **xx** is the compute capability of your GPU. For example, 60 (P40) or 61 (P4) or 70 (V100) or 75(T4) or 80 (A100). + +### Run + +#### Run ViT on C++ + +Firstly we use `./bin/vit_gemm` as the tool to search the best GEMM configuration. And then run `./bin/vit_example` or `./bin/vit_int8_example`. +```bash +# is_fp16=0 indicates FP32, is_fp16=1 indicates FP16 +# with_cls_token=1 indicates concatenated class token in feature embedding, with_cls_token=0 indicates no class token in feature embedding. +./bin/vit_gemm +./bin/vit_example +./bin/vit_int8_example +``` +Take ViT-B_16 with batch=32 and w=h=384 as an example: +```bash +# Run ViT-B_16 under FP32 on C++: +./bin/vit_gemm 32 384 16 768 12 1 0 0 +./bin/vit_example 32 384 16 768 12 12 1 0 + +# Run ViT-B_16 under FP16 on C++ +./bin/vit_gemm 32 384 16 768 12 1 1 0 +./bin/vit_example 32 384 16 768 12 12 1 1 + +# Run ViT-B_16 under INT8 on C++ +./bin/vit_gemm 32 384 16 768 12 1 1 2 +./bin/vit_int8_example 32 384 16 768 12 12 1 1 2 +``` + +#### Run with PyTorch op +Download Pre-trained model (Google's Official Checkpoint) +```bash +cd $WORKSPACE/examples/pytorch/vit/ViT-quantization +# MODEL_NAME={ViT-B_16-224, ViT-B_16, ViT-B_32, ViT-L_16-224, ViT-L_16, ViT-L_32} +# wget https://storage.googleapis.com/vit_models/imagenet21k+imagenet2012/{MODEL_NAME}.npz +wget https://storage.googleapis.com/vit_models/imagenet21k+imagenet2012/ViT-B_16.npz +``` + +**Run FP16/FP32 pytorch op** +```bash +cd $WORKSPACE/examples/pytorch/vit +pip install ml_collections + +##profile of FP16/FP32 model +python infer_visiontransformer_op.py \ + --model_type=ViT-B_16 \ + --img_size=384 \ + --pretrained_dir=./ViT-quantization/ViT-B_16.npz \ + --batch-size=32 \ + --th-path=$WORKSPACE/build/lib/libpyt_vit.so +``` + +**Run INT8 pytorch op** +1. Get calibrated checkpoint + +Refer to [Guide of ViT Quantization Toolkit](../examples/pytorch/vit/ViT-quantization/README.md#usage) for details on setting datasets, PTQ and QAT. +```bash +cd $WORKSPACE/examples/pytorch/vit/ViT-quantization +export DATA_DIR=Path to the dataset +export CKPT_DIR=Path to the ViT checkpoints +python -m torch.distributed.launch --nproc_per_node 1 \ + --master_port 12345 main.py \ + --calib \ + --name vit \ + --pretrained_dir $CKPT_DIR/ViT-B_16.npz \ + --data-path $DATA_DIR \ + --model_type ViT-B_16 \ + --img_size 384 \ + --num-calib-batch 20 \ + --calib-batchsz 8 \ + --quant-mode ft2 \ + --calibrator percentile \ + --percentile 99.99 \ + --calib-output-path $CKPT_DIR + +``` +**NOTE: Difference between `--quant-mode ft1` and `--quant-mode ft2`**: + +`--quant-mode 1` indicates that all GEMMs are quantized to be INT8-in-INT32-out, while `--quant-mode 2` means quantizating all GEMMs to be INT8-in-INT8-out. This is a speed-versus-accuracy trade-off: `ft2` is faster in CUDA implementation but its accuracy is lower. +| name | resolution | Original Accuracy | PTQ(mode=1) | PTQ(mode=2) | +| :------: | :--------: | :---------------: | :------------: | :------------: | +| ViT-B_16 | 384x384 | 83.97% | 82.57%(-1.40%) | 81.82%(-2.15%) | + +In order to reduce the accuracy loss for `ft2`, QAT is a reasonable choice. + + + +2. Run test +```bash +cd $WORKSPACE/examples/pytorch/vit +python infer_visiontransformer_int8_op.py \ + --model_type=ViT-B_16 \ + --img_size 384 \ + --calibrated_dir $CKPT_DIR/ViT-B_16_calib.pth \ + --batch-size=32 \ + --th-path=$WORKSPACE/build/lib/libpyt_vit.so \ + --quant-mode ft2 +``` + +#### Run with TensorRT plugin +**FP16/FP32 TensorRT plugin** +```bash +cd $WORKSPACE/examples/tensorrt/vit +#FP16 engine build & infer +python infer_visiontransformer_plugin.py \ + --model_type=ViT-B_16 \ + --img_size=384 \ + --pretrained_dir=$WORKSPACE/examples/pytorch/vit/ViT-quantization/ViT-B_16.npz \ + --plugin_path=../../../build/lib/libvit_plugin.so \ + --batch-size=32 \ + --fp16 + +#FP32 engine build & infer +python infer_visiontransformer_plugin.py \ + --model_type=ViT-B_16 \ + --img_size=384 \ + --pretrained_dir=$WORKSPACE/examples/pytorch/vit/ViT-quantization/ViT-B_16.npz \ + --plugin_path=../../../build/lib/libvit_plugin.so \ + --batch-size=32 + +``` + +## Performance + +Hardware settings: +* T4 (with mclk 5000MHz, pclk 1590MHz) with Intel(R) Xeon(R) Gold 6132 CPU @ 2.60GHz +* A100 (with mclk 1215, pclk 1410MHz) with Intel(R) Xeon(R) Gold 6132 CPU @ 2.60GHz + +Software settings: +* CUDA 11.4 + +We here compared the performance between Vision Transformer and FT Vision Transformer on T4 & A100. Here we used ViT-B_16 as an example, and the hyper-parameters of the model are: + +* img_size = 384 +* patches = 16 +* head_num = 12 +* embed_dim = 768 +* num_of_layers = 12 +* with_cls_token = 1 + +### ViT Performance on T4 + +#### FP32 +| Batch_size | torch
latency(ms) | cpp
latency(ms) | speedup | trt plugin
latency(ms) | speedup | torch op
latency(ms) | speedup | +| :--------: | :---------------------: | :-------------------: | :-----: | :--------------------------: | :-----: | :------------------------: | :-----: | +| 1 | 36.79 | 33.92 | 1.08 | 35.94 | 1.02 | 34.94 | 1.05 | +| 8 | 295.55 | 259.98 | 1.13 | 276.95 | 1.06 | 264.08 | 1.11 | +| 16 | 571.62 | 533.05 | 1.07 | 526.4 | 1.08 | 525.36 | 1.08 | +| 32 | 1212.99 | 1123.58 | 1.07 | 1140.77 | 1.06 | 1116.38 | 1.08 | + +#### FP16 +| Batch_size | torch
latency(ms) | cpp
latency(ms) | speedup | trt plugin
latency(ms) | speedup | torch op
latency(ms) | speedup | +| :--------: | :---------------------: | :-------------------: | :-----: | :--------------------------: | :-----: | :------------------------: | :-----: | +| 1 | 18.48 | 9.01 | 2.05 | 9.25 | 1.99 | 9.19 | 2.01 | +| 8 | 161.72 | 65.59 | 2.46 | 66.51 | 2.43 | 68.23 | 2.37 | +| 16 | 330.52 | 131.48 | 2.51 | 134.87 | 2.45 | 137.9 | 2.39 | +| 32 | 684.27 | 263.17 | 2.60 | 263.54 | 2.59 | 294.23 | 2.32 | + +#### INT8 +| Batch_size | cpp
latency(ms) | speedup(vs FP16) | torch op
latency(ms) | speedup(vs FP16) | +| :--------: | :-------------------: | :--------------: | :------------------------: | :--------------: | +| 1 | 4.93 | 1.73 | 5.50 | 1.67 | +| 8 | 36.40 | 1.68 | 41.56 | 1.64 | +| 16 | 74.94 | 1.65 | 87.17 | 1.58 | +| 32 | 150.31 | 1.68 | 173.32 | 1.70 | + +INT8 vs. FP16 speedup on ViT : +| Batch_size | B_16 (FP16)
latency(ms) | B_16 (INT8)
latency(ms) | Speedup | B_16-224 (FP16)
latency(ms) | B_16-224 (INT8)
latency(ms) | Speedup | L_16 (FP16)
latency(ms) | L_16 (INT8)
latency(ms) | Speedup | L_16-224 (FP16)
latency(ms) | L_16-224 (INT8)
latency(ms) | Speedup | +| :--------: | :---------------------------: | :---------------------------: | :-----: | :-------------------------------: | :-------------------------------: | :-----: | :---------------------------: | :---------------------------: | :-----: | :-------------------------------: | :-------------------------------: | :-----: | +| 1 | 8.53 | 4.93 | 1.73 | 3.43 | 2.16 | 1.59 | 23.45 | 13.10 | 1.79 | 9.69 | 5.04 | 1.92 | +| 8 | 61.07 | 36.40 | 1.68 | 14.46 | 8.37 | 1.73 | 177.54 | 103.66 | 1.71 | 47.55 | 24.38 | 1.95 | +| 16 | 123.55 | 74.94 | 1.65 | 28.77 | 16.67 | 1.73 | 358.70 | 211.89 | 1.69 | 90.30 | 47.29 | 1.91 | +| 32 | 253.20 | 150.31 | 1.68 | 57.22 | 35.43 | 1.62 | 748.81 | 425.36 | 1.76 | 171.89 | 101.25 | 1.70 | + + +### ViT Performance on A100 + +#### FP32 +User can use `export NVIDIA_TF32_OVERRIDE=0` to enforce the program run under FP32 on Ampere GPU. +| Batch_size | torch
latency(ms) | cpp
latency(ms) | speedup | trt plugin
latency(ms) | speedup | torch op
latency(ms) | speedup | +| :--------: | :---------------------: | :-------------------: | :-----: | :--------------------------: | :-----: | :------------------------: | :-----: | +| 1 | 12.38 | 10.38 | 1.19 | 10.93 | 1.13 | 11.1 | 1.12 | +| 8 | 74.31 | 72.03 | 1.03 | 72.19 | 1.03 | 72.28 | 1.03 | +| 16 | 147.48 | 135.5 | 1.09 | 137.69 | 1.07 | 138.51 | 1.06 | +| 32 | 290.7 | 266.29 | 1.09 | 270.74 | 1.07 | 270.9 | 1.07 | + +#### FP16 +| Batch_size | torch
latency(ms) | cpp
latency(ms) | speedup | trt plugin
latency(ms) | speedup | torch op
latency(ms) | speedup | +| :--------: | :---------------------: | :-------------------: | :-----: | :--------------------------: | :-----: | :------------------------: | :-----: | +| 1 | 9.58 | 2.13 | 4.50 | 2.33 | 4.11 | 3.51 | 2.73 | +| 8 | 30.41 | 11.23 | 2.71 | 11.59 | 2.62 | 11.63 | 2.61 | +| 16 | 60.39 | 21.56 | 2.80 | 22 | 2.75 | 22.3 | 2.71 | +| 32 | 121.17 | 43.91 | 2.76 | 44.65 | 2.71 | 45.43 | 2.67 | + +#### INT8 +| Batch_size | cpp
latency(ms) | speedup(vs FP16) | torch op
latency(ms) | speedup(vs FP16) | +| :--------: | :-------------------: | :--------------: | :------------------------: | :--------------: | +| 1 | 2.26 | 0.99 | 2.38 | 1.47 | +| 8 | 7.93 | 1.41 | 8.45 | 1.38 | +| 16 | 14.66 | 1.47 | 15.91 | 1.40 | +| 32 | 29.07 | 1.51 | 31.78 | 1.43 | + +#### INT8 vs. FP16 speedup on ViT: +| Batch_size | B_16 (FP16)
latency(ms) | B_16 (INT8)
latency(ms) | Speedup | B_16-224 (FP16)
latency(ms) | B_16-224 (INT8)
latency(ms) | Speedup | L_16 (FP16)
latency(ms) | L_16 (INT8)
latency(ms) | Speedup | L_16-224 (FP16)
latency(ms) | L_16-224 (INT8)
latency(ms) | Speedup | +| :--------: | :---------------------------: | :---------------------------: | :-----: | :-------------------------------: | :-------------------------------: | :-----: | :---------------------------: | :---------------------------: | :-----: | :-------------------------------: | :-------------------------------: | :-----: | +| 1 | 2.24 | 2.26 | 0.99 | 1.53 | 1.52 | 1.01 | 5.36 | 4.77 | 1.12 | 2.97 | 2.91 | 1.02 | +| 8 | 11.14 | 7.93 | 1.41 | 3.03 | 2.38 | 1.27 | 30.95 | 20.25 | 1.53 | 8.09 | 5.44 | 1.49 | +| 16 | 21.50 | 14.66 | 1.47 | 5.30 | 3.74 | 1.42 | 60.99 | 39.43 | 1.57 | 15.03 | 9.23 | 1.63 | +| 32 | 43.81 | 29.07 | 1.51 | 10.04 | 6.43 | 1.56 | 124.85 | 80.05 | 1.56 | 29.66 | 17.28 | 1.72 | + + + + + + + + + + + + + + + + + diff --git a/docs/xlnet_guide.md b/docs/xlnet_guide.md index c2473ef2c..360f21136 100644 --- a/docs/xlnet_guide.md +++ b/docs/xlnet_guide.md @@ -30,15 +30,18 @@ This FasterTransformer XLNet implementation is aligned with [XLNet Github](https In this demo, you can run the XLNet as a C++ program. ### Requirements -- CUDA 10.1 or newer version -For correctness check: -- Python 3 -- Tensorflow 1.13 or 1.14 or 1.15. +- CMake >= 3.8 +- CUDA 11.0 or newer version +- NCCL 2.10 or newer version +- Python 3 is recommended because some features are not supported in python 2 +- Tensorflow: Verify on 1.15, 1.13 and 1.14 should work. Recommand to use image `nvcr.io/nvidia/tensorflow:20.12-tf1-py3`. -> docker run -ti --gpus all --rm nvcr.io/nvidia/tensorflow:20.12-tf1-py3 bash +```bash +docker run -ti --gpus all --rm nvcr.io/nvidia/tensorflow:20.12-tf1-py3 bash +``` ### Setup @@ -74,9 +77,9 @@ cd /workspace/FasterTransformer/build ```bash ./bin/xlnet_gemm -./bin/xlnet_example +./bin/xlnet_example ``` - +Data Type = 0 (FP32) or 1 (FP16) or 2 (BF16) - Run XLNet under FP32 on C++ ```bash ./bin/xlnet_gemm 8 128 12 64 0 @@ -89,6 +92,12 @@ cd /workspace/FasterTransformer/build ./bin/xlnet_example 8 12 128 12 64 1 ``` +- Run XLNet under FP16 on C++ +```bash +./bin/xlnet_gemm 8 128 12 64 2 +./bin/xlnet_example 8 12 128 12 64 2 +``` + #### Verify the correctness ```bash cd examples/tensorflow/xlnet diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt index 299afed77..4f946e7fd 100644 --- a/examples/CMakeLists.txt +++ b/examples/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/cpp/CMakeLists.txt b/examples/cpp/CMakeLists.txt index 4ae1abee9..b67cd01f2 100644 --- a/examples/cpp/CMakeLists.txt +++ b/examples/cpp/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -16,9 +16,13 @@ add_subdirectory(bert) add_subdirectory(bert_int8) add_subdirectory(decoding) add_subdirectory(gpt) -add_subdirectory(gptj) add_subdirectory(xlnet) +add_subdirectory(swin) +add_subdirectory(swin_int8) +add_subdirectory(vit) +add_subdirectory(vit_int8) -if(BUILD_GPT) +if(BUILD_MULTI_GPU) + add_subdirectory(gptj) add_subdirectory(multi_gpu_gpt) endif() diff --git a/examples/cpp/bert/CMakeLists.txt b/examples/cpp/bert/CMakeLists.txt index c83577e80..e1672d85b 100644 --- a/examples/cpp/bert/CMakeLists.txt +++ b/examples/cpp/bert/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/cpp/bert/bert_example.cc b/examples/cpp/bert/bert_example.cc index 2548b4bd7..28b4d7a5f 100644 --- a/examples/cpp/bert/bert_example.cc +++ b/examples/cpp/bert/bert_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -15,6 +15,8 @@ */ #include "src/fastertransformer/models/bert/Bert.h" +#include "src/fastertransformer/utils/logger.h" + using namespace fastertransformer; template @@ -29,13 +31,14 @@ int bertExample(size_t batch_size, int main(int argc, char** argv) { if (argc != 8 && argc != 9) { - printf("[ERROR] bert_example batch_size num_layers seq_len head_num size_per_head is_fp16 is_remove_padding\n"); - printf("e.g., ./bin/bert_example 32 12 32 12 64 0 0\n"); + FT_LOG_ERROR("bert_example batch_size num_layers seq_len head_num size_per_head is_fp16 is_remove_padding"); + FT_LOG_ERROR("e.g., ./bin/bert_example 32 12 32 12 64 0 0"); return 0; } bool allow_gemm_test = false; - if (argc == 9) + if (argc == 9) { allow_gemm_test = (atoi(argv[8]) == 1) ? true : false; + } int batch_size = atoi(argv[1]); int num_layers = atoi(argv[2]); @@ -165,13 +168,13 @@ int bertExample(size_t batch_size, } float total_time = cuda_timer.stop(); - printf("[INFO] batch_size %ld seq_len %ld layer %ld " - "FT-CPP-time %.2f ms (%d iterations) \n", - batch_size, - seq_len, - num_layers, - total_time / ite, - ite); + FT_LOG_INFO("batch_size %ld seq_len %ld layer %ld " + "FT-CPP-time %.2f ms (%d iterations) ", + batch_size, + seq_len, + num_layers, + total_time / ite, + ite); #ifdef SPARSITY_ENABLED cusparseLtDestroy(&cusparselt_handle); diff --git a/examples/cpp/bert_int8/CMakeLists.txt b/examples/cpp/bert_int8/CMakeLists.txt index 9edaa01a0..1d04c97d6 100644 --- a/examples/cpp/bert_int8/CMakeLists.txt +++ b/examples/cpp/bert_int8/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/cpp/bert_int8/bert_int8_example.cc b/examples/cpp/bert_int8/bert_int8_example.cc index 1acd69184..f1534ebe0 100644 --- a/examples/cpp/bert_int8/bert_int8_example.cc +++ b/examples/cpp/bert_int8/bert_int8_example.cc @@ -15,9 +15,14 @@ */ #include "src/fastertransformer/models/bert_int8/BertINT8.h" + +#ifndef CUDART_VERSION +#error CUDART_VERSION Undefined! +#endif + using namespace fastertransformer; -template +template int bertINT8Example(size_t batch_size, size_t num_layers, size_t seq_len, @@ -27,18 +32,18 @@ int bertINT8Example(size_t batch_size, bool is_remove_padding, bool allow_gemm_test = false); -int main(int argc, char **argv) +int main(int argc, char** argv) { - if (argc != 9 && argc != 10) - { + if (argc != 9 && argc != 10) { printf("[ERROR] bert_int8_example batch_size num_layers seq_len head_num" "size_per_head is_fp16 is_remove_padding int8_mode\n"); printf("e.g., ./bin/bert_int8_example 1 12 128 12 64 1 0 2\n"); return 0; } bool allow_gemm_test = false; - if (argc == 10) + if (argc == 10) { allow_gemm_test = (atoi(argv[9]) == 1) ? true : false; + } int batch_size = atoi(argv[1]); int num_layers = atoi(argv[2]); @@ -48,25 +53,21 @@ int main(int argc, char **argv) int int8_mode = atoi(argv[8]); bool is_remove_padding = static_cast(atoi(argv[7])); - if (atoi(argv[6]) == 0) - { - return bertINT8Example(batch_size, num_layers, seq_len, head_num, - size_per_head, int8_mode, is_remove_padding, allow_gemm_test); + if (atoi(argv[6]) == 0) { + return bertINT8Example( + batch_size, num_layers, seq_len, head_num, size_per_head, int8_mode, is_remove_padding, allow_gemm_test); } - else if (atoi(argv[6]) == 1) - { - return bertINT8Example(batch_size, num_layers, seq_len, head_num, - size_per_head, int8_mode, is_remove_padding, allow_gemm_test); + else if (atoi(argv[6]) == 1) { + return bertINT8Example( + batch_size, num_layers, seq_len, head_num, size_per_head, int8_mode, is_remove_padding, allow_gemm_test); } - else - { - throw std::runtime_error( - std::string("[FT][ERROR] is_fp16 should be 0 (use float)" - "or 1 (use half). \n ")); + else { + throw std::runtime_error(std::string("[FT][ERROR] is_fp16 should be 0 (use float)" + "or 1 (use half). \n ")); } } -template +template int bertINT8Example(size_t batch_size, size_t num_layers, size_t seq_len, @@ -89,83 +90,79 @@ int bertINT8Example(size_t batch_size, cusparseLtHandle_t cusparselt_handle; CHECK_CUSPARSE(cusparseLtInit(&cusparselt_handle)); #endif - cublasAlgoMap *cublas_algo_map = new cublasAlgoMap("igemm_config.in"); + cublasAlgoMap* cublas_algo_map = new cublasAlgoMap("igemm_config.in"); int sm = getSMVersion(); Allocator allocator(getDevice()); - std::mutex *cublas_wrapper_mutex = new std::mutex(); - + std::mutex* cublas_wrapper_mutex = new std::mutex(); + bool use_ORDER_COL32_2R_4R4 = false; -#ifdef CUDA11_MODE - if (sm >= 80) - { +#if (CUDART_VERSION >= 11000) + if (sm >= 80) { use_ORDER_COL32_2R_4R4 = true; } #endif #ifdef SPARSITY_ENABLED - cublasINT8MMWrapper cublas_wrapper = cublasINT8MMWrapper(cublaslt_handle, cusparselt_handle, stream, - cublas_algo_map, cublas_wrapper_mutex, use_ORDER_COL32_2R_4R4); + cublasINT8MMWrapper cublas_wrapper = cublasINT8MMWrapper( + cublaslt_handle, cusparselt_handle, stream, cublas_algo_map, cublas_wrapper_mutex, use_ORDER_COL32_2R_4R4); #else - cublasINT8MMWrapper cublas_wrapper = cublasINT8MMWrapper(cublaslt_handle, stream, - cublas_algo_map, cublas_wrapper_mutex, use_ORDER_COL32_2R_4R4); + cublasINT8MMWrapper cublas_wrapper = + cublasINT8MMWrapper(cublaslt_handle, stream, cublas_algo_map, cublas_wrapper_mutex, use_ORDER_COL32_2R_4R4); #endif - std::vector> bert_layer_weights(num_layers, BertLayerINT8Weight(hidden_units, inter_size)); - - AttentionType attention_type = - getAttentionTypeINT8(size_per_head, sm, - is_remove_padding, seq_len, int8_mode); - - BertINT8 bert_int8 = BertINT8( - batch_size, seq_len, head_num, size_per_head, - inter_size, - num_layers, - sm, - 1.0f, - int8_mode, - stream, - &cublas_wrapper, - &allocator, - false, attention_type); - - T *out_tensor; - T *from_tensor; + std::vector> bert_layer_weights(num_layers, + BertLayerINT8Weight(hidden_units, inter_size)); + + AttentionType attention_type = getAttentionTypeINT8(size_per_head, sm, is_remove_padding, seq_len, int8_mode); + + BertINT8 bert_int8 = BertINT8(batch_size, + seq_len, + head_num, + size_per_head, + inter_size, + num_layers, + sm, + 1.0f, + int8_mode, + stream, + &cublas_wrapper, + &allocator, + false, + attention_type); + + T* out_tensor; + T* from_tensor; deviceMalloc(&out_tensor, batch_size * seq_len * head_num * size_per_head, false); deviceMalloc(&from_tensor, batch_size * seq_len * head_num * size_per_head, false); - int *h_sequence_lengths = new int[batch_size]; + int* h_sequence_lengths = new int[batch_size]; unsigned int seed = 0; - for (uint i = 0; i < batch_size; i++) - { + for (uint i = 0; i < batch_size; i++) { h_sequence_lengths[i] = rand_r(&seed) % seq_len; } - int *d_sequence_lengths; + int* d_sequence_lengths; deviceMalloc(&d_sequence_lengths, batch_size); - cudaMemcpy(d_sequence_lengths, h_sequence_lengths, - sizeof(int) * batch_size, cudaMemcpyHostToDevice); + cudaMemcpy(d_sequence_lengths, h_sequence_lengths, sizeof(int) * batch_size, cudaMemcpyHostToDevice); delete[] h_sequence_lengths; - std::vector input_tensors = std::vector{ - Tensor{MEMORY_GPU, getTensorType(), - std::vector{batch_size, seq_len, - (size_t)(head_num * size_per_head)}, - from_tensor}, - Tensor{MEMORY_GPU, TYPE_INT32, - std::vector{batch_size}, - d_sequence_lengths}}; - - std::vector output_tensors = std::vector{ - Tensor{MEMORY_GPU, getTensorType(), - std::vector{batch_size, seq_len, - (size_t)(head_num * size_per_head)}, - out_tensor}}; + std::vector input_tensors = + std::vector{Tensor{MEMORY_GPU, + getTensorType(), + std::vector{batch_size, seq_len, (size_t)(head_num * size_per_head)}, + from_tensor}, + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{batch_size}, d_sequence_lengths}}; + + std::vector output_tensors = + std::vector{Tensor{MEMORY_GPU, + getTensorType(), + std::vector{batch_size, seq_len, (size_t)(head_num * size_per_head)}, + out_tensor}}; // warmup - for (int i = 0; i < 100; i++) - { + for (int i = 0; i < 100; i++) { bert_int8.forward(&output_tensors, &input_tensors, &bert_layer_weights); } @@ -173,15 +170,18 @@ int bertINT8Example(size_t batch_size, const int ite = 100; CudaTimer cuda_timer(stream); cuda_timer.start(); - for (int i = 0; i < ite; i++) - { + for (int i = 0; i < ite; i++) { bert_int8.forward(&output_tensors, &input_tensors, &bert_layer_weights); } float total_time = cuda_timer.stop(); printf("[INFO] batch_size %ld seq_len %ld layer %ld " "FT-CPP-time %.2f ms (%d iterations) \n", - batch_size, seq_len, num_layers, total_time / ite, ite); + batch_size, + seq_len, + num_layers, + total_time / ite, + ite); #ifdef SPARSITY_ENABLED cusparseLtDestroy(&cusparselt_handle); diff --git a/examples/cpp/decoding/CMakeLists.txt b/examples/cpp/decoding/CMakeLists.txt index f7bb665d2..378cbfe43 100644 --- a/examples/cpp/decoding/CMakeLists.txt +++ b/examples/cpp/decoding/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -14,3 +14,6 @@ add_executable(decoding_example decoding_example.cc) target_link_libraries(decoding_example PUBLIC -lcublasLt Decoding nvtx_utils) + +add_executable(layernorm_test layernorm_test.cc) +target_link_libraries(layernorm_test PUBLIC -lcublasLt layernorm_kernels memory_utils) diff --git a/examples/cpp/decoding/decoding_example.cc b/examples/cpp/decoding/decoding_example.cc index 5545f75ab..f14983b0f 100644 --- a/examples/cpp/decoding/decoding_example.cc +++ b/examples/cpp/decoding/decoding_example.cc @@ -148,9 +148,9 @@ int decodingExample(const size_t batch_size, 0.0f, top_k, top_p, - 1.0, // temperature + 1.0, // temperature 1.0f, // len_penalty, - 1.0, // repetition_penalty + 1.0, // repetition_penalty stream, &cublas_wrapper, &allocator, @@ -179,18 +179,11 @@ int decodingExample(const size_t batch_size, getTensorType(), std::vector{batch_size * beam_width, memory_max_seq_len, memory_hidden_units}, d_memory_tensor}, - Tensor{ - MEMORY_GPU, TYPE_INT32, std::vector{batch_size * beam_width}, d_memory_sequence_lengths}}; + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{batch_size * beam_width}, d_memory_sequence_lengths}}; std::vector output_tensors = std::vector{ - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{(size_t)max_seq_len, batch_size, beam_width}, - d_output_ids}, - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{(size_t)max_seq_len, batch_size, beam_width}, - d_parent_ids}, + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{(size_t)max_seq_len, batch_size, beam_width}, d_output_ids}, + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{(size_t)max_seq_len, batch_size, beam_width}, d_parent_ids}, Tensor{MEMORY_GPU, TYPE_INT32, std::vector{batch_size, beam_width}, d_sequence_lengths}}; print_mem_usage(); diff --git a/examples/cpp/decoding/layernorm_test.cc b/examples/cpp/decoding/layernorm_test.cc new file mode 100644 index 000000000..b788055ac --- /dev/null +++ b/examples/cpp/decoding/layernorm_test.cc @@ -0,0 +1,229 @@ +/* + * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/layernorm_kernels.h" +#include "src/fastertransformer/utils/memory_utils.h" +#include +#include + +using namespace fastertransformer; + +template +int checkNonZero(T* A, int size) +{ + T* h_A = (T*)malloc(sizeof(T) * size); + cudaMemcpy(h_A, A, sizeof(T) * size, cudaMemcpyDeviceToHost); + int noneZeroNum = 0; + for (int ii = 0; ii < size; ii++) { + if (fabs(float(h_A[ii]) - 0.0f) > 0.0001f) { + noneZeroNum += 1; + } + } + free(h_A); + return noneZeroNum; +} + +template +void checkMat(TA* A, TB* B, int size, char* mark) +{ + float max_diff = -10000.0f; + float max_diff_a, max_diff_b; + TA* matA = (TA*)malloc(sizeof(TA) * size); + TB* matB = (TB*)malloc(sizeof(TB) * size); + int not_passed = 0; + cudaMemcpy(matA, A, sizeof(TA) * size, cudaMemcpyDeviceToHost); + cudaMemcpy(matB, B, sizeof(TB) * size, cudaMemcpyDeviceToHost); + float A_nonZero_ratio = float(checkNonZero(A, size)) / float(size); + float B_nonZero_ratio = float(checkNonZero(B, size)) / float(size); + if (A_nonZero_ratio < 0.1 || B_nonZero_ratio < 0.1) { + printf("[%s] nonZero ratio [%f] [%f]\n", mark, A_nonZero_ratio, B_nonZero_ratio); + } + for (int jjj = 0; jjj < size; jjj++) { + float diff = fabs(float(matA[jjj]) - float(matB[jjj])); + if (diff > max_diff) { + max_diff = diff; + max_diff_a = float(matA[jjj]); + max_diff_b = float(matB[jjj]); + } + if (fabs(float(matA[jjj]) - float(matB[jjj])) > 0.001) { + not_passed += 1; + if (not_passed < 1000) { + printf("%d %f %f %f\n", jjj, float(matA[jjj]), float(matB[jjj]), float(matA[jjj]) - float(matB[jjj])); + } + } + } + printf("[%s] max diff : %f ; a : %f ; b : %f\n", mark, max_diff, max_diff_a, max_diff_b); + if (not_passed != 0) { + printf("[%s] different elements : %d \n", mark, not_passed); + } + else { + printf("[%s] check pass!\n", mark); + } + free(matA); + free(matB); +} + +template +void layernorm_test(const int m, const int n); + +template +void add_bias_residual_layernorm_test(const int m, const int n); + +int main(int argc, char** argv) +{ + if (argc != 4) { + printf("[ERROR] layernorm_test max_m max_n is_fp16\n"); + printf("e.g., ./bin/layernorm_test 1 1024 1\n"); + return 0; + } + + int max_m = atoi(argv[1]); + int max_n = atoi(argv[2]); + int is_fp16 = atoi(argv[3]); + + for (int m = 1; m <= max_m; m *= 2) { + for (int n = 128; n <= max_n; n *= 2) { + if (is_fp16) { + add_bias_residual_layernorm_test(m, n); + } + else { + add_bias_residual_layernorm_test(m, n); + } + } + } + return 0; +} + +template +void layernorm_test(const int m, const int n) +{ + struct cudaDeviceProp prop; + check_cuda_error(cudaGetDeviceProperties(&prop, 0)); + printf("Device %s\n", prop.name); + + T *input, *output_opt, *output_baseline, *gamma, *beta; + deviceMalloc(&input, m * n); + deviceMalloc(&output_baseline, m * n); + deviceMalloc(&output_opt, m * n); + deviceMalloc(&gamma, n); + deviceMalloc(&beta, n); + cudaStream_t stream; + cudaStreamCreate(&stream); + const int ite = 5000; + + // warmup + for (int i = 0; i < 1000; i++) { + invokeGeneralLayerNorm(output_baseline, input, gamma, beta, m, n, stream); + invokeGeneralLayerNorm(output_opt, input, gamma, beta, m, n, stream, true); + } + + struct timeval start, end; + cudaDeviceSynchronize(); + gettimeofday(&start, NULL); + for (int i = 0; i < ite; i++) { + invokeGeneralLayerNorm(output_baseline, input, gamma, beta, m, n, stream); + } + cudaDeviceSynchronize(); + gettimeofday(&end, NULL); + float baseline_time = ((end.tv_sec - start.tv_sec) * 1000000. + (end.tv_usec - start.tv_usec) * 1.) / ite; + + struct timeval start_2, end_2; + cudaDeviceSynchronize(); + gettimeofday(&start_2, NULL); + for (int i = 0; i < ite; i++) { + invokeGeneralLayerNorm(output_opt, input, gamma, beta, m, n, stream, true); + } + cudaDeviceSynchronize(); + gettimeofday(&end_2, NULL); + float opt_time = ((end_2.tv_sec - start_2.tv_sec) * 1000000. + (end_2.tv_usec - start_2.tv_usec) * 1.) / ite; + + print_abs_mean(output_baseline, m * n, stream, "output_baseline"); + print_abs_mean(output_opt, m * n, stream, "output_opt"); + + printf("[INFO] baseline time: %f us\n", baseline_time); + printf("[INFO] opt time: %f us\n", opt_time); + printf("[INFO] m %d, n %d, speedup: %f \n", m, n, baseline_time / opt_time); + return; +} + +template +void add_bias_residual_layernorm_test(const int m, const int n) +{ + struct cudaDeviceProp prop; + check_cuda_error(cudaGetDeviceProperties(&prop, 0)); + printf("Device %s\n", prop.name); + + int opt_version = 2; + T *input, *output_opt, *output_baseline, *gamma, *beta, *bias; + T *normed_output_opt, *normed_output_baseline; + deviceMalloc(&input, m * n); + deviceMalloc(&output_baseline, m * n); + deviceMalloc(&output_opt, m * n); + cudaD2Dcpy(output_opt, output_baseline, m * n); + deviceMalloc(&normed_output_opt, m * n); + deviceMalloc(&normed_output_baseline, m * n); + deviceMalloc(&gamma, n); + deviceMalloc(&beta, n); + deviceMalloc(&bias, n); + cudaStream_t stream; + cudaStreamCreate(&stream); + const int warmup_ite = 1000; // 1000; + const int ite = 5000; // 5000; + + // verify correctness + invokeGeneralAddBiasResidualPreLayerNorm( + output_baseline, normed_output_baseline, input, gamma, beta, bias, m, n, stream, 0); + invokeGeneralAddBiasResidualPreLayerNorm( + output_opt, normed_output_opt, input, gamma, beta, bias, m, n, stream, opt_version); + checkMat(output_baseline, output_opt, m * n, "output_baseline vs output_opt"); + checkMat(normed_output_baseline, normed_output_opt, m * n, "normed_output_baseline vs normed_output_opt"); + + // warmup + for (int i = 0; i < warmup_ite; i++) { + invokeGeneralAddBiasResidualPreLayerNorm( + output_baseline, normed_output_baseline, input, gamma, beta, bias, m, n, stream, 0); + invokeGeneralAddBiasResidualPreLayerNorm( + output_opt, normed_output_opt, input, gamma, beta, bias, m, n, stream, opt_version); + } + + struct timeval start, end; + cudaDeviceSynchronize(); + gettimeofday(&start, NULL); + for (int i = 0; i < ite; i++) { + invokeGeneralAddBiasResidualPreLayerNorm( + output_baseline, normed_output_baseline, input, gamma, beta, bias, m, n, stream, 0); + } + cudaDeviceSynchronize(); + gettimeofday(&end, NULL); + float baseline_time = ((end.tv_sec - start.tv_sec) * 1000000. + (end.tv_usec - start.tv_usec) * 1.) / ite; + + struct timeval start_2, end_2; + cudaDeviceSynchronize(); + gettimeofday(&start_2, NULL); + for (int i = 0; i < ite; i++) { + invokeGeneralAddBiasResidualPreLayerNorm( + output_opt, normed_output_opt, input, gamma, beta, bias, m, n, stream, opt_version); + } + cudaDeviceSynchronize(); + gettimeofday(&end_2, NULL); + float opt_time = ((end_2.tv_sec - start_2.tv_sec) * 1000000. + (end_2.tv_usec - start_2.tv_usec) * 1.) / ite; + sync_check_cuda_error(); + + printf("[INFO] baseline time: %f us\n", baseline_time); + printf("[INFO] opt time: %f us\n", opt_time); + printf("[INFO] m %3d, n %5d, speedup: %f \n", m, n, baseline_time / opt_time); + return; +} diff --git a/examples/cpp/gpt/CMakeLists.txt b/examples/cpp/gpt/CMakeLists.txt index 48fc72e24..a1dee72fe 100644 --- a/examples/cpp/gpt/CMakeLists.txt +++ b/examples/cpp/gpt/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -13,4 +13,4 @@ # limitations under the License. add_executable(gpt_example gpt_example.cc) -target_link_libraries(gpt_example PUBLIC -lcublas -lcublasLt -lcudart Gpt nvtx_utils) +target_link_libraries(gpt_example PUBLIC -lcublas -lcublasLt -lcudart ParallelGpt nvtx_utils) diff --git a/examples/cpp/gpt/gpt_config.ini b/examples/cpp/gpt/gpt_config.ini index faae21e8e..f40ee0135 100644 --- a/examples/cpp/gpt/gpt_config.ini +++ b/examples/cpp/gpt/gpt_config.ini @@ -6,7 +6,7 @@ top_k=0 ; k value for top k sampling top_p=0.5 ; p value for top p sampling temperature=1.0 ; Use for sampling repetition_penalty=2.0 ; Use for sampling -is_half=1 +data_type=fp16 sparse=0 model_name=gpt_124M ; model_name=megatron_345M @@ -17,8 +17,10 @@ model_name=gpt_124M model_dir=models/openai-gpt-models/c-model/124m/1-gpu/ [request] -request_batch_size=8 # determine by the request -request_output_len=32 # determine by the request +request_batch_size=8 ; determine by the request +request_output_len=32 ; determine by the request +return_log_probs=false ; return the output log probs and cumulative log probs. +context_log_probs=false ; include input contexts in the cumulative log probability computation. [gpt_124M] head_num=12 diff --git a/examples/cpp/gpt/gpt_example.cc b/examples/cpp/gpt/gpt_example.cc index 1488a3d47..cacb09e90 100644 --- a/examples/cpp/gpt/gpt_example.cc +++ b/examples/cpp/gpt/gpt_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -15,7 +15,7 @@ */ #include "3rdparty/INIReader.h" -#include "src/fastertransformer/models/gpt/Gpt.h" +#include "src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.h" #include "src/fastertransformer/utils/nvtx_utils.h" #include @@ -42,24 +42,33 @@ int main(int argc, char* argv[]) printf("Device %s\n", prop.name); std::string ini_name; - if (argc == 2) + if (argc == 2) { ini_name = std::string(argv[1]); - else + } + else { ini_name = "../examples/cpp/gpt/gpt_config.ini"; + } INIReader reader = INIReader(ini_name); if (reader.ParseError() < 0) { std::cout << "[ERROR] Can't load '" << ini_name << "'\n"; return -1; } - const int is_half = reader.GetInteger("ft_instance_hyperparameter", "is_half"); + const std::string data_type = reader.Get("ft_instance_hyperparameter", "data_type"); - if (is_half == 0) + if (data_type == "fp32") { gpt_example(reader); - else if (is_half == 1) + } + else if (data_type == "fp16") { gpt_example(reader); + } +#ifdef ENABLE_BF16 + else if (data_type == "bf16") { + gpt_example<__nv_bfloat16>(reader); + } +#endif else { - printf("[ERROR] is_fp16 should be 0 (use float) or 1 (use half). \n"); + printf("[ERROR] data_type should be fp32, fp16 or bf16 ! \n"); return -1; } return 0; @@ -146,6 +155,9 @@ void gpt_example(const INIReader reader) const float repetition_penalty = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty"); const std::string model_dir = std::string(reader.Get("ft_instance_hyperparameter", "model_dir")); const bool sparse = static_cast(reader.GetInteger("ft_instance_hyperparameter", "sparse")); + const float len_penalty = 1.0f; + const float beam_search_diversity_rate = 0.0f; + const unsigned long long int random_seed = 0; const size_t head_num = reader.GetInteger(model_name, "head_num"); const size_t size_per_head = reader.GetInteger(model_name, "size_per_head"); @@ -157,6 +169,13 @@ void gpt_example(const INIReader reader) const size_t request_batch_size = reader.GetInteger("request", "request_batch_size"); // The length of tokens we hope this model to generate const int request_output_len = reader.GetInteger("request", "request_output_len"); + // Whether to return the log probabilities of outputs. + const bool is_return_log_probs = reader.GetBoolean("request", "return_log_probs", false); + // Whether to include input contexts in computing the cumulative log probabilities. + const bool is_return_context_cum_log_probs = reader.GetBoolean("request", "context_log_probs", false); + if (is_return_log_probs && !is_return_context_cum_log_probs) { + FT_LOG_WARNING("context_log_probs will be ignored since return_log_probs is disabled."); + } const int start_id = 50256; const int end_id = 50256; @@ -167,7 +186,7 @@ void gpt_example(const INIReader reader) int max_input_len = -1; std::vector v_start_lengths; std::vector v_start_ids; - read_start_ids(request_batch_size, &v_start_lengths, &v_start_ids, max_input_len, end_id, beam_width); + read_start_ids(request_batch_size, &v_start_lengths, &v_start_ids, max_input_len, end_id, 1); int* d_input_ids; int* d_input_lengths; @@ -178,10 +197,10 @@ void gpt_example(const INIReader reader) } else { // conditional case. - deviceMalloc(&d_input_ids, request_batch_size * beam_width * max_input_len, false); - deviceMalloc(&d_input_lengths, request_batch_size * beam_width, false); - cudaH2Dcpy(d_input_ids, v_start_ids.data(), request_batch_size * beam_width * max_input_len); - cudaH2Dcpy(d_input_lengths, v_start_lengths.data(), request_batch_size * beam_width); + deviceMalloc(&d_input_ids, request_batch_size * max_input_len, false); + deviceMalloc(&d_input_lengths, request_batch_size, false); + cudaH2Dcpy(d_input_ids, v_start_ids.data(), request_batch_size * max_input_len); + cudaH2Dcpy(d_input_lengths, v_start_lengths.data(), request_batch_size); } const int total_output_len = max_input_len + request_output_len; @@ -219,13 +238,20 @@ void gpt_example(const INIReader reader) if (std::is_same::value) { cublas_wrapper.setGemmConfig(CUDA_R_16F, CUDA_R_16F, CUDA_R_16F, CUDA_R_32F); } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + cublas_wrapper.setBF16GemmConfig(); + } +#endif else if (std::is_same::value) { cublas_wrapper.setFP32GemmConfig(); } struct cudaDeviceProp prop; check_cuda_error(cudaGetDeviceProperties(&prop, 0)); - fastertransformer::GptWeight gpt_weights(hidden_units, inter_size, vocab_size, decoder_layers, max_seq_len); + fastertransformer::ParallelGptWeight gpt_weights( + hidden_units, inter_size, vocab_size, decoder_layers, max_seq_len, 1, 0, 1, 0, 0); + gpt_weights.loadModel(model_dir); #ifdef SPARSITY_ENABLED @@ -234,31 +260,38 @@ void gpt_example(const INIReader reader) gpt_weights.compress_weights(cublas_wrapper); } #endif - - Gpt gpt = Gpt(0, // max_batch_size, FT will adjust the buffer automatically. - 0, // max_seq_len, FT will adjust the buffer automatically. - 0, // max_input_len, FT will adjust the buffer automatically. - beam_width, - head_num, - size_per_head, - inter_size, - decoder_layers, - vocab_size, - start_id, - end_id, - 0.0f, - top_k, - top_p, - 0, - temperature, - 1.0f, // len_penalty, - repetition_penalty, - stream, - &cublas_wrapper, - &allocator, - false, - &prop, - sparse); + NcclParam tensor_para; + NcclParam pipeline_para; + + // TODO(bhsueh) Some parameters are move to runtime query. + // Need to remove them in the future. + ParallelGpt gpt = ParallelGpt(0, // max_batch_size, FT will adjust the buffer automatically. + 0, // max_seq_len, FT will adjust the buffer automatically. + 0, // max_input_len, FT will adjust the buffer automatically. + beam_width, + head_num, + size_per_head, + inter_size, + decoder_layers, + vocab_size, + start_id, + end_id, + 0.0f, // beam_search_diversity_rate, + 0, // top_k, + 0.0, // top_p, + 0, // random_seed, + 1.0f, // temperature, + 1.0f, // len_penalty, + 1.0f, // repetition_penalty, + tensor_para, + pipeline_para, + stream, + &cublas_wrapper, + &allocator, + false, + &prop, + sparse, + 0); int* d_output_ids; int* d_parent_ids; @@ -267,28 +300,59 @@ void gpt_example(const INIReader reader) deviceMalloc(&d_parent_ids, request_batch_size * beam_width * total_output_len, false); deviceMalloc(&d_sequence_lengths, request_batch_size * beam_width, false); - std::vector input_tensors = std::vector{ - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{request_batch_size * beam_width, (size_t)max_input_len}, - d_input_ids}, - Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size * beam_width}, d_input_lengths}, - Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, &total_output_len}}; - - std::vector output_tensors = std::vector{ - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{request_batch_size, beam_width, (size_t)total_output_len}, - d_output_ids}, - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{(size_t)total_output_len, request_batch_size, beam_width}, - d_parent_ids}, - Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size, beam_width}, d_sequence_lengths}, - Tensor{MEMORY_GPU, - TYPE_FP32, - std::vector{(size_t)request_output_len, request_batch_size, beam_width}, - nullptr}}; + std::unordered_map input_tensors = std::unordered_map{ + {"input_ids", + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size, (size_t)max_input_len}, d_input_ids}}, + {"input_lengths", Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size}, d_input_lengths}}, + {"max_output_seq_len", Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, &total_output_len}}, + {"temperature", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &temperature}}, + {"len_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &len_penalty}}, + {"repetition_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &repetition_penalty}}}; + if (top_k == 0 && top_p == 0.0f) { + FT_CHECK(beam_width > 1); + input_tensors.insert({"beam_search_diversity_rate", + Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &beam_search_diversity_rate}}); + } + else { + input_tensors.insert({"random_seed", Tensor{MEMORY_CPU, TYPE_UINT64, std::vector{1}, &random_seed}}); + if (top_p != 0.0f) { + input_tensors.insert({"runtime_top_p", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &top_p}}); + } + if (top_k != 0) { + input_tensors.insert({"runtime_top_k", Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, &top_k}}); + } + } + + std::unordered_map output_tensors = std::unordered_map{ + {"output_ids", + Tensor{MEMORY_GPU, + TYPE_INT32, + std::vector{request_batch_size, beam_width, (size_t)total_output_len}, + d_output_ids}}, + {"parent_ids", + Tensor{MEMORY_GPU, + TYPE_INT32, + std::vector{(size_t)total_output_len, request_batch_size, beam_width}, + d_parent_ids}}, + {"sequence_length", + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size, beam_width}, d_sequence_lengths}}}; + + float* output_log_probs = nullptr; + float* d_cum_log_probs = nullptr; + if (is_return_log_probs) { + deviceMalloc(&output_log_probs, request_batch_size * beam_width * request_output_len); + output_tensors.insert({"output_log_probs", + Tensor{MEMORY_GPU, + TYPE_FP32, + std::vector{request_batch_size, beam_width, (size_t)request_output_len}, + output_log_probs}}); + deviceMalloc(&d_cum_log_probs, request_batch_size * beam_width); + output_tensors.insert( + {"cum_log_probs", + Tensor{MEMORY_GPU, TYPE_FP32, std::vector{request_batch_size, beam_width}, d_cum_log_probs}}); + input_tensors.insert({"is_return_context_cum_log_probs", + Tensor{MEMORY_CPU, TYPE_BOOL, std::vector{1}, &is_return_context_cum_log_probs}}); + } print_mem_usage(); int ite = 1; @@ -350,21 +414,48 @@ void gpt_example(const INIReader reader) std::cout << "Writing " << outCount << " elements\n"; int zeroCount = 0; for (size_t i = 0; i < outCount; i++) { - if (hBuf[i] == int(0)) + if (hBuf[i] == int(0)) { zeroCount++; + } outFile << hBuf[i] << " "; - if ((i + 1) % (total_output_len) == 0) + if ((i + 1) % (total_output_len) == 0) { outFile << std::endl; + } - if (i < 10) + if (i < 10) { printf("%5d ", hBuf[i]); - if ((i + 1) % (total_output_len) == 0 && i < 10) + } + if ((i + 1) % (total_output_len) == 0 && i < 10) { std::cout << std::endl; + } } std::cout << std::endl << "zeroCount = " << zeroCount << std::endl; } delete[] hBuf; } + outFile.close(); + + if (d_cum_log_probs != nullptr) { + std::string logprob_fname = "logprob.out"; + std::ofstream logprob_file = std::ofstream("logprob.out", std::ios::out); + if (!logprob_file.is_open()) { + printf("[WARNING] Cannot write results into output file %s \n", logprob_fname.c_str()); + } + else { + size_t cum_log_probs_size = request_batch_size * beam_width; + printf("[INFO] Writing %ld elements (log probs)\n", cum_log_probs_size); + float* h_buf = new float[cum_log_probs_size]; + cudaD2Hcpy(h_buf, d_cum_log_probs, cum_log_probs_size); + for (size_t i = 0; i < cum_log_probs_size; i++) { + logprob_file << h_buf[i] << std::endl; + if (i < 10) { + printf(" %10.6f\n", h_buf[i]); + } + } + delete[] h_buf; + } + logprob_file.close(); + } } #ifdef SPARSITY_ENABLED diff --git a/examples/cpp/gptj/CMakeLists.txt b/examples/cpp/gptj/CMakeLists.txt index f3dbe524c..3c90b1b19 100644 --- a/examples/cpp/gptj/CMakeLists.txt +++ b/examples/cpp/gptj/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -12,12 +12,10 @@ # See the License for the specific language governing permissions and # limitations under the License. -if(BUILD_GPT) add_executable(gptj_example gptj_example.cc) target_link_libraries(gptj_example PUBLIC -lcublas -lcublasLt -lcudart - GptJ nvtx_utils -lmpi gpt_example_utils) + GptJ nvtx_utils -lmpi gpt_example_utils word_list) add_executable(gptj_triton_example gptj_triton_example.cc) target_link_libraries(gptj_triton_example PUBLIC -lcublas -lcublasLt -lcudart - GptJTritonBackend -lmpi gpt_example_utils -lpthread) -endif() \ No newline at end of file + GptJTritonBackend custom_ar_comm -lmpi gpt_example_utils word_list -lpthread) diff --git a/examples/cpp/gptj/bad_words.csv b/examples/cpp/gptj/bad_words.csv new file mode 100644 index 000000000..6a1126ebd --- /dev/null +++ b/examples/cpp/gptj/bad_words.csv @@ -0,0 +1,2 @@ +7768,3908 +1,2 diff --git a/examples/cpp/gptj/gptj_config.ini b/examples/cpp/gptj/gptj_config.ini index ddb48e84c..4957072e3 100644 --- a/examples/cpp/gptj/gptj_config.ini +++ b/examples/cpp/gptj/gptj_config.ini @@ -9,8 +9,9 @@ repetition_penalty=2.0 ; Use for sampling len_penalty=1.0 beam_search_diversity_rate=0.0 is_half=0 +enable_custom_all_reduce=0 -tensor_para_size=1 +tensor_para_size=8 pipeline_para_size=1 model_name=gptj_6B diff --git a/examples/cpp/gptj/gptj_example.cc b/examples/cpp/gptj/gptj_example.cc index a0ef43739..a3d400b6f 100644 --- a/examples/cpp/gptj/gptj_example.cc +++ b/examples/cpp/gptj/gptj_example.cc @@ -19,6 +19,7 @@ #include "src/fastertransformer/models/gptj/GptJ.h" #include "src/fastertransformer/utils/mpi_utils.h" #include "src/fastertransformer/utils/nvtx_utils.h" +#include "src/fastertransformer/utils/word_list.h" #include #include @@ -42,10 +43,12 @@ int main(int argc, char* argv[]) srand(0); std::string ini_name; - if (argc == 2) + if (argc == 2) { ini_name = std::string(argv[1]); - else + } + else { ini_name = "../examples/cpp/gptj/gptj_config.ini"; + } INIReader reader = INIReader(ini_name); if (reader.ParseError() < 0) { @@ -54,10 +57,12 @@ int main(int argc, char* argv[]) } const int is_half = reader.GetInteger("ft_instance_hyperparameter", "is_half"); - if (is_half == 0) + if (is_half == 0) { gptj_example(reader); - else if (is_half == 1) + } + else if (is_half == 1) { gptj_example(reader); + } else { printf("[ERROR] is_fp16 should be 0 (use float) or 1 (use half). \n"); return -1; @@ -70,13 +75,15 @@ template void gptj_example(const INIReader reader) { const std::string model_name = reader.Get("ft_instance_hyperparameter", "model_name"); - const size_t max_batch_size = reader.GetInteger("ft_instance_hyperparameter", "max_batch_size"); const size_t max_seq_len = reader.GetInteger("ft_instance_hyperparameter", "max_seq_len"); const size_t beam_width = reader.GetInteger("ft_instance_hyperparameter", "beam_width"); const int top_k = reader.GetInteger("ft_instance_hyperparameter", "top_k"); const float top_p = reader.GetFloat("ft_instance_hyperparameter", "top_p"); const float temperature = reader.GetFloat("ft_instance_hyperparameter", "temperature"); const float repetition_penalty = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty"); + const float len_penalty = reader.GetFloat("ft_instance_hyperparameter", "len_penalty"); + const float beam_search_diversity_rate = + reader.GetFloat("ft_instance_hyperparameter", "beam_search_diversity_rate"); std::string model_dir = std::string(reader.Get("ft_instance_hyperparameter", "model_dir")); int tensor_para_size = reader.GetInteger("ft_instance_hyperparameter", "tensor_para_size"); @@ -87,6 +94,8 @@ void gptj_example(const INIReader reader) const size_t vocab_size = reader.GetInteger(model_name, "vocab_size"); const size_t decoder_layers = reader.GetInteger(model_name, "decoder_layers"); const size_t rotary_embedding_dim = reader.GetInteger(model_name, "rotary_embedding"); + const int start_id = reader.GetInteger(model_name, "start_id"); + const int end_id = reader.GetInteger(model_name, "end_id"); const size_t hidden_units = head_num * size_per_head; const size_t inter_size = 4 * hidden_units; @@ -95,9 +104,6 @@ void gptj_example(const INIReader reader) // The length of tokens we hope this model to generate const int request_output_len = reader.GetInteger("request", "request_output_len"); - const int start_id = 50256; - const int end_id = 50256; - FT_CHECK(head_num % tensor_para_size == 0); FT_CHECK(decoder_layers % pipeline_para_size == 0); @@ -105,8 +111,9 @@ void gptj_example(const INIReader reader) int rank, world_size, device, device_count; MPICHECK(MPI_Comm_rank(MPI_COMM_WORLD, &rank)); MPICHECK(MPI_Comm_size(MPI_COMM_WORLD, &world_size)); - if (rank == 0) + if (rank == 0) { printf("Total ranks: %d.\n", world_size); + } check_cuda_error(cudaGetDeviceCount(&device_count)); check_cuda_error(cudaSetDevice(rank % device_count)); check_cuda_error(cudaGetDevice(&device)); @@ -181,6 +188,29 @@ void gptj_example(const INIReader reader) NCCLCHECK( ncclCommInitRank(&pipeline_para_nccl_comm, pipeline_para_size, pipeline_para_nccl_uid, pipeline_para_rank)); + // Handle bad_words dictionary + std::vector bad_words; + read_word_list("../examples/cpp/gptj/bad_words.csv", bad_words); + + int* d_bad_words = nullptr; + deviceMalloc(&d_bad_words, bad_words.size(), false); + cudaH2Dcpy(d_bad_words, bad_words.data(), bad_words.size()); + + // Handle stop_words dictionary + std::vector stop_words; + read_word_list("../examples/cpp/gptj/stop_words.csv", stop_words); + + const size_t stop_words_len = stop_words.size() / 2; + // Tile with same dict for each element + std::vector tiled_stop_words; + for (int i = 0; i < request_batch_size; i++) { + tiled_stop_words.insert(tiled_stop_words.end(), stop_words.begin(), stop_words.end()); + } + + int* d_stop_words = nullptr; + deviceMalloc(&d_stop_words, tiled_stop_words.size(), false); + cudaH2Dcpy(d_stop_words, tiled_stop_words.data(), tiled_stop_words.size()); + // Read ids of request from file. int max_input_len = -1; std::vector v_start_lengths; @@ -190,7 +220,7 @@ void gptj_example(const INIReader reader) &v_start_ids, max_input_len, end_id, - beam_width, + 1, "../examples/cpp/gptj/start_ids.csv"); int* d_input_ids; @@ -202,11 +232,13 @@ void gptj_example(const INIReader reader) } else { // conditional case. - deviceMalloc(&d_input_ids, request_batch_size * beam_width * max_input_len, false); - deviceMalloc(&d_input_lengths, request_batch_size * beam_width, false); - cudaH2Dcpy(d_input_ids, v_start_ids.data(), request_batch_size * beam_width * max_input_len); - cudaH2Dcpy(d_input_lengths, v_start_lengths.data(), request_batch_size * beam_width); + deviceMalloc(&d_input_ids, request_batch_size * max_input_len, false); + deviceMalloc(&d_input_lengths, request_batch_size, false); + cudaH2Dcpy(d_input_ids, v_start_ids.data(), request_batch_size * max_input_len); + cudaH2Dcpy(d_input_lengths, v_start_lengths.data(), request_batch_size); } + std::vector start_ids(request_batch_size, start_id); + std::vector end_ids(request_batch_size, end_id); const int total_output_len = max_input_len + request_output_len; if (total_output_len > (int)max_seq_len) { @@ -254,6 +286,10 @@ void gptj_example(const INIReader reader) if (world_size > 1) { MPICHECK(MPI_Bcast(&random_seed, 1, MPI_UNSIGNED_LONG_LONG, 0, MPI_COMM_WORLD)); } + + NcclParam tensor_para(tensor_para_rank, tensor_para_size, tensor_para_nccl_comm); + NcclParam pipeline_para(pipeline_para_rank, pipeline_para_size, pipeline_para_nccl_comm); + GptJ gpt = GptJ(0, // max_batch_size, FT will adjust the buffer automatically. 0, // max_seq_len, FT will adjust the buffer automatically. 0, // max_input_len, FT will adjust the buffer automatically. @@ -271,14 +307,10 @@ void gptj_example(const INIReader reader) top_p, random_seed, temperature, - 1.0f, // len_penalty, + len_penalty, repetition_penalty, - tensor_para_size, - tensor_para_rank, - tensor_para_nccl_comm, - pipeline_para_size, - pipeline_para_rank, - pipeline_para_nccl_comm, + tensor_para, + pipeline_para, stream, &cublas_wrapper, &allocator, @@ -286,34 +318,49 @@ void gptj_example(const INIReader reader) &prop); int* d_output_ids; - int* d_parent_ids; int* d_sequence_lengths; deviceMalloc(&d_output_ids, request_batch_size * beam_width * total_output_len, false); - deviceMalloc(&d_parent_ids, request_batch_size * beam_width * total_output_len, false); deviceMalloc(&d_sequence_lengths, request_batch_size * beam_width, false); + std::unordered_map input_tensors = std::unordered_map{ + {"input_ids", + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size, (size_t)max_input_len}, d_input_ids}}, + {"input_lengths", Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size}, d_input_lengths}}, + {"max_output_seq_len", Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, &total_output_len}}, + {"bad_words_list", Tensor{MEMORY_GPU, TYPE_INT32, {2, bad_words.size() / 2}, d_bad_words}}, + {"stop_words_list", Tensor{MEMORY_GPU, TYPE_INT32, {request_batch_size, 2, stop_words_len}, d_stop_words}}, + {"temperature", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &temperature}}, + {"len_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &len_penalty}}, + {"repetition_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &repetition_penalty}}, + {"start_id", Tensor{MEMORY_CPU, TYPE_INT32, std::vector{request_batch_size}, start_ids.data()}}, + {"end_id", Tensor{MEMORY_CPU, TYPE_INT32, std::vector{request_batch_size}, end_ids.data()}}}; + if (top_k == 0 && top_p == 0.0f) { + FT_CHECK(beam_width > 1); + input_tensors.insert({"beam_search_diversity_rate", + Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &beam_search_diversity_rate}}); + } + else { + input_tensors.insert({"random_seed", Tensor{MEMORY_CPU, TYPE_UINT64, std::vector{1}, &random_seed}}); + if (top_p != 0.0f) { + input_tensors.insert({"runtime_top_p", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &top_p}}); + } + if (top_k != 0) { + input_tensors.insert({"runtime_top_k", Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, &top_k}}); + } + } - std::vector input_tensors = std::vector{ - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{request_batch_size * beam_width, (size_t)max_input_len}, - d_input_ids}, - Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size * beam_width}, d_input_lengths}, - Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, &total_output_len}}; - - std::vector output_tensors = std::vector{ - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{request_batch_size, beam_width, (size_t)total_output_len}, - d_output_ids}, - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{(size_t)total_output_len, request_batch_size, beam_width}, - d_parent_ids}, - Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size, beam_width}, d_sequence_lengths}, - Tensor{MEMORY_GPU, - TYPE_FP32, - std::vector{(size_t)request_output_len, request_batch_size, beam_width}, - nullptr}}; + std::unordered_map output_tensors = std::unordered_map{ + {"output_ids", + Tensor{MEMORY_GPU, + TYPE_INT32, + std::vector{request_batch_size, beam_width, (size_t)total_output_len}, + d_output_ids}}, + {"sequence_length", + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size, beam_width}, d_sequence_lengths}}, + {"output_log_probs", + Tensor{MEMORY_GPU, + TYPE_FP32, + std::vector{(size_t)request_output_len, request_batch_size, beam_width}, + nullptr}}}; print_mem_usage(); @@ -351,16 +398,20 @@ void gptj_example(const INIReader reader) std::cout << "Writing " << outCount << " elements\n"; int zeroCount = 0; for (size_t i = 0; i < outCount; i++) { - if (hBuf[i] == int(0)) + if (hBuf[i] == int(0)) { zeroCount++; + } outFile << hBuf[i] << " "; - if ((i + 1) % (total_output_len) == 0) + if ((i + 1) % (total_output_len) == 0) { outFile << std::endl; + } - if (i < 10) + if (i < 10) { printf("%5d ", hBuf[i]); - if ((i + 1) % (total_output_len) == 0 && i < 10) + } + if ((i + 1) % (total_output_len) == 0 && i < 10) { std::cout << std::endl; + } } std::cout << std::endl << "zeroCount = " << zeroCount << std::endl; } @@ -405,5 +456,15 @@ void gptj_example(const INIReader reader) delete cublas_algo_map; delete cublas_wrapper_mutex; + + cudaFree(d_bad_words); + cudaFree(d_stop_words); + if (d_input_ids != nullptr) { + cudaFree(d_input_ids); + } + if (d_input_lengths != nullptr) { + cudaFree(d_input_lengths); + } + return; } diff --git a/examples/cpp/gptj/gptj_triton_example.cc b/examples/cpp/gptj/gptj_triton_example.cc index a09b52acd..0d55ad6e3 100644 --- a/examples/cpp/gptj/gptj_triton_example.cc +++ b/examples/cpp/gptj/gptj_triton_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -18,48 +18,71 @@ #include "examples/cpp/multi_gpu_gpt/gpt_example_utils.h" #include "src/fastertransformer/triton_backend/gptj/GptJTritonModel.h" #include "src/fastertransformer/triton_backend/gptj/GptJTritonModelInstance.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" #include "src/fastertransformer/utils/mpi_utils.h" +#include "src/fastertransformer/utils/word_list.h" #include #include namespace ft = fastertransformer; -std::vector>> broadCastRequest(const std::vector& v_start_ids, - const std::vector& v_start_lengths, - const int node_id, - const int gpu_count, - const int beam_width, - const int request_output_len, - std::vector* pointer_record) +struct RequestParam { + int beam_width; + int request_output_len; + float beam_search_diversity_rate; + int runtime_top_k; + float runtime_top_p; + float temperature; + float len_penalty; + float repetition_penalty; + unsigned long long int random_seed; + int start_id; + int end_id; +}; + +std::vector>> +broadCastRequest(const std::vector& v_start_ids, + const std::vector& v_start_lengths, + const std::vector& v_bad_words, + const int node_id, + const int gpu_count, + const RequestParam param, + std::vector* pointer_record) { // broadcast the request to all nodes, and copy "gpu_count" copies on different gpu int size_1 = v_start_ids.size(); int size_2 = v_start_lengths.size(); + int size_bad_words = v_bad_words.size(); MPICHECK(MPI_Bcast(&size_1, 1, MPI_INT, 0, MPI_COMM_WORLD)); MPICHECK(MPI_Bcast(&size_2, 1, MPI_INT, 0, MPI_COMM_WORLD)); + MPICHECK(MPI_Bcast(&size_bad_words, 1, MPI_INT, 0, MPI_COMM_WORLD)); std::vector v_input_ids(size_1); std::vector v_input_lengths(size_2); + std::vector v_input_bad_words(size_bad_words); if (node_id == 0) { memcpy(v_input_ids.data(), v_start_ids.data(), size_1 * sizeof(int)); memcpy(v_input_lengths.data(), v_start_lengths.data(), size_2 * sizeof(int)); + memcpy(v_input_bad_words.data(), v_bad_words.data(), size_bad_words * sizeof(int)); } MPI_Barrier(MPI_COMM_WORLD); - int request_batch_size = size_2 / beam_width; + int request_batch_size = size_2; int max_input_len = size_1 / size_2; MPICHECK(MPI_Bcast(v_input_ids.data(), size_1, MPI_INT, 0, MPI_COMM_WORLD)); MPICHECK(MPI_Bcast(v_input_lengths.data(), size_2, MPI_INT, 0, MPI_COMM_WORLD)); + MPICHECK(MPI_Bcast(v_input_bad_words.data(), size_bad_words, MPI_INT, 0, MPI_COMM_WORLD)); - std::vector>> request_list; + std::vector>> request_list; for (int device_id = 0; device_id < gpu_count; device_id++) { ft::check_cuda_error(cudaSetDevice(device_id)); int* d_input_ids; int* d_input_lengths; + int* d_input_bad_words; if (max_input_len == 0) { // unconditional case, no input ids, so do nothing. @@ -74,30 +97,104 @@ std::vector>> broadCastRequest(const ft::cudaH2Dcpy(d_input_ids, v_input_ids.data(), size_1); ft::cudaH2Dcpy(d_input_lengths, v_input_lengths.data(), size_2); } + ft::deviceMalloc(&d_input_bad_words, size_bad_words, false); + ft::cudaH2Dcpy(d_input_bad_words, v_input_bad_words.data(), size_bad_words); - int* request_output_len_ptr = new int((int)(request_output_len)); + int* request_output_len_ptr = new int((int)(param.request_output_len)); - request_list.push_back(std::shared_ptr>(new std::vector{ - triton::Tensor{triton::MEMORY_GPU, - triton::TYPE_INT32, - std::vector{(size_t)request_batch_size, (size_t)beam_width, (size_t)max_input_len}, - d_input_ids}, - triton::Tensor{triton::MEMORY_GPU, - triton::TYPE_INT32, - std::vector{(size_t)request_batch_size, (size_t)beam_width}, - d_input_lengths}, - triton::Tensor{ - triton::MEMORY_CPU, triton::TYPE_INT32, std::vector{(size_t)1}, request_output_len_ptr}})); + int* start_ids_ptr = (int*)malloc(request_batch_size * sizeof(int)); + int* end_ids_ptr = (int*)malloc(request_batch_size * sizeof(int)); + for (int i = 0; i < request_batch_size; i++) { + start_ids_ptr[i] = param.start_id; + end_ids_ptr[i] = param.end_id; + } + pointer_record->push_back(start_ids_ptr); + pointer_record->push_back(end_ids_ptr); + + request_list.push_back(std::shared_ptr>( + new std::unordered_map{ + {"input_ids", + triton::Tensor{triton::MEMORY_GPU, + triton::TYPE_INT32, + std::vector{(size_t)request_batch_size, (size_t)max_input_len}, + d_input_ids}}, + {"input_lengths", + triton::Tensor{triton::MEMORY_GPU, + triton::TYPE_INT32, + std::vector{(size_t)request_batch_size}, + d_input_lengths}}, + {"request_output_len", + triton::Tensor{ + triton::MEMORY_CPU, triton::TYPE_INT32, std::vector{(size_t)1}, request_output_len_ptr}}, + {"bad_words_list", + triton::Tensor{ + triton::MEMORY_GPU, triton::TYPE_INT32, {2, v_input_bad_words.size() / 2}, d_input_bad_words}}, + {"start_id", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_INT32, {(size_t)request_batch_size}, start_ids_ptr}}, + {"end_id", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_INT32, {(size_t)request_batch_size}, end_ids_ptr}}})); + + int* beam_width_ptr = new int(param.beam_width); + pointer_record->push_back(beam_width_ptr); + request_list[device_id]->insert( + {"beam_width", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_INT32, std::vector{1}, beam_width_ptr}}); + if (param.beam_width > 1) { + float* beam_search_diversity_rate_ptr = new float(param.beam_search_diversity_rate); + pointer_record->push_back(beam_search_diversity_rate_ptr); + request_list[device_id]->insert( + {"beam_search_diversity_rate", + triton::Tensor{ + triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, beam_search_diversity_rate_ptr}}); + } + else { + if (param.runtime_top_p != 0.0f) { + float* runtime_top_p_ptr = new float(param.runtime_top_p); + pointer_record->push_back(runtime_top_p_ptr); + request_list[device_id]->insert( + {"runtime_top_p", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, runtime_top_p_ptr}}); + } + if (param.runtime_top_k != 0) { + int* runtime_top_k_ptr = new int(param.runtime_top_k); + pointer_record->push_back(runtime_top_k_ptr); + request_list[device_id]->insert( + {"runtime_top_k", + triton::Tensor{ + triton::MEMORY_CPU, triton::TYPE_INT32, std::vector{1}, runtime_top_k_ptr}}); + } + } + float* temperature_ptr = new float(param.temperature); + pointer_record->push_back(temperature_ptr); + request_list[device_id]->insert( + {"temperature", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, temperature_ptr}}); + float* len_penalty_ptr = new float(param.len_penalty); + pointer_record->push_back(len_penalty_ptr); + request_list[device_id]->insert( + {"len_penalty", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, len_penalty_ptr}}); + float* repetition_penalty_ptr = new float(param.repetition_penalty); + pointer_record->push_back(repetition_penalty_ptr); + request_list[device_id]->insert( + {"repetition_penalty", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, repetition_penalty_ptr}}); + unsigned long long int* random_seed_ptr = new unsigned long long int(param.random_seed); + pointer_record->push_back(random_seed_ptr); + request_list[device_id]->insert( + {"random_seed", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_UINT64, std::vector{1}, random_seed_ptr}}); pointer_record->push_back(d_input_ids); pointer_record->push_back(d_input_lengths); + pointer_record->push_back(d_input_bad_words); pointer_record->push_back(request_output_len_ptr); } return request_list; } -std::vector>> +std::vector>> prepareRequest(std::string ini_name, const int node_id, const int gpu_count, std::vector* pointer_record) { INIReader reader = INIReader(ini_name); @@ -107,10 +204,9 @@ prepareRequest(std::string ini_name, const int node_id, const int gpu_count, std } const size_t request_batch_size = reader.GetInteger("request", "request_batch_size"); - const size_t beam_width = reader.GetInteger("ft_instance_hyperparameter", "beam_width"); - const size_t request_output_len = reader.GetInteger("request", "request_output_len"); - const int end_id = 50256; + const int start_id = reader.GetInteger("gptj_6B", "start_id"); + const int end_id = reader.GetInteger("gptj_6B", "end_id"); std::vector v_start_ids; std::vector v_start_lengths; @@ -121,11 +217,27 @@ prepareRequest(std::string ini_name, const int node_id, const int gpu_count, std &v_start_ids, max_input_len, end_id, - beam_width, + 1, "../examples/cpp/gptj/start_ids.csv"); - auto request_list = broadCastRequest( - v_start_ids, v_start_lengths, node_id, gpu_count, beam_width, request_output_len, pointer_record); + std::vector v_bad_words; + ft::read_word_list("../examples/cpp/gptj/bad_words.csv", v_bad_words); + + RequestParam param; + param.beam_width = reader.GetInteger("ft_instance_hyperparameter", "beam_width"); + param.request_output_len = reader.GetInteger("request", "request_output_len"); + param.beam_search_diversity_rate = reader.GetFloat("ft_instance_hyperparameter", "beam_search_diversity_rate"); + param.runtime_top_k = reader.GetInteger("ft_instance_hyperparameter", "top_k"); + param.runtime_top_p = reader.GetFloat("ft_instance_hyperparameter", "top_p"); + param.temperature = reader.GetFloat("ft_instance_hyperparameter", "temperature"); + param.len_penalty = reader.GetFloat("ft_instance_hyperparameter", "len_penalty"); + param.repetition_penalty = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty"); + param.random_seed = (unsigned long long int)0; + param.start_id = start_id; + param.end_id = end_id; + + auto request_list = + broadCastRequest(v_start_ids, v_start_lengths, v_bad_words, node_id, gpu_count, param, pointer_record); return request_list; } @@ -133,13 +245,14 @@ int threadCreateModelInstances(std::shared_ptr model, std::vector>* model_instances, const int device_id, const int rank, - std::pair, std::vector> nccl_comms) + std::pair, std::vector> nccl_comms, + std::shared_ptr custom_all_reduce_comm = nullptr) { printf("[INFO] rank = %d \n", rank); ft::check_cuda_error(cudaSetDevice(device_id)); cudaStream_t stream; ft::check_cuda_error(cudaStreamCreate(&stream)); - auto model_instance = model->createModelInstance(device_id, rank, stream, nccl_comms); + auto model_instance = model->createModelInstance(device_id, rank, stream, nccl_comms, custom_all_reduce_comm); model_instances->at(device_id) = std::move(model_instance); printf("model instance %d is created \n", device_id); ft::print_mem_usage(); @@ -147,8 +260,8 @@ int threadCreateModelInstances(std::shared_ptr model, } int threadForward(std::unique_ptr* model_instance, - std::shared_ptr> request, - std::shared_ptr>* output_tensors, + std::shared_ptr> request, + std::shared_ptr>* output_tensors, const int device_id) { ft::check_cuda_error(cudaSetDevice(device_id)); @@ -197,13 +310,22 @@ int main(int argc, char* argv[]) std::pair, std::vector> nccl_comms = model->createNcclComms(nccl_ids, node_id); cudaDeviceSynchronize(); + // Optional Step: create custom all reduce comm + std::vector> custom_all_reduce_comms; + model->createCustomComms(&custom_all_reduce_comms, world_size); + // step 3: Create model instances std::vector> model_instances((size_t)gpu_count); std::vector threads; for (int device_id = 0; device_id < gpu_count; device_id++) { const int rank = node_id * gpu_count + device_id; - threads.push_back( - std::thread(threadCreateModelInstances, model, &model_instances, device_id, rank, nccl_comms)); + threads.push_back(std::thread(threadCreateModelInstances, + model, + &model_instances, + device_id, + rank, + nccl_comms, + custom_all_reduce_comms[rank])); } for (auto& t : threads) { t.join(); @@ -211,12 +333,13 @@ int main(int argc, char* argv[]) // step 4: prepare request std::vector pointer_record; // Used to prevent the pointers are release after leaving functions - std::vector>> request_list = + std::vector>> request_list = prepareRequest(ini_name, node_id, gpu_count, &pointer_record); printf("[INFO] request is created \n"); // step 5: Forward - std::vector>> output_tensors_lists((size_t)gpu_count); + std::vector>> output_tensors_lists( + (size_t)gpu_count); for (int i = 0; i < 2; i++) { threads.clear(); for (int device_id = 0; device_id < gpu_count; device_id++) { @@ -232,10 +355,10 @@ int main(int argc, char* argv[]) } printf("[INFO] forward is completed. \n"); - const int* d_output_ids = (const int*)output_tensors_lists[0].get()->at(0).data; - const int batch_size = output_tensors_lists[0].get()->at(0).shape[0]; - const int beam_width = output_tensors_lists[0].get()->at(0).shape[1]; - const int seq_len = output_tensors_lists[0].get()->at(0).shape[2]; + const int* d_output_ids = (const int*)output_tensors_lists[0].get()->at("output_ids").data; + const int batch_size = output_tensors_lists[0].get()->at("output_ids").shape[0]; + const int beam_width = output_tensors_lists[0].get()->at("output_ids").shape[1]; + const int seq_len = output_tensors_lists[0].get()->at("output_ids").shape[2]; // step 6: check results if (node_id == 0) { @@ -253,16 +376,20 @@ int main(int argc, char* argv[]) std::cout << "Writing " << outCount << " elements\n"; int zeroCount = 0; for (size_t i = 0; i < outCount; i++) { - if (hBuf[i] == int(0)) + if (hBuf[i] == int(0)) { zeroCount++; + } outFile << hBuf[i] << " "; - if ((i + 1) % (seq_len) == 0) + if ((i + 1) % (seq_len) == 0) { outFile << std::endl; + } - if (i < 10) + if (i < 10) { printf("%5d ", hBuf[i]); - if ((i + 1) % (seq_len) == 0 && i < 10) + } + if ((i + 1) % (seq_len) == 0 && i < 10) { std::cout << std::endl; + } } std::cout << std::endl << "zeroCount = " << zeroCount << std::endl; } diff --git a/examples/cpp/gptj/stop_words.csv b/examples/cpp/gptj/stop_words.csv new file mode 100644 index 000000000..9b9b09eba --- /dev/null +++ b/examples/cpp/gptj/stop_words.csv @@ -0,0 +1,2 @@ +287, 4346, 12 +3, -1, -1 diff --git a/examples/cpp/multi_gpu_gpt/CMakeLists.txt b/examples/cpp/multi_gpu_gpt/CMakeLists.txt index 2fe6fa931..b535c2da0 100644 --- a/examples/cpp/multi_gpu_gpt/CMakeLists.txt +++ b/examples/cpp/multi_gpu_gpt/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -25,4 +25,4 @@ target_link_libraries(multi_gpu_gpt_async_example PUBLIC -lcublas -lcublasLt -lc add_executable(multi_gpu_gpt_triton_example multi_gpu_gpt_triton_example.cc) target_link_libraries(multi_gpu_gpt_triton_example PUBLIC -lcublas -lcublasLt -lcudart - ParallelGptTritonBackend -lmpi gpt_example_utils -lpthread) + ParallelGptTritonBackend memory_utils custom_ar_comm -lmpi gpt_example_utils -lpthread) diff --git a/examples/cpp/multi_gpu_gpt/gpt_config.ini b/examples/cpp/multi_gpu_gpt/gpt_config.ini index a66ab6c43..5eefa05d6 100644 --- a/examples/cpp/multi_gpu_gpt/gpt_config.ini +++ b/examples/cpp/multi_gpu_gpt/gpt_config.ini @@ -2,28 +2,31 @@ max_batch_size=8 ; Use for allocate the buffer max_seq_len=1024 ; The sequence length of position embedding table, should move to model hyper-parameter beam_width=1 ; beam width for beam search -top_k=0 ; k value for top k sampling -top_p=0.5 ; p value for top p sampling +top_k=1 ; k value for top k sampling +top_p=0 ; p value for top p sampling temperature=1.0 ; Use for sampling repetition_penalty=1.0 ; Use for sampling tensor_para_size=1 pipeline_para_size=1 -is_half=1 +data_type=fp16 sparse=0 int8_mode=0 +enable_custom_all_reduce=0 ; model_name=gpt_124M model_name=megatron_345M ; model_name=megatron_6.7B ; model_name=gpt_175B ; model_name=self_defined ; model_dir=./models/megatron-models/c-model/6.7b/ -model_dir=../models/megatron-models/c-model/345m/1-gpu/ +model_dir=../models/megatron-models/c-model/345m/8-gpu/ len_penalty=1.0 beam_search_diversity_rate=0.0 [request] -request_batch_size=8 # determine by the request -request_output_len=32 # determine by the request +request_batch_size=8 ; determine by the request +request_output_len=32 ; determine by the request +return_log_probs=false ; return the output log probs and cumulative log probs. +context_log_probs=false ; include input contexts in the cumulative log probability computation. [gpt_124M] head_num=12 @@ -34,18 +37,6 @@ start_id=50256 end_id=50256 inter_size=3072 -[gpt_175B] -head_num=96 -size_per_head=128 -vocab_size=51200 -decoder_layers=96 - -[self_defined] -head_num=16 -size_per_head=64 -vocab_size=30000 -decoder_layers=12 - [megatron_345M] head_num=16 size_per_head=64 @@ -60,3 +51,24 @@ head_num=32 size_per_head=128 vocab_size=51200 decoder_layers=32 +start_id=50256 +end_id=50256 +inter_size=16384 + +[gpt_175B] +head_num=96 +size_per_head=128 +vocab_size=51200 +decoder_layers=96 +start_id=50256 +end_id=50256 +inter_size=49152 + +[self_defined] +head_num=16 +size_per_head=64 +vocab_size=30000 +decoder_layers=12 +start_id=50256 +end_id=50256 +inter_size=4096 diff --git a/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_async_example.cc b/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_async_example.cc index d3dda2bb7..81286c591 100644 --- a/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_async_example.cc +++ b/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_async_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -95,8 +95,8 @@ class GptStreamer { // decoder settings ParallelGpt* gpt_; - std::vector* output_tensors_; - const std::vector* input_tensors_; + std::unordered_map* output_tensors_; + const std::unordered_map* input_tensors_; const ParallelGptWeight* gpt_weights_; // streamer status and internal buffers @@ -123,7 +123,7 @@ class GptStreamer { virtual bool stopCriteria(const int step_from, const int step_to, const int* output_ids) { assert(step_from <= step_to); - int batch_size = input_tensors_->at(1).shape[0]; + int batch_size = output_tensors_->at("output_ids").shape[0]; for (int step = step_from; step < step_to; step++) { bool stop_generation = true; for (int i = 0; i < batch_size; i++) { @@ -185,7 +185,8 @@ class GptStreamer { // terminating the async thread. cudaMemcpyAsync(gpt_->getFinishBuffer(), finished, - sizeof(bool) * output_tensors_->at(2).shape[0], + sizeof(bool) * output_tensors_->at("output_ids").shape[0] + * output_tensors_->at("output_ids").shape[1], cudaMemcpyHostToDevice, stream); cudaStreamSynchronize(stream); @@ -193,9 +194,9 @@ class GptStreamer { void streamDecoding() { - int input_len = input_tensors_->at(0).shape[1]; - int max_output_len = output_tensors_->at(0).shape[0]; - int batch_size = output_tensors_->at(2).shape[0]; + int input_len = input_tensors_->at("input_ids").shape[1]; + int max_output_len = output_tensors_->at("output_ids").shape[0]; + int batch_size = output_tensors_->at("output_ids").shape[0]; // initialization is_generation_done = false; @@ -212,7 +213,7 @@ class GptStreamer { onStreamBegin(batch_size, input_len); while (!(is_generation_done || curr_step == max_output_len)) { cudaMemcpyAsync(seqlen_buf_, - (int*)output_tensors_->at(2).data, + (int*)output_tensors_->at("sequence_length").data, sizeof(int) * batch_size, cudaMemcpyDeviceToHost, stream); @@ -221,7 +222,7 @@ class GptStreamer { if (prev_step < curr_step) { int idx_from = prev_step * batch_size; cudaMemcpyAsync(output_ids + idx_from, - (int*)(output_tensors_->at(0).data) + idx_from, + (int*)(output_tensors_->at("output_ids").data) + idx_from, sizeof(int) * (curr_step - prev_step) * batch_size, cudaMemcpyDeviceToHost, stream); @@ -246,7 +247,7 @@ class GptStreamer { #ifndef NDEBUG if (prev_step < curr_step) { - int batch_size = output_tensors_->at(2).shape[0]; + int batch_size = output_tensors_->at("output_ids").shape[0]; std::cout << "\r[DEBUG] Step " << curr_step << " | seqlen: " << strutils::toString(sequence_lengths, batch_size, false) << " | output_ids: " @@ -301,8 +302,8 @@ class GptStreamer { } void initialize(ParallelGpt* gpt, - std::vector* output_tensors, - const std::vector* input_tensors, + std::unordered_map* output_tensors, + const std::unordered_map* input_tensors, const ParallelGptWeight* gpt_weights) { gpt_ = gpt; @@ -312,7 +313,7 @@ class GptStreamer { int total_output_tokens = max_output_length * max_batch_size; std::fill(output_ids, output_ids + total_output_tokens, 0); - std::fill(sequence_lengths, sequence_lengths + max_batch_size, output_tensors_->at(2).shape[0]); + std::fill(sequence_lengths, sequence_lengths + max_batch_size, output_tensors_->at("sequence_length").shape[0]); std::fill(finished, finished + max_batch_size, false); prev_step = 0; @@ -338,8 +339,8 @@ class GptStreamer { * \param gpt_weights A ParallelGptWeight pointer, which continas the weights of gpt model */ void run(ParallelGpt* gpt, - std::vector* output_tensors, - const std::vector* input_tensors, + std::unordered_map* output_tensors, + const std::unordered_map* input_tensors, const ParallelGptWeight* gpt_weights) { initialize(gpt, output_tensors, input_tensors, gpt_weights); @@ -370,7 +371,7 @@ class GptFileStreamer: public GptStreamer { void streamHook(const int prev_step, const int curr_step, const int* output_ids) override { if (ofs.is_open()) { - int batch_size = this->output_tensors_->at(2).shape[0]; + int batch_size = this->output_tensors_->at("output_ids").shape[0]; for (int s = prev_step; s < curr_step; s++) { ofs << strutils::toString(output_ids + s * batch_size, batch_size, false) << std::endl; } @@ -431,16 +432,21 @@ int main(int argc, char* argv[]) std::cout << "[ERROR] Can't load '" << ini_name << "'\n"; return -1; } - const int is_half = reader.GetInteger("ft_instance_hyperparameter", "is_half"); + const std::string data_type = reader.Get("ft_instance_hyperparameter", "data_type"); - if (is_half == 0) { + if (data_type == "fp32") { multi_gpu_gpt_example(reader); } - else if (is_half == 1) { + else if (data_type == "fp16") { multi_gpu_gpt_example(reader); } +#ifdef ENABLE_BF16 + else if (data_type == "bf16") { + multi_gpu_gpt_example<__nv_bfloat16>(reader); + } +#endif else { - printf("[ERROR] is_fp16 should be 0 (use float) or 1 (use half). \n"); + printf("[ERROR] data_type should be fp32, fp16 or bf16 ! \n"); return -1; } MPI_Finalize(); @@ -526,6 +532,9 @@ void multi_gpu_gpt_example(const INIReader reader) const float temperature = reader.GetFloat("ft_instance_hyperparameter", "temperature"); const float repetition_penalty = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty"); const std::string model_dir = std::string(reader.Get("ft_instance_hyperparameter", "model_dir")); + const bool sparse = static_cast(reader.GetInteger("ft_instance_hyperparameter", "sparse")); + const float len_penalty = 1.0f; + const float beam_search_diversity_rate = 0.0f; const int tensor_para_size = reader.GetInteger("ft_instance_hyperparameter", "tensor_para_size"); const int pipeline_para_size = reader.GetInteger("ft_instance_hyperparameter", "pipeline_para_size"); @@ -557,8 +566,9 @@ void multi_gpu_gpt_example(const INIReader reader) int rank, world_size, device, device_count; MPICHECK(MPI_Comm_rank(MPI_COMM_WORLD, &rank)); MPICHECK(MPI_Comm_size(MPI_COMM_WORLD, &world_size)); - if (rank == 0) + if (rank == 0) { printf("Total ranks: %d.\n", world_size); + } check_cuda_error(cudaGetDeviceCount(&device_count)); check_cuda_error(cudaSetDevice(rank % device_count)); check_cuda_error(cudaGetDevice(&device)); @@ -691,6 +701,11 @@ void multi_gpu_gpt_example(const INIReader reader) if (std::is_same::value) { cublas_wrapper.setGemmConfig(CUDA_R_16F, CUDA_R_16F, CUDA_R_16F, CUDA_R_32F); } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + cublas_wrapper.setBF16GemmConfig(); + } +#endif else if (std::is_same::value) { cublas_wrapper.setFP32GemmConfig(); } @@ -706,6 +721,10 @@ void multi_gpu_gpt_example(const INIReader reader) pipeline_para_rank, int8_mode); gpt_weights.loadModel(model_dir); + NcclParam tensor_para(tensor_para_rank, tensor_para_size, tensor_para_nccl_comm); + NcclParam pipeline_para(pipeline_para_rank, pipeline_para_size, pipeline_para_nccl_comm); + unsigned long long int random_seed = 0; + ParallelGpt gpt = ParallelGpt(0, // max_batch_size, FT will adjust the buffer automatically. 0, // max_seq_len, FT will adjust the buffer automatically. 0, // max_input_len, FT will adjust the buffer automatically. @@ -720,16 +739,12 @@ void multi_gpu_gpt_example(const INIReader reader) 0.0f, top_k, top_p, - 0, + random_seed, temperature, 1.0f, // len_penalty, repetition_penalty, - tensor_para_size, - tensor_para_rank, - tensor_para_nccl_comm, - pipeline_para_size, - pipeline_para_rank, - pipeline_para_nccl_comm, + tensor_para, + pipeline_para, stream, &cublas_wrapper, &allocator, @@ -745,28 +760,52 @@ void multi_gpu_gpt_example(const INIReader reader) deviceMalloc(&d_parent_ids, request_batch_size * beam_width * total_output_len, false); deviceMalloc(&d_sequence_lengths, request_batch_size * beam_width, false); - std::vector input_tensors = std::vector{ - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{request_batch_size * beam_width, (size_t)max_input_len}, - d_input_ids}, - Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size * beam_width}, d_input_lengths}, - Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, &total_output_len}}; - - std::vector output_tensors = std::vector{ - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{request_batch_size, beam_width, (size_t)total_output_len}, - d_output_ids}, - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{(size_t)total_output_len, request_batch_size, beam_width}, - d_parent_ids}, - Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size, beam_width}, d_sequence_lengths}, - Tensor{MEMORY_GPU, - TYPE_FP32, - std::vector{(size_t)request_output_len, request_batch_size, beam_width}, - nullptr}}; + std::unordered_map input_tensors = std::unordered_map{ + {"input_ids", + Tensor{MEMORY_GPU, + TYPE_INT32, + std::vector{request_batch_size * beam_width, (size_t)max_input_len}, + d_input_ids}}, + {"input_lengths", + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size * beam_width}, d_input_lengths}}, + {"max_output_seq_len", Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, &total_output_len}}}; + if (top_k == 0 && top_p == 0.0f) { + FT_CHECK(beam_width > 1); + input_tensors.insert({"beam_search_diversity_rate", + Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &beam_search_diversity_rate}}); + } + else { + if (top_p != 0.0f) { + input_tensors.insert({"runtime_top_p", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &top_p}}); + } + if (top_k != 0) { + input_tensors.insert({"runtime_top_k", Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, &top_k}}); + } + } + input_tensors.insert({"temperature", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &temperature}}); + input_tensors.insert({"len_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &len_penalty}}); + input_tensors.insert( + {"repetition_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &repetition_penalty}}); + input_tensors.insert({"random_seed", Tensor{MEMORY_CPU, TYPE_UINT64, std::vector{1}, &random_seed}}); + + std::unordered_map output_tensors = std::unordered_map{ + {"output_ids", + Tensor{MEMORY_GPU, + TYPE_INT32, + std::vector{request_batch_size, beam_width, (size_t)total_output_len}, + d_output_ids}}, + {"parent_ids", + Tensor{MEMORY_GPU, + TYPE_INT32, + std::vector{(size_t)total_output_len, request_batch_size, beam_width}, + d_parent_ids}}, + {"sequence_length", + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size, beam_width}, d_sequence_lengths}}, + {"output_log_probs", + Tensor{MEMORY_GPU, + TYPE_FP32, + std::vector{(size_t)request_output_len, request_batch_size, beam_width}, + nullptr}}}; print_mem_usage(); @@ -864,18 +903,23 @@ void multi_gpu_gpt_example(const INIReader reader) std::cout << "Writing " << outCount << " elements\n"; int zeroCount = 0; for (size_t i = 0; i < outCount; i++) { - if (hBuf[i] == int(0)) + if (hBuf[i] == int(0)) { zeroCount++; + } outFile << hBuf[i]; - if ((i + 1) % (total_output_len) == 0) + if ((i + 1) % (total_output_len) == 0) { outFile << std::endl; - else + } + else { outFile << " "; + } - if (i < 10) + if (i < 10) { printf("%5d ", hBuf[i]); - if ((i + 1) % (total_output_len) == 0 && i < 10) + } + if ((i + 1) % (total_output_len) == 0 && i < 10) { std::cout << std::endl; + } } std::cout << std::endl << "zeroCount = " << zeroCount << std::endl; } diff --git a/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_example.cc b/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_example.cc index b35d3b65e..582dea3c9 100644 --- a/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_example.cc +++ b/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -54,14 +54,21 @@ int main(int argc, char* argv[]) std::cout << "[ERROR] Can't load '" << ini_name << "'\n"; return -1; } - const int is_half = reader.GetInteger("ft_instance_hyperparameter", "is_half"); + const std::string data_type = reader.Get("ft_instance_hyperparameter", "data_type"); - if (is_half == 0) + if (data_type == "fp32") { multi_gpu_gpt_example(reader); - else if (is_half == 1) + } + else if (data_type == "fp16") { multi_gpu_gpt_example(reader); + } +#ifdef ENABLE_BF16 + else if (data_type == "bf16") { + multi_gpu_gpt_example<__nv_bfloat16>(reader); + } +#endif else { - printf("[ERROR] is_fp16 should be 0 (use float) or 1 (use half). \n"); + printf("[ERROR] data_type should be fp32, fp16 or bf16 ! \n"); return -1; } MPI_Finalize(); @@ -82,6 +89,8 @@ void multi_gpu_gpt_example(const INIReader reader) const std::string model_dir = std::string(reader.Get("ft_instance_hyperparameter", "model_dir")); const bool sparse = static_cast(reader.GetInteger("ft_instance_hyperparameter", "sparse")); const int int8_mode = reader.GetInteger("ft_instance_hyperparameter", "int8_mode"); + const float len_penalty = 1.0f; + const float beam_search_diversity_rate = 0.0f; const int tensor_para_size = reader.GetInteger("ft_instance_hyperparameter", "tensor_para_size"); const int pipeline_para_size = reader.GetInteger("ft_instance_hyperparameter", "pipeline_para_size"); @@ -96,6 +105,12 @@ void multi_gpu_gpt_example(const INIReader reader) const size_t request_batch_size = reader.GetInteger("request", "request_batch_size"); // The length of tokens we hope this model to generate const int request_output_len = reader.GetInteger("request", "request_output_len"); + const bool is_return_log_probs = reader.GetBoolean("request", "return_log_probs", false); + // Whether to include input contexts in computing the cumulative log probabilities. + const bool is_return_context_cum_log_probs = reader.GetBoolean("request", "context_log_probs", false); + if (is_return_log_probs && !is_return_context_cum_log_probs) { + FT_LOG_WARNING("context_log_probs will be ignored since return_log_probs is disabled."); + } const int start_id = 50256; const int end_id = 50256; @@ -107,8 +122,9 @@ void multi_gpu_gpt_example(const INIReader reader) int rank, world_size, device, device_count; MPICHECK(MPI_Comm_rank(MPI_COMM_WORLD, &rank)); MPICHECK(MPI_Comm_size(MPI_COMM_WORLD, &world_size)); - if (rank == 0) + if (rank == 0) { printf("Total ranks: %d.\n", world_size); + } check_cuda_error(cudaGetDeviceCount(&device_count)); check_cuda_error(cudaSetDevice(rank % device_count)); check_cuda_error(cudaGetDevice(&device)); @@ -188,7 +204,7 @@ void multi_gpu_gpt_example(const INIReader reader) &v_start_ids, max_input_len, end_id, - beam_width, + 1, "../examples/cpp/multi_gpu_gpt/start_ids.csv"); int* d_input_ids; @@ -201,10 +217,10 @@ void multi_gpu_gpt_example(const INIReader reader) } else { // conditional case. - deviceMalloc(&d_input_ids, request_batch_size * beam_width * max_input_len, false); - deviceMalloc(&d_input_lengths, request_batch_size * beam_width, false); - cudaH2Dcpy(d_input_ids, v_start_ids.data(), request_batch_size * beam_width * max_input_len); - cudaH2Dcpy(d_input_lengths, v_start_lengths.data(), request_batch_size * beam_width); + deviceMalloc(&d_input_ids, request_batch_size * max_input_len, false); + deviceMalloc(&d_input_lengths, request_batch_size, false); + cudaH2Dcpy(d_input_ids, v_start_ids.data(), request_batch_size * max_input_len); + cudaH2Dcpy(d_input_lengths, v_start_lengths.data(), request_batch_size); } const int total_output_len = max_input_len + request_output_len; @@ -242,6 +258,11 @@ void multi_gpu_gpt_example(const INIReader reader) if (std::is_same::value) { cublas_wrapper.setGemmConfig(CUDA_R_16F, CUDA_R_16F, CUDA_R_16F, CUDA_R_32F); } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + cublas_wrapper.setBF16GemmConfig(); + } +#endif else if (std::is_same::value) { cublas_wrapper.setFP32GemmConfig(); } @@ -271,6 +292,10 @@ void multi_gpu_gpt_example(const INIReader reader) if (world_size > 1) { MPICHECK(MPI_Bcast(&random_seed, 1, MPI_UNSIGNED_LONG_LONG, 0, MPI_COMM_WORLD)); } + + NcclParam tensor_para(tensor_para_rank, tensor_para_size, tensor_para_nccl_comm); + NcclParam pipeline_para(pipeline_para_rank, pipeline_para_size, pipeline_para_nccl_comm); + ParallelGpt gpt = ParallelGpt(0, // max_batch_size, FT will adjust the buffer automatically. 0, // max_seq_len, FT will adjust the buffer automatically. 0, // max_input_len, FT will adjust the buffer automatically. @@ -282,19 +307,15 @@ void multi_gpu_gpt_example(const INIReader reader) vocab_size, start_id, end_id, - 0.0f, - top_k, - top_p, - random_seed, - temperature, + 0.0f, // beam_search_diversity_rate, + 0, // top_k, + 0.0, // top_p, + 0, // random_seed, + 1.0f, // temperature, 1.0f, // len_penalty, - repetition_penalty, - tensor_para_size, - tensor_para_rank, - tensor_para_nccl_comm, - pipeline_para_size, - pipeline_para_rank, - pipeline_para_nccl_comm, + 1.0f, // repetition_penalty, + tensor_para, + pipeline_para, stream, &cublas_wrapper, &allocator, @@ -310,28 +331,60 @@ void multi_gpu_gpt_example(const INIReader reader) deviceMalloc(&d_parent_ids, request_batch_size * beam_width * total_output_len, false); deviceMalloc(&d_sequence_lengths, request_batch_size * beam_width, false); - std::vector input_tensors = std::vector{ - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{request_batch_size * beam_width, (size_t)max_input_len}, - d_input_ids}, - Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size * beam_width}, d_input_lengths}, - Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, &total_output_len}}; - - std::vector output_tensors = std::vector{ - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{request_batch_size, beam_width, (size_t)total_output_len}, - d_output_ids}, - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{(size_t)total_output_len, request_batch_size, beam_width}, - d_parent_ids}, - Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size, beam_width}, d_sequence_lengths}, - Tensor{MEMORY_GPU, - TYPE_FP32, - std::vector{(size_t)request_output_len, request_batch_size, beam_width}, - nullptr}}; + std::unordered_map input_tensors = std::unordered_map{ + {"input_ids", + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size, (size_t)max_input_len}, d_input_ids}}, + {"input_lengths", Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size}, d_input_lengths}}, + {"max_output_seq_len", Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, &total_output_len}}}; + if (top_k == 0 && top_p == 0.0f) { + FT_CHECK(beam_width > 1); + input_tensors.insert({"beam_search_diversity_rate", + Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &beam_search_diversity_rate}}); + } + else { + if (top_p != 0.0f) { + input_tensors.insert({"runtime_top_p", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &top_p}}); + } + if (top_k != 0) { + input_tensors.insert({"runtime_top_k", Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, &top_k}}); + } + } + input_tensors.insert({"temperature", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &temperature}}); + input_tensors.insert({"len_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &len_penalty}}); + input_tensors.insert( + {"repetition_penalty", Tensor{MEMORY_CPU, TYPE_FP32, std::vector{1}, &repetition_penalty}}); + input_tensors.insert({"random_seed", Tensor{MEMORY_CPU, TYPE_UINT64, std::vector{1}, &random_seed}}); + + std::unordered_map output_tensors = std::unordered_map{ + {"output_ids", + Tensor{MEMORY_GPU, + TYPE_INT32, + std::vector{request_batch_size, beam_width, (size_t)total_output_len}, + d_output_ids}}, + {"parent_ids", + Tensor{MEMORY_GPU, + TYPE_INT32, + std::vector{(size_t)total_output_len, request_batch_size, beam_width}, + d_parent_ids}}, + {"sequence_length", + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{request_batch_size, beam_width}, d_sequence_lengths}}}; + + float* output_log_probs = nullptr; + float* d_cum_log_probs = nullptr; + if (is_return_log_probs) { + deviceMalloc(&output_log_probs, request_batch_size * beam_width * request_output_len); + output_tensors.insert({"output_log_probs", + Tensor{MEMORY_GPU, + TYPE_FP32, + std::vector{request_batch_size, beam_width, (size_t)request_output_len}, + output_log_probs}}); + deviceMalloc(&d_cum_log_probs, request_batch_size * beam_width); + output_tensors.insert( + {"cum_log_probs", + Tensor{MEMORY_GPU, TYPE_FP32, std::vector{request_batch_size, beam_width}, d_cum_log_probs}}); + input_tensors.insert({"is_return_context_cum_log_probs", + Tensor{MEMORY_CPU, TYPE_BOOL, std::vector{1}, &is_return_context_cum_log_probs}}); + } print_mem_usage(); @@ -354,7 +407,6 @@ void multi_gpu_gpt_example(const INIReader reader) nvtx::resetScope(); if (rank == 0) { - std::string fName = "out"; auto outFile = std::ofstream(fName, std::ios::out); if (!outFile.is_open()) { @@ -369,21 +421,48 @@ void multi_gpu_gpt_example(const INIReader reader) std::cout << "Writing " << outCount << " elements\n"; int zeroCount = 0; for (size_t i = 0; i < outCount; i++) { - if (hBuf[i] == int(0)) + if (hBuf[i] == int(0)) { zeroCount++; + } outFile << hBuf[i] << " "; - if ((i + 1) % (total_output_len) == 0) + if ((i + 1) % (total_output_len) == 0) { outFile << std::endl; + } - if (i < 10) + if (i < 10) { printf("%5d ", hBuf[i]); - if ((i + 1) % (total_output_len) == 0 && i < 10) + } + if ((i + 1) % (total_output_len) == 0 && i < 10) { std::cout << std::endl; + } } std::cout << std::endl << "zeroCount = " << zeroCount << std::endl; } delete[] hBuf; } + outFile.close(); + + if (d_cum_log_probs != nullptr) { + std::string logprob_fname = "logprob.out"; + std::ofstream logprob_file = std::ofstream("logprob.out", std::ios::out); + if (!logprob_file.is_open()) { + printf("[WARNING] Cannot write results into output file %s \n", logprob_fname.c_str()); + } + else { + size_t cum_log_probs_size = request_batch_size * beam_width; + printf("[INFO] Writing %ld elements (log probs)\n", cum_log_probs_size); + float* h_buf = new float[cum_log_probs_size]; + cudaD2Hcpy(h_buf, d_cum_log_probs, cum_log_probs_size); + for (size_t i = 0; i < cum_log_probs_size; i++) { + logprob_file << h_buf[i] << std::endl; + if (i < 10) { + printf(" %10.6f\n", h_buf[i]); + } + } + delete[] h_buf; + } + logprob_file.close(); + } } // test time diff --git a/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_triton_example.cc b/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_triton_example.cc index 9eae4d060..9e22ae87e 100644 --- a/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_triton_example.cc +++ b/examples/cpp/multi_gpu_gpt/multi_gpu_gpt_triton_example.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -14,24 +14,35 @@ * limitations under the License. */ +#include +#include + #include "3rdparty/INIReader.h" #include "examples/cpp/multi_gpu_gpt/gpt_example_utils.h" #include "src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModel.h" #include "src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModelInstance.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" #include "src/fastertransformer/utils/mpi_utils.h" -#include -#include - namespace ft = fastertransformer; -std::vector>> broadCastRequest(const std::vector& v_start_ids, - const std::vector& v_start_lengths, - const int node_id, - const int gpu_count, - const int beam_width, - const int request_output_len, - std::vector* pointer_record) +std::vector>> +broadcastRequest(const std::vector& v_start_ids, + const std::vector& v_start_lengths, + const int node_id, + const int gpu_count, + const int beam_width, + const int request_output_len, + const float beam_search_diversity_rate, + const int runtime_top_k, + const float runtime_top_p, + const float temperature, + const float len_penalty, + const float repetition_penalty, + const unsigned long long int random_seed, + const bool is_return_log_probs, + const bool is_return_context_cum_log_probs, + std::vector* pointer_record) { // broadcast the request to all nodes, and copy "gpu_count" copies on different gpu int size_1 = v_start_ids.size(); @@ -48,13 +59,13 @@ std::vector>> broadCastRequest(const } MPI_Barrier(MPI_COMM_WORLD); - int request_batch_size = size_2 / beam_width; + int request_batch_size = size_2; int max_input_len = size_1 / size_2; MPICHECK(MPI_Bcast(v_input_ids.data(), size_1, MPI_INT, 0, MPI_COMM_WORLD)); MPICHECK(MPI_Bcast(v_input_lengths.data(), size_2, MPI_INT, 0, MPI_COMM_WORLD)); - std::vector>> request_list; + std::vector>> request_list; for (int device_id = 0; device_id < gpu_count; device_id++) { ft::check_cuda_error(cudaSetDevice(device_id)); @@ -77,18 +88,84 @@ std::vector>> broadCastRequest(const int* request_output_len_ptr = new int((int)(request_output_len)); - request_list.push_back(std::shared_ptr>(new std::vector{ - triton::Tensor{triton::MEMORY_GPU, - triton::TYPE_INT32, - std::vector{(size_t)request_batch_size, (size_t)beam_width, (size_t)max_input_len}, - d_input_ids}, - triton::Tensor{triton::MEMORY_GPU, - triton::TYPE_INT32, - std::vector{(size_t)request_batch_size, (size_t)beam_width}, - d_input_lengths}, - triton::Tensor{ - triton::MEMORY_CPU, triton::TYPE_INT32, std::vector{(size_t)1}, request_output_len_ptr}})); - + request_list.push_back(std::shared_ptr>( + new std::unordered_map{ + {"input_ids", + triton::Tensor{triton::MEMORY_GPU, + triton::TYPE_INT32, + std::vector{(size_t)request_batch_size, (size_t)max_input_len}, + d_input_ids}}, + {"input_lengths", + triton::Tensor{triton::MEMORY_GPU, + triton::TYPE_INT32, + std::vector{(size_t)request_batch_size}, + d_input_lengths}}, + {"request_output_len", + triton::Tensor{triton::MEMORY_CPU, + triton::TYPE_INT32, + std::vector{(size_t)1}, + request_output_len_ptr}}})); + int* beam_width_ptr = new int(beam_width); + pointer_record->push_back(beam_width_ptr); + request_list[device_id]->insert( + {"beam_width", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_INT32, std::vector{1}, beam_width_ptr}}); + if (beam_width > 1) { + float* beam_search_diversity_rate_ptr = new float(beam_search_diversity_rate); + pointer_record->push_back(beam_search_diversity_rate_ptr); + request_list[device_id]->insert( + {"beam_search_diversity_rate", + triton::Tensor{ + triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, beam_search_diversity_rate_ptr}}); + } + else { + if (runtime_top_p != 0.0f) { + float* runtime_top_p_ptr = new float(runtime_top_p); + pointer_record->push_back(runtime_top_p_ptr); + request_list[device_id]->insert( + {"runtime_top_p", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, runtime_top_p_ptr}}); + } + if (runtime_top_k != 0) { + int* runtime_top_k_ptr = new int(runtime_top_k); + pointer_record->push_back(runtime_top_k_ptr); + request_list[device_id]->insert( + {"runtime_top_k", + triton::Tensor{ + triton::MEMORY_CPU, triton::TYPE_INT32, std::vector{1}, runtime_top_k_ptr}}); + } + } + float* temperature_ptr = new float(temperature); + pointer_record->push_back(temperature_ptr); + request_list[device_id]->insert( + {"temperature", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, temperature_ptr}}); + float* len_penalty_ptr = new float(len_penalty); + pointer_record->push_back(len_penalty_ptr); + request_list[device_id]->insert( + {"len_penalty", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, len_penalty_ptr}}); + float* repetition_penalty_ptr = new float(repetition_penalty); + pointer_record->push_back(repetition_penalty_ptr); + request_list[device_id]->insert( + {"repetition_penalty", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, repetition_penalty_ptr}}); + unsigned long long int* random_seed_ptr = new unsigned long long int(random_seed); + pointer_record->push_back(random_seed_ptr); + request_list[device_id]->insert( + {"random_seed", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_FP32, std::vector{1}, random_seed_ptr}}); + bool* is_return_log_probs_ptr = new bool(is_return_log_probs); + pointer_record->push_back(is_return_log_probs_ptr); + request_list[device_id]->insert( + {"is_return_log_probs", + triton::Tensor{triton::MEMORY_CPU, triton::TYPE_BOOL, std::vector{1}, is_return_log_probs_ptr}}); + bool* is_return_context_cum_log_probs = new bool(is_return_context_cum_log_probs); + pointer_record->push_back(is_return_context_cum_log_probs); + request_list[device_id]->insert( + {"is_return_context_cum_log_probs", + triton::Tensor{ + triton::MEMORY_CPU, triton::TYPE_BOOL, std::vector{1}, is_return_context_cum_log_probs}}); pointer_record->push_back(d_input_ids); pointer_record->push_back(d_input_lengths); pointer_record->push_back(request_output_len_ptr); @@ -97,7 +174,7 @@ std::vector>> broadCastRequest(const return request_list; } -std::vector>> +std::vector>> prepareRequest(std::string ini_name, const int node_id, const int gpu_count, std::vector* pointer_record) { INIReader reader = INIReader(ini_name); @@ -109,9 +186,21 @@ prepareRequest(std::string ini_name, const int node_id, const int gpu_count, std const size_t request_batch_size = reader.GetInteger("request", "request_batch_size"); const size_t beam_width = reader.GetInteger("ft_instance_hyperparameter", "beam_width"); const size_t request_output_len = reader.GetInteger("request", "request_output_len"); + const int top_k = reader.GetInteger("ft_instance_hyperparameter", "top_k"); + const float top_p = reader.GetFloat("ft_instance_hyperparameter", "top_p"); + const float temperature = reader.GetFloat("ft_instance_hyperparameter", "temperature"); + const float repetition_penalty = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty"); + const float len_penalty = 1.0f; + const float beam_search_diversity_rate = 0.0f; + const unsigned long long int random_seed = 0; + const bool is_return_log_probs = reader.GetBoolean("request", "return_log_probs", false); + // Whether to include input contexts in computing the cumulative log probabilities. + const bool is_return_context_cum_log_probs = reader.GetBoolean("request", "context_log_probs", false); + if (is_return_log_probs && !is_return_context_cum_log_probs) { + FT_LOG_WARNING("context_log_probs will be ignored since return_log_probs is disabled."); + } const int end_id = 50256; - std::vector v_start_ids; std::vector v_start_lengths; @@ -121,11 +210,25 @@ prepareRequest(std::string ini_name, const int node_id, const int gpu_count, std &v_start_ids, max_input_len, end_id, - beam_width, + 1, "../examples/cpp/multi_gpu_gpt/start_ids.csv"); - auto request_list = broadCastRequest( - v_start_ids, v_start_lengths, node_id, gpu_count, beam_width, request_output_len, pointer_record); + auto request_list = broadcastRequest(v_start_ids, + v_start_lengths, + node_id, + gpu_count, + beam_width, + request_output_len, + beam_search_diversity_rate, + top_k, + top_p, + temperature, + len_penalty, + repetition_penalty, + random_seed, + is_return_log_probs, + is_return_context_cum_log_probs, + pointer_record); return request_list; } @@ -133,22 +236,23 @@ int threadCreateModelInstances(std::shared_ptr model, std::vector>* model_instances, const int device_id, const int rank, - std::pair, std::vector> nccl_comms) + std::pair, std::vector> nccl_comms, + std::shared_ptr custom_all_reduce_comm = nullptr) { - printf("[INFO] rank = %d \n", rank); + FT_LOG_INFO("rank = %d", rank); ft::check_cuda_error(cudaSetDevice(device_id)); cudaStream_t stream; ft::check_cuda_error(cudaStreamCreate(&stream)); - auto model_instance = model->createModelInstance(device_id, rank, stream, nccl_comms); + auto model_instance = model->createModelInstance(device_id, rank, stream, nccl_comms, custom_all_reduce_comm); model_instances->at(device_id) = std::move(model_instance); - printf("model instance %d is created \n", device_id); + FT_LOG_INFO("model instance %d is created", device_id); ft::print_mem_usage(); return 0; } int threadForward(std::unique_ptr* model_instance, - std::shared_ptr> request, - std::shared_ptr>* output_tensors, + std::shared_ptr> request, + std::shared_ptr>* output_tensors, const int device_id) { ft::check_cuda_error(cudaSetDevice(device_id)); @@ -197,13 +301,25 @@ int main(int argc, char* argv[]) std::pair, std::vector> nccl_comms = model->createNcclComms(nccl_ids, node_id); cudaDeviceSynchronize(); + // Optional Step: create custom all reduce comm + std::vector> custom_all_reduce_comms; + model->createCustomComms(&custom_all_reduce_comms, world_size); + // step 3: Create model instances std::vector> model_instances((size_t)gpu_count); std::vector threads; + + threads.clear(); + for (int device_id = 0; device_id < gpu_count; device_id++) { const int rank = node_id * gpu_count + device_id; - threads.push_back( - std::thread(threadCreateModelInstances, model, &model_instances, device_id, rank, nccl_comms)); + threads.push_back(std::thread(threadCreateModelInstances, + model, + &model_instances, + device_id, + rank, + nccl_comms, + custom_all_reduce_comms[rank])); } for (auto& t : threads) { t.join(); @@ -211,12 +327,13 @@ int main(int argc, char* argv[]) // step 4: prepare request std::vector pointer_record; // Used to prevent the pointers are release after leaving functions - std::vector>> request_list = + std::vector>> request_list = prepareRequest(ini_name, node_id, gpu_count, &pointer_record); - printf("[INFO] request is created \n"); + FT_LOG_INFO("request is created"); // step 5: Forward - std::vector>> output_tensors_lists((size_t)gpu_count); + std::vector>> output_tensors_lists( + (size_t)gpu_count); for (int i = 0; i < 2; i++) { threads.clear(); for (int device_id = 0; device_id < gpu_count; device_id++) { @@ -230,19 +347,19 @@ int main(int argc, char* argv[]) t.join(); } } - printf("[INFO] forward is completed. \n"); + FT_LOG_INFO("forward is completed."); - const int* d_output_ids = (const int*)output_tensors_lists[0].get()->at(0).data; - const int batch_size = output_tensors_lists[0].get()->at(0).shape[0]; - const int beam_width = output_tensors_lists[0].get()->at(0).shape[1]; - const int seq_len = output_tensors_lists[0].get()->at(0).shape[2]; + const int* d_output_ids = (const int*)output_tensors_lists[0].get()->at("output_ids").data; + const int batch_size = output_tensors_lists[0].get()->at("output_ids").shape[0]; + const int beam_width = output_tensors_lists[0].get()->at("output_ids").shape[1]; + const int seq_len = output_tensors_lists[0].get()->at("output_ids").shape[2]; // step 6: check results if (node_id == 0) { std::string fName = "out"; auto outFile = std::ofstream(fName, std::ios::out); if (!outFile.is_open()) { - printf("[WARNING] Cannot write results into output file %s \n", fName.c_str()); + FT_LOG_WARNING("Cannot write results into output file %s", fName.c_str()); } else { size_t outCount = batch_size * beam_width * seq_len; @@ -253,16 +370,20 @@ int main(int argc, char* argv[]) std::cout << "Writing " << outCount << " elements\n"; int zeroCount = 0; for (size_t i = 0; i < outCount; i++) { - if (hBuf[i] == int(0)) + if (hBuf[i] == int(0)) { zeroCount++; + } outFile << hBuf[i] << " "; - if ((i + 1) % (seq_len) == 0) + if ((i + 1) % (seq_len) == 0) { outFile << std::endl; + } - if (i < 10) + if (i < 10) { printf("%5d ", hBuf[i]); - if ((i + 1) % (seq_len) == 0 && i < 10) + } + if ((i + 1) % (seq_len) == 0 && i < 10) { std::cout << std::endl; + } } std::cout << std::endl << "zeroCount = " << zeroCount << std::endl; } @@ -296,12 +417,12 @@ int main(int argc, char* argv[]) gettimeofday(&end, NULL); - printf("[INFO] batch_size %d beam_width %d seq_len %d" - " FT-CPP-GPT-Triton-time %.2f ms\n", - batch_size, - beam_width, - seq_len, - ((end.tv_sec - start.tv_sec) * 1000 + (end.tv_usec - start.tv_usec) * 0.001) / ite); + FT_LOG_INFO("batch_size %d beam_width %d seq_len %d" + " FT-CPP-GPT-Triton-time %.2f ms", + batch_size, + beam_width, + seq_len, + ((end.tv_sec - start.tv_sec) * 1000 + (end.tv_usec - start.tv_usec) * 0.001) / ite); MPICHECK(MPI_Finalize()); return 0; diff --git a/examples/cpp/swin/CMakeLists.txt b/examples/cpp/swin/CMakeLists.txt new file mode 100644 index 000000000..bb95c98e6 --- /dev/null +++ b/examples/cpp/swin/CMakeLists.txt @@ -0,0 +1,21 @@ +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +cmake_minimum_required(VERSION 3.8) + +set(swin_transformer_nv_files + swin_example.cc +) +add_executable(swin_example ${swin_transformer_nv_files}) +target_link_libraries(swin_example PUBLIC trt_fused_multi_head_attention Swin + cublasMMWrapper memory_utils -lcublas -lcublasLt -lcudart -lcudnn) diff --git a/examples/cpp/swin/functions.h b/examples/cpp/swin/functions.h new file mode 100644 index 000000000..b42d52e48 --- /dev/null +++ b/examples/cpp/swin/functions.h @@ -0,0 +1,113 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "math.h" +#include "stdio.h" +#include "stdlib.h" +#include + +namespace fastertransformer { + +static int getWeightNum(const int layer_num, const int* depths) +{ + // We arrange weights layer by layer and block by block inside each layer; + // each block has 13 weights + // each layer has a block list && 4 weights + // each swin transformer has a layer list && 6 weights && 3 handles + + int weight_num = 6; + for (int l = 0; l < layer_num; l++) { + for (int di = 0; di < depths[l]; di++) { + weight_num += 13; + } + weight_num += 4; + } + return weight_num; +} + +static void generateWeightSize(std::vector& weight_size, + const int layer_num, + const int embed_dim, + const float mlp_ratio, + const int window_size, + const int img_size, + const int patch_size, + const int in_chans, + const int* depths, + const int* num_heads) +{ + size_t l_pow2 = 1; + for (int l = 0; l < layer_num; l++) { + for (int di = 0; di < depths[l]; di++) { + size_t attention_qkv_kernel_size = (l_pow2 * embed_dim) * (l_pow2 * embed_dim * 3); + weight_size.push_back(attention_qkv_kernel_size); + size_t attention_qkv_bias_size = l_pow2 * embed_dim * 3; + weight_size.push_back(attention_qkv_bias_size); + size_t attention_proj_kernel_size = (l_pow2 * embed_dim) * (l_pow2 * embed_dim); + weight_size.push_back(attention_proj_kernel_size); + size_t attention_proj_bias_size = l_pow2 * embed_dim; + weight_size.push_back(attention_proj_bias_size); + size_t mlp_linear_kernel_size = (mlp_ratio * l_pow2 * embed_dim) * (l_pow2 * embed_dim); + weight_size.push_back(mlp_linear_kernel_size); + size_t mlp_linear_bias_size = mlp_ratio * l_pow2 * embed_dim; + weight_size.push_back(mlp_linear_bias_size); + size_t mlp_linear2_kernel_size = (l_pow2 * embed_dim) * (mlp_ratio * l_pow2 * embed_dim); + weight_size.push_back(mlp_linear2_kernel_size); + size_t mlp_linear2_bias_size = l_pow2 * embed_dim; + weight_size.push_back(mlp_linear2_bias_size); + size_t block_norm_gamma_size = l_pow2 * embed_dim; + weight_size.push_back(block_norm_gamma_size); + size_t block_norm_beta_size = l_pow2 * embed_dim; + weight_size.push_back(block_norm_beta_size); + size_t block_norm2_gamma_size = l_pow2 * embed_dim; + weight_size.push_back(block_norm2_gamma_size); + size_t block_norm2_beta_size = l_pow2 * embed_dim; + weight_size.push_back(block_norm2_beta_size); + size_t attention_relative_pos_bias_size = + num_heads[l] * window_size * window_size * window_size * window_size; + weight_size.push_back(attention_relative_pos_bias_size); + } + size_t patchMerge_norm_gamma_size = (l != layer_num - 1) ? 4 * l_pow2 * embed_dim : 0; + weight_size.push_back(patchMerge_norm_gamma_size); + size_t patchMerge_norm_beta_size = (l != layer_num - 1) ? 4 * l_pow2 * embed_dim : 0; + weight_size.push_back(patchMerge_norm_beta_size); + size_t patchMerge_linear_kernel_size = + (l != layer_num - 1) ? (4 * l_pow2 * embed_dim) * (2 * l_pow2 * embed_dim) : 0; + weight_size.push_back(patchMerge_linear_kernel_size); + int window_num = img_size / patch_size / window_size / l_pow2; + window_num *= window_num; + size_t attn_mask_size = + (window_num > 1) ? window_num * (window_size * window_size) * (window_size * window_size) : 0; + weight_size.push_back(attn_mask_size); + l_pow2 *= 2; + } + size_t patchEmbed_proj_kernel_size = embed_dim * in_chans * patch_size * patch_size; + weight_size.push_back(patchEmbed_proj_kernel_size); + size_t patchEmbed_proj_bias_size = embed_dim; + weight_size.push_back(patchEmbed_proj_bias_size); + size_t patchEmbed_norm_gamma_size = embed_dim; + weight_size.push_back(patchEmbed_norm_gamma_size); + size_t patchEmbed_norm_beta_size = embed_dim; + weight_size.push_back(patchEmbed_norm_beta_size); + size_t norm_gamma_size = pow(2, layer_num - 1) * embed_dim; + weight_size.push_back(norm_gamma_size); + size_t norm_beta_size = norm_gamma_size; + weight_size.push_back(norm_beta_size); +} + +} // namespace fastertransformer diff --git a/examples/cpp/swin/swin_example.cc b/examples/cpp/swin/swin_example.cc new file mode 100644 index 000000000..ae7db0bce --- /dev/null +++ b/examples/cpp/swin/swin_example.cc @@ -0,0 +1,331 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "examples/cpp/swin/functions.h" +#include "src/fastertransformer/models/swin/Swin.h" +#include "src/fastertransformer/utils/memory_utils.h" +#include "stdio.h" +#include "stdlib.h" +#include +#include +#include + +using namespace fastertransformer; +using namespace std; + +template +void test(int model_type, int batch) +{ + cudnnHandle_t cudnn_handle; + cublasHandle_t cublas_handle; + cublasLtHandle_t cublaslt_handle; + cudaStream_t stream = 0; + checkCUDNN(cudnnCreate(&cudnn_handle)); + checkCUDNN(cudnnSetStream(cudnn_handle, stream)); + check_cuda_error(cublasCreate(&cublas_handle)); + check_cuda_error(cublasSetStream(cublas_handle, stream)); + check_cuda_error(cublasLtCreate(&cublaslt_handle)); + + cublasAlgoMap* cublas_algo_map = new cublasAlgoMap(GEMM_CONFIG); + + std::mutex* cublas_wrapper_mutex = new std::mutex(); + + cublasMMWrapper* cublas_wrapper = + new cublasMMWrapper(cublas_handle, cublaslt_handle, stream, cublas_algo_map, cublas_wrapper_mutex, nullptr); + + if (std::is_same::value) { + cublas_wrapper->setFP16GemmConfig(); + } + else if (std::is_same::value) { + cublas_wrapper->setFP32GemmConfig(); + } + bool is_tiny = true; + + int embed_dim = is_tiny ? 96 : 192; + int window_size = is_tiny ? 7 : 12; + int img_size = is_tiny ? 224 : 384; + int shift_size = window_size / 2; + int depths[4], num_heads[4]; + if (is_tiny) { + depths[0] = 2; + depths[1] = 2; + depths[2] = 6; + depths[3] = 2; + num_heads[0] = 3; + num_heads[1] = 6; + num_heads[2] = 12; + num_heads[3] = 24; + } + else { + depths[0] = 2; + depths[1] = 2; + depths[2] = 18; + depths[3] = 2; + num_heads[0] = 6; + num_heads[1] = 12; + num_heads[2] = 24; + num_heads[3] = 48; + } + + if (model_type == 0) { + embed_dim = 96; + window_size = 7; + img_size = 224; + shift_size = window_size / 2; + depths[0] = 2; + depths[1] = 2; + depths[2] = 6; + depths[3] = 2; + num_heads[0] = 3; + num_heads[1] = 6; + num_heads[2] = 12; + num_heads[3] = 24; + } + else if (model_type == 1) { + embed_dim = 96; + window_size = 7; + img_size = 224; + shift_size = window_size / 2; + depths[0] = 2; + depths[1] = 2; + depths[2] = 18; + depths[3] = 2; + num_heads[0] = 3; + num_heads[1] = 6; + num_heads[2] = 12; + num_heads[3] = 24; + } + else if (model_type == 2) { + embed_dim = 128; + window_size = 7; + img_size = 224; + shift_size = window_size / 2; + depths[0] = 2; + depths[1] = 2; + depths[2] = 18; + depths[3] = 2; + num_heads[0] = 4; + num_heads[1] = 8; + num_heads[2] = 16; + num_heads[3] = 32; + } + else if (model_type == 3) { + embed_dim = 128; + window_size = 12; + img_size = 384; + shift_size = window_size / 2; + depths[0] = 2; + depths[1] = 2; + depths[2] = 18; + depths[3] = 2; + num_heads[0] = 4; + num_heads[1] = 8; + num_heads[2] = 16; + num_heads[3] = 32; + } + else if (model_type == 4) { + embed_dim = 192; + window_size = 7; + img_size = 224; + shift_size = window_size / 2; + depths[0] = 2; + depths[1] = 2; + depths[2] = 18; + depths[3] = 2; + num_heads[0] = 6; + num_heads[1] = 12; + num_heads[2] = 24; + num_heads[3] = 48; + } + else if (model_type == 5) { + embed_dim = 192; + window_size = 12; + img_size = 384; + shift_size = window_size / 2; + depths[0] = 2; + depths[1] = 2; + depths[2] = 18; + depths[3] = 2; + num_heads[0] = 6; + num_heads[1] = 12; + num_heads[2] = 24; + num_heads[3] = 48; + } + int in_chans = 3; + bool ape = false; + bool patch_norm = true; + float mlp_ratio = 4.0f; + bool qkv_bias = true; + float qk_scale = 1.0f; + int layer_num = 4; + int patch_size = 4; + + int output_dim = int(pow(2, layer_num - 1)) * embed_dim; + int weight_num = getWeightNum(layer_num, depths); + // calculate the size of each weight + std::vector weight_size; + std::vector weight; + generateWeightSize( + weight_size, layer_num, embed_dim, mlp_ratio, window_size, img_size, patch_size, in_chans, depths, num_heads); + for (int i = 0; i < weight_size.size(); i++) { + T* weight_ptr; + deviceMalloc(&weight_ptr, weight_size[i], false); + weight.push_back(weight_ptr); + } + + SwinTransformerWeight params; + int weight_idx = 0; + for (int l = 0; l < layer_num; l++) { + SwinTransformerBasicLayerWeight bl; + for (int di = 0; di < depths[l]; di++) { + SwinTransformerBlockWeight p; + p.attention_weights.query_weight.kernel = weight[weight_idx++]; + p.attention_weights.query_weight.bias = weight[weight_idx++]; + p.attention_weights.attention_output_weight.kernel = weight[weight_idx++]; + p.attention_weights.attention_output_weight.bias = weight[weight_idx++]; + p.ffn_weights.intermediate_weight.kernel = weight[weight_idx++]; + p.ffn_weights.intermediate_weight.bias = weight[weight_idx++]; + p.ffn_weights.output_weight.kernel = weight[weight_idx++]; + p.ffn_weights.output_weight.bias = weight[weight_idx++]; + p.attn_layernorm_weights.gamma = weight[weight_idx++]; + p.attn_layernorm_weights.beta = weight[weight_idx++]; + p.ffn_layernorm_weights.gamma = weight[weight_idx++]; + p.ffn_layernorm_weights.beta = weight[weight_idx++]; + // Please use invokeGenRelativePosBias to get attention_relative_pos_bias from + // attention_relative_pos_bias_table; + p.attention_relative_pos_bias = weight[weight_idx++]; + bl.block_weight_list.push_back(p); + } + bl.merge_layernorm_weights.gamma = weight[weight_idx++]; + bl.merge_layernorm_weights.beta = weight[weight_idx++]; + bl.merge_linear_weights.kernel = weight[weight_idx++]; + bl.attn_mask = weight[weight_idx++]; + params.basic_layer_weight_list.push_back(bl); + } + params.patchEmbed_linear_weights.kernel = weight[weight_idx++]; + params.patchEmbed_linear_weights.bias = weight[weight_idx++]; + params.patchEmbed_norm_weights.gamma = weight[weight_idx++]; + params.patchEmbed_norm_weights.beta = weight[weight_idx++]; + params.norm_weights.gamma = weight[weight_idx++]; + params.norm_weights.beta = weight[weight_idx++]; + + T *input_d, *output_d; + deviceMalloc(&input_d, batch * img_size * img_size * in_chans, false); + deviceMalloc(&output_d, batch * output_dim, false); + + fastertransformer::Allocator allocator(0); + int max_batch = batch; + SwinTransformer sw(max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + window_size, + depths, + num_heads, + ape, + patch_norm, + layer_num, + mlp_ratio, + cudnn_handle, + stream, + cublas_wrapper, + &allocator, + false, + qkv_bias, + qk_scale); + + // sw.allocateBuffer(&allocator); + + const int sm = getSMVersion(); + int sm_ptr[1] = {sm}; + std::vector input_tensors = + std::vector{Tensor{MEMORY_GPU, + getTensorType(), + std::vector{(size_t)batch, (size_t)in_chans, (size_t)img_size * img_size}, + input_d}, + Tensor{MEMORY_CPU, TYPE_INT8, std::vector{1}, sm_ptr}}; + + std::vector output_tensors = + std::vector{Tensor{MEMORY_GPU, + getTensorType(), + std::vector{(size_t)batch, (size_t)img_size * img_size, (size_t)in_chans}, + output_d}}; + + // warmup + for (int i = 0; i < 10; i++) + sw.forward(&output_tensors, &input_tensors, params); + + int ite = 100; + CudaTimer cuda_timer(stream); + cuda_timer.start(); + for (int i = 0; i < ite; i++) + sw.forward(&output_tensors, &input_tensors, params); + float total_time = cuda_timer.stop(); + + FT_LOG_INFO("batch_size %ld model_type:%d " + "FT-CPP-time %.2f ms (%d iterations) ", + batch, + model_type, + total_time / ite, + ite); + + delete cublas_algo_map; + delete cublas_wrapper_mutex; + + // free data + for (int i = 0; i < weight.size(); i++) { + check_cuda_error(cudaFree(weight[i])); + } + check_cuda_error(cudaFree(output_d)); + check_cuda_error(cudaFree(input_d)); + check_cuda_error(cublasDestroy(cublas_handle)); + check_cuda_error(cublasLtDestroy(cublaslt_handle)); + checkCUDNN(cudnnDestroy(cudnn_handle)); + + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); +} + +int main(int argc, char* argv[]) +{ + struct cudaDeviceProp prop; + check_cuda_error(cudaGetDeviceProperties(&prop, 0)); + if (argc != 4) { + printf("[ERROR] swin_example is_fp16(0/1) model_type(0-5) batch_size\n"); + printf("model_type:\n"); + printf("0: tiny\t7x7\n"); + printf("1: small\t7x7\n"); + printf("2: base\t7x7\n"); + printf("3: base\t12x12\n"); + printf("4: large\t7x7\n"); + printf("5: large\t12x12\n"); + printf("e.g., ./bin/swin_example 1 0 32\n"); + return 0; + } + printf("Device %s\n", prop.name); + + bool use_fp16 = (atoi(argv[1]) == 1) ? true : false; + int model_type = atoi(argv[2]); + int batch = atoi(argv[3]); + + if (use_fp16) { + test(model_type, batch); + } + else { + test(model_type, batch); + } +} diff --git a/examples/cpp/swin_int8/CMakeLists.txt b/examples/cpp/swin_int8/CMakeLists.txt new file mode 100644 index 000000000..bade98c37 --- /dev/null +++ b/examples/cpp/swin_int8/CMakeLists.txt @@ -0,0 +1,18 @@ +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +cmake_minimum_required(VERSION 3.8) + +add_executable(swin_int8_example swin_int8_example.cc) +target_link_libraries(swin_int8_example PUBLIC trt_fused_multi_head_attention SwinINT8 cublasAlgoMap + cublasINT8MMWrapper quantize_weight memory_utils -lcublasLt -lcublas -lcudart -lcudnn) diff --git a/examples/cpp/swin_int8/swin_int8_example.cc b/examples/cpp/swin_int8/swin_int8_example.cc new file mode 100644 index 000000000..a77c09a54 --- /dev/null +++ b/examples/cpp/swin_int8/swin_int8_example.cc @@ -0,0 +1,352 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "examples/cpp/swin/functions.h" +#include "src/fastertransformer/models/swin_int8/SwinINT8.h" +#include "src/fastertransformer/utils/memory_utils.h" +#include "stdio.h" +#include "stdlib.h" +#include +#include +#include +#include + +using namespace fastertransformer; +using namespace std; + +template +void test(int model_type, int batch) +{ + cudnnHandle_t cudnn_handle; + cublasHandle_t cublas_handle; + cublasLtHandle_t cublaslt_handle; + cudaStream_t stream; + cudaStreamCreate(&stream); + checkCUDNN(cudnnCreate(&cudnn_handle)); + checkCUDNN(cudnnSetStream(cudnn_handle, stream)); + check_cuda_error(cublasCreate(&cublas_handle)); + check_cuda_error(cublasLtCreate(&cublaslt_handle)); + check_cuda_error(cublasSetStream(cublas_handle, stream)); + + cublasAlgoMap* cublas_algo_map = new cublasAlgoMap(IGEMM_CONFIG); + + std::mutex* cublas_wrapper_mutex = new std::mutex(); + + int sm = getSMVersion(); + + bool _use_ORDER_COL32_2R_4R4 = false; +#if (CUDART_VERSION >= 11000) + if (sm >= 80) { + _use_ORDER_COL32_2R_4R4 = true; + } +#endif + + cublasINT8MMWrapper* cublas_wrapper = new cublasINT8MMWrapper( + cublas_handle, cublaslt_handle, stream, cublas_algo_map, cublas_wrapper_mutex, _use_ORDER_COL32_2R_4R4); + if (std::is_same::value) { + cublas_wrapper->setFP16GemmConfig(); + } + else if (std::is_same::value) { + cublas_wrapper->setFP32GemmConfig(); + } + + bool is_tiny = true; + + int embed_dim = is_tiny ? 96 : 192; + int window_size = is_tiny ? 7 : 12; + int int8_mode = is_tiny ? 2 : 4; + int img_size = is_tiny ? 224 : 384; + int shift_size = window_size / 2; + int depths[4], num_heads[4]; + if (is_tiny) { + depths[0] = 2; + depths[1] = 2; + depths[2] = 6; + depths[3] = 2; + num_heads[0] = 3; + num_heads[1] = 6; + num_heads[2] = 12; + num_heads[3] = 24; + } + else { + depths[0] = 2; + depths[1] = 2; + depths[2] = 18; + depths[3] = 2; + num_heads[0] = 6; + num_heads[1] = 12; + num_heads[2] = 24; + num_heads[3] = 48; + } + + if (model_type == 0) { + int8_mode = 1; + embed_dim = 96; + window_size = 7; + img_size = 224; + shift_size = window_size / 2; + depths[0] = 2; + depths[1] = 2; + depths[2] = 6; + depths[3] = 2; + num_heads[0] = 3; + num_heads[1] = 6; + num_heads[2] = 12; + num_heads[3] = 24; + } + else if (model_type == 1) { + int8_mode = 1; + embed_dim = 96; + window_size = 7; + img_size = 224; + shift_size = window_size / 2; + depths[0] = 2; + depths[1] = 2; + depths[2] = 18; + depths[3] = 2; + num_heads[0] = 3; + num_heads[1] = 6; + num_heads[2] = 12; + num_heads[3] = 24; + } + else if (model_type == 2) { + int8_mode = 1; + embed_dim = 128; + window_size = 7; + img_size = 224; + shift_size = window_size / 2; + depths[0] = 2; + depths[1] = 2; + depths[2] = 18; + depths[3] = 2; + num_heads[0] = 4; + num_heads[1] = 8; + num_heads[2] = 16; + num_heads[3] = 32; + } + else if (model_type == 3) { + int8_mode = 1; + embed_dim = 128; + window_size = 12; + img_size = 384; + shift_size = window_size / 2; + depths[0] = 2; + depths[1] = 2; + depths[2] = 18; + depths[3] = 2; + num_heads[0] = 4; + num_heads[1] = 8; + num_heads[2] = 16; + num_heads[3] = 32; + } + else if (model_type == 4) { + int8_mode = 1; + embed_dim = 192; + window_size = 7; + img_size = 224; + shift_size = window_size / 2; + depths[0] = 2; + depths[1] = 2; + depths[2] = 18; + depths[3] = 2; + num_heads[0] = 6; + num_heads[1] = 12; + num_heads[2] = 24; + num_heads[3] = 48; + } + else if (model_type == 5) { + int8_mode = 1; + embed_dim = 192; + window_size = 12; + img_size = 384; + shift_size = window_size / 2; + depths[0] = 2; + depths[1] = 2; + depths[2] = 18; + depths[3] = 2; + num_heads[0] = 6; + num_heads[1] = 12; + num_heads[2] = 24; + num_heads[3] = 48; + } + int in_chans = 3; + bool ape = false; + bool patch_norm = true; + float mlp_ratio = 4.0f; + bool qkv_bias = true; + float qk_scale = 1.0f; + int layer_num = 4; + int patch_size = 4; + + int output_dim = int(pow(2, layer_num - 1)) * embed_dim; + int weight_num = getWeightNum(layer_num, depths); + // calculate the size of each weight + std::vector weight_size; + std::vector weight; + generateWeightSize( + weight_size, layer_num, embed_dim, mlp_ratio, window_size, img_size, patch_size, in_chans, depths, num_heads); + for (int i = 0; i < weight_size.size(); i++) { + T* weight_ptr; + deviceMalloc(&weight_ptr, weight_size[i], false); + weight.push_back(weight_ptr); + } + + SwinTransformerINT8Weight params; + int weight_idx = 0; + int hidden_dim = embed_dim; + for (int l = 0; l < layer_num; l++) { + SwinTransformerINT8BasicLayerWeight bl; + for (int di = 0; di < depths[l]; di++) { + SwinTransformerINT8BlockWeight p; + p.attention_weights.query_weight.kernel = weight[weight_idx++]; + p.attention_weights.query_weight.bias = weight[weight_idx++]; + p.attention_weights.attention_output_weight.kernel = weight[weight_idx++]; + p.attention_weights.attention_output_weight.bias = weight[weight_idx++]; + p.ffn_weights.intermediate_weight.kernel = weight[weight_idx++]; + p.ffn_weights.intermediate_weight.bias = weight[weight_idx++]; + p.ffn_weights.output_weight.kernel = weight[weight_idx++]; + p.ffn_weights.output_weight.bias = weight[weight_idx++]; + p.attn_layernorm_weights.gamma = weight[weight_idx++]; + p.attn_layernorm_weights.beta = weight[weight_idx++]; + p.ffn_layernorm_weights.gamma = weight[weight_idx++]; + p.ffn_layernorm_weights.beta = weight[weight_idx++]; + p.scalelist.size_ = ACTIVATION_AMAX_NUM + 5 + INT8O_GEMM_NUM + TRT_AMAX_NUM; + p.scalelist.p2_offset_ = ACTIVATION_AMAX_NUM; + p.scalelist.p3_offset_ = ACTIVATION_AMAX_NUM + 5; + p.scalelist.p4_offset_ = ACTIVATION_AMAX_NUM + 5 + INT8O_GEMM_NUM; + float* d_scale_list; + deviceMalloc(&(d_scale_list), p.scalelist.size_, false); + p.scalelist.d_scale_list_ = d_scale_list; + p.scalelist.h_scale_list_ = (float*)malloc(p.scalelist.size_ * sizeof(float)); + // cudaMemcpy(p.scalelist.h_scale_list_, p.scalelist.d_scale_list_, 96, cudaMemcpyDeviceToHost); + // Please use invokeGenRelativePosBias to get attention_relative_pos_bias from + // attention_relative_pos_bias_table; + p.attention_relative_pos_bias = weight[weight_idx++]; + bl.block_weight_list.push_back(p); + } + bl.merge_layernorm_weights.gamma = weight[weight_idx++]; + bl.merge_layernorm_weights.beta = weight[weight_idx++]; + bl.merge_linear_weights.kernel = weight[weight_idx++]; + bl.attn_mask = weight[weight_idx++]; + params.basic_layer_weight_list.push_back(bl); + hidden_dim *= 2; + } + params.patchEmbed_linear_weights.kernel = weight[weight_idx++]; + params.patchEmbed_linear_weights.bias = weight[weight_idx++]; + params.patchEmbed_norm_weights.gamma = weight[weight_idx++]; + params.patchEmbed_norm_weights.beta = weight[weight_idx++]; + params.norm_weights.gamma = weight[weight_idx++]; + params.norm_weights.beta = weight[weight_idx++]; + + T *input_d, *output_d; + deviceMalloc(&input_d, batch * img_size * img_size * in_chans, false); + deviceMalloc(&output_d, batch * output_dim, false); + + fastertransformer::Allocator allocator(0); + int max_batch = batch; + SwinTransformerINT8 sw(int8_mode, + max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + window_size, + depths, + num_heads, + ape, + patch_norm, + layer_num, + mlp_ratio, + cudnn_handle, + stream, + cublas_wrapper, + &allocator, + false, + qkv_bias, + qk_scale); + int sm_ptr[1] = {sm}; + std::vector input_tensors = + std::vector{Tensor{MEMORY_GPU, + getTensorType(), + std::vector{(size_t)batch, (size_t)in_chans, (size_t)img_size * img_size}, + input_d}, + Tensor{MEMORY_CPU, TYPE_INT8, std::vector{1}, sm_ptr}}; + + std::vector output_tensors = + std::vector{Tensor{MEMORY_GPU, + getTensorType(), + std::vector{(size_t)batch, (size_t)img_size * img_size, (size_t)in_chans}, + output_d}}; + + // warmup + for (int i = 0; i < 10; i++) { + sw.forward(&output_tensors, &input_tensors, params); + } + + int ite = 100; + CudaTimer cuda_timer(stream); + cuda_timer.start(); + for (int i = 0; i < ite; i++) { + sw.forward(&output_tensors, &input_tensors, params); + } + float total_time = cuda_timer.stop(); + + FT_LOG_INFO("batch_size %ld model_type:%d " + "FT-CPP-time %.2f ms (%d iterations) ", + batch, + model_type, + total_time / ite, + ite); + + delete cublas_algo_map; + delete cublas_wrapper_mutex; + + // free data + for (int i = 0; i < weight.size(); i++) { + check_cuda_error(cudaFree(weight[i])); + } + check_cuda_error(cudaFree(output_d)); + check_cuda_error(cudaFree(input_d)); + check_cuda_error(cublasDestroy(cublas_handle)); + checkCUDNN(cudnnDestroy(cudnn_handle)); + + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); +} + +int main(int argc, char* argv[]) +{ + struct cudaDeviceProp prop; + check_cuda_error(cudaGetDeviceProperties(&prop, 0)); + if (argc != 3) { + printf("[ERROR] swin_int8_example model_type(0-5) batch_size\n"); + printf("model_type:\n"); + printf("0: tiny\t7x7\n"); + printf("1: small\t7x7\n"); + printf("2: base\t7x7\n"); + printf("3: base\t12x12\n"); + printf("4: large\t7x7\n"); + printf("5: large\t12x12\n"); + printf("e.g., ./bin/swin_int8_example 0 32\n"); + return 0; + } + printf("Device %s\n", prop.name); + + int model_type = atoi(argv[1]); + int batch = atoi(argv[2]); + + test(model_type, batch); +} diff --git a/examples/cpp/vit/CMakeLists.txt b/examples/cpp/vit/CMakeLists.txt new file mode 100644 index 000000000..af2b87103 --- /dev/null +++ b/examples/cpp/vit/CMakeLists.txt @@ -0,0 +1,18 @@ +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +cmake_minimum_required(VERSION 3.8) + +add_executable(vit_example vit_example.cc) +target_link_libraries(vit_example PUBLIC ViT trt_fused_multi_head_attention vit_kernels + cublasMMWrapper -lcublas -lcublasLt -lcudart -lcudnn -lm) diff --git a/examples/cpp/vit/vit_example.cc b/examples/cpp/vit/vit_example.cc new file mode 100644 index 000000000..95fa8fa98 --- /dev/null +++ b/examples/cpp/vit/vit_example.cc @@ -0,0 +1,188 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/vit/ViT.h" +#include "stdio.h" +#include "stdlib.h" +#include +#include +#include + +using namespace fastertransformer; +using namespace std; + +template +void test( + int batch_size, int img_size, int patch_size, int embed_dim, int head_num, int layer_num, int token_classifier) +{ + cudnnHandle_t cudnn_handle; + cublasHandle_t cublas_handle; + cublasLtHandle_t cublaslt_handle; + cudaStream_t stream = 0; + checkCUDNN(cudnnCreate(&cudnn_handle)); + checkCUDNN(cudnnSetStream(cudnn_handle, stream)); + check_cuda_error(cublasCreate(&cublas_handle)); + check_cuda_error(cublasSetStream(cublas_handle, stream)); + check_cuda_error(cublasLtCreate(&cublaslt_handle)); + + cublasAlgoMap* cublas_algo_map = new cublasAlgoMap("gemm_config.in"); + + std::mutex* cublas_wrapper_mutex = new std::mutex(); + + cublasMMWrapper* cublas_wrapper = + new cublasMMWrapper(cublas_handle, cublaslt_handle, stream, cublas_algo_map, cublas_wrapper_mutex, nullptr); + + if (std::is_same::value) { + cublas_wrapper->setFP16GemmConfig(); + } + else if (std::is_same::value) { + cublas_wrapper->setFP32GemmConfig(); + } + const int in_chans = 3; + const bool with_cls_token = token_classifier > 0; + const int inter_size = embed_dim * 4; + const int head_dim = embed_dim / head_num; + const int seq_len = (img_size / patch_size) * (img_size / patch_size) + (with_cls_token ? 1 : 0); + + ViTWeight params = + ViTWeight(embed_dim, inter_size, layer_num, img_size, patch_size, in_chans, with_cls_token); + + FT_LOG_INFO("batch_size: %d, img_size : %d,\n" + "patch_size: %d, embed_dim: %d,\n" + "head_num : %d, head_dim : %d,\n" + "layer_num : %d, seq_len : %d,\n" + "inter_size:%d\n", + batch_size, + img_size, + patch_size, + embed_dim, + head_num, + head_dim, + layer_num, + seq_len, + inter_size); + + AttentionType attention_type = getAttentionType(head_dim, getSMVersion(), true, seq_len); + printf("Attention Type: %d\n", int(attention_type)); + fastertransformer::Allocator allocator(0); + int max_batch = batch_size; + ViTTransformer* vit = new ViTTransformer(max_batch, + img_size, + in_chans, + patch_size, + embed_dim, + head_num, + inter_size, + layer_num, + with_cls_token, + getSMVersion(), + 1.0f, + stream, + cudnn_handle, + cublas_wrapper, + &allocator, + false, + attention_type); + + T *input_d, *output_d; + deviceMalloc(&input_d, batch_size * img_size * img_size * in_chans, false); + deviceMalloc(&output_d, batch_size * seq_len * embed_dim, false); + + std::vector input_tensors = std::vector{ + Tensor{MEMORY_GPU, + getTensorType(), + std::vector{(size_t)batch_size, (size_t)in_chans, (size_t)img_size, (size_t)img_size}, + input_d}}; + + std::vector output_tensors = + std::vector{Tensor{MEMORY_GPU, + getTensorType(), + std::vector{(size_t)batch_size, (size_t)seq_len, (size_t)embed_dim}, + output_d}}; + + // warmup + for (int i = 0; i < 10; i++) { + vit->forward(&output_tensors, &input_tensors, ¶ms); + } + + int ite = 100; + CudaTimer cuda_timer(stream); + cuda_timer.start(); + for (int i = 0; i < ite; i++) { + vit->forward(&output_tensors, &input_tensors, ¶ms); + } + float total_time = cuda_timer.stop(); + + FT_LOG_INFO("batch_size: %d, img_size : %d,\n" + "patch_size: %d, embed_dim: %d,\n" + "head_num : %d, head_dim : %d,\n" + "layer_num : %d, is_fp16 : %d,\n" + "FT-CPP-time %.2f ms (%d iterations) ", + batch_size, + img_size, + patch_size, + embed_dim, + head_num, + head_dim, + layer_num, + std::is_same::value, + total_time / ite, + ite); + + delete vit; + delete cublas_algo_map; + delete cublas_wrapper_mutex; + + // free data + check_cuda_error(cudaFree(output_d)); + check_cuda_error(cudaFree(input_d)); + check_cuda_error(cublasDestroy(cublas_handle)); + check_cuda_error(cublasLtDestroy(cublaslt_handle)); + checkCUDNN(cudnnDestroy(cudnn_handle)); + + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); +} + +int main(int argc, char* argv[]) +{ + struct cudaDeviceProp prop; + check_cuda_error(cudaGetDeviceProperties(&prop, 0)); + printf("Device %s\n", prop.name); + + if (argc != 9) { + printf( + "[ERROR] vit_example batch_size img_size patch_size embed_dim head_number layer_num with_cls_token is_fp16\n"); + printf("e.g. ./bin/vit_example 1 224 16 768 12 12 1 0 \n"); + return 0; + } + + const int batch_size = atoi(argv[1]); + const int img_size = atoi(argv[2]); + const int patch_size = atoi(argv[3]); + const int embed_dim = atoi(argv[4]); + const int head_num = atoi(argv[5]); + const int layer_num = atoi(argv[6]); + const int token_classifier = atoi(argv[7]); + const int is_fp16 = atoi(argv[8]); + + if (is_fp16) { + test(batch_size, img_size, patch_size, embed_dim, head_num, layer_num, token_classifier); + } + else { + test(batch_size, img_size, patch_size, embed_dim, head_num, layer_num, token_classifier); + } +} diff --git a/examples/cpp/vit_int8/CMakeLists.txt b/examples/cpp/vit_int8/CMakeLists.txt new file mode 100644 index 000000000..186144dcd --- /dev/null +++ b/examples/cpp/vit_int8/CMakeLists.txt @@ -0,0 +1,18 @@ +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +cmake_minimum_required(VERSION 3.8) + +add_executable(vit_int8_example vit_int8_example.cc) +target_link_libraries(vit_int8_example PUBLIC ViTINT8 trt_fused_multi_head_attention vit_kernels + cublasMMWrapper -lcublas -lcublasLt -lcudart -lcudnn -lm) diff --git a/examples/cpp/vit_int8/vit_int8_example.cc b/examples/cpp/vit_int8/vit_int8_example.cc new file mode 100644 index 000000000..21b11cf86 --- /dev/null +++ b/examples/cpp/vit_int8/vit_int8_example.cc @@ -0,0 +1,207 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/vit_int8/ViTINT8.h" +#include "stdio.h" +#include "stdlib.h" +#include +#include +#include + +using namespace fastertransformer; +using namespace std; + +template +void test(int batch_size, + int img_size, + int patch_size, + int embed_dim, + int head_num, + int layer_num, + int int8_mode, + int has_cls_token) +{ + cudnnHandle_t cudnn_handle; + cublasHandle_t cublas_handle; + cublasLtHandle_t cublaslt_handle; + cudaStream_t stream = 0; + checkCUDNN(cudnnCreate(&cudnn_handle)); + checkCUDNN(cudnnSetStream(cudnn_handle, stream)); + check_cuda_error(cublasCreate(&cublas_handle)); + check_cuda_error(cublasSetStream(cublas_handle, stream)); + check_cuda_error(cublasLtCreate(&cublaslt_handle)); + + cublasAlgoMap* cublas_algo_map = new cublasAlgoMap("igemm_config.in"); + + int sm = getSMVersion(); + + std::mutex* cublas_wrapper_mutex = new std::mutex(); + + bool use_ORDER_COL32_2R_4R4 = false; +#if (CUDART_VERSION >= 11000) + if (sm >= 80) { + use_ORDER_COL32_2R_4R4 = true; + } +#endif + + cublasINT8MMWrapper* cublas_wrapper = new cublasINT8MMWrapper( + cublas_handle, cublaslt_handle, stream, cublas_algo_map, cublas_wrapper_mutex, use_ORDER_COL32_2R_4R4); + + if (std::is_same::value) { + cublas_wrapper->setFP16GemmConfig(); + } + else if (std::is_same::value) { + cublas_wrapper->setFP32GemmConfig(); + } + const int in_chans = 3; + const int inter_size = embed_dim * 4; + const int head_dim = embed_dim / head_num; + const bool with_cls_token = has_cls_token > 0; + const int seq_len = (img_size / patch_size) * (img_size / patch_size) + (with_cls_token ? 1 : 0); + + ViTINT8Weight params = + ViTINT8Weight(embed_dim, inter_size, layer_num, img_size, patch_size, in_chans, with_cls_token); + + FT_LOG_INFO("batch_size: %d, img_size : %d,\n" + "patch_size: %d, embed_dim: %d,\n" + "head_num : %d, head_dim : %d,\n" + "layer_num : %d, seq_len : %d,\n" + "inter_size:%d\n", + batch_size, + img_size, + patch_size, + embed_dim, + head_num, + head_dim, + layer_num, + seq_len, + inter_size); + + AttentionType attention_type = getAttentionType(head_dim, getSMVersion(), true, seq_len); + printf("attention_type: %d\n", int(attention_type)); + fastertransformer::Allocator allocator(0); + int max_batch = batch_size; + ViTTransformerINT8* vit = new ViTTransformerINT8(max_batch, + img_size, + in_chans, + patch_size, + embed_dim, + head_num, + inter_size, + layer_num, + with_cls_token, + getSMVersion(), + 1.0f, + int8_mode, + stream, + cudnn_handle, + cublas_wrapper, + &allocator, + false, + attention_type); + + T *input_d, *output_d; + deviceMalloc(&input_d, batch_size * img_size * img_size * in_chans, false); + deviceMalloc(&output_d, batch_size * seq_len * embed_dim, false); + + std::vector input_tensors = std::vector{ + Tensor{MEMORY_GPU, + getTensorType(), + std::vector{(size_t)batch_size, (size_t)in_chans, (size_t)img_size, (size_t)img_size}, + input_d}}; + + std::vector output_tensors = + std::vector{Tensor{MEMORY_GPU, + getTensorType(), + std::vector{(size_t)batch_size, (size_t)seq_len, (size_t)embed_dim}, + output_d}}; + + // warmup + for (int i = 0; i < 10; i++) { + vit->forward(&output_tensors, &input_tensors, ¶ms); + } + + int ite = 100; + CudaTimer cuda_timer(stream); + cuda_timer.start(); + for (int i = 0; i < ite; i++) { + vit->forward(&output_tensors, &input_tensors, ¶ms); + } + float total_time = cuda_timer.stop(); + + FT_LOG_INFO("batch_size: %d, img_size : %d,\n" + "patch_size: %d, embed_dim: %d,\n" + "head_num : %d, head_dim : %d,\n" + "layer_num : %d, int8_mode: %d,\n" + "FT-CPP-time %.2f ms (%d iterations) ", + batch_size, + img_size, + patch_size, + embed_dim, + head_num, + head_dim, + layer_num, + int8_mode, + total_time / ite, + ite); + + delete vit; + delete cublas_algo_map; + delete cublas_wrapper_mutex; + + sync_check_cuda_error(); + + // free data + check_cuda_error(cudaFree(output_d)); + check_cuda_error(cudaFree(input_d)); + check_cuda_error(cublasDestroy(cublas_handle)); + check_cuda_error(cublasLtDestroy(cublaslt_handle)); + checkCUDNN(cudnnDestroy(cudnn_handle)); + + cudaDeviceSynchronize(); + check_cuda_error(cudaGetLastError()); +} + +int main(int argc, char* argv[]) +{ + struct cudaDeviceProp prop; + check_cuda_error(cudaGetDeviceProperties(&prop, 0)); + printf("Device %s\n", prop.name); + + if (argc != 10) { + printf( + "[ERROR] vit_int8_example batch_size img_size patch_size embed_dim head_number layer_num with_cls_token is_fp16 int8_mode\n"); + printf("e.g. ./bin/vit_int8_example 1 224 16 768 12 12 1 1 2\n"); + return 0; + } + + const int batch_size = atoi(argv[1]); + const int img_size = atoi(argv[2]); + const int patch_size = atoi(argv[3]); + const int embed_dim = atoi(argv[4]); + const int head_num = atoi(argv[5]); + const int layer_num = atoi(argv[6]); + const int has_cls_token = atoi(argv[7]); + const int is_fp16 = atoi(argv[8]); + const int int8_mode = atoi(argv[9]); + + if (is_fp16) { + test(batch_size, img_size, patch_size, embed_dim, head_num, layer_num, int8_mode, has_cls_token); + } + else { + test(batch_size, img_size, patch_size, embed_dim, head_num, layer_num, int8_mode, has_cls_token); + } +} diff --git a/examples/cpp/xlnet/CMakeLists.txt b/examples/cpp/xlnet/CMakeLists.txt index 43fe9e07d..531c8f862 100644 --- a/examples/cpp/xlnet/CMakeLists.txt +++ b/examples/cpp/xlnet/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/cpp/xlnet/xlnet_correctness_example.cc b/examples/cpp/xlnet/xlnet_correctness_example.cc index a106295c8..815ee2d5f 100644 --- a/examples/cpp/xlnet/xlnet_correctness_example.cc +++ b/examples/cpp/xlnet/xlnet_correctness_example.cc @@ -18,7 +18,6 @@ #include "src/fastertransformer/models/xlnet/Xlnet.h" using namespace fastertransformer; using namespace std; -//#include #include template diff --git a/examples/onnx/multi_gpu_gpt/onnx_ckpt_convert.py b/examples/onnx/multi_gpu_gpt/onnx_ckpt_convert.py index 423ae7259..1852e436d 100644 --- a/examples/onnx/multi_gpu_gpt/onnx_ckpt_convert.py +++ b/examples/onnx/multi_gpu_gpt/onnx_ckpt_convert.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/bert/bert_example.py b/examples/pytorch/bert/bert_example.py index b7e4adc0c..352e74826 100644 --- a/examples/pytorch/bert/bert_example.py +++ b/examples/pytorch/bert/bert_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -28,6 +28,7 @@ from examples.pytorch.bert.utils.encoder import EncoderWeights from examples.pytorch.bert.utils.encoder import CustomEncoder from examples.pytorch.bert.utils.encoder import HuggingFaceEncoder +from examples.pytorch.utils import print_memory_usage import threading def sequence_mask(lengths, max_len=None, is_2d=True): @@ -251,7 +252,8 @@ def run(): for t in thread_list: t.join() - sys.stdout.flush() + torch.cuda.empty_cache() + sys.stdout.flush() return max(torch.mean(FT_diff), torch.mean(EFF_diff)) diff --git a/examples/pytorch/bert/utils/checkpoint_quantization.py b/examples/pytorch/bert/utils/checkpoint_quantization.py index 1d0f2bf79..15046bddc 100644 --- a/examples/pytorch/bert/utils/checkpoint_quantization.py +++ b/examples/pytorch/bert/utils/checkpoint_quantization.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/bert/utils/encoder.py b/examples/pytorch/bert/utils/encoder.py index b56f14064..886f28426 100644 --- a/examples/pytorch/bert/utils/encoder.py +++ b/examples/pytorch/bert/utils/encoder.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -19,7 +19,7 @@ from transformers import BertConfig from transformers.modeling_bert import BertEncoder -from utils.checkpoint_quantization import checkpoint_quantization +from .checkpoint_quantization import checkpoint_quantization class EncoderWeights(object): def __init__(self, layer_num, hidden_dim, weights=None, sparse=False): diff --git a/examples/pytorch/decoder/decoder_example.py b/examples/pytorch/decoder/decoder_example.py index 70fc5cdc8..3278a0d8b 100644 --- a/examples/pytorch/decoder/decoder_example.py +++ b/examples/pytorch/decoder/decoder_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/decoder/utils/decoder.py b/examples/pytorch/decoder/utils/decoder.py index b0c7cdc47..66523dc48 100644 --- a/examples/pytorch/decoder/utils/decoder.py +++ b/examples/pytorch/decoder/utils/decoder.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/decoder/utils/ft_decoder.py b/examples/pytorch/decoder/utils/ft_decoder.py index 6b0a2f0a2..35e79c3df 100644 --- a/examples/pytorch/decoder/utils/ft_decoder.py +++ b/examples/pytorch/decoder/utils/ft_decoder.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/decoding/decoding_example.py b/examples/pytorch/decoding/decoding_example.py index 0323e384a..e64e1cea6 100644 --- a/examples/pytorch/decoding/decoding_example.py +++ b/examples/pytorch/decoding/decoding_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/decoding/utils/__init__.py b/examples/pytorch/decoding/utils/__init__.py index 2e4a68759..74183d081 100644 --- a/examples/pytorch/decoding/utils/__init__.py +++ b/examples/pytorch/decoding/utils/__init__.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/decoding/utils/decoding.py b/examples/pytorch/decoding/utils/decoding.py index 5c4a617a9..e8c6cf42b 100644 --- a/examples/pytorch/decoding/utils/decoding.py +++ b/examples/pytorch/decoding/utils/decoding.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -182,7 +182,9 @@ def finalize(beam_size, output_ids, parent_ids, out_seq_lens, end_id, max_seq_le parent_ids = torch.reshape(parent_ids, shape) if output_ids.is_cuda: torch.classes.load_library("./lib/libth_gather_tree.so") - ids = torch.ops.fastertransformer.gather_tree(output_ids.to(torch.int32), parent_ids.to(torch.int32), out_seq_lens.to(torch.int32), end_id) + batch_size = output_ids.shape[1] + end_ids = end_id * torch.ones(batch_size, dtype=torch.int32, device=output_ids.device) + ids = torch.ops.fastertransformer.gather_tree(output_ids.to(torch.int32), parent_ids.to(torch.int32), out_seq_lens.to(torch.int32), end_ids) else: ids = gather_tree(output_ids, parent_ids, max_lens, end_id) ids = torch.einsum('ijk->jki', ids) # batch_size, beam_size, max_seq_len diff --git a/examples/pytorch/decoding/utils/ft_decoding.py b/examples/pytorch/decoding/utils/ft_decoding.py index 0da5bbe64..db37e9188 100644 --- a/examples/pytorch/decoding/utils/ft_decoding.py +++ b/examples/pytorch/decoding/utils/ft_decoding.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/decoding/utils/translation_model.py b/examples/pytorch/decoding/utils/translation_model.py index eea4cef00..ace42364f 100644 --- a/examples/pytorch/decoding/utils/translation_model.py +++ b/examples/pytorch/decoding/utils/translation_model.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -202,21 +202,22 @@ def fix_key(s): if args.model_type != 'torch_decoding': encoder_weights = EncoderWeights(model_opt.enc_layers, model_opt.enc_rnn_size, checkpoint['model']) - encoder_weights.to_cuda() if args.data_type == 'fp16': encoder_weights.to_half() + encoder_weights.to_cuda() encoder = CustomEncoder(model_opt.enc_layers, model_opt.heads, model_opt.enc_rnn_size // model_opt.heads, encoder_weights, path=args.encoder_ths_path, embedding=model.encoder.embeddings) model.encoder = encoder + if args.model_type == 'decoding_ext': vocab_size = len(fields["tgt"].base_field.vocab) bos_idx = fields["tgt"].base_field.vocab.stoi[fields["tgt"].base_field.init_token] eos_idx = fields["tgt"].base_field.vocab.stoi[fields["tgt"].base_field.eos_token] decoding_weights = DecodingWeights(model_opt.dec_layers, model_opt.dec_rnn_size, vocab_size, checkpoint) - decoding_weights.to_cuda() ft_decoding_weights = FtDecodingWeights(model_opt.dec_layers, model_opt.dec_rnn_size, decoding_weights.w) if args.data_type == 'fp16': ft_decoding_weights.to_half() + ft_decoding_weights.to_cuda() model.decoder = CustomDecoding(model_opt.heads, model_opt.dec_rnn_size // model_opt.heads, model_opt.dec_rnn_size * 4, model_opt.dec_rnn_size, model_opt.dec_layers, vocab_size, bos_idx, eos_idx, args.beam_search_diversity_rate, @@ -233,7 +234,6 @@ def fix_key(s): vocab_size, bos_idx, eos_idx, decoding_weights, args=args) else: raise ValueError("Wrong model_type argument, must be one of [decoding_ext, torch_decoding, torch_decoding_with_decoder_ext]") - else: if model_opt.param_init != 0.0: for p in model.parameters(): diff --git a/examples/pytorch/decoding/utils/translator.py b/examples/pytorch/decoding/utils/translator.py index 129fd3ab8..b0fc29508 100644 --- a/examples/pytorch/decoding/utils/translator.py +++ b/examples/pytorch/decoding/utils/translator.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/encoder/encoder_example.py b/examples/pytorch/encoder/encoder_example.py index f053bba6b..61d9ed5b9 100644 --- a/examples/pytorch/encoder/encoder_example.py +++ b/examples/pytorch/encoder/encoder_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/encoder/utils/ft_encoder.py b/examples/pytorch/encoder/utils/ft_encoder.py index 5987485fd..515afc12c 100644 --- a/examples/pytorch/encoder/utils/ft_encoder.py +++ b/examples/pytorch/encoder/utils/ft_encoder.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/gpt/evaluate_zeroshot_gpt.py b/examples/pytorch/gpt/evaluate_zeroshot_gpt.py index 8bcc260e9..db3c89a5e 100644 --- a/examples/pytorch/gpt/evaluate_zeroshot_gpt.py +++ b/examples/pytorch/gpt/evaluate_zeroshot_gpt.py @@ -169,7 +169,7 @@ def process_batch(batch): return tokens, labels, attention_mask, position_ids, loss_mask -def forward_step(batch, model, eval_metric): +def forward_step(batch, model, eval_metric, args): """Forward step.""" # Get the batch. @@ -196,8 +196,19 @@ def forward_step(batch, model, eval_metric): tmp_start_lengths = torch.min(tmp_length, start_lengths).contiguous() input_ids = tokens[:,:(i + 1)].contiguous().int() - output_id = model(input_ids, tmp_start_lengths) - output.append(output_id[:,-1].reshape([-1, 1])) + output_id = model(input_ids, + tmp_start_lengths, + 1, + args.beam_width, + args.top_k, + args.top_p, + 0.0, + 1.0, + 1.0, + 1.0, + 0) + + output.append(output_id[:,0,-1].reshape([-1, 1])) output = torch.cat((output), 1) padding = torch.ones(output.shape[0], labels.shape[1] - output.shape[1]).cuda().int() @@ -224,7 +235,7 @@ def forward_step(batch, model, eval_metric): return None -def evaluate(data_loader, model, eval_metric): +def evaluate(data_loader, model, eval_metric, args): """Evaluation.""" args = get_args() @@ -238,7 +249,7 @@ def evaluate(data_loader, model, eval_metric): if iteration % args.log_interval == 0: print_rank_0('> working on iteration: {}'.format(iteration)) # Forward evaluation. - output = forward_step(batch, model, eval_metric) + output = forward_step(batch, model, eval_metric, args) # Reduce across processes. if mpu.is_pipeline_last_stage(): @@ -250,11 +261,11 @@ def evaluate(data_loader, model, eval_metric): return total_output -def evaluate_and_print_results(task, data_loader, model, eval_metric): +def evaluate_and_print_results(task, data_loader, model, eval_metric, args): """Evaluate and print results on screen.""" # Evaluate and get results. - output = evaluate(data_loader, model, eval_metric) + output = evaluate(data_loader, model, eval_metric, args) string = ' validation results on {} | '.format(task) if is_last_rank(): @@ -307,21 +318,24 @@ def main(): # Set up model and load checkpoint. model = GPT(args.num_attention_heads, (int)(args.hidden_size / args.num_attention_heads), args.padded_vocab_size, tokenzier.eod, tokenzier.eod, - args.num_layers, args.top_k, args.top_p, 1, 1.0, 1, args.seq_length, - 1, 1, args.micro_batch_size, 1.0, "lib/libth_gpt.so") + args.num_layers, args.seq_length, 1, 1, "lib/libth_gpt.so") + if not model.load(ckpt_path=args.ckpt_path): print("[ERROR] Checkpoint file not found at {}.".format(args.ckpt_path)) exit(-1) if args.fp16: + assert not args.bf16 model.half() - + if args.bf16: + assert not args.fp16 + model.bfloat16() # Data stuff. dataset = build_dataset(args.task) dataloader = build_data_loader(dataset, args.micro_batch_size, args.num_workers, drop_last=False) # Run evaluation. - evaluate_and_print_results(args.task, dataloader, model, eval_metric) + evaluate_and_print_results(args.task, dataloader, model, eval_metric, args) print_rank_0('done :-)') diff --git a/examples/pytorch/gpt/gpt_example.py b/examples/pytorch/gpt/gpt_example.py index bbeee1245..d2d45c87d 100644 --- a/examples/pytorch/gpt/gpt_example.py +++ b/examples/pytorch/gpt/gpt_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # Copyright (c) 2021, NAVER Corp. Authored by CLOVA. # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -41,12 +41,18 @@ def main(): help='size per head') parser.add_argument('--vocab_size', type=int, default=50304, help='vocab size') + parser.add_argument('--beam_width', type=int, default=1, + help='beam width for beam search. Using sampling when beam width is 1.') parser.add_argument('--top_k', type=int, default=1, help='top k candidate num') parser.add_argument('--top_p', type=float, default=0., help='top p probability threshold') parser.add_argument('--temperature', type=float, default=1., help='temperature') + parser.add_argument('--len_penalty', type=float, default=1., + help='len_penalty') + parser.add_argument('--beam_search_diversity_rate', type=float, default=0., + help='beam_search_diversity_rate') parser.add_argument('--tensor_para_size', type=int, default=1, help='tensor parallel size') parser.add_argument('--pipeline_para_size', type=int, default=1, @@ -67,10 +73,9 @@ def main(): help='max batch size.') parser.add_argument('--repetition_penalty', type=float, default=1., help='repetition penalty') - parser.add_argument('--max_seq_len', type=int, default=128, - help='max sequence length.') - parser.add_argument('--fp16', action='store_true', - help='whether or not to run in fp16') + parser.add_argument('--max_seq_len', type=int, default=1024, + help='max sequence length for position embedding table.') + parser.add_argument('--data_type', type=str, choices=['fp32', 'fp16', 'bf16'], default='fp32') parser.add_argument('--time', action='store_true', help='whether or not to measure time elapsed.') parser.add_argument('--sample_input_file', type=str, default=None, @@ -81,6 +86,12 @@ def main(): help='is fixing the random seed.') parser.add_argument('--sparse', action='store_true', dest='sparse', help='Enable sparse matrix multiplication. (Need SM 8.0 or 8.6 and SPARSITY_SUPPORT=ON)') + parser.add_argument('--return_cum_log_probs', type=int, default=0, choices=[0, 1, 2], + help='Whether to compute the cumulative log probsbility of sentences.' + ' 0: do not return the cumulative log probs ' + ' 1: return the cumulative log probs of generated sequences' + ' 2: return the cumulative log probs of sequences') + args = parser.parse_args() layer_num = args.layer_num @@ -88,9 +99,12 @@ def main(): head_num = args.head_num size_per_head = args.size_per_head vocab_size = args.vocab_size + beam_width = args.beam_width top_k = args.top_k top_p = args.top_p temperature = args.temperature + len_penalty = args.len_penalty + beam_search_diversity_rate = args.beam_search_diversity_rate tensor_para_size = args.tensor_para_size pipeline_para_size = args.pipeline_para_size start_id = args.start_id @@ -98,6 +112,8 @@ def main(): max_batch_size = args.max_batch_size max_seq_len = args.max_seq_len repetition_penalty = args.repetition_penalty + return_cum_log_probs = args.return_cum_log_probs + return_output_length = return_cum_log_probs > 0 print("\n=============== Arguments ===============") for arg in vars(args): @@ -133,29 +149,46 @@ def main(): random_seed = random.randint(0, 100000) # Prepare model. - gpt = GPT(head_num, size_per_head, vocab_size, start_id, end_id, - layer_num, top_k, top_p, random_seed, temperature, output_len, max_seq_len, - tensor_para_size, pipeline_para_size, max_batch_size, repetition_penalty, lib_path=args.lib_path) + gpt = GPT(head_num, size_per_head, vocab_size, start_id, end_id, layer_num, + max_seq_len, tensor_para_size, pipeline_para_size, lib_path=args.lib_path) if not gpt.load(ckpt_path=args.ckpt_path): print("[WARNING] Checkpoint file not found. Model loading is skipped.") - if args.fp16: + if args.data_type == 'fp16': gpt.half() + elif args.data_type == 'bf16': + gpt.bfloat16() if args.sparse: gpt.sparse() with torch.no_grad(): # Generate tokens. - tokens_batch = gpt(start_ids, start_lengths) + tokens_batch = gpt(start_ids, + start_lengths, + output_len, + beam_width, + top_k, + top_p, + beam_search_diversity_rate, + temperature, + len_penalty, + repetition_penalty, + random_seed, + return_output_length, + return_cum_log_probs) + if return_cum_log_probs > 0: + tokens_batch, _, cum_log_probs = tokens_batch + print('[INFO] Log probs of sentences:', cum_log_probs) # only a thread (rank 0) gets the output, while the others are supposed to return None. if tokens_batch is not None: outputs = [] tokens_batch = tokens_batch.cpu().numpy() for i, (context, tokens) in enumerate(zip(contexts, tokens_batch)): - token = tokens[start_lengths[i]:] # exclude context input from the output - output = enc.decode(tokens[input_len:]) - outputs.append(output) - print("[INFO] batch {}: \n[Context]\n{}\n\n[Output]\n{}".format(i, context, output)) + for beam_id in range(beam_width): + token = tokens[beam_id][start_lengths[i]:] # exclude context input from the output + output = enc.decode(token) + outputs.append(output) + print(f"[INFO] batch {i}, beam {beam_id}: \n[Context]\n{context}\n\n[Output]\n{output}\n") if args.sample_output_file: with open(args.sample_output_file, "w+") as f: @@ -165,14 +198,46 @@ def main(): # Measure inference time. if args.time: iterations = 10 + # warmup for i in range(iterations): - tokens_batch = gpt(start_ids, start_lengths) - + tokens_batch = gpt(start_ids, + start_lengths, + output_len, + beam_width, + top_k, + top_p, + beam_search_diversity_rate, + temperature, + len_penalty, + repetition_penalty, + random_seed, + return_output_length, + return_cum_log_probs) + + batch_num = 0 + token_num = 0 time = timeit.default_timer() for i in range(iterations): - tokens_batch = gpt(start_ids, start_lengths) + tokens_batch = gpt(start_ids, + start_lengths, + output_len, + beam_width, + top_k, + top_p, + beam_search_diversity_rate, + temperature, + len_penalty, + repetition_penalty, + random_seed, + return_output_length, + return_cum_log_probs) + batch_num += 1 + for j, tokens in enumerate(tokens_batch): + token_num += tokens.shape[-1] - start_lengths[j] time_elapsed = timeit.default_timer() - time - print("[INFO] GPT time costs: {:.2f} ms".format(time_elapsed * 1000 / iterations)) + throughput = token_num / time_elapsed + print(f"[INFO] FT-GPT generates {batch_num} batches, taking {time_elapsed:0.3f} secs " + f"to generate {token_num} tokens, {throughput:0.3f} tokens/sec.") if __name__ == '__main__': diff --git a/examples/pytorch/gpt/gpt_summarization.py b/examples/pytorch/gpt/gpt_summarization.py new file mode 100644 index 000000000..923f675eb --- /dev/null +++ b/examples/pytorch/gpt/gpt_summarization.py @@ -0,0 +1,294 @@ +# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +from __future__ import print_function +import argparse +import configparser +import json +import numpy as np +import os +import sys +import torch +import torch.distributed as dist +from datetime import datetime +from datasets import load_dataset, load_metric +from transformers import GPT2Tokenizer, GPT2LMHeadModel +from tqdm import tqdm + +dir_path = os.path.dirname(os.path.realpath(__file__)) +sys.path.append(dir_path + "/../../..") +from examples.pytorch.gpt.utils.parallel_gpt import ParallelGPT + +def main(): + parser = argparse.ArgumentParser() + parser.add_argument('--ft_model_location', type=str, + default='/data2/byshiue/models/huggingface-gpt/gpt2-xl/c-models') + parser.add_argument('--hf_model_location', type=str, + default='/data2/byshiue/models/huggingface-gpt/gpt2-xl/gpt2-xl') + parser.add_argument('--summarize', action='store_true') + parser.add_argument('--test_hf', action='store_true') + parser.add_argument('--data_type', type=str, choices=['fp32', 'fp16', 'bf16'], default='fp32') + parser.add_argument("--cache_path", type=str, default="/workdir/datasets/ccdv/") + parser.add_argument("--max_ite", type=int, default=20) + parser.add_argument("--ft_use_hf_config", action="store_true", + help="use the hyper-parameters from the hf model") + parser.add_argument('--lib_path', type=str, default='./lib/libth_parallel_gpt.so', + help='path to the pyt_fastertransformer dynamic lib file.') + parser.add_argument('--tensor_para_size', type=int, default=1, + help='tensor parallel size') + parser.add_argument('--pipeline_para_size', type=int, default=1, + help='pipeline parallel size') + + args = parser.parse_args() + + try: + dist.init_process_group(backend='mpi') + except: + print("[INFO] WARNING: Have initalize the process group") + rank = dist.get_rank() + + summarize = args.summarize + test_hf = args.test_hf + ft_model_location = args.ft_model_location + hf_model_location = args.hf_model_location + + tokenizer = GPT2Tokenizer.from_pretrained('gpt2') + tokenizer.pad_token = tokenizer.eos_token + dataset_cnn = load_dataset("ccdv/cnn_dailymail", '3.0.0', cache_dir=args.cache_path) + + hf_config = json.load(open(os.path.join(hf_model_location, 'config.json'), 'r')) + ft_config = None + + head_num = hf_config['n_head'] + layer_num = hf_config['n_layer'] + start_id = hf_config['bos_token_id'] + end_id = hf_config['eos_token_id'] + size_per_head = hf_config['n_embd'] // head_num + + if not args.ft_use_hf_config: + ft_config = configparser.ConfigParser() + ft_config.read(os.path.join(ft_model_location, '1-gpu/config.ini')) + + head_num = ft_config.getint('gpt', 'num_attention_heads') + layer_num = ft_config.getint('gpt', 'num_layers') + start_id = 50256 # TODO: get this from the tokenizer + end_id = 50256 # TODO: get this from the tokenizer + size_per_head = ft_config.getint('gpt', 'hidden_size') // head_num + + if summarize: + top_k = 2 + output_len = 100 + else: + top_k = 1 + output_len = 256 + top_p = 0.0 + random_seed = 5 + temperature = 1 + max_seq_len = hf_config['n_ctx'] if args.ft_use_hf_config else ft_config.getint('gpt', 'max_position_embeddings') + max_batch_size = 5 + repetition_penalty = 1 + vocab_size = 50257 + tensor_para_size = args.tensor_para_size + pipeline_para_size = args.pipeline_para_size + lib_path = args.lib_path + ckpt_path = os.path.join(ft_model_location, f'{tensor_para_size}-gpu') + + print(f"top_k: {top_k}") + print(f"top_p: {top_p}") + print(f"random_seed: {random_seed}") + print(f"temperature: {temperature}") + print(f"max_seq_len: {max_seq_len}") + print(f"max_batch_size: {max_batch_size}") + print(f"repetition_penalty: {repetition_penalty}") + print(f"vocab_size: {vocab_size}") + print(f"tensor_para_size: {tensor_para_size}") + print(f"pipeline_para_size: {pipeline_para_size}") + print(f"lib_path: {lib_path}") + print(f"ckpt_path: {ckpt_path}") + print(f"hf_config: {hf_config}") + + gpt = ParallelGPT(head_num, size_per_head, vocab_size, start_id, end_id, layer_num, + max_seq_len, tensor_para_size, pipeline_para_size, lib_path=lib_path, int8_mode=0) + + if not gpt.load(ckpt_path=ckpt_path): + print("[WARNING] Checkpoint file not found. Model loading is skipped.") + + if (test_hf and summarize) or not summarize: + model = GPT2LMHeadModel.from_pretrained(hf_model_location) + # device_hf = 'cuda:1' + # model.to(device_hf) + model.cuda() + if args.data_type == 'fp16': + model.half() + elif args.data_type == 'bf16': + model.bfloat16() + + if args.data_type == 'fp16': + gpt.half() + elif args.data_type == 'bf16': + gpt.bfloat16() + + def summarize_ft(datapoint): + if summarize: + line = datapoint['article'] + ' TL;DR: ' + else: + line = datapoint['article'] + line = line.strip() + line = line.replace(" n't", "n't") + + line_encoded = tokenizer.encode(line, return_tensors='pt') + if summarize: + line_encoded = line_encoded[:, -923:] + else: + line_encoded = line_encoded[:, -768:] + line_encoded = line_encoded.type(torch.int32) + + with torch.no_grad(): + output, ft_output_len = gpt(line_encoded, torch.IntTensor([len(line_encoded[0])]), + output_len, + 1, + top_k, + top_p, + 0.0, + temperature, + 1.0, + repetition_penalty, + random_seed, + True) + + tokens = output[0][0][len(line_encoded[0]):ft_output_len[0]].cpu().numpy() + + output_lines = tokenizer.decode(output[0][0][len(line_encoded[0]):ft_output_len[0]]) + output_lines = ".".join(output_lines.split('.')[:4]) + "." + return output_lines, tokens + + def summarize_hf(datapoint): + if summarize: + line = datapoint['article'] + ' TL;DR: ' + else: + line = datapoint['article'] + line = line.strip() + line = line.replace(" n't", "n't") + + line_encoded = tokenizer.encode(line, return_tensors='pt') + if summarize: + line_encoded = line_encoded[:, -923:] + else: + line_encoded = line_encoded[:, -768:] + # line_encoded = line_encoded.to(device_hf) + line_encoded = line_encoded.cuda() + + with torch.no_grad(): + output = model.generate(line_encoded, + max_length=len(line_encoded[0]) + output_len, + k=top_k, + temprature=temperature, + eos_token_id=tokenizer.eos_token_id, + pad_token_id=tokenizer.pad_token_id) + + tokens = output[0][len(line_encoded[0]):].cpu().numpy() + output_lines = tokenizer.decode(output[0][len(line_encoded[0]):]) + output_lines = ".".join(output_lines.split('.')[:4]) + "." + return output_lines, tokens + + if summarize: + datapoint = dataset_cnn['test'][0] + summary, _ = summarize_ft(datapoint) + print('---------------------------------------------------------') + print('FT Generated : ') + print(' Article : ', datapoint['article']) + print('\n Highlights : ', datapoint['highlights']) + print('\n Summary : ', summary) + print('---------------------------------------------------------') + + if test_hf: + summary, _ = summarize_hf(datapoint) + print('---------------------------------------------------------') + print('HF Generated : ') + print(' Article : ', datapoint['article']) + print('\n Highlights : ', datapoint['highlights']) + print('\n Summary : ', summary) + print('---------------------------------------------------------') + + if summarize: + metric_ft = load_metric("rouge") + metric_hf = load_metric("rouge") + else: + tokens = [] + + ft_time = 0.0 + hf_time = 0.0 + for data_point_idx in tqdm(range(1, 11490, int(11490 / args.max_ite))): + try: + datapoint = dataset_cnn['test'][data_point_idx] + + start_time = datetime.now() + summary_ft, tokens_ft = summarize_ft(datapoint) + stop_time = datetime.now() + ft_time += (stop_time - start_time).total_seconds() + if (test_hf and summarize) or not summarize: + start_time = datetime.now() + summary_hf, tokens_hf = summarize_hf(datapoint) + stop_time = datetime.now() + hf_time += (stop_time - start_time).total_seconds() + + if rank == 0: + if summarize: + metric_ft.add_batch(predictions=[summary_ft], references=[datapoint['highlights']]) + if test_hf: + metric_hf.add_batch(predictions=[summary_hf], references=[datapoint['highlights']]) + else: + tokens.append((tokens_ft, tokens_hf)) + except: + print('Error with datapoint : ', data_point_idx) + + def compute_exact_match(tokens, n_tokens=[1, 10, 25, 50, 100, 150, 200, 250]): + em_metrics = [] + for t in n_tokens: + errors = 0 + total = 0 + for ft_tokens, hf_tokens in tokens: + if len(ft_tokens) > t and len(hf_tokens) > t: + total = total + 1 + if not np.array_equal(ft_tokens[:t], hf_tokens[:t]): + errors = errors + 1 + + if total > 0: + print(f"{t}-token exact match acc: {100*(1-errors/total):.2f}") + em_metrics.append(1 - errors / total) + else: + em_metrics.append(np.nan) + + return em_metrics + + if rank == 0: + if summarize: + computed_metrics_ft = metric_ft.compute() + + if test_hf: + computed_metrics_hf = metric_hf.compute() + + print(f'Hugging Face (total latency: {hf_time} sec)') + for key in computed_metrics_hf.keys(): + print(f'{key} : {computed_metrics_hf[key].mid[2]*100}') + + print(f'Faster Transformers (total latency: {ft_time} sec)') + for key in computed_metrics_ft.keys(): + print(f'{key} : {computed_metrics_ft[key].mid[2]*100}') + else: + em_metrics = compute_exact_match(tokens) + + +if __name__ == '__main__': + main() diff --git a/examples/pytorch/gpt/multi_gpu_gpt_example.py b/examples/pytorch/gpt/multi_gpu_gpt_example.py index 2edc4fed4..7fb286c4b 100644 --- a/examples/pytorch/gpt/multi_gpu_gpt_example.py +++ b/examples/pytorch/gpt/multi_gpu_gpt_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # Copyright (c) 2021, NAVER Corp. Authored by CLOVA. # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -40,12 +40,18 @@ def main(): help='size per head') parser.add_argument('--vocab_size', type=int, default=50304, help='vocab size') + parser.add_argument('--beam_width', type=int, default=1, + help='beam width for beam search. Using sampling when beam width is 1.') parser.add_argument('--top_k', type=int, default=1, help='top k candidate num') parser.add_argument('--top_p', type=float, default=0., help='top p probability threshold') parser.add_argument('--temperature', type=float, default=1., help='temperature') + parser.add_argument('--len_penalty', type=float, default=1., + help='len_penalty') + parser.add_argument('--beam_search_diversity_rate', type=float, default=0., + help='beam_search_diversity_rate') parser.add_argument('--tensor_para_size', type=int, default=1, help='tensor parallel size') parser.add_argument('--pipeline_para_size', type=int, default=1, @@ -66,10 +72,9 @@ def main(): help='max batch size.') parser.add_argument('--repetition_penalty', type=float, default=1., help='repetition penalty') - parser.add_argument('--max_seq_len', type=int, default=128, - help='max sequence length.') - parser.add_argument('--fp16', action='store_true', - help='whether or not to run in fp16') + parser.add_argument('--max_seq_len', type=int, default=1024, + help='max sequence length for position embedding table.') + parser.add_argument('--data_type', type=str, choices=['fp32', 'fp16', 'bf16'], default='fp32') parser.add_argument('--time', action='store_true', help='whether or not to measure time elapsed.') parser.add_argument('--sample_input_file', type=str, default=None, @@ -80,6 +85,12 @@ def main(): help='is fixing the random seed.') parser.add_argument('--int8_mode', type=int, default=0, help='int8 mode.') + parser.add_argument('--return_cum_log_probs', type=int, default=0, choices=[0, 1, 2], + help='Whether to compute the cumulative log probsbility of sentences.' + ' 0: do not return the cumulative log probs ' + ' 1: return the cumulative log probs of generated sequences' + ' 2: return the cumulative log probs of sequences') + args = parser.parse_args() @@ -88,9 +99,12 @@ def main(): head_num = args.head_num size_per_head = args.size_per_head vocab_size = args.vocab_size + beam_width = args.beam_width top_k = args.top_k top_p = args.top_p temperature = args.temperature + len_penalty = args.len_penalty + beam_search_diversity_rate = args.beam_search_diversity_rate tensor_para_size = args.tensor_para_size pipeline_para_size = args.pipeline_para_size start_id = args.start_id @@ -99,6 +113,8 @@ def main(): max_seq_len = args.max_seq_len repetition_penalty = args.repetition_penalty int8_mode = args.int8_mode + return_cum_log_probs = args.return_cum_log_probs + return_output_length = return_cum_log_probs > 0 print("\n=============== Arguments ===============") for arg in vars(args): @@ -125,7 +141,7 @@ def main(): start_ids = pad_sequence(start_ids, batch_first=True, padding_value=end_id) start_lengths = torch.IntTensor(start_lengths) - + if args.is_fix_random_seed == True: random_seed = 0 else: @@ -133,25 +149,43 @@ def main(): # Prepare model. gpt = ParallelGPT(head_num, size_per_head, vocab_size, start_id, end_id, - layer_num, top_k, top_p, random_seed, temperature, output_len, max_seq_len, - tensor_para_size, pipeline_para_size, max_batch_size, repetition_penalty, lib_path=args.lib_path, int8_mode=args.int8_mode) + layer_num, max_seq_len, tensor_para_size, pipeline_para_size, + lib_path=args.lib_path, int8_mode=args.int8_mode) if not gpt.load(ckpt_path=args.ckpt_path): print("[WARNING] Checkpoint file not found. Model loading is skipped.") - if args.fp16: + if args.data_type == 'fp16': gpt.half() + elif args.data_type == 'bf16': + gpt.bfloat16() with torch.no_grad(): # Generate tokens. - tokens_batch = gpt(start_ids, start_lengths) + tokens_batch = gpt(start_ids, + start_lengths, + output_len, + beam_width, + top_k, + top_p, + beam_search_diversity_rate, + temperature, + len_penalty, + repetition_penalty, + random_seed, + return_output_length, + return_cum_log_probs) # only a thread (rank 0) gets the output, while the others are supposed to return None. if tokens_batch is not None: + if return_cum_log_probs > 0: + tokens_batch, _, cum_log_probs = tokens_batch + print('[INFO] Log probs of sentences:', cum_log_probs) outputs = [] tokens_batch = tokens_batch.cpu().numpy() for i, (context, tokens) in enumerate(zip(contexts, tokens_batch)): - token = tokens[start_lengths[i]:] # exclude context input from the output - output = enc.decode(tokens[input_len:]) - outputs.append(output) - print("[INFO] batch {}: \n[Context]\n{}\n\n[Output]\n{}".format(i, context, output)) + for beam_id in range(beam_width): + token = tokens[beam_id][start_lengths[i]:] # exclude context input from the output + output = enc.decode(token) + outputs.append(output) + print(f"[INFO] batch {i}, beam {beam_id}: \n[Context]\n{context}\n\n[Output]\n{output}\n") if args.sample_output_file: with open(args.sample_output_file, "w+") as f: @@ -162,11 +196,35 @@ def main(): if args.time: iterations = 10 for i in range(iterations): - tokens_batch = gpt(start_ids, start_lengths) + tokens_batch = gpt(start_ids, + start_lengths, + output_len, + beam_width, + top_k, + top_p, + beam_search_diversity_rate, + temperature, + len_penalty, + repetition_penalty, + random_seed, + return_output_length, + return_cum_log_probs) time = timeit.default_timer() for i in range(iterations): - tokens_batch = gpt(start_ids, start_lengths) + tokens_batch = gpt(start_ids, + start_lengths, + output_len, + beam_width, + top_k, + top_p, + beam_search_diversity_rate, + temperature, + len_penalty, + repetition_penalty, + random_seed, + return_output_length, + return_cum_log_probs) time_elapsed = timeit.default_timer() - time print("[INFO] GPT time costs: {:.2f} ms".format(time_elapsed * 1000 / iterations)) diff --git a/examples/pytorch/gpt/requirement.txt b/examples/pytorch/gpt/requirement.txt new file mode 100644 index 000000000..7e4943046 --- /dev/null +++ b/examples/pytorch/gpt/requirement.txt @@ -0,0 +1,4 @@ +datasets +fire +rouge_score +transformers \ No newline at end of file diff --git a/examples/pytorch/gpt/scripts/evaluate_zeroshot_gpt.sh b/examples/pytorch/gpt/scripts/evaluate_zeroshot_gpt.sh index c8ef66ee1..845d53a85 100644 --- a/examples/pytorch/gpt/scripts/evaluate_zeroshot_gpt.sh +++ b/examples/pytorch/gpt/scripts/evaluate_zeroshot_gpt.sh @@ -8,7 +8,7 @@ VOCAB_FILE=../models/gpt2-vocab.json MERGE_FILE=../models/gpt2-merges.txt CHECKPOINT=../models/megatron-models/345m/ -python ../examples/pytorch/gpt/evaluate_zeroshot_gpt.py \ +python -m torch.distributed.run --nproc_per_node 1 ../examples/pytorch/gpt/evaluate_zeroshot_gpt.py \ --task $TASK \ --valid-data $VALID_DATA \ --tokenizer-type GPT2BPETokenizer \ @@ -34,7 +34,9 @@ python ../examples/pytorch/gpt/evaluate_zeroshot_gpt.py \ --top_k 1 \ --top_p 0.0 -python ../examples/pytorch/gpt/evaluate_zeroshot_gpt.py \ +sleep 20 + +python -m torch.distributed.run --nproc_per_node 1 ../examples/pytorch/gpt/evaluate_zeroshot_gpt.py \ --task $TASK \ --valid-data $VALID_DATA \ --tokenizer-type GPT2BPETokenizer \ diff --git a/examples/pytorch/gpt/utils/generate_gpt_config.py b/examples/pytorch/gpt/utils/generate_gpt_config.py index d7fbb9b9b..43b5a0ce6 100644 --- a/examples/pytorch/gpt/utils/generate_gpt_config.py +++ b/examples/pytorch/gpt/utils/generate_gpt_config.py @@ -1,4 +1,5 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -16,11 +17,6 @@ import configparser def generate_gpt_config(args): - - is_half = 1 - if args['data_type'] == "fp32": - is_half = 0 - config = configparser.ConfigParser() config["ft_instance_hyperparameter"] = { "max_batch_size": "{}".format(args['max_batch_size']), @@ -31,7 +27,10 @@ def generate_gpt_config(args): "temperature": "{}".format(args['temperature']), "tensor_para_size": "{}".format(args['tensor_para_size']), "pipeline_para_size": "{}".format(args['pipeline_para_size']), - "is_half": "{}".format(is_half), + "data_type": "{}".format(args['data_type']), + "sparse": "0", + "int8_mode": "0", + "enable_custom_all_reduce": "0", "model_name": "tmp_model", "model_dir": "{}".format(args['model_dir']), "repetition_penalty": "{}".format(args['repetition_penalty']), @@ -42,6 +41,8 @@ def generate_gpt_config(args): config["request"] = { "request_batch_size": "{}".format(args['request_batch_size']), "request_output_len": "{}".format(args['request_output_len']), + "return_log_probs": "false", + "context_log_probs": "false", } config["tmp_model"] = { @@ -62,8 +63,8 @@ def generate_gpt_config(args): parser = argparse.ArgumentParser() parser.add_argument('-max_batch_size', '--max_batch_size', type=int, default=8, metavar='NUMBER', help='batch size (default: 8)') - parser.add_argument('-max_seq_len', '--max_seq_len', type=int, default=32, metavar='NUMBER', - help='max sequence length (default: 32)') + parser.add_argument('-max_seq_len', '--max_seq_len', type=int, default=256, metavar='NUMBER', + help='max sequence length (default: 256)') parser.add_argument('-beam_width', '--beam_width', type=int, default=1, metavar='NUMBER', help='beam width for beam search (default: 1)') parser.add_argument('-n', '--head_number', type=int, default=32, metavar='NUMBER', @@ -77,7 +78,7 @@ def generate_gpt_config(args): parser.add_argument('-v', '--vocab_size', type=int, default=50257, metavar='BOOL', help='vocabulary size. (default: 50257).') parser.add_argument('-d', '--data_type', type=str, default="fp32", metavar='STRING', - help='data type (default: fp32)', choices=['fp32', 'fp16']) + help='data type (default: fp32)', choices=['fp32', 'fp16', 'bf16']) parser.add_argument('-topk', '--sampling_topk', type=int, default=1, metavar='NUMBER', help='Candidate (k) value of top k sampling in decoding. Default is 1.') parser.add_argument('-topp', '--sampling_topp', type=float, default=0.0, metavar='NUMBER', diff --git a/examples/pytorch/gpt/utils/generate_start_ids.py b/examples/pytorch/gpt/utils/generate_start_ids.py index f41de7bd7..ce4c56741 100644 --- a/examples/pytorch/gpt/utils/generate_start_ids.py +++ b/examples/pytorch/gpt/utils/generate_start_ids.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/pytorch/gpt/utils/gpt.py b/examples/pytorch/gpt/utils/gpt.py index 7b79a97c9..9e0d14253 100644 --- a/examples/pytorch/gpt/utils/gpt.py +++ b/examples/pytorch/gpt/utils/gpt.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -24,7 +24,7 @@ class GPTWeights(object): def __init__(self, head_num, size_per_head, layer_num, vocab_size, max_seq_len, tensor_para_size, pipeline_para_size, int8_mode = 0): assert(head_num % tensor_para_size == 0) - + if int8_mode != 0: self.weight_transpose_calibrate_quantize = torch.ops.fastertransformer.weight_transpose_calibrate_quantize @@ -48,7 +48,7 @@ def __init__(self, head_num, size_per_head, layer_num, vocab_size, max_seq_len, self.local_hidden_units = local_hidden_units self.global_hidden_units = global_hidden_units self.local_inter_size = local_inter_size - + self.int8_mode = int8_mode self.w = [] @@ -86,8 +86,8 @@ def __init__(self, head_num, size_per_head, layer_num, vocab_size, max_seq_len, self.scale.extend([torch.zeros(local_inter_size, dtype=torch.float)] * layer_num) # ffn_scale1 self.int8_w.extend([torch.zeros(local_inter_size, global_hidden_units, dtype=torch.int8)] * layer_num) # ffn_int8_kernel2 self.scale.extend([torch.zeros(global_hidden_units, dtype=torch.float)] * layer_num) # ffn_scale2 - - + + def __getitem__(self, idx): return self.w[idx] @@ -111,14 +111,14 @@ def _map_int8(self, func): if isinstance(self.int8_w[i], list): for j in range(len(self.int8_w[i])): self.int8_w[i][j] = func(self.int8_w[i][j]) - + else: self.int8_w[i] = func(self.int8_w[i]) for i in range(len(self.scale)): if isinstance(self.scale[i], list): for j in range(len(self.scale[i])): self.scale[i][j] = func(self.scale[i][j]) - + else: self.scale[i] = func(self.scale[i]) @@ -162,7 +162,6 @@ def is_load(i): return i >= self.layers_per_device * \ ).reshape(-1, self.global_hidden_units) assert self.max_seq_len <= wpe.size( 0), "max_seq_len must not exceed the value of maximum sequence length during traning." - wpe = wpe[:self.max_seq_len] # excludes weights not to really use. w.append(wpe) w.append(torch.from_numpy(np.fromfile(ckpt_path + "/model.wte.bin", dtype=np.single))) w.append(torch.from_numpy(np.fromfile(ckpt_path + "/model.wte.bin", dtype=np.single))) @@ -185,7 +184,7 @@ def is_load(i): return i >= self.layers_per_device * \ self.int8_w[i + 1*layer_num], self.scale[i + 1*layer_num] = self.weight_transpose_calibrate_quantize(self.w[4*layer_num + i]) self.int8_w[i + 2*layer_num], self.scale[i + 2*layer_num] = self.weight_transpose_calibrate_quantize(self.w[8*layer_num + i]) self.int8_w[i + 3*layer_num], self.scale[i + 3*layer_num] = self.weight_transpose_calibrate_quantize(self.w[10*layer_num + i]) - + return True @@ -193,32 +192,19 @@ class GPT(nn.Module): def __init__(self, head_num, size_per_head, vocab_size, start_id, end_id, layer_num, - top_k, top_p, random_seed, temperature, - output_len, max_seq_len, + max_seq_len, tensor_para_size, pipeline_para_size, - max_batch_size, - repetition_penalty, lib_path, int8_mode = 0): super().__init__() - self.beam_width = 1 self.head_num = head_num self.size_per_head = size_per_head self.vocab_size = vocab_size self.start_id = start_id self.end_id = end_id self.layer_num = layer_num - self.beam_search_diversity_rate = 0.0 - self.top_k = top_k - self.top_p = top_p - self.random_seed = random_seed - self.temperature = temperature - self.output_len = output_len - self.max_seq_len = max_seq_len self.tensor_para_size = tensor_para_size self.pipeline_para_size = pipeline_para_size - self.max_batch_size = max_batch_size - self.repetition_penalty = repetition_penalty self.use_sparse_gemm = False self.build_model = False self.int8_mode = int8_mode @@ -233,7 +219,7 @@ def __init__(self, # Prepare weights self.weights = GPTWeights(head_num, size_per_head, layer_num, vocab_size, - max_seq_len, tensor_para_size, pipeline_para_size, + max_seq_len, tensor_para_size, pipeline_para_size, int8_mode) # Prepare for tensor/pipeline parallel @@ -265,6 +251,10 @@ def half(self): self.weights._map(lambda w: w.half()) self.cuda() + def bfloat16(self): + self.weights._map(lambda w: w.bfloat16()) + self.cuda() + def sparse(self): if not self.use_sparse_gemm: self.use_sparse_gemm = True @@ -274,38 +264,60 @@ def cuda(self): self.weights._map(lambda w: w.cuda(self.device)) if self.int8_mode != 0: self.weights._map_int8(lambda w: w.cuda(self.device)) - + if self.build_model: del self.model self.build_model = False - self.model = torch.classes.FasterTransformer.GptOp( - self.max_batch_size, - self.max_seq_len, self.beam_width, - self.head_num, self.size_per_head, 4 * self.head_num * self.size_per_head, - self.layer_num, self.vocab_size, self.start_id, self.end_id, - self.beam_search_diversity_rate, self.top_k, self.top_p, self.random_seed, self.temperature, 1.0, - self.repetition_penalty, - self.use_sparse_gemm, - self.weights.w) + self.model = torch.classes.FasterTransformer.GptOp(self.head_num, self.size_per_head, 4 * self.head_num * self.size_per_head, + self.layer_num, self.vocab_size, self.start_id, self.end_id, + self.use_sparse_gemm, self.weights.w) self.build_model = True - def forward(self, start_ids, start_lengths, batch_first=True): + def forward(self, + start_ids, + start_lengths, + output_len, + beam_width=1, + top_k=1, + top_p=0.0, + beam_search_diversity_rate=0.0, + temperature=1.0, + len_penalty=1.0, + repetition_penalty=1.0, + random_seed=0, + return_output_length=False, + return_cum_log_probs=0): if not self.build_model: self.cuda() - batch_size = start_ids.size(0) - assert batch_size <= self.max_batch_size, "batch_size must not exceed max_batch_size." - input_len = start_ids.size(1) assert input_len > 0, "input len must be larger than zero. For an unconditional case, use start_id as the first token." - assert input_len + self.output_len <= self.max_seq_len, "input_len + output_len must not exceed max_seq_len." # Inputs to device start_ids = start_ids.cuda(self.device) start_lengths = start_lengths.cuda(self.device) - - output_ids, output_lengths = self.model.forward(start_ids, start_lengths, self.output_len) - output_ids = output_ids.reshape((batch_size * self.beam_width, -1)) - if self.rank == 0: + # outputs: output_ids, output_lengths, output_cum_log_probs (optional) + outputs = self.model.forward(start_ids, + start_lengths, + output_len, + beam_width, + top_k, + top_p, + beam_search_diversity_rate, + temperature, + len_penalty, + repetition_penalty, + random_seed, + return_cum_log_probs) + if return_cum_log_probs == 0: + output_ids, output_lengths = outputs + else: + output_ids, output_lengths, output_cum_log_probs = outputs + if return_output_length: + if return_cum_log_probs > 0: + return output_ids, output_lengths, output_cum_log_probs + else: + return output_ids, output_lengths + else: return output_ids def set_input_tensor(self, input_tensor): diff --git a/examples/pytorch/gpt/utils/gpt_token_converter.py b/examples/pytorch/gpt/utils/gpt_token_converter.py index 5e5a2787a..83c05569d 100644 --- a/examples/pytorch/gpt/utils/gpt_token_converter.py +++ b/examples/pytorch/gpt/utils/gpt_token_converter.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -36,10 +36,10 @@ def convert_token( end_index = np.where(tokens[max_input_length:] == end_id)[0] else: end_index = [] - end_pos = -1 + end_pos = len(tokens) if len(end_index) > 0: end_pos = end_index[0] - print("[INFO] batch {}: {}".format(batch_num, enc.decode(tokens[:end_pos]))) + print(f"[INFO] batch {batch_num}: {enc.decode(tokens[:end_pos])}") return tokens_batch if __name__ == "__main__": diff --git a/examples/pytorch/gpt/utils/huggingface_gpt_convert.py b/examples/pytorch/gpt/utils/huggingface_gpt_convert.py new file mode 100644 index 000000000..a0ef1eab5 --- /dev/null +++ b/examples/pytorch/gpt/utils/huggingface_gpt_convert.py @@ -0,0 +1,191 @@ +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +''' +Convert huggingface GPT model. Use https://huggingface.co/gpt2 as demo. +''' + +import argparse +import configparser +import multiprocessing +import numpy as np +from pathlib import Path +import torch + +import os +import sys +from transformers import GPT2Model # transformers-4.10.0-py3 +dir_path = os.path.dirname(os.path.realpath(__file__)) +sys.path.append(dir_path + "/../../../..") +sys.path.append(dir_path) + +def get_weight_data_type(data_type): + if data_type == "fp32": + return np.float32 + elif data_type == "fp16": + return np.float16 + else: + assert False, f"Invalid weight data type {data_type}" + +def split_and_convert_process(i, saved_dir,factor,key,args, val): + + if key.find("input_layernorm.weight") != -1 or key.find("input_layernorm.bias") != -1 or \ + key.find("attention.dense.bias") != -1 or key.find("post_attention_layernorm.weight") != -1 or \ + key.find("post_attention_layernorm.bias") != -1 or key.find("mlp.dense_4h_to_h.bias") != -1 or \ + key.find("final_layernorm.weight") != -1 or key.find("final_layernorm.bias") != -1: + + # shared weights, only need to convert the weights of rank 0 + if i == 0: + saved_path = saved_dir + "/model." + key + ".bin" + val.tofile(saved_path) + + elif key.find("attention.dense.weight") != -1 or key.find("mlp.dense_4h_to_h.weight") != -1: + split_vals = np.split(val, factor, axis=0) + for j in range(factor): + saved_path = saved_dir + "/model." + key + ".%d.bin" % (i * factor + j) + split_vals[j].tofile(saved_path) + + elif key.find("mlp.dense_h_to_4h.weight") != -1 or key.find("mlp.dense_h_to_4h.bias") != -1: + + split_vals = np.split(val, factor, axis=-1) + for j in range(factor): + saved_path = saved_dir + "/model." + key + ".%d.bin" % (i * factor + j) + split_vals[j].tofile(saved_path) + + elif key.find("attention.query_key_value.bias") != -1: + local_dim = (int)(val.shape[-1] / 3) + + val = val.reshape(3, local_dim) + split_vals = np.split(val, factor, axis=-1) + + for j in range(factor): + saved_path = saved_dir + "/model." + key + ".%d.bin" % (i * factor + j) + split_vals[j].tofile(saved_path) + + elif key.find("attention.query_key_value.weight") != -1: + hidden_dim = val.shape[0] + local_dim = (int)(val.shape[-1] / 3) + + val = val.reshape(hidden_dim, 3, local_dim) + split_vals = np.split(val, factor, axis=-1) + + for j in range(factor): + saved_path = saved_dir + "/model." + key + ".%d.bin" % (i * factor + j) + split_vals[j].tofile(saved_path) + + else: + print("[ERROR] cannot find key '{}'".format(key)) + +def split_and_convert(args): + saved_dir = args.saved_dir + "/%d-gpu/" % args.infer_gpu_num + + if(os.path.exists(saved_dir) == False): + os.makedirs(saved_dir) + ckpt_name = args.in_file + + t_gpu_num = args.trained_gpu_num + i_gpu_num = args.infer_gpu_num + assert(i_gpu_num % t_gpu_num == 0) + + factor = (int)(i_gpu_num / t_gpu_num) + + # load position_embedding from rank 0 + model = GPT2Model.from_pretrained(args.in_file) + + try: + config = configparser.ConfigParser() + config["gpt"] = {} + for key in vars(args): + config["gpt"][key] = f"{vars(args)[key]}" + for k, v in vars(model.config).items(): + config["gpt"][k] = f"{v}" + config["gpt"]["weight_data_type"] = args.weight_data_type + with open((Path(saved_dir) / f"config.ini").as_posix(), 'w') as configfile: + config.write(configfile) + except: + print(f"Fail to save the config in config.ini.") + np_weight_data_type = get_weight_data_type(args.weight_data_type) + + huggingface_model_name_pattern = [ + "ln_1.bias", + "ln_1.weight", + "attn.c_attn.bias", + "attn.c_attn.weight", + "attn.c_proj.bias", + "attn.c_proj.weight", + "ln_2.bias", + "ln_2.weight", + "mlp.c_fc.bias", + "mlp.c_fc.weight", + "mlp.c_proj.bias", + "mlp.c_proj.weight", + ] + + ft_model_name_pattern = [ + "input_layernorm.bias", + "input_layernorm.weight", + "attention.query_key_value.bias", + "attention.query_key_value.weight", + "attention.dense.bias", + "attention.dense.weight", + "post_attention_layernorm.bias", + "post_attention_layernorm.weight", + "mlp.dense_h_to_4h.bias", + "mlp.dense_h_to_4h.weight", + "mlp.dense_4h_to_h.bias", + "mlp.dense_4h_to_h.weight", + ] + + torch.multiprocessing.set_start_method("spawn") + pool = multiprocessing.Pool(args.processes) + for name, param in model.named_parameters(): + if name.find("weight") == -1 and name.find("bias") == -1: + continue + if name == 'wpe.weight': + param.detach().cpu().numpy().astype(np_weight_data_type).tofile(saved_dir + "model.wpe.bin") + elif name == 'wte.weight': + param.detach().cpu().numpy().astype(np_weight_data_type).tofile(saved_dir + "model.wte.bin") + elif name == 'ln_f.bias': + param.detach().cpu().numpy().astype(np_weight_data_type).tofile(saved_dir + "model.final_layernorm.bias.bin") + elif name == 'ln_f.weight': + param.detach().cpu().numpy().astype(np_weight_data_type).tofile(saved_dir + "model.final_layernorm.weight.bin") + elif name == 'lm_head.weight': + param.detach().cpu().numpy().astype(np_weight_data_type).tofile(saved_dir + "model.lm_head.weight.bin") + else: + for i in range(len(huggingface_model_name_pattern)): + if name.find(huggingface_model_name_pattern[i]) != -1: + new_name = name.replace("h.", "layers.").replace(huggingface_model_name_pattern[i], ft_model_name_pattern[i]) + pool.starmap(split_and_convert_process, + [(0, saved_dir, factor, new_name, args, + param.detach().cpu().numpy().astype(np_weight_data_type))], ) + + pool.close() + pool.join() + +if __name__ == "__main__": + parser = argparse.ArgumentParser(formatter_class=argparse.RawTextHelpFormatter) + parser.add_argument('-saved_dir', '-o', type=str, help='file name of output file', required=True) + parser.add_argument('-in_file', '-i', type=str, help='file name of input checkpoint file', required=True) + parser.add_argument('-trained_gpu_num', '-t_g', type=int, help='How many gpus for inference', default=1) + parser.add_argument('-infer_gpu_num', '-i_g', type=int, help='How many gpus for inference', required=True) + parser.add_argument("-processes", "-p", type=int, help="How many processes to spawn for conversion (default: 4)", default=4) + parser.add_argument("-weight_data_type", type=str, default="fp32", choices=["fp32", "fp16"]) + + args = parser.parse_args() + print("\n=============== Argument ===============") + for key in vars(args): + print("{}: {}".format(key, vars(args)[key])) + print("========================================") + + split_and_convert(args) diff --git a/examples/pytorch/gpt/utils/huggingface_jp_gpt_convert.py b/examples/pytorch/gpt/utils/huggingface_jp_gpt_convert.py index d9e9afc4f..bb4245694 100644 --- a/examples/pytorch/gpt/utils/huggingface_jp_gpt_convert.py +++ b/examples/pytorch/gpt/utils/huggingface_jp_gpt_convert.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -13,16 +13,26 @@ # limitations under the License. import argparse +import configparser +import multiprocessing import numpy as np +from pathlib import Path import torch import os import sys +from transformers import GPT2Model # transformers-4.10.0-py3 dir_path = os.path.dirname(os.path.realpath(__file__)) sys.path.append(dir_path + "/../../../..") -from multiprocessing import Process +sys.path.append(dir_path) -sys.path.append(os.path.dirname(os.path.realpath(__file__))) +def get_weight_data_type(data_type): + if data_type == "fp32": + return np.float32 + elif data_type == "fp16": + return np.float16 + else: + assert False, f"Invalid weight data type {data_type}" def split_and_convert_process(i, saved_dir,factor,key,args, val): @@ -87,8 +97,23 @@ def split_and_convert(args): factor = (int)(i_gpu_num / t_gpu_num) # load position_embedding from rank 0 - model = torch.load(ckpt_name) + # model = torch.load(ckpt_name) + model = GPT2Model.from_pretrained(args.in_file) + try: + config = configparser.ConfigParser() + config["gpt"] = {} + for key in vars(args): + config["gpt"][key] = f"{vars(args)[key]}" + for k, v in vars(model.config).items(): + config["gpt"][k] = f"{v}" + config["gpt"]["weight_data_type"] = args.weight_data_type + with open((Path(saved_dir) / f"config.ini").as_posix(), 'w') as configfile: + config.write(configfile) + except: + print(f"Fail to save the config in config.ini.") + np_weight_data_type = get_weight_data_type(args.weight_data_type) + huggingface_model_name_pattern = [ "ln_1.bias", "ln_1.weight", @@ -119,31 +144,32 @@ def split_and_convert(args): "mlp.dense_4h_to_h.weight", ] - proccess_list = [] - for t in model: - print(t) - if t.find("weight") == -1 and t.find("bias") == -1: + torch.multiprocessing.set_start_method("spawn") + pool = multiprocessing.Pool(args.processes) + for name, param in model.named_parameters(): + if name.find("weight") == -1 and name.find("bias") == -1: continue - print(t) - if t == 'transformer.wpe.weight': - model[t].cpu().numpy().astype(np.float32).tofile(saved_dir + "model.wpe.bin") - elif t == 'transformer.wte.weight': - model[t].cpu().numpy().astype(np.float32).tofile(saved_dir + "model.wte.bin") - elif t == 'transformer.ln_f.bias': - model[t].cpu().numpy().astype(np.float32).tofile(saved_dir + "model.final_layernorm.bias.bin") - elif t == 'transformer.ln_f.weight': - model[t].cpu().numpy().astype(np.float32).tofile(saved_dir + "model.final_layernorm.weight.bin") - elif t == 'lm_head.weight': - model[t].cpu().numpy().astype(np.float32).tofile(saved_dir + "model.lm_head.weight.bin") + print(name) + if name == 'transformer.wpe.weight': + param.detach().cpu().numpy().astype(np_weight_data_type).tofile(saved_dir + "model.wpe.bin") + elif name == 'transformer.wte.weight': + param.detach().cpu().numpy().astype(np_weight_data_type).tofile(saved_dir + "model.wte.bin") + elif name == 'transformer.ln_f.bias': + param.detach().cpu().numpy().astype(np_weight_data_type).tofile(saved_dir + "model.final_layernorm.bias.bin") + elif name == 'transformer.ln_f.weight': + param.detach().cpu().numpy().astype(np_weight_data_type).tofile(saved_dir + "model.final_layernorm.weight.bin") + elif name == 'lm_head.weight': + param.detach().cpu().numpy().astype(np_weight_data_type).tofile(saved_dir + "model.lm_head.weight.bin") else: for i in range(len(huggingface_model_name_pattern)): - if t.find(huggingface_model_name_pattern[i]) != -1: - new_name = t.replace("transformer.h.", "layers.").replace(huggingface_model_name_pattern[i], ft_model_name_pattern[i]) - proccess_list.append(Process(target=split_and_convert_process, args=(0,saved_dir,factor, new_name, args, model[t].cpu().numpy().astype(np.float32)))) - proccess_list[-1].start() + if name.find(huggingface_model_name_pattern[i]) != -1: + new_name = name.replace("transformer.h.", "layers.").replace(huggingface_model_name_pattern[i], ft_model_name_pattern[i]) + pool.starmap(split_and_convert_process, + [(0, saved_dir, factor, new_name, args, + param.detach().cpu().numpy().astype(np_weight_data_type))], ) - for t in proccess_list: - t.join() + pool.close() + pool.join() if __name__ == "__main__": parser = argparse.ArgumentParser(formatter_class=argparse.RawTextHelpFormatter) @@ -151,7 +177,8 @@ def split_and_convert(args): parser.add_argument('-in_file', '-i', type=str, help='file name of input checkpoint file', required=True) parser.add_argument('-trained_gpu_num', '-t_g', type=int, help='How many gpus for inference', default=1) parser.add_argument('-infer_gpu_num', '-i_g', type=int, help='How many gpus for inference', required=True) - # parser.add_argument('-head_num', '-h_n', type=int, help='Number of heads', required=True) + parser.add_argument("-processes", "-p", type=int, help="How many processes to spawn for conversion (default: 4)", default=4) + parser.add_argument("-weight_data_type", type=str, default="fp32", choices=["fp32", "fp16"]) args = parser.parse_args() print("\n=============== Argument ===============") diff --git a/examples/pytorch/gpt/utils/megatron_ckpt_convert.py b/examples/pytorch/gpt/utils/megatron_ckpt_convert.py index 9a82bd403..ec76ef0d6 100644 --- a/examples/pytorch/gpt/utils/megatron_ckpt_convert.py +++ b/examples/pytorch/gpt/utils/megatron_ckpt_convert.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -13,12 +13,20 @@ # limitations under the License. import argparse +import configparser import multiprocessing from pathlib import Path import numpy as np import torch # pytype: disable=import-error +def get_weight_data_type(data_type): + if data_type == "fp32": + return np.float32 + elif data_type == "fp16": + return np.float16 + else: + assert False, f"Invalid weight data type {data_type}" # more to less. e.g., trained by 8 gpus, infer by 2 gpus def merge_and_convert(args): # noqa: C901 too complex @@ -30,6 +38,17 @@ def merge_and_convert(args): # noqa: C901 too complex ckpt_ver = args.checkpoint_version saved_dir.mkdir(parents=True, exist_ok=True) + + config = configparser.ConfigParser() + config["gpt"] = {} + for key in vars(args): + config["gpt"][key] = f"{vars(args)[key]}" + config["gpt"]["weight_data_type"] = args.weight_data_type + with open((saved_dir / f"config.ini").as_posix(), 'w') as configfile: + config.write(configfile) + + np_weight_data_type = get_weight_data_type(args.weight_data_type) + prefix = Path(args.in_file) ckpt_name = "model_optim_rng.pt" t_gpu_num = args.trained_gpu_num @@ -41,7 +60,7 @@ def merge_and_convert(args): # noqa: C901 too complex # load position_embedding from rank 0 model_00 = torch.load((prefix / "mp_rank_00" / ckpt_name).as_posix()) model_00["model"]["language_model"]["embedding"]["position_embeddings"]["weight"].cpu().numpy().astype( - np.float32 + np_weight_data_type ).tofile( (saved_dir / "model.wpe.bin").as_posix() ) # not weight, do not need transpose @@ -56,7 +75,7 @@ def merge_and_convert(args): # noqa: C901 too complex model["model"]["language_model"]["embedding"]["word_embeddings"]["weight"] .cpu() .numpy() - .astype(np.float32) + .astype(np_weight_data_type) ) if ckpt_ver == 3: transformer_models.append(model["model"]["language_model"]["encoder"]) @@ -81,14 +100,14 @@ def merge_and_convert(args): # noqa: C901 too complex if i == 0: val = transformer_models[0][key].T.cpu().numpy() saved_path = saved_dir / f"model.{key}.bin" - np.squeeze(val).astype(np.float32).tofile(saved_path.as_posix()) + np.squeeze(val).astype(np_weight_data_type).tofile(saved_path.as_posix()) elif key.find("attention.dense.weight") != -1 or key.find("mlp.dense_4h_to_h.weight") != -1: vals = [] for k in range(factor): vals.append(transformer_models[k][key].T.cpu().numpy()) saved_path = saved_dir / f"model.{key}.{i}.bin" - np.concatenate(vals, axis=0).astype(np.float32).tofile(saved_path.as_posix()) + np.concatenate(vals, axis=0).astype(np_weight_data_type).tofile(saved_path.as_posix()) elif key.find("mlp.dense_h_to_4h.weight") != -1 or key.find("mlp.dense_h_to_4h.bias") != -1: @@ -96,7 +115,7 @@ def merge_and_convert(args): # noqa: C901 too complex for k in range(factor): vals.append(transformer_models[k][key].T.cpu().numpy()) saved_path = saved_dir / f"model.{key}.{i}.bin" - np.concatenate(vals, axis=-1).astype(np.float32).tofile(saved_path.as_posix()) + np.concatenate(vals, axis=-1).astype(np_weight_data_type).tofile(saved_path.as_posix()) elif key.find("attention.query_key_value.bias") != -1: vals = [] @@ -113,7 +132,7 @@ def merge_and_convert(args): # noqa: C901 too complex vals.append(val) saved_path = saved_dir / f"model.{key}.{i}.bin" - np.concatenate(vals, axis=-1).astype(np.float32).tofile(saved_path.as_posix()) + np.concatenate(vals, axis=-1).astype(np_weight_data_type).tofile(saved_path.as_posix()) elif key.find("attention.query_key_value.weight") != -1: vals = [] @@ -133,9 +152,9 @@ def merge_and_convert(args): # noqa: C901 too complex saved_path = saved_dir / f"model.{key}.{i}.bin" if args.fused_qkv == 1: - np.concatenate(vals, axis=-1).astype(np.float32).tofile(saved_path.as_posix()) + np.concatenate(vals, axis=-1).astype(np_weight_data_type).tofile(saved_path.as_posix()) elif args.fused_qkv == 0: - np.concatenate(vals, axis=-1).transpose(1, 0, 2).astype(np.float32).tofile(saved_path.as_posix()) + np.concatenate(vals, axis=-1).transpose(1, 0, 2).astype(np_weight_data_type).tofile(saved_path.as_posix()) else: print(f"[ERROR] cannot find key '{key}'") @@ -228,6 +247,16 @@ def split_and_convert(args): saved_dir = saved_dir / f"unfusedQKV-{args.infer_gpu_num}-gpu/" saved_dir.mkdir(parents=True, exist_ok=True) + + config = configparser.ConfigParser() + config["gpt"] = {} + for key in vars(args): + config["gpt"][key] = f"{vars(args)[key]}" + config["gpt"]["weight_data_type"] = args.weight_data_type + with open((saved_dir / f"config.ini").as_posix(), 'w') as configfile: + config.write(configfile) + + np_weight_data_type = get_weight_data_type(args.weight_data_type) prefix = Path(args.in_file) ckpt_name = "model_optim_rng.pt" t_gpu_num = args.trained_gpu_num @@ -239,7 +268,7 @@ def split_and_convert(args): # load position_embedding from rank 0 model_00 = torch.load((prefix / "mp_rank_00" / ckpt_name).as_posix()) model_00["model"]["language_model"]["embedding"]["position_embeddings"]["weight"].cpu().numpy().astype( - np.float32 + np_weight_data_type ).tofile( (saved_dir / "model.wpe.bin").as_posix() ) # not weight, do not need transpose @@ -256,7 +285,7 @@ def split_and_convert(args): transformer_model = m["model"]["language_model"]["transformer"] w_e_list.append( - m["model"]["language_model"]["embedding"]["word_embeddings"]["weight"].cpu().numpy().astype(np.float32) + m["model"]["language_model"]["embedding"]["word_embeddings"]["weight"].cpu().numpy().astype(np_weight_data_type) ) pool.starmap( @@ -268,7 +297,7 @@ def split_and_convert(args): factor, k, args, - transformer_model[k].T.cpu().numpy().astype(np.float32), + transformer_model[k].T.cpu().numpy().astype(np_weight_data_type), args.checkpoint_version, ) for (k, v) in transformer_model.items() @@ -297,6 +326,8 @@ def split_and_convert(args): ) parser.add_argument("-head_num", "-h_n", type=int, help="Number of heads", required=True) parser.add_argument("-checkpoint_version", type=int, default=0, help="Checkpoint version of Megatron-LM") + parser.add_argument("-weight_data_type", type=str, default="fp32", choices=["fp32", "fp16"]) + args = parser.parse_args() print("\n=============== Argument ===============") for key in vars(args): diff --git a/examples/pytorch/gpt/utils/megatron_ckpt_convert_2.py b/examples/pytorch/gpt/utils/megatron_ckpt_convert_2.py index 61c43c637..95a5195df 100644 --- a/examples/pytorch/gpt/utils/megatron_ckpt_convert_2.py +++ b/examples/pytorch/gpt/utils/megatron_ckpt_convert_2.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -13,6 +13,7 @@ # limitations under the License. import argparse +import configparser from datetime import datetime import multiprocessing from pathlib import Path @@ -20,8 +21,26 @@ import numpy as np import torch # pytype: disable=import-error +def _gpu_map_location(storage, loc): + if loc.startswith("cuda"): + training_gpu_idx = int(loc.split(":")[1]) + inference_gpu_idx = training_gpu_idx % torch.cuda.device_count() + return storage.cuda(inference_gpu_idx) + elif loc.startswith("cpu"): + return storage.cpu() + else: + raise NotImplementedError(f"Not handled {loc}") + +def get_weight_data_type(data_type): + if data_type == "fp32": + return np.float32 + elif data_type == "fp16": + return np.float16 + else: + assert False, f"Invalid weight data type {data_type}" + # This tool is used to support the new megatron model trained by pipeline parallel + tensor parallel -def merge_and_convert_process(i, pipeline_para_rank, saved_dir, factor, key, model_args, transformer_model_list, ckpt_ver): +def merge_and_convert_process(i, pipeline_para_rank, saved_dir, factor, key, model_args, transformer_model_list, ckpt_ver, np_weight_data_type): saved_dir = Path(saved_dir) if key.find("layers.") != -1: layer_index = (int)(key[7 : key.find(".", 7)]) @@ -49,21 +68,21 @@ def merge_and_convert_process(i, pipeline_para_rank, saved_dir, factor, key, mod if i == 0: val = transformer_model_list[0][key].T.float().cpu().numpy() saved_path = saved_dir / f"model.{saved_key}.bin" - np.squeeze(val).astype(np.float32).tofile(saved_path) + np.squeeze(val).astype(np_weight_data_type).tofile(saved_path) elif key.find("attention.dense.weight") != -1 or key.find("mlp.dense_4h_to_h.weight") != -1: vals = [] for k in range(factor): vals.append(transformer_model_list[k][key].T.float().to(major_device)) saved_path = saved_dir / f"model.{saved_key}.{i:d}.bin" - torch.cat(vals, dim=0).cpu().numpy().astype(np.float32).tofile(saved_path) + torch.cat(vals, dim=0).cpu().numpy().astype(np_weight_data_type).tofile(saved_path) elif key.find("mlp.dense_h_to_4h.weight") != -1 or key.find("mlp.dense_h_to_4h.bias") != -1: vals = [] for k in range(factor): vals.append(transformer_model_list[k][key].T.float().to(major_device)) saved_path = saved_dir / f"model.{saved_key}.{i:d}.bin" - torch.cat(vals, dim=-1).cpu().numpy().astype(np.float32).tofile(saved_path) + torch.cat(vals, dim=-1).cpu().numpy().astype(np_weight_data_type).tofile(saved_path) elif key.find("attention.query_key_value.bias") != -1: vals = [] @@ -80,7 +99,7 @@ def merge_and_convert_process(i, pipeline_para_rank, saved_dir, factor, key, mod vals.append(val.to(major_device)) saved_path = saved_dir / f"model.{saved_key}.{i:d}.bin" - torch.cat(vals, dim=-1).cpu().numpy().astype(np.float32).tofile(saved_path) + torch.cat(vals, dim=-1).cpu().numpy().astype(np_weight_data_type).tofile(saved_path) elif key.find("attention.query_key_value.weight") != -1: vals = [] @@ -99,13 +118,13 @@ def merge_and_convert_process(i, pipeline_para_rank, saved_dir, factor, key, mod vals.append(val.to(major_device)) saved_path = saved_dir / f"model.{saved_key}.{i:d}.bin" - torch.cat(vals, dim=-1).cpu().numpy().astype(np.float32).tofile(saved_path) + torch.cat(vals, dim=-1).cpu().numpy().astype(np_weight_data_type).tofile(saved_path) else: print(f"[ERROR] cannot find key '{key}'") -def split_and_convert_process(i, pipeline_para_rank, saved_dir, factor, key, model_args, transformer_model_list, ckpt_ver): - val = transformer_model_list[0][key].T.float().cpu().numpy().astype(np.float32) +def split_and_convert_process(i, pipeline_para_rank, saved_dir, factor, key, model_args, transformer_model_list, ckpt_ver, np_weight_data_type): + val = transformer_model_list[0][key].T.float().cpu().numpy().astype(np_weight_data_type) if key.find("layers.") != -1: layer_index = (int)(key[7 : key.find(".", 7)]) saved_key = key.replace( @@ -192,9 +211,9 @@ def convert_checkpoint(args): # load position_embedding from rank 0 if (prefix / "mp_rank_00").is_dir(): - model_00 = torch.load((prefix / "mp_rank_00" / ckpt_name).as_posix()) + model_00 = torch.load((prefix / "mp_rank_00" / ckpt_name).as_posix(), map_location=_gpu_map_location) elif (prefix / "mp_rank_00_000").is_dir(): - model_00 = torch.load((prefix / "mp_rank_00_000" / ckpt_name).as_posix()) + model_00 = torch.load((prefix / "mp_rank_00_000" / ckpt_name).as_posix(), map_location=_gpu_map_location) else: print(f"[ERROR] Cannot find checkpoint in {prefix}.") exit(1) @@ -204,8 +223,19 @@ def convert_checkpoint(args): for k, v in vars(model_args).items(): f.write("{}:{} \n".format(k, v)) + config = configparser.ConfigParser() + config["gpt"] = {} + for key in vars(args): + config["gpt"][key] = f"{vars(args)[key]}" + for k, v in vars(model_args).items(): + config["gpt"][k] = f"{v}" + config["gpt"]["weight_data_type"] = args.weight_data_type + with open((saved_dir / f"config.ini").as_posix(), 'w') as configfile: + config.write(configfile) + np_weight_data_type = get_weight_data_type(args.weight_data_type) + model_00["model"]["language_model"]["embedding"]["position_embeddings"]["weight"].float().cpu().numpy().astype( - np.float32 + np_weight_data_type ).tofile( (saved_dir / "model.wpe.bin").as_posix() ) # not weight, do not need transpose @@ -238,13 +268,13 @@ def convert_checkpoint(args): transformer_models = [] if is_merge_ckpt == True: for k in range(factor): - m = torch.load((prefix / f"mp_rank_{i * factor + k:02d}{layer_rank_num}" / ckpt_name).as_posix()) + m = torch.load((prefix / f"mp_rank_{i * factor + k:02d}{layer_rank_num}" / ckpt_name).as_posix(), map_location=_gpu_map_location) transformer_models.append(m["model"]["language_model"]["encoder"]) if j == 0: - w_e_list.append(m["model"]["language_model"]["embedding"]["word_embeddings"]["weight"].float().cpu().numpy().astype(np.float32)) + w_e_list.append(m["model"]["language_model"]["embedding"]["word_embeddings"]["weight"].float().cpu().numpy().astype(np_weight_data_type)) else: - m = torch.load(prefix / f"mp_rank_{i:02d}{layer_rank_num}/" / ckpt_name) + m = torch.load(prefix / f"mp_rank_{i:02d}{layer_rank_num}/" / ckpt_name, map_location=_gpu_map_location) if j == 0: w_e_list.append( @@ -252,7 +282,7 @@ def convert_checkpoint(args): .float() .cpu() .numpy() - .astype(np.float32) + .astype(np_weight_data_type) ) transformer_models.append(m["model"]["language_model"]["encoder"]) @@ -268,6 +298,7 @@ def convert_checkpoint(args): model_args, transformer_models, m["checkpoint_version"], + np_weight_data_type, ) for (k, v) in transformer_models[0].items() ], @@ -284,6 +315,7 @@ def convert_checkpoint(args): parser.add_argument("-in_file", "-i", type=str, help="file name of input checkpoint file", required=True) parser.add_argument("-infer_gpu_num", "-i_g", type=int, help="How many gpus for inference", required=True) parser.add_argument("-processes", "-p", type=int, help="How many processes to spawn for conversion (default: 64)", default=64) + parser.add_argument("-weight_data_type", type=str, default="fp32", choices=["fp32", "fp16"]) args = parser.parse_args() print("\n=============== Argument ===============") for key in vars(args): diff --git a/examples/pytorch/gpt/utils/nemo_ckpt_convert.py b/examples/pytorch/gpt/utils/nemo_ckpt_convert.py index 6e462d3e3..fe274b8ea 100644 --- a/examples/pytorch/gpt/utils/nemo_ckpt_convert.py +++ b/examples/pytorch/gpt/utils/nemo_ckpt_convert.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -14,6 +14,7 @@ import os import argparse +import configparser import multiprocessing from pathlib import Path import tarfile @@ -22,6 +23,13 @@ import torch # pytype: disable=import-error import yaml +def get_weight_data_type(data_type): + if data_type == "fp32": + return np.float32 + elif data_type == "fp16": + return np.float16 + else: + assert False, f"Invalid weight data type {data_type}" def unpack_nemo_ckpt(nemo_ckpt_path, out_folder): """ @@ -63,6 +71,23 @@ def merge_and_convert( saved_dir = saved_dir / f"unfusedQKV-{args.infer_gpu_num:d}-gpu" saved_dir.mkdir(parents=True, exist_ok=True) + + config = configparser.ConfigParser() + config["gpt"] = {} + + try: + for key in vars(args): + config["gpt"][key] = f"{vars(args)[key]}" + for k, v in model_config.items(): + config["gpt"][k] = f"{v}" + config["gpt"]["weight_data_type"] = args.weight_data_type + with open((saved_dir / f"config.ini").as_posix(), 'w') as configfile: + config.write(configfile) + except: + print(f"Fail to save the config in config.ini.") + + np_weight_data_type = get_weight_data_type(args.weight_data_type) + prefix = Path(args.in_file) i_gpu_num = args.infer_gpu_num @@ -84,8 +109,8 @@ def merge_and_convert( # load position_embedding from rank 0 model_00 = torch.load(weight_files[0], map_location=map_location_fn) - model_00["model.language_model.embedding.position_embeddings.weight"].cpu().numpy().astype( - np.float32 + model_00["model.language_model.embedding.position_embeddings.weight"].float().cpu().numpy().astype( + np_weight_data_type ).tofile( (saved_dir / "model.wpe.bin").as_posix() ) # not weight, do not need transpose @@ -99,9 +124,10 @@ def merge_and_convert( w_e_list.append( model["model.language_model.embedding.word_embeddings.weight"] + .float() .cpu() .numpy() - .astype(np.float32) + .astype(np_weight_data_type) ) prefix = "model.language_model.encoder" @@ -141,31 +167,31 @@ def merge_and_convert( ): # shared weights, only need to convert the weights of rank 0 if i == 0: - val = transformer_models[0][key].T.cpu().numpy() + val = transformer_models[0][key].T.float().cpu().numpy() key = key.replace("self_attention", "attention") saved_path = saved_dir / f"model.{key}.bin" - np.squeeze(val).astype(np.float32).tofile(saved_path.as_posix()) + np.squeeze(val).astype(np_weight_data_type).tofile(saved_path.as_posix()) elif key.find("attention.dense.weight") != -1 or key.find("mlp.dense_4h_to_h.weight") != -1: vals = [] for k in range(factor): - vals.append(transformer_models[k][key].T.cpu().numpy()) + vals.append(transformer_models[k][key].T.float().cpu().numpy()) key = key.replace("self_attention", "attention") saved_path = saved_dir / f"model.{key}.{i}.bin" - np.concatenate(vals, axis=0).astype(np.float32).tofile(saved_path.as_posix()) + np.concatenate(vals, axis=0).astype(np_weight_data_type).tofile(saved_path.as_posix()) elif key.find("mlp.dense_h_to_4h.weight") != -1 or key.find("mlp.dense_h_to_4h.bias") != -1: vals = [] for k in range(factor): - vals.append(transformer_models[k][key].T.cpu().numpy()) + vals.append(transformer_models[k][key].T.float().cpu().numpy()) saved_path = saved_dir / f"model.{key}.{i}.bin" - np.concatenate(vals, axis=-1).astype(np.float32).tofile(saved_path.as_posix()) + np.concatenate(vals, axis=-1).astype(np_weight_data_type).tofile(saved_path.as_posix()) elif key.find("attention.query_key_value.bias") != -1: vals = [] for k in range(factor): - val = transformer_models[k][key].T.cpu().numpy() + val = transformer_models[k][key].T.float().cpu().numpy() local_dim = (int)(val.shape[-1] / 3) num_splits = 3 head_num = num_attention_heads // t_gpu_num @@ -177,12 +203,12 @@ def merge_and_convert( key = key.replace("self_attention", "attention") saved_path = saved_dir / f"model.{key}.{i}.bin" - np.concatenate(vals, axis=-1).astype(np.float32).tofile(saved_path.as_posix()) + np.concatenate(vals, axis=-1).astype(np_weight_data_type).tofile(saved_path.as_posix()) elif key.find("attention.query_key_value.weight") != -1: vals = [] for k in range(factor): - val = transformer_models[k][key].T.cpu().numpy() + val = transformer_models[k][key].T.float().cpu().numpy() hidden_dim = val.shape[0] local_dim = (int)(val.shape[-1] / 3) num_splits = 3 @@ -196,9 +222,9 @@ def merge_and_convert( key = key.replace("self_attention", "attention") saved_path = saved_dir / f"model.{key}.{i}.bin" if args.fused_qkv == 1: - np.concatenate(vals, axis=-1).astype(np.float32).tofile(saved_path.as_posix()) + np.concatenate(vals, axis=-1).astype(np_weight_data_type).tofile(saved_path.as_posix()) elif args.fused_qkv == 0: - np.concatenate(vals, axis=-1).transpose(1, 0, 2).astype(np.float32).tofile(saved_path.as_posix()) + np.concatenate(vals, axis=-1).transpose(1, 0, 2).astype(np_weight_data_type).tofile(saved_path.as_posix()) else: print(f"[ERROR] cannot find key '{key}'") @@ -214,6 +240,21 @@ def split_and_convert(args, model_config, weight_files, *, load_checkpoints_to_c saved_dir = saved_dir / f"unfusedQKV-{args.infer_gpu_num:d}-gpu" saved_dir.mkdir(parents=True, exist_ok=True) + + config = configparser.ConfigParser() + config["gpt"] = {} + try: + for key in vars(args): + config["gpt"][key] = f"{vars(args)[key]}" + for k, v in model_config.items(): + config["gpt"][k] = f"{v}" + config["gpt"]["weight_data_type"] = args.weight_data_type + with open((saved_dir / f"config.ini").as_posix(), 'w') as configfile: + config.write(configfile) + except: + print(f"Fail to save the config in config.ini.") + + np_weight_data_type = get_weight_data_type(args.weight_data_type) prefix = Path(args.in_file) i_gpu_num = args.infer_gpu_num @@ -235,8 +276,8 @@ def split_and_convert(args, model_config, weight_files, *, load_checkpoints_to_c # load position_embedding from rank 0 model_00 = torch.load(weight_files[0], map_location=map_location_fn) - model_00["model.language_model.embedding.position_embeddings.weight"].cpu().numpy().astype( - np.float32 + model_00["model.language_model.embedding.position_embeddings.weight"].float().cpu().numpy().astype( + np_weight_data_type ).tofile( (saved_dir / "model.wpe.bin").as_posix() ) # not weight, do not need transpose @@ -250,9 +291,10 @@ def split_and_convert(args, model_config, weight_files, *, load_checkpoints_to_c w_e_list.append( model["model.language_model.embedding.word_embeddings.weight"] + .float() .cpu() .numpy() - .astype(np.float32) + .astype(np_weight_data_type) ) prefix = "model.language_model.encoder" @@ -277,7 +319,7 @@ def split_and_convert(args, model_config, weight_files, *, load_checkpoints_to_c transformer_model = model["model"]["language_model"]["encoder"] for key in transformer_model: - val = transformer_model[key].T.float().cpu().numpy().astype(np.float32) + val = transformer_model[key].T.float().cpu().numpy().astype(np_weight_data_type) if key.find("layers.") != -1: layer_index = (int)(key[7: key.find(".", 7)]) saved_key = key @@ -374,6 +416,7 @@ def split_and_convert(args, model_config, weight_files, *, load_checkpoints_to_c help="Fuse the qkv weights or not. Default is true (1)", choices=[0, 1], ) + parser.add_argument("-weight_data_type", type=str, default="fp32", choices=["fp32", "fp16"]) args = parser.parse_args() print("\n=============== Argument ===============") for key in vars(args): diff --git a/examples/pytorch/gpt/utils/parallel_gpt.py b/examples/pytorch/gpt/utils/parallel_gpt.py index 656788d3f..85c117228 100644 --- a/examples/pytorch/gpt/utils/parallel_gpt.py +++ b/examples/pytorch/gpt/utils/parallel_gpt.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -18,10 +18,10 @@ from examples.pytorch.gpt.utils.gpt import GPT class ParallelGPT(GPT): - def __init__(self, head_num, size_per_head, vocab_size, start_id, end_id, layer_num, top_k, top_p, random_seed, temperature, - output_len, max_seq_len, tensor_para_size, pipeline_para_size, max_batch_size, repetition_penalty, lib_path, int8_mode): - super().__init__(head_num, size_per_head, vocab_size, start_id, end_id, layer_num, top_k, top_p, random_seed, temperature, - output_len, max_seq_len, tensor_para_size, pipeline_para_size, max_batch_size, repetition_penalty, lib_path, int8_mode) + def __init__(self, head_num, size_per_head, vocab_size, start_id, end_id, layer_num, max_seq_len, + tensor_para_size, pipeline_para_size, lib_path, int8_mode): + super().__init__(head_num, size_per_head, vocab_size, start_id, end_id, layer_num, max_seq_len, + tensor_para_size, pipeline_para_size, lib_path, int8_mode) def cuda(self): self.weights._map(lambda w: w.cuda(self.device)) @@ -31,13 +31,8 @@ def cuda(self): if self.build_model == True: del self.model self.build_model = False - self.model = torch.classes.FasterTransformer.ParallelGptOp(self.max_batch_size, - self.max_seq_len, self.beam_width, - self.head_num, self.size_per_head, 4 * self.head_num * self.size_per_head, - self.layer_num, self.vocab_size, self.start_id, self.end_id, - self.beam_search_diversity_rate, self.top_k, self.top_p, - self.random_seed, self.temperature, 1.0, - self.repetition_penalty, self.tensor_para_size, - self.pipeline_para_size, self.int8_mode, - self.weights.w, self.weights.int8_w, self.weights.scale) + self.model = torch.classes.FasterTransformer.ParallelGptOp(self.head_num, self.size_per_head, 4 * self.head_num * self.size_per_head, + self.layer_num, self.vocab_size, self.start_id, self.end_id, + self.tensor_para_size, self.pipeline_para_size, self.int8_mode, + self.weights.w, self.weights.int8_w, self.weights.scale) self.build_model = True diff --git a/examples/pytorch/gpt/utils/word_list.py b/examples/pytorch/gpt/utils/word_list.py new file mode 100644 index 000000000..4b9018bc3 --- /dev/null +++ b/examples/pytorch/gpt/utils/word_list.py @@ -0,0 +1,97 @@ +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import csv +import numpy as np +import os +import sys + +dir_path = os.path.dirname(os.path.realpath(__file__)) +base_path = dir_path + "/../../../.." +sys.path.append(base_path) + +from examples.pytorch.gpt.utils import gpt_token_encoder as encoder + + +def get_tokenizer(vocab_file=None, bpe_file=None): + vocab_file = vocab_file if vocab_file is not None else base_path + "/models/gpt2-vocab.json" + bpe_file = bpe_file if bpe_file is not None else base_path + "/models/gpt2-merges.txt" + + tokenizer = encoder.get_encoder(vocab_file, bpe_file) + + return tokenizer + + +def to_word_list_format(word_dict): + tokenizer = get_tokenizer() + + flat_ids = [] + offsets = [] + for word_dict_item in word_dict: + item_flat_ids = [] + item_offsets = [] + + words = list(csv.reader(word_dict_item))[0] + for word in words: + ids = tokenizer.encode(word) + + if len(ids) == 0: + continue + + item_flat_ids += ids + item_offsets.append(len(ids)) + + flat_ids.append(np.array(item_flat_ids)) + offsets.append(np.cumsum(np.array(item_offsets))) + + pad_to = max(1, max(len(ids) for ids in flat_ids)) + + for i, (ids, offs) in enumerate(zip(flat_ids, offsets)): + flat_ids[i] = np.pad(ids, (0, pad_to - len(ids)), constant_values=0) + offsets[i] = np.pad(offs, (0, pad_to - len(offs)), constant_values=-1) + + return np.array([flat_ids, offsets], dtype="int32").transpose((1, 0, 2)) + + +def save_word_list(filename, word_list): + with open(filename, "w") as f: + writer = csv.writer(f) + for word_list_item in word_list: + writer.writerow(word_list_item[0].tolist()) + writer.writerow(word_list_item[1].tolist()) + + +def load_word_list(filename): + with open(filename, "r") as f: + reader = csv.reader(f) + data = list(reader) + data = np.array(data, dtype=np.int32) + batch_size_x2, list_len = data.shape + + return data.reshape((batch_size_x2 // 2, 2, list_len)) + + +def test_csv_read_write(): + filename = sys.argv[1] + + test_words = [["one,two,three, one, two, three, one two three"], ["four"]] + word_list = to_word_list_format(test_words) + + save_word_list(filename, word_list) + read_word_list = load_word_list(filename) + + assert np.all(word_list == read_word_list) + +if __name__ == "__main__": + test_csv_read_write() diff --git a/examples/pytorch/gptj/utils/gptj_ckpt_convert.py b/examples/pytorch/gptj/utils/gptj_ckpt_convert.py index 0393ff2d5..81b9b3509 100644 --- a/examples/pytorch/gptj/utils/gptj_ckpt_convert.py +++ b/examples/pytorch/gptj/utils/gptj_ckpt_convert.py @@ -234,7 +234,7 @@ def main(ckpt_dir, num_layers=28, total_shards=8): old_shape = (params.shape[1],) print(f"< {params.shape} to {old_shape}") params = reshard(params, old_shape).squeeze(0).T - params = torch.tensor(params.copy()).half() + params = torch.tensor(np.array(params.copy())).half() if params.isnan().any() or params.isinf().any(): raise ValueError(f"fp16 over/underflow at {part} {element}") checkpoint[transform[0]] = params diff --git a/examples/pytorch/requirement.txt b/examples/pytorch/requirement.txt index 52f0d1459..38ab9156b 100644 --- a/examples/pytorch/requirement.txt +++ b/examples/pytorch/requirement.txt @@ -4,4 +4,5 @@ requests==2.21.0 tqdm==4.31.1 opennmt-py==1.1.1 # for pytorch transformers==2.5.1 # for pytorch +ml_collection # for pytorch sacrebleu # for pytorch \ No newline at end of file diff --git a/examples/pytorch/swin/Swin-Transformer-Quantization/README.md b/examples/pytorch/swin/Swin-Transformer-Quantization/README.md new file mode 100644 index 000000000..53f7c2206 --- /dev/null +++ b/examples/pytorch/swin/Swin-Transformer-Quantization/README.md @@ -0,0 +1,217 @@ +# Swin Transformer Quantization Toolkit + +This folder contains the guidance for Swin Transformer Quantization Toolkit. + +## Model Zoo + +### Regular ImageNet-1K trained models + +| name | resolution |acc@1 | acc@5 | #params | FLOPs | model | +|:---:|:---:|:---:|:---:| :---:| :---:|:---:| +| Swin-T | 224x224 | 81.2 | 95.5 | 28M | 4.5G | [github](https://github.com/SwinTransformer/storage/releases/download/v1.0.0/swin_tiny_patch4_window7_224.pth)/[baidu](https://pan.baidu.com/s/156nWJy4Q28rDlrX-rRbI3w) | +| Swin-S | 224x224 | 83.2 | 96.2 | 50M | 8.7G | [github](https://github.com/SwinTransformer/storage/releases/download/v1.0.0/swin_small_patch4_window7_224.pth)/[baidu](https://pan.baidu.com/s/1KFjpj3Efey3LmtE1QqPeQg) | +| Swin-B | 224x224 | 83.5 | 96.5 | 88M | 15.4G | [github](https://github.com/SwinTransformer/storage/releases/download/v1.0.0/swin_base_patch4_window7_224.pth)/[baidu](https://pan.baidu.com/s/16bqCTEc70nC_isSsgBSaqQ) | +| Swin-B | 384x384 | 84.5 | 97.0 | 88M | 47.1G | [github](https://github.com/SwinTransformer/storage/releases/download/v1.0.0/swin_base_patch4_window12_384.pth)/[baidu](https://pan.baidu.com/s/1xT1cu740-ejW7htUdVLnmw) | + +### ImageNet-22K pre-trained models + +| name | resolution |acc@1 | acc@5 | #params | FLOPs | 22K model | 1K model | +|:---: |:---: |:---:|:---:|:---:|:---:|:---:|:---:| +| Swin-B | 224x224 | 85.2 | 97.5 | 88M | 15.4G | [github](https://github.com/SwinTransformer/storage/releases/download/v1.0.0/swin_base_patch4_window7_224_22k.pth)/[baidu](https://pan.baidu.com/s/1y1Ec3UlrKSI8IMtEs-oBXA) | [github](https://github.com/SwinTransformer/storage/releases/download/v1.0.0/swin_base_patch4_window7_224_22kto1k.pth)/[baidu](https://pan.baidu.com/s/1n_wNkcbRxVXit8r_KrfAVg) | +| Swin-B | 384x384 | 86.4 | 98.0 | 88M | 47.1G | [github](https://github.com/SwinTransformer/storage/releases/download/v1.0.0/swin_base_patch4_window12_384_22k.pth)/[baidu](https://pan.baidu.com/s/1vwJxnJcVqcLZAw9HaqiR6g) | [github](https://github.com/SwinTransformer/storage/releases/download/v1.0.0/swin_base_patch4_window12_384_22kto1k.pth)/[baidu](https://pan.baidu.com/s/1caKTSdoLJYoi4WBcnmWuWg) | +| Swin-L | 224x224 | 86.3 | 97.9 | 197M | 34.5G | [github](https://github.com/SwinTransformer/storage/releases/download/v1.0.0/swin_large_patch4_window7_224_22k.pth)/[baidu](https://pan.baidu.com/s/1pws3rOTFuOebBYP3h6Kx8w) | [github](https://github.com/SwinTransformer/storage/releases/download/v1.0.0/swin_large_patch4_window7_224_22kto1k.pth)/[baidu](https://pan.baidu.com/s/1NkQApMWUhxBGjk1ne6VqBQ) | +| Swin-L | 384x384 | 87.3 | 98.2 | 197M | 103.9G | [github](https://github.com/SwinTransformer/storage/releases/download/v1.0.0/swin_large_patch4_window12_384_22k.pth)/[baidu](https://pan.baidu.com/s/1sl7o_bJA143OD7UqSLAMoA) | [github](https://github.com/SwinTransformer/storage/releases/download/v1.0.0/swin_large_patch4_window12_384_22kto1k.pth)/[baidu](https://pan.baidu.com/s/1X0FLHQyPOC6Kmv2CmgxJvA) | + +Note: access code for `baidu` is `swin`. + +## Usage + +### Environment setup + +- Initialize submodule + ```bash + git submodule update --init + ``` + +- Run the container. + + You can choose pytorch version you want. Here, we list some possible images: + - `nvcr.io/nvidia/pytorch:21.07-py3` contains the PyTorch 1.8.0 and python 3.8 + +- Install additional dependencies (not included by container) + ```bash + pip install timm==0.4.12 + pip install termcolor==1.1.0 + ``` + + +### Data preparation + +We use standard ImageNet dataset, you can download it from http://image-net.org/. We provide the following two ways to +load data: + +- For standard folder dataset, move validation images to labeled sub-folders. The file structure should look like: + ```bash + $ tree data + imagenet + ├── train + │ ├── class1 + │ │ ├── img1.jpeg + │ │ ├── img2.jpeg + │ │ └── ... + │ ├── class2 + │ │ ├── img3.jpeg + │ │ └── ... + │ └── ... + └── val + ├── class1 + │ ├── img4.jpeg + │ ├── img5.jpeg + │ └── ... + ├── class2 + │ ├── img6.jpeg + │ └── ... + └── ... + + ``` +- To boost the slow speed when reading images from massive small files, we also support zipped ImageNet, which includes + four files: + - `train.zip`, `val.zip`: which store the zipped folder for train and validate splits. + - `train_map.txt`, `val_map.txt`: which store the relative path in the corresponding zip file and ground truth + label. Make sure the data folder looks like this: + + ```bash + $ tree data + data + └── ImageNet-Zip + ├── train_map.txt + ├── train.zip + ├── val_map.txt + └── val.zip + + $ head -n 5 data/ImageNet-Zip/val_map.txt + ILSVRC2012_val_00000001.JPEG 65 + ILSVRC2012_val_00000002.JPEG 970 + ILSVRC2012_val_00000003.JPEG 230 + ILSVRC2012_val_00000004.JPEG 809 + ILSVRC2012_val_00000005.JPEG 516 + + $ head -n 5 data/ImageNet-Zip/train_map.txt + n01440764/n01440764_10026.JPEG 0 + n01440764/n01440764_10027.JPEG 0 + n01440764/n01440764_10029.JPEG 0 + n01440764/n01440764_10040.JPEG 0 + n01440764/n01440764_10042.JPEG 0 + ``` + +### Calibration + +To calibrate and then evaluate a calibrated `Swin Transformer` on ImageNet val, run: + +```bash +python -m torch.distributed.launch --nproc_per_node \ + --master_port 12345 main.py \ + --calib \ + --cfg \ + --resume \ + --data-path \ + --num-calib-batch \ + --calib-batchsz \ + --int8-mode \ + --calib-output-path \ +``` + +For example, to calibrate the `Swin-T` with a single GPU: (For calibration, we only support using one single GPU). You can see **calib.sh** for reference. + +```bash +python -m torch.distributed.launch --nproc_per_node 1 \ + --master_port 12345 main.py \ + --calib \ + --cfg SwinTransformer/configs/swin_tiny_patch4_window7_224.yaml \ + --resume swin_tiny_patch4_window7_224.pth \ + --data-path \ + --num-calib-batch 10 \ + --calib-batchsz 8\ + --int8-mode 1\ + --calib-output-path calib-checkpoint +``` +### Difference between `--int8-mode 1` and `--int8-mode 2` +|name| resolution|Original Accuracy|PTQ(mode=1)|QAT(mode=1)| +|:---:|:---:|:---:|:---:|:---:| +|Swin-T|224x224|81.18%|80.75%(-0.43%)|81.00%(-0.18%)| +|Swin-S|224x224|83.21%|82.90%(-0.31%)|83.00%(-0.21%)| +|Swin-B|224x224|83.42%|83.10%(-0.32%)|83.42%(-0.00%)| +|Swin-B|384x384|84.47%|84.05%(-0.42%)|84.16%(-0.31%)| +|Swin-L|224x224|86.25%|83.53%(-2.72%)|86.12%(-0.13%)| +|Swin-L|384x384|87.25%|83.10%(-4.15%)|87.11%(-0.14%)| + +For Swin-T/S/B, set `--int8-mode 1` suffices to get negligible accuracy loss for both PTQ/QAT. However, for Swin-L, `--int8-mode 1` cannot get a satisfactory result for PTQ accuracy. This is due to that `--int8-mode 1` means all GEMM outputs(INT32) are quantized to INT8, and in order to improve PTQ performance some GEMM output quantization have to be disabled. `--int8-mode 2` means quantization of `fc2` and `PatchMerge` outputs are disabled. The result is as follows: +|name| resolution|Original Accuracy|PTQ(mode=1)|PTQ(mode=2)| +|:---:|:---:|:---:|:---:|:---:| +|Swin-L|224x224|86.25%|83.53%(-2.72%)|85.93%(-0.32%)| +|Swin-L|384x384|87.25%|83.10%(-4.15%)|86.92%(-0.33%)| + +### Evaluation a Calibrated model + +To evaluate a pre-calibrated `Swin Transformer` on ImageNet val, run: + +```bash +python -m torch.distributed.launch --nproc_per_node \ + --master_port 12345 main.py \ + --eval \ + --cfg \ + --resume \ + --data-path \ + --int8-mode \ + --batch-size +``` + +For example, to evaluate the `Swin-T` with a single GPU. You can see **run.sh** for reference. + +```bash +python -m torch.distributed.launch --nproc_per_node 1 \ + --master_port 12345 main.py \ + --eval \ + --cfg SwinTransformer/configs/swin_tiny_patch4_window7_224.yaml \ + --resume ./calib-checkpoint/swin_tiny_patch4_window7_224_calib.pth \ + --data-path \ + --int8-mode 1\ + --batch-size 128 +``` +### Quantization Aware Training (QAT) + +To run QAT with `Swin Transformer`, run: +```bash +python -m torch.distributed.launch --nproc_per_node \ + --master_port 12345 main.py \ + --train \ + --cfg \ + --resume \ + --data-path \ + --quant-mode \ + --teacher \ + --output \ + --distill \ + --int8-mode \ + --batch-size \ + --num-epochs \ + --qat-lr +``` +For example, to do QAT with `Swin Transformer` by 4 GPU on a single node for 5 epochs, run: (You can see **qat.sh** for reference.) + +```bash +python -m torch.distributed.launch --nproc_per_node 4 \ + --master_port 12345 main.py \ + --train \ + --cfg SwinTransformer/configs/swin_tiny_patch4_window7_224.yaml \ + --resume ./calib-checkpoint/swin_tiny_patch4_window7_224_calib.pth \ + --data-path /data/datasets/ILSVRC2012 \ + --quant-mode ft2 \ + --teacher swin_tiny_patch4_window7_224.pth \ + --output qat-output \ + --distill \ + --int8-mode 1\ + --batch-size 128 \ + --num-epochs 5 \ + --qat-lr 1e-5 +``` \ No newline at end of file diff --git a/examples/pytorch/swin/Swin-Transformer-Quantization/__init__.py b/examples/pytorch/swin/Swin-Transformer-Quantization/__init__.py new file mode 100644 index 000000000..8df6fc301 --- /dev/null +++ b/examples/pytorch/swin/Swin-Transformer-Quantization/__init__.py @@ -0,0 +1 @@ +from SwinTransformer.config import get_config \ No newline at end of file diff --git a/examples/pytorch/swin/Swin-Transformer-Quantization/calib.sh b/examples/pytorch/swin/Swin-Transformer-Quantization/calib.sh new file mode 100644 index 000000000..5fb9674d7 --- /dev/null +++ b/examples/pytorch/swin/Swin-Transformer-Quantization/calib.sh @@ -0,0 +1,10 @@ +python -m torch.distributed.launch --nproc_per_node 1 \ + --master_port 12345 main.py \ + --calib \ + --cfg SwinTransformer/configs/swin_tiny_patch4_window7_224.yaml \ + --resume swin_tiny_patch4_window7_224.pth \ + --data-path /data/datasets/ILSVRC2012 \ + --num-calib-batch 10 \ + --calib-batchsz 8\ + --int8-mode 1\ + --calib-output-path calib-checkpoint diff --git a/examples/pytorch/swin/Swin-Transformer-Quantization/data.py b/examples/pytorch/swin/Swin-Transformer-Quantization/data.py new file mode 100644 index 000000000..03bc95cb5 --- /dev/null +++ b/examples/pytorch/swin/Swin-Transformer-Quantization/data.py @@ -0,0 +1,109 @@ +# -------------------------------------------------------- +# Swin Transformer +# Copyright (c) 2021 Microsoft +# Licensed under The MIT License [see LICENSE for details] +# Written by Ze Liu +# -------------------------------------------------------- +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import os +import torch +import numpy as np +import torch.distributed as dist +from torchvision import datasets, transforms +from timm.data.constants import IMAGENET_DEFAULT_MEAN, IMAGENET_DEFAULT_STD +from timm.data import Mixup +from timm.data import create_transform +from timm.data.transforms import _pil_interp + +from SwinTransformer.data.samplers import SubsetRandomSampler +from SwinTransformer.data.build import build_dataset + +def build_val_loader(config): + config.freeze() + dataset_val, _ = build_dataset(is_train=False, config=config) + # print(f"local rank {config.LOCAL_RANK} / global rank {dist.get_rank()} successfully build val dataset") + + indices = np.arange(0, len(dataset_val), 1) + sampler_val = SubsetRandomSampler(indices) + + data_loader_val = torch.utils.data.DataLoader( + dataset_val, sampler=sampler_val, + batch_size=config.DATA.BATCH_SIZE, + shuffle=False, + num_workers=config.DATA.NUM_WORKERS, + pin_memory=config.DATA.PIN_MEMORY, + drop_last=False + ) + + return dataset_val, data_loader_val + +def build_loader(config, args): + config.defrost() + dataset_train, config.MODEL.NUM_CLASSES = build_dataset(is_train=True, config=config) + config.freeze() + print(f"local rank {config.LOCAL_RANK} / global rank {dist.get_rank()} successfully build train dataset") + dataset_val, _ = build_dataset(is_train=False, config=config) + print(f"local rank {config.LOCAL_RANK} / global rank {dist.get_rank()} successfully build val dataset") + + num_tasks = dist.get_world_size() + global_rank = dist.get_rank() + if config.DATA.ZIP_MODE and config.DATA.CACHE_MODE == 'part': + indices = np.arange(dist.get_rank(), len(dataset_train), dist.get_world_size()) + sampler_train = SubsetRandomSampler(indices) + else: + sampler_train = torch.utils.data.DistributedSampler( + dataset_train, num_replicas=num_tasks, rank=global_rank, shuffle=True + ) + + indices = np.arange(dist.get_rank(), len(dataset_val), dist.get_world_size()) + sampler_val = SubsetRandomSampler(indices) + + if args.calib: + data_loader_train = torch.utils.data.DataLoader( + dataset_train, sampler=sampler_train, + batch_size=args.calib_batchsz, + num_workers=config.DATA.NUM_WORKERS, + pin_memory=config.DATA.PIN_MEMORY, + drop_last=True, + ) + else: + data_loader_train = torch.utils.data.DataLoader( + dataset_train, sampler=sampler_train, + batch_size=config.DATA.BATCH_SIZE, + num_workers=config.DATA.NUM_WORKERS, + pin_memory=config.DATA.PIN_MEMORY, + drop_last=True, + ) + + data_loader_val = torch.utils.data.DataLoader( + dataset_val, sampler=sampler_val, + batch_size=config.DATA.BATCH_SIZE, + shuffle=False, + num_workers=config.DATA.NUM_WORKERS, + pin_memory=config.DATA.PIN_MEMORY, + drop_last=False + ) + + # setup mixup / cutmix + mixup_fn = None + mixup_active = config.AUG.MIXUP > 0 or config.AUG.CUTMIX > 0. or config.AUG.CUTMIX_MINMAX is not None + if mixup_active: + mixup_fn = Mixup( + mixup_alpha=config.AUG.MIXUP, cutmix_alpha=config.AUG.CUTMIX, cutmix_minmax=config.AUG.CUTMIX_MINMAX, + prob=config.AUG.MIXUP_PROB, switch_prob=config.AUG.MIXUP_SWITCH_PROB, mode=config.AUG.MIXUP_MODE, + label_smoothing=config.MODEL.LABEL_SMOOTHING, num_classes=config.MODEL.NUM_CLASSES) + + return dataset_train, dataset_val, data_loader_train, data_loader_val, mixup_fn \ No newline at end of file diff --git a/examples/pytorch/swin/Swin-Transformer-Quantization/main.py b/examples/pytorch/swin/Swin-Transformer-Quantization/main.py new file mode 100644 index 000000000..a385421e6 --- /dev/null +++ b/examples/pytorch/swin/Swin-Transformer-Quantization/main.py @@ -0,0 +1,407 @@ +# -------------------------------------------------------- +# Swin Transformer +# Copyright (c) 2021 Microsoft +# Licensed under The MIT License [see LICENSE for details] +# Written by Ze Liu +# -------------------------------------------------------- +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import os +import time +import argparse +import datetime +import numpy as np + +import torch +import torch.backends.cudnn as cudnn +import torch.distributed as dist + +from timm.loss import LabelSmoothingCrossEntropy, SoftTargetCrossEntropy +from timm.utils import accuracy, AverageMeter +from tqdm import tqdm + +import quant_utils +from SwinTransformer.config import get_config +from models import build_model +from data import build_loader +from SwinTransformer.lr_scheduler import build_scheduler +from SwinTransformer.optimizer import build_optimizer +from SwinTransformer.logger import create_logger +from SwinTransformer.utils import load_checkpoint, save_checkpoint, get_grad_norm, auto_resume_helper, reduce_tensor + +try: + # noinspection PyUnresolvedReferences + from apex import amp +except ImportError: + amp = None + +CONFIG_NAME = 'bert_config.json' +WEIGHTS_NAME = 'pytorch_model.bin' + +class Knowledge_Distillation_Loss(torch.nn.Module): + def __init__(self, scale, T = 3): + super(Knowledge_Distillation_Loss, self).__init__() + self.KLdiv = torch.nn.KLDivLoss() + self.T = T + self.scale = scale + + def get_knowledge_distillation_loss(self, output_student, output_teacher): + loss_kl = self.KLdiv(torch.nn.functional.log_softmax(output_student / self.T, dim=1), torch.nn.functional.softmax(output_teacher / self.T, dim=1)) + + loss = loss_kl + return self.scale * loss + +def parse_option(): + parser = argparse.ArgumentParser('Swin Transformer training and evaluation script', add_help=False) + parser.add_argument('--cfg', type=str, required=True, metavar="FILE", help='path to config file', ) + parser.add_argument( + "--opts", + help="Modify config options by adding 'KEY VALUE' pairs. ", + default=None, + nargs='+', + ) + + # easy config modification + parser.add_argument('--batch-size', type=int, help="batch size for single GPU") + parser.add_argument('--data-path', type=str, help='path to dataset') + parser.add_argument('--zip', action='store_true', help='use zipped dataset instead of folder dataset') + parser.add_argument('--cache-mode', type=str, default='part', choices=['no', 'full', 'part'], + help='no: no cache, ' + 'full: cache all data, ' + 'part: sharding the dataset into nonoverlapping pieces and only cache one piece') + parser.add_argument('--pretrained', + help='pretrained weight from checkpoint, could be imagenet22k pretrained weight') + parser.add_argument('--resume', help='resume from checkpoint') + parser.add_argument('--accumulation-steps', type=int, help="gradient accumulation steps") + parser.add_argument('--use-checkpoint', action='store_true', + help="whether to use gradient checkpointing to save memory") + parser.add_argument('--amp-opt-level', type=str, default='O1', choices=['O0', 'O1', 'O2'], + help='mixed precision opt level, if O0, no amp is used') + parser.add_argument('--output', default='output', type=str, metavar='PATH', + help='root of output folder, the full path is // (default: output)') + parser.add_argument('--tag', help='tag of experiment') + parser.add_argument('--eval', action='store_true', help='Perform evaluation only') + parser.add_argument('--calib', action='store_true', help='Perform calibration only') + parser.add_argument('--train', action='store_true', help='Perform training only') + parser.add_argument('--int8-mode', type=int, required=True, help='int8 mode', choices=[1, 2]) + parser.add_argument('--throughput', action='store_true', help='Test throughput only') + parser.add_argument('--num-calib-batch', type=int, default=4, help='Number of batches for calibration. 0 will disable calibration.') + parser.add_argument('--calib-batchsz', type=int, default=8, help='Batch size when doing calibration') + parser.add_argument('--calib-output-path', type=str, help='Output directory to save calibrated model') + # distributed training + parser.add_argument("--local_rank", type=int, required=True, help='local rank for DistributedDataParallel') + + parser.add_argument("--num-epochs", type=int, default=10, help="Number of epochs to run QAT fintuning.") + parser.add_argument("--qat-lr", type=float, default=5e-7, help="learning rate for QAT.") + parser.add_argument("--distill", action='store_true', help='Using distillation') + parser.add_argument("--teacher", type=str, help='teacher model path') + parser.add_argument('--distillation_loss_scale', type=float, default=10000., help="scale applied to distillation component of loss") + + quant_utils.add_arguments(parser) + args, unparsed = parser.parse_known_args() + if args.quant_mode is not None: + args = quant_utils.set_args(args) + quant_utils.set_default_quantizers(args) + + config = get_config(args) + + return args, config + + +def main(config, args): + dataset_train, dataset_val, data_loader_train, data_loader_val, mixup_fn = build_loader(config, args) + + logger.info(f"Creating model:{config.MODEL.TYPE}/{config.MODEL.NAME}") + model = build_model(config) + model.cuda() + # PRINT the details of model (quantized, with TensorQuantizer inserted) + # logger.info(str(model)) + + optimizer = build_optimizer(config, model) + if config.AMP_OPT_LEVEL != "O0": + model, optimizer = amp.initialize(model, optimizer, opt_level=config.AMP_OPT_LEVEL) + model = torch.nn.parallel.DistributedDataParallel(model, device_ids=[config.LOCAL_RANK], broadcast_buffers=False) + model_without_ddp = model.module + + n_parameters = sum(p.numel() for p in model.parameters() if p.requires_grad) + logger.info(f"number of params: {n_parameters}") + if hasattr(model_without_ddp, 'flops'): + flops = model_without_ddp.flops() + logger.info(f"number of GFLOPs: {flops / 1e9}") + + lr_scheduler = build_scheduler(config, optimizer, len(data_loader_train)) + + if config.AUG.MIXUP > 0.: + # smoothing is handled with mixup label transform + criterion = SoftTargetCrossEntropy() + elif config.MODEL.LABEL_SMOOTHING > 0.: + criterion = LabelSmoothingCrossEntropy(smoothing=config.MODEL.LABEL_SMOOTHING) + else: + criterion = torch.nn.CrossEntropyLoss() + + max_accuracy = 0.0 + + if config.MODEL.RESUME: + # max_accuracy = load_checkpoint(config, model_without_ddp, optimizer, lr_scheduler, logger) + checkpoint = torch.load(config.MODEL.RESUME, map_location='cpu') + msg = model_without_ddp.load_state_dict(checkpoint['model'] if 'model' in checkpoint.keys() else checkpoint, strict=False) + logger.info(msg) + del checkpoint + + if config.THROUGHPUT_MODE: + throughput(data_loader_val, model, logger) + return + + if args.calib: + quant_utils.configure_model(model, args, calib=True) + model.eval() + quant_utils.enable_calibration(model) + # Run forward passes on a sample of the training set + for step, (samples, targets) in enumerate(tqdm(data_loader_train, desc='Calibration', total=args.num_calib_batch)): + if step > args.num_calib_batch: + break + outputs = model(samples) + quant_utils.finish_calibration(model, args) + + # Evaluate calibrated model + quant_utils.configure_model(model, args, calib=False) + acc1, acc5, loss = validate(config, data_loader_val, model) + logger.info(f"Accuracy of the network on the {len(dataset_val)} test images: {acc1:.1f}%") + + # Save calibrated checkpoint + model_to_save = model.module if hasattr(model, 'module') else model + output_model_path = os.path.join(args.calib_output_path, '{}_calib.pth'.format(config.MODEL.NAME)) + if not os.path.exists(args.calib_output_path): + os.mkdir(args.calib_output_path) + torch.save(model_to_save.state_dict(), output_model_path) + print(f'Model is saved to {output_model_path}') + + if args.train: + teacher = None + distillation_loss = None + if args.distill: + teacher = build_model(config) + print("Loading teacher model...") + teacher_ckpt = torch.load(args.teacher, map_location="cpu") + if "model" in teacher_ckpt: + teacher.load_state_dict(teacher_ckpt["model"], strict=False) + else: + teacher.load_state_dict(teacher_ckpt, strict=False) + distillation_loss = Knowledge_Distillation_Loss(scale=args.distillation_loss_scale).cuda() + teacher.cuda() + teacher.eval() + quant_utils.set_quantizer_by_name(teacher, [''], _disabled=True) + + logger.info("Start training") + quant_utils.configure_model(model, args, calib=False) + start_time = time.time() + for epoch in range(args.num_epochs): + data_loader_train.sampler.set_epoch(epoch) + + train_one_epoch(config, model, criterion, data_loader_train, optimizer, epoch, + mixup_fn, teacher, distillation_loss) + if dist.get_rank() == 0 and (epoch % config.SAVE_FREQ == 0 or epoch == (config.TRAIN.EPOCHS - 1)): + save_checkpoint(config, epoch, model_without_ddp, max_accuracy, optimizer, lr_scheduler, logger) + + acc1, acc5, loss = validate(config, data_loader_val, model) + logger.info(f"Accuracy of the network on the {len(dataset_val)} test images: {acc1:.1f}%") + max_accuracy = max(max_accuracy, acc1) + logger.info(f'Max accuracy: {max_accuracy:.2f}%') + + total_time = time.time() - start_time + total_time_str = str(datetime.timedelta(seconds=int(total_time))) + logger.info('Training time {}'.format(total_time_str)) + + if args.eval: + quant_utils.configure_model(model, args, calib=False) + acc1, acc5, loss = validate(config, data_loader_val, model) + logger.info(f"Accuracy of the network on the {len(dataset_val)} test images: {acc1:.1f}%") + + +def train_one_epoch(config, model, criterion, data_loader_train, optimizer, epoch, mixup_fn, teacher, dis_loss): + model.train() + optimizer.zero_grad() + max_accuracy = 0.0 + + num_steps = len(data_loader_train) + batch_time = AverageMeter() + loss_meter = AverageMeter() + norm_meter = AverageMeter() + + start = time.time() + end = time.time() + for idx, (samples, targets) in enumerate(data_loader_train): + samples = samples.cuda(non_blocking=True) + targets = targets.cuda(non_blocking=True) + + if mixup_fn is not None: + samples, targets = mixup_fn(samples, targets) + + outputs = model(samples) + loss = criterion(outputs, targets) + if teacher: + with torch.no_grad(): + teacher_outputs = teacher(samples) + loss_t = dis_loss.get_knowledge_distillation_loss(outputs, teacher_outputs) + loss = loss + loss_t + optimizer.zero_grad() + loss.backward() + if config.TRAIN.CLIP_GRAD: + grad_norm = torch.nn.utils.clip_grad_norm_(model.parameters(), config.TRAIN.CLIP_GRAD) + else: + grad_norm = get_grad_norm(model.parameters()) + optimizer.step() + # lr_scheduler.step_update(epoch * num_steps + idx) + + torch.cuda.synchronize() + + loss_meter.update(loss.item(), targets.size(0)) + norm_meter.update(grad_norm) + batch_time.update(time.time() - end) + end = time.time() + + if idx % config.PRINT_FREQ == 0: + lr = optimizer.param_groups[0]['lr'] + memory_used = torch.cuda.max_memory_allocated() / (1024.0 * 1024.0) + etas = batch_time.avg * (num_steps - idx) + logger.info( + f'Train: [{epoch}/{config.TRAIN.EPOCHS}][{idx}/{num_steps}]\t' + f'eta {datetime.timedelta(seconds=int(etas))} lr {lr:.6f}\t' + f'time {batch_time.val:.4f} ({batch_time.avg:.4f})\t' + f'loss {loss_meter.val:.4f} ({loss_meter.avg:.4f})\t' + f'grad_norm {norm_meter.val:.4f} ({norm_meter.avg:.4f})\t' + f'mem {memory_used:.0f}MB') + epoch_time = time.time() - start + logger.info(f"EPOCH {epoch} training takes {datetime.timedelta(seconds=int(epoch_time))}") + + +@torch.no_grad() +def validate(config, data_loader, model): + criterion = torch.nn.CrossEntropyLoss() + model.eval() + + batch_time = AverageMeter() + loss_meter = AverageMeter() + acc1_meter = AverageMeter() + acc5_meter = AverageMeter() + + end = time.time() + for idx, (images, target) in enumerate(data_loader): + images = images.cuda(non_blocking=True) + target = target.cuda(non_blocking=True) + + # compute output + output = model(images) + + # measure accuracy and record loss + loss = criterion(output, target) + acc1, acc5 = accuracy(output, target, topk=(1, 5)) + + acc1 = reduce_tensor(acc1) + acc5 = reduce_tensor(acc5) + loss = reduce_tensor(loss) + + loss_meter.update(loss.item(), target.size(0)) + acc1_meter.update(acc1.item(), target.size(0)) + acc5_meter.update(acc5.item(), target.size(0)) + + # measure elapsed time + batch_time.update(time.time() - end) + end = time.time() + + if idx % config.PRINT_FREQ == 0: + memory_used = torch.cuda.max_memory_allocated() / (1024.0 * 1024.0) + logger.info( + f'Test: [{idx}/{len(data_loader)}]\t' + f'Time {batch_time.val:.3f} ({batch_time.avg:.3f})\t' + f'Loss {loss_meter.val:.4f} ({loss_meter.avg:.4f})\t' + f'Acc@1 {acc1_meter.val:.3f} ({acc1_meter.avg:.3f})\t' + f'Acc@5 {acc5_meter.val:.3f} ({acc5_meter.avg:.3f})\t' + f'Mem {memory_used:.0f}MB') + logger.info(f' * Acc@1 {acc1_meter.avg:.3f} Acc@5 {acc5_meter.avg:.3f}') + return acc1_meter.avg, acc5_meter.avg, loss_meter.avg + + +@torch.no_grad() +def throughput(data_loader, model, logger): + model.eval() + + for idx, (images, _) in enumerate(data_loader): + images = images.cuda(non_blocking=True) + batch_size = images.shape[0] + for i in range(50): + model(images) + torch.cuda.synchronize() + logger.info(f"throughput averaged with 30 times") + tic1 = time.time() + for i in range(30): + model(images) + torch.cuda.synchronize() + tic2 = time.time() + logger.info(f"batch_size {batch_size} throughput {30 * batch_size / (tic2 - tic1)}") + return + + +if __name__ == '__main__': + args, config = parse_option() + + if config.AMP_OPT_LEVEL != "O0": + assert amp is not None, "amp not installed!" + + if 'RANK' in os.environ and 'WORLD_SIZE' in os.environ: + rank = int(os.environ["RANK"]) + world_size = int(os.environ['WORLD_SIZE']) + print(f"RANK and WORLD_SIZE in environ: {rank}/{world_size}") + else: + rank = -1 + world_size = -1 + torch.cuda.set_device(config.LOCAL_RANK) + torch.distributed.init_process_group(backend='nccl', init_method='env://', world_size=world_size, rank=rank) + torch.distributed.barrier() + + seed = config.SEED + dist.get_rank() + torch.manual_seed(seed) + np.random.seed(seed) + cudnn.benchmark = True + + # linear scale the learning rate according to total batch size, may not be optimal + linear_scaled_lr = config.TRAIN.BASE_LR * config.DATA.BATCH_SIZE * dist.get_world_size() / 512.0 + linear_scaled_warmup_lr = args.qat_lr * config.DATA.BATCH_SIZE * dist.get_world_size() / 512.0 + linear_scaled_min_lr = config.TRAIN.MIN_LR * config.DATA.BATCH_SIZE * dist.get_world_size() / 512.0 + # gradient accumulation also need to scale the learning rate + if config.TRAIN.ACCUMULATION_STEPS > 1: + linear_scaled_lr = linear_scaled_lr * config.TRAIN.ACCUMULATION_STEPS + linear_scaled_warmup_lr = linear_scaled_warmup_lr * config.TRAIN.ACCUMULATION_STEPS + linear_scaled_min_lr = linear_scaled_min_lr * config.TRAIN.ACCUMULATION_STEPS + config.defrost() + config.TRAIN.BASE_LR = linear_scaled_lr + config.TRAIN.WARMUP_LR = linear_scaled_warmup_lr + config.TRAIN.EPOCHS = args.num_epochs + config.TRAIN.MIN_LR = linear_scaled_min_lr + config.freeze() + + os.makedirs(config.OUTPUT, exist_ok=True) + logger = create_logger(output_dir=config.OUTPUT, dist_rank=dist.get_rank(), name=f"{config.MODEL.NAME}") + + if dist.get_rank() == 0: + path = os.path.join(config.OUTPUT, "config.json") + with open(path, "w") as f: + f.write(config.dump()) + logger.info(f"Full config saved to {path}") + + # print config + #logger.info(config.dump()) + + main(config, args) diff --git a/examples/pytorch/swin/Swin-Transformer-Quantization/models.py b/examples/pytorch/swin/Swin-Transformer-Quantization/models.py new file mode 100644 index 000000000..e859ce02c --- /dev/null +++ b/examples/pytorch/swin/Swin-Transformer-Quantization/models.py @@ -0,0 +1,811 @@ +# -------------------------------------------------------- +# Swin Transformer +# Copyright (c) 2021 Microsoft +# Licensed under The MIT License [see LICENSE for details] +# Written by Ze Liu +# -------------------------------------------------------- +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +from numpy import short +import torch +import torch.nn as nn +import torch.utils.checkpoint as checkpoint +from torch.nn.parameter import Parameter +import torch.nn.functional as F +import torch.nn.init as init +import sys +import math +from timm.models.layers import DropPath, to_2tuple, trunc_normal_ + +def build_model(config): + model_type = config.MODEL.TYPE + if model_type == 'swin': + model = SwinTransformer(img_size=config.DATA.IMG_SIZE, + patch_size=config.MODEL.SWIN.PATCH_SIZE, + in_chans=config.MODEL.SWIN.IN_CHANS, + num_classes=config.MODEL.NUM_CLASSES, + embed_dim=config.MODEL.SWIN.EMBED_DIM, + depths=config.MODEL.SWIN.DEPTHS, + num_heads=config.MODEL.SWIN.NUM_HEADS, + window_size=config.MODEL.SWIN.WINDOW_SIZE, + mlp_ratio=config.MODEL.SWIN.MLP_RATIO, + qkv_bias=config.MODEL.SWIN.QKV_BIAS, + qk_scale=config.MODEL.SWIN.QK_SCALE, + drop_rate=config.MODEL.DROP_RATE, + drop_path_rate=config.MODEL.DROP_PATH_RATE, + ape=config.MODEL.SWIN.APE, + patch_norm=config.MODEL.SWIN.PATCH_NORM, + use_checkpoint=config.TRAIN.USE_CHECKPOINT) + else: + raise NotImplementedError(f"Unkown model: {model_type}") + + return model + +QUANT = True +if QUANT: + from pytorch_quantization.nn import QuantLinear, TensorQuantizer + +def gelu(x): + return x * 0.5 * (1.0 + torch.erf(x / 1.41421)) + +#used only for triton inference +def bias_gelu(bias, y): + x = bias + y + return x * 0.5 * (1.0 + torch.erf(x / 1.41421)) + +# used specifically for training since torch.nn.functional.gelu breaks ONNX export +def bias_gelu_training(bias, y): + x = bias + y + return torch.nn.functional.gelu(x) # Breaks ONNX export + +def bias_tanh(bias, y): + x = bias + y + return torch.tanh(x) + +def swish(x): + return x * torch.sigmoid(x) + +def bias_noact(bias, y): + return bias + y + +#torch.nn.functional.gelu(x) # Breaks ONNX export +ACT2FN = {"gelu": gelu, "bias_gelu": bias_gelu, "bias_tanh": bias_tanh, "relu": torch.nn.functional.relu, "swish": swish, + "bias_noact": bias_noact} + +class QuantizedConv2d(nn.Module): + r"""Conv2d with INT8 quantization + """ + __constants__ = ['bias'] + + def __init__(self, in_channel, out_channel, kernel_size, stride, bias=True): + super(QuantizedConv2d, self).__init__() + self.in_channel = in_channel + self.out_channel = out_channel + self.kernel_size = kernel_size + self.stride = stride + self.weight = Parameter(torch.Tensor(out_channel, in_channel, *kernel_size)) + if bias: + self.bias = Parameter(torch.Tensor(out_channel, 1, 1)) + else: + self.register_parameter('bias', None) + + self._input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self._weight_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_weight) + self._aftergemm_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + + self.reset_parameters() + + def reset_parameters(self): + init.kaiming_normal_(self.weight, a=math.sqrt(5)) + if self.bias is not None: + fan_in, _ = init._calculate_fan_in_and_fan_out(self.weight) + bound = 1 / math.sqrt(fan_in) + init.uniform_(self.bias, -bound, bound) + + def forward(self, input): + input = self._input_quantizer(input) + weight = self._weight_quantizer(self.weight) + output = self._aftergemm_quantizer(F.conv2d(input, weight, bias=None, stride=self.stride)) + if self.bias is None: + return output + else: + return self.bias + output + +class LinearActivation(nn.Module): + r"""Fused Linear and Activation Module. + """ + __constants__ = ['bias'] + + def __init__(self, in_features, out_features, act='gelu', bias=True, do_quant=True): + super(LinearActivation, self).__init__() + self.in_features = in_features + self.out_features = out_features + self.act_fn = nn.Identity() + self.biased_act_fn = None + + if isinstance(act, str) or (sys.version_info[0] == 2 and isinstance(act, unicode)): + if bias and not 'bias' in act: + act = 'bias_' + act + self.biased_act_fn = ACT2FN[act] + else: + self.act_fn = ACT2FN[act] + else: + self.act_fn = act + + self.weight = Parameter(torch.Tensor(out_features, in_features)) + if bias: + self.bias = Parameter(torch.Tensor(out_features)) + else: + self.register_parameter('bias', None) + + self.do_quant = do_quant + if QUANT and do_quant: + self._input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self._weight_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_weight) + self._aftergemm_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + + self.reset_parameters() + + def reset_parameters(self): + init.kaiming_normal_(self.weight, a=math.sqrt(5)) + if self.bias is not None: + fan_in, _ = init._calculate_fan_in_and_fan_out(self.weight) + bound = 1 / math.sqrt(fan_in) + init.uniform_(self.bias, -bound, bound) + + def forward(self, input): + if QUANT and self.do_quant: + input = self._input_quantizer(input) + weight = self._weight_quantizer(self.weight) + else: + weight = self.weight + + if not self.bias is None: + if QUANT and self.do_quant: + return self.biased_act_fn(self.bias, self._aftergemm_quantizer(F.linear(input, weight, None))) + else: + return self.biased_act_fn(self.bias, F.linear(input, weight, None)) + else: + if QUANT and self.do_quant: + return self.act_fn(self._aftergemm_quantizer(F.linear(input, weight, self.bias))) + else: + return self.act_fn(F.linear(input, weight, None)) + + def extra_repr(self) -> str: + return 'in_features={}, out_features={}, bias={}'.format( + self.in_features, self.out_features, self.bias is not None + ) + +class Mlp(nn.Module): + def __init__(self, in_features, hidden_features=None, out_features=None, act_layer=nn.GELU, drop=0.): + super().__init__() + out_features = out_features or in_features + hidden_features = hidden_features or in_features + self.fc1 = LinearActivation(in_features, hidden_features, act='noact') + self.act = act_layer() + self.fc2 = LinearActivation(hidden_features, out_features, act='noact') + self.drop = nn.Dropout(drop) + + def forward(self, x): + x = self.fc1(x) + x = self.act(x) + x = self.drop(x) + x = self.fc2(x) + x = self.drop(x) + return x + + +def window_partition(x, window_size): + """ + Args: + x: (B, H, W, C) + window_size (int): window size + + Returns: + windows: (num_windows*B, window_size, window_size, C) + """ + B, H, W, C = x.shape + x = x.view(B, H // window_size, window_size, W // window_size, window_size, C) + windows = x.permute(0, 1, 3, 2, 4, 5).contiguous().view(-1, window_size, window_size, C) + return windows + + +def window_reverse(windows, window_size, H, W): + """ + Args: + windows: (num_windows*B, window_size, window_size, C) + window_size (int): Window size + H (int): Height of image + W (int): Width of image + + Returns: + x: (B, H, W, C) + """ + B = int(windows.shape[0] / (H * W / window_size / window_size)) + x = windows.view(B, H // window_size, W // window_size, window_size, window_size, -1) + x = x.permute(0, 1, 3, 2, 4, 5).contiguous().view(B, H, W, -1) + return x + + +class WindowAttention(nn.Module): + r""" Window based multi-head self attention (W-MSA) module with relative position bias. + It supports both of shifted and non-shifted window. + + Args: + dim (int): Number of input channels. + window_size (tuple[int]): The height and width of the window. + num_heads (int): Number of attention heads. + qkv_bias (bool, optional): If True, add a learnable bias to query, key, value. Default: True + qk_scale (float | None, optional): Override default qk scale of head_dim ** -0.5 if set + attn_drop (float, optional): Dropout ratio of attention weight. Default: 0.0 + proj_drop (float, optional): Dropout ratio of output. Default: 0.0 + """ + + def __init__(self, dim, window_size, num_heads, qkv_bias=True, qk_scale=None, attn_drop=0., proj_drop=0.): + + super().__init__() + self.dim = dim + self.window_size = window_size # Wh, Ww + self.num_heads = num_heads + head_dim = dim // num_heads + self.scale = qk_scale or head_dim ** -0.5 + + # define a parameter table of relative position bias + self.relative_position_bias_table = nn.Parameter( + torch.zeros((2 * window_size[0] - 1) * (2 * window_size[1] - 1), num_heads)) # 2*Wh-1 * 2*Ww-1, nH + + # get pair-wise relative position index for each token inside the window + coords_h = torch.arange(self.window_size[0]) + coords_w = torch.arange(self.window_size[1]) + coords = torch.stack(torch.meshgrid([coords_h, coords_w])) # 2, Wh, Ww + coords_flatten = torch.flatten(coords, 1) # 2, Wh*Ww + relative_coords = coords_flatten[:, :, None] - coords_flatten[:, None, :] # 2, Wh*Ww, Wh*Ww + relative_coords = relative_coords.permute(1, 2, 0).contiguous() # Wh*Ww, Wh*Ww, 2 + relative_coords[:, :, 0] += self.window_size[0] - 1 # shift to start from 0 + relative_coords[:, :, 1] += self.window_size[1] - 1 + relative_coords[:, :, 0] *= 2 * self.window_size[1] - 1 + relative_position_index = relative_coords.sum(-1) # Wh*Ww, Wh*Ww + self.register_buffer("relative_position_index", relative_position_index) + + self.qkv = LinearActivation(dim, dim * 3, act='noact', do_quant=True) + self.attn_drop = nn.Dropout(attn_drop) + self.proj = LinearActivation(dim, dim, act='noact', do_quant=True) + self.proj_drop = nn.Dropout(proj_drop) + + trunc_normal_(self.relative_position_bias_table, std=.02) + self.softmax = nn.Softmax(dim=-1) + + if QUANT: + self.matmul_q_input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self.matmul_k_input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self.matmul_v_input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self.matmul_a_input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self.softmax_input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + + def forward(self, x, mask=None): + """ + Args: + x: input features with shape of (num_windows*B, N, C) + mask: (0/-inf) mask with shape of (num_windows, Wh*Ww, Wh*Ww) or None + """ + B_, N, C = x.shape + qkv = self.qkv(x).reshape(B_, N, 3, self.num_heads, C // self.num_heads).permute(2, 0, 3, 1, 4) + q, k, v = qkv[0], qkv[1], qkv[2] # make torchscript happy (cannot use tensor as tuple) + + # Take the dot product between "query" and "key" to get the raw attention score + if QUANT: + attn = torch.matmul(self.matmul_q_input_quantizer(q), self.matmul_k_input_quantizer(k.transpose(-2, -1))) + attn = self.scale * self.softmax_input_quantizer(attn) + else: + attn = self.scale * torch.matmul(q, k.transpose(-2, -1)) + relative_position_bias = self.relative_position_bias_table[self.relative_position_index.view(-1)].view( + self.window_size[0] * self.window_size[1], self.window_size[0] * self.window_size[1], -1) # Wh*Ww,Wh*Ww,nH + relative_position_bias = relative_position_bias.permute(2, 0, 1).contiguous() # nH, Wh*Ww, Wh*Ww + attn = attn + relative_position_bias.unsqueeze(0) + + if mask is not None: + nW = mask.shape[0] + attn = attn.view(B_ // nW, nW, self.num_heads, N, N) + mask.unsqueeze(1).unsqueeze(0) + attn = attn.view(-1, self.num_heads, N, N) + attn = self.softmax(attn) + else: + attn = self.softmax(attn) + + attn = self.attn_drop(attn) + + if QUANT: + context_layer = torch.matmul(self.matmul_a_input_quantizer(attn), + self.matmul_v_input_quantizer(v)) + else: + context_layer = torch.matmul(attn, v) + + x = context_layer.transpose(1, 2).reshape(B_, N, C) + # x_int8 = self.proj._input_quantizer(x) * 127.0 / self.proj._input_quantizer._amax + # print(x_int8.round()[0, 0, 0:32]) + x = self.proj(x) + x = self.proj_drop(x) + return x + + def extra_repr(self) -> str: + return f'dim={self.dim}, window_size={self.window_size}, num_heads={self.num_heads}' + + def flops(self, N): + # calculate flops for 1 window with token length of N + flops = 0 + # qkv = self.qkv(x) + flops += N * self.dim * 3 * self.dim + # attn = (q @ k.transpose(-2, -1)) + flops += self.num_heads * N * (self.dim // self.num_heads) * N + # x = (attn @ v) + flops += self.num_heads * N * N * (self.dim // self.num_heads) + # x = self.proj(x) + flops += N * self.dim * self.dim + return flops + + +class SwinTransformerBlock(nn.Module): + r""" Swin Transformer Block. + + Args: + dim (int): Number of input channels. + input_resolution (tuple[int]): Input resulotion. + num_heads (int): Number of attention heads. + window_size (int): Window size. + shift_size (int): Shift size for SW-MSA. + mlp_ratio (float): Ratio of mlp hidden dim to embedding dim. + qkv_bias (bool, optional): If True, add a learnable bias to query, key, value. Default: True + qk_scale (float | None, optional): Override default qk scale of head_dim ** -0.5 if set. + drop (float, optional): Dropout rate. Default: 0.0 + attn_drop (float, optional): Attention dropout rate. Default: 0.0 + drop_path (float, optional): Stochastic depth rate. Default: 0.0 + act_layer (nn.Module, optional): Activation layer. Default: nn.GELU + norm_layer (nn.Module, optional): Normalization layer. Default: nn.LayerNorm + """ + + def __init__(self, dim, input_resolution, num_heads, window_size=7, shift_size=0, + mlp_ratio=4., qkv_bias=True, qk_scale=None, drop=0., attn_drop=0., drop_path=0., + act_layer=nn.GELU, norm_layer=nn.LayerNorm): + super().__init__() + self.dim = dim + self.input_resolution = input_resolution + self.num_heads = num_heads + self.window_size = window_size + self.shift_size = shift_size + self.mlp_ratio = mlp_ratio + if min(self.input_resolution) <= self.window_size: + # if window size is larger than input resolution, we don't partition windows + self.shift_size = 0 + self.window_size = min(self.input_resolution) + assert 0 <= self.shift_size < self.window_size, "shift_size must in 0-window_size" + + self.norm1 = norm_layer(dim) + self.attn = WindowAttention( + dim, window_size=to_2tuple(self.window_size), num_heads=num_heads, + qkv_bias=qkv_bias, qk_scale=qk_scale, attn_drop=attn_drop, proj_drop=drop) + + self.drop_path = DropPath(drop_path) if drop_path > 0. else nn.Identity() + self.norm2 = norm_layer(dim) + mlp_hidden_dim = int(dim * mlp_ratio) + self.mlp = Mlp(in_features=dim, hidden_features=mlp_hidden_dim, act_layer=act_layer, drop=drop) + + if self.shift_size > 0: + # calculate attention mask for SW-MSA + H, W = self.input_resolution + img_mask = torch.zeros((1, H, W, 1)) # 1 H W 1 + h_slices = (slice(0, -self.window_size), + slice(-self.window_size, -self.shift_size), + slice(-self.shift_size, None)) + w_slices = (slice(0, -self.window_size), + slice(-self.window_size, -self.shift_size), + slice(-self.shift_size, None)) + cnt = 0 + for h in h_slices: + for w in w_slices: + img_mask[:, h, w, :] = cnt + cnt += 1 + + mask_windows = window_partition(img_mask, self.window_size) # nW, window_size, window_size, 1 + mask_windows = mask_windows.view(-1, self.window_size * self.window_size) + attn_mask = mask_windows.unsqueeze(1) - mask_windows.unsqueeze(2) + attn_mask = attn_mask.masked_fill(attn_mask != 0, float(-100.0)).masked_fill(attn_mask == 0, float(0.0)) + else: + attn_mask = None + + self.register_buffer("attn_mask", attn_mask) + + if QUANT: + self.layernorm_input1_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self.add1_local_input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self.add1_residual_input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self.layernorm_input2_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self.add2_local_input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self.add2_residual_input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + + def forward(self, x): + H, W = self.input_resolution + B, L, C = x.shape + assert L == H * W, "input feature has wrong size" + + shortcut = x + if QUANT: + x = self.norm1(self.layernorm_input1_quantizer(x)) + else: + x = self.norm1(x) + x = x.view(B, H, W, C) + + # cyclic shift + if self.shift_size > 0: + shifted_x = torch.roll(x, shifts=(-self.shift_size, -self.shift_size), dims=(1, 2)) + else: + shifted_x = x + + # partition windows + x_windows = window_partition(shifted_x, self.window_size) # nW*B, window_size, window_size, C + x_windows = x_windows.view(-1, self.window_size * self.window_size, C) # nW*B, window_size*window_size, C + + # W-MSA/SW-MSA + attn_windows = self.attn(x_windows, mask=self.attn_mask) # nW*B, window_size*window_size, C + + # merge windows + attn_windows = attn_windows.view(-1, self.window_size, self.window_size, C) + shifted_x = window_reverse(attn_windows, self.window_size, H, W) # B H' W' C + + # reverse cyclic shift + if self.shift_size > 0: + x = torch.roll(shifted_x, shifts=(self.shift_size, self.shift_size), dims=(1, 2)) + else: + x = shifted_x + x = x.view(B, H * W, C) + + # FFN + if QUANT: + add1_local = self.add1_local_input_quantizer(self.drop_path(x)) + add1_residual = self.add1_residual_input_quantizer(shortcut) + x = add1_local + add1_residual + + # Save output of Part 1 as residual + shortcut2 = x + # Part 2 + ## LayerNorm2 + x = self.norm2(self.layernorm_input2_quantizer(x)) + ## 2-layer MLP + x = self.drop_path(self.mlp(x)) + ## Add residual + add2_local = self.add2_local_input_quantizer(x) + add2_residual = self.add2_residual_input_quantizer(shortcut2) + x = add2_local + add2_residual + + else: + x = shortcut + self.drop_path(x) + x = x + self.drop_path(self.mlp(self.norm2(x))) + return x + + def extra_repr(self) -> str: + return f"dim={self.dim}, input_resolution={self.input_resolution}, num_heads={self.num_heads}, " \ + f"window_size={self.window_size}, shift_size={self.shift_size}, mlp_ratio={self.mlp_ratio}" + + def flops(self): + flops = 0 + H, W = self.input_resolution + # norm1 + flops += self.dim * H * W + # W-MSA/SW-MSA + nW = H * W / self.window_size / self.window_size + flops += nW * self.attn.flops(self.window_size * self.window_size) + # mlp + flops += 2 * H * W * self.dim * self.dim * self.mlp_ratio + # norm2 + flops += self.dim * H * W + return flops + + +class PatchMerging(nn.Module): + r""" Patch Merging Layer. + + Args: + input_resolution (tuple[int]): Resolution of input feature. + dim (int): Number of input channels. + norm_layer (nn.Module, optional): Normalization layer. Default: nn.LayerNorm + """ + + def __init__(self, input_resolution, dim, norm_layer=nn.LayerNorm): + super().__init__() + self.input_resolution = input_resolution + self.dim = dim + self.reduction = LinearActivation(4 * dim, 2 * dim, act=nn.Identity(), bias=False, do_quant=True) + self.norm = norm_layer(4 * dim) + + def forward(self, x): + """ + x: B, H*W, C + """ + H, W = self.input_resolution + B, L, C = x.shape + assert L == H * W, "input feature has wrong size" + assert H % 2 == 0 and W % 2 == 0, f"x size ({H}*{W}) are not even." + + x = x.view(B, H, W, C) + + x0 = x[:, 0::2, 0::2, :] # B H/2 W/2 C + x1 = x[:, 1::2, 0::2, :] # B H/2 W/2 C + x2 = x[:, 0::2, 1::2, :] # B H/2 W/2 C + x3 = x[:, 1::2, 1::2, :] # B H/2 W/2 C + x = torch.cat([x0, x1, x2, x3], -1) # B H/2 W/2 4*C + x = x.view(B, -1, 4 * C) # B H/2*W/2 4*C + + x = self.norm(x) + x = self.reduction(x) + + return x + + def extra_repr(self) -> str: + return f"input_resolution={self.input_resolution}, dim={self.dim}" + + def flops(self): + H, W = self.input_resolution + flops = H * W * self.dim + flops += (H // 2) * (W // 2) * 4 * self.dim * 2 * self.dim + return flops + + +class BasicLayer(nn.Module): + """ A basic Swin Transformer layer for one stage. + + Args: + dim (int): Number of input channels. + input_resolution (tuple[int]): Input resolution. + depth (int): Number of blocks. + num_heads (int): Number of attention heads. + window_size (int): Local window size. + mlp_ratio (float): Ratio of mlp hidden dim to embedding dim. + qkv_bias (bool, optional): If True, add a learnable bias to query, key, value. Default: True + qk_scale (float | None, optional): Override default qk scale of head_dim ** -0.5 if set. + drop (float, optional): Dropout rate. Default: 0.0 + attn_drop (float, optional): Attention dropout rate. Default: 0.0 + drop_path (float | tuple[float], optional): Stochastic depth rate. Default: 0.0 + norm_layer (nn.Module, optional): Normalization layer. Default: nn.LayerNorm + downsample (nn.Module | None, optional): Downsample layer at the end of the layer. Default: None + use_checkpoint (bool): Whether to use checkpointing to save memory. Default: False. + """ + + def __init__(self, dim, input_resolution, depth, num_heads, window_size, + mlp_ratio=4., qkv_bias=True, qk_scale=None, drop=0., attn_drop=0., + drop_path=0., norm_layer=nn.LayerNorm, downsample=None, use_checkpoint=False): + + super().__init__() + self.dim = dim + self.input_resolution = input_resolution + self.depth = depth + self.use_checkpoint = use_checkpoint + + # build blocks + self.blocks = nn.ModuleList([ + SwinTransformerBlock(dim=dim, input_resolution=input_resolution, + num_heads=num_heads, window_size=window_size, + shift_size=0 if (i % 2 == 0) else window_size // 2, + mlp_ratio=mlp_ratio, + qkv_bias=qkv_bias, qk_scale=qk_scale, + drop=drop, attn_drop=attn_drop, + drop_path=drop_path[i] if isinstance(drop_path, list) else drop_path, + norm_layer=norm_layer) + for i in range(depth)]) + + # patch merging layer + if downsample is not None: + self.downsample = downsample(input_resolution, dim=dim, norm_layer=norm_layer) + else: + self.downsample = None + + def forward(self, x): + for blk in self.blocks: + if self.use_checkpoint: + x = checkpoint.checkpoint(blk, x) + else: + x = blk(x) + if self.downsample is not None: + x = self.downsample(x) + return x + + def extra_repr(self) -> str: + return f"dim={self.dim}, input_resolution={self.input_resolution}, depth={self.depth}" + + def flops(self): + flops = 0 + for blk in self.blocks: + flops += blk.flops() + if self.downsample is not None: + flops += self.downsample.flops() + return flops + + +class PatchEmbed(nn.Module): + r""" Image to Patch Embedding + + Args: + img_size (int): Image size. Default: 224. + patch_size (int): Patch token size. Default: 4. + in_chans (int): Number of input image channels. Default: 3. + embed_dim (int): Number of linear projection output channels. Default: 96. + norm_layer (nn.Module, optional): Normalization layer. Default: None + """ + + def __init__(self, img_size=224, patch_size=4, in_chans=3, embed_dim=96, norm_layer=None, do_quant=False): + super().__init__() + img_size = to_2tuple(img_size) + patch_size = to_2tuple(patch_size) + patches_resolution = [img_size[0] // patch_size[0], img_size[1] // patch_size[1]] + self.img_size = img_size + self.patch_size = patch_size + self.patches_resolution = patches_resolution + self.num_patches = patches_resolution[0] * patches_resolution[1] + + self.in_chans = in_chans + self.embed_dim = embed_dim + + if QUANT and do_quant: + self.proj = QuantizedConv2d(in_chans, embed_dim, patch_size, patch_size, bias=True) + else: + self.proj = nn.Conv2d(in_chans, embed_dim, kernel_size=patch_size, stride=patch_size) + if norm_layer is not None: + self.norm = norm_layer(embed_dim) + else: + self.norm = None + + def forward(self, x): + B, C, H, W = x.shape + # FIXME look at relaxing size constraints + assert H == self.img_size[0] and W == self.img_size[1], \ + f"Input image size ({H}*{W}) doesn't match model ({self.img_size[0]}*{self.img_size[1]})." + x = self.proj(x).flatten(2).transpose(1, 2) # B Ph*Pw C + if self.norm is not None: + x = self.norm(x) + return x + + def flops(self): + Ho, Wo = self.patches_resolution + flops = Ho * Wo * self.embed_dim * self.in_chans * (self.patch_size[0] * self.patch_size[1]) + if self.norm is not None: + flops += Ho * Wo * self.embed_dim + return flops + + +class SwinTransformer(nn.Module): + r""" Swin Transformer + A PyTorch impl of : `Swin Transformer: Hierarchical Vision Transformer using Shifted Windows` - + https://arxiv.org/pdf/2103.14030 + + Args: + img_size (int | tuple(int)): Input image size. Default 224 + patch_size (int | tuple(int)): Patch size. Default: 4 + in_chans (int): Number of input image channels. Default: 3 + num_classes (int): Number of classes for classification head. Default: 1000 + embed_dim (int): Patch embedding dimension. Default: 96 + depths (tuple(int)): Depth of each Swin Transformer layer. + num_heads (tuple(int)): Number of attention heads in different layers. + window_size (int): Window size. Default: 7 + mlp_ratio (float): Ratio of mlp hidden dim to embedding dim. Default: 4 + qkv_bias (bool): If True, add a learnable bias to query, key, value. Default: True + qk_scale (float): Override default qk scale of head_dim ** -0.5 if set. Default: None + drop_rate (float): Dropout rate. Default: 0 + attn_drop_rate (float): Attention dropout rate. Default: 0 + drop_path_rate (float): Stochastic depth rate. Default: 0.1 + norm_layer (nn.Module): Normalization layer. Default: nn.LayerNorm. + ape (bool): If True, add absolute position embedding to the patch embedding. Default: False + patch_norm (bool): If True, add normalization after patch embedding. Default: True + use_checkpoint (bool): Whether to use checkpointing to save memory. Default: False + """ + + def __init__(self, img_size=224, patch_size=4, in_chans=3, num_classes=1000, + embed_dim=96, depths=[2, 2, 6, 2], num_heads=[3, 6, 12, 24], + window_size=7, mlp_ratio=4., qkv_bias=True, qk_scale=None, + drop_rate=0., attn_drop_rate=0., drop_path_rate=0.1, + norm_layer=nn.LayerNorm, ape=False, patch_norm=True, + use_checkpoint=False, **kwargs): + super().__init__() + + self.num_classes = num_classes + self.num_layers = len(depths) + self.embed_dim = embed_dim + self.ape = ape + self.patch_norm = patch_norm + self.num_features = int(embed_dim * 2 ** (self.num_layers - 1)) + self.mlp_ratio = mlp_ratio + + # split image into non-overlapping patches + self.patch_embed = PatchEmbed( + img_size=img_size, patch_size=patch_size, in_chans=in_chans, embed_dim=embed_dim, + norm_layer=norm_layer if self.patch_norm else None) + num_patches = self.patch_embed.num_patches + patches_resolution = self.patch_embed.patches_resolution + self.patches_resolution = patches_resolution + + # absolute position embedding + if self.ape: + self.absolute_pos_embed = nn.Parameter(torch.zeros(1, num_patches, embed_dim)) + trunc_normal_(self.absolute_pos_embed, std=.02) + + self.pos_drop = nn.Dropout(p=drop_rate) + + # stochastic depth + dpr = [x.item() for x in torch.linspace(0, drop_path_rate, sum(depths))] # stochastic depth decay rule + + # build layers + self.layers = nn.ModuleList() + for i_layer in range(self.num_layers): + layer = BasicLayer(dim=int(embed_dim * 2 ** i_layer), + input_resolution=(patches_resolution[0] // (2 ** i_layer), + patches_resolution[1] // (2 ** i_layer)), + depth=depths[i_layer], + num_heads=num_heads[i_layer], + window_size=window_size, + mlp_ratio=self.mlp_ratio, + qkv_bias=qkv_bias, qk_scale=qk_scale, + drop=drop_rate, attn_drop=attn_drop_rate, + drop_path=dpr[sum(depths[:i_layer]):sum(depths[:i_layer + 1])], + norm_layer=norm_layer, + downsample=PatchMerging if (i_layer < self.num_layers - 1) else None, + use_checkpoint=use_checkpoint) + self.layers.append(layer) + + self.norm = norm_layer(self.num_features) + self.avgpool = nn.AdaptiveAvgPool1d(1) + self.head = nn.Linear(self.num_features, num_classes) if num_classes > 0 else nn.Identity() + + self.apply(self._init_weights) + + def _init_weights(self, m): + if isinstance(m, nn.Linear): + trunc_normal_(m.weight, std=.02) + if isinstance(m, nn.Linear) and m.bias is not None: + nn.init.constant_(m.bias, 0) + elif isinstance(m, nn.LayerNorm): + nn.init.constant_(m.bias, 0) + nn.init.constant_(m.weight, 1.0) + + @torch.jit.ignore + def no_weight_decay(self): + return {'absolute_pos_embed'} + + @torch.jit.ignore + def no_weight_decay_keywords(self): + return {'relative_position_bias_table'} + + def forward_features(self, x): + x = self.patch_embed(x) + if self.ape: + x = x + self.absolute_pos_embed + x = self.pos_drop(x) + + for layer in self.layers: + x = layer(x) + + x = self.norm(x) # B L C + x = self.avgpool(x.transpose(1, 2)) # B C 1 + x = torch.flatten(x, 1) + return x + + def forward(self, x): + x = self.forward_features(x) + x = self.head(x) + return x + + def flops(self): + flops = 0 + flops += self.patch_embed.flops() + for i, layer in enumerate(self.layers): + flops += layer.flops() + flops += self.num_features * self.patches_resolution[0] * self.patches_resolution[1] // (2 ** self.num_layers) + flops += self.num_features * self.num_classes + return flops diff --git a/examples/pytorch/swin/Swin-Transformer-Quantization/qat.sh b/examples/pytorch/swin/Swin-Transformer-Quantization/qat.sh new file mode 100644 index 000000000..ba599ea2f --- /dev/null +++ b/examples/pytorch/swin/Swin-Transformer-Quantization/qat.sh @@ -0,0 +1,14 @@ +python -m torch.distributed.launch \ + --nproc_per_node 1 --master_port 12346 main.py \ + --train \ + --cfg SwinTransformer/configs/swin_tiny_patch4_window7_224.yaml \ + --resume ./calib-checkpoint/swin_tiny_patch4_window7_224_calib.pth \ + --data-path /data/datasets/ILSVRC2012 \ + --quant-mode ft2 \ + --teacher swin_tiny_patch4_window7_224.pth \ + --output qat-output \ + --distill \ + --int8-mode 1\ + --batch-size 32\ + --num-epochs 3 \ + --qat-lr 1e-5 diff --git a/examples/pytorch/swin/Swin-Transformer-Quantization/quant_utils.py b/examples/pytorch/swin/Swin-Transformer-Quantization/quant_utils.py new file mode 100644 index 000000000..6fa82e77f --- /dev/null +++ b/examples/pytorch/swin/Swin-Transformer-Quantization/quant_utils.py @@ -0,0 +1,298 @@ +# coding=utf-8 +# Copyright (c) 2019-2022 NVIDIA CORPORATION. All rights reserved. +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +"""Helper functions for training models with pytorch-quantization""" + +import pickle +import re +import time +import numpy as np +import torch +import random + +import pytorch_quantization as quantization +import pytorch_quantization.nn as quant_nn +from pytorch_quantization.tensor_quant import QuantDescriptor +from pytorch_quantization import calib + +class Logger: + def info(self, s): + print("INFO:", s) + def warn(self, s): + print("WARN:", s) +logger = Logger() + +name_width = 50 # max width of layer names +qname_width = name_width + 20 # max width of quantizer names + + +def add_arguments(parser): + """Add arguments to parser for functions defined in quant_trainer.""" + + group = parser.add_argument_group('quant_trainer arguments') + group.add_argument('--wprec', type=int, default=8, + help='weight precision') + group.add_argument('--aprec', type=int, default=8, + help='activation precision') + group.add_argument('--quant-per-tensor', action='store_true', + help='per tensor weight scaling') + group.add_argument('--quant-disable', action='store_true', + help='disable all quantizers') + group.add_argument('--quant-disable-keyword', type=str, nargs='+', + help='disable quantizers by keyword') + group.add_argument('--calibrator', default='percentile', + help='which quantization range calibrator to use') + group.add_argument('--percentile', default=99.99, type=float, + help='percentile for PercentileCalibrator') + group.add_argument('--fuse-qkv', action='store_true', + help='use the same scale factor for qkv') + group.add_argument('--narrow-range', action='store_true', + help='use [-127, 127] range for activations rather than [-128, 127]') + group.add_argument('--quant-mode', type=str, default="ft2", + help='predefined quantization mode, choices: ["ft1", "ft2", "ft3", "trt"]') + + +def set_args(args): + if args.quant_mode == 'ft1': + args.wprec = 8 + args.aprec = 8 + args.quant_per_tensor = False + args.quant_disable = False + args.quant_disable_keyword = ['final_input', 'layernorm_input', 'softmax_input', 'residual_input', 'local_input', 'aftergemm'] + args.fuse_qkv = False + args.narrow_range = False + elif args.quant_mode == 'ft2': + args.wprec = 8 + args.aprec = 8 + args.quant_per_tensor = True + args.quant_disable = False + args.quant_disable_keyword = ['final_input', 'layernorm_input', 'softmax_input', 'local_input', 'residual_input'] + # '[2n]._aftergemm'] + if args.int8_mode == 2: + args.quant_disable_keyword.append('[2n]._aftergemm') + args.fuse_qkv = True + args.narrow_range = False + elif args.quant_mode == 'ft3': + args.wprec = 8 + args.aprec = 8 + args.quant_per_tensor = True + args.quant_disable = False + args.quant_disable_keyword = ['final_input', 'layernorm_input', 'local_input'] + args.fuse_qkv = True + args.narrow_range = False + elif args.quant_mode == 'trt': + # for demobert + args.wprec = 8 + args.aprec = 8 + args.quant_per_tensor = True + args.quant_disable = False + args.quant_disable_keyword = ['layernorm_input', 'softmax_input', 'aftergemm'] + args.fuse_qkv = True + args.narrow_range = False + else: + raise ValueError("wrong argument value for 'quant_mode'") + return args + +def set_default_quantizers(args): + """Set default quantizers before creating the model.""" + + if args.calibrator == 'max': + calib_method = 'max' + elif args.calibrator == 'percentile': + if args.percentile is None: + raise ValueError('Specify --percentile when using percentile calibrator') + calib_method = 'histogram' + elif args.calibrator == 'mse': + calib_method = 'histogram' + elif args.calibrator == 'entropy': + calib_method = 'histogram' + else: + raise ValueError(F'Invalid calibrator {args.calibrator}') + + input_desc = QuantDescriptor(num_bits=args.aprec, + calib_method=calib_method, + narrow_range=args.narrow_range, + ) + weight_desc = QuantDescriptor(num_bits=args.wprec, + axis=(None if args.quant_per_tensor else (0,)), + ) + quant_nn.QuantLinear.set_default_quant_desc_input(input_desc) + quant_nn.QuantLinear.set_default_quant_desc_weight(weight_desc) + + +def configure_model(model, args, calib=False): + """Function called before the training loop.""" + + logger.info('Configuring Model for Quantization') + logger.info(F'using quantization package {quantization.__file__}') + + if not calib: + if args.quant_disable: + set_quantizer_by_name(model, [''], _disabled=True) + + if args.quant_disable_keyword: + set_quantizer_by_name(model, args.quant_disable_keyword, _disabled=True) + + #if args.fuse_qkv: + # fuse_qkv(model, args) + + # if args.local_rank in [-1, 0] and not calib: + # print_quant_summary(model) + # time.sleep(1) # prevent eval printing overlap + print('Configure calib={}'.format(str(calib))) + #exit(0) + + +def enable_calibration(model): + """Enable calibration of all *_input_quantizer modules in model.""" + + logger.info("Enabling Calibration") + for name, module in model.named_modules(): + if name.endswith("_quantizer"): + if module._calibrator is not None: + module.disable_quant() + module.enable_calib() + else: + module.disable() + logger.info(F"{name:{qname_width}}: {module}") + +def finish_calibration(model, args): + """Disable calibration and load amax for all "*_input_quantizer modules in model.""" + + logger.info("Loading calibrated amax") + for name, module in model.named_modules(): + if name.endswith("_quantizer"): + if module._calibrator is not None: + if isinstance(module._calibrator, calib.MaxCalibrator): + module.load_calib_amax() + elif args.calibrator == "percentile": + module.load_calib_amax("percentile", percentile=args.percentile) + else: + module.load_calib_amax(args.calibrator) + module.enable_quant() + module.disable_calib() + else: + module.enable() + if args.fuse_qkv: + fuse_qkv(model, args) + model.cuda() + print_quant_summary(model) + + +def fuse_qkv(model, args): + """Adjust quantization ranges to match an implementation where the QKV projections are implemented with a single GEMM. + Force the weight and output scale factors to match by taking the max of (Q,K,V). + """ + + def fuse3(qq, qk, qv): + if not hasattr(qq, '_amax') or not hasattr(qk, '_amax') or not hasattr(qv, '_amax'): + logger.warn('missing amax buffer, unable to fuse') + return + q = qq._amax.detach().item() + k = qk._amax.detach().item() + v = qv._amax.detach().item() + + amax = max(q, k, v) + qq._amax.fill_(amax) + qk._amax.fill_(amax) + qv._amax.fill_(amax) + logger.info(f' q={q:7.4f} k={k:7.4f} v={v:7.4f} -> {amax:7.4f}') + + for name, mod in model.named_modules(): + if name.endswith('.attention.self'): + logger.info(f'FUSE_QKV: {name:{name_width}}') + fuse3(mod.matmul_q_input_quantizer, mod.matmul_k_input_quantizer, mod.matmul_v_input_quantizer) + fuse3(mod.query._weight_quantizer, mod.key._weight_quantizer, mod.value._weight_quantizer) + fuse3(mod.query._aftergemm_quantizer, mod.key._aftergemm_quantizer, mod.value._aftergemm_quantizer) + + +def print_quant_summary(model): + """Print summary of all quantizer modules in the model.""" + + counters = {'quantizers': 0, 'enabled_quantizers': 0, + 'weights': 0, 'quant_weights': 0, 'sparse_weights': 0, + 'params': 0, 'sparse_params': 0} + for name, mod in model.named_modules(): + if isinstance(mod, quantization.nn.TensorQuantizer): + print(f'{name:80} {mod}') + counters['quantizers'] += 1 + if not mod._disabled: + counters['enabled_quantizers'] += 1 + + for pname, param in mod.named_parameters(): + if '.' in pname: + continue + counters['params'] += param.numel() + # fullname = f'{name}.{pname}' + # print(f'{fullname:80} {param.numel():12}') + weight_quantizer = getattr(mod, '_weight_quantizer', None) + if pname == 'weight': + counters['weights'] += param.numel() + if weight_quantizer is not None and not weight_quantizer._disabled: + counters['quant_weights'] += param.numel() + counters['sparse_weights'] += param.eq(0).sum().item() + counters['sparse_params'] += param.eq(0).sum().item() + + def print_fraction(a, b, counters, desc): + va = counters[a] + vb = counters[b] + pct = va/vb * 100 if vb != 0 else float('NaN') + print(f'{counters[a]:12}/{vb:12} ({pct:6.2f}%) {desc}') + print_fraction('enabled_quantizers', 'quantizers', counters, 'TensorQuantizers enabled') + print_fraction('quant_weights', 'weights', counters, 'Quantized weights') + print_fraction('sparse_weights', 'weights', counters, 'Zero weights') + print_fraction('weights', 'params', counters, 'Weight parameters') + print('\n\n') + + +def set_quantizer(name, mod, quantizer, k ,v): + """Set attributes for mod.quantizer.""" + + quantizer_mod = getattr(mod, quantizer, None) + if quantizer_mod is not None: + assert hasattr(quantizer_mod, k) + setattr(quantizer_mod, k, v) + else: + logger.warn(f'{name} has no {quantizer}') + + +def set_quantizers(name, mod, which='both', **kwargs): + """Set quantizer attributes for mod.""" + + s = f'Warning: changing {which} quantizers of {name:{qname_width}}' + for k, v in kwargs.items(): + s += (f' {k}={v}') + if which in ['input', 'both']: + set_quantizer(name, mod, '_input_quantizer', k, v) + if which in ['weight', 'both']: + set_quantizer(name, mod, '_weight_quantizer', k, v) + # logger.info(s) + + +def set_quantizer_by_name(model, names, **kwargs): + """Set quantizer attributes for layers where name contains a substring in names.""" + + for name, mod in model.named_modules(): + if hasattr(mod, '_input_quantizer') or hasattr(mod, '_weight_quantizer'): + for n in names: + if re.search(n, name): + set_quantizers(name, mod, **kwargs) + elif name.endswith('_quantizer'): + for n in names: + if re.search(n, name): + s = f'Warning: changing {name:{name_width}}' + for k, v in kwargs.items(): + s += (f' {k}={v}') + setattr(mod, k, v) + # logger.info(s) diff --git a/examples/pytorch/swin/Swin-Transformer-Quantization/run.sh b/examples/pytorch/swin/Swin-Transformer-Quantization/run.sh new file mode 100644 index 000000000..c667df126 --- /dev/null +++ b/examples/pytorch/swin/Swin-Transformer-Quantization/run.sh @@ -0,0 +1,10 @@ +python -m torch.distributed.launch \ + --nproc_per_node 1 \ + --master_port 12346 main.py \ + --eval \ + --cfg SwinTransformer/configs/swin_tiny_patch4_window7_224.yaml \ + --resume ./calib-checkpoint/swin_tiny_patch4_window7_224_calib.pth \ + --data-path /data/datasets/ILSVRC2012/ \ + --quant-mode ft2\ + --int8-mode 1\ + --batch-size 128 diff --git a/examples/pytorch/swin/SwinTransformerINT8Weight.py b/examples/pytorch/swin/SwinTransformerINT8Weight.py new file mode 100644 index 000000000..76e83c3d4 --- /dev/null +++ b/examples/pytorch/swin/SwinTransformerINT8Weight.py @@ -0,0 +1,136 @@ +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import torch +from checkpoint_quantization import extract_amaxlist + + +class SwinTransformerINT8Weight(object): + def __init__(self, layer_num, window_size, depths, num_heads, ths_path, weights=None, int8=True): + """weights need be a state_dict of swin transformer model""" + block_weight_suffixes = ['attn.qkv.weight', + 'attn.qkv.bias', + 'attn.proj.weight', + 'attn.proj.bias', + 'mlp.fc1.weight', + 'mlp.fc1.bias', + 'mlp.fc2.weight', + 'mlp.fc2.bias', + 'norm1.weight', + 'norm1.bias', + 'norm2.weight', + 'norm2.bias', + 'amaxList', + 'h_amaxList'] + layer_weight_suffixes = ['downsample.norm.weight', + 'downsample.norm.bias', + 'downsample.reduction.weight'] + sw_weight_suffixes = ['patch_embed.proj.weight', + 'patch_embed.proj.bias', + 'patch_embed.norm.weight', + 'patch_embed.norm.bias', + 'norm.weight', + 'norm.bias'] + self.layer_num = layer_num + self.depths = depths + self.weights = [] + self.int8 = int8 + torch.classes.load_library(ths_path) + gen_relative_pos_bias = torch.ops.fastertransformer.gen_relative_pos_bias + if weights is None: + print("[ERROR][SwinTransformerWeights::__init__] weights should not be empty!") + exit(-1) + + # print(weights.keys()) + if self.int8: + if 'layers.0.blocks.0.attn.qkv._input_quantizer._amax' not in weights.keys(): + raise RuntimeError("There is no quantization node in the checkpoint, cannot be quantized to int8.") + for k, v in weights.items(): + if k.endswith('bias') or k.endswith('weight'): + weights[k] = v.half() + else: + weights[k] = v.cpu() + weights = extract_amaxlist(weights, depths, ths_path=ths_path, verbose=False) + h_scale_list = {} + for k, v in weights.items(): + if "amaxList" in k: + k_h = k.replace("amaxList", "h_amaxList") + h_scale_list[k_h] = v + weights[k] = v.cuda() + for k, v in h_scale_list.items(): + weights[k] = v + else: + for idx, v in enumerate(self.weights): + weights[idx] = v.cuda() + + self._generated_weights = False + #loop over layers + for layer_idx in range(layer_num): + ##loop over blocks + for block_idx in range(depths[layer_idx]): + ###block_weight_suffixes + for block_weight_suffix in block_weight_suffixes: + weight_name = 'layers.{}.blocks.{}.{}'.format(layer_idx, block_idx, block_weight_suffix) + if weight_name in weights: + self.weights.append(weights[weight_name]) + else: + print("[ERROR][SwinTransformerWeights::__init__] missing weight {}.".format(weight_name)) + exit(-1) + ###get relative position bias + index_name = 'layers.{}.blocks.{}.attn.relative_position_index'.format(layer_idx, block_idx) + table_name = 'layers.{}.blocks.{}.attn.relative_position_bias_table'.format(layer_idx, block_idx) + if index_name in weights and table_name in weights: + relative_position_bias = gen_relative_pos_bias(weights[table_name], weights[index_name], window_size, num_heads[layer_idx]) + self.weights.append(relative_position_bias.half()) + else: + print("[ERROR][SwinTransformerWeights::__init__] missing weight {} or {}.".format(index_name, table_name)) + exit(-1) + ##deal with layer weights + ###loop over layer_weight_suffixes + for layer_weight_suffix in layer_weight_suffixes: + weight_name = 'layers.{}.{}'.format(layer_idx, layer_weight_suffix) + if weight_name in weights: + self.weights.append(weights[weight_name]) + else: + ####the last layer do not have downsample weight + if layer_idx == layer_num - 1: + self.weights.append(torch.Tensor()) + else: + print("[ERROR][SwinTransformerWeights::__init__] missing weight {}.".format(weight_name)) + exit(-1) + ###get attn_mask (same for each layer, some layer may not has one) + attn_mask_name = 'layers.{}.blocks.1.attn_mask'.format(layer_idx) + if attn_mask_name in weights: + self.weights.append(weights[attn_mask_name].half()) + else: + self.weights.append(torch.HalfTensor()) + #deal with sw weights + for sw_weight_suffix in sw_weight_suffixes: + weight_name = sw_weight_suffix + if weight_name in weights: + self.weights.append(weights[weight_name]) + else: + print("[ERROR][SwinTransformerWeights::__init__] missing weight {}.".format(weight_name)) + exit(-1) + # for w in self.weights: + # print(w.type()) + + + def to_half(self): + if self.int8: + return + for idx, v in enumerate(self.weights): + self.weights[idx] = v.half() + + diff --git a/examples/pytorch/swin/SwinTransformerWeightTransposeQKVWeight.py b/examples/pytorch/swin/SwinTransformerWeightTransposeQKVWeight.py new file mode 100644 index 000000000..1acafc551 --- /dev/null +++ b/examples/pytorch/swin/SwinTransformerWeightTransposeQKVWeight.py @@ -0,0 +1,122 @@ +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import torch +import math + +class SwinTransformerWeightTransposeQKVWeight(object): + def __init__(self, layer_num, window_size, depths, num_heads, ths_path, weights=None): + """weights need be a state_dict of swin transformer model""" + block_weight_suffixes = ['attn.qkv.weight', + 'attn.qkv.bias', + 'attn.proj.weight', + 'attn.proj.bias', + 'mlp.fc1.weight', + 'mlp.fc1.bias', + 'mlp.fc2.weight', + 'mlp.fc2.bias', + 'norm1.weight', + 'norm1.bias', + 'norm2.weight', + 'norm2.bias'] + layer_weight_suffixes = ['downsample.norm.weight', + 'downsample.norm.bias', + 'downsample.reduction.weight'] + sw_weight_suffixes = ['patch_embed.proj.weight', + 'patch_embed.proj.bias', + 'patch_embed.norm.weight', + 'patch_embed.norm.bias', + 'norm.weight', + 'norm.bias'] + self.layer_num = layer_num + self.depths = depths + self.weights = [] + torch.classes.load_library(ths_path) + gen_relative_pos_bias = torch.ops.fastertransformer.gen_relative_pos_bias + if weights is None: + print("[ERROR][SwinTransformerWeights::__init__] weights should not be empty!") + exit(-1) + else: + self._generated_weights = False + #loop over layers + for layer_idx in range(layer_num): + ##loop over blocks + for block_idx in range(depths[layer_idx]): + ###block_weight_suffixes + for block_weight_suffix in block_weight_suffixes: + weight_name = 'layers.{}.blocks.{}.{}'.format(layer_idx, block_idx, block_weight_suffix) + if weight_name in weights: + #transpose qkv weight [3*head*size, k] --> [k, head*3*size] + if "attn.qkv.weight" in weight_name: + shape = weights[weight_name].shape + #in case we flatten this weight + if len(shape) == 1: + dim = int(math.sqrt(shape[0]/3)) + weights[weight_name] = weights[weight_name].reshape([3*dim, dim]) + shape = weights[weight_name].shape + weights[weight_name] = weights[weight_name].reshape([3, num_heads[layer_idx], int(shape[0]/3/num_heads[layer_idx]), -1]).permute(3, 1, 0, 2).reshape(shape[1], -1) + #transpose qkv bias + if "attn.qkv.bias" in weight_name: + shape = weights[weight_name].shape + weights[weight_name] = weights[weight_name].reshape([3, num_heads[layer_idx], int(shape[0]/3/num_heads[layer_idx])]).permute(1, 0, 2).reshape(-1) + self.weights.append(weights[weight_name]) + else: + print("[ERROR][SwinTransformerWeights::__init__] missing weight {}.".format(weight_name)) + exit(-1) + ###get relative position bias + index_name = 'layers.{}.blocks.{}.attn.relative_position_index'.format(layer_idx, block_idx) + table_name = 'layers.{}.blocks.{}.attn.relative_position_bias_table'.format(layer_idx, block_idx) + if index_name in weights and table_name in weights: + relative_position_bias = gen_relative_pos_bias(weights[table_name], weights[index_name], window_size, num_heads[layer_idx]) + self.weights.append(relative_position_bias) + else: + print("[ERROR][SwinTransformerWeights::__init__] missing weight {} or {}.".format(index_name, table_name)) + exit(-1) + ##deal with layer weights + ###loop over layer_weight_suffixes + for layer_weight_suffix in layer_weight_suffixes: + weight_name = 'layers.{}.{}'.format(layer_idx, layer_weight_suffix) + if weight_name in weights: + self.weights.append(weights[weight_name]) + else: + ####the last layer has not dowmsample weight + if layer_idx == layer_num - 1: + self.weights.append(torch.Tensor()) + else: + print("[ERROR][SwinTransformerWeights::__init__] missing weight {}.".format(weight_name)) + exit(-1) + ###get attn_mask (same for each layer, some layer may not has one) + attn_mask_name = 'layers.{}.blocks.1.attn_mask'.format(layer_idx) + if attn_mask_name in weights: + self.weights.append(weights[attn_mask_name]) + else: + self.weights.append(torch.Tensor()) + #deal with sw weights + for sw_weight_suffix in sw_weight_suffixes: + weight_name = '{}'.format(sw_weight_suffix) + if weight_name in weights: + self.weights.append(weights[weight_name]) + else: + print("[ERROR][SwinTransformerWeights::__init__] missing weight {}.".format(weight_name)) + exit(-1) + + + def to_cuda(self): + for idx, v in enumerate(self.weights): + self.weights[idx] = v.cuda() + + def to_half(self): + for idx, v in enumerate(self.weights): + self.weights[idx] = v.half() + diff --git a/examples/pytorch/swin/checkpoint_quantization.py b/examples/pytorch/swin/checkpoint_quantization.py new file mode 100644 index 000000000..bc56ca67c --- /dev/null +++ b/examples/pytorch/swin/checkpoint_quantization.py @@ -0,0 +1,219 @@ +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import sys +import argparse +import re +import numpy as np +import torch + +ACTIVATION_AMAX_NUM = 72 +INT8O_KERNEL_NUM = 5 +INT8O_GEMM_NUM = 7 +TRT_FUSED_MHA_AMAX_NUM = 3 +SCALE_RESERVE_NUM = 8 + +def extract_amaxlist(init_dict, depths, ths_path='../lib/libpyt_swintransformer.so', verbose=True): + # print("Quantizing checkpoint ...") + torch.classes.load_library(ths_path) + weight_quantize = torch.ops.fastertransformer.swin_weight_quantize + + layer_num = len(depths) + + amaxTotalNum = ACTIVATION_AMAX_NUM + INT8O_KERNEL_NUM + INT8O_GEMM_NUM + 1 + TRT_FUSED_MHA_AMAX_NUM + SCALE_RESERVE_NUM + + kernel_name_list = ["attn.qkv", + "attn.proj", + "mlp.fc1", + "mlp.fc2"] + + amax_name_list = ["attn.qkv._input_quantizer", + "attn.qkv._aftergemm_quantizer", + "attn.proj._input_quantizer", + "attn.proj._aftergemm_quantizer", + "attn.matmul_q_input_quantizer", + "attn.matmul_k_input_quantizer", + "attn.matmul_v_input_quantizer", + "attn.matmul_a_input_quantizer", + "attn.softmax_input_quantizer", + "mlp.fc1._input_quantizer", + "mlp.fc1._aftergemm_quantizer", + "mlp.fc2._input_quantizer", + "mlp.fc2._aftergemm_quantizer", + "add1_residual_input_quantizer", + "add2_residual_input_quantizer" + ] + + int8O_gemm_weight_amax_list = [0 for i in range(INT8O_GEMM_NUM)] + int8O_gemm_weight_list = ["attn.qkv", + "attn.proj", + "mlp.fc1", + "mlp.fc2", + "attn.matmul_k_input_quantizer", + "attn.matmul_v_input_quantizer"] + + int8O_gemm_input_amax_list = [0 for i in range(INT8O_GEMM_NUM)] + int8O_gemm_input_list = ["attn.qkv._input_quantizer", + "attn.proj._input_quantizer", + "mlp.fc1._input_quantizer", + "mlp.fc2._input_quantizer", + "attn.matmul_q_input_quantizer", + "attn.matmul_a_input_quantizer"] + + int8O_gemm_output_amax_list = [0 for i in range(INT8O_GEMM_NUM)] + int8O_gemm_output_list = ["attn.qkv._aftergemm_quantizer", + "attn.proj._aftergemm_quantizer", + "mlp.fc1._aftergemm_quantizer", + "mlp.fc2._aftergemm_quantizer", + "attn.softmax_input_quantizer", + "attn.proj._input_quantizer"] + + downsample_input = "downsample.reduction._input_quantizer" + downsample_weight = "downsample.reduction._weight_quantizer" + downsample_out = "downsample.reduction._aftergemm_quantizer" + + factor = 1000000.0 + for i in range(layer_num): + for depth in range(depths[i]): + amaxList = np.zeros([amaxTotalNum]).astype(np.float32) + amax_id = 0 + for amax_name in amax_name_list: + quant_max = init_dict["layers.{}.blocks.{}.{}._amax".format(i, depth, amax_name)].item() + amax = abs(quant_max)#round(abs(quant_max)*factor)/factor + if amax_name in int8O_gemm_input_list: + int8O_gemm_input_amax_list[int8O_gemm_input_list.index(amax_name)] = amax + if amax_name in int8O_gemm_output_list: + int8O_gemm_output_amax_list[int8O_gemm_output_list.index(amax_name)] = amax + if amax_name in int8O_gemm_weight_list: + int8O_gemm_weight_amax_list[int8O_gemm_weight_list.index(amax_name)] = amax + amaxList[amax_id] = amax + amax_id += 1 + amaxList[amax_id] = amax/127.0 + amax_id += 1 + amaxList[amax_id] = amax/127.0/127.0 + amax_id += 1 + amaxList[amax_id] = 127.0/amax + amax_id += 1 + # if verbose: + # print(i, amax_name) + # print('quant_max:', quant_max) + # print('amax:', amax) + if i != layer_num - 1: + amax = init_dict["layers.{}.{}._amax".format(i, downsample_input)].item() + amaxList[amax_id] = amax + amax_id += 1 + amaxList[amax_id] = amax/127.0 + amax_id += 1 + amaxList[amax_id] = amax/127.0/127.0 + amax_id += 1 + amaxList[amax_id] = 127.0/amax + amax_id += 1 + amax = init_dict["layers.{}.{}._amax".format(i, downsample_out)].item() + amaxList[amax_id] = amax + amax_id += 1 + amaxList[amax_id] = amax/127.0 + amax_id += 1 + amaxList[amax_id] = amax/127.0/127.0 + amax_id += 1 + amaxList[amax_id] = 127.0/amax + amax_id += 1 + else: + amax_id += 8 + if verbose: + print("done process layer_{} block_{} activation amax".format(i, depth)) + + #kernel amax starts from ACTIVATION_AMAX_NUM + assert amax_id == 68 + amax_id = ACTIVATION_AMAX_NUM + for kernel_id, kernel_name in enumerate(kernel_name_list): + kernel = init_dict["layers.{}.blocks.{}.{}.weight".format(i, depth, kernel_name)].transpose(-1, -2).contiguous() + quant_max2 = init_dict["layers.{}.blocks.{}.{}._weight_quantizer._amax".format(i, depth, kernel_name)] + amax2 = abs(quant_max2) + # if (amax2.dim() == 0): + # quant_max_processed = torch.full((kernel.size(1),), amax2.item(), dtype=amax2.dtype, device=amax2.device) + # else: + # quant_max_processed = amax2.view(-1) + kernel_processed = weight_quantize(kernel, amax2.cuda()) + init_dict["layers.{}.blocks.{}.{}.weight".format(i, depth, kernel_name)] = kernel_processed + if kernel_name in int8O_gemm_weight_list: + int8O_gemm_weight_amax_list[int8O_gemm_weight_list.index(kernel_name)] = amax2.item() + amaxList[amax_id] = amax2 + amax_id += 1 + # if verbose: + # print(i, kernel_name) + # print('kernel:', kernel) + # print('quant_max2:', quant_max2) + # print('quant_max_processed_:', quant_max_processed) + if i != layer_num - 1: + amaxList[amax_id] = init_dict["layers.{}.downsample.reduction._weight_quantizer._amax".format(i)].item() + amax_id += 1 + + assert amax_id == ACTIVATION_AMAX_NUM + INT8O_KERNEL_NUM + #for int8O gemm deQuant + for j in range(INT8O_GEMM_NUM - 1): + amaxList[amax_id] = (int8O_gemm_input_amax_list[j]*int8O_gemm_weight_amax_list[j])/(127.0*int8O_gemm_output_amax_list[j]) + + # print('layernum:', i, 'j:', j, ' gemm_int8IO_scale:',amaxList[amax_id]) + # print(int8O_gemm_input_amax_list[j], int8O_gemm_weight_amax_list[j], int8O_gemm_output_amax_list[j]) + amax_id += 1 + + if i != layer_num - 1: + patchMerge_i = init_dict["layers.{}.{}._amax".format(i, downsample_input)].item() + patchMerge_w = init_dict["layers.{}.{}._amax".format(i, downsample_weight)].item() + patchMerge_o = init_dict["layers.{}.{}._amax".format(i, downsample_out)].item() + amaxList[amax_id] = (patchMerge_i * patchMerge_w) / (127 * patchMerge_o) + amax_id += 1 + assert amax_id == ACTIVATION_AMAX_NUM + INT8O_KERNEL_NUM + INT8O_GEMM_NUM + + amax_id += 1 + #for trt fused MHA amax + #### QKV_addBias_amax + # amaxList[amax_id] = np.maximum(np.maximum(amaxList[16],amaxList[20]), amaxList[24]) + # amax_id += 1 + # #### softmax amax + # amaxList[amax_id] = amaxList[28] + # amax_id += 1 + # #### bmm2 amax + # amaxList[amax_id] = amaxList[8] + # amax_id += 1 + qkvMax = np.maximum(np.maximum(amaxList[16],amaxList[20]), amaxList[24]) + amaxList[amax_id] = amaxList[16] * amaxList[20] / (127.0 * 127.0) + amax_id += 1 + amaxList[amax_id] = 127.0 / amaxList[28] + amax_id += 1 + amaxList[amax_id] = amaxList[24] * amaxList[28] / (127.0 * amaxList[8]) + amax_id += 1 + + init_dict["layers.{}.blocks.{}.amaxList".format(i, depth)] = torch.tensor(amaxList, dtype=torch.float32) + if verbose: + print("done process layer_{} block_{} kernel weight".format(i, depth)) + + if i != layer_num - 1: + kernel = init_dict["layers.{}.downsample.reduction.weight".format(i)] + quant_max2 = init_dict["layers.{}.downsample.reduction._weight_quantizer._amax".format(i)] + amax2 = abs(quant_max2) + + kernel = kernel.transpose(-1, -2).contiguous() + kernel_processed = weight_quantize(kernel, amax2.cuda()) + + init_dict["layers.{}.downsample.reduction.weight".format(i)] = kernel_processed + + + # print("Quantizing checkpoint done.") + return init_dict + + +if __name__ == '__main__': + weights = torch.load('pytorch_model.bin') + extract_amaxlist(weights, [2, 2, 6, 2]) \ No newline at end of file diff --git a/examples/pytorch/swin/infer_swintransformer_int8_op.py b/examples/pytorch/swin/infer_swintransformer_int8_op.py new file mode 100644 index 000000000..7fda392ed --- /dev/null +++ b/examples/pytorch/swin/infer_swintransformer_int8_op.py @@ -0,0 +1,461 @@ +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import os +import time +import argparse +import datetime +import numpy as np + +import torch +import torch.backends.cudnn as cudnn +import torch.distributed as dist + +from timm.loss import LabelSmoothingCrossEntropy, SoftTargetCrossEntropy +from timm.utils import accuracy, AverageMeter +from tqdm import tqdm + +from torch._C import _nvtx + +import sys +sys.path.insert(0, "./Swin-Transformer-Quantization") + +# from config_modified_int8 import get_config +from SwinTransformer.config import get_config +from models import build_model +from data import build_val_loader +from SwinTransformer.optimizer import build_optimizer +from SwinTransformer.logger import create_logger +from SwinTransformer.utils import load_checkpoint, save_checkpoint, get_grad_norm, auto_resume_helper, reduce_tensor +from SwinTransformerINT8Weight import SwinTransformerINT8Weight +import quant_utils + +def saveToTxt(x, name, clean=False): + if clean : + with open("tmp2/"+name, 'w+') as fout: + xx = x.reshape([-1]) + for i in xx: + fout.write("{}\n".format(i)) + else: + with open("tmp2/"+name, 'a+') as fout: + shape = x.shape + fout.write("{}\n".format(len(shape))) + fout.write(" ".join([str(s) for s in shape])+"\n") + xx = x.reshape([-1]) + for i in xx: + fout.write("{}\n".format(i)) + + +try: + # noinspection PyUnresolvedReferences + from apex import amp +except ImportError: + amp = None + + +def parse_option(): + parser = argparse.ArgumentParser('Swin Transformer training and evaluation script', add_help=False) + parser.add_argument('--cfg', type=str, required=True, metavar="FILE", help='path to config file', ) + parser.add_argument( + "--opts", + help="Modify config options by adding 'KEY VALUE' pairs. ", + default=None, + nargs='+', + ) + + # easy config modification + parser.add_argument('--th-path', type=str, help='path to pytorch library') + parser.add_argument('--batch-size', type=int, default=32, help="batch size for single GPU") + parser.add_argument('--data-path', type=str, help='path to dataset') + parser.add_argument('--zip', action='store_true', help='use zipped dataset instead of folder dataset') + parser.add_argument('--cache-mode', type=str, default='part', choices=['no', 'full', 'part'], + help='no: no cache, ' + 'full: cache all data, ' + 'part: sharding the dataset into nonoverlapping pieces and only cache one piece') + parser.add_argument('--pretrained', + help='pretrained weight from checkpoint, could be imagenet22k pretrained weight') + parser.add_argument('--resume', help='resume from checkpoint') + parser.add_argument('--accumulation-steps', type=int, help="gradient accumulation steps") + parser.add_argument('--use-checkpoint', action='store_true', + help="whether to use gradient checkpointing to save memory") + parser.add_argument('--amp-opt-level', type=str, default='O1', choices=['O0', 'O1', 'O2'], + help='mixed precision opt level, if O0, no amp is used') + parser.add_argument('--output', default='output', type=str, metavar='PATH', + help='root of output folder, the full path is // (default: output)') + parser.add_argument('--tag', help='tag of experiment') + parser.add_argument('--profile', action='store_true', help='Perform profiling only, with some random data') + parser.add_argument('--eval', action='store_true', help='Perform evaluation only') + parser.add_argument('--throughput', action='store_true', help='Test throughput only') + parser.add_argument('--calib', action='store_true', help='Perform calibration only') + parser.add_argument('--train', action='store_true', help='Perform training only') + parser.add_argument('--int8-mode', type=int, help='int8 mode', choices=[1, 2]) + parser.add_argument('--num-calib-batch', type=int, default=4, help='Number of batches for calibration. 0 will disable calibration.') + # distributed training + parser.add_argument("--local_rank", type=int, default=0, help='local rank for DistributedDataParallel') + quant_utils.add_arguments(parser) + args, unparsed = parser.parse_known_args() + if args.quant_mode is not None: + args = quant_utils.set_args(args) + quant_utils.set_default_quantizers(args) + + config = get_config(args) + + return args, config + + +def main(args, config): + + + + logger.info(f"Creating model:{config.MODEL.TYPE}/{config.MODEL.NAME}") + model = build_model(config) + model.cuda() + # logger.info(str(model)) + # quant_utils.print_quant_summary(model) + + optimizer = build_optimizer(config, model) + if config.AMP_OPT_LEVEL != "O0": + model, optimizer = amp.initialize(model, optimizer, opt_level=config.AMP_OPT_LEVEL) + # model = torch.nn.parallel.DistributedDataParallel(model, device_ids=[config.LOCAL_RANK], broadcast_buffers=False) + model_without_ddp = model + + n_parameters = sum(p.numel() for p in model.parameters() if p.requires_grad) + logger.info(f"number of params: {n_parameters}") + if hasattr(model_without_ddp, 'flops'): + flops = model_without_ddp.flops() + logger.info(f"number of GFLOPs: {flops / 1e9}") + ''' + lr_scheduler = build_scheduler(config, optimizer, len(data_loader_train)) + + if config.AUG.MIXUP > 0.: + # smoothing is handled with mixup label transform + criterion = SoftTargetCrossEntropy() + elif config.MODEL.LABEL_SMOOTHING > 0.: + criterion = LabelSmoothingCrossEntropy(smoothing=config.MODEL.LABEL_SMOOTHING) + else: + criterion = torch.nn.CrossEntropyLoss() + + max_accuracy = 0.0 + + if config.TRAIN.AUTO_RESUME: + resume_file = auto_resume_helper(config.OUTPUT) + if resume_file: + if config.MODEL.RESUME: + logger.warning(f"auto-resume changing resume file from {config.MODEL.RESUME} to {resume_file}") + config.defrost() + config.MODEL.RESUME = resume_file + config.freeze() + logger.info(f'auto resuming from {resume_file}') + else: + logger.info(f'no checkpoint found in {config.OUTPUT}, ignoring auto resume') + ''' + lr_scheduler = None + if config.MODEL.RESUME: + # max_accuracy = load_checkpoint(config, model_without_ddp, optimizer, lr_scheduler, logger) + checkpoint = torch.load(config.MODEL.RESUME, map_location='cpu') + msg = model_without_ddp.load_state_dict(checkpoint['model'] if 'model' in checkpoint.keys() else checkpoint, strict=False) + logger.info(msg) + del checkpoint + + if args.profile: + quant_utils.configure_model(model, args, calib=False) + validate_with_random_data(config, args, model_without_ddp) + return + + if args.eval: + dataset_val, data_loader_val = build_val_loader(config) + quant_utils.configure_model(model, args, calib=False) + # validate_with_random_data(config, model_without_ddp) + acc1, acc5, loss = validate(config, args, data_loader_val, model_without_ddp) + logger.info(f"Accuracy of resumed network on the {len(dataset_val)} test images: {acc1:.1f}%") + return + + +@torch.no_grad() +def validate(config, args, data_loader, model): + criterion = torch.nn.CrossEntropyLoss() + model.eval() + + batch_time = AverageMeter() + loss_meter = AverageMeter() + acc1_meter = AverageMeter() + acc5_meter = AverageMeter() + + th_path = args.th_path + depths = config.MODEL.SWIN.DEPTHS + depths_tensor = torch.tensor(depths, dtype=torch.int) + num_heads = config.MODEL.SWIN.NUM_HEADS + num_heads_tensor = torch.tensor(num_heads, dtype=torch.int) + layer_num = len(depths) + window_size = config.MODEL.SWIN.WINDOW_SIZE + max_batch = config.DATA.BATCH_SIZE + img_size = config.DATA.IMG_SIZE + patch_size = config.MODEL.SWIN.PATCH_SIZE + in_chans = config.MODEL.SWIN.IN_CHANS + embed_dim = config.MODEL.SWIN.EMBED_DIM + ape = config.MODEL.SWIN.APE + patch_norm = config.MODEL.SWIN.PATCH_NORM + mlp_ratio = config.MODEL.SWIN.MLP_RATIO + qkv_bias = config.MODEL.SWIN.QKV_BIAS + int8_mode = args.int8_mode + if config.MODEL.SWIN.QK_SCALE is not None: + qk_scale = config.MODEL.SWIN.QK_SCALE + else: + qk_scale = 1.0 + sw_weights = SwinTransformerINT8Weight(layer_num, window_size, depths, num_heads, th_path, model.state_dict()) + # sw_weights.to_half() + # sw_weights.to_cuda() + torch.classes.load_library(th_path) + try: + swin_transformer = torch.classes.SwinTransformerINT8.Class(sw_weights.weights, int8_mode, depths_tensor, num_heads_tensor, max_batch, img_size, patch_size, in_chans, embed_dim, window_size, ape, patch_norm, layer_num, mlp_ratio, qkv_bias, qk_scale) + except: + # legacy ths for 20.03 image + swin_transformer = torch.classes.SwinTransformerINT8Class(sw_weights.weights, int8_mode, depths_tensor, num_heads_tensor, max_batch, img_size, patch_size, in_chans, embed_dim, window_size, ape, patch_norm, layer_num, mlp_ratio, qkv_bias, qk_scale) + + end = time.time() + for idx, (images, target) in enumerate(data_loader): + images_half = torch.tensor(images, dtype=torch.half) + images_half = images_half.cuda(non_blocking=True) + images = images.cuda(non_blocking=True) + target = target.cuda(non_blocking=True) + + # compute output + # output_th = model(images) + swin_tansformer_output = swin_transformer.forward(images_half) + output = model.head(swin_tansformer_output) + # diff = output - output_th + # print(diff.mean(), diff.max(), diff.min()) + + # measure accuracy and record loss + loss = criterion(output, target) + acc1, acc5 = accuracy(output, target, topk=(1, 5)) + + loss_meter.update(loss.item(), target.size(0)) + acc1_meter.update(acc1.item(), target.size(0)) + acc5_meter.update(acc5.item(), target.size(0)) + + # measure elapsed time + batch_time.update(time.time() - end) + end = time.time() + + if idx % config.PRINT_FREQ == 0: + memory_used = torch.cuda.max_memory_allocated() / (1024.0 * 1024.0) + logger.info( + f'Test: [{idx}/{len(data_loader)}]\t' + f'Time {batch_time.val:.3f} ({batch_time.avg:.3f})\t' + f'Loss {loss_meter.val:.4f} ({loss_meter.avg:.4f})\t' + f'Acc@1 {acc1_meter.val:.3f} ({acc1_meter.avg:.3f})\t' + f'Acc@5 {acc5_meter.val:.3f} ({acc5_meter.avg:.3f})\t' + f'Mem {memory_used:.0f}MB') + logger.info(f' * Acc@1 {acc1_meter.avg:.3f} Acc@5 {acc5_meter.avg:.3f}') + return acc1_meter.avg, acc5_meter.avg, loss_meter.avg + +@torch.no_grad() +def run_swintransformernv_op(config, args, model, images, use_fp16): + th_path = args.th_path + depths = config.MODEL.SWIN.DEPTHS + depths_tensor = torch.tensor(depths, dtype=torch.int) + num_heads = config.MODEL.SWIN.NUM_HEADS + num_heads_tensor = torch.tensor(num_heads, dtype=torch.int) + layer_num = len(depths) + window_size = config.MODEL.SWIN.WINDOW_SIZE + max_batch = config.DATA.BATCH_SIZE + img_size = config.DATA.IMG_SIZE + patch_size = config.MODEL.SWIN.PATCH_SIZE + in_chans = config.MODEL.SWIN.IN_CHANS + embed_dim = config.MODEL.SWIN.EMBED_DIM + ape = config.MODEL.SWIN.APE + patch_norm = config.MODEL.SWIN.PATCH_NORM + mlp_ratio = config.MODEL.SWIN.MLP_RATIO + qkv_bias = config.MODEL.SWIN.QKV_BIAS + int8_mode = args.int8_mode + if config.MODEL.SWIN.QK_SCALE is not None: + qk_scale = config.MODEL.SWIN.QK_SCALE + else: + qk_scale = 1.0 + torch.classes.load_library(th_path) + sw_weights = SwinTransformerINT8Weight(layer_num, window_size, depths, num_heads, th_path, model.state_dict()) + # if use_fp16: + # sw_weights.to_half() + # sw_weights.to_cuda() + + ##run original swin-transformer + test_time = 100 + warmup_time = 10 + + ##run pytorch op + try: + swin_transformer = torch.classes.SwinTransformerINT8.Class(sw_weights.weights, int8_mode, depths_tensor, num_heads_tensor, max_batch, img_size, patch_size, in_chans, embed_dim, window_size, ape, patch_norm, layer_num, mlp_ratio, qkv_bias, qk_scale) + except: + # legacy ths for 20.03 image + swin_transformer = torch.classes.SwinTransformerINT8Class(sw_weights.weights, int8_mode, depths_tensor, num_heads_tensor, max_batch, img_size, patch_size, in_chans, embed_dim, window_size, ape, patch_norm, layer_num, mlp_ratio, qkv_bias, qk_scale) + + # warm up + for i in range(warmup_time): + op_embedding = swin_transformer.forward(images) + op_output = model.head(op_embedding) + + torch.cuda.synchronize() + op_begin = time.time() + + for i in range(test_time): + # print('Before {}: {} GB'.format(i, torch.cuda.max_memory_allocated()/1024/1024/1024)) + # print('Before res{}: {} GB'.format(i, torch.cuda.max_memory_reserved()/1024/1024/1024)) + _nvtx.rangePushA("op {}".format(i)) + op_embedding = swin_transformer.forward(images) + _nvtx.rangePop() + # print('After {}: {} GB'.format(i, torch.cuda.max_memory_allocated()/1024/1024/1024)) + # print('After res{}: {} GB'.format(i, torch.cuda.max_memory_reserved()/1024/1024/1024)) + # torch.cuda.empty_cache() + # op_output = model.head(op_embedding) + + torch.cuda.synchronize() + op_end = time.time() + op_output = op_output.cpu().numpy() + if use_fp16: + print("INT8 op time : ", (op_end - op_begin)/test_time*1000.0, "ms") + else: + print("INT8 op time : ", (op_end - op_begin)/test_time*1000.0, "ms") + + return op_output + + +@torch.no_grad() +def validate_with_random_data(config, args, model): + model.eval() + + + max_batch = config.DATA.BATCH_SIZE + img_size = config.DATA.IMG_SIZE + in_chans = config.MODEL.SWIN.IN_CHANS + image = np.random.rand(1, in_chans, img_size, img_size) + images = np.repeat(image, max_batch, axis=0) + print(images.shape) + images_half = torch.tensor(images, dtype=torch.half) + images_float = torch.tensor(images, dtype=torch.float) + images_half = images_half.cuda(non_blocking=True) + images_float = images_float.cuda(non_blocking=True) + ##run original swin-transformer + test_time = 100 + warmup_time = 10 + ''' + # warm up + for i in range(warmup_time): + output = model(images_float) + + torch_end = time.time() + for i in range(test_time): + FP32_torch_output = model(images_float) + + FP32_torch_output = FP32_torch_output.cpu().numpy() + print("FP32 input torch time : ", (time.time() - torch_end)/test_time*1000.0, "ms") + ''' + # warm up + # for i in range(warmup_time): + # output = model(images_half) + + # torch.cuda.synchronize() + # torch_start = time.time() + # for i in range(test_time): + INT8_torch_output = model(images_half) + + # torch.cuda.synchronize() + # torch_end = time.time() + INT8_torch_output = INT8_torch_output.cpu().numpy() + # print("FP16 input torch time : ", (torch_end - torch_start)/test_time*1000.0, "ms") + + ''' + diff = abs(FP32_torch_output - FP16_torch_output) + print("FP32_torch_output vs FP16_torch_output , avg diff : ", diff.mean(), "max diff : ", diff.max()) + ''' + + ## run pytorch op + INT8_op_output = run_swintransformernv_op(config, args, model, images_half, True) + # diff_int8 = abs(INT8_op_output[0, :] - INT8_op_output[1, :]) + # print("diff between instance 0 and 1:", diff_int8.mean()) + diff = abs(INT8_torch_output - INT8_op_output) + print("INT8_torch_output vs INT8_op_output , avg diff : ", diff.mean((1)), "max diff : ", diff.max((1))) + + + +@torch.no_grad() +def throughput(data_loader, model, logger): + model.eval() + + for idx, (images, _) in enumerate(data_loader): + images = images.cuda(non_blocking=True) + batch_size = images.shape[0] + for i in range(50): + model(images) + torch.cuda.synchronize() + logger.info(f"throughput averaged with 30 times") + tic1 = time.time() + for i in range(30): + model(images) + torch.cuda.synchronize() + tic2 = time.time() + logger.info(f"batch_size {batch_size} throughput {30 * batch_size / (tic2 - tic1)}") + return + + +if __name__ == '__main__': + args, config = parse_option() + + if config.AMP_OPT_LEVEL != "O0": + assert amp is not None, "amp not installed!" + + if 'RANK' in os.environ and 'WORLD_SIZE' in os.environ: + rank = int(os.environ["RANK"]) + world_size = int(os.environ['WORLD_SIZE']) + print(f"RANK and WORLD_SIZE in environ: {rank}/{world_size}") + else: + rank = -1 + world_size = -1 + # torch.cuda.set_device(config.LOCAL_RANK) + # torch.distributed.init_process_group(backend='nccl', init_method='env://', world_size=world_size, rank=rank) + # torch.distributed.barrier() + + seed = config.SEED + torch.manual_seed(seed) + np.random.seed(seed) + cudnn.benchmark = True + + # linear scale the learning rate according to total batch size, may not be optimal + linear_scaled_lr = config.TRAIN.BASE_LR * config.DATA.BATCH_SIZE / 512.0 + linear_scaled_warmup_lr = config.TRAIN.WARMUP_LR * config.DATA.BATCH_SIZE / 512.0 + linear_scaled_min_lr = config.TRAIN.MIN_LR * config.DATA.BATCH_SIZE / 512.0 + # gradient accumulation also need to scale the learning rate + if config.TRAIN.ACCUMULATION_STEPS > 1: + linear_scaled_lr = linear_scaled_lr * config.TRAIN.ACCUMULATION_STEPS + linear_scaled_warmup_lr = linear_scaled_warmup_lr * config.TRAIN.ACCUMULATION_STEPS + linear_scaled_min_lr = linear_scaled_min_lr * config.TRAIN.ACCUMULATION_STEPS + config.defrost() + config.TRAIN.BASE_LR = linear_scaled_lr + config.TRAIN.WARMUP_LR = linear_scaled_warmup_lr + config.TRAIN.MIN_LR = linear_scaled_min_lr + config.freeze() + + os.makedirs(config.OUTPUT, exist_ok=True) + logger = create_logger(output_dir=config.OUTPUT, dist_rank=0, name=f"{config.MODEL.NAME}") + + # if dist.get_rank() == 0: + path = os.path.join(config.OUTPUT, "config.json") + with open(path, "w") as f: + f.write(config.dump()) + logger.info(f"Full config saved to {path}") + + # print config + # logger.info(config.dump()) + + main(args, config) diff --git a/examples/pytorch/swin/infer_swintransformer_op.py b/examples/pytorch/swin/infer_swintransformer_op.py new file mode 100644 index 000000000..7473b14cb --- /dev/null +++ b/examples/pytorch/swin/infer_swintransformer_op.py @@ -0,0 +1,207 @@ +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import os +import time +import argparse +import datetime +import numpy as np + +import torch +import torch.backends.cudnn as cudnn +import torch.distributed as dist + +import sys +sys.path.insert(0, "./Swin-Transformer-Quantization/SwinTransformer") + +from config import get_config +from models import build_model +from SwinTransformerWeightTransposeQKVWeight import SwinTransformerWeightTransposeQKVWeight + +#from torch._C import _nvtx + +test_time = 100 +warmup_time = 10 + +def parse_option(): + parser = argparse.ArgumentParser('Swin Transformer evaluation script', add_help=False) + parser.add_argument( + "--opts", + help="Modify config options by adding 'KEY VALUE' pairs. ", + default=None, + nargs='+', + ) + + parser.add_argument('--cfg', type=str, required=True, metavar="FILE", help='path to config file', ) + parser.add_argument('--data-path', type=str, help='path to dataset') + parser.add_argument('--zip', action='store_true', help='use zipped dataset instead of folder dataset') + parser.add_argument('--cache-mode', type=str, default='part', choices=['no', 'full', 'part'], + help='no: no cache, ' + 'full: cache all data, ' + 'part: sharding the dataset into nonoverlapping pieces and only cache one piece') + parser.add_argument('--pretrained', + help='pretrained weight from checkpoint, could be imagenet22k pretrained weight') + # easy config modification + parser.add_argument('--th-path', type=str, help='path to pytorch library') + parser.add_argument('--batch-size', type=int, default=32, help="batch size for single GPU") + parser.add_argument('--resume', help='resume from checkpoint') + parser.add_argument('--accumulation-steps', type=int, help="gradient accumulation steps") + parser.add_argument('--use-checkpoint', action='store_true', + help="whether to use gradient checkpointing to save memory") + parser.add_argument('--amp-opt-level', type=str, default='O1', choices=['O0', 'O1', 'O2'], + help='mixed precision opt level, if O0, no amp is used') + parser.add_argument('--output', default='output', type=str, metavar='PATH', + help='root of output folder, the full path is // (default: output)') + parser.add_argument('--tag', help='tag of experiment') + parser.add_argument('--eval', action='store_true', help='Perform evaluation only') + parser.add_argument('--throughput', action='store_true', help='Test throughput only') + # distributed training + parser.add_argument("--local_rank", type=int, default=0, help='local rank for DistributedDataParallel') + + args, unparsed = parser.parse_known_args() + + config = get_config(args) + + return args, config + + +def main(args, config): + + model = build_model(config) + model.cuda() + + checkpoint = torch.load(config.MODEL.RESUME, map_location='cpu') + model.load_state_dict(checkpoint['model'] if 'model' in checkpoint.keys() else checkpoint, strict=False) + validate_with_random_data(args, config, model) + +@torch.no_grad() +def run_swintransformernv_op(args, config, model, images, use_fp16): + th_path = args.th_path + depths = config.MODEL.SWIN.DEPTHS + depths_tensor = torch.tensor(depths, dtype=torch.int) + num_heads = config.MODEL.SWIN.NUM_HEADS + num_heads_tensor = torch.tensor(num_heads, dtype=torch.int) + layer_num = len(depths) + window_size = config.MODEL.SWIN.WINDOW_SIZE + max_batch = config.DATA.BATCH_SIZE + img_size = config.DATA.IMG_SIZE + patch_size = config.MODEL.SWIN.PATCH_SIZE + in_chans = config.MODEL.SWIN.IN_CHANS + embed_dim = config.MODEL.SWIN.EMBED_DIM + ape = config.MODEL.SWIN.APE + patch_norm = config.MODEL.SWIN.PATCH_NORM + mlp_ratio = config.MODEL.SWIN.MLP_RATIO + qkv_bias = config.MODEL.SWIN.QKV_BIAS + if config.MODEL.SWIN.QK_SCALE is not None: + qk_scale = config.MODEL.SWIN.QK_SCALE + else: + qk_scale = 1.0 + torch.classes.load_library(th_path) + sw_weights = SwinTransformerWeightTransposeQKVWeight(layer_num, window_size, depths, num_heads, th_path, model.state_dict()) + if use_fp16: + sw_weights.to_half() + model.half() + sw_weights.to_cuda() + + ##run pytorch op + try: + swin_transformer = torch.classes.SwinTransformer.Class(sw_weights.weights, depths_tensor, num_heads_tensor, max_batch, img_size, patch_size, in_chans, embed_dim, window_size, ape, patch_norm, layer_num, mlp_ratio, qkv_bias, qk_scale) + except: + # legacy ths for 20.03 image + swin_transformer = torch.classes.SwinTransformerClass(sw_weights.weights, depths_tensor, num_heads_tensor, max_batch, img_size, patch_size, in_chans, embed_dim, window_size, ape, patch_norm, layer_num, mlp_ratio, qkv_bias, qk_scale) + # warm up + for i in range(warmup_time): + op_embedding = swin_transformer.forward(images) + op_output = model.head(op_embedding) + + torch.cuda.synchronize() + op_begin = time.time() + #_nvtx.rangePushA("op") + for i in range(test_time): + op_embedding = swin_transformer.forward(images) + op_output = model.head(op_embedding) + #_nvtx.rangePop() + torch.cuda.synchronize() + op_end = time.time() + op_output = op_output.cpu().numpy() + if use_fp16: + print("FP16 op time : ", (op_end - op_begin)/test_time*1000.0, "ms") + else: + print("FP32 op time : ", (op_end - op_begin)/test_time*1000.0, "ms") + + return op_output + + +@torch.no_grad() +def run_torch(model, images, mark): + # warm up + for i in range(warmup_time): + output = model(images) + + torch.cuda.synchronize() + torch_start = time.time() + #_nvtx.rangePushA("torch") + for i in range(test_time): + torch_output = model(images) + #_nvtx.rangePop() + torch.cuda.synchronize() + torch_end = time.time() + torch_output = torch_output.cpu().numpy() + print(mark + " time : ", (torch_end - torch_start)/test_time*1000.0, "ms") + return torch_output + +@torch.no_grad() +def validate_with_random_data(args, config, model): + model.eval() + + max_batch = config.DATA.BATCH_SIZE + img_size = config.DATA.IMG_SIZE + in_chans = config.MODEL.SWIN.IN_CHANS + image = np.random.rand(1, in_chans, img_size, img_size) + images = np.repeat(image, max_batch, axis=0) + images_half = torch.tensor(images, dtype=torch.half) + images_float = torch.tensor(images, dtype=torch.float) + images_half = images_half.cuda(non_blocking=True) + images_float = images_float.cuda(non_blocking=True) + ##run original swin-transformer + + # run pytorch op + FP32_op_output = run_swintransformernv_op(args, config, model, images_float, False) + + traced_module_float = torch.jit.trace(model, images_float) + FP32_torch_traced_output = run_torch(traced_module_float, images_float, "FP32 torch trace") + FP32_torch_output = run_torch(model, images_float, "FP32 torch") + + FP16_op_output = run_swintransformernv_op(args, config, model, images_half, True) + + traced_module_half = torch.jit.trace(model, images_half) + FP16_torch_traced_output = run_torch(traced_module_half, images_half, "FP16 torch trace") + FP16_torch_output = run_torch(model, images_half, "FP16 torch") + + + + diff = abs(FP32_torch_traced_output - FP32_op_output) + print("FP32_torch_traced_output vs FP32_op_output , avg diff : ", diff.mean(), "max diff : ", diff.max()) + diff = abs(FP16_torch_traced_output - FP16_op_output) + print("FP16_torch_traced_output vs FP16_op_output , avg diff : ", diff.mean(), "max diff : ", diff.max()) + +if __name__ == '__main__': + args, config = parse_option() + + seed = config.SEED + int(time.time()) + torch.manual_seed(seed) + np.random.seed(seed) + cudnn.benchmark = True + + main(args, config) diff --git a/examples/pytorch/swin/run_test.sh b/examples/pytorch/swin/run_test.sh new file mode 100644 index 000000000..25ef5e1f6 --- /dev/null +++ b/examples/pytorch/swin/run_test.sh @@ -0,0 +1,7 @@ +python infer_swintransformer_op.py \ + --eval \ + --data-path /workspace \ + --cfg Swin-Transformer-Quantization/SwinTransformer/configs/swin_tiny_patch4_window7_224.yaml \ + --resume Swin-Transformer-Quantization/swin_tiny_patch4_window7_224.pth \ + --th-path ../../../build/lib/libpyt_swintransformer.so \ + --batch-size $1 diff --git a/examples/pytorch/swin/run_test_int8.sh b/examples/pytorch/swin/run_test_int8.sh new file mode 100644 index 000000000..ac98fe915 --- /dev/null +++ b/examples/pytorch/swin/run_test_int8.sh @@ -0,0 +1,8 @@ +python infer_swintransformer_int8_op.py \ + --profile \ + --data-path /workspace \ + --cfg Swin-Transformer-Quantization/SwinTransformer/configs/swin_tiny_patch4_window7_224.yaml \ + --resume Swin-Transformer-Quantization/calib-checkpoint/swin_tiny_patch4_window7_224_calib.pth \ + --th-path ../../../build/lib/libpyt_swintransformer.so \ + --int8-mode 1\ + --batch-size $1 diff --git a/examples/pytorch/swin/run_test_int8_accuracy.sh b/examples/pytorch/swin/run_test_int8_accuracy.sh new file mode 100644 index 000000000..f5863da16 --- /dev/null +++ b/examples/pytorch/swin/run_test_int8_accuracy.sh @@ -0,0 +1,8 @@ +python infer_swintransformer_int8_op.py \ + --eval \ + --data-path /workspace \ + --cfg Swin-Transformer-Quantization/SwinTransformer/configs/swin_tiny_patch4_window7_224.yaml \ + --resume Swin-Transformer-Quantization/calib-checkpoint/swin_tiny_patch4_window7_224_calib.pth \ + --th-path ../../../build/lib/libpyt_swintransformer.so \ + --int8-mode 1\ + --batch-size $1 diff --git a/examples/pytorch/t5/perf_benchmark.py b/examples/pytorch/t5/perf_benchmark.py new file mode 100644 index 000000000..a08277f3f --- /dev/null +++ b/examples/pytorch/t5/perf_benchmark.py @@ -0,0 +1,364 @@ +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +""" +perf_benchmark.py + +Unlike translate_example.py, this script focuses on benchmarking the performance of the FasterTransformers T5 +implementation such that it can be compared with other frameworks apples-to-apples. The changes include: + +- Use random input data and disable accuracy checking. +- Use fixed input/output sequence lengths and disable early_stopping. +- Add better controls on the number of warm-ups and the number of iterations to run the inference for. + +""" + +import argparse +import configparser +import os +import sys +import math +from datetime import datetime +import numpy as np +import torch +import torch.distributed as dist +# dir_path = os.path.dirname(os.path.realpath(__file__)) +# sys.path.append(dir_path + "/../../../3rdparty/transformers/src/") + +from transformers import T5ForConditionalGeneration # transformers-4.10.0-py3 +dir_path = os.path.dirname(os.path.realpath(__file__)) +sys.path.append(dir_path + "/../../..") + +from examples.pytorch.t5.utils.ft_encoder import FTT5EncoderWeight, FTT5Encoder +from examples.pytorch.t5.utils.ft_decoding import FTT5DecodingWeight, FTT5Decoding, FTT5 + +class TranslationResult(object): + def __init__(self, name, frame_work): + self.name = name + self.frame_work = frame_work # FT or HF + self.file_name = name + ".txt" + + self.token_list = [] + self.batch_ids_list = [] + self.batch_seq_len_list = [] + self.batch_num = 0 + self.execution_time = 0.0 # seconds + self.token_num = 0 + +class InputTokens(object): + def __init__(self, batch_size, input_seq_len, bos_token, eos_token, vocab_size): + # Set the last token of each sequence to eos and replace the bos/eos tokens in the middle of the sequences to + # some other tokens. + normal_token_list = list(range(vocab_size)) + if bos_token in normal_token_list: + normal_token_list.remove(bos_token) + if eos_token in normal_token_list: + normal_token_list.remove(eos_token) + self.input_ids = torch.randint(0, len(normal_token_list), (batch_size, input_seq_len)) + for batch_idx in range(batch_size): + for token_idx in range(input_seq_len): + if token_idx == input_seq_len - 1: + self.input_ids[batch_idx][token_idx] = eos_token + else: + self.input_ids[batch_idx][token_idx] = normal_token_list[self.input_ids[batch_idx][token_idx]] + # Set attention masks to all ones. + self.attention_mask = torch.ones((batch_size, input_seq_len), dtype=torch.int64) + +def translate(args_dict): + torch.set_printoptions(precision=6) + batch_size = args_dict['batch_size'] + beam_size = args_dict['beam_width'] + output_seq_len = args_dict['seq_len'] + input_seq_len = args_dict['input_seq_len'] if args_dict['input_seq_len'] > 0 else output_seq_len + time_args = args_dict["test_time"] + beam_search_diversity_rate = args_dict['beam_search_diversity_rate'] + topk = args_dict['sampling_topk'] + topp = args_dict['sampling_topp'] + tensor_para_size = args_dict['tensor_para_size'] + pipeline_para_size = args_dict['pipeline_para_size'] + warmup_iterations = args_dict['warmup_iterations'] + infer_iterations = args_dict['iterations'] + infer_duration = args_dict['duration'] + seed = args_dict['seed'] + torch.manual_seed(seed) + + ## huggingface without bias and use relative position embedding + ## relative position embedding -> 0, absolute position embedding -> 1 + t5_with_bias = 0 + position_embedding_type = 0 + ## only huggingface model path supported + model_path = args_dict['model_path'] if args_dict['model_path'] != None else args_dict['model'] + ckpt_path = args_dict['ckpt_path'] + model_type = args_dict['model_type'] + ## read checkpoint config if exists + ckpt_config = configparser.ConfigParser() + if (model_type == "Megatron"): + ckpt_config_path = os.path.join(ckpt_path, 'config.ini') + if os.path.isfile(ckpt_config_path): + ckpt_config.read(ckpt_config_path) + ## update structure config + t5_with_bias = ckpt_config.getint('structure', 't5_with_bias') + position_embedding_type = ckpt_config.getint('structure', 'position_embedding_type') + else: + raise Exception("config file does exist with the ckpt !") + + if model_type == "Megatron" and args_dict['ckpt_path'] == None: + raise Exception("Megatron T5 model needs to specify checkpoint path !") + + print("\n=============== Argument ===============") + for key in args_dict: + print("{}: {}".format(key, args_dict[key])) + print("========================================") + + lib_path = args_dict['lib_path'] + + t5_model = T5ForConditionalGeneration.from_pretrained(model_path) + + if dist.is_mpi_available(): + try: + dist.init_process_group(backend='mpi') + rank = dist.get_rank() + except: + rank = dist.get_rank() + else: + rank = 0 + + if time_args.find("0") != -1 or time_args.find("2") != -1: + t5_model = t5_model.to(rank) + if args_dict['data_type'] == 'fp16': + t5_model = t5_model.half() + + encoder_config = t5_model.encoder.config + decoder_config = t5_model.decoder.config + q_scaling = 1.0 / (math.sqrt(encoder_config.d_kv)) + if (model_type == "Megatron"): + ## update configs when using Megatron model structure + q_scaling = 1.0 + + encoder_config.d_model = ckpt_config.getint('encoder', 'd_model') + encoder_config.vocab_size = ckpt_config.getint('encoder', 'vocab_size') + encoder_config.num_heads = ckpt_config.getint('encoder', 'num_heads') + encoder_config.d_kv = ckpt_config.getint('encoder', 'd_kv') + encoder_config.d_ff = ckpt_config.getint('encoder', 'd_ff') + encoder_config.num_layers = ckpt_config.getint('encoder', 'num_layers') + encoder_config.relative_attention_num_buckets = ckpt_config.getint('encoder', 'relative_attention_num_buckets_or_max_pos_seq_len') + + decoder_config.d_model = ckpt_config.getint('decoder', 'd_model') + decoder_config.vocab_size = ckpt_config.getint('decoder', 'vocab_size') + decoder_config.num_heads = ckpt_config.getint('decoder', 'num_heads') + decoder_config.d_kv = ckpt_config.getint('decoder', 'd_kv') + decoder_config.d_ff = ckpt_config.getint('decoder', 'd_ff') + decoder_config.num_layers = ckpt_config.getint('decoder', 'num_layers') + decoder_config.relative_attention_num_buckets = ckpt_config.getint('decoder', 'relative_attention_num_buckets_or_max_pos_seq_len') + decoder_config.decoder_start_token_id = 30522 # Only for megatron t5 model + decoder_config.eos_token_id = 30523 # Only for megatron t5 model + + print(f"{model_type} encoder_config: {encoder_config}") + print(f"{model_type} decoder_config: {decoder_config}") + + if os.path.isfile("gemm_config.in") and rank == 0: + cmd = f"rm gemm_config.in" + print(f"Run {cmd}") + os.system(cmd) + translation_result_list = [] + if time_args.find("0") != -1: + translation_result_list.append(TranslationResult("hf-beamsearch-warmup", "HF")) + translation_result_list.append(TranslationResult("hf-beamsearch", "HF")) + if time_args.find("1") != -1: + translation_result_list.append(TranslationResult("ft-beamsearch-warmup", "FT")) + translation_result_list.append(TranslationResult("ft-beamsearch", "FT")) + if rank == 0: + is_fp16 = 1 if args_dict['data_type'] == 'fp16' else 0 + cmd = f"./bin/t5_gemm {batch_size // pipeline_para_size} {beam_size} {128} " \ + f"{encoder_config.d_model} {encoder_config.num_heads} {encoder_config.d_kv} {encoder_config.d_ff} " \ + f"{decoder_config.d_model} {decoder_config.num_heads} {decoder_config.d_kv} {decoder_config.d_ff} " \ + f"{decoder_config.vocab_size} {is_fp16} {tensor_para_size} 1 > .tmp_gemm.log" + print(f"Run gemm test: {cmd}") + os.system(cmd) + if time_args.find("2") != -1: + translation_result_list.append(TranslationResult("hf-sampling-warmup", "HF")) + translation_result_list.append(TranslationResult("hf-sampling", "HF")) + if time_args.find("3") != -1: + translation_result_list.append(TranslationResult("ft-sampling-warmup", "FT")) + translation_result_list.append(TranslationResult("ft-sampling", "FT")) + if rank == 0: + is_fp16 = 1 if args_dict['data_type'] == 'fp16' else 0 + cmd = f"./bin/t5_gemm {batch_size // pipeline_para_size} {1} {128} " \ + f"{encoder_config.d_model} {encoder_config.num_heads} {encoder_config.d_kv} {encoder_config.d_ff} " \ + f"{decoder_config.d_model} {decoder_config.num_heads} {decoder_config.d_kv} {decoder_config.d_ff} " \ + f"{decoder_config.vocab_size} {is_fp16} {tensor_para_size} 1 1 > .tmp_gemm.log" + print(f"Run gemm test: {cmd}") + os.system(cmd) + + if time_args.find("1") != -1 or time_args.find("3") != -1: + ft_encoder_weight = FTT5EncoderWeight(encoder_config, tensor_para_size, pipeline_para_size, t5_with_bias, position_embedding_type) + ft_decoding_weight = FTT5DecodingWeight(decoder_config, tensor_para_size, pipeline_para_size, t5_with_bias, position_embedding_type) + + if args_dict["ckpt_path"] is not None: + ft_encoder_weight.load_from_bin(args_dict["ckpt_path"]) + ft_decoding_weight.load_from_bin(args_dict["ckpt_path"]) + else: + ft_encoder_weight.load_from_model(t5_model) + ft_decoding_weight.load_from_model(t5_model) + + if args_dict['data_type'] == 'fp16': + t5_model = t5_model.half() + ft_encoder_weight.to_half() + ft_decoding_weight.to_half() + + # This script assumes fixed sequence length, so using remove_padding will not benefit. + remove_padding = False + ft_encoder = FTT5Encoder(ft_encoder_weight.w, lib_path, encoder_config.num_heads, + encoder_config.d_kv, encoder_config.d_ff, + encoder_config.d_model, remove_padding, encoder_config.num_layers, + encoder_config.relative_attention_num_buckets, + 128, False, q_scaling, tensor_para_size, pipeline_para_size, t5_with_bias, position_embedding_type) + ft_decoding = FTT5Decoding(ft_decoding_weight.w, lib_path, + decoder_config.num_heads, decoder_config.d_kv, + decoder_config.d_ff, encoder_config.d_model, + decoder_config.d_model, decoder_config.num_layers, + decoder_config.decoder_start_token_id, + # Set eos token id to -1 to effectively disable early stopping. + # decoder_config.eos_token_id, + -1, + decoder_config.vocab_size, + q_scaling, + decoder_config.relative_attention_num_buckets, max_distance=128, + tensor_para_size=tensor_para_size, pipeline_para_size=pipeline_para_size, + t5_with_bias=t5_with_bias, position_embedding_type = position_embedding_type) + + ft_t5 = FTT5(ft_encoder, ft_decoding) + + input_token = InputTokens(batch_size, input_seq_len, decoder_config.decoder_start_token_id, decoder_config.eos_token_id, decoder_config.vocab_size) + + for i in range(len(translation_result_list)): + sys.stdout.flush() + is_warmup = (translation_result_list[i].name.find("warmup") != -1) + min_duration = infer_duration if not is_warmup else 0 + min_iterations = infer_iterations if not is_warmup else warmup_iterations + iter_idx = 0 + + start_time = datetime.now() + while iter_idx < min_iterations or (datetime.now() - start_time).total_seconds() < min_duration: + iter_idx += 1 + + if translation_result_list[i].frame_work == "HF": + if translation_result_list[i].name.find("beamsearch") != -1: + hf_outputs = t5_model.generate(input_token.input_ids.to("cuda"), + min_length=output_seq_len + 1, + max_length=output_seq_len + 1, # "+1" because HF counts as well. + early_stopping=False, + num_beams=beam_size) + elif translation_result_list[i].name.find("sampling") != -1: + hf_outputs = t5_model.generate(input_token.input_ids.to("cuda"), + min_length=output_seq_len + 1, + max_length=output_seq_len + 1, # "+1" because HF counts as well. + early_stopping=False, + do_sample=True, + top_k=topk if topk > 0 else None, + top_p=topp if topp > 0.0 else None) + translation_result_list[i].batch_ids_list.append(hf_outputs) + translation_result_list[i].batch_seq_len_list.append(np.ones(input_seq_len) * output_seq_len) + elif translation_result_list[i].frame_work == "FT": + tmp_beam_size = beam_size + if translation_result_list[i].name.find("sampling") != -1: + tmp_beam_size = 1 + ft_decoding_outputs, ft_decoding_seq_lens = ft_t5(input_token, + tmp_beam_size, + output_seq_len, + topk, + topp, + beam_search_diversity_rate=beam_search_diversity_rate) + translation_result_list[i].batch_ids_list.append(ft_decoding_outputs) + translation_result_list[i].batch_seq_len_list.append(ft_decoding_seq_lens) + + translation_result_list[i].batch_num += 1 + + stop_time = datetime.now() + translation_result_list[i].execution_time = (stop_time - start_time).total_seconds() + if translation_result_list[i].name.find("warmup") != -1: + continue + + for batch_token, batch_seq_len in zip(translation_result_list[i].batch_ids_list, translation_result_list[i].batch_seq_len_list): + for j in range(len(batch_token)): + if translation_result_list[i].frame_work == "HF": + translation_result_list[i].token_list.append(batch_token[j][1:]) + translation_result_list[i].token_num += sum(batch_token[j][1:] != 0) + elif translation_result_list[i].frame_work == "FT": + translation_result_list[i].token_list.append(batch_token[j][0][:batch_seq_len[j][0]]) + translation_result_list[i].token_num += batch_seq_len[j][0] + + if rank == 0: + for t in translation_result_list: + if t.name.find("warmup") != -1: + continue + print(f"[INFO] {t.name} translates {t.batch_num} batches taking {t.execution_time:.2f} sec to translate " + f"{t.token_num} tokens ({(t.execution_time / t.batch_num * 1000):.4f} ms per batch), " + f"{(t.token_num / t.execution_time):.0f} tokens/sec.") + +if __name__ == "__main__": + parser = argparse.ArgumentParser(formatter_class=argparse.ArgumentDefaultsHelpFormatter) + parser.add_argument('-batch', '--batch_size', type=int, default=1, metavar='NUMBER', + help='batch size (default: 1)') + parser.add_argument('-beam', '--beam_width', type=int, default=4, metavar='NUMBER', + help='beam width (default: 4)') + parser.add_argument('-s', '--seq_len', type=int, default=256, metavar='NUMBER', + help='fixed output sequence length, excluding bos but including eos (default: 256)') + parser.add_argument('-inseq', '--input_seq_len', type=int, default=0, metavar='NUMBER', + help='fixed input sequence length, including eos (default: same as fixed output sequence length)') + parser.add_argument('-time', '--test_time', type=str, default='', metavar='STRING', + help=''' + Test the time of which one (default: '' (not test anyone) ); + '': not test anyone + '0': test hf_beamsearch + '1': test ft_beamsearch + '2': test hf_sampling + '3': test ft_sampling + 'e.g., if you want to test tf_beamsearch and ft_sampling, + then you need to use -time '03' ''') + parser.add_argument('-diversity_rate', '--beam_search_diversity_rate', type=float, default=0.0, metavar='NUMBER', + help='deviersity rate of beam search. default is 0. When diversity rate = 0, it is equivalent to the naive beams earch.') + parser.add_argument('-topk', '--sampling_topk', type=int, default=1, metavar='NUMBER', + help='Candidate (k) value of top k sampling in decoding. Default is 1.') + parser.add_argument('-topp', '--sampling_topp', type=float, default=0.0, metavar='NUMBER', + help='Probability (p) value of top p sampling in decoding. Default is 0.0. ') + parser.add_argument('-d', '--data_type', type=str, default="fp32", metavar='STRING', + help='data type (default: fp32)', choices=['fp32', 'fp16']) + parser.add_argument('-lib_path', '--lib_path', type=str, default="lib/libth_t5.so", metavar='STRING', + help='the path of FasterTransformer pytorch t5 op library.') + parser.add_argument('-model_path', '--model_path', type=str, default=None, metavar='STRING', + help='T5 model path.') + parser.add_argument('-model', '--model', type=str, default="t5-small", metavar='STRING', + help='T5 model size. Only used when --model_path=None', choices=["t5-small", "t5-base", "t5-large", "t5-3b", "t5-11b"]) + parser.add_argument('-tensor_para_size', '--tensor_para_size', type=int, default=1, metavar='NUMBER', + help='size of tensor parallelism (default: 1)') + parser.add_argument('-pipeline_para_size', '--pipeline_para_size', type=int, default=1, metavar='NUMBER', + help='size of pipeline parallelism (default: 1)') + # assume checkpoint config is also in the same path + parser.add_argument('--ckpt_path', type=str, help='path to the checkpoint file.') + parser.add_argument('--model_type', type=str, default="Huggingface", choices=["Huggingface", "Megatron"], + help='Megatron T5 uses bias and supports both absulte and relative positional embedding;' + 'Huggingface T4 adopts the paper\'s implementation and has no bias') + # flags for performance benchmarking + parser.add_argument('-warmup_iter', '--warmup_iterations', type=int, default=1, metavar='NUMBER', + help='Number of warm-up iterations for each implementation.') + parser.add_argument('-iter', '--iterations', type=int, default=10, metavar='NUMBER', + help='Minimal number of inference iterations for each implementation.') + parser.add_argument('-duration', '--duration', type=int, default=3, metavar='NUMBER', + help='Minimal duration in seconds for inference iterations for each implementation.') + parser.add_argument('-seed', '--seed', type=int, default=0, metavar='NUMBER', + help='Random seed used to generate random input values.') + args = parser.parse_args() + + translate(vars(args)) \ No newline at end of file diff --git a/examples/pytorch/t5/requirement.txt b/examples/pytorch/t5/requirement.txt new file mode 100644 index 000000000..030ae70f1 --- /dev/null +++ b/examples/pytorch/t5/requirement.txt @@ -0,0 +1,5 @@ +transformers==4.10.0 +tokenizers==0.10.1 +omegaconf +SentencePiece +sacrebleu diff --git a/examples/pytorch/t5/translate_example.py b/examples/pytorch/t5/translate_example.py index debdf6d6f..36d347f20 100644 --- a/examples/pytorch/t5/translate_example.py +++ b/examples/pytorch/t5/translate_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -13,11 +13,14 @@ # limitations under the License. import argparse +import configparser import os import sys +import math from datetime import datetime import numpy as np import torch +import torch.distributed as dist # dir_path = os.path.dirname(os.path.realpath(__file__)) # sys.path.append(dir_path + "/../../../3rdparty/transformers/src/") @@ -52,6 +55,7 @@ def __init__(self, name, frame_work): self.batch_num = 0 self.execution_time = 0.0 # seconds self.sentence_num = 0 + self.token_num = 0 self.bleu_score = None def translate(args_dict): @@ -67,7 +71,30 @@ def translate(args_dict): topp = args_dict['sampling_topp'] tensor_para_size = args_dict['tensor_para_size'] pipeline_para_size = args_dict['pipeline_para_size'] - + max_ite = args_dict['max_iteration'] + ## huggingface without bias and use relative position embedding + ## relative position embedding -> 0, absolute position embedding -> 1 + t5_with_bias = 0 + position_embedding_type = 0 + ## only huggingface model path supported + model_path = args_dict['model_path'] if args_dict['model_path'] != None else args_dict['model'] + ckpt_path = args_dict['ckpt_path'] + model_type = args_dict['model_type'] + ## read checkpoint config if exists + ckpt_config = configparser.ConfigParser() + if (model_type == "Megatron"): + ckpt_config_path = os.path.join(ckpt_path, 'config.ini') + if os.path.isfile(ckpt_config_path): + ckpt_config.read(ckpt_config_path) + ## update structure config + t5_with_bias = ckpt_config.getint('structure', 't5_with_bias') + position_embedding_type = ckpt_config.getint('structure', 'position_embedding_type') + else: + raise Exception("config file does exist with the ckpt !") + + if model_type == "Megatron" and args_dict['ckpt_path'] == None: + raise Exception("Megatron T5 model needs to specify checkpoint path !") + print("\n=============== Argument ===============") for key in args_dict: print("{}: {}".format(key, args_dict[key])) @@ -75,22 +102,94 @@ def translate(args_dict): lib_path = args_dict['lib_path'] - t5_model = T5ForConditionalGeneration.from_pretrained(args_dict['model']) + t5_model = T5ForConditionalGeneration.from_pretrained(model_path) + + if dist.is_mpi_available(): + try: + dist.init_process_group(backend='mpi') + rank = dist.get_rank() + except: + rank = dist.get_rank() + else: + rank = 0 if time_args.find("0") != -1 or time_args.find("2") != -1: - t5_model = t5_model.to("cuda") + t5_model = t5_model.to(rank) if args_dict['data_type'] == 'fp16': t5_model = t5_model.half() - tokenizer = T5Tokenizer.from_pretrained(args_dict['model']) - fast_tokenizer = PreTrainedTokenizerFast.from_pretrained(args_dict['model']) + ## TODO: modidy Megatron T5 Converter + ## TODO: add megatron t5 tokenizer + tokenizer = T5Tokenizer.from_pretrained(model_path) + fast_tokenizer = PreTrainedTokenizerFast.from_pretrained(model_path) + + encoder_config = t5_model.encoder.config + decoder_config = t5_model.decoder.config + q_scaling = 1.0 / (math.sqrt(encoder_config.d_kv)) + if (model_type == "Megatron"): + ## update configs when using Megatron model structure + q_scaling = 1.0 + + encoder_ckpt_config = ckpt_config['encoder'] + decoder_ckpt_config = ckpt_config['decoder'] + encoder_config.d_model = ckpt_config.getint('encoder', 'd_model') + encoder_config.vocab_size = ckpt_config.getint('encoder', 'vocab_size') + encoder_config.num_heads = ckpt_config.getint('encoder', 'num_heads') + encoder_config.d_kv = ckpt_config.getint('encoder', 'd_kv') + encoder_config.d_ff = ckpt_config.getint('encoder', 'd_ff') + encoder_config.num_layers = ckpt_config.getint('encoder', 'num_layers') + encoder_config.relative_attention_num_buckets = ckpt_config.getint('encoder', 'relative_attention_num_buckets_or_max_pos_seq_len') + + decoder_config.d_model = ckpt_config.getint('decoder', 'd_model') + decoder_config.vocab_size = ckpt_config.getint('decoder', 'vocab_size') + decoder_config.num_heads = ckpt_config.getint('decoder', 'num_heads') + decoder_config.d_kv = ckpt_config.getint('decoder', 'd_kv') + decoder_config.d_ff = ckpt_config.getint('decoder', 'd_ff') + decoder_config.num_layers = ckpt_config.getint('decoder', 'num_layers') + decoder_config.relative_attention_num_buckets = ckpt_config.getint('decoder', 'relative_attention_num_buckets_or_max_pos_seq_len') + decoder_config.decoder_start_token_id = 30522 # Only for megatron t5 model + decoder_config.eos_token_id = 30523 # Only for megatron t5 model + + print(f"{model_type} encoder_config: {encoder_config}") + print(f"{model_type} decoder_config: {decoder_config}") + + if os.path.isfile("gemm_config.in") and rank == 0: + cmd = f"rm gemm_config.in" + print(f"Run {cmd}") + os.system(cmd) + translation_result_list = [] + if time_args.find("0") != -1: + translation_result_list.append(TranslationResult("hf-beamsearch-warmup", "HF")) + translation_result_list.append(TranslationResult("hf-beamsearch", "HF")) + if time_args.find("1") != -1: + translation_result_list.append(TranslationResult("ft-beamsearch-warmup", "FT")) + translation_result_list.append(TranslationResult("ft-beamsearch", "FT")) + if rank == 0: + is_fp16 = 1 if args_dict['data_type'] == 'fp16' else 0 + cmd = f"./bin/t5_gemm {batch_size // pipeline_para_size} {beam_size} {128} " \ + f"{encoder_config.d_model} {encoder_config.num_heads} {encoder_config.d_kv} {encoder_config.d_ff} " \ + f"{decoder_config.d_model} {decoder_config.num_heads} {decoder_config.d_kv} {decoder_config.d_ff} " \ + f"{decoder_config.vocab_size} {is_fp16} {tensor_para_size} 1 > .tmp_gemm.log" + print(f"Run gemm test: {cmd}") + os.system(cmd) + if time_args.find("2") != -1: + translation_result_list.append(TranslationResult("hf-sampling-warmup", "HF")) + translation_result_list.append(TranslationResult("hf-sampling", "HF")) + if time_args.find("3") != -1: + translation_result_list.append(TranslationResult("ft-sampling-warmup", "FT")) + translation_result_list.append(TranslationResult("ft-sampling", "FT")) + if rank == 0: + is_fp16 = 1 if args_dict['data_type'] == 'fp16' else 0 + cmd = f"./bin/t5_gemm {batch_size // pipeline_para_size} {1} {128} " \ + f"{encoder_config.d_model} {encoder_config.num_heads} {encoder_config.d_kv} {encoder_config.d_ff} " \ + f"{decoder_config.d_model} {decoder_config.num_heads} {decoder_config.d_kv} {decoder_config.d_ff} " \ + f"{decoder_config.vocab_size} {is_fp16} {tensor_para_size} 1 1 > .tmp_gemm.log" + print(f"Run gemm test: {cmd}") + os.system(cmd) if time_args.find("1") != -1 or time_args.find("3") != -1: - encoder_config = t5_model.encoder.config - decoder_config = t5_model.decoder.config + ft_encoder_weight = FTT5EncoderWeight(encoder_config, tensor_para_size, pipeline_para_size, t5_with_bias, position_embedding_type) + ft_decoding_weight = FTT5DecodingWeight(decoder_config, tensor_para_size, pipeline_para_size, t5_with_bias, position_embedding_type) - ft_encoder_weight = FTT5EncoderWeight(encoder_config, tensor_para_size, pipeline_para_size) - ft_decoding_weight = FTT5DecodingWeight(decoder_config, tensor_para_size, pipeline_para_size) - if args_dict["ckpt_path"] is not None: ft_encoder_weight.load_from_bin(args_dict["ckpt_path"]) ft_decoding_weight.load_from_bin(args_dict["ckpt_path"]) @@ -103,24 +202,22 @@ def translate(args_dict): ft_encoder_weight.to_half() ft_decoding_weight.to_half() - # Set remove padding = False since we don't support remove padding under pipeline parallel now - remove_padding = True + remove_padding = True if batch_size > 32 else False ft_encoder = FTT5Encoder(ft_encoder_weight.w, lib_path, encoder_config.num_heads, encoder_config.d_kv, encoder_config.d_ff, encoder_config.d_model, remove_padding, encoder_config.num_layers, encoder_config.relative_attention_num_buckets, - 128, False, 1.0, tensor_para_size, pipeline_para_size) - + 128, False, q_scaling, tensor_para_size, pipeline_para_size, t5_with_bias, position_embedding_type) ft_decoding = FTT5Decoding(ft_decoding_weight.w, lib_path, decoder_config.num_heads, decoder_config.d_kv, decoder_config.d_ff, encoder_config.d_model, decoder_config.d_model, decoder_config.num_layers, decoder_config.decoder_start_token_id, decoder_config.eos_token_id, decoder_config.vocab_size, + q_scaling, decoder_config.relative_attention_num_buckets, max_distance=128, - beam_search_diversity_rate=beam_search_diversity_rate, top_k=topk, top_p=topp, - temperature=1.0, len_penalty=1.0, repetition_penalty=1.0, - tensor_para_size=tensor_para_size, pipeline_para_size=pipeline_para_size) + tensor_para_size=tensor_para_size, pipeline_para_size=pipeline_para_size, + t5_with_bias=t5_with_bias, position_embedding_type = position_embedding_type) ft_t5 = FTT5(ft_encoder, ft_decoding) @@ -131,20 +228,6 @@ def translate(args_dict): with open(tgt_file, 'r') as f: tgt_text = recover_bpe(f.readlines()) - translation_result_list = [] - if time_args.find("0") != -1: - translation_result_list.append(TranslationResult("hf-beamsearch-warmup", "HF")) - translation_result_list.append(TranslationResult("hf-beamsearch", "HF")) - if time_args.find("1") != -1: - translation_result_list.append(TranslationResult("ft-beamsearch-warmup", "FT")) - translation_result_list.append(TranslationResult("ft-beamsearch", "FT")) - if time_args.find("2") != -1: - translation_result_list.append(TranslationResult("hf-sampling-warmup", "HF")) - translation_result_list.append(TranslationResult("hf-sampling", "HF")) - if time_args.find("3") != -1: - translation_result_list.append(TranslationResult("ft-sampling-warmup", "FT")) - translation_result_list.append(TranslationResult("ft-sampling", "FT")) - for i in range(len(translation_result_list)): sys.stdout.flush() prev = 0 @@ -173,7 +256,14 @@ def translate(args_dict): tmp_beam_size = beam_size if translation_result_list[i].name.find("sampling") != -1: tmp_beam_size = 1 - ft_decoding_outputs, ft_decoding_seq_lens = ft_t5(input_token, tmp_beam_size, max_seq_len) + ft_decoding_outputs, ft_decoding_seq_lens = ft_t5(input_token, + tmp_beam_size, + max_seq_len, + topk, + topp, + beam_search_diversity_rate=beam_search_diversity_rate, + is_return_output_log_probs=args_dict["return_output_log_probs"], + is_return_cum_log_probs=args_dict["return_cum_log_probs"]) translation_result_list[i].batch_ids_list.append(ft_decoding_outputs) translation_result_list[i].batch_seq_len_list.append(ft_decoding_seq_lens) @@ -182,27 +272,36 @@ def translate(args_dict): if translation_result_list[i].name.find("warmup") != -1 and \ (translation_result_list[i].batch_num > 10 or translation_result_list[i].sentence_num > 300): break - + if translation_result_list[i].batch_num >= max_ite: + break + stop_time = datetime.now() translation_result_list[i].execution_time = (stop_time - start_time).total_seconds() + if translation_result_list[i].name.find("warmup") != -1: + continue for batch_token, batch_seq_len in zip(translation_result_list[i].batch_ids_list, translation_result_list[i].batch_seq_len_list): for j in range(len(batch_token)): if translation_result_list[i].frame_work == "HF": translation_result_list[i].token_list.append(fast_tokenizer.decode(batch_token[j][1:], skip_special_tokens=True)) + translation_result_list[i].token_num += sum(batch_token[j][1:] != 0) elif translation_result_list[i].frame_work == "FT": translation_result_list[i].token_list.append(fast_tokenizer.decode(batch_token[j][0][:batch_seq_len[j][0]], skip_special_tokens=True)) + translation_result_list[i].token_num += batch_seq_len[j][0] - translation_result_list[i].bleu_score = bleu_score(translation_result_list[i].token_list, tgt_text[:len(translation_result_list[i].token_list)]) - with open(translation_result_list[i].name + ".txt", 'w') as f: - for line in translation_result_list[i].token_list: - f.write(line) + if rank == 0: + translation_result_list[i].bleu_score = bleu_score(translation_result_list[i].token_list, tgt_text[:len(translation_result_list[i].token_list)]) + with open(translation_result_list[i].name + ".txt", 'w') as f: + for line in translation_result_list[i].token_list: + f.write(line) - for t in translation_result_list: - if t.name.find("warmup") != -1: - continue - print("[INFO] {} translates {} batches taking {:.2f} sec to translate {} tokens, BLEU score: {:.2f}, {:.0f} tokens/sec.".format( - t.name, t.batch_num, t.execution_time, t.bleu_score.sys_len, t.bleu_score.score, t.bleu_score.sys_len / t.execution_time)) + if rank == 0: + for t in translation_result_list: + if t.name.find("warmup") != -1: + continue + print(f"[INFO] {t.name} translates {t.batch_num} batches taking {t.execution_time:.2f} sec to translate " + f"{t.token_num} tokens, BLEU score: {t.bleu_score.score:.2f}, {(t.token_num / t.execution_time):.0f} tokens/sec." + f" ({t.bleu_score.sys_len} words, {(t.bleu_score.sys_len / t.execution_time):.0f} words/sec)") if __name__ == "__main__": parser = argparse.ArgumentParser(formatter_class=argparse.ArgumentDefaultsHelpFormatter) @@ -236,13 +335,25 @@ def translate(args_dict): help='data type (default: fp32)', choices=['fp32', 'fp16']) parser.add_argument('-lib_path', '--lib_path', type=str, default="lib/libth_t5.so", metavar='STRING', help='the path of FasterTransformer pytorch t5 op library.') + parser.add_argument('-model_path', '--model_path', type=str, default=None, metavar='STRING', + help='T5 model path.') parser.add_argument('-model', '--model', type=str, default="t5-small", metavar='STRING', - help='T5 model size.', choices=["t5-small", "t5-base", "t5-large", "t5-3b", "t5-11b"]) + help='T5 model size. Only used when --model_path=None', choices=["t5-small", "t5-base", "t5-large", "t5-3b", "t5-11b"]) parser.add_argument('-tensor_para_size', '--tensor_para_size', type=int, default=1, metavar='NUMBER', help='size of tensor parallelism (default: 1)') parser.add_argument('-pipeline_para_size', '--pipeline_para_size', type=int, default=1, metavar='NUMBER', help='size of pipeline parallelism (default: 1)') + # assume checkpoint config is also in the same path parser.add_argument('--ckpt_path', type=str, help='path to the checkpoint file.') + parser.add_argument('-max_ite', '--max_iteration', type=int, default=100000, metavar='NUMBER', + help='Maximum iteraiton for translation, default is 100000 (as large as possible to run all test set).') + parser.add_argument('--model_type', type=str, default="Huggingface", choices=["Huggingface", "Megatron"], + help='Megatron T5 uses bias and supports both absulte and relative positional embedding;' + 'Huggingface T4 adopts the paper\'s implementation and has no bias') + parser.add_argument('--return_output_log_probs', action='store_true', + help='Return the log probability of generated tokens.') + parser.add_argument('--return_cum_log_probs', action='store_true', + help='Return the cumulative log probability of generated tokens.') args = parser.parse_args() translate(vars(args)) \ No newline at end of file diff --git a/examples/pytorch/t5/utils/ft_decoding.py b/examples/pytorch/t5/utils/ft_decoding.py index 5eb184052..5cd266e4f 100644 --- a/examples/pytorch/t5/utils/ft_decoding.py +++ b/examples/pytorch/t5/utils/ft_decoding.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -18,28 +18,37 @@ import numpy as np class FTT5DecodingWeight(object): - def __init__(self, config, tensor_para_size, pipeline_para_size): + def __init__(self, config, tensor_para_size, pipeline_para_size, t5_with_bias = False, position_embedding_type = 0): self.config = config self.num_layer = config.num_layers self.tensor_para_size = tensor_para_size self.pipeline_para_size = pipeline_para_size + self.t5_with_bias = t5_with_bias + self.position_embedding_type = position_embedding_type + self.real_weights_num = 27 if t5_with_bias else 14 self.w = [] - - try: - dist.init_process_group(backend='mpi') - except: - print("[INFO] WARNING: Have initalize the process group") - - self.rank = dist.get_rank() + self.use_mpi = dist.is_mpi_available() + + if self.use_mpi: + try: + dist.init_process_group(backend='mpi') + except: + print("[INFO] WARNING: Exception occurred in dist.init_process_group(backend='mpi'). Maybe the process group has been initialized somewhere else.") + else: + print("[INFO] MPI is not available in this PyTorch build.") + assert tensor_para_size == 1, "[FATAL] MPI is required for tensor_para_size > 1." + assert pipeline_para_size == 1, "[FATAL] MPI is required for pipeline_para_size > 1." + + self.rank = dist.get_rank() if self.use_mpi else 0 self.device_count = torch.cuda.device_count() self.device = self.rank % self.device_count torch.cuda.set_device(self.device) - - world_size = dist.get_world_size() + + world_size = dist.get_world_size() if self.use_mpi else 1 assert world_size == tensor_para_size * pipeline_para_size, "[ERROR] world_size != tensor_para_size * pipeline_para_size" self.tensor_para_rank = self.rank % self.tensor_para_size self.pipeline_para_rank = self.rank // self.tensor_para_size - + def load_from_model(self, model): start_layer = self.pipeline_para_rank * self.num_layer // self.pipeline_para_size end_layer = (self.pipeline_para_rank + 1) * self.num_layer // self.pipeline_para_size @@ -47,7 +56,12 @@ def load_from_model(self, model): weight_dict = {} qkv_tmp = [] for name, param in model.named_parameters(): - param_t = param.T + if param.dim() == 2: + param_t = param.transpose(1, 0) + elif param.dim() == 1: + param_t = param + else: + assert False, f"The dimension of param {name} should be 2" if name.find("decoder.block") != -1: if name.find(".SelfAttention.q.weight") != -1 or name.find(".SelfAttention.k.weight") != -1 or name.find(".SelfAttention.v.weight") != -1: qkv_tmp.append(param_t) @@ -99,6 +113,10 @@ def load_from_model(self, model): t = weight_dict["decoder.block.0.layer.0.SelfAttention.relative_attention_bias.weight"].contiguous().cuda() t = t.split(t.shape[0] // self.tensor_para_size, dim=0)[self.tensor_para_rank].contiguous() self.w.append(t) + + #TODO: pass None Type to Torch Op + for i in range(13): + self.w.append(torch.empty((1,1), dtype=torch.float32).contiguous().cuda()) def load_from_bin(self, ckpt_path): start_layer = self.pipeline_para_rank * self.num_layer // self.pipeline_para_size @@ -129,51 +147,100 @@ def load_from_bin(self, ckpt_path): self.w.append(t) t = torch.from_numpy(np.fromfile(f"{ckpt_path}/decoder.final_layer_norm.weight.bin", dtype=np.single)).contiguous().cuda() self.w.append(t) - t = torch.from_numpy(np.fromfile(f"{ckpt_path}/shared.weight.bin", dtype=np.single).reshape([self.config.d_model, self.config.vocab_size])).T.contiguous().cuda() + t = torch.from_numpy(np.fromfile(f"{ckpt_path}/shared.weight_T.bin", dtype=np.single).reshape([self.config.d_model, self.config.vocab_size])).contiguous().cuda() self.w.append(t) - t = torch.from_numpy(np.fromfile(f"{ckpt_path}/decoder.block.0.layer.0.SelfAttention.relative_attention_bias.weight.{self.tensor_para_rank}.bin", dtype=np.single)).contiguous().cuda() + t = None + if (self.position_embedding_type == 0): + t = torch.from_numpy(np.fromfile(f"{ckpt_path}/decoder.block.0.layer.0.SelfAttention.relative_attention_bias.weight.{self.tensor_para_rank}.bin", dtype=np.single)).contiguous().cuda() + else: + t = torch.from_numpy(np.fromfile(f"{ckpt_path}/shared.ape.bin", dtype=np.single)).contiguous().cuda() self.w.append(t) + # add 13 additional bias if it is t5 megatron structure + if self.t5_with_bias: + t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/decoder.block.{i}.layer.0.layer_norm.bias.bin", dtype=np.single)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/decoder.block.{i}.layer.0.SelfAttention.qkv.bias.{self.tensor_para_rank}.bin", dtype=np.single)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/decoder.block.{i}.layer.0.SelfAttention.o.bias.bin", dtype=np.single)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/decoder.block.{i}.layer.1.layer_norm.bias.bin", dtype=np.single)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/decoder.block.{i}.layer.1.EncDecAttention.q.bias.{self.tensor_para_rank}.bin", dtype=np.single)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/decoder.block.{i}.layer.1.EncDecAttention.k.bias.{self.tensor_para_rank}.bin", dtype=np.single)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/decoder.block.{i}.layer.1.EncDecAttention.v.bias.{self.tensor_para_rank}.bin", dtype=np.single)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/decoder.block.{i}.layer.1.EncDecAttention.o.bias.bin", dtype=np.single)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/decoder.block.{i}.layer.2.layer_norm.bias.bin", dtype=np.single)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/decoder.block.{i}.layer.2.DenseReluDense.wi.bias.{self.tensor_para_rank}.bin", dtype=np.single)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/decoder.block.{i}.layer.2.DenseReluDense.wo.bias.bin", dtype=np.single)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + t = torch.from_numpy(np.fromfile(f"{ckpt_path}/decoder.final_layer_norm.bias.bin", dtype=np.single)).contiguous().cuda() + self.w.append(t) + t = torch.from_numpy(np.fromfile(f"{ckpt_path}/shared.bias.bin", dtype=np.single)).contiguous().cuda() + self.w.append(t) + else: + #TODO: pass None Type to Torch Op + for i in range(13): + self.w.append(torch.empty((1,1), dtype=torch.float32).contiguous().cuda()) + def to_cuda(self): - for i in range(len(self.w)): + for i in range(self.real_weights_num): self.w[i] = self.w[i].cuda() def to_half(self): - for i in range(len(self.w)): + for i in range(self.real_weights_num): self.w[i] = self.w[i].half() class FTT5Decoding(nn.Module): def __init__(self, decoding_weight_list, lib_path, head_num, head_size, inter_size, - mem_d_model, d_model, num_layer, start_id, end_id, vocab_size, num_bucket=32, - max_distance=128, beam_search_diversity_rate=0.0, top_k=1, top_p=0.0, - temperature=1.0, len_penalty=1.0, repetition_penalty=1.0, - tensor_para_size=1, pipeline_para_size=1): + mem_d_model, d_model, num_layer, start_id, end_id, vocab_size, q_scaling = 1.0, num_bucket=32, + max_distance=128, tensor_para_size=1, pipeline_para_size=1, t5_with_bias=False, position_embedding_type=0): super().__init__() - try: - dist.init_process_group(backend='mpi') - except: - print("[INFO] WARNING: Have initalize the process group") + + self.use_mpi = dist.is_mpi_available() + + if self.use_mpi: + try: + dist.init_process_group(backend='mpi') + except: + print("[INFO] WARNING: Exception occurred in dist.init_process_group(backend='mpi'). Maybe the process group has been initialized somewhere else.") + else: + print("[INFO] MPI is not available in this PyTorch build.") + assert tensor_para_size == 1, "[FATAL] MPI is required for tensor_para_size > 1." + assert pipeline_para_size == 1, "[FATAL] MPI is required for pipeline_para_size > 1." torch.classes.load_library(lib_path) try: self.decoding = torch.classes.FasterTransformer.T5Decoding(head_num, head_size, inter_size, mem_d_model, d_model, num_layer, - vocab_size, num_bucket, max_distance, start_id, end_id, - beam_search_diversity_rate, top_k, top_p, temperature, - len_penalty, repetition_penalty, - tensor_para_size, pipeline_para_size, + vocab_size, num_bucket, max_distance, q_scaling, start_id, end_id, + tensor_para_size, pipeline_para_size, t5_with_bias, position_embedding_type, *decoding_weight_list) except: self.decoding = torch.classes.FasterTransformerT5Decoding(head_num, head_size, inter_size, mem_d_model, d_model, num_layer, - vocab_size, num_bucket, max_distance, start_id, end_id, - beam_search_diversity_rate, top_k, top_p, temperature, - len_penalty, repetition_penalty, - tensor_para_size, pipeline_para_size, + vocab_size, num_bucket, max_distance, q_scaling, start_id, end_id, + tensor_para_size, pipeline_para_size, t5_with_bias, position_embedding_type, *decoding_weight_list) - def forward(self, beam_width, max_seq_len, mem_hidden_states, mem_seq_len): - outputs, _, sequence_length = self.decoding.forward(beam_width, max_seq_len, mem_hidden_states, mem_seq_len) - outputs = outputs.reshape([-1, beam_width, max_seq_len]) - return outputs, sequence_length.reshape([-1, beam_width]) + def forward(self, beam_width, max_seq_len, top_k, top_p, + beam_search_diversity_rate, temperature, + len_penalty, repetition_penalty, random_seed, + mem_hidden_states, mem_seq_len, + is_return_output_log_probs, is_return_cum_log_probs): + # TODO (bhsueh) Not found an method to put a None Type into op forward function + # So, the top_k and top_p must be some values now. + results = self.decoding.forward(beam_width, max_seq_len, + top_k, top_p, beam_search_diversity_rate, + temperature, len_penalty, repetition_penalty, + random_seed, mem_hidden_states, mem_seq_len, + is_return_output_log_probs, is_return_cum_log_probs) + results + return results class FTT5(nn.Module): def __init__(self, encoder, decoding): @@ -181,10 +248,36 @@ def __init__(self, encoder, decoding): self.encoder = encoder self.decoding = decoding - def forward(self, input_token, beam_size, max_seq_len): + def forward(self, input_token, beam_size, max_seq_len, + top_k, top_p, beam_search_diversity_rate, + temperature=1.0, len_penalty=1.0, repetition_penalty=1.0, random_seed=0, + is_return_output_log_probs=False, is_return_cum_log_probs=False): input_ids = input_token.input_ids.to("cuda").type(torch.int32) - mem_seq_len = torch.sum(input_token.attention_mask, dim=1).type(torch.int32).to("cuda") - + mem_seq_len = 0 + if hasattr(input_token, "attention_mask") : + mem_seq_len = torch.sum(input_token.attention_mask, dim=1).type(torch.int32).to("cuda") + else : + mem_seq_len = input_token.seq_len.type(torch.int32).to("cuda") + ft_encoder_outputs = self.encoder.forward(input_ids, mem_seq_len) - ft_decoding_outputs, ft_decoding_seq_lens = self.decoding.forward(beam_size, max_seq_len, ft_encoder_outputs, mem_seq_len) + results = self.decoding.forward(beam_size, + max_seq_len, + top_k, + top_p, + beam_search_diversity_rate, + temperature, + len_penalty, + repetition_penalty, + random_seed, + is_return_output_log_probs, + is_return_cum_log_probs, + ft_encoder_outputs, + mem_seq_len) + ft_decoding_outputs = results.pop(0).reshape([-1, beam_size, max_seq_len]) + ft_decoding_seq_lens = results.pop(0).reshape([-1, beam_size]) + if is_return_output_log_probs: + ft_output_log_probs = results.pop(0) + if is_return_cum_log_probs: + ft_cum_log_probs = results.pop(0) + return ft_decoding_outputs.cpu().numpy(), ft_decoding_seq_lens.cpu().numpy() \ No newline at end of file diff --git a/examples/pytorch/t5/utils/ft_encoder.py b/examples/pytorch/t5/utils/ft_encoder.py index 0dbc62c6f..6f9f09e7f 100644 --- a/examples/pytorch/t5/utils/ft_encoder.py +++ b/examples/pytorch/t5/utils/ft_encoder.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -18,35 +18,49 @@ import numpy as np class FTT5EncoderWeight(object): - def __init__(self, config, tensor_para_size, pipeline_para_size): + def __init__(self, config, tensor_para_size, pipeline_para_size, t5_with_bias = False, position_embedding_type = 0): self.num_layer = config.num_layers self.config = config self.tensor_para_size = tensor_para_size self.pipeline_para_size = pipeline_para_size + self.t5_with_bias = t5_with_bias + self.real_weights_num = 20 if t5_with_bias else 11 + self.position_embedding_type = position_embedding_type self.w = [] - - try: - dist.init_process_group(backend='mpi') - except: - print("[INFO] WARNING: Have initalize the process group") - - self.rank = dist.get_rank() + self.use_mpi = dist.is_mpi_available() + + if self.use_mpi: + try: + dist.init_process_group(backend='mpi') + except: + print("[INFO] WARNING: Exception occurred in dist.init_process_group(backend='mpi'). Maybe the process group has been initialized somewhere else.") + else: + print("[INFO] MPI is not available in this PyTorch build.") + assert tensor_para_size == 1, "[FATAL] MPI is required for tensor_para_size > 1." + assert pipeline_para_size == 1, "[FATAL] MPI is required for pipeline_para_size > 1." + + self.rank = dist.get_rank() if self.use_mpi else 0 self.device_count = torch.cuda.device_count() self.device = self.rank % self.device_count torch.cuda.set_device(self.device) - world_size = dist.get_world_size() + world_size = dist.get_world_size() if self.use_mpi else 1 assert world_size == tensor_para_size * pipeline_para_size, "[ERROR] world_size != tensor_para_size * pipeline_para_size" self.tensor_para_rank = self.rank % self.tensor_para_size self.pipeline_para_rank = self.rank // self.tensor_para_size - - def load_from_model(self, model): + + def load_from_model(self, model): # assume this only applies to huggingface models start_layer = self.pipeline_para_rank * self.num_layer // self.pipeline_para_size end_layer = (self.pipeline_para_rank + 1) * self.num_layer // self.pipeline_para_size encoder_weight_dict = {} for name, param in model.named_parameters(): - param_t = param.T + if param.dim() == 2: + param_t = param.transpose(1, 0) + elif param.dim() == 1: + param_t = param + else: + assert False, f"The dimension of param {name} should be 2" if name.find("encoder.block") != -1 or name.find("encoder.final_layer_norm.weight") != -1: encoder_weight_dict[name] = param_t @@ -72,8 +86,12 @@ def load_from_model(self, model): self.w.append(t.split(t.shape[0] // self.tensor_para_size, dim=0)[self.tensor_para_rank].contiguous()) t = model.get_input_embeddings().weight.contiguous().cuda() self.w.append(t) + + #TODO: pass None Type to Torch Op + for i in range(9): + self.w.append(torch.empty((1,1), dtype=torch.float32).contiguous().cuda()) - def load_from_bin(self, ckpt_path): + def load_from_bin(self, ckpt_path): # assume this only applies to megatron models start_layer = self.pipeline_para_rank * self.num_layer // self.pipeline_para_size end_layer = (self.pipeline_para_rank + 1) * self.num_layer // self.pipeline_para_size # load by binary files @@ -95,36 +113,72 @@ def load_from_bin(self, ckpt_path): self.w.append(t) t = torch.from_numpy(np.fromfile(f"{ckpt_path}/encoder.final_layer_norm.weight.bin", dtype=np.single)).contiguous().cuda() self.w.append(t) - t = torch.from_numpy(np.fromfile(f"{ckpt_path}/encoder.block.0.layer.0.SelfAttention.relative_attention_bias.weight.{self.tensor_para_rank}.bin", dtype=np.single)).contiguous().cuda() + t = None + if (self.position_embedding_type == 0): + t = torch.from_numpy(np.fromfile(f"{ckpt_path}/encoder.block.0.layer.0.SelfAttention.relative_attention_bias.weight.{self.tensor_para_rank}.bin", dtype=np.single)).contiguous().cuda() + else: + t = torch.from_numpy(np.fromfile(f"{ckpt_path}/shared.ape.bin", dtype=np.single)).contiguous().cuda() self.w.append(t) t = torch.from_numpy(np.fromfile(f"{ckpt_path}/shared.weight_T.bin", dtype=np.single).reshape([self.config.d_model, self.config.vocab_size])).contiguous().cuda() self.w.append(t) + # add 9 additional bias if it is t5 megatron structure + if self.t5_with_bias: + t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/encoder.block.{i}.layer.0.layer_norm.bias.bin", dtype=np.single)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/encoder.block.{i}.layer.0.SelfAttention.q.bias.{self.tensor_para_rank}.bin", dtype=np.single)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/encoder.block.{i}.layer.0.SelfAttention.k.bias.{self.tensor_para_rank}.bin", dtype=np.single)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/encoder.block.{i}.layer.0.SelfAttention.v.bias.{self.tensor_para_rank}.bin", dtype=np.single)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/encoder.block.{i}.layer.0.SelfAttention.o.bias.bin", dtype=np.single)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/encoder.block.{i}.layer.1.layer_norm.bias.bin", dtype=np.single)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/encoder.block.{i}.layer.1.DenseReluDense.wi.bias.{self.tensor_para_rank}.bin", dtype=np.single)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + t = torch.stack([torch.from_numpy(np.fromfile(f"{ckpt_path}/encoder.block.{i}.layer.1.DenseReluDense.wo.bias.bin", dtype=np.single)) for i in range(start_layer, end_layer)], 0).contiguous().cuda() + self.w.append(t) + t = torch.from_numpy(np.fromfile(f"{ckpt_path}/encoder.final_layer_norm.bias.bin", dtype=np.single)).contiguous().cuda() + self.w.append(t) + else: + #TODO: pass None Type to Torch Op + for i in range(9): + self.w.append(torch.empty((1,1), dtype=torch.float32).contiguous().cuda()) + def to_cuda(self): - for i in range(len(self.w)): + for i in range(self.real_weights_num): self.w[i] = self.w[i].cuda() def to_half(self): - for i in range(len(self.w)): + for i in range(self.real_weights_num): self.w[i] = self.w[i].half() class FTT5Encoder(nn.Module): def __init__(self, encoder_weight_list, lib_path, head_num, head_size, inter_size, d_model, is_remove_padding, - num_layer, num_bucket=32, max_distance=128, sparse=False, q_scaling=1.0, tensor_para_size=1, pipeline_para_size=1): + num_layer, num_bucket=32, max_distance=128, sparse=False, q_scaling=1.0, tensor_para_size=1, pipeline_para_size=1, t5_with_bias=False, position_embedding_type=0): super().__init__() - try: - dist.init_process_group(backend='mpi') - except: - print("[INFO] WARNING: Have initalize the process group") + self.use_mpi = dist.is_mpi_available() + + if self.use_mpi: + try: + dist.init_process_group(backend='mpi') + except: + print("[INFO] WARNING: Exception occurred in dist.init_process_group(backend='mpi'). Maybe the process group has been initialized somewhere else.") + else: + print("[INFO] MPI is not available in this PyTorch build.") + assert tensor_para_size == 1, "[FATAL] MPI is required for tensor_para_size > 1." + assert pipeline_para_size == 1, "[FATAL] MPI is required for pipeline_para_size > 1." torch.classes.load_library(lib_path) try: self.encoder = torch.classes.FasterTransformer.T5Encoder(*encoder_weight_list, head_num, head_size, inter_size, d_model, - is_remove_padding, num_layer, num_bucket, max_distance, sparse, q_scaling, tensor_para_size, pipeline_para_size) + is_remove_padding, num_layer, num_bucket, max_distance, sparse, q_scaling, tensor_para_size, pipeline_para_size, t5_with_bias, position_embedding_type) except: self.encoder = torch.classes.FasterTransformerT5Encoder(*encoder_weight_list, head_num, head_size, inter_size, d_model, - is_remove_padding, num_layer, num_bucket, max_distance, sparse, q_scaling, tensor_para_size, pipeline_para_size) + is_remove_padding, num_layer, num_bucket, max_distance, sparse, q_scaling, tensor_para_size, pipeline_para_size, t5_with_bias, position_embedding_type) def forward(self, input, seq_len): output = self.encoder.forward(input, seq_len) diff --git a/examples/pytorch/t5/utils/huggingface_t5_ckpt_convert.py b/examples/pytorch/t5/utils/huggingface_t5_ckpt_convert.py new file mode 100644 index 000000000..41cb01d76 --- /dev/null +++ b/examples/pytorch/t5/utils/huggingface_t5_ckpt_convert.py @@ -0,0 +1,168 @@ +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import argparse +import configparser +from datetime import datetime +from pathlib import Path + +import sys +import os +dir_path = os.path.dirname(os.path.realpath(__file__)) +sys.path.append(dir_path + "/../../../../3rdparty/transformers/src/") + +from transformers import T5ForConditionalGeneration # transformers-4.10.0-py3 + +import numpy as np +import torch # pytype: disable=import-error + +rename_mapping={"relative_attention_num_buckets":"relative_attention_num_buckets_or_max_pos_seq_len"} +new_configs={"structure":{"t5_with_bias":"0", "position_embedding_type":"0"}} + +def get_weight_data_type(data_type): + if data_type == "fp32": + return np.float32 + elif data_type == "fp16": + return np.float16 + else: + assert False, f"Invalid weight data type {data_type}" + +def fuse_decoder_qkv(model, factor, saved_dir, np_weight_data_type): + model_dict = {} + for name, param in model.named_parameters(): + if name.find("decoder") != -1 and name.find("SelfAttention") != -1: + model_dict[name] = param + + for i in range(model.decoder.config.num_layers): + shape = model_dict[f"decoder.block.{i}.layer.0.SelfAttention.q.weight"].T.shape + qkv = torch.cat([model_dict[f"decoder.block.{i}.layer.0.SelfAttention.q.weight"].T, + model_dict[f"decoder.block.{i}.layer.0.SelfAttention.k.weight"].T, + model_dict[f"decoder.block.{i}.layer.0.SelfAttention.v.weight"].T], dim=-1) + + qkv = qkv.reshape([shape[0], 3, shape[1]]) + qkv = qkv.cpu().detach().numpy().astype(np_weight_data_type) + + split_vals = np.split(qkv, factor, axis=-1) + for j in range(factor): + saved_path = saved_dir / f"decoder.block.{i}.layer.0.SelfAttention.qkv.weight.{j}.bin" + split_vals[j].tofile(saved_path.as_posix()) + +def split_and_convert_process(key, val, factor, saved_dir, np_weight_data_type): + val = val.T.cpu().detach().numpy().astype(np_weight_data_type) + saved_key = key + + if key.find("shared.weight") != -1: + # shared weights, only need to convert the weights of rank 0 + saved_path = saved_dir / f"{saved_key}.bin" + val.tofile(saved_path.as_posix()) + + saved_path = saved_dir / f"{saved_key}_T.bin" + val.T.tofile(saved_path.as_posix()) + elif key.find("layer_norm.weight") != -1: + # shared weights, only need to convert the weights of rank 0 + saved_path = saved_dir / f"{saved_key}.bin" + val.tofile(saved_path.as_posix()) + + elif ( + key.find("SelfAttention.o.weight") != -1 + or key.find("EncDecAttention.o.weight") != -1 + or key.find("DenseReluDense.wo.weight") != -1 + ): + split_vals = np.split(val, factor, axis=0) + for j in range(factor): + saved_path = saved_dir / f"{saved_key}.{j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + + elif ( + key.find("DenseReluDense.wi.weight") != -1 + or (key.find("encoder") != -1 and ( + key.find("SelfAttention.q.weight") != -1 + or key.find("SelfAttention.k.weight") != -1 + or key.find("SelfAttention.v.weight") != -1 + ) + ) + or key.find("EncDecAttention.q.weight") != -1 + or key.find("EncDecAttention.k.weight") != -1 + or key.find("EncDecAttention.v.weight") != -1 + ): + split_vals = np.split(val, factor, axis=-1) + for j in range(factor): + saved_path = saved_dir / f"{saved_key}.{j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + elif key.find("relative_attention_bias") != -1: + split_vals = np.split(val, factor, axis=0) + for j in range(factor): + saved_path = saved_dir / f"{saved_key}.{j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + elif ( + key.find("decoder") != -1 and + ( + key.find("SelfAttention.q.weight") != -1 + or key.find("SelfAttention.k.weight") != -1 + or key.find("SelfAttention.v.weight") != -1 + ) + ): + pass + else: + print(f"[ERROR] cannot find key '{key}'") + +def convert_checkpoint(args): + saved_dir = Path(args.saved_dir) / f"{args.infer_gpu_num:d}-gpu" + saved_dir.mkdir(parents=True, exist_ok=True) + + t5_model = T5ForConditionalGeneration.from_pretrained(args.in_file) + config = configparser.ConfigParser() + + config["encoder"] = {} + for key, val in t5_model.encoder.config.to_dict().items(): + config["encoder"][key] = f"{val}" + config["encoder"]["weight_data_type"] = args.weight_data_type + config["decoder"] = {} + for key, val in t5_model.decoder.config.to_dict().items(): + config["decoder"][key] = f"{val}" + config["decoder"]["weight_data_type"] = args.weight_data_type + for key, val in rename_mapping.items(): + config['encoder'][val] = config['encoder'].pop(key) + config['decoder'][val] = config['decoder'].pop(key) + for key, val in new_configs.items(): + config[key] = {} + for val_key, val_val in val.items(): + config[key][val_key] = val_val + with open((saved_dir / f"config.ini").as_posix(), 'w') as configfile: + config.write(configfile) + np_weight_data_type = get_weight_data_type(args.weight_data_type) + + i_gpu_num = args.infer_gpu_num + + for name, param in t5_model.named_parameters(): + split_and_convert_process(name, param, i_gpu_num, saved_dir, np_weight_data_type) + fuse_decoder_qkv(t5_model, i_gpu_num, saved_dir, np_weight_data_type) + +if __name__ == "__main__": + parser = argparse.ArgumentParser(formatter_class=argparse.RawTextHelpFormatter) + parser.add_argument("-saved_dir", "-o", type=str, help="file name of output file", required=True) + parser.add_argument("-in_file", "-i", type=str, help="file name of input checkpoint file", required=True) + parser.add_argument("-infer_gpu_num", "-i_g", type=int, help="How many gpus for inference", required=True) + parser.add_argument("-weight_data_type", type=str, default="fp32", choices=["fp32", "fp16"]) + args = parser.parse_args() + print("\n=============== Argument ===============") + for key in vars(args): + print(f"{key}: {vars(args)[key]}") + print("========================================") + + start_time = datetime.now() + convert_checkpoint(args) + stop_time = datetime.now() + run_time = (stop_time - start_time) + print("[INFO] Spend {} (h:m:s) to convert the model".format(run_time)) diff --git a/examples/pytorch/t5/utils/megatron_t5_ckpt_convert.py b/examples/pytorch/t5/utils/megatron_t5_ckpt_convert.py new file mode 100644 index 000000000..7d0d01b2d --- /dev/null +++ b/examples/pytorch/t5/utils/megatron_t5_ckpt_convert.py @@ -0,0 +1,548 @@ +# Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import argparse +import configparser +from datetime import datetime +import multiprocessing +from pathlib import Path + +import numpy as np +import torch # pytype: disable=import-error +import sys + +sys.path.append("/workdir/megatron-lm") + +shared_mapping = { + "wte":"shared.weight", + "wte_T":"shared.weight_T", + "ape":"shared.ape", + "encoder_rpe":"block.0.layer.0.SelfAttention.relative_attention_bias", + "decoder_rpe":"block.0.layer.0.SelfAttention.relative_attention_bias" +} + +encoder_mapping = { + "input_layernorm":"layer.0.layer_norm", + "self_attention.query_key_value":["layer.0.SelfAttention.q", "layer.0.SelfAttention.k", "layer.0.SelfAttention.v"], + "self_attention.dense":"layer.0.SelfAttention.o", + "post_attention_layernorm":"layer.1.layer_norm", + "mlp.dense_h_to_4h":"layer.1.DenseReluDense.wi", + "mlp.dense_4h_to_h":"layer.1.DenseReluDense.wo", + "final_layernorm":"final_layer_norm" +} + +decoder_mapping = { + "input_layernorm":"layer.0.layer_norm", + "self_attention.query_key_value":["layer.0.SelfAttention.qkv"], + "self_attention.dense":"layer.0.SelfAttention.o", + "post_attention_layernorm":"layer.1.layer_norm", + "inter_attention.query":["layer.1.EncDecAttention.q"], + "inter_attention.key_value":["layer.1.EncDecAttention.k","layer.1.EncDecAttention.v"], + "inter_attention.dense":"layer.1.EncDecAttention.o", + "post_inter_attention_layernorm":"layer.2.layer_norm", + "mlp.dense_h_to_4h":"layer.2.DenseReluDense.wi", + "mlp.dense_4h_to_h":"layer.2.DenseReluDense.wo", + "final_layernorm":"final_layer_norm" +} + +megatron_HF_name_mapping = { + "shared":shared_mapping, + "encoder":encoder_mapping, + "decoder":decoder_mapping +} + +encoder_config_mapping = { + "num_attention_heads":"num_heads", + "kv_channels":"d_kv", + "hidden_size":"d_model", + "ffn_hidden_size":"d_ff", + "num_layers":"num_layers", + "padded_vocab_size":"vocab_size", + "max_position_embeddings":"relative_attention_num_buckets_or_max_pos_seq_len", + "relative_position_num_buckets":"relative_attention_num_buckets_or_max_pos_seq_len" +} + +decoder_config_mapping = { + "num_attention_heads":"num_heads", + "kv_channels":"d_kv", + "hidden_size":"d_model", + "ffn_hidden_size":"d_ff", + "num_layers":"num_layers", + "padded_vocab_size":"vocab_size", + "max_position_embeddings":"relative_attention_num_buckets_or_max_pos_seq_len", + "relative_position_num_buckets":"relative_attention_num_buckets_or_max_pos_seq_len" +} + +decoder_new_config = { + "decoder_start_token_id":30522, ## need to adjust + "eos_token_id":30523 ## need to adjust +} + +model_new_config = {"structure":{"t5_with_bias":1, "position_embedding_type":0}} + +def get_weight_data_type(data_type): + if data_type == "fp32": + return np.float32 + elif data_type == "fp16": + return np.float16 + else: + assert False, f"Invalid weight data type {data_type}" + +def convert_megatron_to_HF_naming_style_single(saved_key, name_mapping): + saved_key = saved_key.replace("layers","block") + mapping_key = saved_key.rsplit(sep=".", maxsplit=1)[0] + mapping_key_no_num = mapping_key[mapping_key.find(".", 6) + 1 :] + block_num = mapping_key[: mapping_key.find(".", 6) + 1] + weight_or_bias = saved_key.rsplit(sep=".", maxsplit=1)[1] + saved_key = block_num + name_mapping[mapping_key_no_num] + "." + weight_or_bias + return saved_key + +def convert_megatron_to_HF_naming_style_multiple(saved_key, name_mapping): + saved_key = saved_key.replace("layers","block") + mapping_key = saved_key.rsplit(sep=".", maxsplit=1)[0] + mapping_key_no_num = mapping_key[mapping_key.find(".", 6) + 1 :] + mapping_vals_no_num = name_mapping[mapping_key_no_num] + block_num = mapping_key[: mapping_key.find(".", 6) + 1] + weight_or_bias = saved_key.rsplit(sep=".", maxsplit=1)[1] + saved_keys = [block_num + val + "." + weight_or_bias for val in mapping_vals_no_num] + return saved_keys + +def _gpu_map_location(storage, loc): + if loc.startswith("cuda"): + training_gpu_idx = int(loc.split(":")[1]) + inference_gpu_idx = training_gpu_idx % torch.cuda.device_count() + return storage.cuda(inference_gpu_idx) + elif loc.startswith("cpu"): + return storage.cpu() + else: + raise NotImplementedError(f"Not handled {loc}") + +# This tool is used to support the new megatron model trained by pipeline parallel + tensor parallel +def merge_and_convert_process(model_type, i, pipeline_para_rank, saved_dir, factor, key, model_args, transformer_model_list, ckpt_ver, np_weight_data_type): + prefix = model_type + name_mapping = megatron_HF_name_mapping[model_type] + saved_dir = Path(saved_dir) + if key.find("layers.") != -1: + layer_index = (int)(key[7 : key.find(".", 7)]) + saved_key = key.replace( + "layers.%d." % layer_index, + "layers.%d." % (layer_index + pipeline_para_rank * model_args.num_layers // model_args.pipeline_model_parallel_size)) + else: + saved_key = key + major_device = transformer_model_list[0][key].device + + if ( + key.find("input_layernorm.weight") != -1 + or key.find("input_layernorm.bias") != -1 + or key.find("self_attention.dense.bias") != -1 + or key.find("inter_attention.dense.bias") != -1 + or key.find("post_attention_layernorm.weight") != -1 + or key.find("post_inter_attention_layernorm.weight") != -1 + or key.find("post_attention_layernorm.bias") != -1 + or key.find("post_inter_attention_layernorm.bias") != -1 + or key.find("mlp.dense_4h_to_h.bias") != -1 + or key.find("final_layernorm.weight") != -1 + or key.find("final_layernorm.bias") != -1): + + # shared weights, only need to convert the weights of rank 0 + if i == 0: + val = transformer_model_list[0][key].T.float().cpu().numpy() + saved_key = convert_megatron_to_HF_naming_style_single(saved_key, name_mapping) + saved_path = saved_dir / f"{prefix}.{saved_key}.bin" + np.squeeze(val).astype(np_weight_data_type).tofile(saved_path) + + elif (key.find("self_attention.dense.weight") != -1 + or key.find("inter_attention.dense.weight") != -1 + or key.find("mlp.dense_4h_to_h.weight") != -1): + vals = [] + for k in range(factor): + vals.append(transformer_model_list[k][key].T.float().to(major_device)) + saved_key = convert_megatron_to_HF_naming_style_single(saved_key, name_mapping) + torch.cat(vals, dim=0).cpu().numpy().astype(np_weight_data_type).tofile(saved_path) + + elif key.find("mlp.dense_h_to_4h.weight") != -1 or key.find("mlp.dense_h_to_4h.bias") != -1: + vals = [] + for k in range(factor): + vals.append(transformer_model_list[k][key].T.float().to(major_device)) + saved_key = convert_megatron_to_HF_naming_style_single(saved_key, name_mapping) + saved_path = saved_dir / f"{prefix}.{saved_key}.{i:d}.bin" + torch.cat(vals, dim=-1).cpu().numpy().astype(np_weight_data_type).tofile(saved_path) + + elif (key.find("self_attention.query_key_value.bias") != -1 + or key.find("inter_attention.query.bias") != -1 + or key.find("inter_attention.key_value.bias") != -1): + num_splits = 3 + if key.find("inter_attention.key_value.bias") != -1: + num_splits = 2 + if key.find("inter_attention.query.bias") != -1: + num_splits = 1 + vals = [] + for k in range(factor): + val = transformer_model_list[k][key].T.float() + local_dim = int(val.shape[-1] / num_splits) + if ckpt_ver == 3: + head_num = model_args.num_attention_heads // model_args.tensor_model_parallel_size + size_per_head = model_args.kv_channels + val = val.reshape(head_num, num_splits, size_per_head) + val = val.permute(1, 0, 2) + val = val.reshape(num_splits, local_dim) + vals.append(val.to(major_device)) + + saved_vals = torch.cat(vals, dim=-1) + saved_keys = convert_megatron_to_HF_naming_style_multiple(saved_key, name_mapping) + if len(saved_keys) == 1: + saved_path = saved_dir / f"{prefix}.{saved_keys[0]}.{i:d}.bin" + saved_vals.cpu().numpy().astype(np_weight_data_type).tofile(saved_path) + return + for index in range(len(saved_keys)): + saved_path = saved_dir / f"{prefix}.{saved_keys[index]}.{i:d}.bin" + saved_vals[index,...].cpu().numpy().astype(np_weight_data_type).tofile(saved_path) + + elif (key.find("self_attention.query_key_value.weight") != -1 + or key.find("inter_attention.query.weight") != -1 + or key.find("inter_attention.key_value.weight") != -1): + num_splits = 3 + if key.find("inter_attention.key_value.weight") != -1: + num_splits = 2 + if key.find("inter_attention.query.weight") != -1: + num_splits = 1 + vals = [] + for k in range(factor): + val = transformer_model_list[k][key].T.float() + hidden_dim = val.shape[0] + local_dim = int(val.shape[-1] / num_splits) + if ckpt_ver == 3: + head_num = model_args.num_attention_heads + size_per_head = model_args.kv_channels + head_num = head_num // model_args.tensor_model_parallel_size + val = val.reshape(hidden_dim, head_num, num_splits, size_per_head) + val = val.permute(0, 2, 1, 3) + val = val.reshape(hidden_dim, num_splits, local_dim) + vals.append(val.to(major_device)) + + saved_vals = torch.cat(vals, dim=-1) + saved_keys = convert_megatron_to_HF_naming_style_multiple(saved_key, name_mapping) + if len(saved_keys) == 1: + saved_path = saved_dir / f"{prefix}.{saved_keys[0]}.{i:d}.bin" + saved_vals.cpu().numpy().astype(np_weight_data_type).tofile(saved_path) + return + for index in range(len(saved_keys)): + saved_path = saved_dir / f"{prefix}.{saved_keys[index]}.{i:d}.bin" + saved_vals[:, index, ...].cpu().numpy().astype(np_weight_data_type).tofile(saved_path) + else: + print(f"[ERROR] cannot find key '{key}'") + +def split_and_convert_process(model_type, i, pipeline_para_rank, saved_dir, factor, key, model_args, transformer_model_list, ckpt_ver, np_weight_data_type): + prefix = model_type + name_mapping = megatron_HF_name_mapping[model_type] + val = transformer_model_list[0][key].T.float().cpu().numpy().astype(np_weight_data_type) + del transformer_model_list[0][key] + + if key.find("layers.") != -1: + layer_index = (int)(key[7 : key.find(".", 7)]) + saved_key = key.replace( + "layers.%d." % layer_index, + "layers.%d." % (layer_index + pipeline_para_rank * model_args.num_layers // model_args.pipeline_model_parallel_size)) + else: + saved_key = key + + if ( + key.find("input_layernorm.weight") != -1 + or key.find("input_layernorm.bias") != -1 + or key.find("self_attention.dense.bias") != -1 + or key.find("inter_attention.dense.bias") != -1 + or key.find("post_attention_layernorm.weight") != -1 + or key.find("post_inter_attention_layernorm.weight") != -1 + or key.find("post_attention_layernorm.bias") != -1 + or key.find("post_inter_attention_layernorm.bias") != -1 + or key.find("mlp.dense_4h_to_h.bias") != -1 + or key.find("final_layernorm.weight") != -1 + or key.find("final_layernorm.bias") != -1): + # shared weights, only need to convert the weights of rank 0 + if i == 0: + saved_key = convert_megatron_to_HF_naming_style_single(saved_key, name_mapping) + saved_path = saved_dir / f"{prefix}.{saved_key}.bin" + val.tofile(saved_path.as_posix()) + + elif (key.find("self_attention.dense.weight") != -1 + or key.find("inter_attention.dense.weight") != -1 + or key.find("mlp.dense_4h_to_h.weight") != -1): + split_vals = np.split(val, factor, axis=0) + saved_key = convert_megatron_to_HF_naming_style_single(saved_key, name_mapping) + for j in range(factor): + saved_path = saved_dir / f"{prefix}.{saved_key}.{i * factor + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + + elif key.find("mlp.dense_h_to_4h.weight") != -1 or key.find("mlp.dense_h_to_4h.bias") != -1: + split_vals = np.split(val, factor, axis=-1) + saved_key = convert_megatron_to_HF_naming_style_single(saved_key, name_mapping) + for j in range(factor): + saved_path = saved_dir / f"{prefix}.{saved_key}.{i * factor + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + + elif (key.find("self_attention.query_key_value.bias") != -1 + or key.find("inter_attention.query.bias") != -1 + or key.find("inter_attention.key_value.bias") != -1): + num_splits = 3 + if key.find("inter_attention.key_value.bias") != -1: + num_splits = 2 + if key.find("inter_attention.query.bias") != -1: + num_splits = 1 + local_dim = int(val.shape[-1] / num_splits) + if ckpt_ver == 3: + head_num = model_args.num_attention_heads // model_args.tensor_model_parallel_size + size_per_head = model_args.kv_channels + val = val.reshape(head_num, num_splits, size_per_head) + val = val.transpose(1, 0, 2) + + val = val.reshape(num_splits, local_dim) + split_vals = np.split(val, factor, axis=-1) + saved_keys = convert_megatron_to_HF_naming_style_multiple(saved_key, name_mapping) + for j in range(factor): + if len(saved_keys) == 1: + saved_path = saved_dir / f"{prefix}.{saved_keys[0]}.{i * factor + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + continue + for index in range(len(saved_keys)): + saved_path = saved_dir / f"{prefix}.{saved_keys[index]}.{i * factor + j:d}.bin" + split_vals[j][index, ...].tofile(saved_path.as_posix()) + + elif (key.find("self_attention.query_key_value.weight") != -1 + or key.find("inter_attention.query.weight") != -1 + or key.find("inter_attention.key_value.weight") != -1): + num_splits = 3 + if key.find("inter_attention.key_value.weight") != -1: + num_splits = 2 + if key.find("inter_attention.query.weight") != -1: + num_splits = 1 + hidden_dim = val.shape[0] + local_dim = int(val.shape[-1] / num_splits) + + if ckpt_ver == 3: + head_num = model_args.num_attention_heads + size_per_head = model_args.kv_channels + head_num = head_num // model_args.tensor_model_parallel_size + val = val.reshape(hidden_dim, head_num, num_splits, size_per_head) + val = val.transpose(0, 2, 1, 3) + + val = val.reshape(hidden_dim, num_splits, local_dim) + split_vals = np.split(val, factor, axis=-1) + + saved_keys = convert_megatron_to_HF_naming_style_multiple(saved_key, name_mapping) + for j in range(factor): + if len(saved_keys) == 1: + saved_path = saved_dir / f"{prefix}.{saved_keys[0]}.{i * factor + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + continue + for index in range(len(saved_keys)): + saved_path = saved_dir / f"{prefix}.{saved_keys[index]}.{i * factor + j:d}.bin" + split_vals[j][:, index, ...].tofile(saved_path.as_posix()) + else: + print(f"[ERROR] cannot find key '{key}'") + +def convert_checkpoint(args): + saved_dir = Path(args.saved_dir) / f"{args.infer_gpu_num:d}-gpu" + saved_dir.mkdir(parents=True, exist_ok=True) + + prefix = Path(args.in_file) + ckpt_name = "model_optim_rng.pt" + + # load position_embedding from rank 0 + if (prefix / "mp_rank_00").is_dir(): + model_00 = torch.load((prefix / "mp_rank_00" / ckpt_name).as_posix(), map_location=_gpu_map_location) + elif (prefix / "mp_rank_00_000").is_dir(): + model_00 = torch.load((prefix / "mp_rank_00_000" / ckpt_name).as_posix(), map_location=_gpu_map_location) + else: + print(f"[ERROR] Cannot find checkpoint in {prefix}.") + exit(1) + + model_args = model_00["args"] + + # update model structure config + if not hasattr(model_args, 'position_embedding_type') or model_args.position_embedding_type == "absolute": + model_new_config["structure"]["position_embedding_type"] = 1 + config = configparser.ConfigParser() + + config["encoder"] = {} + config["decoder"] = {} + for key, val in vars(model_args).items(): + if key in encoder_config_mapping.keys(): + config["encoder"][encoder_config_mapping[key]] = f"{val}" + if key in decoder_config_mapping.keys(): + config["decoder"][decoder_config_mapping[key]] = f"{val}" + for key, val in decoder_new_config.items(): + config["decoder"][key] = f"{val}" + for key, val in model_new_config.items(): + config[key] = {} + for val_key, val_val in val.items(): + config[key][val_key] = f"{val_val}" + + ## add weight data type + np_weight_data_type = get_weight_data_type(args.weight_data_type) + config['encoder']['weight_data_type'] = args.weight_data_type + config['decoder']['weight_data_type'] = args.weight_data_type + + # add model name + config["encoder"]["_name_or_path"] = args.model_name + config["decoder"]["_name_or_path"] = args.model_name + + # add weight data type + config["encoder"]["weight_data_type"] = args.weight_data_type + config["decoder"]["weight_data_type"] = args.weight_data_type + + np_weight_data_type = get_weight_data_type(args.weight_data_type) + + with open((saved_dir / f"config.ini").as_posix(), 'w') as configfile: + config.write(configfile) + + if "position_embeddings" in model_00["model"]["language_model"]["embedding"].keys(): + model_00["model"]["language_model"]["embedding"]["position_embeddings"]["weight"] \ + .float().cpu().numpy().astype(np_weight_data_type) \ + .tofile((saved_dir / "shared.ape.bin").as_posix()) + + # inference factor calculation + t_gpu_num = model_args.tensor_model_parallel_size + i_gpu_num = args.infer_gpu_num + + if t_gpu_num > i_gpu_num: + assert t_gpu_num % i_gpu_num == 0 + is_merge_ckpt = True + factor = int(t_gpu_num / i_gpu_num) + else: + assert i_gpu_num % t_gpu_num == 0 + is_merge_ckpt = False + factor = int(i_gpu_num / t_gpu_num) + + main_loop = min(t_gpu_num, i_gpu_num) + + # split rpe into tensor parallel ranks + if "encoder_relative_position_embedding" in model_00["model"]["language_model"].keys(): + encoder_relative_position_embedding = model_00["model"]["language_model"]["encoder_relative_position_embedding"]["weight"] \ + .T.float().cpu().numpy().astype(np_weight_data_type) + encoder_relative_position_embedding_split = np.split(encoder_relative_position_embedding, i_gpu_num, axis=0) + for i in range(i_gpu_num): + saved_path = saved_dir / f"encoder.block.0.layer.0.SelfAttention.relative_attention_bias.weight.{i}.bin" + encoder_relative_position_embedding_split[i].tofile(saved_path.as_posix()) + + del encoder_relative_position_embedding, encoder_relative_position_embedding_split + + if "decoder_relative_position_embedding" in model_00["model"]["language_model"].keys(): + decoder_relative_position_embedding = model_00["model"]["language_model"]["decoder_relative_position_embedding"]["weight"] \ + .T.float().cpu().numpy().astype(np_weight_data_type) + decoder_relative_position_embedding_split = np.split(decoder_relative_position_embedding, i_gpu_num, axis=0) + for i in range(i_gpu_num): + saved_path = saved_dir / f"decoder.block.0.layer.0.SelfAttention.relative_attention_bias.weight.{i}.bin" + decoder_relative_position_embedding_split[i].tofile(saved_path.as_posix()) + + del decoder_relative_position_embedding, decoder_relative_position_embedding_split + + del model_00 + w_e_list = [] + + torch.multiprocessing.set_start_method("spawn") + pool = multiprocessing.Pool(args.processes) + for i in range(main_loop): + for j in range(model_args.pipeline_model_parallel_size): + if model_args.pipeline_model_parallel_size == 1: + layer_rank_num = "" + else: + layer_rank_num = f"_{j:03d}" + + encoder_models = [] + decoder_models = [] + + if is_merge_ckpt == True: + for k in range(factor): + m = torch.load((prefix / f"mp_rank_{i * factor + k:02d}{layer_rank_num}" / ckpt_name).as_posix(), map_location=_gpu_map_location) + encoder_models.append(m["model"]["language_model"]["encoder"]) + decoder_models.append(m["model"]["language_model"]["decoder"]) + + if j == 0: + w_e_list.append(m["model"]["language_model"]["embedding"]["word_embeddings"]["weight"].float().cpu().numpy().astype(np_weight_data_type)) + else: + m = torch.load((prefix / f"mp_rank_{i:02d}{layer_rank_num}" / ckpt_name).as_posix(), map_location=_gpu_map_location) + + if j == 0: + w_e_list.append( + m["model"]["language_model"]["embedding"]["word_embeddings"]["weight"] + .float() + .cpu() + .numpy() + .astype(np_weight_data_type) + ) + encoder_models.append(m["model"]["language_model"]["encoder"]) + decoder_models.append(m["model"]["language_model"]["decoder"]) + + pool.starmap( + merge_and_convert_process if is_merge_ckpt == True else split_and_convert_process, + [ + ( + "encoder", + i, + j, + saved_dir, + factor, + k, + model_args, + encoder_models, + m["checkpoint_version"], + np_weight_data_type + ) + for k in encoder_models[0].keys() + ], + ) + pool.starmap( + merge_and_convert_process if is_merge_ckpt == True else split_and_convert_process, + [ + ( + "decoder", + i, + j, + saved_dir, + factor, + k, + model_args, + decoder_models, + m["checkpoint_version"], + np_weight_data_type + ) + for k in decoder_models[0].keys() + ], + ) + + pool.close() + pool.join() + + np.concatenate(w_e_list, axis=0).tofile((saved_dir / "shared.weight_T.bin").as_posix()) + m["model"]["lm_head"]["bias"].float().cpu().numpy().tofile((saved_dir / "shared.bias.bin").as_posix()) + +if __name__ == "__main__": + parser = argparse.ArgumentParser(formatter_class=argparse.RawTextHelpFormatter) + parser.add_argument("-saved_dir", "-o", type=str, help="file name of output file", required=True) + parser.add_argument("-in_file", "-i", type=str, help="file name of input checkpoint file", required=True) + parser.add_argument("-infer_gpu_num", "-i_g", type=int, help="How many gpus for inference", required=True) + parser.add_argument("-processes", "-p", type=int, help="How many processes to spawn for conversion (default: 64)", default=64) + parser.add_argument("-weight_data_type", type=str, default="fp32", choices=["fp32", "fp16"]) + parser.add_argument("-model_name", "-m", type=str, help="model name", required=True) + args = parser.parse_args() + print("\n=============== Argument ===============") + for key in vars(args): + print(f"{key}: {vars(args)[key]}") + print("========================================") + + start_time = datetime.now() + convert_checkpoint(args) + stop_time = datetime.now() + run_time = (stop_time - start_time) + print("[INFO] Spend {} (h:m:s) to convert the model".format(run_time)) diff --git a/examples/pytorch/t5/utils/nemo_t5_ckpt_convert.py b/examples/pytorch/t5/utils/nemo_t5_ckpt_convert.py new file mode 100644 index 000000000..3e881b89b --- /dev/null +++ b/examples/pytorch/t5/utils/nemo_t5_ckpt_convert.py @@ -0,0 +1,626 @@ +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import argparse +import configparser +from datetime import datetime +import multiprocessing +from pathlib import Path + +import numpy as np +import torch # pytype: disable=import-error +import sys +import glob +import os +import tarfile +import yaml + +sys.path.append("/workdir/megatron-lm") + +shared_mapping = { + "wte":"shared.weight", + "wte_T":"shared.weight_T", + "ape":"shared.ape", + "encoder_rpe":"block.0.layer.0.SelfAttention.relative_attention_bias", + "decoder_rpe":"block.0.layer.0.SelfAttention.relative_attention_bias" +} + +encoder_mapping = { + "input_layernorm":"layer.0.layer_norm", + "self_attention.query_key_value":["layer.0.SelfAttention.q", "layer.0.SelfAttention.k", "layer.0.SelfAttention.v"], + "self_attention.dense":"layer.0.SelfAttention.o", + "post_attention_layernorm":"layer.1.layer_norm", + "mlp.dense_h_to_4h":"layer.1.DenseReluDense.wi", + "mlp.dense_4h_to_h":"layer.1.DenseReluDense.wo", + "final_layernorm":"final_layer_norm" +} + +decoder_mapping = { + "input_layernorm":"layer.0.layer_norm", + "self_attention.query_key_value":["layer.0.SelfAttention.qkv"], + "self_attention.dense":"layer.0.SelfAttention.o", + "post_attention_layernorm":"layer.1.layer_norm", + "inter_attention.query":["layer.1.EncDecAttention.q"], + "inter_attention.key_value":["layer.1.EncDecAttention.k","layer.1.EncDecAttention.v"], + "inter_attention.dense":"layer.1.EncDecAttention.o", + "post_inter_attention_layernorm":"layer.2.layer_norm", + "mlp.dense_h_to_4h":"layer.2.DenseReluDense.wi", + "mlp.dense_4h_to_h":"layer.2.DenseReluDense.wo", + "final_layernorm":"final_layer_norm" +} + +megatron_HF_name_mapping = { + "shared":shared_mapping, + "encoder":encoder_mapping, + "decoder":decoder_mapping +} + +encoder_config_mapping = { + "num_attention_heads":"num_heads", + "hidden_size":"d_model", + "kv_channels":"d_kv", + "ffn_hidden_size":"d_ff", + "num_layers":"num_layers", + "max_position_embeddings":"relative_attention_num_buckets_or_max_pos_seq_len", + "relative_position_num_buckets":"relative_attention_num_buckets_or_max_pos_seq_len" +} + +decoder_config_mapping = { + "num_attention_heads":"num_heads", + "hidden_size":"d_model", + "kv_channels":"d_kv", + "ffn_hidden_size":"d_ff", + "num_layers":"num_layers", + "max_position_embeddings":"relative_attention_num_buckets_or_max_pos_seq_len", + "relative_position_num_buckets":"relative_attention_num_buckets_or_max_pos_seq_len" +} + +decoder_new_config = { + "decoder_start_token_id":0, ## need to adjust + "eos_token_id":1 ## need to adjust +} + +model_new_config = {"structure":{"t5_with_bias":1, "position_embedding_type":0}} + +def convert_megatron_to_HF_naming_style_single(saved_key, name_mapping): + saved_key = saved_key.replace("layers","block") + mapping_key = saved_key.rsplit(sep=".", maxsplit=1)[0] + mapping_key_no_num = mapping_key[mapping_key.find(".", 6) + 1 :] + block_num = mapping_key[: mapping_key.find(".", 6) + 1] + weight_or_bias = saved_key.rsplit(sep=".", maxsplit=1)[1] + saved_key = block_num + name_mapping[mapping_key_no_num] + "." + weight_or_bias + return saved_key + +def convert_megatron_to_HF_naming_style_multiple(saved_key, name_mapping): + saved_key = saved_key.replace("layers","block") + mapping_key = saved_key.rsplit(sep=".", maxsplit=1)[0] + mapping_key_no_num = mapping_key[mapping_key.find(".", 6) + 1 :] + mapping_vals_no_num = name_mapping[mapping_key_no_num] + block_num = mapping_key[: mapping_key.find(".", 6) + 1] + weight_or_bias = saved_key.rsplit(sep=".", maxsplit=1)[1] + saved_keys = [block_num + val + "." + weight_or_bias for val in mapping_vals_no_num] + return saved_keys + +def unpack_nemo_ckpt(nemo_ckpt_path, out_folder): + """ + .nemo file is an archive (tar.gz) with the following: + model_config.yaml - model configuration in .yaml format. You can deserialize this into cfg argument for model's constructor + model_wights.chpt - model checkpoint + """ + if not os.path.exists(nemo_ckpt_path): + raise FileNotFoundError(f"{nemo_ckpt_path} does not exist") + tar_header = "r:" + try: + tar = tarfile.open(nemo_ckpt_path, tar_header) + except tarfile.ReadError: + # can be older checkpoint => try compressed tar + tar_header = "r:gz" + tar = tarfile.open(nemo_ckpt_path, tar_header) + tar.extractall(path=out_folder) + tar.close() + return out_folder + +def get_weight_data_type(data_type): + if data_type == "fp32": + return np.float32 + elif data_type == "fp16": + return np.float16 + else: + assert False, f"Invalid weight data type {data_type}" + +def _gpu_map_location(storage, loc): + if loc.startswith("cuda"): + training_gpu_idx = int(loc.split(":")[1]) + inference_gpu_idx = training_gpu_idx % torch.cuda.device_count() + return storage.cuda(inference_gpu_idx) + elif loc.startswith("cpu"): + return storage.cpu() + else: + raise NotImplementedError(f"Not handled {loc}") + +# This tool is used to support the new megatron model trained by pipeline parallel + tensor parallel +def merge_and_convert_process(model_type, i, pipeline_para_rank, saved_dir, factor, key, model_args, transformer_model_list, np_weight_data_type): + prefix = model_type + name_mapping = megatron_HF_name_mapping[model_type] + saved_dir = Path(saved_dir) + if key.find("layers.") != -1: + layer_index = (int)(key[7 : key.find(".", 7)]) + saved_key = key.replace( + "layers.%d." % layer_index, + "layers.%d." % (layer_index + pipeline_para_rank * model_args['num_layers'] // model_args['pipeline_model_parallel_size'])) + else: + saved_key = key + major_device = transformer_model_list[0][key].device + + if ( + key.find("input_layernorm.weight") != -1 + or key.find("input_layernorm.bias") != -1 + or key.find("self_attention.dense.bias") != -1 + or key.find("inter_attention.dense.bias") != -1 + or key.find("post_attention_layernorm.weight") != -1 + or key.find("post_inter_attention_layernorm.weight") != -1 + or key.find("post_attention_layernorm.bias") != -1 + or key.find("post_inter_attention_layernorm.bias") != -1 + or key.find("mlp.dense_4h_to_h.bias") != -1 + or key.find("final_layernorm.weight") != -1 + or key.find("final_layernorm.bias") != -1): + + # shared weights, only need to convert the weights of rank 0 + if i == 0: + val = transformer_model_list[0][key].T.float().cpu().numpy() + saved_key = convert_megatron_to_HF_naming_style_single(saved_key, name_mapping) + saved_path = saved_dir / f"{prefix}.{saved_key}.bin" + np.squeeze(val).astype(np_weight_data_type).tofile(saved_path) + + elif (key.find("self_attention.dense.weight") != -1 + or key.find("inter_attention.dense.weight") != -1 + or key.find("mlp.dense_4h_to_h.weight") != -1): + vals = [] + for k in range(factor): + vals.append(transformer_model_list[k][key].T.float().to(major_device)) + saved_key = convert_megatron_to_HF_naming_style_single(saved_key, name_mapping) + torch.cat(vals, dim=0).cpu().numpy().astype(np_weight_data_type).tofile(saved_path) + + elif key.find("mlp.dense_h_to_4h.weight") != -1 or key.find("mlp.dense_h_to_4h.bias") != -1: + vals = [] + for k in range(factor): + vals.append(transformer_model_list[k][key].T.float().to(major_device)) + saved_key = convert_megatron_to_HF_naming_style_single(saved_key, name_mapping) + saved_path = saved_dir / f"{prefix}.{saved_key}.{i:d}.bin" + torch.cat(vals, dim=-1).cpu().numpy().astype(np_weight_data_type).tofile(saved_path) + + elif (key.find("self_attention.query_key_value.bias") != -1 + or key.find("inter_attention.query.bias") != -1 + or key.find("inter_attention.key_value.bias") != -1): + num_splits = 3 + if key.find("inter_attention.key_value.bias") != -1: + num_splits = 2 + if key.find("inter_attention.query.bias") != -1: + num_splits = 1 + vals = [] + for k in range(factor): + val = transformer_model_list[k][key].T.float() + local_dim = int(val.shape[-1] / num_splits) + head_num = model_args['num_attention_heads'] // model_args['tensor_model_parallel_size'] + size_per_head = model_args['kv_channels'] # t5 kv_channels may not be equal to hidden_size // head_num + val = val.reshape(head_num, num_splits, size_per_head) + val = val.permute(1, 0, 2) + val = val.reshape(num_splits, local_dim) + vals.append(val.to(major_device)) + + saved_vals = torch.cat(vals, dim=-1) + saved_keys = convert_megatron_to_HF_naming_style_multiple(saved_key, name_mapping) + if len(saved_keys) == 1: + saved_path = saved_dir / f"{prefix}.{saved_keys[0]}.{i:d}.bin" + saved_vals.cpu().numpy().astype(np_weight_data_type).tofile(saved_path) + return + for index in range(len(saved_keys)): + saved_path = saved_dir / f"{prefix}.{saved_keys[index]}.{i:d}.bin" + saved_vals[index,...].cpu().numpy().astype(np_weight_data_type).tofile(saved_path) + + elif (key.find("self_attention.query_key_value.weight") != -1 + or key.find("inter_attention.query.weight") != -1 + or key.find("inter_attention.key_value.weight") != -1): + num_splits = 3 + if key.find("inter_attention.key_value.weight") != -1: + num_splits = 2 + if key.find("inter_attention.query.weight") != -1: + num_splits = 1 + vals = [] + for k in range(factor): + val = transformer_model_list[k][key].T.float() + hidden_dim = val.shape[0] + local_dim = int(val.shape[-1] / num_splits) + head_num = model_args['num_attention_heads'] + size_per_head = model_args['kv_channels'] # t5 kv_channels may not be equal to hidden_size // head_num + head_num = head_num // model_args['tensor_model_parallel_size'] + val = val.reshape(hidden_dim, head_num, num_splits, size_per_head) + val = val.permute(0, 2, 1, 3) + val = val.reshape(hidden_dim, num_splits, local_dim) + vals.append(val.to(major_device)) + + saved_vals = torch.cat(vals, dim=-1) + saved_keys = convert_megatron_to_HF_naming_style_multiple(saved_key, name_mapping) + if len(saved_keys) == 1: + saved_path = saved_dir / f"{prefix}.{saved_keys[0]}.{i:d}.bin" + saved_vals.cpu().numpy().astype(np_weight_data_type).tofile(saved_path) + return + for index in range(len(saved_keys)): + saved_path = saved_dir / f"{prefix}.{saved_keys[index]}.{i:d}.bin" + saved_vals[:, index, ...].cpu().numpy().astype(np_weight_data_type).tofile(saved_path) + else: + print(f"[ERROR] cannot find key '{key}'") + +def split_and_convert_process(model_type, i, pipeline_para_rank, saved_dir, factor, key, model_args, transformer_model_list, np_weight_data_type): + prefix = model_type + name_mapping = megatron_HF_name_mapping[model_type] + val = transformer_model_list[0][key].T.float().cpu().numpy().astype(np_weight_data_type) + del transformer_model_list[0][key] + + if key.find("layers.") != -1: + layer_index = (int)(key[7 : key.find(".", 7)]) + saved_key = key.replace( + "layers.%d." % layer_index, + "layers.%d." % (layer_index + pipeline_para_rank * model_args['num_layers'] // model_args['pipeline_model_parallel_size'])) + else: + saved_key = key + + if ( + key.find("input_layernorm.weight") != -1 + or key.find("input_layernorm.bias") != -1 + or key.find("self_attention.dense.bias") != -1 + or key.find("inter_attention.dense.bias") != -1 + or key.find("post_attention_layernorm.weight") != -1 + or key.find("post_inter_attention_layernorm.weight") != -1 + or key.find("post_attention_layernorm.bias") != -1 + or key.find("post_inter_attention_layernorm.bias") != -1 + or key.find("mlp.dense_4h_to_h.bias") != -1 + or key.find("final_layernorm.weight") != -1 + or key.find("final_layernorm.bias") != -1): + # shared weights, only need to convert the weights of rank 0 + if i == 0: + saved_key = convert_megatron_to_HF_naming_style_single(saved_key, name_mapping) + saved_path = saved_dir / f"{prefix}.{saved_key}.bin" + val.tofile(saved_path.as_posix()) + + elif (key.find("self_attention.dense.weight") != -1 + or key.find("inter_attention.dense.weight") != -1 + or key.find("mlp.dense_4h_to_h.weight") != -1): + split_vals = np.split(val, factor, axis=0) + saved_key = convert_megatron_to_HF_naming_style_single(saved_key, name_mapping) + for j in range(factor): + saved_path = saved_dir / f"{prefix}.{saved_key}.{i * factor + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + + elif key.find("mlp.dense_h_to_4h.weight") != -1 or key.find("mlp.dense_h_to_4h.bias") != -1: + split_vals = np.split(val, factor, axis=-1) + saved_key = convert_megatron_to_HF_naming_style_single(saved_key, name_mapping) + for j in range(factor): + saved_path = saved_dir / f"{prefix}.{saved_key}.{i * factor + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + + elif (key.find("self_attention.query_key_value.bias") != -1 + or key.find("inter_attention.query.bias") != -1 + or key.find("inter_attention.key_value.bias") != -1): + num_splits = 3 + if key.find("inter_attention.key_value.bias") != -1: + num_splits = 2 + if key.find("inter_attention.query.bias") != -1: + num_splits = 1 + local_dim = int(val.shape[-1] / num_splits) + head_num = model_args['num_attention_heads'] // model_args['tensor_model_parallel_size'] + size_per_head = model_args['kv_channels'] # t5 kv_channels may not be equal to hidden_size // head_num + val = val.reshape(head_num, num_splits, size_per_head) + val = val.transpose(1, 0, 2) + + val = val.reshape(num_splits, local_dim) + split_vals = np.split(val, factor, axis=-1) + saved_keys = convert_megatron_to_HF_naming_style_multiple(saved_key, name_mapping) + for j in range(factor): + if len(saved_keys) == 1: + saved_path = saved_dir / f"{prefix}.{saved_keys[0]}.{i * factor + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + continue + for index in range(len(saved_keys)): + saved_path = saved_dir / f"{prefix}.{saved_keys[index]}.{i * factor + j:d}.bin" + split_vals[j][index, ...].tofile(saved_path.as_posix()) + + elif (key.find("self_attention.query_key_value.weight") != -1 + or key.find("inter_attention.query.weight") != -1 + or key.find("inter_attention.key_value.weight") != -1): + num_splits = 3 + if key.find("inter_attention.key_value.weight") != -1: + num_splits = 2 + if key.find("inter_attention.query.weight") != -1: + num_splits = 1 + hidden_dim = val.shape[0] + local_dim = int(val.shape[-1] / num_splits) + + head_num = model_args['num_attention_heads'] + size_per_head = model_args['kv_channels'] # t5 kv_channels may not be equal to hidden_size // head_num + head_num = head_num // model_args['tensor_model_parallel_size'] + val = val.reshape(hidden_dim, head_num, num_splits, size_per_head) + val = val.transpose(0, 2, 1, 3) + + val = val.reshape(hidden_dim, num_splits, local_dim) + split_vals = np.split(val, factor, axis=-1) + + saved_keys = convert_megatron_to_HF_naming_style_multiple(saved_key, name_mapping) + for j in range(factor): + if len(saved_keys) == 1: + saved_path = saved_dir / f"{prefix}.{saved_keys[0]}.{i * factor + j:d}.bin" + split_vals[j].tofile(saved_path.as_posix()) + continue + for index in range(len(saved_keys)): + saved_path = saved_dir / f"{prefix}.{saved_keys[index]}.{i * factor + j:d}.bin" + split_vals[j][:, index, ...].tofile(saved_path.as_posix()) + else: + print(f"[ERROR] cannot find key '{key}'") + +def convert_checkpoint(args, model_config = None): + saved_dir = Path(args.saved_dir) / f"{args.infer_gpu_num:d}-gpu" + saved_dir.mkdir(parents=True, exist_ok=True) + + prefix = Path(args.in_file) if args.ckpt_type == "ckpt" else Path(args.saved_dir) + base_ckpt_name = "*last.ckpt" if args.ckpt_type == "ckpt" else "model_weights.ckpt" + + # load position_embedding from rank 0 + if (prefix).is_dir() and args.ckpt_type == "nemo" and model_config['tensor_model_parallel_size'] == 1: + model_00 = torch.load(os.path.join(args.saved_dir, base_ckpt_name), map_location=_gpu_map_location) + elif (prefix / "mp_rank_00").is_dir(): + ckpt_name = glob.glob((prefix / "mp_rank_00" / base_ckpt_name).as_posix())[0].split('/')[-1] + model_00 = torch.load((prefix / "mp_rank_00" / ckpt_name).as_posix(), map_location=_gpu_map_location) + elif (prefix / "mp_rank_00_000").is_dir(): + ckpt_name = glob.glob((prefix / "mp_rank_00_000" / base_ckpt_name).as_posix())[0].split('/')[-1] + model_00 = torch.load((prefix / "mp_rank_00_000" / ckpt_name).as_posix(), map_location=_gpu_map_location) + else: + print(f"[ERROR] Cannot find checkpoint in {prefix}.") + exit(1) + + model_args = dict(model_00["hyper_parameters"]['cfg']) if args.ckpt_type == "ckpt" else model_config + + # checkpoint weights + model00_state = model_00['state_dict'] if args.ckpt_type == "ckpt" else model_00 + + # update model structure config + if 'position_embedding_type' not in model_args.keys() or model_args['position_embedding_type'] == "absolute": + model_new_config["structure"]["position_embedding_type"] = 1 + + ## 'pipeline_model_parallel_size' + if 'pipeline_model_parallel_size' not in model_args.keys(): + model_args['pipeline_model_parallel_size'] = 1 + + config = configparser.ConfigParser() + + config["encoder"] = {} + config["decoder"] = {} + for key, val in model_args.items(): + if key in encoder_config_mapping.keys(): + if key == "kv_channels" and val == None: + val = int(config["encoder"]["d_model"]) // int(config["encoder"]["num_heads"]) + config["encoder"][encoder_config_mapping[key]] = f"{val}" + if key in decoder_config_mapping.keys(): + if key == "kv_channels" and val == None: + val = int(config["decoder"]["d_model"]) // int(config["decoder"]["num_heads"]) + config["decoder"][decoder_config_mapping[key]] = f"{val}" + + # vocab is not stored in the config by default, we need to get it from word embedding's shape + vocab_size = model00_state['enc_dec_model.encoder_embedding.word_embeddings.weight'].shape[0] + config["encoder"]["vocab_size"] = f"{vocab_size}" + config["decoder"]["vocab_size"] = f"{vocab_size}" + for key, val in decoder_new_config.items(): + config["decoder"][key] = f"{val}" + for key, val in model_new_config.items(): + config[key] = {} + for val_key, val_val in val.items(): + config[key][val_key] = f"{val_val}" + + # add model name + config["encoder"]["_name_or_path"] = args.model_name + config["decoder"]["_name_or_path"] = args.model_name + + # add weight data type + config["encoder"]["weight_data_type"] = args.weight_data_type + config["decoder"]["weight_data_type"] = args.weight_data_type + + np_weight_data_type = get_weight_data_type(args.weight_data_type) + + with open((saved_dir / f"config.ini").as_posix(), 'w') as configfile: + config.write(configfile) + + if "enc_dec_model.encoder_embedding.position_embeddings.weight" in model00_state.keys(): + model00_state["enc_dec_model.encoder_embedding.position_embeddings.weight"] \ + .float().cpu().numpy().astype(np_weight_data_type) \ + .tofile((saved_dir / "shared.ape.bin").as_posix()) + + # inference factor calculation + t_gpu_num = model_args['tensor_model_parallel_size'] + i_gpu_num = args.infer_gpu_num + + if t_gpu_num > i_gpu_num: + assert t_gpu_num % i_gpu_num == 0 + is_merge_ckpt = True + factor = int(t_gpu_num / i_gpu_num) + else: + assert i_gpu_num % t_gpu_num == 0 + is_merge_ckpt = False + factor = int(i_gpu_num / t_gpu_num) + + main_loop = min(t_gpu_num, i_gpu_num) + + # split rpe into tensor parallel ranks + encoder_rpe_key = "enc_dec_model.encoder_embedding.encoder_relative_position_embedding.weight" + if encoder_rpe_key in model00_state.keys(): + encoder_relative_position_embedding = model00_state[encoder_rpe_key] \ + .T.float().cpu().numpy().astype(np_weight_data_type) + encoder_relative_position_embedding_split = np.split(encoder_relative_position_embedding, i_gpu_num, axis=0) + for i in range(i_gpu_num): + saved_path = saved_dir / f"encoder.block.0.layer.0.SelfAttention.relative_attention_bias.weight.{i}.bin" + encoder_relative_position_embedding_split[i].tofile(saved_path.as_posix()) + + del encoder_relative_position_embedding, encoder_relative_position_embedding_split + + decoder_rpe_key = "enc_dec_model.decoder_embedding.decoder_relative_position_embedding.weight" + if decoder_rpe_key in model00_state.keys(): + decoder_relative_position_embedding = model00_state[decoder_rpe_key] \ + .T.float().cpu().numpy().astype(np_weight_data_type) + decoder_relative_position_embedding_split = np.split(decoder_relative_position_embedding, i_gpu_num, axis=0) + for i in range(i_gpu_num): + saved_path = saved_dir / f"decoder.block.0.layer.0.SelfAttention.relative_attention_bias.weight.{i}.bin" + decoder_relative_position_embedding_split[i].tofile(saved_path.as_posix()) + + del decoder_relative_position_embedding, decoder_relative_position_embedding_split + + del model_00 + w_e_list = [] + + torch.multiprocessing.set_start_method("spawn") + pool = multiprocessing.Pool(args.processes) + for i in range(main_loop): + for j in range(model_args['pipeline_model_parallel_size']): + if model_args['pipeline_model_parallel_size'] == 1: + layer_rank_num = "" + else: + layer_rank_num = f"_{j:03d}" + + encoder_models = [] + decoder_models = [] + + if is_merge_ckpt == True: + for k in range(factor): + ckpt_name = glob.glob((prefix / f"mp_rank_{i * factor + k:02d}{layer_rank_num}" / base_ckpt_name).as_posix())[0].split('/')[-1] + ckpt_path = glob.glob((prefix / f"mp_rank_{i * factor + k:02d}{layer_rank_num}" / ckpt_name).as_posix())[0] + m = torch.load(ckpt_path, map_location=_gpu_map_location) + m = m['state_dict'] if args.ckpt_type == "ckpt" else m + encoder_models_dict = {} + decoder_models_dict = {} + for key, val in m.items(): + encoder_prefix = "enc_dec_model.enc_dec_model.encoder.model." + decoder_prefix = "enc_dec_model.enc_dec_model.decoder.model." + if key.find(encoder_prefix) != -1: + encoder_models_dict[key.split(encoder_prefix, 1)[1]] = val + elif key.find(decoder_prefix) != -1: + decoder_models_dict[key.split(decoder_prefix, 1)[1]] = val + encoder_models.append(encoder_models_dict) + decoder_models.append(decoder_models_dict) + + if j == 0: + w_e_list.append(m["enc_dec_model.encoder_embedding.word_embeddings.weight"].float().cpu().numpy().astype(np_weight_data_type)) + else: + if t_gpu_num == 1 and args.ckpt_type == "nemo": + ckpt_path = glob.glob((prefix / ckpt_name).as_posix())[0] + else: + ckpt_name = glob.glob((prefix / f"mp_rank_{i:02d}{layer_rank_num}" / base_ckpt_name).as_posix())[0].split('/')[-1] + ckpt_path = glob.glob((prefix / f"mp_rank_{i:02d}{layer_rank_num}" / ckpt_name).as_posix())[0] + m = torch.load(ckpt_path, map_location=_gpu_map_location) + m = m['state_dict'] if args.ckpt_type == "ckpt" else m + + if j == 0: + w_e_list.append( + m["enc_dec_model.encoder_embedding.word_embeddings.weight"] + .float() + .cpu() + .numpy() + .astype(np_weight_data_type) + ) + + encoder_models_dict = {} + decoder_models_dict = {} + for key, val in m.items(): + encoder_prefix = "enc_dec_model.enc_dec_model.encoder.model." + decoder_prefix = "enc_dec_model.enc_dec_model.decoder.model." + if key.find(encoder_prefix) != -1: + encoder_models_dict[key.split(encoder_prefix, 1)[1]] = val + elif key.find(decoder_prefix) != -1: + decoder_models_dict[key.split(decoder_prefix, 1)[1]] = val + encoder_models.append(encoder_models_dict) + decoder_models.append(decoder_models_dict) + + pool.starmap( + merge_and_convert_process if is_merge_ckpt == True else split_and_convert_process, + [ + ( + "encoder", + i, + j, + saved_dir, + factor, + k, + model_args, + encoder_models, + np_weight_data_type + ) + for k in encoder_models[0].keys() + ], + ) + pool.starmap( + merge_and_convert_process if is_merge_ckpt == True else split_and_convert_process, + [ + ( + "decoder", + i, + j, + saved_dir, + factor, + k, + model_args, + decoder_models, + np_weight_data_type + ) + for k in decoder_models[0].keys() + ], + ) + + pool.close() + pool.join() + + np.concatenate(w_e_list, axis=0).tofile((saved_dir / "shared.weight_T.bin").as_posix()) + m["enc_dec_model.tokens_head.bias"].float().cpu().numpy().tofile((saved_dir / "shared.bias.bin").as_posix()) + +if __name__ == "__main__": + parser = argparse.ArgumentParser(formatter_class=argparse.RawTextHelpFormatter) + parser.add_argument("-saved_dir", "-o", type=str, help="file name of output file", required=True) + parser.add_argument("-in_file", "-i", type=str, help="file name of input checkpoint file", required=True) + parser.add_argument("-infer_gpu_num", "-i_g", type=int, help="How many gpus for inference", required=True) + parser.add_argument("-processes", "-p", type=int, help="How many processes to spawn for conversion (default: 64)", default=64) + parser.add_argument("-ckpt_type", "-ct", type=str, choices=['nemo', 'ckpt'], help="checkpoint type. nemo or ckpt", default="nemo") + parser.add_argument("-weight_data_type", type=str, default="fp32", choices=["fp32", "fp16"]) + parser.add_argument("-model_name", "-m", type=str, help="model name", required=True) + args = parser.parse_args() + print("\n=============== Argument ===============") + for key in vars(args): + print(f"{key}: {vars(args)[key]}") + print("========================================") + + ## unpack .nemo format if specified + if (args.ckpt_type == "nemo"): + model_config_yaml = "model_config.yaml" + config_yaml = os.path.join(args.saved_dir, model_config_yaml) + + # unpack_nemo_ckpt(args.in_file, args.saved_dir) + + with open(config_yaml) as f: + model_config = yaml.full_load(f) + + start_time = datetime.now() + convert_checkpoint(args, model_config) + stop_time = datetime.now() + run_time = (stop_time - start_time) + print("[INFO] Spend {} (h:m:s) to convert the model".format(run_time)) + else: + start_time = datetime.now() + convert_checkpoint(args) + stop_time = datetime.now() + run_time = (stop_time - start_time) + print("[INFO] Spend {} (h:m:s) to convert the model".format(run_time)) diff --git a/examples/pytorch/utils.py b/examples/pytorch/utils.py new file mode 100644 index 000000000..711989719 --- /dev/null +++ b/examples/pytorch/utils.py @@ -0,0 +1,8 @@ +import torch + +def print_memory_usage(info=""): + t = torch.cuda.get_device_properties(0).total_memory / 1024**2 + r = torch.cuda.memory_reserved(0) / 1024**2 + a = torch.cuda.memory_allocated(0) / 1024**2 + f = r-a # free inside reserved + print(f"[INFO][{info}] total_memory: {t}, reversed: {r}, allocated: {a}") diff --git a/examples/pytorch/vit/ViT-quantization/README.md b/examples/pytorch/vit/ViT-quantization/README.md new file mode 100644 index 000000000..23e0c47b9 --- /dev/null +++ b/examples/pytorch/vit/ViT-quantization/README.md @@ -0,0 +1,195 @@ +# ViT Quantization Toolkit + +This tutorial contains the guidance for ViT Quantization Toolkit. + +## 1. Download Pre-trained model (Google's Official Checkpoint) + +* [Available models](https://console.cloud.google.com/storage/vit_models/): ViT-B_16(**85.8M**), R50+ViT-B_16(**97.96M**), ViT-B_32(**87.5M**), ViT-L_16(**303.4M**), ViT-L_32(**305.5M**), ViT-H_14(**630.8M**) + * imagenet21k pre-train models + * ViT-B_16, ViT-B_32, ViT-L_16, ViT-L_32, ViT-H_14 + * imagenet21k pre-train + imagenet2012 fine-tuned models + * ViT-B_16-224, ViT-B_16, ViT-B_32, ViT-L_16-224, ViT-L_16, ViT-L_32 + * Hybrid Model([Resnet50](https://github.com/google-research/big_transfer) + Transformer) + * R50-ViT-B_16 +``` +# imagenet21k pre-train +wget https://storage.googleapis.com/vit_models/imagenet21k/{MODEL_NAME}.npz +# imagenet21k pre-train + imagenet2012 fine-tuning +wget https://storage.googleapis.com/vit_models/imagenet21k+imagenet2012/{MODEL_NAME}.npz +``` +## 2 Usage + +### 2.1 Environment setup + +- Initialize submodule + ```bash + git submodule update --init + ``` + +- Run the container. + + You can choose pytorch version you want. Here, we list some possible images: + - `nvcr.io/nvidia/pytorch:21.07-py3` contains the PyTorch 1.8.0 and python 3.8 + +- Install additional dependencies (not included by container) + ```bash + pip install timm==0.4.12 termcolor==1.1.0 pytorch-quantization ml_collections + ``` + + +### 2.2 Data preparation + +We use standard ImageNet dataset, you can download it from http://image-net.org/. We provide the following two ways to +load data: + +- For standard folder dataset, move validation images to labeled sub-folders. The file structure should look like: + ```bash + $ tree data + imagenet + ├── train + │ ├── class1 + │ │ ├── img1.jpeg + │ │ ├── img2.jpeg + │ │ └── ... + │ ├── class2 + │ │ ├── img3.jpeg + │ │ └── ... + │ └── ... + └── val + ├── class1 + │ ├── img4.jpeg + │ ├── img5.jpeg + │ └── ... + ├── class2 + │ ├── img6.jpeg + │ └── ... + └── ... + + ``` +- To boost the slow speed when reading images from massive small files, we also support zipped ImageNet, which includes + four files: + - `train.zip`, `val.zip`: which store the zipped folder for train and validate splits. + - `train_map.txt`, `val_map.txt`: which store the relative path in the corresponding zip file and ground truth + label. Make sure the data folder looks like this: + + ```bash + $ tree data + data + └── ImageNet-Zip + ├── train_map.txt + ├── train.zip + ├── val_map.txt + └── val.zip + + $ head -n 5 data/ImageNet-Zip/val_map.txt + ILSVRC2012_val_00000001.JPEG 65 + ILSVRC2012_val_00000002.JPEG 970 + ILSVRC2012_val_00000003.JPEG 230 + ILSVRC2012_val_00000004.JPEG 809 + ILSVRC2012_val_00000005.JPEG 516 + + $ head -n 5 data/ImageNet-Zip/train_map.txt + n01440764/n01440764_10026.JPEG 0 + n01440764/n01440764_10027.JPEG 0 + n01440764/n01440764_10029.JPEG 0 + n01440764/n01440764_10040.JPEG 0 + n01440764/n01440764_10042.JPEG 0 + ``` + +### 2.3 Calibration & Evaluation + +To calibrate and then evaluate a calibrated `Vision Transformer` on ImageNet val, run: + +```bash +python -m torch.distributed.launch --nproc_per_node \ + --master_port 12345 main.py \ + --calib \ + --name vit \ + --pretrained_dir \ + --data-path \ + --model_type \ + --img_size \ + --num-calib-batch \ + --calib-batchsz \ + --quant-mode \ + --calibrator \ + --percentile \ + --calib-output-path +``` + +For example, to calibrate the `ViT-B_16` with a single GPU: (For calibration, we only support using one single GPU). You can use **sh calib.sh** for simplicity. + +```bash +export DATA_DIR=Path to the dataset +export CKPT_DIR=Path to the ViT checkpoints +python -m torch.distributed.launch --nproc_per_node 1 \ + --master_port 12345 main.py \ + --calib \ + --name vit \ + --pretrained_dir $CKPT_DIR/ViT-B_16.npz \ + --data-path $DATA_DIR \ + --model_type ViT-B_16 \ + --img_size 384 \ + --num-calib-batch 20 \ + --calib-batchsz 8 \ + --quant-mode ft2 \ + --calibrator percentile \ + --percentile 99.99 \ + --calib-output-path $CKPT_DIR +``` +### Difference between `--quant-mode 1` and `--quant-mode 2` +`--quant-mode 1` indicates that all GEMMs are quantized to be INT8-in-INT32-out, while `--quant-mode 2` means quantizating all GEMMs to be INT8-in-INT8-out. This is a speed-versus-accuracy trade-off: `mode=2` is faster in CUDA implementation but its accuracy is lower. +|name| resolution|Original Accuracy|PTQ(mode=1)|PTQ(mode=2)| +|:---:|:---:|:---:|:---:|:---:| +|ViT-B_16|384x384|83.97%|82.57%(-1.40%)|81.82%(-2.15%)| + +In order to narrow the accuracy gap for `mode=2`, QAT is a reasonable choice. + +### 2.4 Quantization Aware Training (QAT) + +To run QAT finetuning with a calibrated `Vision Transformer`, run: +```bash +python -m torch.distributed.launch --nproc_per_node \ + --master_port 12345 main.py \ + --train \ + --name vit \ + --pretrained_dir \ + --data-path \ + --model_type \ + --quant-mode \ + --img_size \ + --distill \ + --teacher \ + --output \ + --quant-mode \ + --batch-size \ + --num-epochs \ + --qat-lr +``` +For example, to do QAT with `ViT-B_16` by 4 GPU on a single node for 5 epochs, run: (You can see **qat.sh** for reference.) + +```bash +export DATA_DIR=Path to the dataset +export CKPT_DIR=Path to the ViT checkpoints +python -m torch.distributed.launch --nproc_per_node 4 \ + --master_port 12345 main.py \ + --train \ + --name vit \ + --pretrained_dir $CKPT_DIR/ViT-B_16_calib.pth \ + --data-path $DATA_DIR \ + --model_type ViT-B_16 \ + --quant-mode ft2 \ + --img_size 384 \ + --distill \ + --teacher $CKPT_DIR/ViT-B_16.npz \ + --output qat_output \ + --quant-mode ft2\ + --batch-size 32 \ + --num-epochs 5 \ + --qat-lr 1e-4 +``` +### Improvement brought by QAT (under mode=2) +As shown below, the accuracy gap is narrowed down from 2.15% to 0.65%. +|name| resolution|Original Accuracy|PTQ(mode=2)|QAT(mode=2)| +|:---:|:---:|:---:|:---:|:---:| +|ViT-B_16|384x384|83.97%|81.82%(-2.15%)|83.32(-0.65%)| \ No newline at end of file diff --git a/examples/pytorch/vit/ViT-quantization/calib.sh b/examples/pytorch/vit/ViT-quantization/calib.sh new file mode 100644 index 000000000..acec26f8c --- /dev/null +++ b/examples/pytorch/vit/ViT-quantization/calib.sh @@ -0,0 +1,14 @@ +python -m torch.distributed.launch --nproc_per_node 1 \ + --master_port 12345 main.py \ + --calib \ + --name vit \ + --pretrained_dir $CKPT_DIR/ViT-B_16.npz \ + --data-path $DATA_DIR \ + --model_type ViT-B_16 \ + --img_size 384 \ + --num-calib-batch 10 \ + --calib-batchsz 8 \ + --quant-mode ft2 \ + --calibrator percentile \ + --percentile 99.99 \ + --calib-output-path calib-checkpoint diff --git a/examples/pytorch/vit/ViT-quantization/config.py b/examples/pytorch/vit/ViT-quantization/config.py new file mode 100644 index 000000000..4fc32382b --- /dev/null +++ b/examples/pytorch/vit/ViT-quantization/config.py @@ -0,0 +1,227 @@ +# -------------------------------------------------------- +# Swin Transformer +# Copyright (c) 2021 Microsoft +# Licensed under The MIT License [see LICENSE for details] +# Written by Ze Liu +# -------------------------------------------------------- +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import os +import yaml +from yacs.config import CfgNode as CN + +_C = CN() + +# Base config files +_C.BASE = [''] + +# ----------------------------------------------------------------------------- +# Data settings +# ----------------------------------------------------------------------------- +_C.DATA = CN() +# Batch size for a single GPU, could be overwritten by command line argument +_C.DATA.BATCH_SIZE = 128 +# Path to dataset, could be overwritten by command line argument +_C.DATA.DATA_PATH = '' +# Dataset name +_C.DATA.DATASET = 'imagenet' +# Input image size +_C.DATA.IMG_SIZE = 224 +# Interpolation to resize image (random, bilinear, bicubic) +_C.DATA.INTERPOLATION = 'bilinear' +# Use zipped dataset instead of folder dataset +# could be overwritten by command line argument +_C.DATA.ZIP_MODE = False +# Cache Data in Memory, could be overwritten by command line argument +_C.DATA.CACHE_MODE = 'part' +# Pin CPU memory in DataLoader for more efficient (sometimes) transfer to GPU. +_C.DATA.PIN_MEMORY = True +# Number of data loading threads +_C.DATA.NUM_WORKERS = 8 + +# ----------------------------------------------------------------------------- +# Model settings +# ----------------------------------------------------------------------------- +_C.MODEL = CN() +# Pretrained weight from checkpoint, could be imagenet22k pretrained weight +# could be overwritten by command line argument +_C.MODEL.PRETRAINED = '' +# Checkpoint to resume, could be overwritten by command line argument +_C.MODEL.RESUME = '' +# Number of classes, overwritten in data preparation +_C.MODEL.NUM_CLASSES = 1000 +# Dropout rate +_C.MODEL.DROP_RATE = 0.0 +# Drop path rate +_C.MODEL.DROP_PATH_RATE = 0.1 +# Label Smoothing +_C.MODEL.LABEL_SMOOTHING = 0.1 + +# ----------------------------------------------------------------------------- +# Training settings +# ----------------------------------------------------------------------------- +_C.TRAIN = CN() +_C.TRAIN.START_EPOCH = 0 +_C.TRAIN.EPOCHS = 300 +_C.TRAIN.WARMUP_EPOCHS = 20 +_C.TRAIN.WEIGHT_DECAY = 0.05 +_C.TRAIN.BASE_LR = 5e-4 +_C.TRAIN.WARMUP_LR = 5e-7 +_C.TRAIN.MIN_LR = 5e-6 +# Clip gradient norm +_C.TRAIN.CLIP_GRAD = 5.0 +# Auto resume from latest checkpoint +_C.TRAIN.AUTO_RESUME = True +# Gradient accumulation steps +# could be overwritten by command line argument +_C.TRAIN.ACCUMULATION_STEPS = 0 +# Whether to use gradient checkpointing to save memory +# could be overwritten by command line argument +_C.TRAIN.USE_CHECKPOINT = False + +# LR scheduler +_C.TRAIN.LR_SCHEDULER = CN() +_C.TRAIN.LR_SCHEDULER.NAME = 'cosine' +# Epoch interval to decay LR, used in StepLRScheduler +_C.TRAIN.LR_SCHEDULER.DECAY_EPOCHS = 30 +# LR decay rate, used in StepLRScheduler +_C.TRAIN.LR_SCHEDULER.DECAY_RATE = 0.1 + +# Optimizer +_C.TRAIN.OPTIMIZER = CN() +_C.TRAIN.OPTIMIZER.NAME = 'adamw' +# Optimizer Epsilon +_C.TRAIN.OPTIMIZER.EPS = 1e-8 +# Optimizer Betas +_C.TRAIN.OPTIMIZER.BETAS = (0.9, 0.999) +# SGD momentum +_C.TRAIN.OPTIMIZER.MOMENTUM = 0.9 + +# ----------------------------------------------------------------------------- +# Augmentation settings +# ----------------------------------------------------------------------------- +_C.AUG = CN() +# Color jitter factor +_C.AUG.COLOR_JITTER = 0.4 +# Use AutoAugment policy. "v0" or "original" +_C.AUG.AUTO_AUGMENT = 'rand-m9-mstd0.5-inc1' +# Random erase prob +_C.AUG.REPROB = 0.25 +# Random erase mode +_C.AUG.REMODE = 'pixel' +# Random erase count +_C.AUG.RECOUNT = 1 +# Mixup alpha, mixup enabled if > 0 +_C.AUG.MIXUP = 0.8 +# Cutmix alpha, cutmix enabled if > 0 +_C.AUG.CUTMIX = 1.0 +# Cutmix min/max ratio, overrides alpha and enables cutmix if set +_C.AUG.CUTMIX_MINMAX = None +# Probability of performing mixup or cutmix when either/both is enabled +_C.AUG.MIXUP_PROB = 1.0 +# Probability of switching to cutmix when both mixup and cutmix enabled +_C.AUG.MIXUP_SWITCH_PROB = 0.5 +# How to apply mixup/cutmix params. Per "batch", "pair", or "elem" +_C.AUG.MIXUP_MODE = 'batch' + +# ----------------------------------------------------------------------------- +# Testing settings +# ----------------------------------------------------------------------------- +_C.TEST = CN() +# Whether to use center crop when testing +_C.TEST.CROP = False +# Whether to use SequentialSampler as validation sampler +_C.TEST.SEQUENTIAL = False + +# ----------------------------------------------------------------------------- +# Misc +# ----------------------------------------------------------------------------- +# Mixed precision opt level, if O0, no amp is used ('O0', 'O1', 'O2') +# overwritten by command line argument +_C.AMP_OPT_LEVEL = '' +# Path to output folder, overwritten by command line argument +_C.OUTPUT = '' +# Tag of experiment, overwritten by command line argument +_C.TAG = 'default' +# Frequency to save checkpoint +_C.SAVE_FREQ = 1 +# Frequency to logging info +_C.PRINT_FREQ = 10 +# Fixed random seed +_C.SEED = 0 +# Perform evaluation only, overwritten by command line argument +_C.EVAL_MODE = False +# Test throughput only, overwritten by command line argument +_C.THROUGHPUT_MODE = False +# local rank for DistributedDataParallel, given by command line argument +_C.LOCAL_RANK = 0 + + +def _update_config_from_file(config, cfg_file): + config.defrost() + with open(cfg_file, 'r') as f: + yaml_cfg = yaml.load(f, Loader=yaml.FullLoader) + + for cfg in yaml_cfg.setdefault('BASE', ['']): + if cfg: + _update_config_from_file( + config, os.path.join(os.path.dirname(cfg_file), cfg) + ) + print('=> merge config from {}'.format(cfg_file)) + config.merge_from_file(cfg_file) + config.freeze() + + +def update_config(config, args): + + config.defrost() + + # merge from specific arguments + if args.batch_size: + config.DATA.BATCH_SIZE = args.batch_size + if args.data_path: + config.DATA.DATA_PATH = args.data_path + if args.pretrained_dir: + config.MODEL.PRETRAINED = args.pretrained_dir + if args.img_size: + config.DATA.IMG_SIZE = args.img_size + # if args.resume: + # config.MODEL.RESUME = args.resume + # if args.accumulation_steps: + # config.TRAIN.ACCUMULATION_STEPS = args.accumulation_steps + # if args.use_checkpoint: + # config.TRAIN.USE_CHECKPOINT = True + # if args.amp_opt_level: + # config.AMP_OPT_LEVEL = args.amp_opt_level + # if args.output: + # config.OUTPUT = args.output + + # set local rank for distributed training + config.LOCAL_RANK = args.local_rank + + # output folder + # config.OUTPUT = os.path.join(config.OUTPUT, config.MODEL.NAME, config.TAG) + + config.freeze() + + +def get_config(args): + """Get a yacs CfgNode object with default values.""" + # Return a clone so that the defaults will not be altered + # This is for the "local variable" use pattern + config = _C.clone() + update_config(config, args) + + return config diff --git a/examples/pytorch/vit/ViT-quantization/data.py b/examples/pytorch/vit/ViT-quantization/data.py new file mode 100644 index 000000000..ce368ac2d --- /dev/null +++ b/examples/pytorch/vit/ViT-quantization/data.py @@ -0,0 +1,163 @@ +# -------------------------------------------------------- +# Swin Transformer +# Copyright (c) 2021 Microsoft +# Licensed under The MIT License [see LICENSE for details] +# Written by Ze Liu +# -------------------------------------------------------- +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import os +import torch +import numpy as np +import torch.distributed as dist +from torchvision import datasets, transforms +from timm.data import create_transform + +try: + from torchvision.transforms import InterpolationMode + + + def _pil_interp(method): + if method == 'bicubic': + return InterpolationMode.BICUBIC + elif method == 'lanczos': + return InterpolationMode.LANCZOS + elif method == 'hamming': + return InterpolationMode.HAMMING + else: + # default bilinear, do we want to allow nearest? + return InterpolationMode.BILINEAR +except: + from timm.data.transforms import _pil_interp + +def build_val_loader(config): + config.freeze() + dataset_val, _ = build_dataset(is_train=False, config=config) + # print(f"local rank {config.LOCAL_RANK} / global rank {dist.get_rank()} successfully build val dataset") + + indices = np.arange(0, len(dataset_val), 1) + if config.TEST.SEQUENTIAL: + sampler_val = torch.utils.data.SequentialSampler(dataset_val) + else: + sampler_val = torch.utils.data.distributed.DistributedSampler( + dataset_val, shuffle=False + ) + + data_loader_val = torch.utils.data.DataLoader( + dataset_val, sampler=sampler_val, + batch_size=config.DATA.BATCH_SIZE, + shuffle=False, + num_workers=config.DATA.NUM_WORKERS, + pin_memory=config.DATA.PIN_MEMORY, + drop_last=False + ) + + return dataset_val, data_loader_val + +def build_loader(config, args): + config.defrost() + dataset_train, config.MODEL.NUM_CLASSES = build_dataset(is_train=True, config=config) + config.freeze() + print(f"local rank {config.LOCAL_RANK} / global rank {dist.get_rank()} successfully build train dataset") + dataset_val, _ = build_dataset(is_train=False, config=config) + print(f"local rank {config.LOCAL_RANK} / global rank {dist.get_rank()} successfully build val dataset") + + num_tasks = dist.get_world_size() + global_rank = dist.get_rank() + + sampler_train = torch.utils.data.DistributedSampler( + dataset_train, num_replicas=num_tasks, rank=global_rank, shuffle=True + ) + + if config.TEST.SEQUENTIAL: + sampler_val = torch.utils.data.SequentialSampler(dataset_val) + else: + sampler_val = torch.utils.data.distributed.DistributedSampler( + dataset_val, shuffle=False + ) + + data_loader_train = torch.utils.data.DataLoader( + dataset_train, sampler=sampler_train, + batch_size=args.calib_batchsz if args.calib else config.DATA.BATCH_SIZE, + num_workers=config.DATA.NUM_WORKERS, + pin_memory=config.DATA.PIN_MEMORY, + drop_last=True, + ) + + data_loader_val = torch.utils.data.DataLoader( + dataset_val, sampler=sampler_val, + batch_size=config.DATA.BATCH_SIZE, + shuffle=False, + num_workers=config.DATA.NUM_WORKERS, + pin_memory=config.DATA.PIN_MEMORY, + drop_last=False + ) + + return dataset_train, dataset_val, data_loader_train, data_loader_val + + +def build_dataset(is_train, config): + transform = build_transform(is_train, config) + if config.DATA.DATASET == 'imagenet': + prefix = 'train' if is_train else 'val' + root = os.path.join(config.DATA.DATA_PATH, prefix) + dataset = datasets.ImageFolder(root, transform=transform) + nb_classes = 1000 + elif config.DATA.DATASET == 'imagenet22K': + raise NotImplementedError("Imagenet-22K will come soon.") + else: + raise NotImplementedError("We only support ImageNet Now.") + + return dataset, nb_classes + + +def build_transform(is_train, config): + resize_im = config.DATA.IMG_SIZE > 32 + if is_train: + # this should always dispatch to transforms_imagenet_train + transform = create_transform( + input_size=config.DATA.IMG_SIZE, + is_training=True, + color_jitter=config.AUG.COLOR_JITTER if config.AUG.COLOR_JITTER > 0 else None, + auto_augment=config.AUG.AUTO_AUGMENT if config.AUG.AUTO_AUGMENT != 'none' else None, + re_prob=config.AUG.REPROB, + re_mode=config.AUG.REMODE, + re_count=config.AUG.RECOUNT, + interpolation=config.DATA.INTERPOLATION, + ) + if not resize_im: + # replace RandomResizedCropAndInterpolation with + # RandomCrop + transform.transforms[0] = transforms.RandomCrop(config.DATA.IMG_SIZE, padding=4) + return transform + + t = [] + if resize_im: + if config.TEST.CROP: + size = int((256 / 224) * config.DATA.IMG_SIZE) + t.append( + transforms.Resize(size, interpolation=_pil_interp(config.DATA.INTERPOLATION)), + # to maintain same ratio w.r.t. 224 images + ) + t.append(transforms.CenterCrop(config.DATA.IMG_SIZE)) + else: + t.append( + transforms.Resize((config.DATA.IMG_SIZE, config.DATA.IMG_SIZE), + interpolation=_pil_interp(config.DATA.INTERPOLATION)) + ) + + t.append(transforms.ToTensor()) + t.append(transforms.Normalize((0.5, 0.5, 0.5), (0.5, 0.5, 0.5))) + return transforms.Compose(t) diff --git a/examples/pytorch/vit/ViT-quantization/main.py b/examples/pytorch/vit/ViT-quantization/main.py new file mode 100755 index 000000000..0de559550 --- /dev/null +++ b/examples/pytorch/vit/ViT-quantization/main.py @@ -0,0 +1,462 @@ +# coding=utf-8 +# Copyright (c) 2022 NVIDIA CORPORATION. All rights reserved. +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +from __future__ import absolute_import, division, print_function +from email.policy import strict + +import logging +import argparse +import os +import random +import numpy as np + +from datetime import timedelta + +import torch +import torch.distributed as dist + +from tqdm import tqdm +from apex import amp +from apex.parallel import DistributedDataParallel as DDP + +import sys +sys.path.insert(0, "./ViT-pytorch") +from models.modeling import CONFIGS +from utils.scheduler import WarmupLinearSchedule, WarmupCosineSchedule +from utils.dist_util import get_world_size + +from data import build_loader +from config import get_config +import quant_utils +from vit_int8 import VisionTransformerINT8 + +logger = logging.getLogger(__name__) +logger.setLevel(logging.DEBUG) + +class AverageMeter(object): + """Computes and stores the average and current value""" + def __init__(self): + self.reset() + + def reset(self): + self.val = 0 + self.avg = 0 + self.sum = 0 + self.count = 0 + + def update(self, val, n=1): + self.val = val + self.sum += val * n + self.count += n + self.avg = self.sum / self.count + +class Knowledge_Distillation_Loss(torch.nn.Module): + def __init__(self, scale, T = 3): + super(Knowledge_Distillation_Loss, self).__init__() + self.KLdiv = torch.nn.KLDivLoss() + self.T = T + self.scale = scale + + def get_knowledge_distillation_loss(self, output_student, output_teacher): + loss_kl = self.KLdiv(torch.nn.functional.log_softmax(output_student / self.T, dim=1), torch.nn.functional.softmax(output_teacher / self.T, dim=1)) + + loss = loss_kl + return self.scale * loss + +def accuracy(output, target, topk=(1,)): + """Computes the accuracy over the k top predictions for the specified values of k""" + maxk = max(topk) + batch_size = target.size(0) + _, pred = output.topk(maxk, 1, True, True) + pred = pred.t() + correct = pred.eq(target.reshape(1, -1).expand_as(pred)) + return [correct[:k].reshape(-1).float().sum(0) * 100. / batch_size for k in topk] + +def simple_accuracy(preds, labels): + return (preds == labels).mean() + + +def save_model(args, model): + model_to_save = model.module if hasattr(model, 'module') else model + model_checkpoint = os.path.join(args.output_dir, "%s_checkpoint.bin" % args.name) + torch.save(model_to_save.state_dict(), model_checkpoint) + logger.info("Saved model checkpoint to %s", model_checkpoint) + + +def setup(args): + # Prepare model + config = CONFIGS[args.model_type] + + num_classes = 10 if args.dataset == "cifar10" else 1000 + + model = VisionTransformerINT8(config, args.img_size, zero_head=False, num_classes=num_classes) + model.load_from(np.load(args.pretrained_dir)) + model.to(args.device) + num_params = count_parameters(model) + + logger.info("{}".format(config)) + logger.info("Training parameters %s", args) + logger.info("Total Parameter: \t%2.1fM" % num_params) + print(num_params) + return args, model + + +def count_parameters(model): + params = sum(p.numel() for p in model.parameters() if p.requires_grad) + return params/1000000 + + +def set_seed(args): + random.seed(args.seed) + np.random.seed(args.seed) + torch.manual_seed(args.seed) + if args.n_gpu > 0: + torch.cuda.manual_seed_all(args.seed) + + +@torch.no_grad() +def valid(args, config, model, test_loader): + # Validation! + eval_losses = AverageMeter() + acc1_meter = AverageMeter() + acc5_meter = AverageMeter() + + logger.info("***** Running Validation *****") + logger.info(" Num steps = %d", len(test_loader)) + logger.info(" Batch size = %d", args.eval_batch_size) + + model.eval() + all_preds, all_label = [], [] + loss_fct = torch.nn.CrossEntropyLoss() + for step, batch in enumerate(test_loader): + batch = tuple(t.to(args.device) for t in batch) + x, y = batch + + logits, _ = model(x) + + eval_loss = loss_fct(logits, y) + acc1, acc5 = accuracy(logits, y, topk=(1, 5)) + + eval_losses.update(eval_loss.item(), y.size(0)) + acc1_meter.update(acc1.item(), y.size(0)) + acc5_meter.update(acc5.item(), y.size(0)) + + + if step % config.PRINT_FREQ == 0: + logger.info( + f'Test: [{step}/{len(test_loader)}]\t' + f'Loss {eval_losses.val:.4f} ({eval_losses.avg:.4f})\t' + f'Acc@1 {acc1_meter.val:.3f} ({acc1_meter.avg:.3f})\t' + f'Acc@5 {acc5_meter.val:.3f} ({acc5_meter.avg:.3f})') + logger.info(f' * Acc@1 {acc1_meter.avg:.3f} Acc@5 {acc5_meter.avg:.3f}') + + return acc1_meter.avg + +def calib(args, config, model): + """ Calibrate the model """ + if args.local_rank in [-1, 0]: + os.makedirs(args.output_dir, exist_ok=True) + + dataset_train, dataset_val, train_loader, test_loader = build_loader(config, args) + # Calibration + quant_utils.configure_model(model, args, calib=True) + model.eval() + quant_utils.enable_calibration(model) + # Run forward passes on a sample of the training set + for step, (samples, targets) in enumerate(tqdm(train_loader, desc='Calibration', total=args.num_calib_batch)): + if step > args.num_calib_batch: + break + samples = samples.to(args.device) + outputs = model(samples) + quant_utils.finish_calibration(model, args) + + # model.load_state_dict(torch.load('checkpoint/{}_{}_{}.pth'.format(args.model_type, args.quant_mode, args.percentile))) + + quant_utils.configure_model(model, args, calib=False) + if args.local_rank in [-1, 0]: + accuracy = valid(args, config, model, test_loader) + logger.info("Test Accuracy: \t%f" %accuracy) + + output_model_path = os.path.join(args.calib_output_path, '{}_calib.pth'.format(args.model_type)) + if not os.path.exists(args.calib_output_path): + os.mkdir(args.calib_output_path) + torch.save(model.state_dict(), output_model_path) + logger.info(f'Model is saved to {output_model_path}') + +def train(args, config): + num_classes = 1000 + model_config = CONFIGS[args.model_type] + model = VisionTransformerINT8(model_config, args.img_size, zero_head=False, num_classes=num_classes) + model_ckpt = torch.load(args.pretrained_dir, map_location="cpu") + model.load_state_dict(model_ckpt["model"] if "model" in model_ckpt else model_ckpt, strict=False) + model.cuda() + model.train() + + teacher = None + dis_loss = None + if args.distill: + teacher = VisionTransformerINT8(model_config, args.img_size, zero_head=False, num_classes=num_classes) + teacher.load_from(np.load(args.teacher)) + dis_loss = Knowledge_Distillation_Loss(scale=args.distillation_loss_scale).cuda() + teacher.cuda() + teacher.eval() + quant_utils.set_quantizer_by_name(teacher, [''], _disabled=True) + + """ Train the model """ + if args.local_rank in [-1, 0]: + os.makedirs(args.output_dir, exist_ok=True) + + args.train_batch_size = args.train_batch_size // args.gradient_accumulation_steps + + # Prepare dataset + # train_loader, test_loader = get_loader(args) + dataset_train, dataset_val, train_loader, test_loader = build_loader(config, args) + + # Prepare optimizer and scheduler + optimizer = torch.optim.SGD(model.parameters(), + lr=args.qat_lr, + momentum=0.9, + weight_decay=args.weight_decay) + + print('args.qat_lr: %.6f' % (args.qat_lr)) + print('optimizer.lr: %.6f' % optimizer.state_dict()['param_groups'][0]['lr']) + t_total = args.num_steps + # if args.decay_type == "cosine": + # scheduler = WarmupCosineSchedule(optimizer, warmup_steps=args.warmup_steps, t_total=t_total) + # else: + # scheduler = WarmupLinearSchedule(optimizer, warmup_steps=args.warmup_steps, t_total=t_total) + + + print('查看optimizer.param_groups结构:') + i_list=[i for i in optimizer.param_groups[0].keys()] + print(i_list) + if args.fp16: + model, optimizer = amp.initialize(models=model, + optimizers=optimizer, + opt_level=args.fp16_opt_level) + amp._amp_state.loss_scalers[0]._loss_scale = 2**20 + + # Distributed training + if args.local_rank != -1: + model = DDP(model, message_size=250000000, gradient_predivide_factor=get_world_size()) + + # Train! + logger.info("***** Running training *****") + logger.info(" Total optimization epochs = %d", args.num_epochs) + logger.info(" Instantaneous batch size per GPU = %d", args.train_batch_size) + logger.info(" Total train batch size (w. parallel, distributed & accumulation) = %d", + args.train_batch_size * args.gradient_accumulation_steps * ( + torch.distributed.get_world_size() if args.local_rank != -1 else 1)) + logger.info(" Gradient Accumulation steps = %d", args.gradient_accumulation_steps) + + model.zero_grad() + set_seed(args) # Added here for reproducibility (even between python 2 and 3) + losses = AverageMeter() + global_step, best_acc = 0, 0 + quant_utils.configure_model(model, args, calib=False) + for epoch_i in range(args.num_epochs): + model.train() + epoch_iterator = tqdm(train_loader, + desc="Training (X / X Steps) (loss=X.X)", + bar_format="{l_bar}{r_bar}", + dynamic_ncols=True, + disable=args.local_rank not in [-1, 0]) + + for step, batch in enumerate(epoch_iterator): + batch = tuple(t.to(args.device) for t in batch) + x, y = batch + outputs, loss = model(x, y) + + if teacher: + with torch.no_grad(): + teacher_outputs, _ = teacher(x) + loss_t = dis_loss.get_knowledge_distillation_loss(outputs, teacher_outputs) + loss = loss + loss_t + + if args.gradient_accumulation_steps > 1: + loss = loss / args.gradient_accumulation_steps + if args.fp16: + with amp.scale_loss(loss, optimizer) as scaled_loss: + scaled_loss.backward() + else: + loss.backward() + + if (step + 1) % args.gradient_accumulation_steps == 0: + losses.update(loss.item()*args.gradient_accumulation_steps) + if args.fp16: + torch.nn.utils.clip_grad_norm_(amp.master_params(optimizer), args.max_grad_norm) + else: + torch.nn.utils.clip_grad_norm_(model.parameters(), args.max_grad_norm) + # scheduler.step() + optimizer.step() + lr = optimizer.param_groups[0]['lr'] + optimizer.zero_grad() + global_step += 1 + + epoch_iterator.set_description( + "EPOCH [%d/%d] (%d / %d Steps) (loss=%2.5f) (lr=%.7f)" % + (epoch_i, args.num_epochs, global_step, len(epoch_iterator), losses.val, lr) + ) + + if args.local_rank in [-1, 0]: + accuracy = valid(args, config, model, test_loader) + if best_acc < accuracy: + save_model(args, model) + best_acc = accuracy + model.train() + + # if global_step % t_total == 0: + # break + losses.reset() + # if global_step % t_total == 0: + # break + + logger.info("Best Accuracy: \t%f" % best_acc) + logger.info("End Training!") + +def parse_option(): + parser = argparse.ArgumentParser() + # Required parameters + # easy config modification + parser.add_argument('--batch-size', type=int, help="batch size for single GPU") + parser.add_argument('--data-path', type=str, help='path to dataset') + parser.add_argument('--pretrained', + help='pretrained weight from checkpoint, could be imagenet22k pretrained weight') + parser.add_argument('--resume', help='resume from checkpoint') + parser.add_argument('--accumulation-steps', type=int, help="gradient accumulation steps") + parser.add_argument('--use-checkpoint', action='store_true', + help="whether to use gradient checkpointing to save memory") + parser.add_argument('--amp-opt-level', type=str, default='O1', choices=['O0', 'O1', 'O2'], + help='mixed precision opt level, if O0, no amp is used') + parser.add_argument('--output', default='output', type=str, metavar='PATH', + help='root of output folder, the full path is // (default: output)') + parser.add_argument('--tag', help='tag of experiment') + parser.add_argument('--eval', action='store_true', help='Perform evaluation only') + parser.add_argument('--calib', action='store_true', help='Perform calibration only') + parser.add_argument('--train', action='store_true', help='Perform training only') + parser.add_argument('--throughput', action='store_true', help='Test throughput only') + parser.add_argument('--num-calib-batch', type=int, default=10, help='Number of batches for calibration. 0 will disable calibration.') + parser.add_argument('--calib-batchsz', type=int, default=8, help='Batch size when doing calibration') + parser.add_argument('--calib-output-path', type=str, default='calib-checkpoint', help='Output directory to save calibrated model') + + parser.add_argument("--num-epochs", type=int, default=10, help="Number of epochs to run QAT fintuning.") + parser.add_argument("--qat-lr", type=float, default=1e-6, help="learning rate for QAT.") + parser.add_argument("--distill", action='store_true', help='Using distillation') + parser.add_argument("--teacher", type=str, help='teacher model path') + parser.add_argument('--distillation_loss_scale', type=float, default=10000., help="scale applied to distillation component of loss") + + # distributed training + # parser.add_argument("--local_rank", type=int, required=True, help='local rank for DistributedDataParallel') + + parser.add_argument("--name", required=True, + help="Name of this run. Used for monitoring.") + parser.add_argument("--dataset", choices=["cifar10", "cifar100"], default="cifar100", + help="Which downstream task.") + parser.add_argument("--model_type", choices=["ViT-B_16", "ViT-B_32", "ViT-L_16", + "ViT-L_32", "ViT-H_14", "R50-ViT-B_16"], + default="ViT-B_16", + help="Which variant to use.") + parser.add_argument("--pretrained_dir", type=str, default="checkpoint/ViT-B_16.npz", + help="Where to search for pretrained ViT models.") + parser.add_argument("--output_dir", default="output", type=str, + help="The output directory where checkpoints will be written.") + + parser.add_argument("--img_size", default=384, type=int, + help="Resolution size") + parser.add_argument("--train_batch_size", default=64, type=int, + help="Total batch size for training.") + parser.add_argument("--eval_batch_size", default=64, type=int, + help="Total batch size for eval.") + parser.add_argument("--eval_every", default=2000, type=int, + help="Run prediction on validation set every so many steps." + "Will always run one evaluation at the end of training.") + + parser.add_argument("--learning_rate", default=3e-2, type=float, + help="The initial learning rate for SGD.") + parser.add_argument("--weight_decay", default=0, type=float, + help="Weight deay if we apply some.") + parser.add_argument("--num_steps", default=10000, type=int, + help="Total number of training epochs to perform.") + parser.add_argument("--decay_type", choices=["cosine", "linear"], default="cosine", + help="How to decay the learning rate.") + parser.add_argument("--warmup_steps", default=500, type=int, + help="Step of training to perform learning rate warmup for.") + parser.add_argument("--max_grad_norm", default=1.0, type=float, + help="Max gradient norm.") + + parser.add_argument("--local_rank", type=int, default=-1, + help="local_rank for distributed training on gpus") + parser.add_argument('--seed', type=int, default=42, + help="random seed for initialization") + parser.add_argument('--gradient_accumulation_steps', type=int, default=1, + help="Number of updates steps to accumulate before performing a backward/update pass.") + parser.add_argument('--fp16', action='store_true', + help="Whether to use 16-bit float precision instead of 32-bit") + parser.add_argument('--fp16_opt_level', type=str, default='O2', + help="For fp16: Apex AMP optimization level selected in ['O0', 'O1', 'O2', and 'O3']." + "See details at https://nvidia.github.io/apex/amp.html") + parser.add_argument('--loss_scale', type=float, default=0, + help="Loss scaling to improve fp16 numeric stability. Only used when fp16 set to True.\n" + "0 (default value): dynamic loss scaling.\n" + "Positive power of 2: static loss scaling value.\n") + quant_utils.add_arguments(parser) + args, unparsed = parser.parse_known_args() + if args.quant_mode is not None: + args = quant_utils.set_args(args) + quant_utils.set_default_quantizers(args) + + config = get_config(args) + + return args, config + + +def main(): + + args, config = parse_option() + # print(config.dump()) + + # Setup CUDA, GPU & distributed training + if args.local_rank == -1: + device = torch.device("cuda" if torch.cuda.is_available() else "cpu") + args.n_gpu = torch.cuda.device_count() + else: # Initializes the distributed backend which will take care of sychronizing nodes/GPUs + torch.cuda.set_device(args.local_rank) + device = torch.device("cuda", args.local_rank) + torch.distributed.init_process_group(backend='nccl', + timeout=timedelta(minutes=60)) + args.n_gpu = 1 + args.device = device + + # Setup logging + logging.basicConfig(format='%(asctime)s - %(levelname)s - %(name)s - %(message)s', + datefmt='%m/%d/%Y %H:%M:%S', + level=logging.INFO if args.local_rank in [-1, 0] else logging.WARN) + logger.warning("Process rank: %s, device: %s, n_gpu: %s, distributed training: %s, 16-bits training: %s" % + (args.local_rank, args.device, args.n_gpu, bool(args.local_rank != -1), args.fp16)) + + # Set seed + set_seed(args) + + # Calibration + if args.calib: + args, model = setup(args) + calib(args, config, model) + + # Quantization-Aware Training + if args.train: + # args, model = setup(args) + train(args, config) + + +if __name__ == "__main__": + main() diff --git a/examples/pytorch/vit/ViT-quantization/qat.sh b/examples/pytorch/vit/ViT-quantization/qat.sh new file mode 100644 index 000000000..0816639a3 --- /dev/null +++ b/examples/pytorch/vit/ViT-quantization/qat.sh @@ -0,0 +1,16 @@ +python -m torch.distributed.launch --nproc_per_node 1 \ + --master_port 12345 main.py \ + --train \ + --name vit \ + --pretrained_dir calib-checkpoint/ViT-B_16_calib.pth \ + --data-path $DATA_DIR \ + --model_type ViT-B_16 \ + --quant-mode ft2 \ + --img_size 384 \ + --distill \ + --teacher $CKPT_DIR/ViT-B_16.npz \ + --output qat_output \ + --quant-mode ft2\ + --batch-size 16 \ + --num-epochs 5 \ + --qat-lr 1e-4 \ No newline at end of file diff --git a/examples/pytorch/vit/ViT-quantization/quant_utils.py b/examples/pytorch/vit/ViT-quantization/quant_utils.py new file mode 100644 index 000000000..04f6bae71 --- /dev/null +++ b/examples/pytorch/vit/ViT-quantization/quant_utils.py @@ -0,0 +1,294 @@ +# coding=utf-8 +# Copyright (c) 2019-2022 NVIDIA CORPORATION. All rights reserved. +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +"""Helper functions for training models with pytorch-quantization""" + +import pickle +import re +import time +import numpy as np +import torch +import random + +import pytorch_quantization as quantization +import pytorch_quantization.nn as quant_nn +from pytorch_quantization.tensor_quant import QuantDescriptor +from pytorch_quantization import calib + +class Logger: + def info(self, s): + print("INFO:", s) + def warn(self, s): + print("WARN:", s) +logger = Logger() + +name_width = 50 # max width of layer names +qname_width = name_width + 20 # max width of quantizer names + + +def add_arguments(parser): + """Add arguments to parser for functions defined in quant_trainer.""" + + group = parser.add_argument_group('quant_trainer arguments') + group.add_argument('--wprec', type=int, default=8, + help='weight precision') + group.add_argument('--aprec', type=int, default=8, + help='activation precision') + group.add_argument('--quant-per-tensor', action='store_true', + help='per tensor weight scaling') + group.add_argument('--quant-disable', action='store_true', + help='disable all quantizers') + group.add_argument('--quant-disable-keyword', type=str, nargs='+', + help='disable quantizers by keyword') + group.add_argument('--calibrator', default='percentile', + help='which quantization range calibrator to use') + group.add_argument('--percentile', default=99.999, type=float, + help='percentile for PercentileCalibrator') + group.add_argument('--fuse-qkv', action='store_true', + help='use the same scale factor for qkv') + group.add_argument('--narrow-range', action='store_true', + help='use [-127, 127] range for activations rather than [-128, 127]') + group.add_argument('--quant-mode', type=str, default="ft2", + help='predefined quantization mode, choices: ["ft1", "ft2", "ft3", "trt"]') + + +def set_args(args): + if args.quant_mode == 'ft1': + args.wprec = 8 + args.aprec = 8 + args.quant_per_tensor = False + args.quant_disable = False + args.quant_disable_keyword = ['final_input', 'layernorm_input', 'softmax_input', 'residual_input', 'local_input', 'aftergemm'] + args.fuse_qkv = False + args.narrow_range = False + elif args.quant_mode == 'ft2': + args.wprec = 8 + args.aprec = 8 + args.quant_per_tensor = True + args.quant_disable = False + args.quant_disable_keyword = ['final_input', 'layernorm_input', 'residual_input', 'local_input'] + args.fuse_qkv = True + args.narrow_range = False + elif args.quant_mode == 'ft3': + args.wprec = 8 + args.aprec = 8 + args.quant_per_tensor = True + args.quant_disable = False + args.quant_disable_keyword = ['final_input', 'layernorm_input', 'local_input'] + args.fuse_qkv = True + args.narrow_range = False + elif args.quant_mode == 'trt': + # for demobert + args.wprec = 8 + args.aprec = 8 + args.quant_per_tensor = True + args.quant_disable = False + args.quant_disable_keyword = ['layernorm_input', 'softmax_input', 'aftergemm'] + args.fuse_qkv = True + args.narrow_range = False + else: + raise ValueError("wrong argument value for 'quant_mode'") + return args + +def set_default_quantizers(args): + """Set default quantizers before creating the model.""" + + if args.calibrator == 'max': + calib_method = 'max' + elif args.calibrator == 'percentile': + if args.percentile is None: + raise ValueError('Specify --percentile when using percentile calibrator') + calib_method = 'histogram' + elif args.calibrator == 'mse': + calib_method = 'histogram' + elif args.calibrator == 'entropy': + calib_method = 'histogram' + else: + raise ValueError(F'Invalid calibrator {args.calibrator}') + + input_desc = QuantDescriptor(num_bits=args.aprec, + calib_method=calib_method, + narrow_range=args.narrow_range, + ) + + weight_desc = QuantDescriptor(num_bits=args.wprec, + axis=(None if args.quant_per_tensor else (0,)), + ) + quant_nn.QuantLinear.set_default_quant_desc_input(input_desc) + quant_nn.QuantLinear.set_default_quant_desc_weight(weight_desc) + + +def configure_model(model, args, calib=False): + """Function called before the training loop.""" + + logger.info('Configuring Model for Quantization') + logger.info(F'using quantization package {quantization.__file__}') + + if not calib: + if args.quant_disable: + set_quantizer_by_name(model, [''], _disabled=True) + + if args.quant_disable_keyword: + set_quantizer_by_name(model, args.quant_disable_keyword, _disabled=True) + + if args.fuse_qkv: + fuse_qkv(model, args) + + if args.local_rank in [-1, 0] and not calib: + print_quant_summary(model) + time.sleep(1) # prevent eval printing overlap + + +def enable_calibration(model): + """Enable calibration of all *_input_quantizer modules in model.""" + + logger.info("Enabling Calibration") + for name, module in model.named_modules(): + if name.endswith("_quantizer"): + if module._calibrator is not None: + module.disable_quant() + module.enable_calib() + else: + module.disable() + logger.info(F"{name:{qname_width}}: {module}") + +def finish_calibration(model, args): + """Disable calibration and load amax for all "*_input_quantizer modules in model.""" + + logger.info("Loading calibrated amax") + for name, module in model.named_modules(): + if name.endswith("_quantizer"): + if module._calibrator is not None: + if isinstance(module._calibrator, calib.MaxCalibrator): + module.load_calib_amax() + elif args.calibrator == "percentile": + module.load_calib_amax("percentile", percentile=args.percentile) + else: + module.load_calib_amax(args.calibrator) + module.enable_quant() + module.disable_calib() + else: + module.enable() + if args.fuse_qkv: + fuse_qkv(model, args) + model.cuda() + print_quant_summary(model) + + +def fuse_qkv(model, args): + """Adjust quantization ranges to match an implementation where the QKV projections are implemented with a single GEMM. + Force the weight and output scale factors to match by taking the max of (Q,K,V). + """ + + def fuse3(qq, qk, qv): + if not hasattr(qq, '_amax') or not hasattr(qk, '_amax') or not hasattr(qv, '_amax'): + logger.warn('missing amax buffer, unable to fuse') + return + q = qq._amax.detach().item() + k = qk._amax.detach().item() + v = qv._amax.detach().item() + + amax = max(q, k, v) + qq._amax.fill_(amax) + qk._amax.fill_(amax) + qv._amax.fill_(amax) + logger.info(f' q={q:7.4f} k={k:7.4f} v={v:7.4f} -> {amax:7.4f}') + + for name, mod in model.named_modules(): + if name.endswith('.attn'): + logger.info(f'FUSE_QKV: {name:{name_width}}') + fuse3(mod.matmul_q_input_quantizer, mod.matmul_k_input_quantizer, mod.matmul_v_input_quantizer) + fuse3(mod.query._weight_quantizer, mod.key._weight_quantizer, mod.value._weight_quantizer) + fuse3(mod.query._aftergemm_quantizer, mod.key._aftergemm_quantizer, mod.value._aftergemm_quantizer) + + +def print_quant_summary(model): + """Print summary of all quantizer modules in the model.""" + + counters = {'quantizers': 0, 'enabled_quantizers': 0, + 'weights': 0, 'quant_weights': 0, 'sparse_weights': 0, + 'params': 0, 'sparse_params': 0} + for name, mod in model.named_modules(): + if isinstance(mod, quantization.nn.TensorQuantizer): + print(f'{name:80} {mod}') + counters['quantizers'] += 1 + if not mod._disabled: + counters['enabled_quantizers'] += 1 + + for pname, param in mod.named_parameters(): + if '.' in pname: + continue + counters['params'] += param.numel() + # fullname = f'{name}.{pname}' + # print(f'{fullname:80} {param.numel():12}') + weight_quantizer = getattr(mod, '_weight_quantizer', None) + if pname == 'weight': + counters['weights'] += param.numel() + if weight_quantizer is not None and not weight_quantizer._disabled: + counters['quant_weights'] += param.numel() + counters['sparse_weights'] += param.eq(0).sum().item() + counters['sparse_params'] += param.eq(0).sum().item() + + def print_fraction(a, b, counters, desc): + va = counters[a] + vb = counters[b] + pct = va/vb * 100 if vb != 0 else float('NaN') + print(f'{counters[a]:12}/{vb:12} ({pct:6.2f}%) {desc}') + print_fraction('enabled_quantizers', 'quantizers', counters, 'TensorQuantizers enabled') + print_fraction('quant_weights', 'weights', counters, 'Quantized weights') + print_fraction('sparse_weights', 'weights', counters, 'Zero weights') + print_fraction('weights', 'params', counters, 'Weight parameters') + print('\n\n') + + +def set_quantizer(name, mod, quantizer, k ,v): + """Set attributes for mod.quantizer.""" + + quantizer_mod = getattr(mod, quantizer, None) + if quantizer_mod is not None: + assert hasattr(quantizer_mod, k) + setattr(quantizer_mod, k, v) + else: + logger.warn(f'{name} has no {quantizer}') + + +def set_quantizers(name, mod, which='both', **kwargs): + """Set quantizer attributes for mod.""" + + s = f'Warning: changing {which} quantizers of {name:{qname_width}}' + for k, v in kwargs.items(): + s += (f' {k}={v}') + if which in ['input', 'both']: + set_quantizer(name, mod, '_input_quantizer', k, v) + if which in ['weight', 'both']: + set_quantizer(name, mod, '_weight_quantizer', k, v) + logger.info(s) + + +def set_quantizer_by_name(model, names, **kwargs): + """Set quantizer attributes for layers where name contains a substring in names.""" + + for name, mod in model.named_modules(): + if hasattr(mod, '_input_quantizer') or hasattr(mod, '_weight_quantizer'): + for n in names: + if re.search(n, name): + set_quantizers(name, mod, **kwargs) + elif name.endswith('_quantizer'): + for n in names: + if re.search(n, name): + s = f'Warning: changing {name:{name_width}}' + for k, v in kwargs.items(): + s += (f' {k}={v}') + setattr(mod, k, v) + logger.info(s) diff --git a/examples/pytorch/vit/ViT-quantization/vit_int8.py b/examples/pytorch/vit/ViT-quantization/vit_int8.py new file mode 100755 index 000000000..603808459 --- /dev/null +++ b/examples/pytorch/vit/ViT-quantization/vit_int8.py @@ -0,0 +1,484 @@ +# coding=utf-8 +# Copyright (c) 2022 NVIDIA CORPORATION. All rights reserved. +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +from __future__ import absolute_import +from __future__ import division +from __future__ import print_function + +import copy +import logging +import math + +from os.path import join as pjoin + +import torch +import torch.nn as nn +import numpy as np + +from torch.nn import CrossEntropyLoss, Dropout, Softmax, Linear, Conv2d, LayerNorm +from torch.nn.modules.utils import _pair +import torch.nn.init as init +import torch.nn.functional as F + +from scipy import ndimage + +import models.configs as configs + +from models.modeling_resnet import ResNetV2 + + +logger = logging.getLogger(__name__) + + +ATTENTION_Q = "MultiHeadDotProductAttention_1/query" +ATTENTION_K = "MultiHeadDotProductAttention_1/key" +ATTENTION_V = "MultiHeadDotProductAttention_1/value" +ATTENTION_OUT = "MultiHeadDotProductAttention_1/out" +FC_0 = "MlpBlock_3/Dense_0" +FC_1 = "MlpBlock_3/Dense_1" +ATTENTION_NORM = "LayerNorm_0" +MLP_NORM = "LayerNorm_2" + +QUANT = True +if QUANT: + from pytorch_quantization.nn import QuantLinear, TensorQuantizer + + +def np2th(weights, conv=False): + """Possibly convert HWIO to OIHW.""" + if conv: + weights = weights.transpose([3, 2, 0, 1]) + return torch.from_numpy(weights) + +def bias_gelu(bias, y): + x = bias + y + return x * 0.5 * (1.0 + torch.erf(x / 1.41421)) + +def bias_noact(bias, y): + return bias + y + +def swish(x): + return x * torch.sigmoid(x) + + +ACT2FN = {"gelu": torch.nn.functional.gelu, + "bias_gelu": bias_gelu, + "relu": torch.nn.functional.relu, + "swish": swish, + "bias_noact": bias_noact} + +class LinearActivation(nn.Module): + r"""Fused Linear and Activation Module. + """ + __constants__ = ['bias'] + + def __init__(self, in_features, out_features, act='noact', bias=True, do_quant=True): + super(LinearActivation, self).__init__() + self.in_features = in_features + self.out_features = out_features + self.act_fn = nn.Identity() + self.biased_act_fn = None + + if isinstance(act, str) or (sys.version_info[0] == 2 and isinstance(act, unicode)): + if bias and not 'bias' in act: + act = 'bias_' + act + self.biased_act_fn = ACT2FN[act] + else: + self.act_fn = ACT2FN[act] + else: + self.act_fn = act + + self.weight = nn.Parameter(torch.Tensor(out_features, in_features)) + if bias: + self.bias = nn.Parameter(torch.Tensor(out_features)) + else: + self.register_parameter('bias', None) + + self.do_quant = do_quant + if QUANT and do_quant: + self._input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self._weight_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_weight) + self._aftergemm_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + + self.reset_parameters() + + def reset_parameters(self): + init.kaiming_normal_(self.weight, a=math.sqrt(5)) + if self.bias is not None: + fan_in, _ = init._calculate_fan_in_and_fan_out(self.weight) + bound = 1 / math.sqrt(fan_in) + init.uniform_(self.bias, -bound, bound) + + def forward(self, input): + if QUANT and self.do_quant: + input = self._input_quantizer(input) + weight = self._weight_quantizer(self.weight) + else: + weight = self.weight + + if not self.bias is None: + if QUANT and self.do_quant: + return self.biased_act_fn(self.bias, self._aftergemm_quantizer(F.linear(input, weight, None))) + else: + return self.biased_act_fn(self.bias, F.linear(input, weight, None)) + else: + if QUANT and self.do_quant: + return self.act_fn(self._aftergemm_quantizer(F.linear(input, weight, None))) + else: + return self.act_fn(F.linear(input, weight, None)) + + def extra_repr(self) -> str: + return 'in_features={}, out_features={}, bias={}'.format( + self.in_features, self.out_features, self.bias is not None + ) + +class Attention(nn.Module): + def __init__(self, config, vis): + super(Attention, self).__init__() + self.vis = vis + self.num_attention_heads = config.transformer["num_heads"] + self.attention_head_size = int(config.hidden_size / self.num_attention_heads) + self.all_head_size = self.num_attention_heads * self.attention_head_size + + self.query = LinearActivation(config.hidden_size, self.all_head_size) + self.key = LinearActivation(config.hidden_size, self.all_head_size) + self.value = LinearActivation(config.hidden_size, self.all_head_size) + + self.out = LinearActivation(config.hidden_size, config.hidden_size) + self.attn_dropout = Dropout(config.transformer["attention_dropout_rate"]) + self.proj_dropout = Dropout(config.transformer["attention_dropout_rate"]) + + self.softmax = Softmax(dim=-1) + + if QUANT: + self.matmul_q_input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self.matmul_k_input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self.matmul_v_input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self.matmul_a_input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self.softmax_input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + + def transpose_for_scores(self, x): + new_x_shape = x.size()[:-1] + (self.num_attention_heads, self.attention_head_size) + x = x.view(*new_x_shape) + return x.permute(0, 2, 1, 3) + + def forward(self, hidden_states): + mixed_query_layer = self.query(hidden_states) + mixed_key_layer = self.key(hidden_states) + mixed_value_layer = self.value(hidden_states) + + query_layer = self.transpose_for_scores(mixed_query_layer) + key_layer = self.transpose_for_scores(mixed_key_layer) + value_layer = self.transpose_for_scores(mixed_value_layer) + + if QUANT: + + attention_scores = torch.matmul(self.matmul_q_input_quantizer(query_layer), + self.matmul_k_input_quantizer(key_layer.transpose(-1, -2))) + attention_scores = self.softmax_input_quantizer(attention_scores) + + else: + attention_scores = torch.matmul(query_layer, key_layer.transpose(-1, -2)) + attention_scores = attention_scores / math.sqrt(self.attention_head_size) + attention_probs = self.softmax(attention_scores) + weights = attention_probs if self.vis else None + attention_probs = self.attn_dropout(attention_probs) + + if QUANT: + context_layer = torch.matmul(self.matmul_a_input_quantizer(attention_probs), + self.matmul_v_input_quantizer(value_layer)) + else: + context_layer = torch.matmul(attention_probs, value_layer) + context_layer = context_layer.permute(0, 2, 1, 3).contiguous() + new_context_layer_shape = context_layer.size()[:-2] + (self.all_head_size,) + context_layer = context_layer.view(*new_context_layer_shape) + + attention_output = self.out(context_layer) + attention_output = self.proj_dropout(attention_output) + return attention_output, weights + + +class Mlp(nn.Module): + def __init__(self, config): + super(Mlp, self).__init__() + self.fc1 = LinearActivation(config.hidden_size, config.transformer["mlp_dim"], act='noact') + self.fc2 = LinearActivation(config.transformer["mlp_dim"], config.hidden_size, act='noact') + self.act_fn = ACT2FN["gelu"] + self.dropout = Dropout(config.transformer["dropout_rate"]) + + self._init_weights() + + def _init_weights(self): + nn.init.xavier_uniform_(self.fc1.weight) + nn.init.xavier_uniform_(self.fc2.weight) + nn.init.normal_(self.fc1.bias, std=1e-6) + nn.init.normal_(self.fc2.bias, std=1e-6) + + def forward(self, x): + x = self.fc1(x) + x = self.act_fn(x) + x = self.dropout(x) + x = self.fc2(x) + x = self.dropout(x) + return x + + +class Embeddings(nn.Module): + """Construct the embeddings from patch, position embeddings. + """ + def __init__(self, config, img_size, in_channels=3): + super(Embeddings, self).__init__() + self.hybrid = None + img_size = _pair(img_size) + + if config.patches.get("grid") is not None: + grid_size = config.patches["grid"] + patch_size = (img_size[0] // 16 // grid_size[0], img_size[1] // 16 // grid_size[1]) + n_patches = (img_size[0] // 16) * (img_size[1] // 16) + self.hybrid = True + else: + patch_size = _pair(config.patches["size"]) + n_patches = (img_size[0] // patch_size[0]) * (img_size[1] // patch_size[1]) + self.hybrid = False + + if self.hybrid: + self.hybrid_model = ResNetV2(block_units=config.resnet.num_layers, + width_factor=config.resnet.width_factor) + in_channels = self.hybrid_model.width * 16 + self.patch_embeddings = Conv2d(in_channels=in_channels, + out_channels=config.hidden_size, + kernel_size=patch_size, + stride=patch_size) + self.position_embeddings = nn.Parameter(torch.zeros(1, n_patches+1, config.hidden_size)) + self.cls_token = nn.Parameter(torch.zeros(1, 1, config.hidden_size)) + + self.dropout = Dropout(config.transformer["dropout_rate"]) + + def forward(self, x): + B = x.shape[0] + cls_tokens = self.cls_token.expand(B, -1, -1) + + if self.hybrid: + x = self.hybrid_model(x) + x = self.patch_embeddings(x) + x = x.flatten(2) + x = x.transpose(-1, -2) + + x = torch.cat((cls_tokens, x), dim=1) + + embeddings = x + self.position_embeddings + embeddings = self.dropout(embeddings) + return embeddings + + +class Block(nn.Module): + def __init__(self, config, vis): + super(Block, self).__init__() + self.hidden_size = config.hidden_size + self.attention_norm = LayerNorm(config.hidden_size, eps=1e-6) + self.ffn_norm = LayerNorm(config.hidden_size, eps=1e-6) + self.ffn = Mlp(config) + self.attn = Attention(config, vis) + + if QUANT: + self.layernorm_input1_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self.add1_local_input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self.add1_residual_input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self.layernorm_input2_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self.add2_local_input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + self.add2_residual_input_quantizer = TensorQuantizer(QuantLinear.default_quant_desc_input) + + def forward(self, x): + h = x + if QUANT: + x = self.attention_norm(self.layernorm_input1_quantizer(x)) + else: + x = self.attention_norm(x) + x, weights = self.attn(x) + + if QUANT: + x = self.add1_local_input_quantizer(x) + self.add1_residual_input_quantizer(h) + else: + x = x + h + + h = x + if QUANT: + x = self.ffn_norm(self.layernorm_input2_quantizer(x)) + else: + x = self.ffn_norm(x) + x = self.ffn(x) + # print('adding bias', x[0,0,:8]) + if QUANT: + x = self.add2_local_input_quantizer(x) + self.add2_residual_input_quantizer(h) + else: + x = x + h + # print('residual:', h[0,0,:8]) + # print('adding bias+res', x[0,0,:8]) + return x, weights + + def load_from(self, weights, n_block): + ROOT = f"Transformer/encoderblock_{n_block}" + with torch.no_grad(): + query_weight = np2th(weights[pjoin(ROOT, ATTENTION_Q, "kernel")]).view(self.hidden_size, self.hidden_size).t() + key_weight = np2th(weights[pjoin(ROOT, ATTENTION_K, "kernel")]).view(self.hidden_size, self.hidden_size).t() + value_weight = np2th(weights[pjoin(ROOT, ATTENTION_V, "kernel")]).view(self.hidden_size, self.hidden_size).t() + out_weight = np2th(weights[pjoin(ROOT, ATTENTION_OUT, "kernel")]).view(self.hidden_size, self.hidden_size).t() + + query_bias = np2th(weights[pjoin(ROOT, ATTENTION_Q, "bias")]).view(-1) + key_bias = np2th(weights[pjoin(ROOT, ATTENTION_K, "bias")]).view(-1) + value_bias = np2th(weights[pjoin(ROOT, ATTENTION_V, "bias")]).view(-1) + out_bias = np2th(weights[pjoin(ROOT, ATTENTION_OUT, "bias")]).view(-1) + + self.attn.query.weight.copy_(query_weight) + self.attn.key.weight.copy_(key_weight) + self.attn.value.weight.copy_(value_weight) + self.attn.out.weight.copy_(out_weight) + self.attn.query.bias.copy_(query_bias) + self.attn.key.bias.copy_(key_bias) + self.attn.value.bias.copy_(value_bias) + self.attn.out.bias.copy_(out_bias) + + mlp_weight_0 = np2th(weights[pjoin(ROOT, FC_0, "kernel")]).t() + mlp_weight_1 = np2th(weights[pjoin(ROOT, FC_1, "kernel")]).t() + mlp_bias_0 = np2th(weights[pjoin(ROOT, FC_0, "bias")]).t() + mlp_bias_1 = np2th(weights[pjoin(ROOT, FC_1, "bias")]).t() + + self.ffn.fc1.weight.copy_(mlp_weight_0) + self.ffn.fc2.weight.copy_(mlp_weight_1) + self.ffn.fc1.bias.copy_(mlp_bias_0) + self.ffn.fc2.bias.copy_(mlp_bias_1) + + self.attention_norm.weight.copy_(np2th(weights[pjoin(ROOT, ATTENTION_NORM, "scale")])) + self.attention_norm.bias.copy_(np2th(weights[pjoin(ROOT, ATTENTION_NORM, "bias")])) + self.ffn_norm.weight.copy_(np2th(weights[pjoin(ROOT, MLP_NORM, "scale")])) + self.ffn_norm.bias.copy_(np2th(weights[pjoin(ROOT, MLP_NORM, "bias")])) + + +class Encoder(nn.Module): + def __init__(self, config, vis): + super(Encoder, self).__init__() + self.vis = vis + self.layer = nn.ModuleList() + self.encoder_norm = LayerNorm(config.hidden_size, eps=1e-6) + for _ in range(config.transformer["num_layers"]): + layer = Block(config, vis) + self.layer.append(copy.deepcopy(layer)) + + def forward(self, hidden_states): + attn_weights = [] + for idx, layer_block in enumerate(self.layer): + hidden_states, weights = layer_block(hidden_states) + if self.vis: + attn_weights.append(weights) + encoded = self.encoder_norm(hidden_states) + return encoded, attn_weights + + +class Transformer(nn.Module): + def __init__(self, config, img_size, vis): + super(Transformer, self).__init__() + self.embeddings = Embeddings(config, img_size=img_size) + self.encoder = Encoder(config, vis) + + def forward(self, input_ids): + embedding_output = self.embeddings(input_ids) + encoded, attn_weights = self.encoder(embedding_output) + return encoded, attn_weights + + +class VisionTransformerINT8(nn.Module): + def __init__(self, config, img_size=224, num_classes=21843, zero_head=False, vis=False): + super(VisionTransformerINT8, self).__init__() + self.num_classes = num_classes + self.zero_head = zero_head + self.classifier = config.classifier + + self.transformer = Transformer(config, img_size, vis) + self.head = Linear(config.hidden_size, num_classes) + + def forward(self, x, labels=None): + x, attn_weights = self.transformer(x) + logits = self.head(x[:, 0]) + + if labels is not None: + loss_fct = CrossEntropyLoss() + loss = loss_fct(logits.view(-1, self.num_classes), labels.view(-1)) + return logits, loss + else: + return logits, attn_weights + + def load_from(self, weights): + with torch.no_grad(): + if self.zero_head: + nn.init.zeros_(self.head.weight) + nn.init.zeros_(self.head.bias) + else: + self.head.weight.copy_(np2th(weights["head/kernel"]).t()) + self.head.bias.copy_(np2th(weights["head/bias"]).t()) + + self.transformer.embeddings.patch_embeddings.weight.copy_(np2th(weights["embedding/kernel"], conv=True)) + self.transformer.embeddings.patch_embeddings.bias.copy_(np2th(weights["embedding/bias"])) + self.transformer.embeddings.cls_token.copy_(np2th(weights["cls"])) + self.transformer.encoder.encoder_norm.weight.copy_(np2th(weights["Transformer/encoder_norm/scale"])) + self.transformer.encoder.encoder_norm.bias.copy_(np2th(weights["Transformer/encoder_norm/bias"])) + + posemb = np2th(weights["Transformer/posembed_input/pos_embedding"]) + posemb_new = self.transformer.embeddings.position_embeddings + if posemb.size() == posemb_new.size(): + self.transformer.embeddings.position_embeddings.copy_(posemb) + else: + logger.info("load_pretrained: resized variant: %s to %s" % (posemb.size(), posemb_new.size())) + ntok_new = posemb_new.size(1) + + if self.classifier == "token": + posemb_tok, posemb_grid = posemb[:, :1], posemb[0, 1:] + ntok_new -= 1 + else: + posemb_tok, posemb_grid = posemb[:, :0], posemb[0] + + gs_old = int(np.sqrt(len(posemb_grid))) + gs_new = int(np.sqrt(ntok_new)) + print('load_pretrained: grid-size from %s to %s' % (gs_old, gs_new)) + posemb_grid = posemb_grid.reshape(gs_old, gs_old, -1) + + zoom = (gs_new / gs_old, gs_new / gs_old, 1) + posemb_grid = ndimage.zoom(posemb_grid, zoom, order=1) + posemb_grid = posemb_grid.reshape(1, gs_new * gs_new, -1) + posemb = np.concatenate([posemb_tok, posemb_grid], axis=1) + self.transformer.embeddings.position_embeddings.copy_(np2th(posemb)) + + for bname, block in self.transformer.encoder.named_children(): + for uname, unit in block.named_children(): + unit.load_from(weights, n_block=uname) + + if self.transformer.embeddings.hybrid: + self.transformer.embeddings.hybrid_model.root.conv.weight.copy_(np2th(weights["conv_root/kernel"], conv=True)) + gn_weight = np2th(weights["gn_root/scale"]).view(-1) + gn_bias = np2th(weights["gn_root/bias"]).view(-1) + self.transformer.embeddings.hybrid_model.root.gn.weight.copy_(gn_weight) + self.transformer.embeddings.hybrid_model.root.gn.bias.copy_(gn_bias) + + for bname, block in self.transformer.embeddings.hybrid_model.body.named_children(): + for uname, unit in block.named_children(): + unit.load_from(weights, n_block=bname, n_unit=uname) + + +CONFIGS = { + 'ViT-B_16': configs.get_b16_config(), + 'ViT-B_32': configs.get_b32_config(), + 'ViT-L_16': configs.get_l16_config(), + 'ViT-L_32': configs.get_l32_config(), + 'ViT-H_14': configs.get_h14_config(), + 'R50-ViT-B_16': configs.get_r50_b16_config(), + 'testing': configs.get_testing(), +} diff --git a/examples/pytorch/vit/VisionTransformerINT8WeightLoader.py b/examples/pytorch/vit/VisionTransformerINT8WeightLoader.py new file mode 100644 index 000000000..ad7cd7b9c --- /dev/null +++ b/examples/pytorch/vit/VisionTransformerINT8WeightLoader.py @@ -0,0 +1,150 @@ +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import torch as th +import math +import numpy as np +import os +from scipy import ndimage + +from checkpoint_quantization import checkpoint_quantization + + +L_ROOT = 'Transformer/encoderblock_{}' +ATT_Q = 'MultiHeadDotProductAttention_1/query' +ATT_K = 'MultiHeadDotProductAttention_1/key' +ATT_V = 'MultiHeadDotProductAttention_1/value' +ATT_OUT = 'MultiHeadDotProductAttention_1/out' +ATT_NORM = 'LayerNorm_0' +FFN_NORM = 'LayerNorm_2' +FFN_IN = 'MlpBlock_3/Dense_0' +FFN_OUT = 'MlpBlock_3/Dense_1' + +def np2th(weights, is_conv=False): + if is_conv: + """ convert HWIO to OIHW.""" + weights = weights.transpose([3, 2, 0, 1]) + return th.from_numpy(weights).contiguous() + +class ViTINT8WeightLoader(object): + def __init__(self, layer_num, img_size, patch_size, weight_dict=None, classifier='token'): + """weights need be a pytorch state_dict of swin transformer model""" + + pre_layer_weight_names = [ + 'transformer.embeddings.patch_embeddings.weight', + 'transformer.embeddings.patch_embeddings.bias', + 'transformer.embeddings.cls_token', + 'transformer.embeddings.position_embeddings' + ] + self.layer_num = layer_num + self.weights = [] + self.int8 = False + if weight_dict is None: + print("[ERROR][SwinTransformerWeights::__init__] weights should not be empty!") + exit(-1) + + self._generated_weights = False + + for name in pre_layer_weight_names: + if name not in weight_dict.keys(): + print("Unsupport weight file: Missing weights %s" % name) + + th_weight = weight_dict[name] + if name.split('.')[-1] == "pos_embedding": + posemb_new_size = pow(img_size//patch_size, 2) + 1 + if th_weight.size(1) != posemb_new_size: + print("load_pretrained: resized variant: %s to %s" % (th_weight.size(1), posemb_new_size)) + ntok_new = posemb_new_size + + if classifier == "token": + posemb_tok, posemb_grid = th_weight[:, :1], th_weight[0, 1:] + ntok_new -= 1 + else: + posemb_tok, posemb_grid = th_weight[:, :0], th_weight[0] + + gs_old = int(np.sqrt(len(posemb_grid))) + gs_new = int(np.sqrt(ntok_new)) + print('load_pretrained: grid-size from %s to %s' % (gs_old, gs_new)) + posemb_grid = posemb_grid.reshape(gs_old, gs_old, -1) + + zoom = (gs_new / gs_old, gs_new / gs_old, 1) + posemb_grid = ndimage.zoom(posemb_grid, zoom, order=1) + posemb_grid = posemb_grid.reshape(1, gs_new * gs_new, -1) + posemb = np.concatenate([posemb_tok, posemb_grid], axis=1) + th_weight = np2th(posemb) + weight_dict[name] = th_weight + + self.weights = weight_dict + + # def load_weights(self, weight_path:str): + # suffix = weight_path.split('.')[-1] + # if suffix != 'pth': + # print("Unsupport weight file: Unrecognized format %s " % suffix) + # exit(-1) + # return th.load(weight_path) + + def to_cuda(self): + if not self.int8: + for k, v in self.weights.items(): + self.weights[k] = v.cuda() + else: + h_scale_list = {} + for k, v in self.weights.items(): + if "amaxList" in k: + k_h = k.replace("amaxList", "h_amaxList") + h_scale_list[k_h] = v + self.weights[k] = v.cuda() + for k, v in h_scale_list.items(): + self.weights[k] = v + + def to_half(self): + for k, v in self.weights.items(): + self.weights[k] = v.half() + + def listed_weights(self): + ret = [] + for k, v in self.weights.items(): + if k.split('.')[-1] == '_amax' or k.endswith('amaxList'): + continue + if k.split('.')[0] == 'head': + continue + # print(k, v.type()) + ret.append(v) + + for i in range(self.layer_num): + name = 'transformer.encoder.layer.{}.amaxList'.format(i) + ret.append(self.weights[name]) + # print(name, self.weights[name].type()) + name = 'transformer.encoder.layer.{}.h_amaxList'.format(i) + ret.append(self.weights[name]) + # print(name, self.weights[name].type()) + + return ret + + def to_int8(self, ths_path='../../../lib/libpyt_vit.so'): + # print(self.weights.keys()) + if 'transformer.encoder.layer.0.attn.query._input_quantizer._amax' not in self.weights: + raise RuntimeError("There is no quantization node in the checkpoint, cannot be quantized to int8.") + if self.int8: + return + self.int8 = True + for k, v in self.weights.items(): + if k.endswith('bias') or k.endswith('norm.weight') or 'embeddings' in k: + self.weights[k] = v.half() + elif k.endswith('weight'): + self.weights[k] = v.float().cuda() + else: + self.weights[k] = v.float().cpu() + self.weights = checkpoint_quantization(self.weights, ths_path, verbose=False) + # print(self.weights.keys()) diff --git a/examples/pytorch/vit/VisionTransformerWeightLoader.py b/examples/pytorch/vit/VisionTransformerWeightLoader.py new file mode 100644 index 000000000..be2ba9854 --- /dev/null +++ b/examples/pytorch/vit/VisionTransformerWeightLoader.py @@ -0,0 +1,141 @@ +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import torch as th +import math +import numpy as np +import os +from scipy import ndimage + + +L_ROOT = 'Transformer/encoderblock_{}' +ATT_Q = 'MultiHeadDotProductAttention_1/query' +ATT_K = 'MultiHeadDotProductAttention_1/key' +ATT_V = 'MultiHeadDotProductAttention_1/value' +ATT_OUT = 'MultiHeadDotProductAttention_1/out' +ATT_NORM = 'LayerNorm_0' +FFN_NORM = 'LayerNorm_2' +FFN_IN = 'MlpBlock_3/Dense_0' +FFN_OUT = 'MlpBlock_3/Dense_1' + +def np2th(weights, is_conv=False): + if is_conv: + """ convert HWIO to OIHW.""" + weights = weights.transpose([3, 2, 0, 1]) + return th.from_numpy(weights).contiguous() + +class ViTWeightLoader(object): + def __init__(self, layer_num, img_size, patch_size, weight_path=None, classifier='token'): + """weights need be a state_dict of swin transformer model""" + layer_weight_names = [ + os.path.join(L_ROOT, ATT_NORM, 'scale' ), + os.path.join(L_ROOT, ATT_NORM, 'bias' ), + os.path.join(L_ROOT, ATT_Q, 'kernel' ), + os.path.join(L_ROOT, ATT_Q, 'bias' ), + os.path.join(L_ROOT, ATT_K, 'kernel' ), + os.path.join(L_ROOT, ATT_K, 'bias' ), + os.path.join(L_ROOT, ATT_V, 'kernel' ), + os.path.join(L_ROOT, ATT_V, 'bias' ), + os.path.join(L_ROOT, ATT_OUT, 'kernel' ), + os.path.join(L_ROOT, ATT_OUT, 'bias' ), + os.path.join(L_ROOT, FFN_NORM, 'scale' ), + os.path.join(L_ROOT, FFN_NORM, 'bias' ), + os.path.join(L_ROOT, FFN_IN, 'kernel' ), + os.path.join(L_ROOT, FFN_IN, 'bias' ), + os.path.join(L_ROOT, FFN_OUT, 'kernel' ), + os.path.join(L_ROOT, FFN_OUT, 'bias' ) + ] + + pre_layer_weight_names = [ + 'embedding/kernel', + 'embedding/bias', + 'cls', + 'Transformer/posembed_input/pos_embedding' + ] + post_layer_weight_names = [ + 'Transformer/encoder_norm/scale', + 'Transformer/encoder_norm/bias' + ] + self.layer_num = layer_num + self.weights = [] + if weight_path is None: + print("[ERROR][SwinTransformerWeights::__init__] weights should not be empty!") + exit(-1) + else: + self._generated_weights = False + weight_dict = self.load_weights(weight_path) + + for name in pre_layer_weight_names: + if name not in weight_dict.files: + print("Unsupport weight file: Missing weights %s" % name) + is_conv = name == 'embedding/kernel' + + if classifier != 'token' and name == 'cls': + continue + + th_weight = np2th(weight_dict[name], is_conv) + if name.split('/')[-1] == "pos_embedding": + posemb_new_size = pow(img_size//patch_size, 2) + 1 + if th_weight.size(1) != posemb_new_size: + print("load_pretrained: resized variant: %s to %s" % (th_weight.size(1), posemb_new_size)) + ntok_new = posemb_new_size + + if classifier == "token": + posemb_tok, posemb_grid = th_weight[:, :1], th_weight[0, 1:] + ntok_new -= 1 + else: + posemb_tok, posemb_grid = th_weight[:, :0], th_weight[0] + + gs_old = int(np.sqrt(len(posemb_grid))) + gs_new = int(np.sqrt(ntok_new)) + print('load_pretrained: grid-size from %s to %s' % (gs_old, gs_new)) + posemb_grid = posemb_grid.reshape(gs_old, gs_old, -1) + + zoom = (gs_new / gs_old, gs_new / gs_old, 1) + posemb_grid = ndimage.zoom(posemb_grid, zoom, order=1) + posemb_grid = posemb_grid.reshape(1, gs_new * gs_new, -1) + posemb = np.concatenate([posemb_tok, posemb_grid], axis=1) + th_weight = np2th(posemb) + + self.weights.append(th_weight) + #loop over layers + for layer_idx in range(layer_num): + for name in layer_weight_names: + w_name = name.format(layer_idx) + if w_name not in weight_dict.files: + print("Unsupport weight file: Missing weights %s" % w_name) + th_weight = np2th(weight_dict[w_name]) + self.weights.append(th_weight) + + for name in post_layer_weight_names: + if name not in weight_dict.files: + print("Unsupport weight file: Missing weights %s" % name) + th_weight = np2th(weight_dict[name]) + self.weights.append(th_weight) + + def load_weights(self, weight_path:str): + suffix = weight_path.split('.')[-1] + if suffix != 'npz': + print("Unsupport weight file: Unrecognized format %s " % suffix) + exit(-1) + return np.load(weight_path) + + def to_cuda(self): + for idx, v in enumerate(self.weights): + self.weights[idx] = v.cuda() + + def to_half(self): + for idx, v in enumerate(self.weights): + self.weights[idx] = v.half() + diff --git a/examples/pytorch/vit/checkpoint_quantization.py b/examples/pytorch/vit/checkpoint_quantization.py new file mode 100644 index 000000000..69d1c090c --- /dev/null +++ b/examples/pytorch/vit/checkpoint_quantization.py @@ -0,0 +1,218 @@ +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import sys +import argparse +import re +import numpy as np +import torch + +ACTIVATION_AMAX_NUM = 72 +INT8O_GEMM_NUM = 8 +TRT_FUSED_MHA_AMAX_NUM = 3 +SCALE_RESERVE_NUM = 21 + +def checkpoint_quantization(init_dict, ths_path='../../../build/lib/libpyt_vit.so', verbose=True): + print("Quantizing checkpoint ...") + torch.classes.load_library(ths_path) + weight_quantize = torch.ops.fastertransformer.vit_weight_quantize + + def init_graph(): + layer_num = 0 + regex = re.compile('layer.\d+') + amaxTotalNum = 0 + for name, tensor_value in init_dict.items(): + if "ffn.fc1" in name and amaxTotalNum == 0: + amaxTotalNum = ACTIVATION_AMAX_NUM + 9 * tensor_value.size(1) + INT8O_GEMM_NUM + TRT_FUSED_MHA_AMAX_NUM + SCALE_RESERVE_NUM + if verbose: + print("amaxTotalNum", amaxTotalNum) + print("Hidden size:", tensor_value.size(1)) + tmp = regex.findall(name) + if len(tmp) < 1: + continue + num_tmp = int(tmp[0].replace("layer.", "")) + if layer_num < num_tmp: + layer_num = num_tmp + layer_num = layer_num + 1 + #add new var for amax + for i in range(layer_num): + init_dict["transformer.encoder.layer.{}.amaxList".format(i)] = torch.zeros((amaxTotalNum,), dtype=torch.float32) + return layer_num, amaxTotalNum + layer_num, amaxTotalNum = init_graph() + + kernel_name_list = ["attn.query", + "attn.key", + "attn.value", + "attn.out", + "ffn.fc1", + "ffn.fc2"] + + amax_name_list = ["attn.query._input_quantizer", + "attn.query._aftergemm_quantizer", + "attn.matmul_q_input_quantizer", + "attn.key._aftergemm_quantizer", + "attn.matmul_k_input_quantizer", + "attn.value._aftergemm_quantizer", + "attn.matmul_v_input_quantizer", + "attn.softmax_input_quantizer", + "attn.matmul_a_input_quantizer", + "attn.out._input_quantizer", + "attn.out._aftergemm_quantizer", + "ffn.fc1._input_quantizer", + "ffn.fc1._aftergemm_quantizer", + "ffn.fc2._input_quantizer", + "ffn.fc2._aftergemm_quantizer", + "special_F2Bias_scale", + ] + + int8O_gemm_weight_amax_list = [0 for i in range(INT8O_GEMM_NUM)] + int8O_gemm_weight_list = ["attn.query", + "attn.key", + "attn.value", + "attn.matmul_k_input_quantizer", + "attn.matmul_v_input_quantizer", + "attn.out", + "ffn.fc1", + "ffn.fc2"] + + int8O_gemm_input_amax_list = [0 for i in range(INT8O_GEMM_NUM)] + int8O_gemm_input_list = ["attn.query._input_quantizer", + "attn.key._input_quantizer", + "attn.value._input_quantizer", + "attn.matmul_q_input_quantizer", + "attn.matmul_a_input_quantizer", + "attn.out._input_quantizer", + "ffn.fc1._input_quantizer", + "ffn.fc2._input_quantizer"] + + int8O_gemm_output_amax_list = [0 for i in range(INT8O_GEMM_NUM)] + int8O_gemm_output_list = ["attn.query._aftergemm_quantizer", + "attn.key._aftergemm_quantizer", + "attn.value._aftergemm_quantizer", + "attn.softmax_input_quantizer", + "attn.out._input_quantizer", + "attn.out._aftergemm_quantizer", + "ffn.fc1._aftergemm_quantizer", + "ffn.fc2._aftergemm_quantizer"] + + same_value_tuple_list = [("attn.query._input_quantizer", + "attn.key._input_quantizer", + "attn.value._input_quantizer")] + + factor = 1000000.0 + for i in range(layer_num): + amaxList = np.zeros([amaxTotalNum]).astype(np.float32) + amax_id = 0 + # verify some quantizers have same value. input_quantizer is per-tensor quantization + for same_value_tuple in same_value_tuple_list: + tmp_v = init_dict["transformer.encoder.layer.{}.{}._amax".format(i, same_value_tuple[0])].numpy() + for same_value_name in same_value_tuple: + tmp_v_2 = init_dict["transformer.encoder.layer.{}.{}._amax".format(i, same_value_name)].numpy() + assert(np.allclose(tmp_v, tmp_v_2)) + + for amax_name in amax_name_list: + if amax_name == "special_F2Bias_scale": + if i != layer_num - 1: + quant_max = init_dict["transformer.encoder.layer.{}.{}._amax".format(i+1, amax_name_list[0])].item() + amax = abs(quant_max) + else: + #not used, placeholder + amax = 1.0 + amaxList[amax_id] = amax + amax_id += 1 + amaxList[amax_id] = amax/127.0 + amax_id += 1 + amaxList[amax_id] = amax/127.0/127.0 + amax_id += 1 + amaxList[amax_id] = 127.0/amax + amax_id += 1 + continue + + quant_max = init_dict["transformer.encoder.layer.{}.{}._amax".format(i, amax_name)].item() + amax = abs(quant_max)#round(abs(quant_max)*factor)/factor + if amax_name in int8O_gemm_input_list: + int8O_gemm_input_amax_list[int8O_gemm_input_list.index(amax_name)] = amax + if amax_name == "attn.query._input_quantizer": + int8O_gemm_input_amax_list[int8O_gemm_input_list.index("attn.key._input_quantizer")] = amax + int8O_gemm_input_amax_list[int8O_gemm_input_list.index("attn.value._input_quantizer")] = amax + if amax_name in int8O_gemm_output_list: + int8O_gemm_output_amax_list[int8O_gemm_output_list.index(amax_name)] = amax + if amax_name in int8O_gemm_weight_list: + int8O_gemm_weight_amax_list[int8O_gemm_weight_list.index(amax_name)] = amax + amaxList[amax_id] = amax + amax_id += 1 + amaxList[amax_id] = amax/127.0 + amax_id += 1 + amaxList[amax_id] = amax/127.0/127.0 + amax_id += 1 + amaxList[amax_id] = 127.0/amax + amax_id += 1 + if verbose: + print(i, amax_name) + print('quant_max:', quant_max) + print('amax:', amax) + if verbose: + print("done process layer_{} activation amax".format(i)) + + #kernel amax starts from ACTIVATION_AMAX_NUM + assert amax_id == 64 + amax_id = ACTIVATION_AMAX_NUM + for kernel_id, kernel_name in enumerate(kernel_name_list): + kernel = init_dict["transformer.encoder.layer.{}.{}.weight".format(i, kernel_name)].transpose(-1, -2).contiguous() + quant_max2 = init_dict["transformer.encoder.layer.{}.{}._weight_quantizer._amax".format(i, kernel_name)] + amax2 = abs(quant_max2) + if (amax2.dim() == 0): + quant_max_processed = torch.full((kernel.size(1),), amax2.item(), dtype=amax2.dtype, device=amax2.device) + else: + quant_max_processed = amax2.view(-1) + kernel_processed = weight_quantize(kernel.cuda(), quant_max_processed.cuda()) + init_dict["transformer.encoder.layer.{}.{}.weight".format(i, kernel_name)] = kernel_processed + if kernel_name in int8O_gemm_weight_list: + int8O_gemm_weight_amax_list[int8O_gemm_weight_list.index(kernel_name)] = quant_max_processed[0] + for e in quant_max_processed: + amaxList[amax_id] = e + amax_id += 1 + # if verbose: + # print(i, kernel_name) + # print('kernel:', kernel) + # print('quant_max2:', quant_max2) + # print('quant_max_processed_:', quant_max_processed) + + #for int8O gemm deQuant + for j in range(INT8O_GEMM_NUM): + amaxList[amax_id] = (int8O_gemm_input_amax_list[j]*int8O_gemm_weight_amax_list[j])/(127.0*int8O_gemm_output_amax_list[j]) + amax_id += 1 + + #for trt fused MHA amax + #### QKV_addBias_amax + amaxList[amax_id] = np.maximum(np.maximum(amaxList[8],amaxList[16]), amaxList[24]) + amax_id += 1 + #### softmax amax + amaxList[amax_id] = amaxList[32] + amax_id += 1 + #### bmm2 amax + amaxList[amax_id] = amaxList[36] + amax_id += 1 + + init_dict["transformer.encoder.layer.{}.amaxList".format(i)] = torch.tensor(amaxList, dtype=torch.float32) + if verbose: + print("done process layer_{} kernel weight".format(i)) + + print("Quantizing checkpoint done.") + return init_dict + + +if __name__ == '__main__': + model_dict = torch.load('checkpoint/ViT-B_16_calib.pth', map_location='cpu') + checkpoint_quantization(model_dict, '../../../build/lib/libpyt_vit.so', verbose=True) \ No newline at end of file diff --git a/examples/pytorch/vit/infer_visiontransformer_int8_op.py b/examples/pytorch/vit/infer_visiontransformer_int8_op.py new file mode 100644 index 000000000..b221570bf --- /dev/null +++ b/examples/pytorch/vit/infer_visiontransformer_int8_op.py @@ -0,0 +1,348 @@ +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +import os +import time +import argparse +import datetime +import numpy as np + +import torch +import torch.backends.cudnn as cudnn +import torch.distributed as dist +from timm.utils import accuracy, AverageMeter + +from VisionTransformerINT8WeightLoader import ViTINT8WeightLoader + +import sys +sys.path.insert(0, "./ViT-quantization/ViT-pytorch") + + +# from config import get_config +# from models import build_model +from models.modeling import CONFIGS + +sys.path.insert(0, "./ViT-quantization") +from vit_int8 import VisionTransformerINT8 +import quant_utils +from config import get_config +from data import build_val_loader + +test_time = 100 +warmup_time = 10 + +def setup(args): + # Prepare model + config = CONFIGS[args.model_type] + print(config) + + num_classes = 1000 if args.dataset == "ImageNet" else 100 + + model = VisionTransformerINT8(config, args.img_size, zero_head=False, num_classes=num_classes) + model.load_state_dict(torch.load(args.calibrated_dir)) + + quant_utils.configure_model(model, args, calib=False) + model.to(args.device) + + return config, model + +def parse_option(): + parser = argparse.ArgumentParser('ViT evaluation script', add_help=False) + + parser.add_argument("--model_type", choices=["ViT-B_16", "ViT-B_32", "ViT-L_16", + "ViT-L_32", "ViT-H_14"], + default="ViT-B_16", + help="Which variant to use.") + parser.add_argument("--img_size", default=384, type=int, + help="Resolution size") + parser.add_argument("--dataset", choices=["ImageNet"], default="ImageNet", + help="Which downstream task.") + parser.add_argument("--pretrained_dir", type=str, default="checkpoint/ViT-B_16.npz", + help="Where to search for pretrained ViT models.") + parser.add_argument("--calibrated_dir", type=str, default="checkpoint/ViT-B_16_calib.pth", + help="Where to search for calibrated ViT models.") + parser.add_argument("--data-path", type=str, default="/workspace/imagenet", + help="Root directory for datasets.") + + # easy config modification + parser.add_argument('--th-path', type=str, help='path to pytorch library', required=True) + parser.add_argument('--batch-size', type=int, default=32, help="batch size for single GPU") + parser.add_argument('--int8-mode', type=int, choices=[1,2,3], default=2, + help="Which int8 mode to use, choices=[1,2,3], default=2") + parser.add_argument('--fp16_opt_level', type=str, default='O2', + help="For fp16: Apex AMP optimization level selected in ['O0', 'O1', 'O2', and 'O3']." + "See details at https://nvidia.github.io/apex/amp.html") + parser.add_argument('--seed', type=int, default=42, + help="random seed for initialization") + parser.add_argument("--local_rank", type=int, default=-1, help='local rank for DistributedDataParallel') + parser.add_argument("--validate", action="store_true", help='If true, validate on ImageNet, else just profile') + + quant_utils.add_arguments(parser) + args, unparsed = parser.parse_known_args() + if args.quant_mode is not None: + args = quant_utils.set_args(args) + quant_utils.set_default_quantizers(args) + + config = get_config(args) + + if args.quant_mode == 'ft1': + args.int8_mode = 1 + elif args.quant_mode == 'ft2': + args.int8_mode = 2 + else: + raise NotImplementedError("For ViT-INT8, we only support ft1/ft2 as quant_mode") + + return args, config + + +def main(args, data_config): + + model_cfg, model = setup(args) + + if args.validate: + validate(args, data_config, model_cfg, model) + else: + validate_with_random_data(args, model_cfg, model) + + +@torch.no_grad() +def validate(args, data_config, config, model): + dataset, data_loader = build_val_loader(data_config) + criterion = torch.nn.CrossEntropyLoss() + model.eval() + + batch_time = AverageMeter() + loss_meter = AverageMeter() + acc1_meter = AverageMeter() + acc5_meter = AverageMeter() + + th_path = args.th_path + patch_size = config.patches.size[0] + num_heads = config.transformer.num_heads + layer_num = config.transformer.num_layers + inter_size = config.transformer.mlp_dim + embed_dim = config.hidden_size + max_batch = args.batch_size + img_size = args.img_size + int8_mode = args.int8_mode + in_chans = 3 + model.half() + + vit_weights = ViTINT8WeightLoader(layer_num, args.img_size, patch_size, model.state_dict()) + vit_weights.to_int8(args.th_path) + vit_weights.to_cuda() + + weights = vit_weights.listed_weights() + + torch.classes.load_library(th_path) + try: + vit = torch.classes.VisionTransformerINT8.Class(weights, + max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + num_heads, + inter_size, + layer_num, + int8_mode + ) + except: + # legacy ths for 20.03 image + vit = torch.classes.VisionTransformerINT8Class(weights, + max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + num_heads, + inter_size, + layer_num, + int8_mode + ) + + end = time.time() + for idx, (images, target) in enumerate(data_loader): + images_half = torch.tensor(images, dtype=torch.half) + images_half = images_half.cuda(non_blocking=True) + images = images.cuda(non_blocking=True) + target = target.cuda(non_blocking=True) + + # compute output + op_tmp = vit.forward(images_half) + # op_tmp,_ = model.transformer(images_half) + output = model.head(op_tmp[:, 0]) + + # output_th, _ = model(images_half) + # diff = abs(output - output_th).cpu().numpy() + # print(diff.mean(), diff.max(), diff.min()) + + # measure accuracy and record loss + loss = criterion(output, target) + acc1, acc5 = accuracy(output, target, topk=(1, 5)) + + loss_meter.update(loss.item(), target.size(0)) + acc1_meter.update(acc1.item(), target.size(0)) + acc5_meter.update(acc5.item(), target.size(0)) + + # measure elapsed time + batch_time.update(time.time() - end) + end = time.time() + + if idx % data_config.PRINT_FREQ == 0: + memory_used = torch.cuda.max_memory_allocated() / (1024.0 * 1024.0) + print( + f'Test: [{idx:4}/{len(data_loader)}]\t' + f'Time {batch_time.val:.3f} ({batch_time.avg:.3f})\t' + f'Loss {loss_meter.val:.4f} ({loss_meter.avg:.4f})\t' + f'Acc@1 {acc1_meter.val:.3f} ({acc1_meter.avg:.3f})\t' + f'Acc@5 {acc5_meter.val:.3f} ({acc5_meter.avg:.3f})\t' + f'Mem {memory_used:.0f}MB') + print(f' * Acc@1 {acc1_meter.avg:.3f} Acc@5 {acc5_meter.avg:.3f}') + return acc1_meter.avg, acc5_meter.avg, loss_meter.avg + +@torch.no_grad() +def run_vitnv_op(args, config, model, images): + th_path = args.th_path + patch_size = config.patches.size[0] + num_heads = config.transformer.num_heads + layer_num = config.transformer.num_layers + inter_size = config.transformer.mlp_dim + embed_dim = config.hidden_size + max_batch = args.batch_size + img_size = args.img_size + int8_mode = args.int8_mode + with_cls_token = config.classifier == 'token' + in_chans = 3 + model.half() + torch.classes.load_library(th_path) + vit_weights = ViTINT8WeightLoader(layer_num, args.img_size, patch_size, model.state_dict(), config.classifier) + vit_weights.to_int8(args.th_path) + vit_weights.to_cuda() + + weights = vit_weights.listed_weights() + + ##run pytorch op + try: + vit = torch.classes.VisionTransformerINT8.Class(weights, + max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + num_heads, + inter_size, + layer_num, + int8_mode, + with_cls_token + ) + except: + # legacy ths for 20.03 image + vit = torch.classes.VisionTransformerINT8Class(weights, + max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + num_heads, + inter_size, + layer_num, + int8_mode, + with_cls_token + ) + # warm up + for i in range(warmup_time): + op_tmp = vit.forward(images) + # op_output = model.head(op_tmp[:,0]) + + torch.cuda.synchronize() + op_begin = time.time() + #_nvtx.rangePushA("op") + for i in range(test_time): + op_tmp = vit.forward(images) + op_output = model.head(op_tmp[:,0]) + #_nvtx.rangePop() + torch.cuda.synchronize() + op_end = time.time() + op_output = op_output.cpu().numpy() + print("INT8 op time : ", (op_end - op_begin)/test_time*1000.0, "ms") + + return op_output + + +@torch.no_grad() +def run_torch(model, images, mark): + # warm up + # for i in range(warmup_time): + # output = model(images) + + # torch.cuda.synchronize() + # torch_start = time.time() + #_nvtx.rangePushA("torch") + # for i in range(test_time): + torch_output = model(images) + #_nvtx.rangePop() + # torch.cuda.synchronize() + # torch_end = time.time() + torch_output = torch_output[0].cpu().numpy() + # print(mark + " time : ", (torch_end - torch_start)/test_time*1000.0, "ms") + + return torch_output + +@torch.no_grad() +def validate_with_random_data(args, model_cfg, model): + model.eval() + + max_batch = args.batch_size + img_size = args.img_size + in_chans = 3 + image = np.random.rand(1, in_chans, img_size, img_size) + images = np.repeat(image, max_batch, axis=0) + images_half = torch.tensor(images, dtype=torch.half).cuda(non_blocking=True) + ##run original swin-transformer + + # traced_module_float = torch.jit.trace(model, images_float) + # FP32_torch_traced_output = run_torch(traced_module_float, images_float, "FP32 torch trace") + model.half() + INT8_torch_output = run_torch(model, images_half, "INT8 torch") + print(INT8_torch_output.shape) + + # run pytorch op + INT8_op_output = run_vitnv_op(args, model_cfg, model, images_half) + print(INT8_op_output.shape) + + # diff = abs(FP16_torch_traced_output - FP16_op_output) + diff = abs(INT8_torch_output - INT8_op_output) + print("INT8_torch_output vs INT8_op_output , avg diff : ", diff.mean((1)), "max diff : ", diff.max((1))) + +if __name__ == '__main__': + args, data_config = parse_option() + + seed = args.seed #+ int(time.time()) + torch.manual_seed(seed) + np.random.seed(seed) + cudnn.benchmark = True + + # Setup CUDA, GPU & distributed training + if args.local_rank == -1: + device = torch.device("cuda" if torch.cuda.is_available() else "cpu") + args.n_gpu = torch.cuda.device_count() + else: # Initializes the distributed backend which will take care of sychronizing nodes/GPUs + torch.cuda.set_device(args.local_rank) + device = torch.device("cuda", args.local_rank) + torch.distributed.init_process_group(backend='nccl', + timeout=datetime.timedelta(minutes=60)) + args.n_gpu = 1 + args.device = device + + main(args, data_config) diff --git a/examples/pytorch/vit/infer_visiontransformer_op.py b/examples/pytorch/vit/infer_visiontransformer_op.py new file mode 100644 index 000000000..27117ba28 --- /dev/null +++ b/examples/pytorch/vit/infer_visiontransformer_op.py @@ -0,0 +1,211 @@ +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +import os +import time +import argparse +import datetime +import numpy as np + +import torch +import torch.backends.cudnn as cudnn +import torch.distributed as dist + +import sys +sys.path.insert(0, "./ViT-quantization/ViT-pytorch") + +# from config import get_config +# from models import build_model +from models.modeling import VisionTransformer, CONFIGS +from VisionTransformerWeightLoader import ViTWeightLoader + +#from torch._C import _nvtx + +test_time = 100 +warmup_time = 10 + +def setup(args): + # Prepare model + config = CONFIGS[args.model_type] + print(config) + + model = VisionTransformer(config, args.img_size, zero_head=False, num_classes=1000) + model.load_from(np.load(args.pretrained_dir)) + model.to(args.device) + + return config, model + +def parse_option(): + parser = argparse.ArgumentParser('ViT evaluation script', add_help=False) + + parser.add_argument("--model_type", choices=["ViT-B_16", "ViT-B_32", "ViT-L_16", + "ViT-L_32", "ViT-H_14"], + default="ViT-B_16", + help="Which variant to use.") + parser.add_argument("--img_size", default=384, type=int, + help="Resolution size") + parser.add_argument("--pretrained_dir", type=str, default="checkpoint/ViT-B_16.npz", + help="Where to search for pretrained ViT models.") + + # easy config modification + parser.add_argument('--th-path', type=str, help='path to pytorch library', required=True) + parser.add_argument('--batch-size', type=int, default=32, help="batch size for single GPU") + parser.add_argument('--seed', type=int, default=42, + help="random seed for initialization") + + args, unparsed = parser.parse_known_args() + + + return args + + +def main(args): + + config, model = setup(args) + + validate_with_random_data(args, config, model) + +@torch.no_grad() +def run_vitnv_op(args, config, model, images, use_fp16): + th_path = args.th_path + patch_size = config.patches.size[0] + num_heads = config.transformer.num_heads + layer_num = config.transformer.num_layers + inter_size = config.transformer.mlp_dim + embed_dim = config.hidden_size + max_batch = args.batch_size + img_size = args.img_size + with_cls_token = int(config.classifier == 'token') + in_chans = 3 + torch.classes.load_library(th_path) + vit_weights = ViTWeightLoader(layer_num, args.img_size, patch_size, args.pretrained_dir, config.classifier) + if use_fp16: + vit_weights.to_half() + model.half() + vit_weights.to_cuda() + + ##run pytorch op + try: + vit = torch.classes.VisionTransformer.Class(vit_weights.weights, + max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + num_heads, + inter_size, + layer_num, + with_cls_token + ) + except: + # legacy ths for 20.03 image + vit = torch.classes.VisionTransformerClass(vit_weights.weights, + max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + num_heads, + inter_size, + layer_num, + with_cls_token + ) + # warm up + for i in range(warmup_time): + op_tmp = vit.forward(images) + op_output = model.head(op_tmp[:,0]) + + torch.cuda.synchronize() + op_begin = time.time() + #_nvtx.rangePushA("op") + for i in range(test_time): + op_tmp = vit.forward(images) + op_output = model.head(op_tmp[:,0]) + #_nvtx.rangePop() + torch.cuda.synchronize() + op_end = time.time() + op_output = op_output.cpu().numpy() + if use_fp16: + print("FP16 op time : ", (op_end - op_begin)/test_time*1000.0, "ms") + else: + print("FP32 op time : ", (op_end - op_begin)/test_time*1000.0, "ms") + + return op_output + + +@torch.no_grad() +def run_torch(model, images, mark): + # warm up + for i in range(warmup_time): + output = model(images) + + torch.cuda.synchronize() + torch_start = time.time() + #_nvtx.rangePushA("torch") + for i in range(test_time): + torch_output = model(images) + #_nvtx.rangePop() + torch.cuda.synchronize() + torch_end = time.time() + torch_output = torch_output[0].cpu().numpy() + print(mark + " time : ", (torch_end - torch_start)/test_time*1000.0, "ms") + + return torch_output + +@torch.no_grad() +def validate_with_random_data(args, config, model): + model.eval() + + max_batch = args.batch_size + img_size = args.img_size + in_chans = 3 + image = np.random.rand(1, in_chans, img_size, img_size) + images = np.repeat(image, max_batch, axis=0) + images_half = torch.tensor(images, dtype=torch.half) + images_float = torch.tensor(images, dtype=torch.float) + images_half = images_half.cuda(non_blocking=True) + images_float = images_float.cuda(non_blocking=True) + + # run pytorch op + FP32_op_output = run_vitnv_op(args, config, model, images_float, False) + + # traced_module_float = torch.jit.trace(model, images_float) + # FP32_torch_traced_output = run_torch(traced_module_float, images_float, "FP32 torch trace") + FP32_torch_output = run_torch(model, images_float, "FP32 torch") + + FP16_op_output = run_vitnv_op(args, config, model, images_half, True) + + # traced_module_half = torch.jit.trace(model, images_half) + # FP16_torch_traced_output = run_torch(traced_module_half, images_half, "FP16 torch trace") + FP16_torch_output = run_torch(model, images_half, "FP16 torch") + + # diff = abs(FP32_torch_traced_output - FP32_op_output) + diff = abs(FP32_torch_output - FP32_op_output) + print("FP32_torch_traced_output vs FP32_op_output , avg diff : ", diff.mean(), "max diff : ", diff.max()) + # diff = abs(FP16_torch_traced_output - FP16_op_output) + diff = abs(FP16_torch_output - FP16_op_output) + print("FP16_torch_traced_output vs FP16_op_output , avg diff : ", diff.mean(), "max diff : ", diff.max()) + +if __name__ == '__main__': + args = parse_option() + + seed = args.seed + int(time.time()) + torch.manual_seed(seed) + np.random.seed(seed) + cudnn.benchmark = True + + device = torch.device("cuda" if torch.cuda.is_available() else "cpu") + args.n_gpu = torch.cuda.device_count() + args.device = device + + main(args) diff --git a/examples/pytorch/vit/requirement.txt b/examples/pytorch/vit/requirement.txt new file mode 100644 index 000000000..f25c2e43a --- /dev/null +++ b/examples/pytorch/vit/requirement.txt @@ -0,0 +1,5 @@ +ml_collections +pytorch-quantization +timm==0.4.12 +termcolor==1.1.0 +yacs \ No newline at end of file diff --git a/examples/pytorch/vit/run.sh b/examples/pytorch/vit/run.sh new file mode 100644 index 000000000..d2bfff3f4 --- /dev/null +++ b/examples/pytorch/vit/run.sh @@ -0,0 +1,5 @@ +python infer_visiontransformer_int8_op.py \ + --th-path=../../../build/lib/libpyt_vit.so \ + --calibrated_dir /workspace/checkpoint/ViT-B_16_ft1_99.999_82.846.pth \ + --img_size 384 \ + --quant-mode ft1 diff --git a/examples/pytorch/vit/run2.sh b/examples/pytorch/vit/run2.sh new file mode 100644 index 000000000..746810046 --- /dev/null +++ b/examples/pytorch/vit/run2.sh @@ -0,0 +1,5 @@ +python infer_visiontransformer_int8_op.py \ + --th-path=../../../build/lib/libpyt_vit.so \ + --calibrated_dir /workspace/checkpoint/ViT-B_16_ft2_99.99_81.948.pth \ + --img_size 384 \ + --quant-mode ft2 diff --git a/examples/tensorflow/bert/bert_example.py b/examples/tensorflow/bert/bert_example.py index 885ede3e3..6af81e8fb 100644 --- a/examples/tensorflow/bert/bert_example.py +++ b/examples/tensorflow/bert/bert_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorflow/decoder/decoder_example.py b/examples/tensorflow/decoder/decoder_example.py index 28b235fe5..d5df7e588 100644 --- a/examples/tensorflow/decoder/decoder_example.py +++ b/examples/tensorflow/decoder/decoder_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorflow/decoding/decoding_example.py b/examples/tensorflow/decoding/decoding_example.py index 1aaba8aa4..788a4fe67 100644 --- a/examples/tensorflow/decoding/decoding_example.py +++ b/examples/tensorflow/decoding/decoding_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorflow/decoding/translate_example.py b/examples/tensorflow/decoding/translate_example.py index 3255051f5..5e2f1137e 100644 --- a/examples/tensorflow/decoding/translate_example.py +++ b/examples/tensorflow/decoding/translate_example.py @@ -12,7 +12,7 @@ Currently, the beam search part is not easily customizable. This is expected to be improved for TensorFlow 2.0 which is eager first. -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -92,6 +92,7 @@ def translate(args_dict): sampling_topk = args_dict['sampling_topk'] sampling_topp = args_dict['sampling_topp'] tf_datatype = tf.float32 + max_ite = args_dict['max_iteration'] if args_dict['data_type'] == "fp16": tf_datatype = tf.float16 @@ -341,6 +342,8 @@ def __init__(self, token_op, length_op, name): if translation_result_list[i].name == "tf-decoding-sampling-for-warmup" and translation_result_list[i].batch_num > 20: break + if translation_result_list[i].batch_num >= max_ite: + break except tf.errors.OutOfRangeError: break t2 = datetime.now() @@ -403,8 +406,9 @@ def main(): help='Probability (p) value of top p sampling in decoding. Default is 0.0. ') parser.add_argument('-d', '--data_type', type=str, default="fp32", metavar='STRING', help='data type (default: fp32)', choices=['fp32', 'fp16']) + parser.add_argument('-max_ite', '--max_iteration', type=int, default=100000, metavar='NUMBER', + help='Maximum iteraiton for translation, default is 100000 (as large as possible to run all test set).') args = parser.parse_args() - translate(vars(args)) # example script diff --git a/examples/tensorflow/decoding/utils/bleu_score.py b/examples/tensorflow/decoding/utils/bleu_score.py index e60c50377..a4c95adc8 100644 --- a/examples/tensorflow/decoding/utils/bleu_score.py +++ b/examples/tensorflow/decoding/utils/bleu_score.py @@ -18,7 +18,9 @@ def bleu_score(pred_file, ref_file): with tf.io.gfile.GFile(pred_file) as pred_stream, tf.io.gfile.GFile(ref_file) as ref_stream: - bleu = corpus_bleu(pred_stream, [ref_stream], force=True) + pred_stream_txt = pred_stream.readlines() + ref_stream_txt = ref_stream.readlines() + bleu = corpus_bleu(pred_stream_txt, [ref_stream_txt], force=True) print(" bleu score: {:6.2f}".format(bleu.score)) print(" bleu counts: {}".format(bleu.counts)) print(" bleu totals: {}".format(bleu.totals)) diff --git a/examples/tensorflow/encoder/encoder_example.py b/examples/tensorflow/encoder/encoder_example.py index 20a0cf7bc..b894ac915 100644 --- a/examples/tensorflow/encoder/encoder_example.py +++ b/examples/tensorflow/encoder/encoder_example.py @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorflow/gpt/gpt_example.py b/examples/tensorflow/gpt/gpt_example.py index 114218878..ed3d845b3 100644 --- a/examples/tensorflow/gpt/gpt_example.py +++ b/examples/tensorflow/gpt/gpt_example.py @@ -25,7 +25,7 @@ # TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE # OR OTHER DEALINGS IN THE SOFTWARE. -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -65,7 +65,7 @@ def sample_model( temperature=1, top_k=4, top_p=0.0, - models_dir='../models/openai-gpt-models', + models_dir='../models/openai_gpt_model', data_type='fp32', beam_width=1 ): @@ -157,10 +157,10 @@ def sample_model( ckpt_dict[var.name] = var op_output, sequence_length = ft_gpt_op(ckpt_dict, - decoding_args, - batch_size, - start_ids, - lengths) + decoding_args, + batch_size, + start_ids, + lengths) generated = 0 @@ -226,17 +226,12 @@ def ft_gpt_op(var_dict, decoder_args = decoding_args.decoder_args - extended_input_ids = tf.cast(tf.contrib.seq2seq.tile_batch( - input_ids, multiplier=decoder_args.beam_width), tf.int32) - extended_input_lengths = tf.cast(tf.contrib.seq2seq.tile_batch( - input_lengths, multiplier=decoder_args.beam_width), tf.int32) - gpt_op_module = tf.load_op_library(os.path.join('./lib/libtf_gpt.so')) data_type = decoder_args.dtype output_ids, parent_ids, sequence_length, cum_log_probs = gpt_op_module.gpt( - extended_input_ids, # 0 - extended_input_lengths, # 1 + input_ids, # 0 + input_lengths, # 1 [tf.cast(var_dict["model/h%d/ln_1/b:0" % l], data_type) for l in range(decoder_args.num_layer)], # 2 [tf.cast(var_dict["model/h%d/ln_1/g:0" % l], data_type) for l in range(decoder_args.num_layer)], # 3 [tf.cast(var_dict["model/h%d/attn/c_attn/w:0" % l], data_type) for l in range(decoder_args.num_layer)], # 4 @@ -249,11 +244,11 @@ def ft_gpt_op(var_dict, [tf.cast(var_dict["model/h%d/mlp/c_fc/b:0" % l], data_type)for l in range(decoder_args.num_layer)], # 11 [tf.cast(var_dict["model/h%d/mlp/c_proj/w:0" % l], data_type) for l in range(decoder_args.num_layer)], # 12 [tf.cast(var_dict["model/h%d/mlp/c_proj/b:0" % l], data_type) for l in range(decoder_args.num_layer)], # 13 - tf.cast(var_dict['model/ln_f/b:0'], data_type), # 28 - tf.cast(var_dict['model/ln_f/g:0'], data_type), # 29 - tf.cast(var_dict['model/wpe:0'], data_type), # 33 - tf.cast(var_dict['model/wte:0'], data_type), # 30 - tf.cast(var_dict['model/wte:0'], data_type), # 30 + tf.cast(var_dict['model/ln_f/b:0'], data_type), # 14 + tf.cast(var_dict['model/ln_f/g:0'], data_type), # 15 + tf.cast(var_dict['model/wpe:0'], data_type), # 16 + tf.cast(var_dict['model/wte:0'], data_type), # 17 + tf.cast(var_dict['model/wte:0'], data_type), # 18 max_batch_size=batch_size, max_seq_len=decoding_args.max_seq_len, beam_width=decoder_args.beam_width, @@ -269,13 +264,9 @@ def ft_gpt_op(var_dict, temperature=1.0, len_penalty=1.0, repetition_penalty=1.0, - output_cum_log_probs=True, + output_log_probs=True, request_output_length=decoding_args.max_seq_len - input_lengths.max()) - if decoder_args.beam_width > 1: - output_ids = tf.transpose(output_ids, [1, 2, 0]) - else: - output_ids = tf.transpose(output_ids, [1, 0]) return output_ids, sequence_length if __name__ == '__main__': diff --git a/examples/tensorflow/gpt/utils/gpt_token_converter.py b/examples/tensorflow/gpt/utils/gpt_token_converter.py index 5e5a2787a..ab59c39c3 100644 --- a/examples/tensorflow/gpt/utils/gpt_token_converter.py +++ b/examples/tensorflow/gpt/utils/gpt_token_converter.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorflow/gpt/utils/openai_gpt_ckpt_converter.py b/examples/tensorflow/gpt/utils/openai_gpt_ckpt_converter.py index 78fbfec8f..884b6da94 100644 --- a/examples/tensorflow/gpt/utils/openai_gpt_ckpt_converter.py +++ b/examples/tensorflow/gpt/utils/openai_gpt_ckpt_converter.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/examples/tensorrt/swin/builder_fp16.py b/examples/tensorrt/swin/builder_fp16.py new file mode 100755 index 000000000..cc7a6787f --- /dev/null +++ b/examples/tensorrt/swin/builder_fp16.py @@ -0,0 +1,272 @@ +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +import argparse +import ctypes +import json +import numpy as np +import os +import os.path +import re +import sys +import time +import pycuda.autoinit +import tensorrt as trt +import torch + +import sys +sys.path.insert(0, "../../pytorch/swin/Swin-Transformer-Quantization") +sys.path.insert(0, "../../pytorch/swin") + +from SwinTransformer.config import get_config +from SwinTransformerWeightTransposeQKVWeight import SwinTransformerWeightTransposeQKVWeight + +def parse_option(): + parser = argparse.ArgumentParser('Swin Transformer evaluation script', add_help=False) + parser.add_argument('--cfg', type=str, required=True, metavar="FILE", help='path to config file', ) + parser.add_argument( + "--opts", + help="Modify config options by adding 'KEY VALUE' pairs. ", + default=None, + nargs='+', + ) + + # easy config modification + parser.add_argument('--batch-size', type=int, help="max batch size") + parser.add_argument('--th-path', type=str, help='path to pytorch library') + parser.add_argument('--data-path', type=str, help='path to dataset', default=None) + parser.add_argument('--zip', action='store_true', help='use zipped dataset instead of folder dataset', default=None) + parser.add_argument('--cache-mode', type=str, default='part', choices=['no', 'full', 'part'], + help='no: no cache, ' + 'full: cache all data, ' + 'part: sharding the dataset into nonoverlapping pieces and only cache one piece') + parser.add_argument('--pretrained', + help='pretrained weight from checkpoint, could be imagenet22k pretrained weight') + parser.add_argument('--resume', help='resume from checkpoint') + parser.add_argument('--accumulation-steps', type=int, help="gradient accumulation steps") + parser.add_argument('--use-checkpoint', action='store_true', + help="whether to use gradient checkpointing to save memory") + parser.add_argument('--amp-opt-level', type=str, default='O1', choices=['O0', 'O1', 'O2'], + help='mixed precision opt level, if O0, no amp is used') + parser.add_argument('--output', default='output', type=str, metavar='PATH', + help='root of output folder, the full path is // (default: output)') + parser.add_argument('--tag', help='tag of experiment') + parser.add_argument('--throughput', action='store_true', help='Test throughput only') + + parser.add_argument('--eval', action='store_true', help='Perform evaluation only', default=True) + parser.add_argument("--local_rank", type=int, help='local rank for DistributedDataParallel', default=-1) + + args, unparsed = parser.parse_known_args() + + config = get_config(args) + + return args, config + +#TensorRT Initialization +TRT_LOGGER = trt.Logger(trt.Logger.VERBOSE) +handle = ctypes.CDLL("../../../build/lib/libswinTransformer_plugin.so", mode=ctypes.RTLD_GLOBAL) +if not handle: + raise RuntimeError("Fail to load plugin library") + +trt.init_libnvinfer_plugins(TRT_LOGGER, "") +plg_registry = trt.get_plugin_registry() +swinTransformer_plg_creator = plg_registry.get_plugin_creator("CustomSwinTransformerPlugin", "1", "") + +def set_tensor_name(tensor, prefix, name): + tensor.name = prefix + name + +def set_output_name(layer, prefix, name, out_idx = 0): + set_tensor_name(layer.get_output(out_idx), prefix, name) + +def swin_transformer(network, config, args, input_img, weights_dict): + depths = config.MODEL.SWIN.DEPTHS + num_heads = config.MODEL.SWIN.NUM_HEADS + if config.MODEL.SWIN.QK_SCALE is not None: + qk_scale = config.MODEL.SWIN.QK_SCALE + else: + qk_scale = 1.0 + if config.MODEL.SWIN.APE: + ape = 1 + else: + ape = 0 + if config.MODEL.SWIN.PATCH_NORM: + patch_norm = 1 + else: + patch_norm = 0 + if config.MODEL.SWIN.QKV_BIAS: + qkv_bias = 1 + else: + qkv_bias = 0 + + max_batch_size = trt.PluginField("max_batch_size", np.array([config.DATA.BATCH_SIZE]).astype(np.int32), trt.PluginFieldType.INT32) + img_size = trt.PluginField("img_size", np.array([config.DATA.IMG_SIZE]).astype(np.int32), trt.PluginFieldType.INT32) + patch_size = trt.PluginField("patch_size", np.array([config.MODEL.SWIN.PATCH_SIZE]).astype(np.int32), trt.PluginFieldType.INT32) + in_chans = trt.PluginField("in_chans", np.array([config.MODEL.SWIN.IN_CHANS]).astype(np.int32), trt.PluginFieldType.INT32) + embed_dim = trt.PluginField("embed_dim", np.array([config.MODEL.SWIN.EMBED_DIM]).astype(np.int32), trt.PluginFieldType.INT32) + window_size = trt.PluginField("window_size", np.array([config.MODEL.SWIN.WINDOW_SIZE]).astype(np.int32), trt.PluginFieldType.INT32) + ape = trt.PluginField("ape", np.array([ape]).astype(np.int32), trt.PluginFieldType.INT32) + patch_norm = trt.PluginField("patch_norm", np.array([patch_norm]).astype(np.int32), trt.PluginFieldType.INT32) + layer_num = trt.PluginField("layer_num", np.array([len(depths)]).astype(np.int32), trt.PluginFieldType.INT32) + mlp_ratio = trt.PluginField("mlp_ratio", np.array([config.MODEL.SWIN.MLP_RATIO]).astype(np.float32), trt.PluginFieldType.FLOAT32) + qkv_bias = trt.PluginField("qkv_bias", np.array([qkv_bias]).astype(np.int32), trt.PluginFieldType.INT32) + qk_scale = trt.PluginField("qk_scale", np.array([qk_scale]).astype(np.float32), trt.PluginFieldType.FLOAT32) + depths_f = trt.PluginField("depths", np.array(depths).astype(np.int32), trt.PluginFieldType.INT32) + num_heads_f = trt.PluginField("num_heads", np.array(num_heads).astype(np.int32), trt.PluginFieldType.INT32) + + sw_weights = SwinTransformerWeightTransposeQKVWeight(len(depths), config.MODEL.SWIN.WINDOW_SIZE, depths, num_heads, args.th_path, weights_dict) + + part_fc = [] + weight_idx = 0 + for l in range(len(depths)): + for b in range(depths[l]): + part_fc.append(trt.PluginField("attention_qkv_kernel_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("attention_qkv_bias_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("attention_proj_kernel_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("attention_proj_bias_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("mlp_linear_kernel_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("mlp_linear_bias_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("mlp_linear2_kernel_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("mlp_linear2_bias_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("block_norm_gamma_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("block_norm_beta_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("block_norm2_gamma_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("block_norm2_beta_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("attention_relative_pos_bias_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx].cpu()).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + + part_fc.append(trt.PluginField("patchMerge_norm_gamma_{}".format(l), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("patchMerge_norm_beta_{}".format(l), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("patchMerge_linear_kernel_{}".format(l), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("attn_mask_{}".format(l), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + + part_fc.append(trt.PluginField("patchEmbed_proj_kernel", np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("patchEmbed_proj_bias", np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("patchEmbed_norm_gamma", np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("patchEmbed_norm_beta", np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("norm_gamma", np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("norm_beta", np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + + pfc = trt.PluginFieldCollection([max_batch_size, img_size, patch_size, in_chans, embed_dim, window_size, ape, patch_norm, layer_num, mlp_ratio, qkv_bias, qk_scale, depths_f, num_heads_f] + part_fc) + fn = swinTransformer_plg_creator.create_plugin("swin_transformer", pfc) + inputs = [input_img] + sw = network.add_plugin_v2(inputs, fn) + + set_output_name(sw, "swin_transformer_", "output") + return sw + +def load_weights(inputbase, config): + weights_dict = dict() + try: + tensor_dict = torch.load(inputbase, + map_location='cpu') + tensor_dict = tensor_dict['model'] + # remove training-related variables in the checkpoint + param_names = [key for key in sorted(tensor_dict)] + for pn in param_names: + if isinstance(tensor_dict[pn], np.ndarray): + tensor = tensor_dict[pn] + else: + tensor = tensor_dict[pn].numpy() + + shape = tensor.shape + + ##to be compatible with SwinTransformerWeightTransposeQKVWeight + if "index" in pn: + flat_tensor = tensor.flatten().astype(dtype=np.int64) + weights_dict[pn] = torch.tensor(flat_tensor, dtype=torch.int64).cuda() + elif "table" in pn: + flat_tensor = tensor.flatten().astype(dtype=np.float32) + weights_dict[pn] = torch.tensor(flat_tensor, dtype=torch.float32).cuda() + else: + flat_tensor = tensor.flatten().astype(dtype=np.float32) + weights_dict[pn] = torch.tensor(flat_tensor, dtype=torch.float32) + + shape_str = "{} ".format(len(shape)) + " ".join([str(d) for d in shape]) + #print("TensorRT name: {:}, shape: {:}".format(pn, shape_str)) + + except Exception as error: + TRT_LOGGER.log(TRT_LOGGER.ERROR, str(error)) + + return weights_dict + + +def build_engine(config, args, weights_dict): + explicit_batch_flag = 1 << int(trt.NetworkDefinitionCreationFlag.EXPLICIT_BATCH) + + with trt.Builder(TRT_LOGGER) as builder, builder.create_network(explicit_batch_flag) as network, builder.create_builder_config() as builder_config: + builder_config.max_workspace_size = 8 << 30 + builder_config.set_flag(trt.BuilderFlag.FP16) + builder_config.set_flag(trt.BuilderFlag.STRICT_TYPES) + + # Create the network + input_img = network.add_input(name="input_img", dtype=trt.float16, shape=(-1, config.MODEL.SWIN.IN_CHANS, config.DATA.IMG_SIZE, config.DATA.IMG_SIZE)) + + # Specify profiles + profile = builder.create_optimization_profile() + min_shape = (1, config.MODEL.SWIN.IN_CHANS, config.DATA.IMG_SIZE, config.DATA.IMG_SIZE) + ##TODO: There is a bug in TRT when opt batch is large + max_shape = (config.DATA.BATCH_SIZE, config.MODEL.SWIN.IN_CHANS, config.DATA.IMG_SIZE, config.DATA.IMG_SIZE) + profile.set_shape("input_img", min=min_shape, opt=min_shape, max=max_shape) + builder_config.add_optimization_profile(profile) + + #import pdb;pdb.set_trace() + sw_output = swin_transformer(network, config, args, input_img, weights_dict) + sw_output.precision = trt.float16 + sw_output.set_output_type(0, trt.float16) + + output_size = weights_dict["head.bias"].shape[0] + output = network.add_fully_connected(sw_output.get_output(0), output_size, trt.Weights(weights_dict["head.weight"].numpy().astype(np.float16).flatten()), trt.Weights(weights_dict["head.bias"].numpy().astype(np.float16).flatten())) + network.mark_output(output.get_output(0)) + + engine = builder.build_engine(network, builder_config) + return engine + + +def main(): + + args, config = parse_option() + + weights_dict = load_weights(config.MODEL.RESUME, config) + + with build_engine(config, args, weights_dict) as engine: + TRT_LOGGER.log(TRT_LOGGER.VERBOSE, "Serializing Engine...") + serialized_engine = engine.serialize() + TRT_LOGGER.log(TRT_LOGGER.INFO, "Saving Engine to {:}".format(args.output)) + with open(args.output, "wb") as fout: + fout.write(serialized_engine) + TRT_LOGGER.log(TRT_LOGGER.INFO, "Done.") + +if __name__ == "__main__": + main() diff --git a/examples/tensorrt/swin/builder_fp32.py b/examples/tensorrt/swin/builder_fp32.py new file mode 100755 index 000000000..f25edc58d --- /dev/null +++ b/examples/tensorrt/swin/builder_fp32.py @@ -0,0 +1,270 @@ +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +import argparse +import ctypes +import json +import numpy as np +import os +import os.path +import re +import sys +import time +import pycuda.autoinit +import tensorrt as trt +import torch + +import sys +sys.path.insert(0, "../../pytorch/swin/Swin-Transformer-Quantization") +sys.path.insert(0, "../../pytorch/swin") + +from SwinTransformer.config import get_config +from SwinTransformerWeightTransposeQKVWeight import SwinTransformerWeightTransposeQKVWeight + +def parse_option(): + parser = argparse.ArgumentParser('Swin Transformer training and evaluation script', add_help=False) + parser.add_argument('--cfg', type=str, required=True, metavar="FILE", help='path to config file', ) + parser.add_argument( + "--opts", + help="Modify config options by adding 'KEY VALUE' pairs. ", + default=None, + nargs='+', + ) + + # easy config modification + parser.add_argument('--batch-size', type=int, help="max batch size") + parser.add_argument('--th-path', type=str, help='path to pytorch library') + parser.add_argument('--data-path', type=str, help='path to dataset', default=None) + parser.add_argument('--zip', action='store_true', help='use zipped dataset instead of folder dataset', default=None) + parser.add_argument('--cache-mode', type=str, default='part', choices=['no', 'full', 'part'], + help='no: no cache, ' + 'full: cache all data, ' + 'part: sharding the dataset into nonoverlapping pieces and only cache one piece') + parser.add_argument('--pretrained', + help='pretrained weight from checkpoint, could be imagenet22k pretrained weight') + parser.add_argument('--resume', help='resume from checkpoint') + parser.add_argument('--accumulation-steps', type=int, help="gradient accumulation steps") + parser.add_argument('--use-checkpoint', action='store_true', + help="whether to use gradient checkpointing to save memory") + parser.add_argument('--amp-opt-level', type=str, default='O1', choices=['O0', 'O1', 'O2'], + help='mixed precision opt level, if O0, no amp is used') + parser.add_argument('--output', default='output', type=str, metavar='PATH', + help='root of output folder, the full path is // (default: output)') + parser.add_argument('--tag', help='tag of experiment') + parser.add_argument('--throughput', action='store_true', help='Test throughput only') + + parser.add_argument('--eval', action='store_true', help='Perform evaluation only', default=True) + parser.add_argument("--local_rank", type=int, help='local rank for DistributedDataParallel', default=-1) + + args, unparsed = parser.parse_known_args() + + config = get_config(args) + + return args, config + +#TensorRT Initialization +TRT_LOGGER = trt.Logger(trt.Logger.VERBOSE) +handle = ctypes.CDLL("../../../build/lib/libswinTransformer_plugin.so", mode=ctypes.RTLD_GLOBAL) +if not handle: + raise RuntimeError("Fail to load plugin library") + +trt.init_libnvinfer_plugins(TRT_LOGGER, "") +plg_registry = trt.get_plugin_registry() +swinTransformer_plg_creator = plg_registry.get_plugin_creator("CustomSwinTransformerPlugin", "1", "") + +def set_tensor_name(tensor, prefix, name): + tensor.name = prefix + name + +def set_output_name(layer, prefix, name, out_idx = 0): + set_tensor_name(layer.get_output(out_idx), prefix, name) + +def swin_transformer(network, config, args, input_img, weights_dict): + depths = config.MODEL.SWIN.DEPTHS + num_heads = config.MODEL.SWIN.NUM_HEADS + if config.MODEL.SWIN.QK_SCALE is not None: + qk_scale = config.MODEL.SWIN.QK_SCALE + else: + qk_scale = 1.0 + if config.MODEL.SWIN.APE: + ape = 1 + else: + ape = 0 + if config.MODEL.SWIN.PATCH_NORM: + patch_norm = 1 + else: + patch_norm = 0 + if config.MODEL.SWIN.QKV_BIAS: + qkv_bias = 1 + else: + qkv_bias = 0 + + max_batch_size = trt.PluginField("max_batch_size", np.array([config.DATA.BATCH_SIZE]).astype(np.int32), trt.PluginFieldType.INT32) + img_size = trt.PluginField("img_size", np.array([config.DATA.IMG_SIZE]).astype(np.int32), trt.PluginFieldType.INT32) + patch_size = trt.PluginField("patch_size", np.array([config.MODEL.SWIN.PATCH_SIZE]).astype(np.int32), trt.PluginFieldType.INT32) + in_chans = trt.PluginField("in_chans", np.array([config.MODEL.SWIN.IN_CHANS]).astype(np.int32), trt.PluginFieldType.INT32) + embed_dim = trt.PluginField("embed_dim", np.array([config.MODEL.SWIN.EMBED_DIM]).astype(np.int32), trt.PluginFieldType.INT32) + window_size = trt.PluginField("window_size", np.array([config.MODEL.SWIN.WINDOW_SIZE]).astype(np.int32), trt.PluginFieldType.INT32) + ape = trt.PluginField("ape", np.array([ape]).astype(np.int32), trt.PluginFieldType.INT32) + patch_norm = trt.PluginField("patch_norm", np.array([patch_norm]).astype(np.int32), trt.PluginFieldType.INT32) + layer_num = trt.PluginField("layer_num", np.array([len(depths)]).astype(np.int32), trt.PluginFieldType.INT32) + mlp_ratio = trt.PluginField("mlp_ratio", np.array([config.MODEL.SWIN.MLP_RATIO]).astype(np.float32), trt.PluginFieldType.FLOAT32) + qkv_bias = trt.PluginField("qkv_bias", np.array([qkv_bias]).astype(np.int32), trt.PluginFieldType.INT32) + qk_scale = trt.PluginField("qk_scale", np.array([qk_scale]).astype(np.float32), trt.PluginFieldType.FLOAT32) + depths_f = trt.PluginField("depths", np.array(depths).astype(np.int32), trt.PluginFieldType.INT32) + num_heads_f = trt.PluginField("num_heads", np.array(num_heads).astype(np.int32), trt.PluginFieldType.INT32) + + sw_weights = SwinTransformerWeightTransposeQKVWeight(len(depths), config.MODEL.SWIN.WINDOW_SIZE, depths, num_heads, args.th_path, weights_dict) + + part_fc = [] + weight_idx = 0 + for l in range(len(depths)): + for b in range(depths[l]): + part_fc.append(trt.PluginField("attention_qkv_kernel_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("attention_qkv_bias_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("attention_proj_kernel_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("attention_proj_bias_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("mlp_linear_kernel_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("mlp_linear_bias_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("mlp_linear2_kernel_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("mlp_linear2_bias_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("block_norm_gamma_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("block_norm_beta_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("block_norm2_gamma_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("block_norm2_beta_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("attention_relative_pos_bias_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx].cpu()).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + + part_fc.append(trt.PluginField("patchMerge_norm_gamma_{}".format(l), np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("patchMerge_norm_beta_{}".format(l), np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("patchMerge_linear_kernel_{}".format(l), np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("attn_mask_{}".format(l), np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + + part_fc.append(trt.PluginField("patchEmbed_proj_kernel", np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("patchEmbed_proj_bias", np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("patchEmbed_norm_gamma", np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("patchEmbed_norm_beta", np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("norm_gamma", np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("norm_beta", np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + + pfc = trt.PluginFieldCollection([max_batch_size, img_size, patch_size, in_chans, embed_dim, window_size, ape, patch_norm, layer_num, mlp_ratio, qkv_bias, qk_scale, depths_f, num_heads_f] + part_fc) + fn = swinTransformer_plg_creator.create_plugin("swin_transformer", pfc) + inputs = [input_img] + sw = network.add_plugin_v2(inputs, fn) + + set_output_name(sw, "swin_transformer_", "output") + return sw + +def load_weights(inputbase, config): + weights_dict = dict() + try: + tensor_dict = torch.load(inputbase, + map_location='cpu') + tensor_dict = tensor_dict['model'] + # remove training-related variables in the checkpoint + param_names = [key for key in sorted(tensor_dict)] + for pn in param_names: + if isinstance(tensor_dict[pn], np.ndarray): + tensor = tensor_dict[pn] + else: + tensor = tensor_dict[pn].numpy() + + shape = tensor.shape + + ##to be compatible with SwinTransformerWeightTransposeQKVWeight + if "index" in pn: + flat_tensor = tensor.flatten().astype(dtype=np.int64) + weights_dict[pn] = torch.tensor(flat_tensor, dtype=torch.int64).cuda() + elif "table" in pn: + flat_tensor = tensor.flatten().astype(dtype=np.float32) + weights_dict[pn] = torch.tensor(flat_tensor, dtype=torch.float32).cuda() + else: + flat_tensor = tensor.flatten().astype(dtype=np.float32) + weights_dict[pn] = torch.tensor(flat_tensor, dtype=torch.float32) + + shape_str = "{} ".format(len(shape)) + " ".join([str(d) for d in shape]) + #print("TensorRT name: {:}, shape: {:}".format(pn, shape_str)) + + except Exception as error: + TRT_LOGGER.log(TRT_LOGGER.ERROR, str(error)) + + return weights_dict + + +def build_engine(config, args, weights_dict): + explicit_batch_flag = 1 << int(trt.NetworkDefinitionCreationFlag.EXPLICIT_BATCH) + + with trt.Builder(TRT_LOGGER) as builder, builder.create_network(explicit_batch_flag) as network, builder.create_builder_config() as builder_config: + builder_config.max_workspace_size = 8 << 30 + #builder_config.set_flag(trt.BuilderFlag.FP16) + #builder_config.set_flag(trt.BuilderFlag.STRICT_TYPES) + + # Create the network + input_img = network.add_input(name="input_img", dtype=trt.float32, shape=(-1, config.MODEL.SWIN.IN_CHANS, config.DATA.IMG_SIZE, config.DATA.IMG_SIZE)) + + # Specify profiles + profile = builder.create_optimization_profile() + min_shape = (1, config.MODEL.SWIN.IN_CHANS, config.DATA.IMG_SIZE, config.DATA.IMG_SIZE) + ##TODO: There is a bug in TRT when opt batch is large + max_shape = (config.DATA.BATCH_SIZE, config.MODEL.SWIN.IN_CHANS, config.DATA.IMG_SIZE, config.DATA.IMG_SIZE) + profile.set_shape("input_img", min=min_shape, opt=min_shape, max=max_shape) + builder_config.add_optimization_profile(profile) + + #import pdb;pdb.set_trace() + sw_output = swin_transformer(network, config, args, input_img, weights_dict) + + output_size = weights_dict["head.bias"].shape[0] + output = network.add_fully_connected(sw_output.get_output(0), output_size, trt.Weights(weights_dict["head.weight"].numpy().astype(np.float32).flatten()), trt.Weights(weights_dict["head.bias"].numpy().astype(np.float32).flatten())) + network.mark_output(output.get_output(0)) + + engine = builder.build_engine(network, builder_config) + return engine + + +def main(): + + args, config = parse_option() + + weights_dict = load_weights(config.MODEL.RESUME, config) + + with build_engine(config, args, weights_dict) as engine: + TRT_LOGGER.log(TRT_LOGGER.VERBOSE, "Serializing Engine...") + serialized_engine = engine.serialize() + TRT_LOGGER.log(TRT_LOGGER.INFO, "Saving Engine to {:}".format(args.output)) + with open(args.output, "wb") as fout: + fout.write(serialized_engine) + TRT_LOGGER.log(TRT_LOGGER.INFO, "Done.") + +if __name__ == "__main__": + main() diff --git a/examples/tensorrt/swin/builder_int8.py b/examples/tensorrt/swin/builder_int8.py new file mode 100644 index 000000000..5c6acb5a6 --- /dev/null +++ b/examples/tensorrt/swin/builder_int8.py @@ -0,0 +1,284 @@ +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +import argparse +import ctypes +import json +import numpy as np +import os +import os.path +import re +import sys +import time +import pycuda.autoinit +import tensorrt as trt +import torch + +import sys +sys.path.insert(0, "../../pytorch/swin/Swin-Transformer-Quantization") +sys.path.insert(0, "../../pytorch/swin") + +from SwinTransformer.config import get_config +from SwinTransformerINT8Weight import SwinTransformerINT8Weight + +def parse_option(): + parser = argparse.ArgumentParser('Swin Transformer training and evaluation script', add_help=False) + parser.add_argument('--cfg', type=str, required=True, metavar="FILE", help='path to config file', ) + parser.add_argument( + "--opts", + help="Modify config options by adding 'KEY VALUE' pairs. ", + default=None, + nargs='+', + ) + + # easy config modification + parser.add_argument('--batch-size', type=int, help="max batch size") + parser.add_argument('--th-path', type=str, help='path to pytorch library') + parser.add_argument('--data-path', type=str, help='path to dataset', default=None) + parser.add_argument('--zip', action='store_true', help='use zipped dataset instead of folder dataset', default=None) + parser.add_argument('--cache-mode', type=str, default='part', choices=['no', 'full', 'part'], + help='no: no cache, ' + 'full: cache all data, ' + 'part: sharding the dataset into nonoverlapping pieces and only cache one piece') + parser.add_argument('--pretrained', + help='pretrained weight from checkpoint, could be imagenet22k pretrained weight') + parser.add_argument('--resume', help='resume from checkpoint') + parser.add_argument('--accumulation-steps', type=int, help="gradient accumulation steps") + parser.add_argument('--use-checkpoint', action='store_true', + help="whether to use gradient checkpointing to save memory") + parser.add_argument('--amp-opt-level', type=str, default='O1', choices=['O0', 'O1', 'O2'], + help='mixed precision opt level, if O0, no amp is used') + parser.add_argument('--output', default='output', type=str, metavar='PATH', + help='root of output folder, the full path is // (default: output)') + parser.add_argument('--tag', help='tag of experiment') + parser.add_argument('--throughput', action='store_true', help='Test throughput only') + + parser.add_argument('--eval', action='store_true', help='Perform evaluation only', default=True) + parser.add_argument('--int8-mode', type=int, help='int8 mode', default=1, choices=[1, 2]) + parser.add_argument("--local_rank", type=int, help='local rank for DistributedDataParallel', default=-1) + + args, unparsed = parser.parse_known_args() + + config = get_config(args) + + return args, config + +#TensorRT Initialization +TRT_LOGGER = trt.Logger(trt.Logger.VERBOSE) +handle = ctypes.CDLL("../../../build/lib/libswinTransformer_plugin.so", mode=ctypes.RTLD_GLOBAL) +if not handle: + raise RuntimeError("Fail to load plugin library") + +trt.init_libnvinfer_plugins(TRT_LOGGER, "") +plg_registry = trt.get_plugin_registry() +swinTransformer_plg_creator = plg_registry.get_plugin_creator("CustomSwinTransformerINT8Plugin", "1", "") + +def set_tensor_name(tensor, prefix, name): + tensor.name = prefix + name + +def set_output_name(layer, prefix, name, out_idx = 0): + set_tensor_name(layer.get_output(out_idx), prefix, name) + +def swin_transformer(network, config, args, input_img, weights_dict): + depths = config.MODEL.SWIN.DEPTHS + num_heads = config.MODEL.SWIN.NUM_HEADS + if config.MODEL.SWIN.QK_SCALE is not None: + qk_scale = config.MODEL.SWIN.QK_SCALE + else: + qk_scale = 1.0 + if config.MODEL.SWIN.APE: + ape = 1 + else: + ape = 0 + if config.MODEL.SWIN.PATCH_NORM: + patch_norm = 1 + else: + patch_norm = 0 + if config.MODEL.SWIN.QKV_BIAS: + qkv_bias = 1 + else: + qkv_bias = 0 + + int8_mode = trt.PluginField("int8_mode", np.array([args.int8_mode]).astype(np.int32), trt.PluginFieldType.INT32) + max_batch_size = trt.PluginField("max_batch_size", np.array([config.DATA.BATCH_SIZE]).astype(np.int32), trt.PluginFieldType.INT32) + img_size = trt.PluginField("img_size", np.array([config.DATA.IMG_SIZE]).astype(np.int32), trt.PluginFieldType.INT32) + patch_size = trt.PluginField("patch_size", np.array([config.MODEL.SWIN.PATCH_SIZE]).astype(np.int32), trt.PluginFieldType.INT32) + in_chans = trt.PluginField("in_chans", np.array([config.MODEL.SWIN.IN_CHANS]).astype(np.int32), trt.PluginFieldType.INT32) + embed_dim = trt.PluginField("embed_dim", np.array([config.MODEL.SWIN.EMBED_DIM]).astype(np.int32), trt.PluginFieldType.INT32) + window_size = trt.PluginField("window_size", np.array([config.MODEL.SWIN.WINDOW_SIZE]).astype(np.int32), trt.PluginFieldType.INT32) + ape = trt.PluginField("ape", np.array([ape]).astype(np.int32), trt.PluginFieldType.INT32) + patch_norm = trt.PluginField("patch_norm", np.array([patch_norm]).astype(np.int32), trt.PluginFieldType.INT32) + layer_num = trt.PluginField("layer_num", np.array([len(depths)]).astype(np.int32), trt.PluginFieldType.INT32) + mlp_ratio = trt.PluginField("mlp_ratio", np.array([config.MODEL.SWIN.MLP_RATIO]).astype(np.float32), trt.PluginFieldType.FLOAT32) + qkv_bias = trt.PluginField("qkv_bias", np.array([qkv_bias]).astype(np.int32), trt.PluginFieldType.INT32) + qk_scale = trt.PluginField("qk_scale", np.array([qk_scale]).astype(np.float32), trt.PluginFieldType.FLOAT32) + depths_f = trt.PluginField("depths", np.array(depths).astype(np.int32), trt.PluginFieldType.INT32) + num_heads_f = trt.PluginField("num_heads", np.array(num_heads).astype(np.int32), trt.PluginFieldType.INT32) + + sw_weights = SwinTransformerINT8Weight(len(depths), config.MODEL.SWIN.WINDOW_SIZE, depths, num_heads, args.th_path, weights_dict) + + for i in range(len(sw_weights.weights)): + sw_weights.weights[i] = sw_weights.weights[i].cpu() + + part_fc = [] + weight_idx = 0 + for l in range(len(depths)): + for b in range(depths[l]): + part_fc.append(trt.PluginField("attention_qkv_kernel_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("attention_qkv_bias_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("attention_proj_kernel_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("attention_proj_bias_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("mlp_linear_kernel_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("mlp_linear_bias_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("mlp_linear2_kernel_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("mlp_linear2_bias_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("block_norm_gamma_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("block_norm_beta_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("block_norm2_gamma_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("block_norm2_beta_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("block_d_amaxlist_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("block_h_amaxlist_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx]).astype(np.float32), trt.PluginFieldType.FLOAT32)) + weight_idx += 1 + part_fc.append(trt.PluginField("attention_relative_pos_bias_{}_{}".format(l, b), np.array(sw_weights.weights[weight_idx].cpu()).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + + part_fc.append(trt.PluginField("patchMerge_norm_gamma_{}".format(l), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("patchMerge_norm_beta_{}".format(l), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("patchMerge_linear_kernel_{}".format(l), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("attn_mask_{}".format(l), np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + + part_fc.append(trt.PluginField("patchEmbed_proj_kernel", np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("patchEmbed_proj_bias", np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("patchEmbed_norm_gamma", np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("patchEmbed_norm_beta", np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("norm_gamma", np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + weight_idx += 1 + part_fc.append(trt.PluginField("norm_beta", np.array(sw_weights.weights[weight_idx]).astype(np.float16), trt.PluginFieldType.FLOAT16)) + + + pfc = trt.PluginFieldCollection([int8_mode, max_batch_size, img_size, patch_size, in_chans, embed_dim, window_size, ape, patch_norm, layer_num, mlp_ratio, qkv_bias, qk_scale, depths_f, num_heads_f] + part_fc) + fn = swinTransformer_plg_creator.create_plugin("swin_transformer", pfc) + inputs = [input_img] + sw = network.add_plugin_v2(inputs, fn) + + set_output_name(sw, "swin_transformer_", "output") + return sw + +def load_weights(inputbase, config): + weights_dict = dict() + try: + tensor_dict = torch.load(inputbase, + map_location='cpu') + # tensor_dict = tensor_dict['model'] + # remove training-related variables in the checkpoint + param_names = [key for key in sorted(tensor_dict)] + + for pn in param_names: + if isinstance(tensor_dict[pn], np.ndarray): + tensor = tensor_dict[pn] + else: + tensor = tensor_dict[pn].numpy() + + shape = tensor.shape + + ##to be compatible with SwinTransformerWeight + if "index" in pn: + flat_tensor = tensor.astype(dtype=np.int64) + weights_dict[pn] = torch.tensor(flat_tensor, dtype=torch.int64).cuda() + elif "table" in pn: + flat_tensor = tensor.astype(dtype=np.float32) + weights_dict[pn] = torch.tensor(flat_tensor, dtype=torch.float32).cuda() + else: + flat_tensor = tensor.astype(dtype=np.float32) + weights_dict[pn] = torch.tensor(flat_tensor, dtype=torch.float32).cuda() + + shape_str = "{} ".format(len(shape)) + " ".join([str(d) for d in shape]) + #print("TensorRT name: {:}, shape: {:}".format("module."+pn, shape_str)) + + except Exception as error: + TRT_LOGGER.log(TRT_LOGGER.ERROR, str(error)) + + return weights_dict + + +def build_engine(config, args, weights_dict): + explicit_batch_flag = 1 << int(trt.NetworkDefinitionCreationFlag.EXPLICIT_BATCH) + + with trt.Builder(TRT_LOGGER) as builder, builder.create_network(explicit_batch_flag) as network, builder.create_builder_config() as builder_config: + builder_config.max_workspace_size = 8 << 30 + builder_config.set_flag(trt.BuilderFlag.FP16) + builder_config.set_flag(trt.BuilderFlag.STRICT_TYPES) + + # Create the network + input_img = network.add_input(name="input_img", dtype=trt.float16, shape=(-1, config.MODEL.SWIN.IN_CHANS, config.DATA.IMG_SIZE, config.DATA.IMG_SIZE)) + + # Specify profiles + ##TODO: There is a bug in TRT when opt batch is large + profile = builder.create_optimization_profile() + min_shape = (1, config.MODEL.SWIN.IN_CHANS, config.DATA.IMG_SIZE, config.DATA.IMG_SIZE) + max_shape = (config.DATA.BATCH_SIZE, config.MODEL.SWIN.IN_CHANS, config.DATA.IMG_SIZE, config.DATA.IMG_SIZE) + profile.set_shape("input_img", min=min_shape, opt=min_shape, max=max_shape) + builder_config.add_optimization_profile(profile) + + #import pdb;pdb.set_trace() + sw_output = swin_transformer(network, config, args, input_img, weights_dict) + sw_output.precision = trt.float16 + sw_output.set_output_type(0, trt.float16) + + output_size = weights_dict["head.bias"].shape[0] + output = network.add_fully_connected(sw_output.get_output(0), output_size, trt.Weights(weights_dict["head.weight"].cpu().numpy().astype(np.float16).flatten()), trt.Weights(weights_dict["head.bias"].cpu().numpy().astype(np.float16).flatten())) + network.mark_output(output.get_output(0)) + print("Before build_engine") + engine = builder.build_engine(network, builder_config) + print("After build_engine") + return engine + + +def main(): + + args, config = parse_option() + + weights_dict = load_weights(config.MODEL.RESUME, config) + + with build_engine(config, args, weights_dict) as engine: + TRT_LOGGER.log(TRT_LOGGER.VERBOSE, "Serializing Engine...") + serialized_engine = engine.serialize() + TRT_LOGGER.log(TRT_LOGGER.INFO, "Saving Engine to {:}".format(args.output)) + with open(args.output, "wb") as fout: + fout.write(serialized_engine) + TRT_LOGGER.log(TRT_LOGGER.INFO, "Done.") + +if __name__ == "__main__": + main() + diff --git a/examples/tensorrt/swin/infer_swintransformer_plugin.py b/examples/tensorrt/swin/infer_swintransformer_plugin.py new file mode 100644 index 000000000..7cb0ddd12 --- /dev/null +++ b/examples/tensorrt/swin/infer_swintransformer_plugin.py @@ -0,0 +1,201 @@ +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import os +import time +import argparse +import datetime +import numpy as np + +import torch +import torch.backends.cudnn as cudnn + +import ctypes +import tensorrt as trt +import pycuda.driver as cuda +import pycuda.autoinit + +import sys +sys.path.insert(0, "../../pytorch/swin/Swin-Transformer-Quantization") +from SwinTransformer.config import get_config + +from SwinTransformer.models import build_model + +test_time = 100 +warmup_time = 10 + +def parse_option(): + parser = argparse.ArgumentParser('Swin Transformer evaluation script', add_help=False) + parser.add_argument('--cfg', type=str, required=True, metavar="FILE", help='path to config file', ) + parser.add_argument( + "--opts", + help="Modify config options by adding 'KEY VALUE' pairs. ", + default=None, + nargs='+', + ) + + # easy config modification + parser.add_argument('--engine', type=str, help='path to TRT engine') + parser.add_argument('--th-path', type=str, help='path to pytorch library') + parser.add_argument('--batch-size', type=int, default=32, help="batch size for single GPU") + parser.add_argument('--data-path', type=str, help='path to dataset') + parser.add_argument('--zip', action='store_true', help='use zipped dataset instead of folder dataset') + parser.add_argument('--cache-mode', type=str, default='part', choices=['no', 'full', 'part'], + help='no: no cache, ' + 'full: cache all data, ' + 'part: sharding the dataset into nonoverlapping pieces and only cache one piece') + parser.add_argument('--pretrained', + help='pretrained weight from checkpoint, could be imagenet22k pretrained weight') + parser.add_argument('--resume', help='resume from checkpoint') + parser.add_argument('--accumulation-steps', type=int, help="gradient accumulation steps") + parser.add_argument('--use-checkpoint', action='store_true', + help="whether to use gradient checkpointing to save memory") + parser.add_argument('--amp-opt-level', type=str, default='O1', choices=['O0', 'O1', 'O2'], + help='mixed precision opt level, if O0, no amp is used') + parser.add_argument('--output', default='output', type=str, metavar='PATH', + help='root of output folder, the full path is // (default: output)') + parser.add_argument('--tag', help='tag of experiment') + parser.add_argument('--eval', action='store_true', help='Perform evaluation only') + parser.add_argument('--throughput', action='store_true', help='Test throughput only') + # distributed training + parser.add_argument("--local_rank", type=int, default=0, help='local rank for DistributedDataParallel') + parser.add_argument("--use-fp16", action='store_true', + help='Use FP16 if set true, otherwise FP32') + args, unparsed = parser.parse_known_args() + + config = get_config(args) + + return args, config + + +def main(config, args): + model = build_model(config) + model.cuda() + + checkpoint = torch.load(config.MODEL.RESUME, map_location='cpu') + model.load_state_dict(checkpoint['model'] if 'model' in checkpoint.keys() else checkpoint, strict=False) + validate_with_random_data(config, args, model) + +@torch.no_grad() +def run_swintransformer_plugin(args, config, model, image): + TRT_LOGGER = trt.Logger(trt.Logger.INFO) + # Import necessary plugins for BERT TensorRT + ctypes.CDLL("../../../build/lib/libswinTransformer_plugin.so", mode=ctypes.RTLD_GLOBAL) + + depths = config.MODEL.SWIN.DEPTHS + layer_num = len(depths) + max_batch = config.DATA.BATCH_SIZE + img_size = config.DATA.IMG_SIZE + in_chans = config.MODEL.SWIN.IN_CHANS + embed_dim = config.MODEL.SWIN.EMBED_DIM + + output_size = model.head.bias.shape[0] + print("output_size ", output_size) + + with open(args.engine, 'rb') as f, trt.Runtime(TRT_LOGGER) as runtime, \ + runtime.deserialize_cuda_engine(f.read()) as engine, \ + engine.create_execution_context() as context: + + context.active_optimization_profile = 0 + + if args.use_fp16: + input_nbytes0 = max_batch * in_chans * img_size * img_size * trt.float16.itemsize + else: + input_nbytes0 = max_batch * in_chans * img_size * img_size * trt.float32.itemsize + stream = cuda.Stream() + + d_inputs = [cuda.mem_alloc(input_nbytes0)] + output_shape = (max_batch * output_size) + h_output = cuda.pagelocked_empty(output_shape, dtype=np.float32) + d_output = cuda.mem_alloc(h_output.nbytes) + + #import pdb;pdb.set_trace() + context.set_binding_shape(0, (max_batch, in_chans, img_size, img_size)) + + if args.use_fp16: + image = image.astype(np.float16) + else: + image = image.astype(np.float32) + + h_input_embeds = cuda.register_host_memory(np.ascontiguousarray(image.ravel())) + cuda.memcpy_htod_async(d_inputs[0], h_input_embeds, stream) + + # warm up + for i in range(warmup_time): + context.execute_async_v2(bindings=[int(d_inp) for d_inp in d_inputs] + [int(d_output)], stream_handle=stream.handle) + + #ignore the last fc layer + op_end = time.time() + for i in range(test_time): + context.execute_async_v2(bindings=[int(d_inp) for d_inp in d_inputs] + [int(d_output)], stream_handle=stream.handle) + stream.synchronize() + + print("plugin time : ", (time.time() - op_end)/test_time*1000.0, "ms") + + cuda.memcpy_dtoh_async(h_output, d_output, stream) + stream.synchronize() + + return h_output + +@torch.no_grad() +def run_torch(model, images, mark): + # warm up + for i in range(warmup_time): + output = model(images) + + torch.cuda.synchronize() + torch_start = time.time() + #_nvtx.rangePushA("torch") + for i in range(test_time): + torch_output = model(images) + #_nvtx.rangePop() + torch.cuda.synchronize() + torch_end = time.time() + torch_output = torch_output.cpu().numpy() + print(mark + " time : ", (torch_end - torch_start)/test_time*1000.0, "ms") + return torch_output + +@torch.no_grad() +def validate_with_random_data(config, args, model): + model.eval() + max_batch = config.DATA.BATCH_SIZE + img_size = config.DATA.IMG_SIZE + in_chans = config.MODEL.SWIN.IN_CHANS + images = np.random.rand(max_batch, in_chans, img_size, img_size) + + ## run pytorch plugin + plugin_output = run_swintransformer_plugin(args, config, model, images) + + if args.use_fp16: + images = torch.tensor(images, dtype=torch.half) + model.half() + else: + images = torch.tensor(images, dtype=torch.float) + images = images.cuda(non_blocking=True) + traced_module = torch.jit.trace(model, images) + torch_traced_output = run_torch(traced_module, images, "torch trace") + torch_output = run_torch(model, images, "torch") + + diff = abs(torch_output - plugin_output.reshape(max_batch, -1)) + print("torch_output vs plugin_output , avg diff : ", diff.mean((1)), "max diff : ", diff.max((1))) + +if __name__ == '__main__': + args, config = parse_option() + + seed = config.SEED + int(time.time()) + torch.manual_seed(seed) + np.random.seed(seed) + cudnn.benchmark = True + + main(config, args) diff --git a/examples/tensorrt/swin/infer_swintransformer_plugin_int8.py b/examples/tensorrt/swin/infer_swintransformer_plugin_int8.py new file mode 100644 index 000000000..40afd5cc4 --- /dev/null +++ b/examples/tensorrt/swin/infer_swintransformer_plugin_int8.py @@ -0,0 +1,205 @@ +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import os +import time +import argparse +import datetime +import numpy as np + +import torch +import torch.backends.cudnn as cudnn + +import ctypes +import tensorrt as trt +import pycuda.driver as cuda +import pycuda.autoinit + +import sys +#sys.path.insert(0, "../third_party/Swin-Transformer") +sys.path.insert(0, "../../pytorch/swin/Swin-Transformer-Quantization") +sys.path.insert(0, "../../pytorch/swin") + +from SwinTransformer.config import get_config +from models import build_model +import quant_utils + +test_time = 100 +warmup_time = 10 + +def parse_option(): + parser = argparse.ArgumentParser('Swin Transformer training and evaluation script', add_help=False) + parser.add_argument('--cfg', type=str, required=True, metavar="FILE", help='path to config file', ) + parser.add_argument( + "--opts", + help="Modify config options by adding 'KEY VALUE' pairs. ", + default=None, + nargs='+', + ) + + # easy config modification + parser.add_argument('--engine', type=str, help='path to TRT engine') + parser.add_argument('--th-path', type=str, help='path to pytorch library') + parser.add_argument('--batch-size', type=int, default=32, help="batch size for single GPU") + parser.add_argument('--data-path', type=str, help='path to dataset') + parser.add_argument('--zip', action='store_true', help='use zipped dataset instead of folder dataset') + parser.add_argument('--cache-mode', type=str, default='part', choices=['no', 'full', 'part'], + help='no: no cache, ' + 'full: cache all data, ' + 'part: sharding the dataset into nonoverlapping pieces and only cache one piece') + parser.add_argument('--pretrained', + help='pretrained weight from checkpoint, could be imagenet22k pretrained weight') + parser.add_argument('--resume', help='resume from checkpoint') + parser.add_argument('--accumulation-steps', type=int, help="gradient accumulation steps") + parser.add_argument('--use-checkpoint', action='store_true', + help="whether to use gradient checkpointing to save memory") + parser.add_argument('--amp-opt-level', type=str, default='O1', choices=['O0', 'O1', 'O2'], + help='mixed precision opt level, if O0, no amp is used') + parser.add_argument('--output', default='output', type=str, metavar='PATH', + help='root of output folder, the full path is // (default: output)') + parser.add_argument('--tag', help='tag of experiment') + parser.add_argument('--eval', action='store_true', help='Perform evaluation only') + parser.add_argument('--throughput', action='store_true', help='Test throughput only') + parser.add_argument('--int8-mode', type=int, help='int8 mode', choices=[1, 2]) + # distributed training + parser.add_argument("--local_rank", type=int, default=0, help='local rank for DistributedDataParallel') + quant_utils.add_arguments(parser) + args, unparsed = parser.parse_known_args() + if args.quant_mode is not None: + args = quant_utils.set_args(args) + quant_utils.set_default_quantizers(args) + + config = get_config(args) + + return args, config + + +def main(config, args): + model = build_model(config) + model.cuda() + + checkpoint = torch.load(config.MODEL.RESUME, map_location='cpu') + model.load_state_dict(checkpoint['model'] if 'model' in checkpoint.keys() else checkpoint, strict=False) + quant_utils.configure_model(model, args, calib=False) + validate_with_random_data(config, args, model) + +@torch.no_grad() +def run_swintransformer_plugin(args, config, model, image): + TRT_LOGGER = trt.Logger(trt.Logger.VERBOSE) + # Import necessary plugins for BERT TensorRT + ctypes.CDLL("../../../build/lib/libswinTransformer_plugin.so", mode=ctypes.RTLD_GLOBAL) + + depths = config.MODEL.SWIN.DEPTHS + layer_num = len(depths) + max_batch = config.DATA.BATCH_SIZE + img_size = config.DATA.IMG_SIZE + in_chans = config.MODEL.SWIN.IN_CHANS + embed_dim = config.MODEL.SWIN.EMBED_DIM + + output_size = model.head.bias.shape[0] + print("output_size ", output_size) + + with open(args.engine, 'rb') as f, trt.Runtime(TRT_LOGGER) as runtime, \ + runtime.deserialize_cuda_engine(f.read()) as engine, \ + engine.create_execution_context() as context: + + context.active_optimization_profile = 0 + + input_nbytes0 = max_batch * in_chans * img_size * img_size * trt.float16.itemsize + stream = cuda.Stream() + + d_inputs = [cuda.mem_alloc(input_nbytes0)] + output_shape = (max_batch * output_size) + h_output = cuda.pagelocked_empty(output_shape, dtype=np.float32) + d_output = cuda.mem_alloc(h_output.nbytes) + + #import pdb;pdb.set_trace() + context.set_binding_shape(0, (max_batch, in_chans, img_size, img_size)) + + image = image.astype(np.float16) + + # Copy input h2d + h_input_embeds = cuda.register_host_memory(np.ascontiguousarray(image).ravel()) + cuda.memcpy_htod_async(d_inputs[0], h_input_embeds, stream) + + # warm up + for i in range(warmup_time): + context.execute_async_v2(bindings=[int(d_inp) for d_inp in d_inputs] + [int(d_output)], stream_handle=stream.handle) + + #ignore the last fc layer + op_end = time.time() + for i in range(test_time): + context.execute_async_v2(bindings=[int(d_inp) for d_inp in d_inputs] + [int(d_output)], stream_handle=stream.handle) + stream.synchronize() + + print("plugin time : ", (time.time() - op_end)/test_time*1000.0, "ms") + + cuda.memcpy_dtoh_async(h_output, d_output, stream) + stream.synchronize() + + return h_output + +@torch.no_grad() +def run_torch(model, images, mark): + # warm up + for i in range(warmup_time): + output = model(images) + + torch.cuda.synchronize() + torch_start = time.time() + #_nvtx.rangePushA("torch") + for i in range(test_time): + torch_output = model(images) + #_nvtx.rangePop() + torch.cuda.synchronize() + torch_end = time.time() + torch_output = torch_output.cpu().numpy() + print(mark + " time : ", (torch_end - torch_start)/test_time*1000.0, "ms") + return torch_output + +@torch.no_grad() +def validate_with_random_data(config, args, model): + model.eval() + max_batch = config.DATA.BATCH_SIZE + img_size = config.DATA.IMG_SIZE + in_chans = config.MODEL.SWIN.IN_CHANS + image = np.random.rand(1, in_chans, img_size, img_size) + images = np.repeat(image, max_batch, axis=0) + print(images.shape) + images_half = torch.tensor(images, dtype=torch.half) + images_float = torch.tensor(images, dtype=torch.float) + images_half = images_half.cuda(non_blocking=True) + images_float = images_float.cuda(non_blocking=True) + + ## run pytorch plugin + plugin_output = run_swintransformer_plugin(args, config, model, images) + + # warm up + model.half() + # traced_module = torch.jit.trace(model, images_half) + # torch_traced_output = run_torch(traced_module, images_half, "torch trace") + torch_output = run_torch(model, images_half, "torch") + + diff = abs(torch_output - plugin_output.reshape(max_batch, -1)) + print("torch_output vs plugin_output , avg diff : ", diff.mean((1)), "max diff : ", diff.max((1))) + +if __name__ == '__main__': + args, config = parse_option() + + seed = config.SEED + int(time.time()) + torch.manual_seed(seed) + np.random.seed(seed) + cudnn.benchmark = True + + main(config, args) diff --git a/examples/tensorrt/swin/run_builder_fp16.sh b/examples/tensorrt/swin/run_builder_fp16.sh new file mode 100644 index 000000000..7a70c9281 --- /dev/null +++ b/examples/tensorrt/swin/run_builder_fp16.sh @@ -0,0 +1,7 @@ +python builder_fp16.py \ + --batch-size 32 \ + --cfg ../../pytorch/swin/Swin-Transformer-Quantization/SwinTransformer/configs/swin_tiny_patch4_window7_224.yaml \ + --resume ../../pytorch/swin/Swin-Transformer-Quantization/swin_tiny_patch4_window7_224.pth \ + --th-path ../../../build/lib/libpyt_swintransformer.so \ + --output swin_transformer_fp16.engine + diff --git a/examples/tensorrt/swin/run_builder_fp32.sh b/examples/tensorrt/swin/run_builder_fp32.sh new file mode 100644 index 000000000..e07e8f218 --- /dev/null +++ b/examples/tensorrt/swin/run_builder_fp32.sh @@ -0,0 +1,7 @@ +python builder_fp32.py \ + --batch-size 32 \ + --cfg ../../pytorch/swin/Swin-Transformer-Quantization/SwinTransformer/configs/swin_tiny_patch4_window7_224.yaml \ + --resume ../../pytorch/swin/Swin-Transformer-Quantization/swin_tiny_patch4_window7_224.pth \ + --th-path ../../../build/lib/libpyt_swintransformer.so \ + --output swin_transformer_fp32.engine + diff --git a/examples/tensorrt/swin/run_builder_int8.sh b/examples/tensorrt/swin/run_builder_int8.sh new file mode 100644 index 000000000..7c1764879 --- /dev/null +++ b/examples/tensorrt/swin/run_builder_int8.sh @@ -0,0 +1,6 @@ +python builder_int8.py \ + --batch-size 32 \ + --cfg ../../pytorch/swin/Swin-Transformer-Quantization/SwinTransformer/configs/swin_tiny_patch4_window7_224.yaml \ + --resume ../../pytorch/swin/Swin-Transformer-Quantization/calib-checkpoint/swin_tiny_patch4_window7_224_calib.pth \ + --th-path ../../../build/lib/libpyt_swintransformer.so \ + --output swin_transformer_int8.engine \ No newline at end of file diff --git a/examples/tensorrt/swin/run_infer_fp16.sh b/examples/tensorrt/swin/run_infer_fp16.sh new file mode 100644 index 000000000..5fe431dc2 --- /dev/null +++ b/examples/tensorrt/swin/run_infer_fp16.sh @@ -0,0 +1,8 @@ +python infer_swintransformer_plugin.py \ + --eval \ + --cfg ../../pytorch/swin/Swin-Transformer-Quantization/SwinTransformer/configs/swin_tiny_patch4_window7_224.yaml \ + --resume ../../pytorch/swin/Swin-Transformer-Quantization/swin_tiny_patch4_window7_224.pth \ + --th-path ../../../build/lib/libpyt_swintransformer.so \ + --engine swin_transformer_fp16.engine \ + --batch-size $1 \ + --use-fp16 diff --git a/examples/tensorrt/swin/run_infer_fp32.sh b/examples/tensorrt/swin/run_infer_fp32.sh new file mode 100644 index 000000000..aa1227912 --- /dev/null +++ b/examples/tensorrt/swin/run_infer_fp32.sh @@ -0,0 +1,7 @@ +python infer_swintransformer_plugin.py \ + --eval \ + --cfg ../../pytorch/swin/Swin-Transformer-Quantization/SwinTransformer/configs/swin_tiny_patch4_window7_224.yaml \ + --resume ../../pytorch/swin/Swin-Transformer-Quantization/swin_tiny_patch4_window7_224.pth \ + --th-path ../../../build/lib/libpyt_swintransformer.so \ + --engine swin_transformer_fp32.engine \ + --batch-size $1 diff --git a/examples/tensorrt/swin/run_infer_int8.sh b/examples/tensorrt/swin/run_infer_int8.sh new file mode 100644 index 000000000..8f1566362 --- /dev/null +++ b/examples/tensorrt/swin/run_infer_int8.sh @@ -0,0 +1,8 @@ +python infer_swintransformer_plugin_int8.py \ + --eval \ + --cfg ../../pytorch/swin/Swin-Transformer-Quantization/SwinTransformer/configs/swin_tiny_patch4_window7_224.yaml \ + --resume ../../pytorch/swin/Swin-Transformer-Quantization/calib-checkpoint/swin_tiny_patch4_window7_224_calib.pth \ + --int8-mode 1 \ + --th-path ../../../build/lib/libpyt_swintransformer.so \ + --engine swin_transformer_int8.engine \ + --batch-size $1 diff --git a/examples/tensorrt/t5/createT5TestData.py b/examples/tensorrt/t5/createT5TestData.py new file mode 100644 index 000000000..3a0367af1 --- /dev/null +++ b/examples/tensorrt/t5/createT5TestData.py @@ -0,0 +1,40 @@ +# +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +import numpy as np + +np.random.seed(97) + +data = {} + +fpList = [32,16] +bsList = [1,8,32,128] +slList = [32,128,384] + +for bs in bsList: + for sl in slList: + for fp in fpList: + name = '-fp'+str(fp)+'-bs'+str(bs)+'-sl'+str(sl) + data['encoder'+name] = np.random.randint(0,32128,[bs,sl]).astype(np.int32) + data['decoding'+name] = np.random.rand(bs,sl,512).astype([np.float32,np.float16][int(fp==16)])*2-1 + data['seqLen'+name] = np.full([bs],sl,dtype=np.int32) + +np.savez("T5PluginTestIO.npz",**data) + +#for k in data.keys(): +# print(k,data[k].shape,data[k].dtype,data[k].reshape(-1)[:10]) +print("create T5 test data finish!") + diff --git a/examples/tensorrt/t5/extractT5ModelToBIN.py b/examples/tensorrt/t5/extractT5ModelToBIN.py new file mode 100644 index 000000000..95499b85b --- /dev/null +++ b/examples/tensorrt/t5/extractT5ModelToBIN.py @@ -0,0 +1,99 @@ +import os +import sys +import argparse +import numpy as np +import torch +from transformers import T5ForConditionalGeneration + +modelName = 't5-small' +savePath = './para' + +def fuse_decoder_qkv(model, factor, saved_dir): + model_dict = {} + for name, param in model.named_parameters(): + if name.find("decoder") != -1 and name.find("SelfAttention") != -1: + model_dict[name] = param + + for i in range(model.decoder.config.num_layers): + shape = model_dict[f"decoder.block.{i}.layer.0.SelfAttention.q.weight"].T.shape + qkv = torch.cat([model_dict[f"decoder.block.{i}.layer.0.SelfAttention.q.weight"].T, + model_dict[f"decoder.block.{i}.layer.0.SelfAttention.k.weight"].T, + model_dict[f"decoder.block.{i}.layer.0.SelfAttention.v.weight"].T], dim=-1) + + qkv = qkv.reshape([shape[0], 3, shape[1]]) + qkv = qkv.float().cpu().detach().numpy() + + split_vals = np.split(qkv, factor, axis=-1) + for j in range(factor): + saved_path = saved_dir + "/" + f"decoder.block.{i}.layer.0.SelfAttention.qkv.weight.{j}.bin" + split_vals[j].tofile(saved_path) + +def split_and_convert_process(key, val, factor, saved_dir): + val = val.T.detach().numpy() + saved_key = key + + if key.find("shared.weight") != -1: + # shared weights, only need to convert the weights of rank 0 + saved_path = saved_dir + "/" + f"{saved_key}.bin" + val.tofile(saved_path) + + saved_path = saved_dir + "/" + f"{saved_key}_T.bin" + val.T.tofile(saved_path) + elif key.find("layer_norm.weight") != -1: + # shared weights, only need to convert the weights of rank 0 + saved_path = saved_dir + "/" + f"{saved_key}.bin" + val.tofile(saved_path) + + elif ( + key.find("SelfAttention.o.weight") != -1 + or key.find("EncDecAttention.o.weight") != -1 + or key.find("DenseReluDense.wo.weight") != -1 + ): + split_vals = np.split(val, factor, axis=0) + for j in range(factor): + saved_path = saved_dir + "/" + f"{saved_key}.{j:d}.bin" + split_vals[j].tofile(saved_path) + + elif ( + key.find("DenseReluDense.wi.weight") != -1 + or (key.find("encoder") != -1 and ( + key.find("SelfAttention.q.weight") != -1 + or key.find("SelfAttention.k.weight") != -1 + or key.find("SelfAttention.v.weight") != -1 + ) + ) + or key.find("EncDecAttention.q.weight") != -1 + or key.find("EncDecAttention.k.weight") != -1 + or key.find("EncDecAttention.v.weight") != -1 + ): + split_vals = np.split(val, factor, axis=-1) + for j in range(factor): + saved_path = saved_dir + "/" + f"{saved_key}.{j:d}.bin" + split_vals[j].tofile(saved_path) + elif key.find("relative_attention_bias") != -1: + split_vals = np.split(val, factor, axis=0) + for j in range(factor): + saved_path = saved_dir + "/" + f"{saved_key}.{j:d}.bin" + split_vals[j].tofile(saved_path) + elif ( + key.find("decoder") != -1 and + ( + key.find("SelfAttention.q.weight") != -1 + or key.find("SelfAttention.k.weight") != -1 + or key.find("SelfAttention.v.weight") != -1 + ) + ): + pass + else: + print(f"[ERROR] cannot find key '{key}'") + +if __name__ == "__main__": + os.system("mkdir -p para") + + t5_model = T5ForConditionalGeneration.from_pretrained('t5-small') + for name, param in t5_model.named_parameters(): + split_and_convert_process(name, param, 1, savePath) + fuse_decoder_qkv(t5_model, 1, savePath) + + print("extract T5 model weight finish!") + diff --git a/examples/tensorrt/t5/testT5Plugin.py b/examples/tensorrt/t5/testT5Plugin.py new file mode 100644 index 000000000..8f9765665 --- /dev/null +++ b/examples/tensorrt/t5/testT5Plugin.py @@ -0,0 +1,327 @@ +# +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +import os +import sys +import ctypes +import argparse +import math +import numpy as np +import tensorrt as trt +import torch +from datetime import datetime + +from transformers import PreTrainedTokenizerFast +from transformers import T5Tokenizer +dir_path = os.path.dirname(os.path.realpath(__file__)) +sys.path.append(dir_path + "/../../..") +from examples.pytorch.decoding.utils.recover_bpe import recover_bpe + +npToTrt = {np.int8:trt.int8,np.float16:trt.float16,np.int32:trt.int32,np.float32:trt.float32} +npToPFT = {np.int8:trt.PluginFieldType.INT8,np.float16:trt.PluginFieldType.FLOAT16, + np.int32:trt.PluginFieldType.INT32,np.float32:trt.PluginFieldType.FLOAT32} +npToTorch = {np.dtype('float16'):torch.float16,np.dtype('int32'):torch.int32,np.dtype('float32'):torch.float32} +device = 0 + +# global variables with default value +globalNMaxBatchSize = 128 +globalNMaxSeqLen = 384 +globalNBeamSize = 4 +globalNUseFP16 = 0 + +globalNHead = 8 +globalNModelDim = 512 +globalNSizePerHead = globalNModelDim / 8 +globalNInterSize = globalNModelDim * 4 +globalNLayer = 6 +globalNBucket = 32 +globalNMaxDistance = 128 +globalNSM = (lambda x: x[0]*10 + x[1])( torch.cuda.get_device_capability() ) +globalFQScale = 1.0 / math.sqrt(globalNSizePerHead) +globalNVocabSize = 32128 +globalNStartId = 0 +globalNEndId = 1 +globalFBeamDiversity = 0.0 +globalFTopP = 0.0 +globalFTemperature = 1.0 +globalFLenPenalty = 1.0 +globalFRepPenalty = 1.0 + +nMinBatchSize = 1 +nOptBatchSize = globalNMaxBatchSize +nMaxBatchSize = globalNMaxBatchSize +nMinSeqLen = 32 +nOptSeqLen = globalNMaxSeqLen +nMaxSeqLen = globalNMaxSeqLen + +def bleu_score(pred, ref): + from sacrebleu import corpus_bleu + bleu = corpus_bleu(pred, [ref], force=True) + print(" bleu score: {:6.2f}".format(bleu.score)) + print(" bleu counts: {}".format(bleu.counts)) + print(" bleu totals: {}".format(bleu.totals)) + print(" bleu precisions: {}".format(bleu.precisions)) + print(" bleu sys_len: {}; ref_len: {}".format(bleu.sys_len, bleu.ref_len)) + return bleu + +def getT5EncoderPlugin(arg): + nBatchSize = arg['batch_size'] + nMaxSeqLen = arg['max_seq_len'] + nBeamSize = arg['beam_width'], + nHead = globalNHead + nSizePerHead = globalNSizePerHead + nInterSize = globalNInterSize + nModelDim = globalNModelDim + nLayer = globalNLayer + nBucket = globalNBucket + nMaxDistance = globalNMaxDistance + nSM = globalNSM + fQScale = globalFQScale + useFP16 = int(arg['data_type']=='fp16') + for c in trt.get_plugin_registry().plugin_creator_list: + if c.name == 'T5EncoderPlugin': + pList = [ + trt.PluginField('max_batch_size', np.int32(nBatchSize), npToPFT[np.int32]), + trt.PluginField('max_seq_len', np.int32(nMaxSeqLen), npToPFT[np.int32]), + trt.PluginField('beam_width', np.int32(nBeamSize), npToPFT[np.int32]), + trt.PluginField('head_num', np.int32(nHead), npToPFT[np.int32]), + trt.PluginField('size_per_head', np.int32(nSizePerHead), npToPFT[np.int32]), + trt.PluginField('inter_size', np.int32(nInterSize), npToPFT[np.int32]), + trt.PluginField('d_model', np.int32(nModelDim), npToPFT[np.int32]), + trt.PluginField('num_layer', np.int32(nLayer), npToPFT[np.int32]), + trt.PluginField('num_bucket', np.int32(nBucket), npToPFT[np.int32]), + trt.PluginField('max_distance', np.int32(nMaxDistance), npToPFT[np.int32]), + trt.PluginField('sm', np.int32(nSM), npToPFT[np.int32]), + trt.PluginField('q_scaling', np.float32(fQScale), npToPFT[np.float32]), + trt.PluginField('useFP16', np.int32(useFP16), npToPFT[np.int32]), + ] + return c.create_plugin(c.name, trt.PluginFieldCollection(pList)) + return None + +def getT5DecodingPlugin(arg): + nBatchSize = arg['batch_size'] + nMaxSeqLen = arg['max_seq_len'] + nMemMaxSeqLen = arg['max_seq_len'] + nBeamSize = arg['beam_width'] + nHead = globalNHead + nSizePerHead = globalNSizePerHead + nInterSize = globalNInterSize + nModelDim = globalNModelDim + nLayer = globalNLayer + nVocabSize = globalNVocabSize + nBucket = globalNBucket + nMaxDistance = globalNMaxDistance + nStartId = globalNStartId + nEndId = globalNEndId + fBeamDiversity = arg['beam_search_diversity_rate'] + nTopK = arg['sampling_topk'] + fTopP = arg['sampling_topp'] + fTemperature = globalFTemperature + fLenPenalty = globalFLenPenalty + fRepPenalty = globalFRepPenalty + useFP16 = int(arg['data_type']=='fp16') + for c in trt.get_plugin_registry().plugin_creator_list: + if c.name == 'T5DecodingPlugin': + pList = [ + trt.PluginField('max_batch_size', np.int32(nBatchSize), npToPFT[np.int32]), + trt.PluginField('max_seq_len', np.int32(nMaxSeqLen), npToPFT[np.int32]), + trt.PluginField('mem_max_seq_len', np.int32(nMaxSeqLen), npToPFT[np.int32]), + trt.PluginField('beam_width', np.int32(nBeamSize), npToPFT[np.int32]), + trt.PluginField('head_num', np.int32(nHead), npToPFT[np.int32]), + trt.PluginField('size_per_head', np.int32(nSizePerHead), npToPFT[np.int32]), + trt.PluginField('inter_size', np.int32(nInterSize), npToPFT[np.int32]), + trt.PluginField('d_model', np.int32(nModelDim), npToPFT[np.int32]), + trt.PluginField('num_layer', np.int32(nLayer), npToPFT[np.int32]), + trt.PluginField('vocab_size', np.int32(nVocabSize), npToPFT[np.int32]), + trt.PluginField('num_bucket', np.int32(nBucket), npToPFT[np.int32]), + trt.PluginField('max_distance', np.int32(nMaxDistance), npToPFT[np.int32]), + trt.PluginField('start_id', np.int32(nStartId), npToPFT[np.int32]), + trt.PluginField('end_id', np.int32(nEndId), npToPFT[np.int32]), + trt.PluginField('beam_search_diversity_rate', np.float32(fBeamDiversity), npToPFT[np.float32]), + trt.PluginField('top_k', np.int32(nTopK), npToPFT[np.int32]), + trt.PluginField('top_p', np.float32(fTopP), npToPFT[np.float32]), + trt.PluginField('temperature', np.float32(fTemperature), npToPFT[np.float32]), + trt.PluginField('len_penalty', np.float32(fLenPenalty), npToPFT[np.float32]), + trt.PluginField('repetition_penalty', np.float32(fRepPenalty), npToPFT[np.float32]), + trt.PluginField('useFP16', np.int32(useFP16), npToPFT[np.int32]), + ] + return c.create_plugin(c.name, trt.PluginFieldCollection(pList)) + return None + +def buildEngine(logger, arg): + builder = trt.Builder(logger) + network = builder.create_network(1) + profile = builder.create_optimization_profile() + config = builder.create_builder_config() + config.max_workspace_size = 1 << 30 + config.flags = int(arg['data_type'] == 'fp16') + + inputT0 = network.add_input('inputId', npToTrt[np.int32], [-1,-1]) + inputT1 = network.add_input('inputSeqLen', npToTrt[np.int32], [-1]) + + profile.set_shape(inputT0.name, [nMinBatchSize,nMinSeqLen],[nOptBatchSize,nOptSeqLen],[nMaxBatchSize,nMaxSeqLen]) + profile.set_shape(inputT1.name, [nMinBatchSize],[nOptBatchSize],[nMaxBatchSize]) + config.add_optimization_profile(profile) + + encoderPlugin = getT5EncoderPlugin(arg) + decodingPlugin = getT5DecodingPlugin(arg) + if encoderPlugin == None: + print("Failed making encoder plugin!") + return None + if decodingPlugin == None: + print("Failed making decoding plugin!") + return None + + encoderLayer = network.add_plugin_v2([inputT0,inputT1], encoderPlugin) + decodingLayer = network.add_plugin_v2([encoderLayer.get_output(0),inputT1], decodingPlugin) + decodingLayer.get_output(0).name = "decodingOutput0" + decodingLayer.get_output(1).name = "decodingOutput1" + decodingLayer.get_output(0).dtype = npToTrt[np.int32] + decodingLayer.get_output(1).dtype = npToTrt[np.int32] + + network.mark_output(decodingLayer.get_output(0)) + network.mark_output(decodingLayer.get_output(1)) + return builder.build_engine(network,config) + +def testBoth(arg, stream): + useFP16 = int(arg['data_type'] == 'fp16') + nBatchSize = arg['batch_size'] + nSeqLen = arg['max_seq_len'] + testCase = ""%(['32','16'][useFP16],nBatchSize,nSeqLen) + print("Test both Encoder and Decoding",testCase) + logger = trt.Logger(trt.Logger.ERROR) + trt.init_libnvinfer_plugins(logger, '') + + ctypes.cdll.LoadLibrary(arg['lib_path']) + + trtFile = 'T5Engine-fp' + ['32','16'][useFP16] +'.trt' + if os.path.isfile(trtFile): + with open(trtFile, 'rb') as f: + engineString = f.read() + engine = trt.Runtime(logger).deserialize_cuda_engine(engineString) + if engine == None: + print("Failed loading engine!") + return + print("Succeeded loading engine!") + else: + engine = buildEngine(logger, arg) + if engine == None: + print("Failed building engine!") + return + print("Succeeded building engine!") + with open(trtFile, 'wb') as f: + f.write( engine.serialize() ) + + context = engine.create_execution_context() + nInput = np.sum([ engine.binding_is_input(i) for i in range(engine.num_bindings) ]) + nOutput = engine.num_bindings - nInput + #for i in range(engine.num_bindings): + # print("Bind[%2d]:i[%d]->"%(i,i) if engine.binding_is_input(i) else "Bind[%2d]:o[%d]->"%(i,i-nInput), + # engine.get_binding_dtype(i),engine.get_binding_shape(i),context.get_binding_shape(i),engine.get_binding_name(i)) + + tokenizer = T5Tokenizer.from_pretrained(arg['model']) + fast_tokenizer = PreTrainedTokenizerFast.from_pretrained(arg['model']) + + with open(arg['source'], 'r') as f: + src_text = recover_bpe(f.readlines()) + src_text = ["translate English to German: " + line.strip() for line in src_text] + + with open(arg['target'], 'r') as f: + tgt_text = recover_bpe(f.readlines()) + + sys.stdout.flush() + + outputId = [] + outputSeqLen = [] + prev = 0 + needWarmUp = True + torch.cuda.synchronize() + start_time = datetime.now() + while prev < len(src_text): + input_texts = src_text[prev:prev+nBatchSize] + prev += nBatchSize + + input_token = tokenizer(input_texts, return_tensors='pt', padding=True) + inputId = np.ascontiguousarray(input_token['input_ids'].numpy().astype(np.int32)) + inputMask = np.ascontiguousarray(np.sum(input_token['attention_mask'].numpy(),1).astype(np.int32)) + nRealBatchSize,nRealSeqLen = np.shape(inputId) + + context.set_binding_shape(0,[nRealBatchSize,nRealSeqLen]) + context.set_binding_shape(1,[nRealBatchSize]) + + bufferD = [] + bufferD.append( torch.from_numpy(inputId).to(device) ) + bufferD.append( torch.from_numpy(inputMask).to(device) ) + bufferD.append( torch.empty(tuple(context.get_binding_shape(2)), dtype=torch.int32, device=device) ) + bufferD.append( torch.empty(tuple(context.get_binding_shape(3)), dtype=torch.int32, device=device) ) + torch.cuda.synchronize() + + if needWarmUp: + for i in range(5): + context.execute_async_v2([ b.data_ptr() for b in bufferD ], stream) + prev = 0 + needWarmUp = False + torch.cuda.synchronize() + start_time = datetime.now() + continue + + context.execute_async_v2([ b.data_ptr() for b in bufferD ], stream) + torch.cuda.synchronize() + + outputId.append( bufferD[nInput+0].cpu().numpy() ) + outputSeqLen.append( bufferD[nInput+1].cpu().numpy() ) + + stop_time = datetime.now() + execution_time = (stop_time - start_time).total_seconds() + + outputText = [] + for batch_token, batch_seq_len in zip(outputId,outputSeqLen): + for j in range(len(batch_token)): + outputText.append( fast_tokenizer.decode(batch_token[j][0][:batch_seq_len[j][0]], skip_special_tokens=True)) + + bleuScore = bleu_score(outputText, tgt_text[:len(outputText)]) + with open("output.txt", 'w') as f: + for line in outputText: + f.write(line + '\n') + print("[INFO] FT translates {} batches taking {:.2f} sec to translate {} tokens, BLEU score: {:.2f}, {:.0f} tokens/sec.".format( + len(outputText)//nBatchSize, execution_time, bleuScore.sys_len, bleuScore.score, bleuScore.sys_len / execution_time)) + print("Test both Encoder and Decoding",testCase,"finish!") + +if __name__ == '__main__': + np.set_printoptions(precision = 4, linewidth = 200, suppress = True) + torch.cuda.set_device(device) + stream = 0 #torch.cuda.Stream(device).cuda_stream + #os.system('rm -f ./*.trt ./*.in') + parser = argparse.ArgumentParser(formatter_class=argparse.ArgumentDefaultsHelpFormatter) + parser.add_argument('-batch', '--batch_size', type=int, metavar='NUMBER', default=32, help='batch size (default: 32)') + parser.add_argument('-beam', '--beam_width', type=int, metavar='NUMBER', default=4, help='beam width (default: 4)') + parser.add_argument('-s', '--max_seq_len', type=int, metavar='NUMBER', default=128, help='max sequence length (default: 200)') + parser.add_argument( '--source', type=str, metavar='STRING', default="../examples/pytorch/decoding/utils/translation/test.en", help="Path to the source file.") + parser.add_argument( '--target', type=str, metavar='STRING', default="../examples/pytorch/decoding/utils/translation/test.de", help="Path to the target file.") + parser.add_argument('-diversity_rate', '--beam_search_diversity_rate', type=float, metavar='NUMBER', default=0.0, help='deviersity rate of beam search. default is 0. When diversity rate = 0, it is equivalent to the naive beams earch.') + parser.add_argument('-topk', '--sampling_topk', type=int, metavar='NUMBER', default=4, help='Candidate (k) value of top k sampling in decoding. Default is 1.') + parser.add_argument('-topp', '--sampling_topp', type=float, metavar='NUMBER', default=0.0, help='Probability (p) value of top p sampling in decoding. Default is 0.0. ') + parser.add_argument('-d', '--data_type', type=str, metavar='STRING', default="fp32", help='data type (default: fp32)', choices=['fp32', 'fp16']) + parser.add_argument('-lib_path','--lib_path', type=str, metavar='STRING', default="lib/libtrt_t5.so", help='the path of FasterTransformer pytorch t5 op library.') + parser.add_argument('-model', '--model', type=str, metavar='STRING', default="t5-small", help='T5 model size.', choices=["t5-small", "t5-base", "t5-large", "t5-3b", "t5-11b"]) + #parser.add_argument('-tensor_para_size', '--tensor_para_size', type=int, metavar='NUMBER', default=1, help='size of tensor parallelism (default: 1)') + #parser.add_argument('-pipeline_para_size', '--pipeline_para_size', type=int, metavar='NUMBER', default=1, help='size of pipeline parallelism (default: 1)') + #parser.add_argument( '--ckpt_path', type=str, help='path to the checkpoint file.') + #parser.add_argument('-max_ite', '--max_iteration', type=int, metavar='NUMBER', default=100000, help='Maximum iteraiton for translation, default is 100000 (as large as possible to run all test set).') + arg = vars(parser.parse_args()) + testBoth(arg,stream) + print("Test finish!") + diff --git a/examples/tensorrt/vit/infer_visiontransformer_plugin.py b/examples/tensorrt/vit/infer_visiontransformer_plugin.py new file mode 100644 index 000000000..156ad9d87 --- /dev/null +++ b/examples/tensorrt/vit/infer_visiontransformer_plugin.py @@ -0,0 +1,190 @@ +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +import os +import time +import argparse +import datetime +import numpy as np + +import torch +import torch.backends.cudnn as cudnn +import torch.distributed as dist + +import tensorrt as trt +import ctypes + +import sys +sys.path.insert(0, "../../pytorch/vit/ViT-quantization/ViT-pytorch") + +from models.modeling import VisionTransformer, CONFIGS +from plugin_loader import ViTPluginLoader + + +test_time = 100 +warmup_time = 10 + +def setup_torch(args): + # Prepare model + config = CONFIGS[args.model_type] + print(config) + + model = VisionTransformer(config, args.img_size, zero_head=False, num_classes=1000) + model.load_from(np.load(args.pretrained_dir)) + model.to(args.device) + return config, model + +def setup_trt(args, config): + p_loader = ViTPluginLoader(args.plugin_path) + p_loader.load_model_config(config, args) + engine = p_loader.build_network(args.pretrained_dir) + return engine, p_loader + +def parse_option(): + parser = argparse.ArgumentParser('ViT evaluation script', add_help=False) + parser.add_argument("--model_type", choices=["ViT-B_16", "ViT-B_32", "ViT-L_16", + "ViT-L_32", "ViT-H_14"], + default="ViT-B_16", + help="Which variant to use.") + parser.add_argument("--img_size", default=384, type=int, + help="Resolution size") + parser.add_argument("--pretrained_dir", type=str, default="checkpoint/ViT-B_16.npz", + help="Where to search for pretrained ViT models.") + + # easy config modification + parser.add_argument('--plugin_path', type=str, default="../../../build/lib/libvit_plugin.so", help='path to plugin lib') + parser.add_argument('--batch-size', type=int, default=32, help="batch size for single GPU") + parser.add_argument('--fp16', action='store_true', + help="Whether to use 16-bit float precision instead of 32-bit") + parser.add_argument('--seed', type=int, default=42, + help="random seed for initialization") + + args, unparsed = parser.parse_known_args() + + + return args + + +def main(args): + + config, model = setup_torch(args) + engine, p_loader = setup_trt(args, config) + + validate_with_random_data(p_loader, model, engine) + +@torch.no_grad() +def run_trt_plugin(plugin_loader:ViTPluginLoader, images, engine): + TRT_LOGGER = trt.Logger(trt.Logger.INFO) + seq_len = plugin_loader.seq_len_ + embed_dim = plugin_loader.embed_dim_ + max_batch = plugin_loader.max_batch_ + img_size = plugin_loader.img_size_ + in_chans = plugin_loader.in_chans_ + is_fp16 = plugin_loader.is_fp16_ + + dtype_trt = trt.float16 if is_fp16 else trt.float32 + dtype_np = np.float16 if is_fp16 else np.float32 + dtype_torch = torch.float16 if is_fp16 else torch.float32 + + with engine.create_execution_context() as context: + + context.active_optimization_profile = 0 + + stream = torch.cuda.Stream() + + context.set_binding_shape(0, (max_batch, in_chans, img_size, img_size)) + output_shape = tuple(context.get_binding_shape(1)) + print(output_shape) + + # Copy input h2d + d_inputs = [images] + d_output = torch.empty(output_shape, dtype=torch.float32).cuda() + + # warm up + for i in range(warmup_time): + context.execute_async_v2([d_inp.data_ptr() for d_inp in d_inputs] + [d_output.data_ptr()], stream.cuda_stream) + + #ignore the last fc layer + torch.cuda.synchronize() + op_end = time.time() + for i in range(test_time): + context.execute_async_v2([d_inp.data_ptr() for d_inp in d_inputs] + [d_output.data_ptr()], stream.cuda_stream) + stream.synchronize() + + torch.cuda.synchronize() + print("plugin time : ", (time.time() - op_end)/test_time*1000.0, "ms") + + return d_output.cpu().numpy() + + +@torch.no_grad() +def run_torch(model, images, mark): + # warm up + for i in range(warmup_time): + output = model(images) + + torch.cuda.synchronize() + torch_start = time.time() + for i in range(test_time): + torch_output = model.transformer(images) + + torch.cuda.synchronize() + torch_end = time.time() + embed = model.transformer.embeddings(images) + np.save('embed_torch.npy',embed.cpu().numpy()) + torch_output = torch_output[0].cpu().numpy() + np.save('torch_out.npy', torch_output) + print(mark + " time : ", (torch_end - torch_start)/test_time*1000.0, "ms") + + return torch_output + +@torch.no_grad() +def validate_with_random_data(plugin_loader:ViTPluginLoader, model, engine): + model.eval() + if plugin_loader.is_fp16_: + model.half() + + dtype_torch = torch.float16 if plugin_loader.is_fp16_ else torch.float + + max_batch = plugin_loader.max_batch_ + img_size = plugin_loader.img_size_ + in_chans = plugin_loader.in_chans_ + image = np.random.rand(1, in_chans, img_size, img_size) + images = np.repeat(image, max_batch, axis=0) + images_tensor = torch.tensor(images, dtype=dtype_torch) + images_tensor = images_tensor.cuda(non_blocking=True) + + plugin_output = run_trt_plugin(plugin_loader, images_tensor, engine) + + torch_output = run_torch(model, images_tensor, "torch") + print(torch_output.shape) + print(plugin_output.shape) + + diff = abs(torch_output - plugin_output.reshape(torch_output.shape)) + print("torch_output vs plugin_output , avg diff : ", diff.mean(), "max diff : ", diff.max()) + + +if __name__ == '__main__': + args = parse_option() + + seed = args.seed + int(time.time()) + torch.manual_seed(seed) + np.random.seed(seed) + cudnn.benchmark = True + + # Setup CUDA, GPU + device = torch.device("cuda" if torch.cuda.is_available() else "cpu") + args.n_gpu = torch.cuda.device_count() + args.device = device + + main(args) diff --git a/examples/tensorrt/vit/plugin_loader.py b/examples/tensorrt/vit/plugin_loader.py new file mode 100644 index 000000000..6210ffade --- /dev/null +++ b/examples/tensorrt/vit/plugin_loader.py @@ -0,0 +1,213 @@ +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import ctypes +import numpy as np +import os +import os.path +import tensorrt as trt +from scipy import ndimage + +def load_weights(weight_path:str): + suffix = weight_path.split('.')[-1] + if suffix != 'npz': + print("Unsupport weight file: Unrecognized format %s " % suffix) + exit(-1) + return np.load(weight_path) + +class ViTPluginLoader: + def __init__(self, plugin_path) -> None: + + handle = ctypes.CDLL(plugin_path, mode=ctypes.RTLD_GLOBAL) + if not handle: + raise RuntimeError("Fail to load plugin library: %s" % plugin_path) + + self.logger_ = trt.Logger(trt.Logger.VERBOSE) + trt.init_libnvinfer_plugins(self.logger_, "") + plg_registry = trt.get_plugin_registry() + + self.plg_creator = plg_registry.get_plugin_creator("CustomVisionTransformerPlugin", "1", "") + + def load_model_config(self, config, args): + self.patch_size_ = config.patches.size[0] + self.num_heads_ = config.transformer.num_heads + self.layer_num_ = config.transformer.num_layers + self.inter_size_ = config.transformer.mlp_dim + self.embed_dim_ = config.hidden_size + self.max_batch_ = args.batch_size + self.img_size_ = args.img_size + self.with_class_token_ = (config.classifier == 'token') + self.seq_len_ = pow(self.img_size_//self.patch_size_, 2) + 1 if self.with_class_token_ else 0 + self.in_chans_ = 3 + self.is_fp16_ = args.fp16 + self.serial_name_ = "ViTEngine_{}_{}_{}_{}_{}_{}_{}_{}_{}".format(self.patch_size_, + self.num_heads_ , + self.layer_num_ , + self.inter_size_, + self.embed_dim_ , + self.max_batch_ , + self.img_size_ , + self.seq_len_, + int(self.is_fp16_)) + self.value_holder = [] + + + def build_plugin_field_collection(self, weights): + field_type = trt.PluginFieldType.FLOAT16 if self.is_fp16_ else trt.PluginFieldType.FLOAT32 + arr_type = np.float16 if self.is_fp16_ else np.float32 + + self.value_holder = [np.array([self.max_batch_ ]).astype(np.int32), + np.array([self.img_size_ ]).astype(np.int32), + np.array([self.patch_size_]).astype(np.int32), + np.array([self.in_chans_ ]).astype(np.int32), + np.array([self.embed_dim_ ]).astype(np.int32), + np.array([self.num_heads_ ]).astype(np.int32), + np.array([self.inter_size_]).astype(np.int32), + np.array([self.layer_num_ ]).astype(np.int32), + np.array([self.with_class_token_]).astype(np.int32) + ] + + max_batch = trt.PluginField("max_batch", self.value_holder[0], trt.PluginFieldType.INT32) + img_size = trt.PluginField("img_size", self.value_holder[1], trt.PluginFieldType.INT32) + patch_size = trt.PluginField("patch_size", self.value_holder[2], trt.PluginFieldType.INT32) + in_chans = trt.PluginField("in_chans", self.value_holder[3], trt.PluginFieldType.INT32) + embed_dim = trt.PluginField("embed_dim", self.value_holder[4], trt.PluginFieldType.INT32) + num_heads = trt.PluginField("num_heads", self.value_holder[5], trt.PluginFieldType.INT32) + inter_size = trt.PluginField("inter_size", self.value_holder[6], trt.PluginFieldType.INT32) + layer_num = trt.PluginField("layer_num", self.value_holder[7], trt.PluginFieldType.INT32) + with_cls_token = trt.PluginField("with_cls_token", self.value_holder[8], trt.PluginFieldType.INT32) + + part_fc = [] + for name in weights.files: + if name == 'embedding/kernel': #transpose conv kernel + w = np.ascontiguousarray(weights[name].transpose([3, 2, 0, 1]).copy()) + self.value_holder.append(w.astype(arr_type)) + elif name == 'Transformer/posembed_input/pos_embedding': + w = weights[name] + if w.shape[1] != self.seq_len_: + print("load_pretrained: resized variant: %s to %s" % (w.shape[1], self.seq_len_)) + ntok_new = self.seq_len_ + + if self.with_class_token_: + posemb_tok, posemb_grid = w[:, :1], w[0, 1:] + ntok_new -= 1 + else: + posemb_tok, posemb_grid = w[:, :0], w[0] + + gs_old = int(np.sqrt(len(posemb_grid))) + gs_new = int(np.sqrt(ntok_new)) + print('load_pretrained: grid-size from %s to %s' % (gs_old, gs_new)) + posemb_grid = posemb_grid.reshape(gs_old, gs_old, -1) + + zoom = (gs_new / gs_old, gs_new / gs_old, 1) + posemb_grid = ndimage.zoom(posemb_grid, zoom, order=1) + posemb_grid = posemb_grid.reshape(1, gs_new * gs_new, -1) + w = np.concatenate([posemb_tok, posemb_grid], axis=1) + self.value_holder.append(w.astype(arr_type)) + elif name == 'cls' and (not self.with_class_token_): + continue + else: + self.value_holder.append(weights[name].astype(arr_type)) + + part_fc.append(trt.PluginField(name, self.value_holder[-1], field_type)) + + return trt.PluginFieldCollection([max_batch, img_size, patch_size, in_chans, embed_dim, num_heads, inter_size, layer_num, with_cls_token] + part_fc) + + + def build_network(self, weights_path): + trt_dtype = trt.float16 if self.is_fp16_ else trt.float32 + explicit_batch_flag = 1 << int(trt.NetworkDefinitionCreationFlag.EXPLICIT_BATCH) + weights = load_weights(weights_path) + + with trt.Builder(self.logger_) as builder, builder.create_network(explicit_batch_flag) as network, builder.create_builder_config() as builder_config: + builder_config.max_workspace_size = 8 << 30 + if self.is_fp16_: + builder_config.set_flag(trt.BuilderFlag.FP16) + builder_config.set_flag(trt.BuilderFlag.STRICT_TYPES) + + # Create the network + input_tensor = network.add_input(name="input_img", dtype=trt_dtype, shape=(-1, self.in_chans_, self.img_size_, self.img_size_)) + + # Specify profiles + profile = builder.create_optimization_profile() + min_shape = (1, self.in_chans_, self.img_size_, self.img_size_) + ##TODO: There is a bug in TRT when opt batch is large + max_shape = (self.max_batch_, self.in_chans_, self.img_size_, self.img_size_) + profile.set_shape("input_img", min=min_shape, opt=min_shape, max=max_shape) + builder_config.add_optimization_profile(profile) + + #import pdb;pdb.set_trace() + print("Generate plugin field collection...") + pfc = self.build_plugin_field_collection(weights) + + + fn = self.plg_creator.create_plugin("vision_transformer", pfc) + inputs = [input_tensor] + vit = network.add_plugin_v2(inputs, fn) + + output_tensor = vit.get_output(0) + output_tensor.name = "visiont_transformer_output" + + if self.is_fp16_: + vit.precision = trt.float16 + vit.set_output_type(0, trt.float16) + network.mark_output(output_tensor) + + print("Building TRT engine....") + engine = builder.build_engine(network, builder_config) + return engine + + def serialize_engine(self, engine, file_folder='./'): + if not os.path.isdir(file_folder): + self.logger_.log(self.logger_.VERBOSE, "%s is not a folder." % file_folder) + exit(-1) + + file_path =os.path.join(file_folder, self.serial_name_) + + self.logger_.log(self.logger_.VERBOSE, "Serializing Engine...") + serialized_engine = engine.serialize() + self.logger_.log(self.logger_.INFO, "Saving Engine to {:}".format(file_path)) + with open(file_path, "wb") as fout: + fout.write(serialized_engine) + self.logger_.log(self.logger_.INFO, "Done.") + + def deserialize_engine(self, file_folder='./'): + if not os.path.isdir(file_folder): + self.logger_.log(self.logger_.VERBOSE, "%s is not a folder." % file_folder) + exit(-1) + + file_path =os.path.join(file_folder, self.serial_name_) + if not os.path.isfile(file_path): + self.logger_.log(self.logger_.VERBOSE, "%s not exists. " % file_path) + return None + + filename = os.path.basename(file_path) + info = filename.split('_') + self.patch_size_ = int(info[1]) + self.num_heads_ = int(info[2]) + self.layer_num_ = int(info[3]) + self.inter_size_ = int(info[4]) + self.embed_dim_ = int(info[5]) + self.max_batch_ = int(info[6]) + self.img_size_ = int(info[7]) + self.seq_len_ = int(info[8]) + self.is_fp16_ = bool(info[9]) + self.in_chans_ = 3 + with open(file_path, 'rb') as f: + runtime = trt.Runtime(self.logger_) + return runtime.deserialize_cuda_engine(f.read()) + + + + diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index 5585087cd..da20ca44e 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/CMakeLists.txt b/src/fastertransformer/CMakeLists.txt index 17f4e8e3c..9596bff4e 100644 --- a/src/fastertransformer/CMakeLists.txt +++ b/src/fastertransformer/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -22,4 +22,7 @@ endif() if(BUILD_PYT) add_subdirectory(th_op) endif() -add_subdirectory(triton_backend) \ No newline at end of file +add_subdirectory(triton_backend) +if(BUILD_TRT) + add_subdirectory(tensorrt_plugin) +endif() diff --git a/src/fastertransformer/kernels/CMakeLists.txt b/src/fastertransformer/kernels/CMakeLists.txt index 43788406f..3db08301f 100644 --- a/src/fastertransformer/kernels/CMakeLists.txt +++ b/src/fastertransformer/kernels/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -22,6 +22,14 @@ add_library(layernorm_int8_kernels STATIC layernorm_int8_kernels.cu) set_property(TARGET layernorm_int8_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET layernorm_int8_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +add_library(ban_bad_words STATIC ban_bad_words.cu) +set_property(TARGET ban_bad_words PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET ban_bad_words PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) + +add_library(stop_criteria STATIC stop_criteria_kernels.cu) +set_property(TARGET stop_criteria PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET stop_criteria PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) + add_library(activation_kernels STATIC activation_kernels.cu) set_property(TARGET activation_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET activation_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) @@ -46,10 +54,30 @@ add_library(calibrate_quantize_weight_kernels STATIC calibrate_quantize_weight_k set_property(TARGET calibrate_quantize_weight_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET calibrate_quantize_weight_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +add_library(gen_relative_pos_bias STATIC gen_relative_pos_bias.cu) +set_property(TARGET gen_relative_pos_bias PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET gen_relative_pos_bias PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) + +add_library(transform_mask_kernels STATIC transform_mask_kernels.cu) +set_property(TARGET transform_mask_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET transform_mask_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) + +add_library(reverse_roll_kernels STATIC reverse_roll_kernels.cu) +set_property(TARGET reverse_roll_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET reverse_roll_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) + +add_library(dequantize_kernels STATIC dequantize_kernels.cu) +set_property(TARGET dequantize_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET dequantize_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) + add_library(softmax_int8_kernels STATIC softmax_int8_kernels.cu) set_property(TARGET softmax_int8_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET softmax_int8_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +add_library(logprob_kernels STATIC logprob_kernels.cu) +set_property(TARGET logprob_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET logprob_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) + add_library(transpose_int8_kernels STATIC transpose_int8_kernels.cu) set_property(TARGET transpose_int8_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET transpose_int8_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) @@ -130,3 +158,11 @@ set_property(TARGET sampling_penalty_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOL add_library(matrix_vector_multiplication STATIC matrix_vector_multiplication.cu) set_property(TARGET matrix_vector_multiplication PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET matrix_vector_multiplication PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) + +add_library(custom_ar_kernels STATIC custom_ar_kernels.cu) +set_property(TARGET custom_ar_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET custom_ar_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) + +add_library(vit_kernels STATIC vit_kernels.cu) +set_property(TARGET vit_kernels PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET vit_kernels PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) diff --git a/src/fastertransformer/kernels/activation_int8_kernels.cu b/src/fastertransformer/kernels/activation_int8_kernels.cu index 225e187aa..ee595a68a 100644 --- a/src/fastertransformer/kernels/activation_int8_kernels.cu +++ b/src/fastertransformer/kernels/activation_int8_kernels.cu @@ -17,6 +17,18 @@ #include "src/fastertransformer/kernels/activation_int8_kernels.h" namespace fastertransformer { +__inline__ __device__ half fast_tanh(half x) +{ +#if defined(__CUDA_ARCH__) && (__CUDACC_VER_MAJOR__ >= 11) && (__CUDA_ARCH__ >= 750) + uint16_t raw = reinterpret_cast(x); + asm volatile("tanh.approx.f16 %0, %1;" : "=h"(raw) : "h"(raw)); + half ret = reinterpret_cast(raw); + return ret; +#else + return half(tanhf(float(x))); +#endif +} + template __inline__ __device__ T gelu(T x) { @@ -24,6 +36,15 @@ __inline__ __device__ T gelu(T x) return x * cdf; } +template<> +__inline__ __device__ half gelu(half x) +{ + half val = half(0.7978845608028654) * (x + half(0.044715) * x * x * x); + half fast_val = fast_tanh(val); + half cdf = half(0.5) * (half(1.0) + fast_val); + return x * cdf; +} + template<> __inline__ __device__ half2 gelu(half2 val) { @@ -36,227 +57,441 @@ __inline__ __device__ half2 gelu(half2 val) return __hmul2(val, __float22half2_rn(tmp)); } -//add bias to matrix of m * n, CUBLASLT_ORDER_COL32 -//grid, thread = (m), (n/4) -//using char4 as output -//for per-channel-quantization weight -__global__ -void add_bias_gelu_COL32_int32I_int8O(int8_t *out, const int32_t* input, const float* bias, const int m, const int n, - const float* weight_amax, const float *input_deQFactor_div127_ptr, const float *out_scale_ptr) +// add bias to matrix of m * n, CUBLASLT_ORDER_COL32 +// grid, thread = (m), (n/4) +// using char4 as output +// for per-channel-quantization weight +__global__ void add_bias_gelu_COL32_int32I_int8O(int8_t* out, + const int32_t* input, + const float* bias, + const int m, + const int n, + const float* weight_amax, + const float* input_deQFactor_div127_ptr, + const float* out_scale_ptr) { - const float input_deQFactor_div127 = __ldg(input_deQFactor_div127_ptr); - const float out_scale = __ldg(out_scale_ptr); - - int col_start = threadIdx.x << 2; - char4 *outTmpPtr = (char4 *)out; - char4 tmp; - int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start&31)) >> 2; - float val; - - const int4 input4 = __ldg(((const int4*)input)+outIdx); - const float4 weight4 = __ldg(((const float4*)weight_amax)+threadIdx.x); - const float4 bias4 = __ldg(((const float4*)bias)+threadIdx.x); - - val = static_cast(input4.x)*weight4.x*input_deQFactor_div127 + bias4.x; - val = gelu(val); - tmp.x = float_to_int8_rn(val*out_scale); - - val = static_cast(input4.y)*weight4.y*input_deQFactor_div127 + bias4.y; - val = gelu(val); - tmp.y = float_to_int8_rn(val*out_scale); - - col_start = col_start + 1; - val = static_cast(input4.z)*weight4.z*input_deQFactor_div127 + bias4.z; - val = gelu(val); - tmp.z = float_to_int8_rn(val*out_scale); - - col_start = col_start + 1; - val = static_cast(input4.w)*weight4.w*input_deQFactor_div127 + bias4.w; - val = gelu(val); - tmp.w = float_to_int8_rn(val*out_scale); - - outTmpPtr[outIdx] = tmp; + const float input_deQFactor_div127 = __ldg(input_deQFactor_div127_ptr); + const float out_scale = __ldg(out_scale_ptr); + + int col_start = threadIdx.x << 2; + char4* outTmpPtr = (char4*)out; + char4 tmp; + int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)) >> 2; + float val; + + const int4 input4 = __ldg(((const int4*)input) + outIdx); + const float4 weight4 = __ldg(((const float4*)weight_amax) + threadIdx.x); + const float4 bias4 = __ldg(((const float4*)bias) + threadIdx.x); + + val = static_cast(input4.x) * weight4.x * input_deQFactor_div127 + bias4.x; + val = gelu(val); + tmp.x = float_to_int8_rn(val * out_scale); + + val = static_cast(input4.y) * weight4.y * input_deQFactor_div127 + bias4.y; + val = gelu(val); + tmp.y = float_to_int8_rn(val * out_scale); + + col_start = col_start + 1; + val = static_cast(input4.z) * weight4.z * input_deQFactor_div127 + bias4.z; + val = gelu(val); + tmp.z = float_to_int8_rn(val * out_scale); + + col_start = col_start + 1; + val = static_cast(input4.w) * weight4.w * input_deQFactor_div127 + bias4.w; + val = gelu(val); + tmp.w = float_to_int8_rn(val * out_scale); + + outTmpPtr[outIdx] = tmp; } +__global__ void add_bias_gelu_COL32_int32I_int8O(char4* out, + const int4* input, + const half2* bias, + const int m, + const int n, + const float4* weight_amax, + const float* input_deQFactor_div127_ptr, + const float* out_scale_ptr) +{ + const float input_deQFactor_div127 = __ldg(input_deQFactor_div127_ptr); + const float out_scale = __ldg(out_scale_ptr); + int col_start = threadIdx.x << 2; + int threadIdx2 = threadIdx.x << 1; + char4 tmp; + int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)) >> 2; + float val; + + const int4 input4 = __ldg(input + outIdx); + const float4 weight4 = __ldg(weight_amax + threadIdx.x); + const half2 biasTmp = __ldg(bias + threadIdx2); + const half2 biasTmp2 = __ldg(bias + threadIdx2 + 1); + + val = static_cast(input4.x) * weight4.x * input_deQFactor_div127 + static_cast(biasTmp.x); + val = gelu(val); + tmp.x = float_to_int8_rn(out_scale * val); + + val = static_cast(input4.y) * weight4.y * input_deQFactor_div127 + static_cast(biasTmp.y); + val = gelu(val); + tmp.y = float_to_int8_rn(out_scale * val); -__global__ -void add_bias_gelu_COL32_int32I_int8O(char4 *out, const int4* input, const half2* bias, const int m, const int n, - const float4* weight_amax, const float *input_deQFactor_div127_ptr, const float *out_scale_ptr) + val = static_cast(input4.z) * weight4.z * input_deQFactor_div127 + static_cast(biasTmp2.x); + val = gelu(val); + tmp.z = float_to_int8_rn(out_scale * val); + + val = static_cast(input4.w) * weight4.w * input_deQFactor_div127 + static_cast(biasTmp2.y); + val = gelu(val); + tmp.w = float_to_int8_rn(out_scale * val); + + out[outIdx] = tmp; +} + +template +void invokeAddBiasGeluCol32(int8_t* out, + const int32_t* in, + const T* bias, + const int m, + const int n, + cudaStream_t stream, + const float* weight_amax, + const float* input_deQFactor_div127_ptr, + const float* out_scale_ptr) { - const float input_deQFactor_div127 = __ldg(input_deQFactor_div127_ptr); - const float out_scale = __ldg(out_scale_ptr); - int col_start = threadIdx.x << 2; - int threadIdx2 = threadIdx.x << 1; - char4 tmp; - int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start&31)) >> 2; - float val; - - const int4 input4 = __ldg(input+outIdx); - const float4 weight4 = __ldg(weight_amax+threadIdx.x); - const half2 biasTmp = __ldg(bias+threadIdx2); - const half2 biasTmp2 = __ldg(bias+threadIdx2+1); - - val = static_cast(input4.x)*weight4.x*input_deQFactor_div127 + static_cast(biasTmp.x); - val = gelu(val); - tmp.x = float_to_int8_rn(out_scale * val); - - val = static_cast(input4.y)*weight4.y*input_deQFactor_div127 + static_cast(biasTmp.y); - val = gelu(val); - tmp.y = float_to_int8_rn(out_scale * val); - - val = static_cast(input4.z)*weight4.z*input_deQFactor_div127 + static_cast(biasTmp2.x); - val = gelu(val); - tmp.z = float_to_int8_rn(out_scale * val); - - val = static_cast(input4.w)*weight4.w*input_deQFactor_div127 + static_cast(biasTmp2.y); - val = gelu(val); - tmp.w = float_to_int8_rn(out_scale * val); - - out[outIdx] = tmp; + dim3 grid(m); + dim3 block(n / 4); + assert(block.x <= 1024); + if (sizeof(T) == sizeof(half)) { + add_bias_gelu_COL32_int32I_int8O<<>>((char4*)out, + (const int4*)in, + (const half2*)bias, + m, + n, + (const float4*)weight_amax, + input_deQFactor_div127_ptr, + out_scale_ptr); + } + else { + add_bias_gelu_COL32_int32I_int8O<<>>( + out, in, (const float*)bias, m, n, weight_amax, input_deQFactor_div127_ptr, out_scale_ptr); + } } -template -void invokeAddBiasGeluCol32(int8_t *out, const int32_t* in, const T* bias, const int m, const int n, - cudaStream_t stream, const float* weight_amax, const float* input_deQFactor_div127_ptr, - const float* out_scale_ptr){ - dim3 grid(m); - dim3 block(n/4); - assert(block.x <= 1024); - if (sizeof(T) == sizeof(half)) - add_bias_gelu_COL32_int32I_int8O<<>>((char4*)out, (const int4*)in, (const half2*)bias, m, n, (const float4*)weight_amax, input_deQFactor_div127_ptr, out_scale_ptr); - else - add_bias_gelu_COL32_int32I_int8O<<>>(out, in, (const float*)bias, m, n, weight_amax, input_deQFactor_div127_ptr, out_scale_ptr); +template void invokeAddBiasGeluCol32(int8_t* out, + const int32_t* in, + const float* bias, + const int m, + const int n, + cudaStream_t stream, + const float* weight_amax, + const float* input_deQFactor_div127_ptr, + const float* out_scale_ptr); +template void invokeAddBiasGeluCol32(int8_t* out, + const int32_t* in, + const half* bias, + const int m, + const int n, + cudaStream_t stream, + const float* weight_amax, + const float* input_deQFactor_div127_ptr, + const float* out_scale_ptr); + +// add bias to matrix of m * n, CUBLASLT_ORDER_COL32 +// grid, thread = (m), (n/4) +// using char4 +// for per-tensor-quantization weight +template +__global__ void add_bias_gelu_COL32_int8IO(int8_t* out, + const int8_t* input, + const T* bias, + const int m, + const int n, + const float* input_deQFactor_ptr, + const float* out_scale_ptr) +{ + + const float input_deQFactor = __ldg(input_deQFactor_ptr); + const float out_scale = __ldg(out_scale_ptr); + + // int col_start = threadIdx.x << 2; + char4* outTmpPtr = (char4*)out; + char4* inputTmpPtr = (char4*)input; + char4 tmp; + for (int col_start = threadIdx.x << 2; col_start < n; col_start += (blockDim.x << 2)) { + int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)) >> 2; + float val; + tmp = __ldg(inputTmpPtr + outIdx); + val = static_cast(tmp.x) * input_deQFactor + static_cast(__ldg(bias + col_start)); + val = gelu(val); + tmp.x = float_to_int8_rn(val * out_scale); + + col_start = col_start + 1; + val = static_cast(tmp.y) * input_deQFactor + static_cast(__ldg(bias + col_start)); + val = gelu(val); + tmp.y = float_to_int8_rn(val * out_scale); + + col_start = col_start + 1; + val = static_cast(tmp.z) * input_deQFactor + static_cast(__ldg(bias + col_start)); + val = gelu(val); + tmp.z = float_to_int8_rn(val * out_scale); + + col_start = col_start + 1; + val = static_cast(tmp.w) * input_deQFactor + static_cast(__ldg(bias + col_start)); + val = gelu(val); + tmp.w = float_to_int8_rn(val * out_scale); + + outTmpPtr[outIdx] = tmp; + } } -template -void invokeAddBiasGeluCol32(int8_t *out, const int32_t* in, const float* bias, const int m, const int n, - cudaStream_t stream, const float* weight_amax, const float* input_deQFactor_div127_ptr, - const float* out_scale_ptr); -template -void invokeAddBiasGeluCol32(int8_t *out, const int32_t* in, const half* bias, const int m, const int n, - cudaStream_t stream, const float* weight_amax, const float* input_deQFactor_div127_ptr, - const float* out_scale_ptr); - -//add bias to matrix of m * n, CUBLASLT_ORDER_COL32 -//grid, thread = (m), (n/4) -//using char4 -//for per-tensor-quantization weight -template -__global__ -void add_bias_gelu_COL32_int8IO(int8_t *out, const int8_t* input, const T* bias, const int m, const int n, - const float *input_deQFactor_ptr, const float *out_scale_ptr) +template +void invokeAddBiasGeluCol32(int8_t* out, + const int8_t* in, + const T* bias, + const int m, + const int n, + cudaStream_t stream, + const float* input_deQFactor_ptr, + const float* out_scale_ptr) { + dim3 grid; + dim3 block; + if (n / 4 <= 1024) { + block.x = n / 4; + grid.x = m; + } + else { + block.x = 1024; + grid.x = m; + } - const float input_deQFactor = __ldg(input_deQFactor_ptr); - const float out_scale = __ldg(out_scale_ptr); - - int col_start = threadIdx.x << 2; - char4 *outTmpPtr = (char4 *)out; - char4 *inputTmpPtr = (char4*)input; - char4 tmp; - int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start&31)) >> 2; - float val; - tmp = __ldg(inputTmpPtr+outIdx); - val = static_cast(tmp.x)*input_deQFactor + static_cast(__ldg(bias+col_start)); - val = gelu(val); - tmp.x = float_to_int8_rn(val*out_scale); - - col_start = col_start + 1; - val = static_cast(tmp.y)*input_deQFactor + static_cast(__ldg(bias+col_start)); - val = gelu(val); - tmp.y = float_to_int8_rn(val*out_scale); - - col_start = col_start + 1; - val = static_cast(tmp.z)*input_deQFactor + static_cast(__ldg(bias+col_start)); - val = gelu(val); - tmp.z = float_to_int8_rn(val*out_scale); - - col_start = col_start + 1; - val = static_cast(tmp.w)*input_deQFactor + static_cast(__ldg(bias+col_start)); - val = gelu(val); - tmp.w = float_to_int8_rn(val*out_scale); - - outTmpPtr[outIdx] = tmp; + add_bias_gelu_COL32_int8IO<<>>(out, in, bias, m, n, input_deQFactor_ptr, out_scale_ptr); } -template -void invokeAddBiasGeluCol32(int8_t *out, const int8_t* in, const T* bias, const int m, const int n, - cudaStream_t stream, const float* input_deQFactor_ptr, const float* out_scale_ptr){ - dim3 grid(m); - dim3 block(n/4); - assert(block.x <= 1024); - - add_bias_gelu_COL32_int8IO<<>>(out, in, bias, m, n, input_deQFactor_ptr, out_scale_ptr); +template void invokeAddBiasGeluCol32(int8_t* out, + const int8_t* in, + const float* bias, + const int m, + const int n, + cudaStream_t stream, + const float* input_deQFactor_ptr, + const float* out_scale_ptr); + +template void invokeAddBiasGeluCol32(int8_t* out, + const int8_t* in, + const half* bias, + const int m, + const int n, + cudaStream_t stream, + const float* input_deQFactor_ptr, + const float* out_scale_ptr); + +/******************* invokeAddBiasGeluCol32_v2 ***********************/ + +// add bias to matrix of m * n, CUBLASLT_ORDER_COL32 +// grid, thread = (m), (n/4) +// using char4 +// for per-tensor-quantization weight +template +__global__ void add_bias_gelu_COL32_int8IO( + int8_t* out, const T* bias, const int m, const int n, const float* input_deQFactor_ptr, const float* out_scale_ptr) +{ + + const float input_deQFactor = __ldg(input_deQFactor_ptr); + const float out_scale = __ldg(out_scale_ptr); + + for (int col_start = threadIdx.x << 2; col_start < n; col_start += (blockDim.x << 2)) { + char4* outTmpPtr = (char4*)out; + char4 tmp; + int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)) >> 2; + float val; + tmp = __ldg(outTmpPtr + outIdx); + val = static_cast(tmp.x) * input_deQFactor + static_cast(__ldg(bias + col_start)); + val = gelu(val); + tmp.x = float_to_int8_rn(val * out_scale); + + val = static_cast(tmp.y) * input_deQFactor + static_cast(__ldg(bias + col_start + 1)); + val = gelu(val); + tmp.y = float_to_int8_rn(val * out_scale); + + val = static_cast(tmp.z) * input_deQFactor + static_cast(__ldg(bias + col_start + 2)); + val = gelu(val); + tmp.z = float_to_int8_rn(val * out_scale); + + val = static_cast(tmp.w) * input_deQFactor + static_cast(__ldg(bias + col_start + 3)); + val = gelu(val); + tmp.w = float_to_int8_rn(val * out_scale); + + outTmpPtr[outIdx] = tmp; + } +} + +// add bias to matrix of m * n, CUBLASLT_ORDER_COL32 +// grid, thread = (m), (n/4) +// using char4 +// for per-tensor-quantization weight +template<> +__global__ void add_bias_gelu_COL32_int8IO(int8_t* out, + const half* bias, + const int m, + const int n, + const float* input_deQFactor_ptr, + const float* out_scale_ptr) +{ + + const float input_deQFactor = __ldg(input_deQFactor_ptr); + const float out_scale = __ldg(out_scale_ptr); + + for (int col_start = threadIdx.x << 2; col_start < n; col_start += (blockDim.x << 2)) { + char4* outTmpPtr = (char4*)out; + char4* inputTmpPtr = (char4*)out; + char4 tmp; + int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)) >> 2; + half val; + half input_deQFactor_half = half(input_deQFactor); + half out_scale_half = half(out_scale); + tmp = __ldg(inputTmpPtr + outIdx); + + val = static_cast(tmp.x) * input_deQFactor_half + (__ldg(bias + col_start)); + val = gelu(val); + tmp.x = float_to_int8_rn(float(val * out_scale_half)); + + col_start = col_start + 1; + val = static_cast(tmp.y) * input_deQFactor_half + (__ldg(bias + col_start)); + val = gelu(val); + tmp.y = float_to_int8_rn(float(val * out_scale_half)); + + col_start = col_start + 1; + val = static_cast(tmp.z) * input_deQFactor_half + (__ldg(bias + col_start)); + val = gelu(val); + tmp.z = float_to_int8_rn(float(val * out_scale_half)); + + col_start = col_start + 1; + val = static_cast(tmp.w) * input_deQFactor_half + (__ldg(bias + col_start)); + val = gelu(val); + tmp.w = float_to_int8_rn(float(val * out_scale_half)); + + outTmpPtr[outIdx] = tmp; + } } -template -void invokeAddBiasGeluCol32(int8_t *out, const int8_t* in, const float* bias, const int m, const int n, - cudaStream_t stream, const float* input_deQFactor_ptr, const float* out_scale_ptr); - -template -void invokeAddBiasGeluCol32(int8_t *out, const int8_t* in, const half* bias, const int m, const int n, - cudaStream_t stream, const float* input_deQFactor_ptr, const float* out_scale_ptr); - - -//add bias to matrix of m * n, row major -//grid, thread = (m), (n/4) -//using char4 -//for per-tensor-quantization weight -template -__global__ -void add_bias_gelu_ROW_int8IO(int8_t *out, const int8_t* input, const T* bias, const int m, const int n, - const float *input_deQFactor_ptr, const float *out_scale_ptr) +template +void invokeAddBiasGeluCol32_v2(int8_t* out, + const T* bias, + const int m, + const int n, + cudaStream_t stream, + const float* input_deQFactor_ptr, + const float* out_scale_ptr) +{ + dim3 grid(m); + dim3 block(n / 4); + if (block.x > 1024) { + block.x = 1024; + } + + if (sizeof(T) == sizeof(half)) { + add_bias_gelu_COL32_int8IO<<>>(out, bias, m, n, input_deQFactor_ptr, out_scale_ptr); + } + else { + add_bias_gelu_COL32_int8IO<<>>(out, bias, m, n, input_deQFactor_ptr, out_scale_ptr); + } +} + +template void invokeAddBiasGeluCol32_v2(int8_t* out, + const float* bias, + const int m, + const int n, + cudaStream_t stream, + const float* input_deQFactor_ptr, + const float* out_scale_ptr); + +template void invokeAddBiasGeluCol32_v2(int8_t* out, + const half* bias, + const int m, + const int n, + cudaStream_t stream, + const float* input_deQFactor_ptr, + const float* out_scale_ptr); + +// add bias to matrix of m * n, row major +// grid, thread = (m), (n/4) +// using char4 +// for per-tensor-quantization weight +template +__global__ void add_bias_gelu_ROW_int8IO(int8_t* out, + const int8_t* input, + const T* bias, + const int m, + const int n, + const float* input_deQFactor_ptr, + const float* out_scale_ptr) { - const float input_deQFactor = __ldg(input_deQFactor_ptr); - const float out_scale = __ldg(out_scale_ptr); - - int col_start = threadIdx.x << 2; - char4 *outTmpPtr = (char4 *)out; - char4 *inputTmpPtr = (char4*)input; - char4 tmp; - int outIdx = (blockIdx.x * n + col_start) >> 2; - float val; - tmp = __ldg(inputTmpPtr+outIdx); - val = static_cast(tmp.x)*input_deQFactor + static_cast(__ldg(bias+col_start)); - val = gelu(val); - tmp.x = float_to_int8_rn(val*out_scale); - - col_start = col_start + 1; - val = static_cast(tmp.y)*input_deQFactor + static_cast(__ldg(bias+col_start)); - val = gelu(val); - tmp.y = float_to_int8_rn(val*out_scale); - - col_start = col_start + 1; - val = static_cast(tmp.z)*input_deQFactor + static_cast(__ldg(bias+col_start)); - val = gelu(val); - tmp.z = float_to_int8_rn(val*out_scale); - - col_start = col_start + 1; - val = static_cast(tmp.w)*input_deQFactor + static_cast(__ldg(bias+col_start)); - val = gelu(val); - tmp.w = float_to_int8_rn(val*out_scale); - - outTmpPtr[outIdx] = tmp; + const float input_deQFactor = __ldg(input_deQFactor_ptr); + const float out_scale = __ldg(out_scale_ptr); + + int col_start = threadIdx.x << 2; + char4* outTmpPtr = (char4*)out; + char4* inputTmpPtr = (char4*)input; + char4 tmp; + int outIdx = (blockIdx.x * n + col_start) >> 2; + float val; + tmp = __ldg(inputTmpPtr + outIdx); + val = static_cast(tmp.x) * input_deQFactor + static_cast(__ldg(bias + col_start)); + val = gelu(val); + tmp.x = float_to_int8_rn(val * out_scale); + + col_start = col_start + 1; + val = static_cast(tmp.y) * input_deQFactor + static_cast(__ldg(bias + col_start)); + val = gelu(val); + tmp.y = float_to_int8_rn(val * out_scale); + + col_start = col_start + 1; + val = static_cast(tmp.z) * input_deQFactor + static_cast(__ldg(bias + col_start)); + val = gelu(val); + tmp.z = float_to_int8_rn(val * out_scale); + + col_start = col_start + 1; + val = static_cast(tmp.w) * input_deQFactor + static_cast(__ldg(bias + col_start)); + val = gelu(val); + tmp.w = float_to_int8_rn(val * out_scale); + + outTmpPtr[outIdx] = tmp; } -template -void invokeAddBiasGeluRow(int8_t *out, const int8_t* in, const T* bias, const int m, const int n, - cudaStream_t stream, const float* input_deQFactor_ptr, const float* out_scale_ptr){ - dim3 grid(m); - dim3 block(n/4); - assert(block.x <= 1024); - - add_bias_gelu_ROW_int8IO<<>>(out, in, bias, m, n, input_deQFactor_ptr, out_scale_ptr); +template +void invokeAddBiasGeluRow(int8_t* out, + const int8_t* in, + const T* bias, + const int m, + const int n, + cudaStream_t stream, + const float* input_deQFactor_ptr, + const float* out_scale_ptr) +{ + dim3 grid(m); + dim3 block(n / 4); + assert(block.x <= 1024); + + add_bias_gelu_ROW_int8IO<<>>(out, in, bias, m, n, input_deQFactor_ptr, out_scale_ptr); } -template -void invokeAddBiasGeluRow(int8_t *out, const int8_t* in, const float* bias, const int m, const int n, - cudaStream_t stream, const float* input_deQFactor_ptr, const float* out_scale_ptr); - -template -void invokeAddBiasGeluRow(int8_t *out, const int8_t* in, const half* bias, const int m, const int n, - cudaStream_t stream, const float* input_deQFactor_ptr, const float* out_scale_ptr); +template void invokeAddBiasGeluRow(int8_t* out, + const int8_t* in, + const float* bias, + const int m, + const int n, + cudaStream_t stream, + const float* input_deQFactor_ptr, + const float* out_scale_ptr); + +template void invokeAddBiasGeluRow(int8_t* out, + const int8_t* in, + const half* bias, + const int m, + const int n, + cudaStream_t stream, + const float* input_deQFactor_ptr, + const float* out_scale_ptr); } // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/activation_int8_kernels.h b/src/fastertransformer/kernels/activation_int8_kernels.h index 076f63488..ce285b3ad 100644 --- a/src/fastertransformer/kernels/activation_int8_kernels.h +++ b/src/fastertransformer/kernels/activation_int8_kernels.h @@ -16,24 +16,51 @@ #pragma once -#include -#include #include "int8_utils.cuh" #include +#include +#include namespace fastertransformer { -template -void invokeAddBiasGeluCol32(int8_t *out, const int32_t* in, const T* bias, const int m, const int n, - cudaStream_t stream, const float* weight_amax, const float* input_deQFactor_div127_ptr, +template +void invokeAddBiasGeluCol32(int8_t* out, + const int32_t* in, + const T* bias, + const int m, + const int n, + cudaStream_t stream, + const float* weight_amax, + const float* input_deQFactor_div127_ptr, + const float* out_scale_ptr); + +template +void invokeAddBiasGeluCol32(int8_t* out, + const int8_t* in, + const T* bias, + const int m, + const int n, + cudaStream_t stream, + const float* input_deQFactor_ptr, const float* out_scale_ptr); -template -void invokeAddBiasGeluCol32(int8_t *out, const int8_t* in, const T* bias, const int m, const int n, - cudaStream_t stream, const float* input_deQFactor_ptr, const float* out_scale_ptr); +template +void invokeAddBiasGeluCol32_v2(int8_t* out, + const T* bias, + const int m, + const int n, + cudaStream_t stream, + const float* input_deQFactor_ptr, + const float* out_scale_ptr); -template -void invokeAddBiasGeluRow(int8_t *out, const int8_t* in, const T* bias, const int m, const int n, - cudaStream_t stream, const float* input_deQFactor_ptr, const float* out_scale_ptr); +template +void invokeAddBiasGeluRow(int8_t* out, + const int8_t* in, + const T* bias, + const int m, + const int n, + cudaStream_t stream, + const float* input_deQFactor_ptr, + const float* out_scale_ptr); } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/activation_kernels.cu b/src/fastertransformer/kernels/activation_kernels.cu index d23173725..7ff8e0fa5 100644 --- a/src/fastertransformer/kernels/activation_kernels.cu +++ b/src/fastertransformer/kernels/activation_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -15,6 +15,8 @@ */ #include "src/fastertransformer/kernels/activation_kernels.h" +#include "src/fastertransformer/kernels/bfloat16_fallback_kenrels.cuh" +#include "src/fastertransformer/utils/cuda_utils.h" namespace fastertransformer { template @@ -36,6 +38,20 @@ __inline__ __device__ half2 gelu(half2 val) return __hmul2(val, __float22half2_rn(tmp)); } +#ifdef ENABLE_BF16 +template<> +__inline__ __device__ __nv_bfloat162 gelu(__nv_bfloat162 val) +{ + __nv_bfloat162 val_pow3 = bf16hmul2(val, bf16hmul2(val, val)); + float2 tmp_pow = bf1622float2(val_pow3); + float2 tmp = bf1622float2(val); + + tmp.x = 0.5f * (1.0f + tanhf((0.7978845608028654f * (tmp.x + 0.044715f * tmp_pow.x)))); + tmp.y = 0.5f * (1.0f + tanhf((0.7978845608028654f * (tmp.y + 0.044715f * tmp_pow.y)))); + return bf16hmul2(val, __floats2bfloat162_rn(tmp.x, tmp.y)); +} +#endif + template __global__ void addBiasGelu(T* out, const T* __restrict bias, int m, int n) { @@ -65,10 +81,28 @@ __global__ void addBiasGelu(half* out, const half* __restrict bias, int m, int n } } +#ifdef ENABLE_BF16 +template<> +__global__ void addBiasGelu(__nv_bfloat16* out, const __nv_bfloat16* __restrict bias, int m, int n) +{ + __nv_bfloat162* out_ptr = (__nv_bfloat162*)out; + const __nv_bfloat162* bias_ptr = (__nv_bfloat162*)bias; + + for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < m * n; id += blockDim.x * gridDim.x) { + __nv_bfloat162 val = out_ptr[id]; + if (bias != nullptr) { + __nv_bfloat162 reg_bias = ldg(&bias_ptr[id % n]); + val = bf16hadd2(val, reg_bias); + } + out_ptr[id] = gelu(val); + } +} +#endif + template void invokeAddBiasGelu(T* out, const T* bias, const int m, const int n, cudaStream_t stream) { - const int data_type_factor = 4 / sizeof(T); // 1 for fp32, 2 for fp16 + const int data_type_factor = 4 / sizeof(T); // 1 for fp32, 2 for fp16 and bf16 dim3 block, grid; if (n / 4 / data_type_factor <= 1024) { block.x = n / 4 / data_type_factor; @@ -83,6 +117,10 @@ void invokeAddBiasGelu(T* out, const T* bias, const int m, const int n, cudaStre template void invokeAddBiasGelu(float* out, const float* bias, const int m, const int n, cudaStream_t stream); template void invokeAddBiasGelu(half* out, const half* bias, const int m, const int n, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void +invokeAddBiasGelu(__nv_bfloat16* out, const __nv_bfloat16* bias, const int m, const int n, cudaStream_t stream); +#endif template __global__ void add_bias_relu(T* out, const T* __restrict bias, int m, int n) @@ -90,9 +128,9 @@ __global__ void add_bias_relu(T* out, const T* __restrict bias, int m, int n) for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < m * n; id += blockDim.x * gridDim.x) { T val = out[id]; if (bias != nullptr) { - val = val + __ldg(&bias[id % n]); + val = val + ldg(&bias[id % n]); } - out[id] = (T)(val > 0.0f ? val : 0.0f); + out[id] = val > (T)0.0f ? val : (T)0.0f; } } @@ -113,10 +151,29 @@ __global__ void add_bias_relu(half* out, const half* __restrict bias, int m, int } } +#ifdef ENABLE_BF16 +template<> +__global__ void add_bias_relu(__nv_bfloat16* out, const __nv_bfloat16* __restrict bias, int m, int n) +{ + __nv_bfloat162* out_ptr = (__nv_bfloat162*)out; + const __nv_bfloat162* bias_ptr = (__nv_bfloat162*)bias; + + for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < m * n; id += blockDim.x * gridDim.x) { + __nv_bfloat162 val = out_ptr[id]; + if (bias != nullptr) { + val = bf16hadd2(val, ldg(&bias_ptr[id % n])); + } + val.x = val.x > (__nv_bfloat16)0.0f ? val.x : (__nv_bfloat16)0.0f; + val.y = val.y > (__nv_bfloat16)0.0f ? val.y : (__nv_bfloat16)0.0f; + out_ptr[id] = val; + } +} +#endif + template void invokeAddBiasRelu(T* out, const T* bias, const int m, const int n, cudaStream_t stream) { - const int data_type_factor = 4 / sizeof(T); // 1 for fp32, 2 for fp16 + const int data_type_factor = 4 / sizeof(T); // 1 for fp32, 2 for fp16 and bf16 dim3 block, grid; if (n / 4 / data_type_factor <= 1024) { block.x = n / 4 / data_type_factor; @@ -131,19 +188,45 @@ void invokeAddBiasRelu(T* out, const T* bias, const int m, const int n, cudaStre template void invokeAddBiasRelu(float* out, const float* bias, const int m, const int n, cudaStream_t stream); template void invokeAddBiasRelu(half* out, const half* bias, const int m, const int n, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void +invokeAddBiasRelu(__nv_bfloat16* out, const __nv_bfloat16* bias, const int m, const int n, cudaStream_t stream); +#endif template __global__ void add_bias(H_T* out, const B_T* __restrict bias, int m, int n) { for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < m * n; id += blockDim.x * gridDim.x) { - out[id] = out[id] + (H_T) __ldg(&bias[id % n]); + out[id] = out[id] + (H_T)ldg(&bias[id % n]); } } +template<> +__global__ void add_bias(half* out, const half* __restrict bias, int m, int n) +{ + half2* out_ptr = (half2*)out; + const half2* bias_ptr = (half2*)bias; + for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < m * n; id += blockDim.x * gridDim.x) { + out_ptr[id] = out_ptr[id] + __ldg(&bias_ptr[id % n]); + } +} + +#ifdef ENABLE_BF16 +template<> +__global__ void add_bias(__nv_bfloat16* out, const __nv_bfloat16* __restrict bias, int m, int n) +{ + __nv_bfloat162* out_ptr = (__nv_bfloat162*)out; + const __nv_bfloat162* bias_ptr = (__nv_bfloat162*)bias; + for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < m * n; id += blockDim.x * gridDim.x) { + out_ptr[id] = bf16hadd2(out_ptr[id], ldg(&bias_ptr[id % n])); + } +} +#endif + template void invokeAddBias(H_T* out, const B_T* bias, const int m, const int n, cudaStream_t stream) { - const int data_type_factor = 4 / sizeof(H_T); // 1 for fp32, 2 for fp16 + const int data_type_factor = 4 / sizeof(H_T); // 1 for fp32, 2 for fp16 and bf16 dim3 block, grid; if (n / 4 / data_type_factor <= 1024) { block.x = n / 4 / data_type_factor; @@ -159,4 +242,10 @@ void invokeAddBias(H_T* out, const B_T* bias, const int m, const int n, cudaStre template void invokeAddBias(float* out, const float* bias, const int m, const int n, cudaStream_t stream); template void invokeAddBias(half* out, const half* bias, const int m, const int n, cudaStream_t stream); template void invokeAddBias(float* out, const half* bias, const int m, const int n, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void +invokeAddBias(__nv_bfloat16* out, const __nv_bfloat16* bias, const int m, const int n, cudaStream_t stream); +template void invokeAddBias(float* out, const __nv_bfloat16* bias, const int m, const int n, cudaStream_t stream); +#endif + } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/activation_kernels.h b/src/fastertransformer/kernels/activation_kernels.h index 8f2a9a682..6600457ef 100644 --- a/src/fastertransformer/kernels/activation_kernels.h +++ b/src/fastertransformer/kernels/activation_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,6 +16,7 @@ #pragma once +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" #include #include diff --git a/src/fastertransformer/kernels/add_bias_transpose_kernels.cu b/src/fastertransformer/kernels/add_bias_transpose_kernels.cu index 2c1556e74..952bcb863 100644 --- a/src/fastertransformer/kernels/add_bias_transpose_kernels.cu +++ b/src/fastertransformer/kernels/add_bias_transpose_kernels.cu @@ -52,11 +52,9 @@ __global__ void addBiasTransposeToMultiHead(const T* matrices, int head_id = y_offset / size_per_head; int head_y_offset = y_offset % size_per_head; - int output_offset = matrix_id * batch_size * head_num * seq_len * size_per_head + - batch_id * head_num * seq_len * size_per_head + - head_id * seq_len * size_per_head + - seq_id * size_per_head + - head_y_offset; + int output_offset = matrix_id * batch_size * head_num * seq_len * size_per_head + + batch_id * head_num * seq_len * size_per_head + head_id * seq_len * size_per_head + + seq_id * size_per_head + head_y_offset; output[output_offset] = matrices[x_offset * head_num * size_per_head + y_offset] + bias_element; } diff --git a/src/fastertransformer/kernels/add_bias_transpose_kernels.h b/src/fastertransformer/kernels/add_bias_transpose_kernels.h index 2ee3aebc1..d2cc10f12 100644 --- a/src/fastertransformer/kernels/add_bias_transpose_kernels.h +++ b/src/fastertransformer/kernels/add_bias_transpose_kernels.h @@ -16,12 +16,23 @@ namespace fastertransformer { -template -void invokeAddBiasTransposeToMultiHead(const T* matrices, const T* biases, T* output, - const int batch_size, const int head_num, const int size_per_head, - const int seq_len, const int matrices_num, const cudaStream_t stream); +template +void invokeAddBiasTransposeToMultiHead(const T* matrices, + const T* biases, + T* output, + const int batch_size, + const int head_num, + const int size_per_head, + const int seq_len, + const int matrices_num, + const cudaStream_t stream); -template -void invokeTransposeMultiHeadToSingle(T* dst, T* src, const int batch_size, const int seq_len, - const int head_num, const int size_per_head, cudaStream_t stream); +template +void invokeTransposeMultiHeadToSingle(T* dst, + T* src, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + cudaStream_t stream); } // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/add_residual_kernels.cu b/src/fastertransformer/kernels/add_residual_kernels.cu index 8d245a44f..4cd9f0fbb 100644 --- a/src/fastertransformer/kernels/add_residual_kernels.cu +++ b/src/fastertransformer/kernels/add_residual_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -39,88 +39,87 @@ void invokeAddBiasResidual(T* output, const T* input, const T* bias, const int m } template -__global__ void addBiasAttentionFfnResidual( - T* block_output, - const T* ffn_output, - const T* attn_output, - const T* block_input, - const T* bias, - const int m, const int n) +__global__ void addBiasAttentionFfnResidual(T* block_output, + const T* ffn_output, + const T* attn_output, + const T* block_input, + const T* bias, + const int m, + const int n) { const int col_index = blockIdx.y * blockDim.x + threadIdx.x; if (col_index < n) { - block_output[blockIdx.x * n + col_index] = - ffn_output[blockIdx.x * n + col_index] + - attn_output[blockIdx.x * n + col_index] + - block_input[blockIdx.x * n + col_index] + - bias[col_index]; + block_output[blockIdx.x * n + col_index] = ffn_output[blockIdx.x * n + col_index] + + attn_output[blockIdx.x * n + col_index] + + block_input[blockIdx.x * n + col_index] + bias[col_index]; } } - template __global__ void addBiasAttentionFfnResidual( - T* block_output, - const T* ffn_output, - const T* attn_output, - const T* bias, - const int m, const int n) + T* block_output, const T* ffn_output, const T* attn_output, const T* bias, const int m, const int n) { const int col_index = blockIdx.y * blockDim.x + threadIdx.x; if (col_index < n) { block_output[blockIdx.x * n + col_index] += - ffn_output[blockIdx.x * n + col_index] + - attn_output[blockIdx.x * n + col_index] + - bias[col_index]; + ffn_output[blockIdx.x * n + col_index] + attn_output[blockIdx.x * n + col_index] + bias[col_index]; } } template -void invokeAddBiasAttentionFfnResidual( - T* block_output, - const T* ffn_output, - const T* attn_output, - const T* block_input, - const T* bias, - const int m, - const int n, - cudaStream_t stream -) +void invokeAddBiasAttentionFfnResidual(T* block_output, + const T* ffn_output, + const T* attn_output, + const T* block_input, + const T* bias, + const int m, + const int n, + cudaStream_t stream) { int blocks_per_row = ceil(float(n) / 1024); dim3 grid(m, blocks_per_row); dim3 block(min(n, 1024)); if (block_output == block_input) { + addBiasAttentionFfnResidual<<>>(block_output, ffn_output, attn_output, bias, m, n); + } + else { addBiasAttentionFfnResidual<<>>( - block_output, - ffn_output, - attn_output, - bias, - m, n - ); - } else { - addBiasAttentionFfnResidual<<>>( - block_output, - ffn_output, - attn_output, - block_input, - bias, - m, n - ); + block_output, ffn_output, attn_output, block_input, bias, m, n); } } template void invokeAddBiasResidual( float* output, const float* input, const float* bias, const int m, const int n, cudaStream_t stream); -template void invokeAddBiasResidual( - half* output, const half* input, const half* bias, const int m, const int n, cudaStream_t stream); +template void +invokeAddBiasResidual(half* output, const half* input, const half* bias, const int m, const int n, cudaStream_t stream); -template void invokeAddBiasAttentionFfnResidual( - float* block_output, const float* ffn_output, const float* attn_output, const float* input, const float* bias, const int m, const int n, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void invokeAddBiasResidual(__nv_bfloat16* output, + const __nv_bfloat16* input, + const __nv_bfloat16* bias, + const int m, + const int n, + cudaStream_t stream); +#endif -template void invokeAddBiasAttentionFfnResidual( - half* block_output, const half* ffn_output, const half* attn_output, const half* input, const half* bias, const int m, const int n, cudaStream_t stream); +template void invokeAddBiasAttentionFfnResidual(float* block_output, + const float* ffn_output, + const float* attn_output, + const float* input, + const float* bias, + const int m, + const int n, + cudaStream_t stream); + +template void invokeAddBiasAttentionFfnResidual(half* block_output, + const half* ffn_output, + const half* attn_output, + const half* input, + const half* bias, + const int m, + const int n, + cudaStream_t stream); template __global__ void T5addResidual(T* output, const T* input, const int m, const int n) @@ -128,8 +127,10 @@ __global__ void T5addResidual(T* output, const T* input, const int m, const int const int col_index = blockIdx.y * blockDim.x + threadIdx.x; if (col_index < n) { float out_val = (float)output[blockIdx.x * n + col_index] + (float)input[blockIdx.x * n + col_index]; - output[blockIdx.x * n + col_index] = (T)((std::is_same::value && (out_val > 64512 || out_val < -64512)) ? - (out_val > 0 ? 64512 : -64512) : out_val); + output[blockIdx.x * n + col_index] = + (T)((std::is_same::value && (out_val > 64512 || out_val < -64512)) ? + (out_val > 0 ? 64512 : -64512) : + out_val); } } @@ -145,4 +146,270 @@ void invokeT5AddResidual(T* output, const T* input, const int m, const int n, cu template void invokeT5AddResidual(float* output, const float* input, const int m, const int n, cudaStream_t stream); template void invokeT5AddResidual(half* output, const half* input, const int m, const int n, cudaStream_t stream); +template +void invokeT5AddBiasResidual(T* output, const T* input, const T* bias, const int m, const int n, cudaStream_t stream) +{ + if (bias != nullptr) { + invokeAddBiasResidual(output, input, bias, m, n, stream); + } + else { + invokeT5AddResidual(output, input, m, n, stream); + } + return; +} + +template void invokeT5AddBiasResidual( + float* output, const float* input, const float* bias, const int m, const int n, cudaStream_t stream); +template void invokeT5AddBiasResidual( + half* output, const half* input, const half* bias, const int m, const int n, cudaStream_t stream); +/******************* invokeAddBiasResidualCol32 ***********************/ +// input1/input2/out matrix with layout of cublasLt CUBLASLT_ORDER_COL32 (m*n) +//(grid, block) must be (m, n/4) +// using char4 +template +__global__ void add_bias_input_COL32_int8I_DataTypeO( + T* output, const int8_t* input1, const T* input2, const T* bias, int m, int n, const float* input1_deQFactor_ptr) +{ + const float input1_deQFactor = __ldg(input1_deQFactor_ptr); + int col_start = threadIdx.x << 2; + + float local_out[4]; + int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)) >> 2; + char4* input1TmpPtr = (char4*)input1; + char4 input1Tmp = __ldg(input1TmpPtr + outIdx); + + int col_start_tmp = col_start; + local_out[0] = static_cast(input2[(outIdx << 2) + 0]) + static_cast(input1Tmp.x) * input1_deQFactor + + static_cast(__ldg(bias + col_start_tmp)); + col_start_tmp = col_start_tmp + 1; + local_out[1] = static_cast(input2[(outIdx << 2) + 1]) + static_cast(input1Tmp.y) * input1_deQFactor + + static_cast(__ldg(bias + col_start_tmp)); + col_start_tmp = col_start_tmp + 1; + local_out[2] = static_cast(input2[(outIdx << 2) + 2]) + static_cast(input1Tmp.z) * input1_deQFactor + + static_cast(__ldg(bias + col_start_tmp)); + col_start_tmp = col_start_tmp + 1; + local_out[3] = static_cast(input2[(outIdx << 2) + 3]) + static_cast(input1Tmp.w) * input1_deQFactor + + static_cast(__ldg(bias + col_start_tmp)); + + for (int i = 0; i < 4; i++) { + output[(outIdx << 2) + i] = static_cast(local_out[i]); + } +} + +template<> +__global__ void add_bias_input_COL32_int8I_DataTypeO(half4* output, + const int8_t* input1, + const half4* input2, + const half4* bias, + int m, + int n, + const float* input1_deQFactor_ptr) +{ + const float input1_deQFactor = __ldg(input1_deQFactor_ptr); + int col_start = (blockIdx.x << 5) + (threadIdx.x << 2); + int row_start = (blockIdx.y << 5) + (threadIdx.y); + + if (col_start < n && row_start < m) { + half4 local_out; + int outIdx = ((col_start & 0xffffffe0) * m + (row_start << 5) + (col_start & 31)) >> 2; + char4* input1TmpPtr = (char4*)input1; + char4 input1Tmp = input1TmpPtr[outIdx]; + half4 input2Tmp = input2[outIdx]; + half4 biasTmp = bias[col_start >> 2]; + + local_out.x = static_cast((float)input1Tmp.x * input1_deQFactor + (float)biasTmp.x + (float)input2Tmp.x); + local_out.y = static_cast((float)input1Tmp.y * input1_deQFactor + (float)biasTmp.y + (float)input2Tmp.y); + local_out.z = static_cast((float)input1Tmp.z * input1_deQFactor + (float)biasTmp.z + (float)input2Tmp.z); + local_out.w = static_cast((float)input1Tmp.w * input1_deQFactor + (float)biasTmp.w + (float)input2Tmp.w); + output[outIdx] = local_out; + } +} + +template +void invokeAddBiasResidualCol32(T* output, + const int8_t* input1, + const T* input2, + const T* bias, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr) +{ + dim3 grid((n + 31) / 32, (m + 31) / 32); + dim3 block(8, 32); + assert(block.x <= 1024); + if (sizeof(T) == 2) { + add_bias_input_COL32_int8I_DataTypeO<<>>( + (half4*)output, input1, (const half4*)input2, (const half4*)bias, m, n, input1_deQFactor_ptr); + } + else { + add_bias_input_COL32_int8I_DataTypeO + <<>>(output, input1, input2, bias, m, n, input1_deQFactor_ptr); + } +} + +template void invokeAddBiasResidualCol32(float* output, + const int8_t* input1, + const float* input2, + const float* bias, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr); + +template void invokeAddBiasResidualCol32(half* output, + const int8_t* input1, + const half* input2, + const half* bias, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr); + +/******************* invokeAddBiasResidualCol32 ***********************/ +// input1/input2/out matrix with layout of cublasLt CUBLASLT_ORDER_COL32 (m*n) +//(grid, block) must be (m, n/4) +// using char4 +template +__global__ void add_bias_input_COL32_int32I_DataTypeO(T* output, + const int32_t* input1, + const T* input2, + const T* bias, + int m, + int n, + const float* weight_amax, + const float* input1_amax_ptr, + const int scale_is_vector) +{ + int col_start = threadIdx.x << 2; + const float4* weight_scale_ptr = (const float4*)weight_amax; + const float4 weight_scale = __ldg(weight_scale_ptr + threadIdx.x * scale_is_vector); + const float input1_deQ = __ldg(input1_amax_ptr) / 127.0f; + + float local_out[4]; + int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)) >> 2; + int4* input1TmpPtr = (int4*)input1; + int4 input1Tmp = input1TmpPtr[outIdx]; + + int col_start_tmp = col_start; + local_out[0] = static_cast(input2[(outIdx << 2) + 0]) + + static_cast(input1Tmp.x) * input1_deQ * weight_scale.x / 127.0f + + static_cast(__ldg(bias + col_start_tmp)); + col_start_tmp = col_start_tmp + 1; + local_out[1] = static_cast(input2[(outIdx << 2) + 1]) + + static_cast(input1Tmp.y) * input1_deQ * weight_scale.y / 127.0f + + static_cast(__ldg(bias + col_start_tmp)); + col_start_tmp = col_start_tmp + 1; + local_out[2] = static_cast(input2[(outIdx << 2) + 2]) + + static_cast(input1Tmp.z) * input1_deQ * weight_scale.z / 127.0f + + static_cast(__ldg(bias + col_start_tmp)); + col_start_tmp = col_start_tmp + 1; + local_out[3] = static_cast(input2[(outIdx << 2) + 3]) + + static_cast(input1Tmp.w) * input1_deQ * weight_scale.w / 127.0f + + static_cast(__ldg(bias + col_start_tmp)); + + for (int i = 0; i < 4; i++) { + output[(outIdx << 2) + i] = static_cast(local_out[i]); + } +} + +template<> +__global__ void add_bias_input_COL32_int32I_DataTypeO(half4* output, + const int32_t* input1, + const half4* input2, + const half4* bias, + int m, + int n, + const float* weight_amax, + const float* input1_amax_ptr, + const int scale_is_vector) +{ + int col_start = threadIdx.x << 2; + const float4* weight_scale_ptr = (const float4*)weight_amax; + const float4 weight_scale = __ldg(weight_scale_ptr + threadIdx.x * scale_is_vector); + const float input1_deQ = __ldg(input1_amax_ptr) / 127.0f; + + float local_out[4]; + int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)) >> 2; + int4* input1TmpPtr = (int4*)input1; + int4 input1Tmp = input1TmpPtr[outIdx]; + half4 input2Tmp = input2[outIdx]; + half4 biasTmp = bias[threadIdx.x]; + + local_out[0] = static_cast(input2Tmp.x) + + static_cast(input1Tmp.x) * input1_deQ * weight_scale.x / 127.0f + + static_cast(biasTmp.x); + local_out[1] = static_cast(input2Tmp.y) + + static_cast(input1Tmp.y) * input1_deQ * weight_scale.y / 127.0f + + static_cast(biasTmp.y); + local_out[2] = static_cast(input2Tmp.z) + + static_cast(input1Tmp.z) * input1_deQ * weight_scale.z / 127.0f + + static_cast(biasTmp.z); + local_out[3] = static_cast(input2Tmp.w) + + static_cast(input1Tmp.w) * input1_deQ * weight_scale.w / 127.0f + + static_cast(biasTmp.w); + + half4 outTmp; + outTmp.x = static_cast(local_out[0]); + outTmp.y = static_cast(local_out[1]); + outTmp.z = static_cast(local_out[2]); + outTmp.w = static_cast(local_out[3]); + + output[outIdx] = outTmp; +} + +template +void invokeAddBiasResidualCol32(T* output, + const int32_t* input1, + const T* input2, + const T* bias, + int m, + int n, + cudaStream_t stream, + const float* weight_amax, + const float* input1_amax_ptr, + const int scale_is_vector) +{ + dim3 grid(m); + dim3 block(n / 4); + assert(block.x <= 1024); + if (sizeof(T) == 2) { + add_bias_input_COL32_int32I_DataTypeO<<>>((half4*)output, + input1, + (const half4*)input2, + (const half4*)bias, + m, + n, + weight_amax, + input1_amax_ptr, + scale_is_vector); + } + else { + add_bias_input_COL32_int32I_DataTypeO<<>>( + output, input1, input2, bias, m, n, weight_amax, input1_amax_ptr, scale_is_vector); + } +} + +template void invokeAddBiasResidualCol32(float* output, + const int* input1, + const float* input2, + const float* bias, + int m, + int n, + cudaStream_t stream, + const float* weight_amax, + const float* input1_amax_ptr, + const int scale_is_vector); + +template void invokeAddBiasResidualCol32(half* output, + const int* input1, + const half* input2, + const half* bias, + int m, + int n, + cudaStream_t stream, + const float* weight_amax, + const float* input1_amax_ptr, + const int scale_is_vector); + } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/add_residual_kernels.h b/src/fastertransformer/kernels/add_residual_kernels.h index e9d7bb1e0..edd8179b1 100644 --- a/src/fastertransformer/kernels/add_residual_kernels.h +++ b/src/fastertransformer/kernels/add_residual_kernels.h @@ -16,8 +16,11 @@ #pragma once +#include "src/fastertransformer/utils/cuda_utils.h" +#include #include #include +#include namespace fastertransformer { @@ -27,6 +30,9 @@ void invokeAddBiasResidual(T* output, const T* input, const T* bias, const int m template void invokeT5AddResidual(T* output, const T* input, const int m, const int n, cudaStream_t stream); +template +void invokeT5AddBiasResidual(T* output, const T* input, const T* bias, const int m, const int n, cudaStream_t stream); + template void invokeAddBiasAttentionFfnResidual(T* block_output, const T* ffn_output, @@ -37,4 +43,26 @@ void invokeAddBiasAttentionFfnResidual(T* block_output, const int n, cudaStream_t stream); +template +void invokeAddBiasResidualCol32(T* output, + const int8_t* input1, + const T* input2, + const T* bias, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr); + +template +void invokeAddBiasResidualCol32(T* output, + const int32_t* input1, + const T* input2, + const T* bias, + int m, + int n, + cudaStream_t stream, + const float* weight_amax, + const float* input1_amax_ptr, + const int scale_is_vector = 0); + } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/ban_bad_words.cu b/src/fastertransformer/kernels/ban_bad_words.cu new file mode 100644 index 000000000..b52031081 --- /dev/null +++ b/src/fastertransformer/kernels/ban_bad_words.cu @@ -0,0 +1,149 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/ban_bad_words.h" +#include "src/fastertransformer/utils/cuda_utils.h" + +namespace fastertransformer { + +template +__global__ void ban_bad_words(T* logits, + const int* output_ids_buf, + const int* parent_ids_buf, + int batch_size, + int beam_width, + const int* bad_words, + size_t bad_words_len, + bool share_words, + int id_offset, + int vocab_size_padded, + size_t step) +{ + const int id = blockIdx.x * blockDim.x + threadIdx.x; + const int batch_idx = blockIdx.y / beam_width; + const int beam_idx = blockIdx.y % beam_width; + + const int* base_bad_words = share_words ? bad_words : bad_words + batch_idx * 2 * bad_words_len; + const int* base_bad_words_offsets = base_bad_words + bad_words_len; + + if (id >= bad_words_len || base_bad_words_offsets[id] < 0) { + return; + } + + const int item_end = base_bad_words_offsets[id]; + const int item_start = (id > 0) ? base_bad_words_offsets[id - 1] : 0; + const int item_size = item_end - item_start; + + /* The single-token case unconditionally bans the token */ + bool should_ban = item_size == 1; + + /* Multi-token case and enough previously generated tokens to look for a match */ + if (item_size > 1 && step >= item_size - 1) { + should_ban = true; + int parent_id = beam_idx; + const bool gather_beam = beam_width > 1; + + for (int token_idx = item_size - 2; token_idx >= 0; token_idx--) { + const int previous_token = output_ids_buf[(step - (item_size - 1) + token_idx) * batch_size * beam_width + + id_offset + batch_idx * beam_width + parent_id]; + + if (previous_token != base_bad_words[item_start + token_idx]) { + should_ban = false; + break; + } + if (gather_beam) { + parent_id = parent_ids_buf[(step - (item_size - 1) + token_idx) * beam_width * batch_size + id_offset + + batch_idx * beam_width + parent_id]; + + if (parent_id < 0 || parent_id >= beam_width) { + should_ban = false; + break; + } + } + } + } + + if (should_ban) { + int banned_token = base_bad_words[item_end - 1]; + if (0 < banned_token && banned_token < vocab_size_padded) { + logits[batch_idx * beam_width * vocab_size_padded + beam_idx * vocab_size_padded + banned_token] = + static_cast(-INFINITY); + } + } +} + +template +void invokeBanBadWords(T* logits, + const int* output_ids_buf, + const int* parent_ids_buf, + int batch_size, + int local_batch_size, + int beam_width, + const int* bad_words, + bool share_words, + size_t bad_words_len, + int id_offset, + int vocab_size_padded, + size_t step, + cudaStream_t stream) +{ + dim3 block, grid; + block.x = min(((bad_words_len + 32 - 1) / 32) * 32, 256UL); + grid.x = (bad_words_len + block.x - 1) / block.x; + grid.y = local_batch_size * beam_width; + + ban_bad_words<<>>(logits, + output_ids_buf, + parent_ids_buf, + batch_size, + beam_width, + bad_words, + bad_words_len, + share_words, + id_offset, + vocab_size_padded, + step); + sync_check_cuda_error(); +} + +template void invokeBanBadWords(half* logits, + const int* output_ids_buf, + const int* parent_ids_buf, + int batch_size, + int local_batch_size, + int beam_width, + const int* bad_words, + bool share_words, + size_t bad_words_len, + int id_offset, + int vocab_size_padded, + size_t step, + cudaStream_t stream); +template void invokeBanBadWords(float* logits, + const int* output_ids_buf, + const int* parent_ids_buf, + int batch_size, + int local_batch_size, + int beam_width, + const int* bad_words, + bool share_words, + size_t bad_words_len, + int id_offset, + int vocab_size_padded, + size_t step, + cudaStream_t stream); + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/ban_bad_words.h b/src/fastertransformer/kernels/ban_bad_words.h new file mode 100644 index 000000000..1cafe793c --- /dev/null +++ b/src/fastertransformer/kernels/ban_bad_words.h @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include +#include + +namespace fastertransformer { + +template +void invokeBanBadWords(T* logits, + const int* output_ids_buf, + const int* parent_ids_buf, + int batch_size, + int local_batch_size, + int beam_width, + const int* bad_words, + bool share_words, + size_t bad_words_len, + int id_offset, + int vocab_size_padded, + size_t step, + cudaStream_t stream); + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/beam_search_penalty_kernels.cu b/src/fastertransformer/kernels/beam_search_penalty_kernels.cu index 5045174ec..8cd5c7a17 100644 --- a/src/fastertransformer/kernels/beam_search_penalty_kernels.cu +++ b/src/fastertransformer/kernels/beam_search_penalty_kernels.cu @@ -33,7 +33,7 @@ __global__ void add_bias_apply_logit_penalties_kernel(int step, const int ite, const int max_input_length, const int batch_size, - int end_id, + const int* end_ids, float inv_temp, float len_penalty, float repeat_penalty) @@ -62,6 +62,7 @@ __global__ void add_bias_apply_logit_penalties_kernel(int step, if (tid == 0 && bid == 0) { // TODO(bhsueh) apply repetition penalty (this can apply the penalty multiple times to a repeated word). int prev_id = current_ids[bbid]; + const int end_id = end_ids[batch_id]; if (logits[prev_id + vocab_size_padded_offset] > T(0)) { logits[prev_id + vocab_size_padded_offset] = float(logits[prev_id + vocab_size_padded_offset]) / repeat_penalty; @@ -108,7 +109,7 @@ void invokeAddBiasApplyPenalties(int step, const int beam_width, const int vocab_size, const int vocab_size_padded, - const int end_id, + const int* end_ids, const float temperature, const float len_penalty, const float repeat_penalty, @@ -129,7 +130,7 @@ void invokeAddBiasApplyPenalties(int step, ite, max_input_length, batch_size, - end_id, + end_ids, 1.f / temperature, len_penalty, repeat_penalty); @@ -150,7 +151,7 @@ template void invokeAddBiasApplyPenalties(int step, const int beam_width, const int vocab_size, const int vocab_size_padded, - const int end_id, + const int* end_ids, const float temerature, const float len_penalty, const float repeat_penalty, @@ -170,7 +171,7 @@ template void invokeAddBiasApplyPenalties(int step, const int beam_width, const int vocab_size, const int vocab_size_padded, - const int end_id, + const int* end_ids, const float temerature, const float len_penalty, const float repeat_penalty, diff --git a/src/fastertransformer/kernels/beam_search_penalty_kernels.h b/src/fastertransformer/kernels/beam_search_penalty_kernels.h index 21e48e165..462a90b03 100644 --- a/src/fastertransformer/kernels/beam_search_penalty_kernels.h +++ b/src/fastertransformer/kernels/beam_search_penalty_kernels.h @@ -36,7 +36,7 @@ void invokeAddBiasApplyPenalties(int step, const int beam_width, const int vocab_size, const int vocab_size_padded, - const int end_id, + const int* end_ids, const float temerature, const float len_penalty, const float repeat_penalty, diff --git a/src/fastertransformer/kernels/beam_search_topk_kernels.cu b/src/fastertransformer/kernels/beam_search_topk_kernels.cu index f5e1daf87..fe64a2d6a 100644 --- a/src/fastertransformer/kernels/beam_search_topk_kernels.cu +++ b/src/fastertransformer/kernels/beam_search_topk_kernels.cu @@ -14,7 +14,13 @@ * limitations under the License. */ +#ifndef CUDART_VERSION +#error CUDART_VERSION Undefined! +#elif (CUDART_VERSION >= 11050) +#include +#else #include "3rdparty/cub/cub.cuh" +#endif #include "src/fastertransformer/kernels/beam_search_topk_kernels.h" #include "src/fastertransformer/kernels/reduce_kernel_utils.cuh" @@ -116,8 +122,9 @@ __launch_bounds__(THREADBLOCK_SIZE) __global__ if (tid == 0) { #pragma unroll - for (int i = 0; i < MAX_K; i++) + for (int i = 0; i < MAX_K; i++) { id_buf[bid * MAX_K + i] = total.p[i]; + } } } @@ -129,7 +136,7 @@ __global__ void topk_stage_1_opt3(const T* __restrict log_probs, const bool* finished, const int k, const int vocab_size, - const int end_id) + const int* end_ids) { typedef cub::BlockReduce, BLOCK_SIZE_> BlockReduce; __shared__ typename BlockReduce::TempStorage temp_storage; @@ -149,6 +156,7 @@ __global__ void topk_stage_1_opt3(const T* __restrict log_probs, if (tid < k) { const int index = tmp_topk_buf_index + tid; if (block_lane == 0 && tid == 0) { + const int end_id = end_ids[row_id / k]; topk_tmp_id_buf[index] = tmp_log_buf_index + end_id; topk_tmp_val_buf[index] = log_probs[tmp_log_buf_index + end_id]; } @@ -219,8 +227,9 @@ __global__ void topk_stage_2_opt3(const int* __restrict topk_tmp_id_buf, T* topk } __syncthreads(); } - if (tid < k) + if (tid < k) { ids[batch_id * k + tid] = topk_tmp_id_buf[batch_id * size + s_id[tid]]; + } } template @@ -303,8 +312,9 @@ topk_stage_2_opt2_general(const int* __restrict topk_tmp_id_buf, T* topk_tmp_val } __syncthreads(); } - if (tid < k) + if (tid < k) { ids[batch_id * k + tid] = topk_tmp_id_buf[batch_id * size + s_id[tid]]; + } } #define CASE_K_DIV(K, BLOCK_SIZE_1, BLOCK_SIZE_2) \ @@ -328,7 +338,7 @@ topk_stage_2_opt2_general(const int* __restrict topk_tmp_id_buf, T* topk_tmp_val finished, \ beam_width, \ vocab_size, \ - end_id); \ + end_ids); \ topk_stage_2_opt3 \ <<>>( \ topk_tmp_id_buf, topk_tmp_val_buf, ids, beam_width); \ @@ -344,7 +354,7 @@ void invokeTopkBeamSearch(void* workspace, const int beam_width, const int vocab_size_padded_, const T diversity_rate, - const int end_id, + const int* end_ids, cudaStream_t stream) { const int vocab_size = vocab_size_padded_; @@ -415,7 +425,7 @@ template void invokeTopkBeamSearch(void* workspace, const int beam_width, const int vocab_size_padded_, const float diversity_rate, - const int end_id, + const int* end_ids, cudaStream_t stream); template @@ -463,12 +473,12 @@ void invokeTileEncoderResults(T* tiled_output, if (d_model % 2 == 0 && std::is_same::value) { dim3 block(min(512, (int)(d_model / 2))); tileEncoderResults<<>>((half2*)tiled_output, - tiled_sequence_length, - (const half2*)output, - sequence_length, - batch_size, - beam_width, - d_model / 2); + tiled_sequence_length, + (const half2*)output, + sequence_length, + batch_size, + beam_width, + d_model / 2); } else { dim3 block(min(512, (int)d_model)); diff --git a/src/fastertransformer/kernels/beam_search_topk_kernels.h b/src/fastertransformer/kernels/beam_search_topk_kernels.h index 415094805..38a930d46 100644 --- a/src/fastertransformer/kernels/beam_search_topk_kernels.h +++ b/src/fastertransformer/kernels/beam_search_topk_kernels.h @@ -13,6 +13,9 @@ * See the License for the specific language governing permissions and * limitations under the License. */ + +#include + #pragma once namespace fastertransformer { @@ -27,7 +30,7 @@ void invokeTopkBeamSearch(void* workspace, const int beam_width, const int vocab_size_padded_, const T diversity_rate, - const int end_id, + const int* end_ids, cudaStream_t stream); template diff --git a/src/fastertransformer/kernels/bert_preprocess_kernels.cu b/src/fastertransformer/kernels/bert_preprocess_kernels.cu index ab9a8a506..c855fa157 100644 --- a/src/fastertransformer/kernels/bert_preprocess_kernels.cu +++ b/src/fastertransformer/kernels/bert_preprocess_kernels.cu @@ -63,7 +63,7 @@ __global__ void buildEncoderAttentionMaskKernel(T* attention_mask, const int* se attention_mask += blockIdx.x * max_seq_len * max_seq_len; const int length = sequence_lengths[blockIdx.x]; for (int i = threadIdx.x; i < max_seq_len * max_seq_len; i += blockDim.x) { - int row_id = i / max_seq_len; + // int row_id = i / max_seq_len; int col_id = i % max_seq_len; // if (row_id < length && col_id < length) { // TODO (bhsueh) check this modification is ok or not on other rmodel @@ -262,8 +262,10 @@ __global__ void buildRelativeAttentionBias(T* relative_attention_bias, int max_exact = tmp_num_bucket / 2; bool is_small = relative_position < max_exact; - int relative_position_if_large = max_exact + (int)(logf(relative_position * 1.0f / max_exact) - / logf((float)max_distance / max_exact) * (tmp_num_bucket - max_exact)); + int relative_position_if_large = + max_exact + + (int)(logf(relative_position * 1.0f / max_exact) / logf((float)max_distance / max_exact) + * (tmp_num_bucket - max_exact)); relative_position_if_large = min(relative_position_if_large, tmp_num_bucket - 1); @@ -282,8 +284,12 @@ void invokeBuildRelativeAttentionBias(T* relative_attention_bias, const int num_bucket, const bool is_bidirectional, const int max_distance, + const PositionEmbeddingType position_embedding_type, cudaStream_t stream) { + if (position_embedding_type == PositionEmbeddingType::absolute) { + return; + } dim3 grid(head_num); dim3 block(256); buildRelativeAttentionBias<<>>(relative_attention_bias, @@ -302,6 +308,7 @@ template void invokeBuildRelativeAttentionBias(float* relative_attention_bias, const int num_bucket, const bool is_bidirectional, const int max_distance, + const PositionEmbeddingType position_embedding_type, cudaStream_t stream); template void invokeBuildRelativeAttentionBias(half* relative_attention_bias, @@ -311,6 +318,7 @@ template void invokeBuildRelativeAttentionBias(half* relative_attention_bias, const int num_bucket, const bool is_bidirectional, const int max_distance, + const PositionEmbeddingType position_embedding_type, cudaStream_t stream); } // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/bert_preprocess_kernels.h b/src/fastertransformer/kernels/bert_preprocess_kernels.h index 95380f18e..dcb8f85f2 100644 --- a/src/fastertransformer/kernels/bert_preprocess_kernels.h +++ b/src/fastertransformer/kernels/bert_preprocess_kernels.h @@ -15,6 +15,7 @@ */ #pragma once +#include "src/fastertransformer/kernels/gen_relative_pos_bias.h" #include "src/fastertransformer/utils/cuda_utils.h" #include #include @@ -60,6 +61,7 @@ void invokeBuildRelativeAttentionBias(T* relative_attention_bias, const int num_bucket, const bool is_bidirectional, const int max_distance, + const PositionEmbeddingType position_embedding_type, cudaStream_t stream); } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/bfloat16_fallback_kenrels.cuh b/src/fastertransformer/kernels/bfloat16_fallback_kenrels.cuh new file mode 100644 index 000000000..de1a72e82 --- /dev/null +++ b/src/fastertransformer/kernels/bfloat16_fallback_kenrels.cuh @@ -0,0 +1,277 @@ +/* + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" +#include + +namespace fastertransformer { + +#ifdef ENABLE_BF16 +inline __device__ float2 bf1622float2(const __nv_bfloat162 val) { +#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ < 800 + float2 f_val; + f_val.x = __low2float(val); + f_val.y = __high2float(val); + return f_val; +#else + return __bfloat1622float2(val); +#endif +} + +inline __device__ __nv_bfloat162 bf162bf162(const __nv_bfloat16 val) { +#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ < 800 + __nv_bfloat162 val2; + val2.x = val; + val2.y = val; + return val2; +#else + return __bfloat162bfloat162(val); +#endif +} + +inline __device__ __nv_bfloat162 bf16hadd2(const __nv_bfloat162 x, const __nv_bfloat162 y) { +#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ < 800 + float fxl, fxh, fyl, fyh; + fxl = __low2float(x); + fxh = __high2float(x); + fyl = __low2float(y); + fyh = __high2float(y); + return __floats2bfloat162_rn(fxl + fyl, fxh + fyh); +#else + return __hadd2(x, y); +#endif +} + +inline __device__ __nv_bfloat16 bf16hadd(const __nv_bfloat16 x, const __nv_bfloat16 y) { +#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ < 800 + return __float2bfloat16( __bfloat162float(x) + __bfloat162float(y) ); +#else + return __hadd(x, y); +#endif +} + +inline __device__ __nv_bfloat162 bf16hsub2(const __nv_bfloat162 x, const __nv_bfloat162 y) { +#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ < 800 + float fxl, fxh, fyl, fyh; + fxl = __low2float(x); + fxh = __high2float(x); + fyl = __low2float(y); + fyh = __high2float(y); + return __floats2bfloat162_rn(fxl - fyl, fxh - fyh); +#else + return __hsub2(x, y); +#endif +} + +inline __device__ __nv_bfloat16 bf16hsub(const __nv_bfloat16 x, const __nv_bfloat16 y) { +#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ < 800 + return __float2bfloat16( __bfloat162float(x) - __bfloat162float(y) ); +#else + return __hsub(x, y); +#endif +} + +inline __device__ __nv_bfloat162 bf16hmul2(const __nv_bfloat162 x, const __nv_bfloat162 y) { +#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ < 800 + float fxl, fxh, fyl, fyh; + fxl = __low2float(x); + fxh = __high2float(x); + fyl = __low2float(y); + fyh = __high2float(y); + return __floats2bfloat162_rn(fxl * fyl, fxh * fyh); +#else + return __hmul2(x, y); +#endif +} + +inline __device__ __nv_bfloat16 bf16hmul(const __nv_bfloat16 x, const __nv_bfloat16 y) { +#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ < 800 + return __float2bfloat16( __bfloat162float(x) * __bfloat162float(y) ); +#else + return __hmul(x, y); +#endif +} + +inline __device__ __nv_bfloat162 bf16hfma2(const __nv_bfloat162 x, const __nv_bfloat162 y, const __nv_bfloat162 z) { +#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ < 800 + float fxl, fxh, fyl, fyh, fzl, fzh; + fxl = __low2float(x); + fxh = __high2float(x); + fyl = __low2float(y); + fyh = __high2float(y); + fzl = __low2float(z); + fzh = __high2float(z); + return __floats2bfloat162_rn(fxl * fyl + fzl, fxh * fyh + fzh); +#else + return __hfma2(x, y, z); +#endif +} + +inline __device__ __nv_bfloat162 bf16exp2(const __nv_bfloat162 x) { +#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ < 800 + float fxl, fxh; + fxl = __low2float(x); + fxh = __high2float(x);; + return __floats2bfloat162_rn(expf(fxl), expf(fxh)); +#else + return h2exp(x); +#endif +} +#endif // ENABLE_BF16 + +template +inline __device__ T ldg(const T* val) { + return __ldg(val); +} + +#ifdef ENABLE_BF16 +template<> +inline __device__ __nv_bfloat162 ldg(const __nv_bfloat162* val) { +#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ < 800 + return val[0]; +#else + return __ldg(val); +#endif +} + +template<> +inline __device__ __nv_bfloat16 ldg(const __nv_bfloat16* val) { +#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ < 800 + return val[0]; +#else + return __ldg(val); +#endif +} +#endif // ENABLE_BF16 + +// Get type2 from type or vice versa (applied to half and bfloat16) +template +struct TypeConverter {using Type = half2;}; // keep for generality + +template<> +struct TypeConverter {using Type = half;}; + +template<> +struct TypeConverter {using Type = half2;}; + +#ifdef ENABLE_BF16 +template<> +struct TypeConverter<__nv_bfloat162> {using Type = __nv_bfloat16;}; + +template<> +struct TypeConverter<__nv_bfloat16> {using Type = __nv_bfloat162;}; +#endif // ENABLE_BF16 + +// Convert float to type2 (applied to half2 and bfloat162) +template +inline __device__ T float2type2(float a); + +template<> +inline __device__ half2 float2type2(float a) { + return __float2half2_rn(a); +} + +#ifdef ENABLE_BF16 +template<> +inline __device__ __nv_bfloat162 float2type2(float a) { + return __float2bfloat162_rn(a); +} +#endif // ENABLE_BF16 + +// Convert float to type (applied to half and bfloat16) +template +inline __device__ T float2type(float a); + +template<> +inline __device__ half float2type(float a) { + return __float2half_rn(a); +} + +#ifdef ENABLE_BF16 +template<> +inline __device__ __nv_bfloat16 float2type(float a) { + return __float2bfloat16_rn(a); +} +#endif // ENABLE_BF16 + +// Convert type to type2 (applied to half and bfloat16) +template +inline __device__ T_OUT type2type2(T_IN a); + +template<> +inline __device__ half2 type2type2(half a) { + return __half2half2(a); +} + +#ifdef ENABLE_BF16 +template<> +inline __device__ __nv_bfloat162 type2type2(__nv_bfloat16 a) { + return bf162bf162(a); +} +#endif // ENABLE_BF16 + +// Defined math operations (bfloat16 fallback to fp32 when it is not supported) +template +inline __device__ T hadd2(T a, T b) { + return __hadd2(a, b); +} + +#ifdef ENABLE_BF16 +template<> +inline __device__ __nv_bfloat162 hadd2(__nv_bfloat162 a, __nv_bfloat162 b) { + return bf16hadd2(a, b); +} +#endif // ENABLE_BF16 + +template +inline __device__ T hsub2(T a, T b) { + return __hsub2(a, b); +} + +#ifdef ENABLE_BF16 +template<> +inline __device__ __nv_bfloat162 hsub2(__nv_bfloat162 a, __nv_bfloat162 b) { + return bf16hsub2(a, b); +} +#endif // ENABLE_BF16 + +template +inline __device__ T hmul2(T a, T b) { + return __hmul2(a, b); +} + +#ifdef ENABLE_BF16 +template<> +inline __device__ __nv_bfloat162 hmul2(__nv_bfloat162 a, __nv_bfloat162 b) { + return bf16hmul2(a, b); +} +#endif // ENABLE_BF16 + +template +inline __device__ T hexp2(T a) { + return h2exp(a); +} + +#ifdef ENABLE_BF16 +template<> +inline __device__ __nv_bfloat162 hexp2(__nv_bfloat162 a) { + return bf16exp2(a); +} +#endif // ENABLE_BF16 + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/calibrate_quantize_weight_kernels.cu b/src/fastertransformer/kernels/calibrate_quantize_weight_kernels.cu index 9d5024fbc..0c2ce3a21 100644 --- a/src/fastertransformer/kernels/calibrate_quantize_weight_kernels.cu +++ b/src/fastertransformer/kernels/calibrate_quantize_weight_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -33,8 +33,9 @@ __global__ void ldn_calibrate_weight_per_channel(float* scale, const T* src, con float amax_val = 0.0f; for (int k_i = tidx; k_i < k; k_i += blockDim.x) { float val = fabs(static_cast(src[k_i * n + bidx])); - if (amax_val < val) + if (amax_val < val) { amax_val = val; + } } const float block_amax_val = blockReduceMax(amax_val); if (tidx == 0) { @@ -48,8 +49,9 @@ void invokeLdnCalibrateWeightPerChannel(float* scale, const T* src, const int k, dim3 grid(n); dim3 block((k + 31) / 32 * 32); - if (block.x > 1024) + if (block.x > 1024) { block.x = 1024; + } ldn_calibrate_weight_per_channel<<>>(scale, src, k, n); } @@ -59,6 +61,11 @@ invokeLdnCalibrateWeightPerChannel(float* scale, const float* src, const int k, template void invokeLdnCalibrateWeightPerChannel(float* scale, const half* src, const int k, const int n, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void invokeLdnCalibrateWeightPerChannel( + float* scale, const __nv_bfloat16* src, const int k, const int n, cudaStream_t stream); +#endif + //--------------------------------------------------------------------------------- // src is [n, k] row-major @@ -79,8 +86,9 @@ __global__ void ldk_calibrate_quantize_weight_per_channel(int8_t* dst, float* sc for (int k_i = tidx; k_i < k; k_i += blockDim.x) { T val = src[k_i]; val = val > zero ? val : -val; - if (amax_val > val) + if (amax_val > val) { amax_val = val; + } } __shared__ float s_amax; const float block_amax_val = blockReduceMax(static_cast(amax_val)); @@ -103,8 +111,9 @@ void invokeLdkCalibrateQuantizeWeightPerChannel( dim3 grid(n); dim3 block((k + 31) / 32 * 32); - if (block.x > 1024) + if (block.x > 1024) { block.x = 1024; + } ldk_calibrate_quantize_weight_per_channel<<>>(dst, scale, src, k); } @@ -156,4 +165,9 @@ template void invokeLdnTransposeQuantizeWeightPerChannel( template void invokeLdnTransposeQuantizeWeightPerChannel( int8_t* dst, const float* scale, const half* src, const int k, const int n, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void invokeLdnTransposeQuantizeWeightPerChannel( + int8_t* dst, const float* scale, const __nv_bfloat16* src, const int k, const int n, cudaStream_t stream); +#endif + } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/calibrate_quantize_weight_kernels.h b/src/fastertransformer/kernels/calibrate_quantize_weight_kernels.h index 055ec2635..0418b90df 100644 --- a/src/fastertransformer/kernels/calibrate_quantize_weight_kernels.h +++ b/src/fastertransformer/kernels/calibrate_quantize_weight_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,6 +17,7 @@ #pragma once #include "int8_utils.cuh" +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" #include #include diff --git a/src/fastertransformer/kernels/custom_ar_kernels.cu b/src/fastertransformer/kernels/custom_ar_kernels.cu new file mode 100644 index 000000000..0bd33b8e1 --- /dev/null +++ b/src/fastertransformer/kernels/custom_ar_kernels.cu @@ -0,0 +1,389 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "custom_ar_kernels.h" +#include "src/fastertransformer/kernels/bfloat16_fallback_kenrels.cuh" + +namespace fastertransformer { + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +static inline __device__ uint32_t hadd2(const uint32_t& a, const uint32_t& b) +{ + uint32_t c; + asm volatile("add.f16x2 %0, %1, %2;\n" : "=r"(c) : "r"(a), "r"(b)); + return c; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +static inline __device__ uint32_t fadd(const uint32_t& a, const uint32_t& b) +{ + uint32_t c; + asm volatile("add.f32 %0, %1, %2;\n" : "=r"(c) : "r"(a), "r"(b)); + return c; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +static inline __device__ void st_flag_release(uint32_t& flag, uint32_t* flag_addr) +{ + asm volatile("st.global.release.sys.b32 [%1], %0;" ::"r"(flag), "l"(flag_addr)); +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +static inline __device__ void ld_flag_acquire(uint32_t& flag, uint32_t* flag_addr) +{ + asm volatile("ld.global.acquire.sys.b32 %0, [%1];" : "=r"(flag) : "l"(flag_addr)); +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +// Type Converter that packs data format to 128 bits data type +template +struct ARTypeConverter { + using Type = uint4; +}; + +#ifdef ENABLE_BF16 +template<> +struct ARTypeConverter<__nv_bfloat16> { + using Type = bf168; +}; +#endif + +// add two 128b data +template +inline __device__ T_IN add128b(T_IN a, T_IN b); + +template<> +inline __device__ uint4 add128b(uint4 a, uint4 b) +{ + uint4 c; + c.x = hadd2(a.x, b.x); + c.y = hadd2(a.y, b.y); + c.z = hadd2(a.z, b.z); + c.w = hadd2(a.w, b.w); + return c; +} + +template<> +inline __device__ uint4 add128b(uint4 a, uint4 b) +{ + uint4 c; + c.x = fadd(a.x, b.x); + c.y = fadd(a.y, b.y); + c.z = fadd(a.z, b.z); + c.w = fadd(a.w, b.w); + return c; +} + +#ifdef ENABLE_BF16 +template<> +inline __device__ bf168 add128b(bf168 a, bf168 b) +{ + bf168 c; + c.x = bf16hadd2(a.x, b.x); + c.y = bf16hadd2(a.y, b.y); + c.z = bf16hadd2(a.z, b.z); + c.w = bf16hadd2(a.w, b.w); + return c; +} +#endif + +// init 128bits data with 0 +template +inline __device__ T init_packed_type(); + +template<> +inline __device__ uint4 init_packed_type() +{ + return make_uint4(0u, 0u, 0u, 0u); +} + +#ifdef ENABLE_BF16 +template<> +inline __device__ bf168 init_packed_type() +{ + bf168 val; + uint4& val_u = reinterpret_cast(val); + val_u = make_uint4(0u, 0u, 0u, 0u); + return val; +} +#endif + +template +static __global__ void oneShotAllReduceKernel(AllReduceParams params) +{ + // The block index. + const int bidx = blockIdx.x; + // The thread index with the block. + const int tidx = threadIdx.x; + + // The number of elements packed into one for comms + static constexpr int NUM_ELTS = std::is_same::value ? 4 : 8; + + // Packed data type for comms + using PackedType = typename ARTypeConverter::Type; + + // The location in the destination array (load 8 fp16 or load 4 fp32 using LDG.128). + size_t offset = bidx * params.elts_per_block + tidx * NUM_ELTS; + // The end of the segment computed by that block. + size_t max_offset = std::min((bidx + 1) * params.elts_per_block, params.elts_per_rank); + + // Synchronize the ranks. + volatile uint32_t* barrier_d = params.peer_barrier_ptrs[params.local_rank]; + if (tidx < RANKS_PER_NODE) { + // The 1st block notifies the other ranks. + if (bidx == 0) { + params.peer_barrier_ptrs[tidx][params.local_rank] = params.barrier_flag; + } + + // Busy-wait until all ranks are ready. + while (barrier_d[tidx] < params.barrier_flag) {} + } + + // Make sure we can move on... + __syncthreads(); + + // The source pointers. Distributed round-robin for the different warps. + const T* src_d[RANKS_PER_NODE]; +#pragma unroll + for (int ii = 0; ii < RANKS_PER_NODE; ++ii) { + int rank = (params.local_rank + ii) % RANKS_PER_NODE; + src_d[ii] = params.peer_comm_buffer_ptrs[rank]; + } + + // Each block accumulates the values from the different GPUs on the same node. + for (size_t iter_offset = offset; iter_offset < max_offset; iter_offset += blockDim.x * NUM_ELTS) { + // Iterate over the different ranks/devices on the node to load the values. + PackedType vals[RANKS_PER_NODE]; +#pragma unroll + for (int ii = 0; ii < RANKS_PER_NODE; ++ii) { + vals[ii] = reinterpret_cast(&src_d[ii][iter_offset])[0]; + } + + // Sum the values from the different ranks. + PackedType sums = init_packed_type(); +#pragma unroll + for (int ii = 0; ii < RANKS_PER_NODE; ++ii) { + sums = add128b(sums, vals[ii]); + } + + // Store to the destination buffer. + reinterpret_cast(¶ms.local_output_buffer_ptr[iter_offset])[0] = sums; + } +} + +template +static __global__ void twoShotAllReduceKernel(AllReduceParams params) +{ + + // The block index. + const int bidx = blockIdx.x; + // The thread index with the block. + const int tidx = threadIdx.x; + + // The number of elements packed into one for comms + static constexpr int NUM_ELTS = std::is_same::value ? 4 : 8; + + // Packed data type for comms + using PackedType = typename ARTypeConverter::Type; + + // The location in the destination array (load 8 fp16 or load 4 fp32 using LDG.128). + size_t offset = bidx * params.elts_per_block + tidx * NUM_ELTS + params.rank_offset; + // The end of the segment computed by that block. + size_t max_offset = min(offset + params.elts_per_block, params.elts_total); + + // Synchronize the ranks. + volatile uint32_t* barrier_d = params.peer_barrier_ptrs[params.local_rank]; + if (tidx < RANKS_PER_NODE) { + // The 1st block notifies the other ranks. + if (bidx == 0) { + params.peer_barrier_ptrs[tidx][params.local_rank] = params.barrier_flag; + } + + // Busy-wait until all ranks are ready. + while (barrier_d[tidx] < params.barrier_flag) {} + } + + // Make sure we can move on... + __syncthreads(); + + // The source pointers. Distributed round-robin for the different warps. + T* src_d[RANKS_PER_NODE]; + // The destination ranks for round-robin gathering + size_t dst_rank[RANKS_PER_NODE]; +#pragma unroll + for (int ii = 0; ii < RANKS_PER_NODE; ++ii) { + int rank = (params.local_rank + ii) % RANKS_PER_NODE; + src_d[ii] = params.peer_comm_buffer_ptrs[rank]; + dst_rank[ii] = rank; + } + + // Each block accumulates the values from the different GPUs on the same node. + for (size_t local_offset = offset; local_offset < max_offset; local_offset += blockDim.x * NUM_ELTS) { + + // Iterate over the different ranks/devices on the node to load the values. + PackedType vals[RANKS_PER_NODE]; +#pragma unroll + for (int ii = 0; ii < RANKS_PER_NODE; ++ii) { + vals[ii] = reinterpret_cast(&src_d[ii][local_offset])[0]; + } + + // Sum the values from the different ranks. + PackedType sums = init_packed_type(); +#pragma unroll + for (int ii = 0; ii < RANKS_PER_NODE; ++ii) { + sums = add128b(sums, vals[ii]); + } + + // Store to the local buffer. + reinterpret_cast(&src_d[0][local_offset])[0] = sums; + } + + // sync threads to make sure all block threads have the sums + __syncthreads(); + + // barreris among the blocks with the same idx (release-acuqire sementics) + if (tidx < RANKS_PER_NODE) { + // The all blocks notifies the other ranks. + uint32_t flag_block_offset = RANKS_PER_NODE + bidx * RANKS_PER_NODE; + st_flag_release(params.barrier_flag, params.peer_barrier_ptrs[tidx] + flag_block_offset + params.local_rank); + + // Busy-wait until all ranks are ready. + uint32_t rank_barrier = 0; + uint32_t* peer_barrier_d = params.peer_barrier_ptrs[params.local_rank] + flag_block_offset + tidx; + do { + ld_flag_acquire(rank_barrier, peer_barrier_d); + } while (rank_barrier != params.barrier_flag); + } + + // sync threads to make sure all other ranks has the final partial results + __syncthreads(); + + // Gather all needed elts from other intra-node ranks + for (size_t local_offset = offset; local_offset < max_offset; local_offset += blockDim.x * NUM_ELTS) { +#pragma unroll + for (int ii = 0; ii < RANKS_PER_NODE; ++ii) { + // use round-robin gathering from other ranks + int offset_rank = local_offset + (dst_rank[ii] - params.local_rank) * params.elts_per_rank; + reinterpret_cast(¶ms.local_output_buffer_ptr[offset_rank])[0] = + reinterpret_cast(&src_d[dst_rank[ii]][offset_rank])[0]; + } + } +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +void kernelLaunchConfig( + int& blocks_per_grid, int& threads_per_block, size_t elts, int kernel_algo, size_t data_type_bytes) +{ + assert(data_type_bytes == 2 || data_type_bytes == 4); + // NOTE: need to supprot FP16 and FP32 + int elts_per_thread = 16 / data_type_bytes; + int elts_per_warp = (16 * WARP_SIZE) / data_type_bytes; + switch (kernel_algo) { + case 0: { // one stage all reduce algo + assert(elts % elts_per_warp == 0); + if (elts < (elts_per_thread * DEFAULT_BLOCK_SIZE)) { // local reduce + threads_per_block = ((elts + elts_per_warp - 1) / elts_per_warp) * WARP_SIZE; + blocks_per_grid = 1; + } + else { // local reduce + if (elts % (elts_per_thread * threads_per_block) == 0) { + blocks_per_grid = + (elts + elts_per_thread * threads_per_block - 1) / (elts_per_thread * threads_per_block); + // NOTE: need to adjust here + if (blocks_per_grid > MAX_ALL_REDUCE_BLOCKS) { + int iter_factor = 1; + while (blocks_per_grid / iter_factor > MAX_ALL_REDUCE_BLOCKS || blocks_per_grid % iter_factor) { + iter_factor += 1; + } + blocks_per_grid /= iter_factor; + } + } + else { + int total_threads = elts / elts_per_thread; + blocks_per_grid = 1; + while (total_threads % blocks_per_grid != 0 + || total_threads / blocks_per_grid > DEFAULT_BLOCK_SIZE) { + blocks_per_grid += 1; + } + threads_per_block = total_threads / blocks_per_grid; + } + } + break; + } + case 1: { // two stage all reduce algo + int total_threads = elts / RANKS_PER_NODE / RANKS_PER_NODE; + assert(elts / RANKS_PER_NODE % RANKS_PER_NODE == 0 && total_threads % WARP_SIZE == 0); + + while (total_threads % blocks_per_grid != 0 || total_threads / blocks_per_grid > DEFAULT_BLOCK_SIZE) { + blocks_per_grid += 1; + } + + threads_per_block = total_threads / blocks_per_grid; + + // NOTE: need to adjust here + if (blocks_per_grid > MAX_ALL_REDUCE_BLOCKS) { + int iter_factor = 1; + while (blocks_per_grid / iter_factor > MAX_ALL_REDUCE_BLOCKS || blocks_per_grid % iter_factor) { + iter_factor += 1; + } + blocks_per_grid /= iter_factor; + } + break; + } + } +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +template +void invokeOneOrTwoShotAllReduceKernel(AllReduceParams& param, cudaStream_t stream) +{ + size_t elts_total = param.elts_total; + int blocks_per_grid = 1, threads_per_block = DEFAULT_BLOCK_SIZE; + int kernel_algo = 1; + if (elts_total <= DEFALUT_ALGO_AR_SIZE_THRESHOLD) { + kernel_algo = 0; + } + + kernelLaunchConfig(blocks_per_grid, threads_per_block, elts_total, kernel_algo, sizeof(T)); + + if (kernel_algo == 0) { + param.elts_per_rank = elts_total; + param.elts_per_block = param.elts_per_rank / blocks_per_grid; + oneShotAllReduceKernel<<>>(param); + } + else { + param.elts_per_rank = param.elts_total / RANKS_PER_NODE; + param.elts_per_block = param.elts_per_rank / blocks_per_grid; + param.rank_offset = param.rank * param.elts_per_rank; + twoShotAllReduceKernel<<>>(param); + } +} + +// Template instantiation +template void invokeOneOrTwoShotAllReduceKernel(AllReduceParams& param, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void invokeOneOrTwoShotAllReduceKernel<__nv_bfloat16>(AllReduceParams<__nv_bfloat16>& param, + cudaStream_t stream); +#endif +template void invokeOneOrTwoShotAllReduceKernel(AllReduceParams& param, cudaStream_t stream); +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/custom_ar_kernels.h b/src/fastertransformer/kernels/custom_ar_kernels.h new file mode 100644 index 000000000..a63cc5984 --- /dev/null +++ b/src/fastertransformer/kernels/custom_ar_kernels.h @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include +#include + +#include + +#include "src/fastertransformer/utils/cuda_utils.h" + +#define CUSTOM_AR_SIZE_THRESHOLD 50331648 +#define MAX_ALL_REDUCE_BLOCKS 24 +#define FLAG(a) ((uint32_t)((a) % 0x146)) +#define RANKS_PER_NODE 8 +#define WARP_SIZE 32 +#define DEFAULT_BLOCK_SIZE 1024 +#define DEFALUT_ALGO_AR_SIZE_THRESHOLD 196608 + +namespace fastertransformer { + +#ifdef ENABLE_BF16 +typedef struct bf168 { + __nv_bfloat162 x; + __nv_bfloat162 y; + __nv_bfloat162 z; + __nv_bfloat162 w; +} bf168; +#endif + +template +struct AllReduceParams { + size_t elts_total; + size_t elts_per_rank; + size_t elts_per_block; + size_t rank_offset; + size_t rank, local_rank, node_id; + uint32_t barrier_flag; + uint32_t* peer_barrier_ptrs[RANKS_PER_NODE]; + T* peer_comm_buffer_ptrs[RANKS_PER_NODE]; + T* local_output_buffer_ptr; +}; + +template +void invokeOneOrTwoShotAllReduceKernel(AllReduceParams& param, cudaStream_t stream); + +void kernelLaunchConfig(int& blocks_per_grid, int& threads_per_block, size_t elts, int kernel_algo); + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/decoder_masked_multihead_attention.cu b/src/fastertransformer/kernels/decoder_masked_multihead_attention.cu index d97974344..97a7acea9 100644 --- a/src/fastertransformer/kernels/decoder_masked_multihead_attention.cu +++ b/src/fastertransformer/kernels/decoder_masked_multihead_attention.cu @@ -1,41 +1,42 @@ -/*************************************************************************************************** -* Copyright (c) 2011-2021, NVIDIA CORPORATION. All rights reserved. -* -* Redistribution and use in source and binary forms, with or without modification, are not permit- -* ted. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR -* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND -* FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NVIDIA CORPORATION BE LIABLE -* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; -* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, -* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* -**************************************************************************************************/ +/* + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + #include "src/fastertransformer/kernels/decoder_masked_multihead_attention.h" #include "src/fastertransformer/kernels/decoder_masked_multihead_attention_utils.h" +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" #include #include #include -//#define MMHA_USE_HMMA_FOR_REDUCTION +// #define MMHA_USE_HMMA_FOR_REDUCTION // Below are knobs to extend FP32 accumulation for higher FP16 accuracy // Does not seem to affect the accuracy that much -//#define MMHA_USE_FP32_ACUM_FOR_FMA +// #define MMHA_USE_FP32_ACUM_FOR_FMA // Seems to slightly improve the accuracy #define MMHA_USE_FP32_ACUM_FOR_OUT #if 0 && defined(MMHA_USE_FP32_ACUM_FOR_OUT) -// Does not seem to improve the accuracy -//#define MMHA_USE_FP32_ACUM_FOR_LOGITS + // Does not seem to improve the accuracy + //#define MMHA_USE_FP32_ACUM_FOR_LOGITS #endif -namespace mmha { +namespace mmha { //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -48,18 +49,18 @@ namespace mmha { // H: Number of heads, // Dh: Hidden dimension per head - Dh = D / H. // -// The different kernels assign a threadblock for B x H pair. The grid has size (1, B, H). We use +// The different kernels assign a threadblock for B x H pair. The grid has size (1, B, H). We use // 64, 128 and 256 threads per block. // -// Each threadblock loads Dh values from Q and its associated bias. The kernels run a loop to -// compute Q * K^T where K is loaded from a cache buffer -- except for the current timestep. The +// Each threadblock loads Dh values from Q and its associated bias. The kernels run a loop to +// compute Q * K^T where K is loaded from a cache buffer -- except for the current timestep. The // cache buffer helps with memory accesses and contains keys with bias. // -// The layout of the cache buffer for the keys is [B, H, Dh/x, L, x] where x == 8 for FP16 and +// The layout of the cache buffer for the keys is [B, H, Dh/x, L, x] where x == 8 for FP16 and // x == 4 for FP32 where the fastest moving dimension (contiguous data) is the rightmost one. The // values for x are chosen to create chunks of 16 bytes. // -// The different kernels use 1, 2 or 4 threads per key (THREADS_PER_KEY). The size of the LDGs +// The different kernels use 1, 2 or 4 threads per key (THREADS_PER_KEY). The size of the LDGs // depends on the number of threads per key. Each thread sums Dh / THREADS_PER_KEY elements. At // the end of each iteration of the Q * K^T loop, we perform a reduction between lanes using an // HMMA instruction (Tensor Core). Each Q * K^T valuey is stored in shared memory in FP32. @@ -68,165 +69,334 @@ namespace mmha { // shared memory. // // The kernel ends with a loop over the values in V. We use THREADS_PER_VALUE to control how many -// timesteps are computed by loop iteration. As with the keys, the values are read from a cache +// timesteps are computed by loop iteration. As with the keys, the values are read from a cache // except for the current timestep. The layout of the cache buffer for the values is much simpler // as it is [B, H, L, Dh]. // //////////////////////////////////////////////////////////////////////////////////////////////////// -template< typename T, int Dh > +template struct Qk_vec_ {}; -template<> struct Qk_vec_ { using Type = float; }; -template<> struct Qk_vec_ { using Type = float2; }; -template<> struct Qk_vec_ { using Type = float4; }; -template<> struct Qk_vec_ { using Type = float4; }; -template<> struct Qk_vec_ { using Type = uint32_t; }; -template<> struct Qk_vec_ { using Type = uint32_t; }; -template<> struct Qk_vec_ { using Type = uint2; }; -template<> struct Qk_vec_ { using Type = uint4; }; - +template<> +struct Qk_vec_ { + using Type = float; +}; +template<> +struct Qk_vec_ { + using Type = float2; +}; +template<> +struct Qk_vec_ { + using Type = float4; +}; +template<> +struct Qk_vec_ { + using Type = float4; +}; +template<> +struct Qk_vec_ { + using Type = uint32_t; +}; +template<> +struct Qk_vec_ { + using Type = uint32_t; +}; +template<> +struct Qk_vec_ { + using Type = uint2; +}; +template<> +struct Qk_vec_ { + using Type = uint4; +}; +#ifdef ENABLE_BF16 +template<> +struct Qk_vec_<__nv_bfloat16, 32> { + using Type = __nv_bfloat162; +}; +template<> +struct Qk_vec_<__nv_bfloat16, 64> { + using Type = __nv_bfloat162; +}; +template<> +struct Qk_vec_<__nv_bfloat16, 128> { + using Type = bf16_4_t; +}; +template<> +struct Qk_vec_<__nv_bfloat16, 256> { + using Type = bf16_8_t; +}; +#endif // ENABLE_BF16 //////////////////////////////////////////////////////////////////////////////////////////////////// -template< typename T, int THREADS_PER_KEY > +template struct K_vec_ {}; -template<> struct K_vec_ { using Type = float; }; -template<> struct K_vec_ { using Type = float2; }; -template<> struct K_vec_ { using Type = float4; }; -template<> struct K_vec_ { using Type = uint32_t; }; -template<> struct K_vec_ { using Type = uint2; }; -template<> struct K_vec_ { using Type = uint4; }; - +template<> +struct K_vec_ { + using Type = float; +}; +template<> +struct K_vec_ { + using Type = float2; +}; +template<> +struct K_vec_ { + using Type = float4; +}; +template<> +struct K_vec_ { + using Type = uint32_t; +}; +template<> +struct K_vec_ { + using Type = uint2; +}; +template<> +struct K_vec_ { + using Type = uint4; +}; +#ifdef ENABLE_BF16 +template<> +struct K_vec_<__nv_bfloat16, 4> { + using Type = __nv_bfloat162; +}; +template<> +struct K_vec_<__nv_bfloat16, 2> { + using Type = bf16_4_t; +}; +template<> +struct K_vec_<__nv_bfloat16, 1> { + using Type = bf16_8_t; +}; +#endif // ENABLE_BF16 //////////////////////////////////////////////////////////////////////////////////////////////////// -template< typename T, int V_VEC_SIZE > +template struct V_vec_ {}; -template<> struct V_vec_ { using Type = float; }; -template<> struct V_vec_ { using Type = float2; }; -template<> struct V_vec_ { using Type = float4; }; -template<> struct V_vec_ { using Type = uint32_t; }; -template<> struct V_vec_ { using Type = uint2; }; -template<> struct V_vec_ { using Type = uint4; }; - +template<> +struct V_vec_ { + using Type = float; +}; +template<> +struct V_vec_ { + using Type = float2; +}; +template<> +struct V_vec_ { + using Type = float4; +}; +template<> +struct V_vec_ { + using Type = uint32_t; +}; +template<> +struct V_vec_ { + using Type = uint2; +}; +template<> +struct V_vec_ { + using Type = uint4; +}; +#ifdef ENABLE_BF16 +template<> +struct V_vec_<__nv_bfloat16, 2> { + using Type = __nv_bfloat162; +}; +template<> +struct V_vec_<__nv_bfloat16, 4> { + using Type = bf16_4_t; +}; +template<> +struct V_vec_<__nv_bfloat16, 8> { + using Type = bf16_8_t; +}; +#endif // ENABLE_BF16 //////////////////////////////////////////////////////////////////////////////////////////////////// #ifdef MMHA_USE_FP32_ACUM_FOR_FMA -template< typename T> +template struct Qk_vec_acum_fp32_ {}; -template<> struct Qk_vec_acum_fp32_ { using Type = float; }; -template<> struct Qk_vec_acum_fp32_ { using Type = float2; }; -template<> struct Qk_vec_acum_fp32_ { using Type = float4; }; -//template<> struct Qk_vec_acum_fp32_ { using Type = float; }; -template<> struct Qk_vec_acum_fp32_ { using Type = float2; }; -template<> struct Qk_vec_acum_fp32_ { using Type = Float4_; }; +template<> +struct Qk_vec_acum_fp32_ { + using Type = float; +}; +template<> +struct Qk_vec_acum_fp32_ { + using Type = float2; +}; +template<> +struct Qk_vec_acum_fp32_ { + using Type = float4; +}; +// template<> struct Qk_vec_acum_fp32_ { using Type = float; }; +template<> +struct Qk_vec_acum_fp32_ { + using Type = float2; +}; +template<> +struct Qk_vec_acum_fp32_ { + using Type = Float4_; +}; //////////////////////////////////////////////////////////////////////////////////////////////////// -template< typename T> +template struct K_vec_acum_fp32_ {}; -template<> struct K_vec_acum_fp32_ { using Type = float; }; -template<> struct K_vec_acum_fp32_ { using Type = float2; }; -template<> struct K_vec_acum_fp32_ { using Type = float4; }; -template<> struct K_vec_acum_fp32_ { using Type = float2; }; -template<> struct K_vec_acum_fp32_ { using Type = Float4_; }; -template<> struct K_vec_acum_fp32_ { using Type = Float8_; }; +template<> +struct K_vec_acum_fp32_ { + using Type = float; +}; +template<> +struct K_vec_acum_fp32_ { + using Type = float2; +}; +template<> +struct K_vec_acum_fp32_ { + using Type = float4; +}; +template<> +struct K_vec_acum_fp32_ { + using Type = float2; +}; +template<> +struct K_vec_acum_fp32_ { + using Type = Float4_; +}; +template<> +struct K_vec_acum_fp32_ { + using Type = Float8_; +}; #endif //////////////////////////////////////////////////////////////////////////////////////////////////// #ifdef MMHA_USE_FP32_ACUM_FOR_OUT -template< typename T > +template struct V_vec_acum_fp32_ {}; -template<> struct V_vec_acum_fp32_ { using Type = float; }; -template<> struct V_vec_acum_fp32_ { using Type = float2; }; -template<> struct V_vec_acum_fp32_ { using Type = float4; }; -template<> struct V_vec_acum_fp32_ { using Type = float2; }; -template<> struct V_vec_acum_fp32_ { using Type = Float4_; }; -template<> struct V_vec_acum_fp32_ { using Type = Float8_; }; +template<> +struct V_vec_acum_fp32_ { + using Type = float; +}; +template<> +struct V_vec_acum_fp32_ { + using Type = float2; +}; +template<> +struct V_vec_acum_fp32_ { + using Type = float4; +}; +template<> +struct V_vec_acum_fp32_ { + using Type = float2; +}; +template<> +struct V_vec_acum_fp32_ { + using Type = Float4_; +}; +template<> +struct V_vec_acum_fp32_ { + using Type = Float8_; +}; +#ifdef ENABLE_BF16 +template<> +struct V_vec_acum_fp32_<__nv_bfloat162> { + using Type = float2; +}; +template<> +struct V_vec_acum_fp32_ { + using Type = Float4_; +}; +template<> +struct V_vec_acum_fp32_ { + using Type = Float8_; +}; +#endif // ENABLE_BF16 #endif - //////////////////////////////////////////////////////////////////////////////////////////////////// -template< int THREADS_PER_KEY, typename K_vec, int N > -inline __device__ float qk_dot_(const K_vec (&q)[N], const K_vec (&k)[N]) { +template +inline __device__ float qk_dot_(const K_vec (&q)[N], const K_vec (&k)[N]) +{ #ifdef MMHA_USE_FP32_ACUM_FOR_FMA - using K_vec_acum = typename K_vec_acum_fp32_::Type; + using K_vec_acum = typename K_vec_acum_fp32_::Type; #else - using K_vec_acum = K_vec; + using K_vec_acum = K_vec; #endif - // Compute the parallel products for Q*K^T (treat vector lanes separately). - K_vec_acum qk_vec = mul(q[0], k[0]); - #pragma unroll - for( int ii = 1; ii < N; ++ii ) { - qk_vec = fma(q[ii], k[ii], qk_vec); - } - - // Finalize the reduction across lanes. - float qk = sum(qk_vec); - #pragma unroll - for( int mask = THREADS_PER_KEY / 2; mask >= 1; mask /= 2 ) { - qk += __shfl_xor_sync(uint32_t(-1), qk, mask); - } - return qk; + // Compute the parallel products for Q*K^T (treat vector lanes separately). + K_vec_acum qk_vec = mul(q[0], k[0]); +#pragma unroll + for (int ii = 1; ii < N; ++ii) { + qk_vec = fma(q[ii], k[ii], qk_vec); + } + + // Finalize the reduction across lanes. + float qk = sum(qk_vec); +#pragma unroll + for (int mask = THREADS_PER_KEY / 2; mask >= 1; mask /= 2) { + qk += __shfl_xor_sync(uint32_t(-1), qk, mask); + } + return qk; } //////////////////////////////////////////////////////////////////////////////////////////////////// -template< typename T, int THREADS_PER_KEY > +template struct Qk_dot { - template< typename K_vec, int N > - static inline __device__ float dot(const K_vec (&q)[N], const K_vec (&k)[N]) { - return qk_dot_(q, k); - } + template + static inline __device__ float dot(const K_vec (&q)[N], const K_vec (&k)[N]) + { + return qk_dot_(q, k); + } }; //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float4 hmma_fp32(const uint2 &a, uint32_t b) { - float4 c; float zero = 0.f; - asm volatile( \ - "mma.sync.aligned.m16n8k8.row.col.f32.f16.f16.f32 \n" \ - " {%0, %1, %2, %3}, \n" \ - " {%4, %5}, \n" \ - " {%6}, \n" \ - " {%7, %7, %7, %7}; \n" \ - \ - : "=f"(c.x), "=f"(c.y), "=f"(c.z), "=f"(c.w) - : "r"(a.x) "r"(a.y) - , "r"(b) - , "f"(zero)); - return c; +inline __device__ float4 hmma_fp32(const uint2& a, uint32_t b) +{ + float4 c; + float zero = 0.f; + asm volatile("mma.sync.aligned.m16n8k8.row.col.f32.f16.f16.f32 \n" + " {%0, %1, %2, %3}, \n" + " {%4, %5}, \n" + " {%6}, \n" + " {%7, %7, %7, %7}; \n" + + : "=f"(c.x), "=f"(c.y), "=f"(c.z), "=f"(c.w) + : "r"(a.x) "r"(a.y), "r"(b), "f"(zero)); + return c; } //////////////////////////////////////////////////////////////////////////////////////////////////// -template< int N > -inline __device__ float qk_hmma_dot_(const uint32_t (&q)[N], const uint32_t (&k)[N]) { -#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 750 +template +inline __device__ float qk_hmma_dot_(const uint32_t (&q)[N], const uint32_t (&k)[N]) +{ +#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 750 #ifdef MMHA_USE_FP32_ACUM_FOR_FMA - using K_vec_acum = typename K_vec_acum_fp32_::Type; + using K_vec_acum = typename K_vec_acum_fp32_::Type; #else - using K_vec_acum = uint32_t; + using K_vec_acum = uint32_t; #endif - K_vec_acum qk_vec = mul(q[0], k[0]); - #pragma unroll - for( int ii = 1; ii < N; ++ii ) { - qk_vec = fma(q[ii], k[ii], qk_vec); - } + K_vec_acum qk_vec = mul(q[0], k[0]); +#pragma unroll + for (int ii = 1; ii < N; ++ii) { + qk_vec = fma(q[ii], k[ii], qk_vec); + } #ifdef MMHA_USE_FP32_ACUM_FOR_FMA uint32_t qk_vec_ = float2_to_half2(qk_vec); return hmma_fp32(make_uint2(qk_vec_, 0u), 0x3c003c00u).x; #else - return hmma_fp32(make_uint2(qk_vec, 0u), 0x3c003c00u).x; + return hmma_fp32(make_uint2(qk_vec, 0u), 0x3c003c00u).x; #endif #else - return 0.f; + return 0.f; #endif } @@ -234,828 +404,959 @@ inline __device__ float qk_hmma_dot_(const uint32_t (&q)[N], const uint32_t (&k) template<> struct Qk_dot { - template< int N > - static inline __device__ float dot(const uint32_t (&q)[N], const uint32_t (&k)[N]) { + template + static inline __device__ float dot(const uint32_t (&q)[N], const uint32_t (&k)[N]) + { #if __CUDA_ARCH__ >= 750 && defined(MMHA_USE_HMMA_FOR_REDUCTION) - return qk_hmma_dot_(q, k); + return qk_hmma_dot_(q, k); #else - return qk_dot_<4>(q, k); -#endif // defined MMHA_USE_HMMA_FOR_REDUCTION - } + return qk_dot_<4>(q, k); +#endif // defined MMHA_USE_HMMA_FOR_REDUCTION + } }; //////////////////////////////////////////////////////////////////////////////////////////////////// -template< int WARPS_PER_BLOCK, int WARP_SIZE = 32 > -inline __device__ float block_sum(float *red_smem, float sum) { +template +inline __device__ float block_sum(float* red_smem, float sum) +{ - // Decompose the thread index into warp / lane. - int warp = threadIdx.x / WARP_SIZE; - int lane = threadIdx.x % WARP_SIZE; + // Decompose the thread index into warp / lane. + int warp = threadIdx.x / WARP_SIZE; + int lane = threadIdx.x % WARP_SIZE; - // Compute the sum per warp. - #pragma unroll - for( int mask = WARP_SIZE / 2; mask >= 1; mask /= 2 ) { - sum += __shfl_xor_sync(uint32_t(-1), sum, mask); - } +// Compute the sum per warp. +#pragma unroll + for (int mask = WARP_SIZE / 2; mask >= 1; mask /= 2) { + sum += __shfl_xor_sync(uint32_t(-1), sum, mask); + } - // Warp leaders store the data to shared memory. - if( lane == 0 ) { - red_smem[warp] = sum; - } + // Warp leaders store the data to shared memory. + if (lane == 0) { + red_smem[warp] = sum; + } - // Make sure the data is in shared memory. - __syncthreads(); + // Make sure the data is in shared memory. + __syncthreads(); - // The warps compute the final sums. - if( lane < WARPS_PER_BLOCK ) { - sum = red_smem[lane]; - } + // The warps compute the final sums. + if (lane < WARPS_PER_BLOCK) { + sum = red_smem[lane]; + } - // Parallel reduction inside the warp. - #pragma unroll - for( int mask = WARPS_PER_BLOCK / 2; mask >= 1; mask /= 2 ) { - sum += __shfl_xor_sync(uint32_t(-1), sum, mask); - } +// Parallel reduction inside the warp. +#pragma unroll + for (int mask = WARPS_PER_BLOCK / 2; mask >= 1; mask /= 2) { + sum += __shfl_xor_sync(uint32_t(-1), sum, mask); + } - // Broadcast to other threads. - return __shfl_sync(uint32_t(-1), sum, 0); + // Broadcast to other threads. + return __shfl_sync(uint32_t(-1), sum, 0); } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ void convert_from_float(float &dst, float src) { - dst = src; +inline __device__ void convert_from_float(float& dst, float src) +{ + dst = src; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ void convert_from_float(uint16_t &dst, float src) { - dst = float_to_half(src); +inline __device__ void convert_from_float(uint16_t& dst, float src) +{ + dst = float_to_half(src); } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ void convert_from_float(uint32_t &dst, float2 src) { - dst = float2_to_half2(src); +inline __device__ void convert_from_float(uint32_t& dst, float2 src) +{ + dst = float2_to_half2(src); } //////////////////////////////////////////////////////////////////////////////////////////////////// +#ifdef ENABLE_BF16 +inline __device__ void convert_from_float(__nv_bfloat16& dst, float src) +{ + dst = __float2bfloat16(src); +} -inline __device__ void convert_from_float(uint2 &dst, Float4_ src) { - dst.x = float2_to_half2(src.x); - dst.y = float2_to_half2(src.y); +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ void convert_from_float(__nv_bfloat162& dst, float2 src) +{ +#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 800 + dst = __float22bfloat162_rn(src); +#else + dst = __floats2bfloat162_rn(src.x, src.y); +#endif +} +#endif // ENABLE_BF16 +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ void convert_from_float(uint2& dst, Float4_ src) +{ + dst.x = float2_to_half2(src.x); + dst.y = float2_to_half2(src.y); } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ void convert_from_float(uint4 &dst, Float8_ src) { - dst.x = float2_to_half2(src.x); - dst.y = float2_to_half2(src.y); - dst.z = float2_to_half2(src.z); - dst.w = float2_to_half2(src.w); +inline __device__ void convert_from_float(uint4& dst, Float8_ src) +{ + dst.x = float2_to_half2(src.x); + dst.y = float2_to_half2(src.y); + dst.z = float2_to_half2(src.z); + dst.w = float2_to_half2(src.w); } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ void convert_from_float(float2 &dst, float2 src) { - dst = src; +#ifdef ENABLE_BF16 +inline __device__ void convert_from_float(bf16_4_t& dst, Float4_ src) +{ +#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 800 + dst.x = __float22bfloat162_rn(src.x); + dst.y = __float22bfloat162_rn(src.y); +#else + dst.x = __floats2bfloat162_rn(src.x.x, src.x.y); + dst.y = __floats2bfloat162_rn(src.y.x, src.y.y); +#endif } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ void convert_from_float(float4 &dst, float4 src) { - dst = src; +inline __device__ void convert_from_float(bf16_8_t& dst, Float8_ src) +{ +#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 800 + dst.x = __float22bfloat162_rn(src.x); + dst.y = __float22bfloat162_rn(src.y); + dst.z = __float22bfloat162_rn(src.z); + dst.w = __float22bfloat162_rn(src.w); +#else + dst.x = __floats2bfloat162_rn(src.x.x, src.x.y); + dst.y = __floats2bfloat162_rn(src.y.x, src.y.y); + dst.z = __floats2bfloat162_rn(src.z.x, src.z.y); + dst.w = __floats2bfloat162_rn(src.w.x, src.w.y); +#endif +} +#endif // ENABLE_BF16 + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ void convert_from_float(float2& dst, float2 src) +{ + dst = src; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float convert_to_float(float4 u) { - return u.x; +inline __device__ void convert_from_float(float4& dst, float4 src) +{ + dst = src; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float convert_to_float(uint4 u) { - float2 tmp = half2_to_float2(u.x); - return tmp.x; +inline __device__ float convert_to_float(float4 u) +{ + return u.x; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ float convert_to_float(uint4 u) +{ + float2 tmp = half2_to_float2(u.x); + return tmp.x; } #if defined(MMHA_USE_FP32_ACUM_FOR_LOGITS) //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float cast_to_float(float u) { - return u; +inline __device__ float cast_to_float(float u) +{ + return u; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float2 cast_to_float(float2 u) { - return u; +inline __device__ float2 cast_to_float(float2 u) +{ + return u; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float4 cast_to_float(float4 u) { - return u; +inline __device__ float4 cast_to_float(float4 u) +{ + return u; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ Float4_ cast_to_float(Float4_ u) { - return u; +inline __device__ Float4_ cast_to_float(Float4_ u) +{ + return u; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ Float8_ cast_to_float(Float8_ u) { - return u; +inline __device__ Float8_ cast_to_float(Float8_ u) +{ + return u; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float2 cast_to_float(uint32_t u) { - return half2_to_float2(u); +inline __device__ float2 cast_to_float(uint32_t u) +{ + return half2_to_float2(u); } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ Float4_ cast_to_float(uint2 u) { - Float4_ tmp; - tmp.x = half2_to_float2(u.x); - tmp.y = half2_to_float2(u.y); - return tmp; +inline __device__ Float4_ cast_to_float(uint2 u) +{ + Float4_ tmp; + tmp.x = half2_to_float2(u.x); + tmp.y = half2_to_float2(u.y); + return tmp; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ Float8_ cast_to_float(uint4 u) { - Float8_ tmp; - tmp.x = half2_to_float2(u.x); - tmp.y = half2_to_float2(u.y); - tmp.z = half2_to_float2(u.z); - tmp.w = half2_to_float2(u.w); - return tmp; +inline __device__ Float8_ cast_to_float(uint4 u) +{ + Float8_ tmp; + tmp.x = half2_to_float2(u.x); + tmp.y = half2_to_float2(u.y); + tmp.z = half2_to_float2(u.z); + tmp.w = half2_to_float2(u.w); + return tmp; } #endif //////////////////////////////////////////////////////////////////////////////////////////////////// -template< typename T > -inline __device__ __host__ T div_up(T m, T n) { - return (m + n-1) / n; +template +inline __device__ __host__ T div_up(T m, T n) +{ + return (m + n - 1) / n; } //////////////////////////////////////////////////////////////////////////////////////////////////// -template< typename T , bool DO_CROSS_ATTENTION> -inline size_t smem_size_in_bytes(const Multihead_attention_params ¶ms, - int threads_per_value, - int threads_per_block) { - // The amount of shared memory needed to store the Q*K^T values in float. - // TODO - size_t qk_sz = (DO_CROSS_ATTENTION)? div_up(params.seq_length + 1, 4) * 16 - : div_up(params.timestep + 1, 4) * 16; - - // The extra memory needed if we are not using floats for the final logits. - size_t logits_sz = 0; +template +inline size_t smem_size_in_bytes(const Multihead_attention_params& params, + int threads_per_value, + int threads_per_block) +{ + // The amount of shared memory needed to store the Q*K^T values in float. + // TODO + size_t qk_sz = (DO_CROSS_ATTENTION) ? div_up(params.seq_length + 1, 4) * 16 : div_up(params.timestep + 1, 4) * 16; + + // The extra memory needed if we are not using floats for the final logits. + size_t logits_sz = 0; #ifndef MMHA_USE_FP32_ACUM_FOR_LOGITS - if( sizeof(T) != 4 ) { - // TDOD - logits_sz = div_up(params.seq_length, 4) * 4 * sizeof(T); - } + if (sizeof(T) != 4) { + // TDOD + logits_sz = div_up(params.seq_length, 4) * 4 * sizeof(T); + } #endif - // The total size needed during softmax. - size_t softmax_sz = qk_sz + logits_sz; + // The total size needed during softmax. + size_t softmax_sz = qk_sz + logits_sz; - // The number of partial rows to reduce in the final reduction. - int rows_per_red = threads_per_block / threads_per_value; - // The amount of storage needed to finalize the outputs. - size_t red_sz = rows_per_red * params.hidden_size_per_head * sizeof(T) / 2; + // The number of partial rows to reduce in the final reduction. + int rows_per_red = threads_per_block / threads_per_value; + // The amount of storage needed to finalize the outputs. + size_t red_sz = rows_per_red * params.hidden_size_per_head * sizeof(T) / 2; - // The max. - return max(softmax_sz, red_sz); + // The max. + return max(softmax_sz, red_sz); } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ constexpr uint32_t shfl_mask(int threads) { - return threads == 32 ? uint32_t(-1) : (1u << threads) - 1u; +inline __device__ constexpr uint32_t shfl_mask(int threads) +{ + return threads == 32 ? uint32_t(-1) : (1u << threads) - 1u; } //////////////////////////////////////////////////////////////////////////////////////////////////// template< - // The type of the inputs. Supported types: float and half. - typename T, - // The hidden dimension per head. - int Dh, - int Dh_MAX, - // The number of threads per key. - int THREADS_PER_KEY, - // The number of threads per value. - int THREADS_PER_VALUE, - // The number of threads in a threadblock. - int THREADS_PER_BLOCK, - bool DO_CROSS_ATTENTION -> -__global__ void masked_multihead_attention_kernel(Multihead_attention_params params) { - - // Make sure the hidden dimension per head is a multiple of the number of threads per key. - static_assert(Dh_MAX % THREADS_PER_KEY == 0, ""); - // Make sure the hidden dimension per head is a multiple of the number of threads per value. - static_assert(Dh_MAX % THREADS_PER_VALUE == 0, ""); - - // The size of a warp. - constexpr int WARP_SIZE = 32; - // The number of warps in a threadblock. - constexpr int WARPS_PER_BLOCK = THREADS_PER_BLOCK / WARP_SIZE; - - // Use smem_size_in_bytes (above) to determine the amount of shared memory. - extern __shared__ char smem_[]; - - // The shared memory for the Q*K^T values and partial logits in softmax. - float *qk_smem = reinterpret_cast(smem_); - - // The shared memory for the logits. For FP32, that's the same buffer as qk_smem. - char *logits_smem_ = smem_; + // The type of the inputs. Supported types: float and half. + typename T, + // The hidden dimension per head. + int Dh, + int Dh_MAX, + // The number of threads per key. + int THREADS_PER_KEY, + // The number of threads per value. + int THREADS_PER_VALUE, + // The number of threads in a threadblock. + int THREADS_PER_BLOCK, + bool DO_CROSS_ATTENTION> +__global__ void masked_multihead_attention_kernel(Multihead_attention_params params) +{ + + // Make sure the hidden dimension per head is a multiple of the number of threads per key. + static_assert(Dh_MAX % THREADS_PER_KEY == 0, ""); + // Make sure the hidden dimension per head is a multiple of the number of threads per value. + static_assert(Dh_MAX % THREADS_PER_VALUE == 0, ""); + + // The size of a warp. + constexpr int WARP_SIZE = 32; + // The number of warps in a threadblock. + constexpr int WARPS_PER_BLOCK = THREADS_PER_BLOCK / WARP_SIZE; + + // Use smem_size_in_bytes (above) to determine the amount of shared memory. + extern __shared__ char smem_[]; + + // The shared memory for the Q*K^T values and partial logits in softmax. + float* qk_smem = reinterpret_cast(smem_); + + // The shared memory for the logits. For FP32, that's the same buffer as qk_smem. + char* logits_smem_ = smem_; #ifndef MMHA_USE_FP32_ACUM_FOR_LOGITS - if (sizeof(T) != 4 ) { - // TODO - cahnge to tlength - logits_smem_ += (DO_CROSS_ATTENTION)? div_up(params.seq_length + 1, 4) * 16 - : div_up(params.timestep + 1, 4) * 16; - } - T *logits_smem = reinterpret_cast(logits_smem_); + if (sizeof(T) != 4) { + // TODO - cahnge to tlength + logits_smem_ += + (DO_CROSS_ATTENTION) ? div_up(params.seq_length + 1, 4) * 16 : div_up(params.timestep + 1, 4) * 16; + } + T* logits_smem = reinterpret_cast(logits_smem_); #else - float *logits_smem = reinterpret_cast(logits_smem_); + float* logits_smem = reinterpret_cast(logits_smem_); #endif - // The shared memory to do the final reduction for the output values. Reuse qk_smem. - T *out_smem = reinterpret_cast(smem_); - - // The shared memory buffers for the block-wide reductions. One for max, one for sum. - __shared__ float red_smem[WARPS_PER_BLOCK * 2]; - - // A vector of Q or K elements for the current timestep. - using Qk_vec = typename Qk_vec_::Type; - - // Use alignment for safely casting the shared buffers as Qk_vec. - // Shared memory to store Q inputs. - __shared__ __align__(sizeof(Qk_vec)) T q_smem[Dh_MAX]; - - // This is one of the reasons we should have a separate kernel for cross attention - __shared__ __align__(sizeof(Qk_vec)) T bias_smem[DO_CROSS_ATTENTION? Dh_MAX : 1]; - - // A vector of Q or K elements for the current timestep. - using Qk_vec = typename Qk_vec_::Type; - // The number of elements per vector. - constexpr int QK_VEC_SIZE = sizeof(Qk_vec) / sizeof(T); - // Make sure the hidden size per head is a multiple of the vector size. - static_assert(Dh_MAX % QK_VEC_SIZE == 0, ""); - // We will use block wide reduction if needed - //static_assert(Dh_MAX / QK_VEC_SIZE <= WARP_SIZE, ""); - // The number of vectors per warp. - constexpr int QK_VECS_PER_WARP = Dh_MAX / QK_VEC_SIZE; - - // The layout of the cache is [B, H, Dh/x, L, x] with x == 4/8 for FP32/FP16. Since each thread - // owns x elements, we have to decompose the linear index into chunks of x values and the posi- - // tion of the thread in that chunk. - - // The number of elements in a chunk of 16B (that's the x in the above formula). - constexpr int QK_ELTS_IN_16B = 16 / sizeof(T); - // The number of K vectors in 16B. - constexpr int QK_VECS_IN_16B = 16 / sizeof(Qk_vec); - - // The batch. - const int bi = blockIdx.y; - if(params.finished != nullptr && params.finished[bi] == true) return; - // The head. - const int hi = blockIdx.x; - // Combine the batch and the head indices. - const int bhi = bi * params.num_heads + hi; - // The thread in the block. - const int tidx = threadIdx.x; - - // While doing the product Q*K^T for the different keys we track the max. - float qk_max = -FLT_MAX; - - float qk = 0.0F; - - int qkv_base_offset = (params.stride == 0)? bhi*Dh : bi*params.stride + hi*Dh; - - // int tlength = (DO_CROSS_ATTENTION)? params.memory_length_per_sample[bi] - 1 : params.timestep; - int tlength = (DO_CROSS_ATTENTION)? params.memory_length_per_sample[bi] - 1 : - (params.length_per_sample == nullptr) ? params.timestep : params.length_per_sample[bi]; - // First QK_VECS_PER_WARP load Q and K + the bias values for the current timestep. - if( tidx < QK_VECS_PER_WARP ) { - - // The offset in the Q and K buffer also accounts for the batch. - int qk_offset = qkv_base_offset + tidx*QK_VEC_SIZE; - // The offset in the bias buffer. - int qk_bias_offset = hi*Dh + tidx*QK_VEC_SIZE; - - // Trigger the loads from the Q and K buffers. - Qk_vec q; zero(q); q = (Dh == Dh_MAX || tidx*QK_VEC_SIZE < Dh)? - *reinterpret_cast(¶ms.q[qk_offset]) : q; - Qk_vec k; zero(k); - if (DO_CROSS_ATTENTION) { - // The 16B chunk written by the thread. - int co = tidx / QK_VECS_IN_16B; - // The position of the thread in that 16B chunk. - int ci = tidx % QK_VECS_IN_16B * QK_VEC_SIZE; - - // Two chunks are separated by L * x elements. A thread write QK_VEC_SIZE elements. - int offset = bhi*params.seq_length*Dh + - co*params.seq_length*QK_ELTS_IN_16B + - //params.timestep*QK_ELTS_IN_16B + - tlength*QK_ELTS_IN_16B + - ci; - k = (Dh == Dh_MAX || tidx*QK_VEC_SIZE < Dh)? - *reinterpret_cast(¶ms.k_cache[offset]) : k; - } else { - k = (Dh == Dh_MAX || tidx*QK_VEC_SIZE < Dh)? - *reinterpret_cast(¶ms.k[qk_offset]) : k; + // The shared memory to do the final reduction for the output values. Reuse qk_smem. + T* out_smem = reinterpret_cast(smem_); + + // The shared memory buffers for the block-wide reductions. One for max, one for sum. + __shared__ float red_smem[WARPS_PER_BLOCK * 2]; + + // A vector of Q or K elements for the current timestep. + using Qk_vec = typename Qk_vec_::Type; + + // Use alignment for safely casting the shared buffers as Qk_vec. + // Shared memory to store Q inputs. + __shared__ __align__(sizeof(Qk_vec)) T q_smem[Dh_MAX]; + + // This is one of the reasons we should have a separate kernel for cross attention + __shared__ __align__(sizeof(Qk_vec)) T bias_smem[DO_CROSS_ATTENTION ? Dh_MAX : 1]; + + // A vector of Q or K elements for the current timestep. + using Qk_vec = typename Qk_vec_::Type; + // The number of elements per vector. + constexpr int QK_VEC_SIZE = sizeof(Qk_vec) / sizeof(T); + // Make sure the hidden size per head is a multiple of the vector size. + static_assert(Dh_MAX % QK_VEC_SIZE == 0, ""); + // We will use block wide reduction if needed + // static_assert(Dh_MAX / QK_VEC_SIZE <= WARP_SIZE, ""); + // The number of vectors per warp. + constexpr int QK_VECS_PER_WARP = Dh_MAX / QK_VEC_SIZE; + + // The layout of the cache is [B, H, Dh/x, L, x] with x == 4/8 for FP32/FP16. Since each thread + // owns x elements, we have to decompose the linear index into chunks of x values and the posi- + // tion of the thread in that chunk. + + // The number of elements in a chunk of 16B (that's the x in the above formula). + constexpr int QK_ELTS_IN_16B = 16 / sizeof(T); + // The number of K vectors in 16B. + constexpr int QK_VECS_IN_16B = 16 / sizeof(Qk_vec); + + // The batch/beam idx + const int bi = blockIdx.y; + if (params.finished != nullptr && params.finished[bi] == true) { + return; } + // The beam idx + const int beami = bi % params.beam_width; + // The "beam-aware" batch idx + const int bbi = bi / params.beam_width; + // The head. + const int hi = blockIdx.x; + // Combine the batch and the head indices. + const int bhi = bi * params.num_heads + hi; + // Combine the "beam-aware" batch idx and the head indices. + const int bbhi = bbi * params.beam_width * params.num_heads + hi; + // The thread in the block. + const int tidx = threadIdx.x; + + // While doing the product Q*K^T for the different keys we track the max. + float qk_max = -FLT_MAX; + + float qk = 0.0F; + + int qkv_base_offset = (params.stride == 0) ? bhi * Dh : bi * params.stride + hi * Dh; + + // int tlength = (DO_CROSS_ATTENTION)? params.memory_length_per_sample[bi] - 1 : params.timestep; + int tlength = (DO_CROSS_ATTENTION) ? params.memory_length_per_sample[bi] - 1 : + (params.length_per_sample == nullptr) ? params.timestep : + params.length_per_sample[bi]; + // First QK_VECS_PER_WARP load Q and K + the bias values for the current timestep. + if (tidx < QK_VECS_PER_WARP) { + + // The offset in the Q and K buffer also accounts for the batch. + int qk_offset = qkv_base_offset + tidx * QK_VEC_SIZE; + // The offset in the bias buffer. + int qk_bias_offset = hi * Dh + tidx * QK_VEC_SIZE; + + // Trigger the loads from the Q and K buffers. + Qk_vec q; + zero(q); + q = (Dh == Dh_MAX || tidx * QK_VEC_SIZE < Dh) ? *reinterpret_cast(¶ms.q[qk_offset]) : q; + Qk_vec k; + zero(k); + if (DO_CROSS_ATTENTION) { + // The 16B chunk written by the thread. + int co = tidx / QK_VECS_IN_16B; + // The position of the thread in that 16B chunk. + int ci = tidx % QK_VECS_IN_16B * QK_VEC_SIZE; + + // Two chunks are separated by L * x elements. A thread write QK_VEC_SIZE elements. + int offset = bhi * params.seq_length * Dh + co * params.seq_length * QK_ELTS_IN_16B + + // params.timestep*QK_ELTS_IN_16B + + tlength * QK_ELTS_IN_16B + ci; + k = (Dh == Dh_MAX || tidx * QK_VEC_SIZE < Dh) ? *reinterpret_cast(¶ms.k_cache[offset]) : + k; + } + else { + k = (Dh == Dh_MAX || tidx * QK_VEC_SIZE < Dh) ? *reinterpret_cast(¶ms.k[qk_offset]) : k; + } - // Trigger the loads from the Q and K bias buffers. - Qk_vec q_bias; zero(q_bias); - q_bias = (Dh == Dh_MAX || tidx*QK_VEC_SIZE < Dh) && params.q_bias != nullptr? - *reinterpret_cast(¶ms.q_bias[qk_bias_offset]) : q_bias; - Qk_vec k_bias; zero(k_bias); - - if (!DO_CROSS_ATTENTION || (DO_CROSS_ATTENTION && params.timestep == 0)) { - k_bias = (Dh == Dh_MAX || tidx*QK_VEC_SIZE < Dh) && params.k_bias != nullptr? - *reinterpret_cast(¶ms.k_bias[qk_bias_offset]) : k_bias; - } + // Trigger the loads from the Q and K bias buffers. + Qk_vec q_bias; + zero(q_bias); + q_bias = (Dh == Dh_MAX || tidx * QK_VEC_SIZE < Dh) && params.q_bias != nullptr ? + *reinterpret_cast(¶ms.q_bias[qk_bias_offset]) : + q_bias; + Qk_vec k_bias; + zero(k_bias); + + if (!DO_CROSS_ATTENTION || (DO_CROSS_ATTENTION && params.timestep == 0)) { + k_bias = (Dh == Dh_MAX || tidx * QK_VEC_SIZE < Dh) && params.k_bias != nullptr ? + *reinterpret_cast(¶ms.k_bias[qk_bias_offset]) : + k_bias; + } - // Computes the Q/K values with bias. - q = add(q, q_bias); - if (!DO_CROSS_ATTENTION || (DO_CROSS_ATTENTION && params.timestep == 0)) { - k = add(k, k_bias); - if (params.rotary_embedding_dim > 0) - apply_rotary_embedding(q, k, tidx, params.rotary_embedding_dim, params.timestep); - } else { - if (params.rotary_embedding_dim > 0) - apply_rotary_embedding(q, tidx, params.rotary_embedding_dim, params.timestep); - } + // Computes the Q/K values with bias. + q = add(q, q_bias); + if (!DO_CROSS_ATTENTION || (DO_CROSS_ATTENTION && params.timestep == 0)) { + k = add(k, k_bias); + if (params.rotary_embedding_dim > 0) { + apply_rotary_embedding(q, k, tidx, params.rotary_embedding_dim, params.timestep); + } + } + else { + if (params.rotary_embedding_dim > 0) { + apply_rotary_embedding(q, tidx, params.rotary_embedding_dim, params.timestep); + } + } - // Store the Q values to shared memory. - *reinterpret_cast(&q_smem[tidx*QK_VEC_SIZE]) = q; + // Store the Q values to shared memory. + *reinterpret_cast(&q_smem[tidx * QK_VEC_SIZE]) = q; - // Store Dh values of k_bias into smem, since will need to add later - // if params.timestep == 0 - if (DO_CROSS_ATTENTION && params.timestep == 0){ - *reinterpret_cast(&bias_smem[tidx*QK_VEC_SIZE]) = k_bias; - } + // Store Dh values of k_bias into smem, since will need to add later + // if params.timestep == 0 + if (DO_CROSS_ATTENTION && params.timestep == 0) { + *reinterpret_cast(&bias_smem[tidx * QK_VEC_SIZE]) = k_bias; + } - // Write the K values to the global memory cache. - // - // NOTE: The stores are uncoalesced as we have multiple chunks of 16B spread across the memory - // system. We designed it this way as it allows much better memory loads (and there are many - // more loads) + the stores are really "write and forget" since we won't need the ack before - // the end of the kernel. There's plenty of time for the transactions to complete. - - // The 16B chunk written by the thread. - int co = tidx / QK_VECS_IN_16B; - // The position of the thread in that 16B chunk. - int ci = tidx % QK_VECS_IN_16B * QK_VEC_SIZE; - - // Two chunks are separated by L * x elements. A thread write QK_VEC_SIZE elements. - int offset = bhi*params.seq_length*Dh + - co*params.seq_length*QK_ELTS_IN_16B + - //params.timestep*QK_ELTS_IN_16B + - tlength*QK_ELTS_IN_16B + - ci; - - if (!DO_CROSS_ATTENTION || (DO_CROSS_ATTENTION && params.timestep == 0)) { - // Trigger the stores to global memory. - if ( Dh == Dh_MAX || co < Dh / QK_ELTS_IN_16B) - *reinterpret_cast(¶ms.k_cache[offset]) = k; - } + // Write the K values to the global memory cache. + // + // NOTE: The stores are uncoalesced as we have multiple chunks of 16B spread across the memory + // system. We designed it this way as it allows much better memory loads (and there are many + // more loads) + the stores are really "write and forget" since we won't need the ack before + // the end of the kernel. There's plenty of time for the transactions to complete. + + // The 16B chunk written by the thread. + int co = tidx / QK_VECS_IN_16B; + // The position of the thread in that 16B chunk. + int ci = tidx % QK_VECS_IN_16B * QK_VEC_SIZE; + + // Two chunks are separated by L * x elements. A thread write QK_VEC_SIZE elements. + int offset = bhi * params.seq_length * Dh + co * params.seq_length * QK_ELTS_IN_16B + + // params.timestep*QK_ELTS_IN_16B + + tlength * QK_ELTS_IN_16B + ci; + + if (!DO_CROSS_ATTENTION || (DO_CROSS_ATTENTION && params.timestep == 0)) { + // Trigger the stores to global memory. + if (Dh == Dh_MAX || co < Dh / QK_ELTS_IN_16B) { + *reinterpret_cast(¶ms.k_cache[offset]) = k; + } + } - // Compute \sum_i Q[i] * K^T[i] for the current timestep. + // Compute \sum_i Q[i] * K^T[i] for the current timestep. #ifdef MMHA_USE_FP32_ACUM_FOR_FMA - using Qk_vec_acum = typename Qk_vec_acum_fp32_::Type; + using Qk_vec_acum = typename Qk_vec_acum_fp32_::Type; #else - using Qk_vec_acum = Qk_vec; + using Qk_vec_acum = Qk_vec; #endif - qk = dot(q, k); - if (QK_VECS_PER_WARP <= WARP_SIZE) { - #pragma unroll - for( int mask = QK_VECS_PER_WARP / 2; mask >= 1; mask /= 2 ) { - qk += __shfl_xor_sync(shfl_mask(QK_VECS_PER_WARP), qk, mask); - } - } - } - - if (QK_VECS_PER_WARP > WARP_SIZE) { - constexpr int WARPS_PER_RED = (QK_VECS_PER_WARP + WARP_SIZE - 1) / WARP_SIZE; - qk = block_sum(&red_smem[WARPS_PER_RED], qk); - } - - // Store that value in shared memory. Keep the Q*K^T value in register for softmax. - if( tidx == 0 ) { - // Normalize qk. - qk *= params.inv_sqrt_dh; - - if(params.relative_attention_bias_float != nullptr) { - qk = qk + params.relative_attention_bias_float[hi * params.relative_attention_bias_stride * params.relative_attention_bias_stride - + tlength * params.relative_attention_bias_stride + tlength]; - } - else if(params.relative_attention_bias_half != nullptr) { - qk = qk + (float)params.relative_attention_bias_half[hi * params.relative_attention_bias_stride * params.relative_attention_bias_stride - + tlength * params.relative_attention_bias_stride + tlength]; + qk = dot(q, k); + if (QK_VECS_PER_WARP <= WARP_SIZE) { +#pragma unroll + for (int mask = QK_VECS_PER_WARP / 2; mask >= 1; mask /= 2) { + qk += __shfl_xor_sync(shfl_mask(QK_VECS_PER_WARP), qk, mask); + } + } } - qk_max = qk; - qk_smem[tlength] = qk; - //qk_smem[params.timestep] = qk; - } - - // Make sure the data is in shared memory. - __syncthreads(); - - // The type of queries and keys for the math in the Q*K^T product. - using K_vec = typename K_vec_::Type; - // The number of elements per vector. - constexpr int K_VEC_SIZE = sizeof(K_vec) / sizeof(T); - // Make sure the hidden size per head is a multiple of the vector size. - static_assert(Dh_MAX % K_VEC_SIZE == 0, ""); - // The number of elements per thread. - constexpr int K_ELTS_PER_THREAD = Dh_MAX / THREADS_PER_KEY; - // The number of vectors per thread. - constexpr int K_VECS_PER_THREAD = K_ELTS_PER_THREAD / K_VEC_SIZE; - - // The position the first key loaded by each thread from the cache buffer (for this B * H). - int ko = tidx / THREADS_PER_KEY; - // The position of the thread in the chunk of keys. - int ki = tidx % THREADS_PER_KEY * K_VEC_SIZE; - - static_assert(Dh_MAX == THREADS_PER_KEY*K_VEC_SIZE*K_VECS_PER_THREAD); - - // Load the Q values from shared memory. The values are reused during the loop on K. - K_vec q[K_VECS_PER_THREAD]; - #pragma unroll - for( int ii = 0; ii < K_VECS_PER_THREAD; ++ii ) { - q[ii] = *reinterpret_cast(&q_smem[ki + ii*THREADS_PER_KEY*K_VEC_SIZE]); - } - - K_vec k_bias[DO_CROSS_ATTENTION?K_VECS_PER_THREAD:1]; - if (DO_CROSS_ATTENTION && params.timestep == 0) { - #pragma unroll - for( int ii = 0; ii < K_VECS_PER_THREAD; ++ii ) { - k_bias[ii] = *reinterpret_cast(&bias_smem[ki + ii*THREADS_PER_KEY*K_VEC_SIZE]); + + if (QK_VECS_PER_WARP > WARP_SIZE) { + constexpr int WARPS_PER_RED = (QK_VECS_PER_WARP + WARP_SIZE - 1) / WARP_SIZE; + qk = block_sum(&red_smem[WARPS_PER_RED], qk); } - } - - // The number of timesteps loaded per iteration. - constexpr int K_PER_ITER = THREADS_PER_BLOCK / THREADS_PER_KEY; - // The number of keys per warp. - constexpr int K_PER_WARP = WARP_SIZE / THREADS_PER_KEY; - - // The base pointer for the key in the cache buffer. - T *k_cache = ¶ms.k_cache[bhi*params.seq_length*Dh + ki]; - - // Pick a number of keys to make sure all the threads of a warp enter (due to shfl_sync). - //int ti_end = div_up(params.timestep, K_PER_WARP) * K_PER_WARP; - int ti_end = div_up(tlength, K_PER_WARP) * K_PER_WARP; - - // Iterate over the keys/timesteps to compute the various (Q*K^T)_{ti} values. - for( int ti = ko; ti < ti_end; ti += K_PER_ITER ) { - - // The keys loaded from the key cache. - K_vec k[K_VECS_PER_THREAD]; - K_vec k_vec_zero; zero(k_vec_zero); - #pragma unroll - for( int ii = 0; ii < K_VECS_PER_THREAD; ++ii ) { - int jj = ii * params.seq_length + ti; - //if( ti < params.timestep ) { - if( ti < tlength ) { - k[ii] = (Dh == Dh_MAX || jj*QK_ELTS_IN_16B < Dh * params.seq_length)? - *reinterpret_cast(&k_cache[jj*QK_ELTS_IN_16B]) : k_vec_zero; - // add bias and update k_cache - if (DO_CROSS_ATTENTION && params.timestep == 0) { - k[ii] = add(k[ii], k_bias[ii]); - if (Dh == Dh_MAX || jj*QK_ELTS_IN_16B < Dh * params.seq_length) - *reinterpret_cast(&k_cache[jj*QK_ELTS_IN_16B]) = k[ii]; + + // Store that value in shared memory. Keep the Q*K^T value in register for softmax. + if (tidx == 0) { + // Normalize qk. + qk *= params.inv_sqrt_dh; + + if (params.relative_attention_bias_float != nullptr) { + qk = qk + + params.relative_attention_bias_float[hi * params.relative_attention_bias_stride + * params.relative_attention_bias_stride + + tlength * params.relative_attention_bias_stride + tlength]; + } + else if (params.relative_attention_bias_half != nullptr) { + qk = qk + + (float) + params.relative_attention_bias_half[hi * params.relative_attention_bias_stride + * params.relative_attention_bias_stride + + tlength * params.relative_attention_bias_stride + tlength]; } - } + qk_max = qk; + qk_smem[tlength] = qk; + // qk_smem[params.timestep] = qk; + } + + // Make sure the data is in shared memory. + __syncthreads(); + + // The type of queries and keys for the math in the Q*K^T product. + using K_vec = typename K_vec_::Type; + // The number of elements per vector. + constexpr int K_VEC_SIZE = sizeof(K_vec) / sizeof(T); + // Make sure the hidden size per head is a multiple of the vector size. + static_assert(Dh_MAX % K_VEC_SIZE == 0, ""); + // The number of elements per thread. + constexpr int K_ELTS_PER_THREAD = Dh_MAX / THREADS_PER_KEY; + // The number of vectors per thread. + constexpr int K_VECS_PER_THREAD = K_ELTS_PER_THREAD / K_VEC_SIZE; + + // The position the first key loaded by each thread from the cache buffer (for this B * H). + int ko = tidx / THREADS_PER_KEY; + // The position of the thread in the chunk of keys. + int ki = tidx % THREADS_PER_KEY * K_VEC_SIZE; + + static_assert(Dh_MAX == THREADS_PER_KEY * K_VEC_SIZE * K_VECS_PER_THREAD); + + // Load the Q values from shared memory. The values are reused during the loop on K. + K_vec q[K_VECS_PER_THREAD]; +#pragma unroll + for (int ii = 0; ii < K_VECS_PER_THREAD; ++ii) { + q[ii] = *reinterpret_cast(&q_smem[ki + ii * THREADS_PER_KEY * K_VEC_SIZE]); } - // Perform the dot product and normalize qk. - // - // WARNING: ALL THE THREADS OF A WARP MUST ENTER!!! - float qk = Qk_dot::dot(q, k) * params.inv_sqrt_dh; - bool is_mask = (params.input_lengths != nullptr && ti >= params.input_lengths[bi] && ti < params.max_input_len); - - // Store the product to shared memory. There's one qk value per timestep. Update the max. - //if( ti < params.timestep && tidx % THREADS_PER_KEY == 0 ) { - if( ti < tlength && tidx % THREADS_PER_KEY == 0 ) { - if(params.relative_attention_bias_float != nullptr) { - qk = qk + params.relative_attention_bias_float[hi * params.relative_attention_bias_stride * params.relative_attention_bias_stride - + tlength * params.relative_attention_bias_stride + ti]; - } - else if(params.relative_attention_bias_half != nullptr) { - qk = qk + (float)params.relative_attention_bias_half[hi * params.relative_attention_bias_stride * params.relative_attention_bias_stride - + tlength * params.relative_attention_bias_stride + ti]; - } - qk_max = is_mask ? qk_max : fmaxf(qk_max, qk); - qk_smem[ti] = qk; + K_vec k_bias[DO_CROSS_ATTENTION ? K_VECS_PER_THREAD : 1]; + if (DO_CROSS_ATTENTION && params.timestep == 0) { +#pragma unroll + for (int ii = 0; ii < K_VECS_PER_THREAD; ++ii) { + k_bias[ii] = *reinterpret_cast(&bias_smem[ki + ii * THREADS_PER_KEY * K_VEC_SIZE]); + } } - } - - // Perform the final reduction to compute the max inside each warp. - // - // NOTE: In a group of THREADS_PER_KEY threads, the leader already has the max value for the - // group so it's not needed to run the reduction inside the group (again). - #pragma unroll - for( int mask = WARP_SIZE / 2; mask >= THREADS_PER_KEY; mask /= 2 ) { - qk_max = fmaxf(qk_max, __shfl_xor_sync(uint32_t(-1), qk_max, mask)); - } - - // Decompose the thread index into warp and lane. - const int warp = tidx / WARP_SIZE; - const int lane = tidx % WARP_SIZE; - - // The warp leader writes the max to shared memory. - if( lane == 0 ) { - red_smem[warp] = qk_max; - } - - // Make sure the products are in shared memory. - __syncthreads(); - - // The warps finalize the reduction. - qk_max = lane < WARPS_PER_BLOCK ? red_smem[lane] : -FLT_MAX; - #pragma unroll - for( int mask = WARPS_PER_BLOCK / 2; mask >= 1; mask /= 2 ) { - qk_max = fmaxf(qk_max, __shfl_xor_sync(uint32_t(-1), qk_max, mask)); - } - - // Broadcast to all the threads in the warp. - qk_max = __shfl_sync(uint32_t(-1), qk_max, 0); - - // Compute the logits and start the sum. - float sum = 0.f; - //for( int ti = tidx; ti <= params.timestep; ti += THREADS_PER_BLOCK ) { - for( int ti = tidx; ti <= tlength; ti += THREADS_PER_BLOCK ) { - bool is_mask = (params.input_lengths != nullptr && ti >= params.input_lengths[bi] && ti < params.max_input_len); - float logit = is_mask? 0.f : __expf(qk_smem[ti] - qk_max); - sum += logit; - qk_smem[ti] = logit; - } - - // Compute the sum. - sum = block_sum(&red_smem[WARPS_PER_BLOCK], sum); - - // Normalize the logits. - float inv_sum = __fdividef(1.f, sum + 1.e-6f); - //for( int ti = tidx; ti <= params.timestep; ti += THREADS_PER_BLOCK ) { - for( int ti = tidx; ti <= tlength; ti += THREADS_PER_BLOCK ) { - convert_from_float(logits_smem[ti], qk_smem[ti] * inv_sum); - } - - // Put Values part below so we leverage __syncthreads - // from the previous step - - // The number of elements per vector. - constexpr int V_VEC_SIZE = Dh_MAX / THREADS_PER_VALUE; - // A vector of V elements for the current timestep. - using V_vec = typename V_vec_::Type; - - // The value computed by this thread. - int vo = tidx / THREADS_PER_VALUE; - // The hidden dimensions computed by this particular thread. - int vi = tidx % THREADS_PER_VALUE * V_VEC_SIZE; - - // The base pointer for the value in the cache buffer. - T *v_cache = ¶ms.v_cache[bhi*params.seq_length*Dh + vi]; - - // The number of values processed per iteration of the loop. - constexpr int V_PER_ITER = THREADS_PER_BLOCK / THREADS_PER_VALUE; - - // One group of threads computes the product(s) for the current timestep. - V_vec v_bias; zero(v_bias); - //if( vo == params.timestep % V_PER_ITER ) { - if (Dh == Dh_MAX || vi < Dh) { - if (!DO_CROSS_ATTENTION || (DO_CROSS_ATTENTION && params.timestep == 0)) { - if( vo == tlength % V_PER_ITER ) { - // Trigger the loads from the V bias buffer. - if (params.v_bias != nullptr) { - v_bias = *reinterpret_cast(¶ms.v_bias[hi*Dh + vi]); + + // The number of timesteps loaded per iteration. + constexpr int K_PER_ITER = THREADS_PER_BLOCK / THREADS_PER_KEY; + // The number of keys per warp. + constexpr int K_PER_WARP = WARP_SIZE / THREADS_PER_KEY; + + // The base pointer for the key in the cache buffer. + T* k_cache = ¶ms.k_cache[bhi * params.seq_length * Dh + ki]; + // Base pointer for the beam's batch, before offsetting with indirection buffer + T* k_cache_batch = ¶ms.k_cache[bbhi * params.seq_length * Dh + ki]; + + // Pick a number of keys to make sure all the threads of a warp enter (due to shfl_sync). + // int ti_end = div_up(params.timestep, K_PER_WARP) * K_PER_WARP; + int ti_end = div_up(tlength, K_PER_WARP) * K_PER_WARP; + + // Iterate over the keys/timesteps to compute the various (Q*K^T)_{ti} values. + for (int ti = ko; ti < ti_end; ti += K_PER_ITER) { + + // The keys loaded from the key cache. + K_vec k[K_VECS_PER_THREAD]; + K_vec k_vec_zero; + zero(k_vec_zero); +#pragma unroll + for (int ii = 0; ii < K_VECS_PER_THREAD; ++ii) { + int jj = ii * params.seq_length + ti; + // if( ti < params.timestep ) { + if (ti < tlength) { + const int beam_src = + (params.cache_indir != nullptr) ? + params.cache_indir[(bbi * params.beam_width + beami) * params.seq_length + ti] : + 0; + const int beam_offset = beam_src * params.num_heads * params.seq_length * Dh; + k[ii] = (Dh == Dh_MAX || jj * QK_ELTS_IN_16B < Dh * params.seq_length) ? + *reinterpret_cast(&k_cache_batch[beam_offset + jj * QK_ELTS_IN_16B]) : + k_vec_zero; + // add bias and update k_cache + if (DO_CROSS_ATTENTION && params.timestep == 0) { + k[ii] = add(k[ii], k_bias[ii]); + if (Dh == Dh_MAX || jj * QK_ELTS_IN_16B < Dh * params.seq_length) { + *reinterpret_cast(&k_cache[jj * QK_ELTS_IN_16B]) = k[ii]; + } + } + } } - if (DO_CROSS_ATTENTION) - { - *reinterpret_cast(&bias_smem[vi]) = v_bias; + + // Perform the dot product and normalize qk. + // + // WARNING: ALL THE THREADS OF A WARP MUST ENTER!!! + float qk = Qk_dot::dot(q, k) * params.inv_sqrt_dh; + bool is_mask = (params.input_lengths != nullptr && ti >= params.input_lengths[bi] && ti < params.max_input_len); + + // Store the product to shared memory. There's one qk value per timestep. Update the max. + // if( ti < params.timestep && tidx % THREADS_PER_KEY == 0 ) { + if (ti < tlength && tidx % THREADS_PER_KEY == 0) { + if (params.relative_attention_bias_float != nullptr) { + qk = qk + + params.relative_attention_bias_float[hi * params.relative_attention_bias_stride + * params.relative_attention_bias_stride + + tlength * params.relative_attention_bias_stride + ti]; + } + else if (params.relative_attention_bias_half != nullptr) { + qk = qk + + (float) + params.relative_attention_bias_half[hi * params.relative_attention_bias_stride + * params.relative_attention_bias_stride + + tlength * params.relative_attention_bias_stride + ti]; + } + qk_max = is_mask ? qk_max : fmaxf(qk_max, qk); + qk_smem[ti] = qk; } - } } - } - // From previous, before values, step - // Also make sure the logits are in shared memory. - __syncthreads(); +// Perform the final reduction to compute the max inside each warp. +// +// NOTE: In a group of THREADS_PER_KEY threads, the leader already has the max value for the +// group so it's not needed to run the reduction inside the group (again). +#pragma unroll + for (int mask = WARP_SIZE / 2; mask >= THREADS_PER_KEY; mask /= 2) { + qk_max = fmaxf(qk_max, __shfl_xor_sync(uint32_t(-1), qk_max, mask)); + } + + // Decompose the thread index into warp and lane. + const int warp = tidx / WARP_SIZE; + const int lane = tidx % WARP_SIZE; - // Values continued -#ifdef MMHA_USE_FP32_ACUM_FOR_OUT - using V_vec_acum = typename V_vec_acum_fp32_::Type; -#else - using V_vec_acum = V_vec; -#endif - // The partial outputs computed by each thread. - V_vec_acum out; zero(out); - - // Loop over the timesteps to compute the partial outputs. - //for( int ti = vo; ti < params.timestep; ti += V_PER_ITER ) { - if (Dh == Dh_MAX || vi < Dh) { - for( int ti = vo; ti < tlength; ti += V_PER_ITER ) { - - // Load the values from the cache. - V_vec v = *reinterpret_cast(&v_cache[ti*Dh]); - if (DO_CROSS_ATTENTION && params.timestep == 0) { - v = add(v, *reinterpret_cast(&bias_smem[vi])); - *reinterpret_cast(&v_cache[ti*Dh]) = v; - } - // Load the logits from shared memory. - #if defined(MMHA_USE_FP32_ACUM_FOR_LOGITS) - float logit = logits_smem[ti]; - out = fma(logit, cast_to_float(v), out); - #else - T logit = logits_smem[ti]; - - // Update the partial sums. - out = fma(logit, v, out); - #endif + // The warp leader writes the max to shared memory. + if (lane == 0) { + red_smem[warp] = qk_max; } - } - - // One group of threads computes the product(s) for the current timestep. - //if( vo == params.timestep % V_PER_ITER ) { - if( vo == tlength % V_PER_ITER && (Dh == Dh_MAX || vi < Dh)) { - - V_vec v; - if (DO_CROSS_ATTENTION){ - v = *reinterpret_cast(&v_cache[tlength*Dh]); - } else { - // Trigger the loads from the V buffer. - v = *reinterpret_cast(¶ms.v[qkv_base_offset + vi]); - // Trigger the loads from the V bias buffer. - //V_vec v_bias = *reinterpret_cast(¶ms.v_bias[hi*Dh + vi]); + + // Make sure the products are in shared memory. + __syncthreads(); + + // The warps finalize the reduction. + qk_max = lane < WARPS_PER_BLOCK ? red_smem[lane] : -FLT_MAX; +#pragma unroll + for (int mask = WARPS_PER_BLOCK / 2; mask >= 1; mask /= 2) { + qk_max = fmaxf(qk_max, __shfl_xor_sync(uint32_t(-1), qk_max, mask)); + } + + // Broadcast to all the threads in the warp. + qk_max = __shfl_sync(uint32_t(-1), qk_max, 0); + + // Compute the logits and start the sum. + float sum = 0.f; + // for( int ti = tidx; ti <= params.timestep; ti += THREADS_PER_BLOCK ) { + for (int ti = tidx; ti <= tlength; ti += THREADS_PER_BLOCK) { + bool is_mask = (params.input_lengths != nullptr && ti >= params.input_lengths[bi] && ti < params.max_input_len); + float logit = is_mask ? 0.f : __expf(qk_smem[ti] - qk_max); + sum += logit; + qk_smem[ti] = logit; } - // Compute the V values with bias. - if (!DO_CROSS_ATTENTION || (DO_CROSS_ATTENTION && params.timestep == 0)) { - v = add(v, v_bias); + // Compute the sum. + sum = block_sum(&red_smem[WARPS_PER_BLOCK], sum); - // Store the values with bias back to global memory in the cache for V. - //*reinterpret_cast(&v_cache[params.timestep*Dh]) = v; - *reinterpret_cast(&v_cache[tlength*Dh]) = v; + // Normalize the logits. + float inv_sum = __fdividef(1.f, sum + 1.e-6f); + // for( int ti = tidx; ti <= params.timestep; ti += THREADS_PER_BLOCK ) { + for (int ti = tidx; ti <= tlength; ti += THREADS_PER_BLOCK) { + convert_from_float(logits_smem[ti], qk_smem[ti] * inv_sum); } - // Initialize the output value with the current timestep. + // Put Values part below so we leverage __syncthreads + // from the previous step + + // The number of elements per vector. + constexpr int V_VEC_SIZE = Dh_MAX / THREADS_PER_VALUE; + // A vector of V elements for the current timestep. + using V_vec = typename V_vec_::Type; + + // The value computed by this thread. + int vo = tidx / THREADS_PER_VALUE; + // The hidden dimensions computed by this particular thread. + int vi = tidx % THREADS_PER_VALUE * V_VEC_SIZE; + + // The base pointer for the value in the cache buffer. + T* v_cache = ¶ms.v_cache[bhi * params.seq_length * Dh + vi]; + // Base pointer for the beam's batch, before offsetting with indirection buffer + T* v_cache_batch = ¶ms.v_cache[bbhi * params.seq_length * Dh + vi]; + + // The number of values processed per iteration of the loop. + constexpr int V_PER_ITER = THREADS_PER_BLOCK / THREADS_PER_VALUE; + + // One group of threads computes the product(s) for the current timestep. + V_vec v_bias; + zero(v_bias); + // if( vo == params.timestep % V_PER_ITER ) { + if (Dh == Dh_MAX || vi < Dh) { + if (!DO_CROSS_ATTENTION || (DO_CROSS_ATTENTION && params.timestep == 0)) { + if (vo == tlength % V_PER_ITER) { + // Trigger the loads from the V bias buffer. + if (params.v_bias != nullptr) { + v_bias = *reinterpret_cast(¶ms.v_bias[hi * Dh + vi]); + } + if (DO_CROSS_ATTENTION) { + *reinterpret_cast(&bias_smem[vi]) = v_bias; + } + } + } + } + + // From previous, before values, step + // Also make sure the logits are in shared memory. + __syncthreads(); + + // Values continued +#ifdef MMHA_USE_FP32_ACUM_FOR_OUT + using V_vec_acum = typename V_vec_acum_fp32_::Type; +#else + using V_vec_acum = V_vec; +#endif + // The partial outputs computed by each thread. + V_vec_acum out; + zero(out); + + // Loop over the timesteps to compute the partial outputs. + // for( int ti = vo; ti < params.timestep; ti += V_PER_ITER ) { + if (Dh == Dh_MAX || vi < Dh) { + for (int ti = vo; ti < tlength; ti += V_PER_ITER) { + + // Fetch offset based on cache_indir when beam sampling + const int beam_src = (params.cache_indir != nullptr) ? + params.cache_indir[(bbi * params.beam_width + beami) * params.seq_length + ti] : + 0; + const int beam_offset = beam_src * params.num_heads * params.seq_length * Dh; + // Load the values from the cache. + V_vec v = *reinterpret_cast(&v_cache_batch[beam_offset + ti * Dh]); + if (DO_CROSS_ATTENTION && params.timestep == 0) { + v = add(v, *reinterpret_cast(&bias_smem[vi])); + *reinterpret_cast(&v_cache[ti * Dh]) = v; + } + // Load the logits from shared memory. #if defined(MMHA_USE_FP32_ACUM_FOR_LOGITS) - //out = fma(logits_smem[params.timestep], cast_to_float(v), out); - out = fma(logits_smem[tlength], cast_to_float(v), out); + float logit = logits_smem[ti]; + out = fma(logit, cast_to_float(v), out); #else - //out = fma(logits_smem[params.timestep], v, out); - out = fma(logits_smem[tlength], v, out); + T logit = logits_smem[ti]; + + // Update the partial sums. + out = fma(logit, v, out); #endif - } + } + } - // Make sure we can start writing to shared memory. - __syncthreads(); + // One group of threads computes the product(s) for the current timestep. + // if( vo == params.timestep % V_PER_ITER ) { + if (vo == tlength % V_PER_ITER && (Dh == Dh_MAX || vi < Dh)) { - // Run the final reduction amongst the different groups computing different partial outputs. - if (Dh == Dh_MAX || vi < Dh) - #pragma unroll - for( int active_groups = V_PER_ITER; active_groups >= 2; active_groups /= 2 ) { + V_vec v; + if (DO_CROSS_ATTENTION) { + v = *reinterpret_cast(&v_cache[tlength * Dh]); + } + else { + // Trigger the loads from the V buffer. + v = *reinterpret_cast(¶ms.v[qkv_base_offset + vi]); + // Trigger the loads from the V bias buffer. + // V_vec v_bias = *reinterpret_cast(¶ms.v_bias[hi*Dh + vi]); + } - // The midpoint in the number of active groups. - int midpoint = active_groups / 2; + // Compute the V values with bias. + if (!DO_CROSS_ATTENTION || (DO_CROSS_ATTENTION && params.timestep == 0)) { + v = add(v, v_bias); - // The upper part of active threads store to shared memory. - if( vo >= midpoint && vo < active_groups && - (Dh == Dh_MAX || vi < Dh)) { -#ifdef MMHA_USE_FP32_ACUM_FOR_OUT - convert_from_float(*reinterpret_cast(&out_smem[(vo - midpoint)*Dh + vi]), out); + // Store the values with bias back to global memory in the cache for V. + //*reinterpret_cast(&v_cache[params.timestep*Dh]) = v; + *reinterpret_cast(&v_cache[tlength * Dh]) = v; + } + + // Initialize the output value with the current timestep. +#if defined(MMHA_USE_FP32_ACUM_FOR_LOGITS) + // out = fma(logits_smem[params.timestep], cast_to_float(v), out); + out = fma(logits_smem[tlength], cast_to_float(v), out); #else - *reinterpret_cast(&out_smem[(vo - midpoint)*Dh + vi]) = out; + // out = fma(logits_smem[params.timestep], v, out); + out = fma(logits_smem[tlength], v, out); #endif } - __syncthreads(); - // The bottom warps update their values. - if( vo < midpoint && - (Dh == Dh_MAX || vi < Dh) ) { - out = add(*reinterpret_cast(&out_smem[vo*Dh + vi]), out); - } + // Make sure we can start writing to shared memory. __syncthreads(); - } - // Output the final values. - if( vo == 0 && (Dh == Dh_MAX || vi < Dh)) { + // Run the final reduction amongst the different groups computing different partial outputs. + if (Dh == Dh_MAX || vi < Dh) +#pragma unroll + for (int active_groups = V_PER_ITER; active_groups >= 2; active_groups /= 2) { + + // The midpoint in the number of active groups. + int midpoint = active_groups / 2; + + // The upper part of active threads store to shared memory. + if (vo >= midpoint && vo < active_groups && (Dh == Dh_MAX || vi < Dh)) { +#ifdef MMHA_USE_FP32_ACUM_FOR_OUT + convert_from_float(*reinterpret_cast(&out_smem[(vo - midpoint) * Dh + vi]), out); +#else + *reinterpret_cast(&out_smem[(vo - midpoint) * Dh + vi]) = out; +#endif + } + __syncthreads(); + + // The bottom warps update their values. + if (vo < midpoint && (Dh == Dh_MAX || vi < Dh)) { + out = add(*reinterpret_cast(&out_smem[vo * Dh + vi]), out); + } + __syncthreads(); + } + + // Output the final values. + if (vo == 0 && (Dh == Dh_MAX || vi < Dh)) { #ifdef MMHA_USE_FP32_ACUM_FOR_OUT - convert_from_float(*reinterpret_cast(¶ms.out[bhi*Dh + vi]), out); + convert_from_float(*reinterpret_cast(¶ms.out[bhi * Dh + vi]), out); #else - *reinterpret_cast(¶ms.out[bhi*Dh + vi]) = out; + *reinterpret_cast(¶ms.out[bhi * Dh + vi]) = out; #endif - } + } } //////////////////////////////////////////////////////////////////////////////////////////////////// -} // namespace mmha +} // namespace mmha //////////////////////////////////////////////////////////////////////////////////////////////////// -#define MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, \ - DO_CROSS_ATTENTION, stream) \ - size_t smem_sz = mmha::smem_size_in_bytes(params, THDS_PER_VALUE, \ - THDS_PER_BLOCK); \ - dim3 grid(params.num_heads, params.batch_size); \ - mmha::masked_multihead_attention_kernel \ - <<>>(params) +#define MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, THDS_PER_KEY, THDS_PER_VALUE, THDS_PER_BLOCK, DO_CROSS_ATTENTION, stream) \ + size_t smem_sz = mmha::smem_size_in_bytes(params, THDS_PER_VALUE, THDS_PER_BLOCK); \ + dim3 grid(params.num_heads, params.batch_size); \ + mmha::masked_multihead_attention_kernel<<>>(params) //////////////////////////////////////////////////////////////////////////////////////////////////// // !!! Specialize the launcher for Cross attention -template < typename T, int Dh, int Dh_MAX, typename KERNEL_PARAMS_TYPE > -void mmha_launch_kernel(const KERNEL_PARAMS_TYPE ¶ms, const cudaStream_t &stream) { - constexpr int THREADS_PER_VALUE = Dh_MAX * sizeof(T) / 16; - constexpr bool DO_CROSS_ATTENTION = std::is_same>::value; - int tlength = (DO_CROSS_ATTENTION)? params.seq_length : params.timestep; - //printf("tlength, CROSS_ATTENTION = %d, %d\n", tlength, DO_CROSS_ATTENTION); - if( tlength < 32 ) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, stream); - } else if( tlength < 2048 ) { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, stream); - } else { - MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, stream); - } +template +void mmha_launch_kernel(const KERNEL_PARAMS_TYPE& params, const cudaStream_t& stream) +{ + constexpr int THREADS_PER_VALUE = Dh_MAX * sizeof(T) / 16; + constexpr bool DO_CROSS_ATTENTION = std::is_same>::value; + int tlength = (DO_CROSS_ATTENTION) ? params.seq_length : params.timestep; + // printf("tlength, CROSS_ATTENTION = %d, %d\n", tlength, DO_CROSS_ATTENTION); + if (tlength < 32) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 4, THREADS_PER_VALUE, 64, DO_CROSS_ATTENTION, stream); + } + else if (tlength < 2048) { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 2, THREADS_PER_VALUE, 128, DO_CROSS_ATTENTION, stream); + } + else { + MMHA_LAUNCH_KERNEL(T, Dh, Dh_MAX, 1, THREADS_PER_VALUE, 256, DO_CROSS_ATTENTION, stream); + } } //////////////////////////////////////////////////////////////////////////////////////////////////// -template< typename T, typename KERNEL_PARAMS_TYPE > -void multihead_attention_(const KERNEL_PARAMS_TYPE ¶ms, const cudaStream_t &stream) { - switch ( params.hidden_size_per_head ) { - case 32: - mmha_launch_kernel(params, stream); - break; - case 64: - mmha_launch_kernel(params, stream); - break; - case 96: - mmha_launch_kernel(params, stream); - break; - case 128: - mmha_launch_kernel(params, stream); - break; - case 160: - mmha_launch_kernel(params, stream); - break; - case 192: - mmha_launch_kernel(params, stream); - break; - case 224: - mmha_launch_kernel(params, stream); - break; - case 256: - mmha_launch_kernel(params, stream); - break; - default: - assert(false); - } +template +void multihead_attention_(const KERNEL_PARAMS_TYPE& params, const cudaStream_t& stream) +{ + switch (params.hidden_size_per_head) { + case 32: + mmha_launch_kernel(params, stream); + break; + case 64: + mmha_launch_kernel(params, stream); + break; + case 96: + mmha_launch_kernel(params, stream); + break; + case 128: + mmha_launch_kernel(params, stream); + break; + case 160: + mmha_launch_kernel(params, stream); + break; + case 192: + mmha_launch_kernel(params, stream); + break; + case 224: + mmha_launch_kernel(params, stream); + break; + case 256: + mmha_launch_kernel(params, stream); + break; + default: + assert(false); + } } //////////////////////////////////////////////////////////////////////////////////////////////////// -void masked_multihead_attention(const Masked_multihead_attention_params ¶ms, const cudaStream_t &stream) { - multihead_attention_>(params, stream); +void masked_multihead_attention(const Masked_multihead_attention_params& params, const cudaStream_t& stream) +{ + multihead_attention_>(params, stream); } //////////////////////////////////////////////////////////////////////////////////////////////////// -void masked_multihead_attention(const Masked_multihead_attention_params ¶ms, const cudaStream_t &stream) { - multihead_attention_>(params, stream); +void masked_multihead_attention(const Masked_multihead_attention_params& params, const cudaStream_t& stream) +{ + multihead_attention_>(params, stream); } //////////////////////////////////////////////////////////////////////////////////////////////////// -void cross_multihead_attention(const Cross_multihead_attention_params ¶ms, const cudaStream_t &stream) { - multihead_attention_>(params, stream); +#ifdef ENABLE_BF16 +void masked_multihead_attention(const Masked_multihead_attention_params<__nv_bfloat16>& params, + const cudaStream_t& stream) +{ + multihead_attention_<__nv_bfloat16, Masked_multihead_attention_params<__nv_bfloat16>>(params, stream); +} +#endif +//////////////////////////////////////////////////////////////////////////////////////////////////// + +void cross_multihead_attention(const Cross_multihead_attention_params& params, const cudaStream_t& stream) +{ + multihead_attention_>(params, stream); } //////////////////////////////////////////////////////////////////////////////////////////////////// -void cross_multihead_attention(const Cross_multihead_attention_params ¶ms, const cudaStream_t &stream) { - multihead_attention_>(params, stream); +void cross_multihead_attention(const Cross_multihead_attention_params& params, const cudaStream_t& stream) +{ + multihead_attention_>(params, stream); } //////////////////////////////////////////////////////////////////////////////////////////////////// #undef MMHA_LAUNCH_KERNEL - diff --git a/src/fastertransformer/kernels/decoder_masked_multihead_attention.h b/src/fastertransformer/kernels/decoder_masked_multihead_attention.h index 7d17cfc53..4f4f8c05d 100644 --- a/src/fastertransformer/kernels/decoder_masked_multihead_attention.h +++ b/src/fastertransformer/kernels/decoder_masked_multihead_attention.h @@ -1,36 +1,38 @@ -/*************************************************************************************************** - * Copyright (c) 2011-2021, NVIDIA CORPORATION. All rights reserved. +/* + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * - * Redistribution and use in source and binary forms, with or without modification, are not permit- - * ted. + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND - * FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NVIDIA CORPORATION BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * http://www.apache.org/licenses/LICENSE-2.0 * - **************************************************************************************************/ + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + #pragma once +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" +#include +#include #include #include #include -#include -#include //////////////////////////////////////////////////////////////////////////////////////////////////// -#define CHECK_CUDA(call) do { \ - cudaError_t status_ = call; \ - if( status_ != cudaSuccess ) { \ - fprintf(stderr, "CUDA error (%s:%d): %s\n", __FILE__, __LINE__, cudaGetErrorString(status_)); \ - exit(1); \ - } \ -} while(0) +#define CHECK_CUDA(call) \ + do { \ + cudaError_t status_ = call; \ + if (status_ != cudaSuccess) { \ + fprintf(stderr, "CUDA error (%s:%d): %s\n", __FILE__, __LINE__, cudaGetErrorString(status_)); \ + exit(1); \ + } \ + } while (0) //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -44,91 +46,102 @@ // H: Number of heads, // Dh: Hidden dimension per head - Dh = D / H. -template< typename T> +template struct Multihead_attention_params_base { - // The output buffer. Dimensions B x D. - T *out; - - // The input Qs and the associated bias. Dimensions B x D and D, resp. - const T *q, *q_bias; - // The input Ks and the associated bias. Dimensions B x D and D, resp. - const T *k, *k_bias; - // The input Vs and the associated bias. Dimensions B x D and D, resp. - const T *v, *v_bias; - - // The cache for the Ks. The size must be at least B x L x D. - T *k_cache; - // The cache for the Vs. The size must be at least B x L x D. - T *v_cache; - - // Stride to handle the case when KQV is a single buffer - int stride; - - // The batch size. - int batch_size; - // The sequence length. - int seq_length; - // The number of heads (H). - int num_heads; - // The hidden dimension per head (Dh). - int hidden_size_per_head; - // The per-head latent space reserved for rotary embeddings. - int rotary_embedding_dim = 0; - // The current timestep. TODO(bhsueh) Check that do we only this param in cross attention? - int timestep; - // The current timestep of each sentences (support different timestep for different sentences) - - // The 1.f / sqrt(Dh). Computed on the host. - float inv_sqrt_dh; - - // Used when we have some input context like gpt - const int *input_lengths; - int max_input_len; - - const float* relative_attention_bias_float = nullptr; - const half* relative_attention_bias_half = nullptr; - int relative_attention_bias_stride; + // The output buffer. Dimensions B x D. + T* out; + + // The input Qs and the associated bias. Dimensions B x D and D, resp. + const T *q, *q_bias; + // The input Ks and the associated bias. Dimensions B x D and D, resp. + const T *k, *k_bias; + // The input Vs and the associated bias. Dimensions B x D and D, resp. + const T *v, *v_bias; + + // The cache for the Ks. The size must be at least B x L x D. + T* k_cache; + // The cache for the Vs. The size must be at least B x L x D. + T* v_cache; + // The indirections to use for cache when beam sampling. + const int* cache_indir; + + // Stride to handle the case when KQV is a single buffer + int stride; + + // The batch size. + int batch_size; + // The beam width + int beam_width; + // The sequence length. + int seq_length; + // The number of heads (H). + int num_heads; + // The hidden dimension per head (Dh). + int hidden_size_per_head; + // The per-head latent space reserved for rotary embeddings. + int rotary_embedding_dim = 0; + // The current timestep. TODO(bhsueh) Check that do we only this param in cross attention? + int timestep; + // The current timestep of each sentences (support different timestep for different sentences) + + // The 1.f / sqrt(Dh). Computed on the host. + float inv_sqrt_dh; + + // Used when we have some input context like gpt + const int* input_lengths; + int max_input_len; + + const float* relative_attention_bias_float = nullptr; + const half* relative_attention_bias_half = nullptr; + int relative_attention_bias_stride; }; -template< typename T, bool CROSS_ATTENTION> -struct Multihead_attention_params : public Multihead_attention_params_base { +template +struct Multihead_attention_params: public Multihead_attention_params_base { - // allows to exist attention eary - bool *finished; + // allows to exist attention eary + bool* finished; - // required in case of cross attention - // will need it here till if constexpr in c++17 - int *memory_length_per_sample; + // required in case of cross attention + // will need it here till if constexpr in c++17 + int* memory_length_per_sample; - // required in case of masked attention with different length - const int *length_per_sample; + // required in case of masked attention with different length + const int* length_per_sample; }; -template< typename T> -struct Multihead_attention_params : public Multihead_attention_params_base { - // allows to exist attention eary - bool *finished; +template +struct Multihead_attention_params: public Multihead_attention_params_base { + // allows to exist attention eary + bool* finished; - // required in case of cross attention - int *memory_length_per_sample; + // required in case of cross attention + int* memory_length_per_sample; - // required in case of masked attention with different length - const int *length_per_sample; + // required in case of masked attention with different length + const int* length_per_sample; }; -template +template using Masked_multihead_attention_params = Multihead_attention_params; -template +template using Cross_multihead_attention_params = Multihead_attention_params; //////////////////////////////////////////////////////////////////////////////////////////////////// -void masked_multihead_attention (const Masked_multihead_attention_params ¶ms, const cudaStream_t &stream); -void masked_multihead_attention (const Masked_multihead_attention_params ¶ms, const cudaStream_t &stream); -void cross_multihead_attention (const Cross_multihead_attention_params ¶ms, const cudaStream_t &stream); -void cross_multihead_attention (const Cross_multihead_attention_params ¶ms, const cudaStream_t &stream); +void masked_multihead_attention(const Masked_multihead_attention_params& params, const cudaStream_t& stream); +void masked_multihead_attention(const Masked_multihead_attention_params& params, const cudaStream_t& stream); +#ifdef ENABLE_BF16 +void masked_multihead_attention(const Masked_multihead_attention_params<__nv_bfloat16>& params, + const cudaStream_t& stream); +#endif +void cross_multihead_attention(const Cross_multihead_attention_params& params, const cudaStream_t& stream); +void cross_multihead_attention(const Cross_multihead_attention_params& params, const cudaStream_t& stream); +#ifdef ENABLE_BF16 +void cross_multihead_attention(const Cross_multihead_attention_params<__nv_bfloat16>& params, + const cudaStream_t& stream); +#endif //////////////////////////////////////////////////////////////////////////////////////////////////// - diff --git a/src/fastertransformer/kernels/decoder_masked_multihead_attention_utils.h b/src/fastertransformer/kernels/decoder_masked_multihead_attention_utils.h index a05de8d04..780b6de96 100644 --- a/src/fastertransformer/kernels/decoder_masked_multihead_attention_utils.h +++ b/src/fastertransformer/kernels/decoder_masked_multihead_attention_utils.h @@ -1,816 +1,1383 @@ -/*************************************************************************************************** - * Copyright (c) 2011-2021, NVIDIA CORPORATION. All rights reserved. +/* + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * - * Redistribution and use in source and binary forms, with or without modification, are not permit- - * ted. + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND - * FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NVIDIA CORPORATION BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * http://www.apache.org/licenses/LICENSE-2.0 * - **************************************************************************************************/ + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + #pragma once +#include "src/fastertransformer/kernels/bfloat16_fallback_kenrels.cuh" +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" #include +using namespace fastertransformer; + namespace mmha { //////////////////////////////////////////////////////////////////////////////////////////////////// struct Float8_ { - float2 x; - float2 y; - float2 z; - float2 w; + float2 x; + float2 y; + float2 z; + float2 w; }; //////////////////////////////////////////////////////////////////////////////////////////////////// struct Float4_ { - float2 x; - float2 y; + float2 x; + float2 y; +}; + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +#ifdef ENABLE_BF16 +struct bf16_4_t { + __nv_bfloat162 x; + __nv_bfloat162 y; }; //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float add(float a, float b) { - return a + b; +struct bf16_8_t { + __nv_bfloat162 x; + __nv_bfloat162 y; + __nv_bfloat162 z; + __nv_bfloat162 w; +}; +#endif + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ float add(float a, float b) +{ + return a + b; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ float2 add(float2 a, float2 b) +{ + float2 c; + c.x = add(a.x, b.x); + c.y = add(a.y, b.y); + return c; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ float4 add(float4 a, float4 b) +{ + float4 c; + c.x = add(a.x, b.x); + c.y = add(a.y, b.y); + c.z = add(a.z, b.z); + c.w = add(a.w, b.w); + return c; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float2 add(float2 a, float2 b) { - float2 c; - c.x = add(a.x, b.x); - c.y = add(a.y, b.y); - return c; +#ifdef ENABLE_BF16 +inline __device__ __nv_bfloat16 add(__nv_bfloat16 a, __nv_bfloat16 b) +{ + return a + b; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float4 add(float4 a, float4 b) { - float4 c; - c.x = add(a.x, b.x); - c.y = add(a.y, b.y); - c.z = add(a.z, b.z); - c.w = add(a.w, b.w); - return c; +inline __device__ __nv_bfloat162 add(__nv_bfloat162 a, __nv_bfloat162 b) +{ + return bf16hadd2(a, b); } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ uint16_t add(uint16_t a, uint16_t b) { - uint16_t c; - asm volatile("add.f16 %0, %1, %2;\n" : "=h"(c) : "h"(a), "h"(b)); - return c; +inline __device__ bf16_4_t add(bf16_4_t a, bf16_4_t b) +{ + bf16_4_t c; + c.x = add(a.x, b.x); + c.y = add(a.y, b.y); + return c; } //////////////////////////////////////////////////////////////////////////////////////////////////// +inline __device__ bf16_8_t add(bf16_8_t a, bf16_8_t b) +{ + bf16_8_t c; + c.x = add(a.x, b.x); + c.y = add(a.y, b.y); + c.z = add(a.z, b.z); + c.w = add(a.w, b.w); + return c; +} +#endif // ENABLE_BF16 + +//////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ uint32_t add(uint32_t a, uint32_t b) { - uint32_t c; - asm volatile("add.f16x2 %0, %1, %2;\n" : "=r"(c) : "r"(a), "r"(b)); - return c; +inline __device__ uint16_t add(uint16_t a, uint16_t b) +{ + uint16_t c; + asm volatile("add.f16 %0, %1, %2;\n" : "=h"(c) : "h"(a), "h"(b)); + return c; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ uint2 add(uint2 a, uint2 b) { - uint2 c; - c.x = add(a.x, b.x); - c.y = add(a.y, b.y); - return c; +inline __device__ uint32_t add(uint32_t a, uint32_t b) +{ + uint32_t c; + asm volatile("add.f16x2 %0, %1, %2;\n" : "=r"(c) : "r"(a), "r"(b)); + return c; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ uint4 add(uint4 a, uint4 b) { - uint4 c; - c.x = add(a.x, b.x); - c.y = add(a.y, b.y); - c.z = add(a.z, b.z); - c.w = add(a.w, b.w); - return c; +inline __device__ uint2 add(uint2 a, uint2 b) +{ + uint2 c; + c.x = add(a.x, b.x); + c.y = add(a.y, b.y); + return c; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ uint16_t float_to_half(float f) { - union { uint32_t u32; uint16_t u16[2]; } tmp; -#if 0 && defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 800 // Is it better? +inline __device__ uint4 add(uint4 a, uint4 b) +{ + uint4 c; + c.x = add(a.x, b.x); + c.y = add(a.y, b.y); + c.z = add(a.z, b.z); + c.w = add(a.w, b.w); + return c; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ uint16_t float_to_half(float f) +{ + union { + uint32_t u32; + uint16_t u16[2]; + } tmp; +#if 0 && defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 800 // Is it better? float zero = 0.f; asm volatile("cvt.rn.f16x2.f32 %0, %1, %2;\n" : "=r"(tmp.u32) : "f"(zero), "f"(f)); #else - asm volatile("cvt.rn.f16.f32 %0, %1;\n" : "=h"(tmp.u16[0]) : "f"(f)); + asm volatile("cvt.rn.f16.f32 %0, %1;\n" : "=h"(tmp.u16[0]) : "f"(f)); #endif - return tmp.u16[0]; + return tmp.u16[0]; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ uint32_t float2_to_half2(float2 f) { - union { uint32_t u32; uint16_t u16[2]; } tmp; +inline __device__ uint32_t float2_to_half2(float2 f) +{ + union { + uint32_t u32; + uint16_t u16[2]; + } tmp; #if defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 800 - asm volatile("cvt.rn.f16x2.f32 %0, %1, %2;\n" : "=r"(tmp.u32) : "f"(f.y), "f"(f.x)); + asm volatile("cvt.rn.f16x2.f32 %0, %1, %2;\n" : "=r"(tmp.u32) : "f"(f.y), "f"(f.x)); #else - asm volatile("cvt.rn.f16.f32 %0, %1;\n" : "=h"(tmp.u16[0]) : "f"(f.x)); - asm volatile("cvt.rn.f16.f32 %0, %1;\n" : "=h"(tmp.u16[1]) : "f"(f.y)); + asm volatile("cvt.rn.f16.f32 %0, %1;\n" : "=h"(tmp.u16[0]) : "f"(f.x)); + asm volatile("cvt.rn.f16.f32 %0, %1;\n" : "=h"(tmp.u16[1]) : "f"(f.y)); #endif - return tmp.u32; + return tmp.u32; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ float half_to_float(uint16_t h) +{ + float f; + asm volatile("cvt.f32.f16 %0, %1;\n" : "=f"(f) : "h"(h)); + return f; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float half_to_float(uint16_t h) { - float f; - asm volatile("cvt.f32.f16 %0, %1;\n" : "=f"(f) : "h"(h)); - return f; +inline __device__ float2 half2_to_float2(uint32_t v) +{ + uint16_t lo, hi; + asm volatile("mov.b32 {%0, %1}, %2;\n" : "=h"(lo), "=h"(hi) : "r"(v)); + return make_float2(half_to_float(lo), half_to_float(hi)); } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float2 half2_to_float2(uint32_t v) { - uint16_t lo, hi; - asm volatile("mov.b32 {%0, %1}, %2;\n" : "=h"(lo), "=h"(hi) : "r"(v)); - return make_float2(half_to_float(lo), half_to_float(hi)); +inline __device__ float2 add(uint32_t a, float2 fb) +{ + float2 fa = half2_to_float2(a); + return add(fa, fb); } +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ Float4_ add(uint2 a, Float4_ fb) +{ + Float4_ fc; + fc.x = add(a.x, fb.x); + fc.y = add(a.y, fb.y); + return fc; +} //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float2 add(uint32_t a, float2 fb) { - float2 fa = half2_to_float2(a); - return add(fa, fb); +inline __device__ Float8_ add(uint4 a, Float8_ fb) +{ + Float8_ fc; + fc.x = add(a.x, fb.x); + fc.y = add(a.y, fb.y); + fc.z = add(a.z, fb.z); + fc.w = add(a.w, fb.w); + return fc; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ Float4_ add(uint2 a, Float4_ fb) { - Float4_ fc; - fc.x = add(a.x, fb.x); - fc.y = add(a.y, fb.y); - return fc; +inline __device__ uint32_t h0_h0(uint16_t a) +{ + uint32_t b; + asm volatile("mov.b32 %0, {%1, %1};" : "=r"(b) : "h"(a)); + return b; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ Float8_ add(uint4 a, Float8_ fb) { - Float8_ fc; - fc.x = add(a.x, fb.x); - fc.y = add(a.y, fb.y); - fc.z = add(a.z, fb.z); - fc.w = add(a.w, fb.w); - return fc; +inline __device__ float fma(float a, float b, float c) +{ + return a * b + c; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ uint32_t h0_h0(uint16_t a) { - uint32_t b; - asm volatile("mov.b32 %0, {%1, %1};" : "=r"(b) : "h"(a)); - return b; +inline __device__ float2 fma(float2 a, float2 b, float2 c) +{ + float2 d; + d.x = fma(a.x, b.x, c.x); + d.y = fma(a.y, b.y, c.y); + return d; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float fma(float a, float b, float c) { - return a * b + c; +inline __device__ float2 fma(float a, float2 b, float2 c) +{ + float2 d; + d.x = fma(a, b.x, c.x); + d.y = fma(a, b.y, c.y); + return d; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float2 fma(float2 a, float2 b, float2 c) { - float2 d; - d.x = fma(a.x, b.x, c.x); - d.y = fma(a.y, b.y, c.y); - return d; +inline __device__ float4 fma(float4 a, float4 b, float4 c) +{ + float4 d; + d.x = fma(a.x, b.x, c.x); + d.y = fma(a.y, b.y, c.y); + d.z = fma(a.z, b.z, c.z); + d.w = fma(a.w, b.w, c.w); + return d; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float2 fma(float a, float2 b, float2 c) { - float2 d; - d.x = fma(a, b.x, c.x); - d.y = fma(a, b.y, c.y); - return d; +inline __device__ float4 fma(float a, float4 b, float4 c) +{ + float4 d; + d.x = fma(a, b.x, c.x); + d.y = fma(a, b.y, c.y); + d.z = fma(a, b.z, c.z); + d.w = fma(a, b.w, c.w); + return d; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float4 fma(float4 a, float4 b, float4 c) { - float4 d; - d.x = fma(a.x, b.x, c.x); - d.y = fma(a.y, b.y, c.y); - d.z = fma(a.z, b.z, c.z); - d.w = fma(a.w, b.w, c.w); - return d; +inline __device__ Float4_ fma(float a, Float4_ b, Float4_ c) +{ + Float4_ d; + d.x = fma(a, b.x, c.x); + d.y = fma(a, b.y, c.y); + return d; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float4 fma(float a, float4 b, float4 c) { - float4 d; - d.x = fma(a, b.x, c.x); - d.y = fma(a, b.y, c.y); - d.z = fma(a, b.z, c.z); - d.w = fma(a, b.w, c.w); - return d; +inline __device__ Float8_ fma(float a, Float8_ b, Float8_ c) +{ + Float8_ d; + d.x = fma(a, b.x, c.x); + d.y = fma(a, b.y, c.y); + d.z = fma(a, b.z, c.z); + d.w = fma(a, b.w, c.w); + return d; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ Float4_ fma(float a, Float4_ b, Float4_ c) { - Float4_ d; - d.x = fma(a, b.x, c.x); - d.y = fma(a, b.y, c.y); - return d; +#ifdef ENABLE_BF16 +inline __device__ float2 add(__nv_bfloat162 a, float2 fb) +{ + float2 fa = bf1622float2(a); + return add(fa, fb); } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ Float8_ fma(float a, Float8_ b, Float8_ c) { - Float8_ d; - d.x = fma(a, b.x, c.x); - d.y = fma(a, b.y, c.y); - d.z = fma(a, b.z, c.z); - d.w = fma(a, b.w, c.w); - return d; +inline __device__ Float4_ add(bf16_4_t a, Float4_ fb) +{ + Float4_ fc; + fc.x = add(a.x, fb.x); + fc.y = add(a.y, fb.y); + return fc; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ uint32_t fma(uint32_t a, uint32_t b, uint32_t c) { - uint32_t d; - asm volatile("fma.rn.f16x2 %0, %1, %2, %3;\n" : "=r"(d) : "r"(a), "r"(b), "r"(c)); - return d; +inline __device__ Float8_ add(bf16_8_t a, Float8_ fb) +{ + Float8_ fc; + fc.x = add(a.x, fb.x); + fc.y = add(a.y, fb.y); + fc.z = add(a.z, fb.z); + fc.w = add(a.w, fb.w); + return fc; } +#endif // ENABLE_BF16 //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ uint32_t fma(uint16_t a, uint32_t b, uint32_t c) { - return fma(h0_h0(a), b, c); +inline __device__ uint32_t fma(uint32_t a, uint32_t b, uint32_t c) +{ + uint32_t d; + asm volatile("fma.rn.f16x2 %0, %1, %2, %3;\n" : "=r"(d) : "r"(a), "r"(b), "r"(c)); + return d; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ uint2 fma(uint2 a, uint2 b, uint2 c) { - uint2 d; - d.x = fma(a.x, b.x, c.x); - d.y = fma(a.y, b.y, c.y); - return d; +inline __device__ uint32_t fma(uint16_t a, uint32_t b, uint32_t c) +{ + return fma(h0_h0(a), b, c); } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ uint2 fma(uint16_t a, uint2 b, uint2 c) { - uint32_t s = h0_h0(a); - uint2 d; - d.x = fma(s, b.x, c.x); - d.y = fma(s, b.y, c.y); - return d; +inline __device__ uint2 fma(uint2 a, uint2 b, uint2 c) +{ + uint2 d; + d.x = fma(a.x, b.x, c.x); + d.y = fma(a.y, b.y, c.y); + return d; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ uint4 fma(uint4 a, uint4 b, uint4 c) { - uint4 d; - d.x = fma(a.x, b.x, c.x); - d.y = fma(a.y, b.y, c.y); - d.z = fma(a.z, b.z, c.z); - d.w = fma(a.w, b.w, c.w); - return d; +inline __device__ uint2 fma(uint16_t a, uint2 b, uint2 c) +{ + uint32_t s = h0_h0(a); + uint2 d; + d.x = fma(s, b.x, c.x); + d.y = fma(s, b.y, c.y); + return d; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ uint4 fma(uint16_t a, uint4 b, uint4 c) { - uint32_t s = h0_h0(a); - uint4 d; - d.x = fma(s, b.x, c.x); - d.y = fma(s, b.y, c.y); - d.z = fma(s, b.z, c.z); - d.w = fma(s, b.w, c.w); - return d; +inline __device__ uint4 fma(uint4 a, uint4 b, uint4 c) +{ + uint4 d; + d.x = fma(a.x, b.x, c.x); + d.y = fma(a.y, b.y, c.y); + d.z = fma(a.z, b.z, c.z); + d.w = fma(a.w, b.w, c.w); + return d; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float fma(uint16_t a, uint16_t b, float fc) { - float fa = half_to_float(a); - float fb = half_to_float(b); - return fa * fb + fc; +inline __device__ uint4 fma(uint16_t a, uint4 b, uint4 c) +{ + uint32_t s = h0_h0(a); + uint4 d; + d.x = fma(s, b.x, c.x); + d.y = fma(s, b.y, c.y); + d.z = fma(s, b.z, c.z); + d.w = fma(s, b.w, c.w); + return d; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float2 fma(uint32_t a, uint32_t b, float2 fc) { - float2 fa = half2_to_float2(a); - float2 fb = half2_to_float2(b); - return fma(fa,fb,fc); +inline __device__ float fma(uint16_t a, uint16_t b, float fc) +{ + float fa = half_to_float(a); + float fb = half_to_float(b); + return fa * fb + fc; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float2 fma(uint16_t a, uint32_t b, float2 fc) { - return fma(h0_h0(a), b, fc); +inline __device__ float2 fma(uint32_t a, uint32_t b, float2 fc) +{ + float2 fa = half2_to_float2(a); + float2 fb = half2_to_float2(b); + return fma(fa, fb, fc); } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ Float4_ fma(uint2 a, uint2 b, Float4_ fc) { - Float4_ fd; - fd.x = fma(a.x, b.x, fc.x); - fd.y = fma(a.y, b.y, fc.y); - return fd; +inline __device__ float2 fma(uint16_t a, uint32_t b, float2 fc) +{ + return fma(h0_h0(a), b, fc); } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ Float4_ fma(uint16_t a, uint2 b, Float4_ fc) { - uint32_t s = h0_h0(a); - Float4_ fd; - fd.x = fma(s, b.x, fc.x); - fd.y = fma(s, b.y, fc.y); - return fd; +inline __device__ Float4_ fma(uint2 a, uint2 b, Float4_ fc) +{ + Float4_ fd; + fd.x = fma(a.x, b.x, fc.x); + fd.y = fma(a.y, b.y, fc.y); + return fd; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ Float8_ fma(uint4 a, uint4 b, Float8_ fc) { - Float8_ fd; - fd.x = fma(a.x, b.x, fc.x); - fd.y = fma(a.y, b.y, fc.y); - fd.z = fma(a.z, b.z, fc.z); - fd.w = fma(a.w, b.w, fc.w); - return fd; +inline __device__ Float4_ fma(uint16_t a, uint2 b, Float4_ fc) +{ + uint32_t s = h0_h0(a); + Float4_ fd; + fd.x = fma(s, b.x, fc.x); + fd.y = fma(s, b.y, fc.y); + return fd; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ Float8_ fma(uint16_t a, uint4 b, Float8_ fc) { - uint32_t s = h0_h0(a); - Float8_ fd; - fd.x = fma(s, b.x, fc.x); - fd.y = fma(s, b.y, fc.y); - fd.z = fma(s, b.z, fc.z); - fd.w = fma(s, b.w, fc.w); - return fd; +inline __device__ Float8_ fma(uint4 a, uint4 b, Float8_ fc) +{ + Float8_ fd; + fd.x = fma(a.x, b.x, fc.x); + fd.y = fma(a.y, b.y, fc.y); + fd.z = fma(a.z, b.z, fc.z); + fd.w = fma(a.w, b.w, fc.w); + return fd; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ Float8_ fma(uint16_t a, uint4 b, Float8_ fc) +{ + uint32_t s = h0_h0(a); + Float8_ fd; + fd.x = fma(s, b.x, fc.x); + fd.y = fma(s, b.y, fc.y); + fd.z = fma(s, b.z, fc.z); + fd.w = fma(s, b.w, fc.w); + return fd; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// +#ifdef ENABLE_BF16 +inline __device__ __nv_bfloat162 fma(__nv_bfloat162 a, __nv_bfloat162 b, __nv_bfloat162 c) +{ + return bf16hfma2(a, b, c); +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ __nv_bfloat162 fma(__nv_bfloat16 a, __nv_bfloat162 b, __nv_bfloat162 c) +{ + return bf16hfma2(bf162bf162(a), b, c); +} +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ bf16_4_t fma(bf16_4_t a, bf16_4_t b, bf16_4_t c) +{ + bf16_4_t d; + d.x = fma(a.x, b.x, c.x); + d.y = fma(a.y, b.y, c.y); + return d; } //////////////////////////////////////////////////////////////////////////////////////////////////// -template +inline __device__ bf16_4_t fma(__nv_bfloat16 a, bf16_4_t b, bf16_4_t c) +{ + __nv_bfloat162 s = bf162bf162(a); + bf16_4_t d; + d.x = fma(s, b.x, c.x); + d.y = fma(s, b.y, c.y); + return d; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ bf16_8_t fma(bf16_8_t a, bf16_8_t b, bf16_8_t c) +{ + bf16_8_t d; + d.x = fma(a.x, b.x, c.x); + d.y = fma(a.y, b.y, c.y); + d.z = fma(a.z, b.z, c.z); + d.w = fma(a.w, b.w, c.w); + return d; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ bf16_8_t fma(__nv_bfloat16 a, bf16_8_t b, bf16_8_t c) +{ + __nv_bfloat162 s = bf162bf162(a); + bf16_8_t d; + d.x = fma(s, b.x, c.x); + d.y = fma(s, b.y, c.y); + d.z = fma(s, b.z, c.z); + d.w = fma(s, b.w, c.w); + return d; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ float fma(__nv_bfloat16 a, __nv_bfloat16 b, float fc) +{ + return __bfloat162float(a) * __bfloat162float(b) + fc; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ float2 fma(__nv_bfloat162 a, __nv_bfloat162 b, float2 fc) +{ + float2 fa = bf1622float2(a); + float2 fb = bf1622float2(b); + return fma(fa, fb, fc); +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ float2 fma(__nv_bfloat16 a, __nv_bfloat162 b, float2 fc) +{ + return fma(bf162bf162(a), b, fc); +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ Float4_ fma(bf16_4_t a, bf16_4_t b, Float4_ fc) +{ + Float4_ fd; + fd.x = fma(a.x, b.x, fc.x); + fd.y = fma(a.y, b.y, fc.y); + return fd; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ Float4_ fma(__nv_bfloat16 a, bf16_4_t b, Float4_ fc) +{ + __nv_bfloat162 s = bf162bf162(a); + Float4_ fd; + fd.x = fma(s, b.x, fc.x); + fd.y = fma(s, b.y, fc.y); + return fd; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ Float8_ fma(bf16_8_t a, bf16_8_t b, Float8_ fc) +{ + Float8_ fd; + fd.x = fma(a.x, b.x, fc.x); + fd.y = fma(a.y, b.y, fc.y); + fd.z = fma(a.z, b.z, fc.z); + fd.w = fma(a.w, b.w, fc.w); + return fd; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ Float8_ fma(__nv_bfloat16 a, bf16_8_t b, Float8_ fc) +{ + __nv_bfloat162 s = bf162bf162(a); + Float8_ fd; + fd.x = fma(s, b.x, fc.x); + fd.y = fma(s, b.y, fc.y); + fd.z = fma(s, b.z, fc.z); + fd.w = fma(s, b.w, fc.w); + return fd; +} +#endif // ENABLE_BF16 +//////////////////////////////////////////////////////////////////////////////////////////////////// + +template inline __device__ Acc mul(A a, B b); //////////////////////////////////////////////////////////////////////////////////////////////////// template<> -inline __device__ float mul(float a, float b) { - return a * b; +inline __device__ float mul(float a, float b) +{ + return a * b; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +template<> +inline __device__ float2 mul(float2 a, float2 b) +{ + float2 c; + c.x = a.x * b.x; + c.y = a.y * b.y; + return c; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +template<> +inline __device__ float2 mul(float a, float2 b) +{ + float2 c; + c.x = a * b.x; + c.y = a * b.y; + return c; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +template<> +inline __device__ float4 mul(float4 a, float4 b) +{ + float4 c; + c.x = a.x * b.x; + c.y = a.y * b.y; + c.z = a.z * b.z; + c.w = a.w * b.w; + return c; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +template<> +inline __device__ float4 mul(float a, float4 b) +{ + float4 c; + c.x = a * b.x; + c.y = a * b.y; + c.z = a * b.z; + c.w = a * b.w; + return c; } //////////////////////////////////////////////////////////////////////////////////////////////////// template<> -inline __device__ float2 mul(float2 a, float2 b) { - float2 c; - c.x = a.x * b.x; - c.y = a.y * b.y; - return c; +inline __device__ uint16_t mul(uint16_t a, uint16_t b) +{ + uint16_t c; + asm volatile("mul.f16 %0, %1, %2;\n" : "=h"(c) : "h"(a), "h"(b)); + return c; } //////////////////////////////////////////////////////////////////////////////////////////////////// template<> -inline __device__ float2 mul(float a, float2 b) { - float2 c; - c.x = a * b.x; - c.y = a * b.y; - return c; +inline __device__ uint32_t mul(uint32_t a, uint32_t b) +{ + uint32_t c; + asm volatile("mul.f16x2 %0, %1, %2;\n" : "=r"(c) : "r"(a), "r"(b)); + return c; } //////////////////////////////////////////////////////////////////////////////////////////////////// template<> -inline __device__ float4 mul(float4 a, float4 b) { - float4 c; - c.x = a.x * b.x; - c.y = a.y * b.y; - c.z = a.z * b.z; - c.w = a.w * b.w; - return c; +inline __device__ uint32_t mul(uint16_t a, uint32_t b) +{ + return mul(h0_h0(a), b); } //////////////////////////////////////////////////////////////////////////////////////////////////// template<> -inline __device__ float4 mul(float a, float4 b) { - float4 c; - c.x = a * b.x; - c.y = a * b.y; - c.z = a * b.z; - c.w = a * b.w; - return c; +inline __device__ uint2 mul(uint2 a, uint2 b) +{ + uint2 c; + c.x = mul(a.x, b.x); + c.y = mul(a.y, b.y); + return c; } //////////////////////////////////////////////////////////////////////////////////////////////////// template<> -inline __device__ uint16_t mul(uint16_t a, uint16_t b) { - uint16_t c; - asm volatile("mul.f16 %0, %1, %2;\n" : "=h"(c) : "h"(a), "h"(b)); - return c; +inline __device__ uint2 mul(uint16_t a, uint2 b) +{ + uint32_t s = h0_h0(a); + uint2 c; + c.x = mul(s, b.x); + c.y = mul(s, b.y); + return c; } //////////////////////////////////////////////////////////////////////////////////////////////////// template<> -inline __device__ uint32_t mul(uint32_t a, uint32_t b) { - uint32_t c; - asm volatile("mul.f16x2 %0, %1, %2;\n" : "=r"(c) : "r"(a), "r"(b)); - return c; +inline __device__ uint4 mul(uint4 a, uint4 b) +{ + uint4 c; + c.x = mul(a.x, b.x); + c.y = mul(a.y, b.y); + c.z = mul(a.z, b.z); + c.w = mul(a.w, b.w); + return c; } //////////////////////////////////////////////////////////////////////////////////////////////////// template<> -inline __device__ uint32_t mul(uint16_t a, uint32_t b) { - return mul(h0_h0(a), b); +inline __device__ uint4 mul(uint16_t a, uint4 b) +{ + uint32_t s = h0_h0(a); + uint4 c; + c.x = mul(s, b.x); + c.y = mul(s, b.y); + c.z = mul(s, b.z); + c.w = mul(s, b.w); + return c; } //////////////////////////////////////////////////////////////////////////////////////////////////// template<> -inline __device__ uint2 mul(uint2 a, uint2 b) { - uint2 c; - c.x = mul(a.x, b.x); - c.y = mul(a.y, b.y); - return c; +inline __device__ float mul(uint16_t a, uint16_t b) +{ + float fa = half_to_float(a); + float fb = half_to_float(b); + return fa * fb; } //////////////////////////////////////////////////////////////////////////////////////////////////// template<> -inline __device__ uint2 mul(uint16_t a, uint2 b) { - uint32_t s = h0_h0(a); - uint2 c; - c.x = mul(s, b.x); - c.y = mul(s, b.y); - return c; +inline __device__ float2 mul(uint32_t a, uint32_t b) +{ + float2 fa = half2_to_float2(a); + float2 fb = half2_to_float2(b); + return mul(fa, fb); } //////////////////////////////////////////////////////////////////////////////////////////////////// template<> -inline __device__ uint4 mul(uint4 a, uint4 b) { - uint4 c; - c.x = mul(a.x, b.x); - c.y = mul(a.y, b.y); - c.z = mul(a.z, b.z); - c.w = mul(a.w, b.w); - return c; +inline __device__ float2 mul(uint16_t a, uint32_t b) +{ + return mul(h0_h0(a), b); } //////////////////////////////////////////////////////////////////////////////////////////////////// template<> -inline __device__ uint4 mul(uint16_t a, uint4 b) { - uint32_t s = h0_h0(a); - uint4 c; - c.x = mul(s, b.x); - c.y = mul(s, b.y); - c.z = mul(s, b.z); - c.w = mul(s, b.w); - return c; +inline __device__ Float4_ mul(uint2 a, uint2 b) +{ + Float4_ fc; + fc.x = mul(a.x, b.x); + fc.y = mul(a.y, b.y); + return fc; } //////////////////////////////////////////////////////////////////////////////////////////////////// -template <> -inline __device__ float mul(uint16_t a, uint16_t b) { - float fa = half_to_float(a); - float fb = half_to_float(b); - return fa * fb; +template<> +inline __device__ Float4_ mul(uint16_t a, uint2 b) +{ + uint32_t s = h0_h0(a); + Float4_ fc; + fc.x = mul(s, b.x); + fc.y = mul(s, b.y); + return fc; } //////////////////////////////////////////////////////////////////////////////////////////////////// template<> -inline __device__ float2 mul(uint32_t a, uint32_t b) { - float2 fa = half2_to_float2(a); - float2 fb = half2_to_float2(b); - return mul(fa, fb); +inline __device__ Float8_ mul(uint4 a, uint4 b) +{ + Float8_ fc; + fc.x = mul(a.x, b.x); + fc.y = mul(a.y, b.y); + fc.z = mul(a.z, b.z); + fc.w = mul(a.w, b.w); + return fc; } //////////////////////////////////////////////////////////////////////////////////////////////////// template<> -inline __device__ float2 mul(uint16_t a, uint32_t b) { - return mul(h0_h0(a), b); +inline __device__ Float8_ mul(uint16_t a, uint4 b) +{ + uint32_t s = h0_h0(a); + Float8_ fc; + fc.x = mul(s, b.x); + fc.y = mul(s, b.y); + fc.z = mul(s, b.z); + fc.w = mul(s, b.w); + return fc; } //////////////////////////////////////////////////////////////////////////////////////////////////// +#ifdef ENABLE_BF16 template<> -inline __device__ Float4_ mul(uint2 a, uint2 b) { - Float4_ fc; - fc.x = mul(a.x, b.x); - fc.y = mul(a.y, b.y); - return fc; +inline __device__ __nv_bfloat16 mul(__nv_bfloat16 a, __nv_bfloat16 b) +{ +#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 800 + return __hmul(a, b); +#else + return bf16hmul(a, b); +#endif } //////////////////////////////////////////////////////////////////////////////////////////////////// template<> -inline __device__ Float4_ mul(uint16_t a, uint2 b) { - uint32_t s = h0_h0(a); - Float4_ fc; - fc.x = mul(s, b.x); - fc.y = mul(s, b.y); - return fc; +inline __device__ __nv_bfloat162 mul(__nv_bfloat162 a, __nv_bfloat162 b) +{ + return bf16hmul2(a, b); } //////////////////////////////////////////////////////////////////////////////////////////////////// template<> -inline __device__ Float8_ mul(uint4 a, uint4 b) { - Float8_ fc; - fc.x = mul(a.x, b.x); - fc.y = mul(a.y, b.y); - fc.z = mul(a.z, b.z); - fc.w = mul(a.w, b.w); - return fc; +inline __device__ __nv_bfloat162 mul(__nv_bfloat16 a, __nv_bfloat162 b) +{ + return mul<__nv_bfloat162, __nv_bfloat162, __nv_bfloat162>(bf162bf162(a), b); } //////////////////////////////////////////////////////////////////////////////////////////////////// template<> -inline __device__ Float8_ mul(uint16_t a, uint4 b) { - uint32_t s = h0_h0(a); - Float8_ fc; - fc.x = mul(s, b.x); - fc.y = mul(s, b.y); - fc.z = mul(s, b.z); - fc.w = mul(s, b.w); - return fc; +inline __device__ bf16_4_t mul(bf16_4_t a, bf16_4_t b) +{ + bf16_4_t c; + c.x = mul<__nv_bfloat162, __nv_bfloat162, __nv_bfloat162>(a.x, b.x); + c.y = mul<__nv_bfloat162, __nv_bfloat162, __nv_bfloat162>(a.y, b.y); + return c; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float sum(float v) { - return v; +template<> +inline __device__ bf16_4_t mul(__nv_bfloat16 a, bf16_4_t b) +{ + __nv_bfloat162 s = bf162bf162(a); + bf16_4_t c; + c.x = mul<__nv_bfloat162, __nv_bfloat162, __nv_bfloat162>(s, b.x); + c.y = mul<__nv_bfloat162, __nv_bfloat162, __nv_bfloat162>(s, b.y); + return c; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float sum(float2 v) { - return v.x + v.y; +template<> +inline __device__ bf16_8_t mul(bf16_8_t a, bf16_8_t b) +{ + bf16_8_t c; + c.x = mul<__nv_bfloat162, __nv_bfloat162, __nv_bfloat162>(a.x, b.x); + c.y = mul<__nv_bfloat162, __nv_bfloat162, __nv_bfloat162>(a.y, b.y); + c.z = mul<__nv_bfloat162, __nv_bfloat162, __nv_bfloat162>(a.z, b.z); + c.w = mul<__nv_bfloat162, __nv_bfloat162, __nv_bfloat162>(a.w, b.w); + return c; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float sum(float4 v) { - return v.x + v.y + v.z + v.w; +template<> +inline __device__ bf16_8_t mul(__nv_bfloat16 a, bf16_8_t b) +{ + __nv_bfloat162 s = bf162bf162(a); + bf16_8_t c; + c.x = mul<__nv_bfloat162, __nv_bfloat162, __nv_bfloat162>(s, b.x); + c.y = mul<__nv_bfloat162, __nv_bfloat162, __nv_bfloat162>(s, b.y); + c.z = mul<__nv_bfloat162, __nv_bfloat162, __nv_bfloat162>(s, b.z); + c.w = mul<__nv_bfloat162, __nv_bfloat162, __nv_bfloat162>(s, b.w); + return c; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float sum(uint16_t v) { - return half_to_float(v); +template<> +inline __device__ float mul(__nv_bfloat16 a, __nv_bfloat16 b) +{ + float fa = (float)a; + float fb = (float)b; + return fa * fb; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float sum(uint32_t v) { - float2 tmp = half2_to_float2(v); - return tmp.x + tmp.y; +template<> +inline __device__ float2 mul(__nv_bfloat162 a, __nv_bfloat162 b) +{ + float2 fa = bf1622float2(a); + float2 fb = bf1622float2(b); + return mul(fa, fb); } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float sum(uint2 v) { - uint32_t c = add(v.x, v.y); - return sum(c); +template<> +inline __device__ float2 mul(__nv_bfloat16 a, __nv_bfloat162 b) +{ + return mul(bf162bf162(a), b); } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float sum(uint4 v) { +template<> +inline __device__ Float4_ mul(bf16_4_t a, bf16_4_t b) +{ + Float4_ fc; + fc.x = mul(a.x, b.x); + fc.y = mul(a.y, b.y); + return fc; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +template<> +inline __device__ Float4_ mul(__nv_bfloat16 a, bf16_4_t b) +{ + __nv_bfloat162 s = bf162bf162(a); + Float4_ fc; + fc.x = mul(s, b.x); + fc.y = mul(s, b.y); + return fc; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +template<> +inline __device__ Float8_ mul(bf16_8_t a, bf16_8_t b) +{ + Float8_ fc; + fc.x = mul(a.x, b.x); + fc.y = mul(a.y, b.y); + fc.z = mul(a.z, b.z); + fc.w = mul(a.w, b.w); + return fc; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +template<> +inline __device__ Float8_ mul(__nv_bfloat16 a, bf16_8_t b) +{ + __nv_bfloat162 s = bf162bf162(a); + Float8_ fc; + fc.x = mul(s, b.x); + fc.y = mul(s, b.y); + fc.z = mul(s, b.z); + fc.w = mul(s, b.w); + return fc; +} +#endif // ENABLE_BF16 +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ float sum(float v) +{ + return v; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ float sum(float2 v) +{ + return v.x + v.y; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ float sum(float4 v) +{ + return v.x + v.y + v.z + v.w; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +#ifdef ENABLE_BF16 +inline __device__ float sum(__nv_bfloat162 v) +{ + float2 vf = bf1622float2(v); + return vf.x + vf.y; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ float sum(bf16_4_t v) +{ + return sum(v.x) + sum(v.y); +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ float sum(bf16_8_t v) +{ + return sum(v.x) + sum(v.y) + sum(v.z) + sum(v.w); +} +#endif // ENABLE_BF16 +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ float sum(uint16_t v) +{ + return half_to_float(v); +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ float sum(uint32_t v) +{ + float2 tmp = half2_to_float2(v); + return tmp.x + tmp.y; +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ float sum(uint2 v) +{ + uint32_t c = add(v.x, v.y); + return sum(c); +} + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +inline __device__ float sum(uint4 v) +{ #if 1 - uint32_t c = add(v.x, v.y); - c = add(c, v.z); - c = add(c, v.w); + uint32_t c = add(v.x, v.y); + c = add(c, v.z); + c = add(c, v.w); #else - uint32_t c = add(v.x, v.y); - uint32_t d = add(v.z, v.w); - c = add(c, d); + uint32_t c = add(v.x, v.y); + uint32_t d = add(v.z, v.w); + c = add(c, d); #endif - return sum(c); + return sum(c); } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float sum(Float4_ v) { - return v.x.x + v.x.y + v.y.x + v.y.y; +inline __device__ float sum(Float4_ v) +{ + return v.x.x + v.x.y + v.y.x + v.y.y; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float sum(Float8_ v) { - return v.x.x + v.x.y + v.y.x + v.y.y + v.z.x + v.z.y + v.w.x+ v.w.y; +inline __device__ float sum(Float8_ v) +{ + return v.x.x + v.x.y + v.y.x + v.y.y + v.z.x + v.z.y + v.w.x + v.w.y; } //////////////////////////////////////////////////////////////////////////////////////////////////// -template< typename T > -inline __device__ float dot(T a, T b) { - return sum(mul(a, b)); +template +inline __device__ float dot(T a, T b) +{ + return sum(mul(a, b)); } //////////////////////////////////////////////////////////////////////////////////////////////////// -template< typename A, typename T > -inline __device__ float dot(T a, T b) { - return sum(mul(a, b)); +template +inline __device__ float dot(T a, T b) +{ + return sum(mul(a, b)); } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ void zero(uint16_t &dst) { - dst = uint16_t(0); +inline __device__ void zero(uint16_t& dst) +{ + dst = uint16_t(0); } //////////////////////////////////////////////////////////////////////////////////////////////////// -template< typename T > -inline __device__ void zero(T &dst) { - constexpr int WORDS = sizeof(T) / 4; - union { T raw; uint32_t words[WORDS]; } tmp; - #pragma unroll - for( int ii = 0; ii < WORDS; ++ii ) { - tmp.words[ii] = 0u; - } - dst = tmp.raw; +template +inline __device__ void zero(T& dst) +{ + constexpr int WORDS = sizeof(T) / 4; + union { + T raw; + uint32_t words[WORDS]; + } tmp; +#pragma unroll + for (int ii = 0; ii < WORDS; ++ii) { + tmp.words[ii] = 0u; + } + dst = tmp.raw; } //////////////////////////////////////////////////////////////////////////////////////////////////// -inline __device__ float2 rotary_embedding_coefficient( - const int zid, const int rot_embed_dim, const float t_step -) { - const float inv_freq = t_step / pow(10000.0f, zid / (float) rot_embed_dim); - return {cos(inv_freq), sin(inv_freq)}; +inline __device__ float2 rotary_embedding_coefficient(const int zid, const int rot_embed_dim, const float t_step) +{ + const float inv_freq = t_step / pow(10000.0f, zid / (float)rot_embed_dim); + return {cos(inv_freq), sin(inv_freq)}; +} + +inline __device__ float2 rotary_embedding_transform(const float2 v, const float2 coef) +{ + float2 rot_v; + rot_v.x = coef.x * v.x - coef.y * v.y; + rot_v.y = coef.x * v.y + coef.y * v.x; + return rot_v; } -inline __device__ float2 rotary_embedding_transform( - const float2 v, const float2 coef -) { - float2 rot_v; - rot_v.x = coef.x * v.x - coef.y * v.y; - rot_v.y = coef.x * v.y + coef.y * v.x; - return rot_v; +inline __device__ uint32_t rotary_embedding_transform(const uint32_t v, const float2 coef) +{ + float2 fv = half2_to_float2(v); + float2 rot_fv = rotary_embedding_transform(fv, coef); + return float2_to_half2(rot_fv); } -inline __device__ uint32_t rotary_embedding_transform( - const uint32_t v, const float2 coef -) { - float2 fv = half2_to_float2(v); - float2 rot_fv = rotary_embedding_transform(fv, coef); - return float2_to_half2(rot_fv); +#ifdef ENABLE_BF16 +inline __device__ __nv_bfloat162 rotary_embedding_transform(const __nv_bfloat162 v, const float2 coef) +{ + float2 fv = bf1622float2(v); + float2 rot_fv = rotary_embedding_transform(fv, coef); + return __floats2bfloat162_rn(rot_fv.x, rot_fv.y); } +#endif -inline __device__ void apply_rotary_embedding( - float & q, int zid, int rot_embed_dim, int t_step -) { +inline __device__ void apply_rotary_embedding(float& q, int zid, int rot_embed_dim, int t_step) +{ return; } -inline __device__ void apply_rotary_embedding( - float & q, float & k, int zid, int rot_embed_dim, int t_step -) { +inline __device__ void apply_rotary_embedding(float& q, float& k, int zid, int rot_embed_dim, int t_step) +{ return; } -inline __device__ void apply_rotary_embedding( - float2 & q, int tid, int rot_embed_dim, int t_step -) { - if (2*tid >= rot_embed_dim) return; - const auto coef = rotary_embedding_coefficient(2*tid, rot_embed_dim, t_step); +inline __device__ void apply_rotary_embedding(float2& q, int tid, int rot_embed_dim, int t_step) +{ + if (2 * tid >= rot_embed_dim) { + return; + } + const auto coef = rotary_embedding_coefficient(2 * tid, rot_embed_dim, t_step); q = rotary_embedding_transform(q, coef); } -inline __device__ void apply_rotary_embedding( - float2 & q, float2 & k, int tid, int rot_embed_dim, int t_step -) { - if (2*tid >= rot_embed_dim) return; - const auto coef = rotary_embedding_coefficient(2*tid, rot_embed_dim, t_step); +inline __device__ void apply_rotary_embedding(float2& q, float2& k, int tid, int rot_embed_dim, int t_step) +{ + if (2 * tid >= rot_embed_dim) { + return; + } + const auto coef = rotary_embedding_coefficient(2 * tid, rot_embed_dim, t_step); q = rotary_embedding_transform(q, coef); k = rotary_embedding_transform(k, coef); } -inline __device__ void apply_rotary_embedding( - float4 &q, int tid, int rot_embed_dim, int t_step -) { - if (4*tid >= rot_embed_dim) return; +inline __device__ void apply_rotary_embedding(float4& q, int tid, int rot_embed_dim, int t_step) +{ + if (4 * tid >= rot_embed_dim) { + return; + } - Float4_ &q_ = * reinterpret_cast(&q); - const auto coef0 = rotary_embedding_coefficient(4*tid, rot_embed_dim, t_step); + Float4_& q_ = *reinterpret_cast(&q); + const auto coef0 = rotary_embedding_coefficient(4 * tid, rot_embed_dim, t_step); q_.x = rotary_embedding_transform(q_.x, coef0); - const auto coef1 = rotary_embedding_coefficient(4*tid + 2, rot_embed_dim, t_step); + const auto coef1 = rotary_embedding_coefficient(4 * tid + 2, rot_embed_dim, t_step); q_.y = rotary_embedding_transform(q_.y, coef1); } -inline __device__ void apply_rotary_embedding( - float4 &q, float4 &k, int tid, int rot_embed_dim, int t_step -) { - if (4*tid >= rot_embed_dim) return; +inline __device__ void apply_rotary_embedding(float4& q, float4& k, int tid, int rot_embed_dim, int t_step) +{ + if (4 * tid >= rot_embed_dim) { + return; + } - Float4_ &q_ = * reinterpret_cast(&q); - Float4_ &k_ = * reinterpret_cast(&k); - const auto coef0 = rotary_embedding_coefficient(4*tid, rot_embed_dim, t_step); + Float4_& q_ = *reinterpret_cast(&q); + Float4_& k_ = *reinterpret_cast(&k); + const auto coef0 = rotary_embedding_coefficient(4 * tid, rot_embed_dim, t_step); q_.x = rotary_embedding_transform(q_.x, coef0); k_.x = rotary_embedding_transform(k_.x, coef0); - const auto coef1 = rotary_embedding_coefficient(4*tid + 2, rot_embed_dim, t_step); + const auto coef1 = rotary_embedding_coefficient(4 * tid + 2, rot_embed_dim, t_step); q_.y = rotary_embedding_transform(q_.y, coef1); k_.y = rotary_embedding_transform(k_.y, coef1); } -inline __device__ void apply_rotary_embedding( - uint32_t &q, int tid, int rot_embed_dim, int t_step -) { - if (2*tid >= rot_embed_dim) return; - const auto coef = rotary_embedding_coefficient(2*tid, rot_embed_dim, t_step); - q = rotary_embedding_transform(q, coef); -} - -inline __device__ void apply_rotary_embedding( - uint32_t &q, uint32_t &k, int tid, int rot_embed_dim, int t_step -) { - if (2*tid >= rot_embed_dim) return; - const auto coef = rotary_embedding_coefficient(2*tid, rot_embed_dim, t_step); - q = rotary_embedding_transform(q, coef); - k = rotary_embedding_transform(k, coef); -} - -inline __device__ void apply_rotary_embedding( - uint2 &q, int tid, int rot_embed_dim, int t_step -) { - if (4*tid >= rot_embed_dim) return; - const auto coef0 = rotary_embedding_coefficient(4*tid, rot_embed_dim, t_step); - q.x = rotary_embedding_transform(q.x, coef0); - const auto coef1 = rotary_embedding_coefficient(4*tid + 2, rot_embed_dim, t_step); - q.y = rotary_embedding_transform(q.y, coef1); -} - -inline __device__ void apply_rotary_embedding( - uint2 &q, uint2 &k, int tid, int rot_embed_dim, int t_step -) { - if (4*tid >= rot_embed_dim) return; - const auto coef0 = rotary_embedding_coefficient(4*tid, rot_embed_dim, t_step); - q.x = rotary_embedding_transform(q.x, coef0); - k.x = rotary_embedding_transform(k.x, coef0); - const auto coef1 = rotary_embedding_coefficient(4*tid + 2, rot_embed_dim, t_step); - q.y = rotary_embedding_transform(q.y, coef1); - k.y = rotary_embedding_transform(k.y, coef1); -} - -inline __device__ void apply_rotary_embedding( - uint4 &q, int tid, int rot_embed_dim, int t_step -) { - if (8*tid >= rot_embed_dim) return; - const auto coef0 = rotary_embedding_coefficient(8*tid, rot_embed_dim, t_step); - q.x = rotary_embedding_transform(q.x, coef0); - const auto coef1 = rotary_embedding_coefficient(8*tid + 2, rot_embed_dim, t_step); - q.y = rotary_embedding_transform(q.y, coef1); - const auto coef2 = rotary_embedding_coefficient(8*tid + 4, rot_embed_dim, t_step); - q.z = rotary_embedding_transform(q.z, coef2); - const auto coef3 = rotary_embedding_coefficient(8*tid + 6, rot_embed_dim, t_step); - q.w = rotary_embedding_transform(q.w, coef3); -} - -inline __device__ void apply_rotary_embedding( - uint4 &q, uint4 &k, int tid, int rot_embed_dim, int t_step -) { - if (8*tid >= rot_embed_dim) return; - const auto coef0 = rotary_embedding_coefficient(8*tid, rot_embed_dim, t_step); - q.x = rotary_embedding_transform(q.x, coef0); - k.x = rotary_embedding_transform(k.x, coef0); - const auto coef1 = rotary_embedding_coefficient(8*tid + 2, rot_embed_dim, t_step); - q.y = rotary_embedding_transform(q.y, coef1); - k.y = rotary_embedding_transform(k.y, coef1); - const auto coef2 = rotary_embedding_coefficient(8*tid + 4, rot_embed_dim, t_step); - q.z = rotary_embedding_transform(q.z, coef2); - k.z = rotary_embedding_transform(k.z, coef2); - const auto coef3 = rotary_embedding_coefficient(8*tid + 6, rot_embed_dim, t_step); - q.w = rotary_embedding_transform(q.w, coef3); - k.w = rotary_embedding_transform(k.w, coef3); -} - -} // namespace mmha +inline __device__ void apply_rotary_embedding(uint32_t& q, int tid, int rot_embed_dim, int t_step) +{ + if (2 * tid >= rot_embed_dim) { + return; + } + const auto coef = rotary_embedding_coefficient(2 * tid, rot_embed_dim, t_step); + q = rotary_embedding_transform(q, coef); +} + +inline __device__ void apply_rotary_embedding(uint32_t& q, uint32_t& k, int tid, int rot_embed_dim, int t_step) +{ + if (2 * tid >= rot_embed_dim) { + return; + } + const auto coef = rotary_embedding_coefficient(2 * tid, rot_embed_dim, t_step); + q = rotary_embedding_transform(q, coef); + k = rotary_embedding_transform(k, coef); +} + +inline __device__ void apply_rotary_embedding(uint2& q, int tid, int rot_embed_dim, int t_step) +{ + if (4 * tid >= rot_embed_dim) { + return; + } + const auto coef0 = rotary_embedding_coefficient(4 * tid, rot_embed_dim, t_step); + q.x = rotary_embedding_transform(q.x, coef0); + const auto coef1 = rotary_embedding_coefficient(4 * tid + 2, rot_embed_dim, t_step); + q.y = rotary_embedding_transform(q.y, coef1); +} + +inline __device__ void apply_rotary_embedding(uint2& q, uint2& k, int tid, int rot_embed_dim, int t_step) +{ + if (4 * tid >= rot_embed_dim) { + return; + } + const auto coef0 = rotary_embedding_coefficient(4 * tid, rot_embed_dim, t_step); + q.x = rotary_embedding_transform(q.x, coef0); + k.x = rotary_embedding_transform(k.x, coef0); + const auto coef1 = rotary_embedding_coefficient(4 * tid + 2, rot_embed_dim, t_step); + q.y = rotary_embedding_transform(q.y, coef1); + k.y = rotary_embedding_transform(k.y, coef1); +} + +inline __device__ void apply_rotary_embedding(uint4& q, int tid, int rot_embed_dim, int t_step) +{ + if (8 * tid >= rot_embed_dim) { + return; + } + const auto coef0 = rotary_embedding_coefficient(8 * tid, rot_embed_dim, t_step); + q.x = rotary_embedding_transform(q.x, coef0); + const auto coef1 = rotary_embedding_coefficient(8 * tid + 2, rot_embed_dim, t_step); + q.y = rotary_embedding_transform(q.y, coef1); + const auto coef2 = rotary_embedding_coefficient(8 * tid + 4, rot_embed_dim, t_step); + q.z = rotary_embedding_transform(q.z, coef2); + const auto coef3 = rotary_embedding_coefficient(8 * tid + 6, rot_embed_dim, t_step); + q.w = rotary_embedding_transform(q.w, coef3); +} + +inline __device__ void apply_rotary_embedding(uint4& q, uint4& k, int tid, int rot_embed_dim, int t_step) +{ + if (8 * tid >= rot_embed_dim) { + return; + } + const auto coef0 = rotary_embedding_coefficient(8 * tid, rot_embed_dim, t_step); + q.x = rotary_embedding_transform(q.x, coef0); + k.x = rotary_embedding_transform(k.x, coef0); + const auto coef1 = rotary_embedding_coefficient(8 * tid + 2, rot_embed_dim, t_step); + q.y = rotary_embedding_transform(q.y, coef1); + k.y = rotary_embedding_transform(k.y, coef1); + const auto coef2 = rotary_embedding_coefficient(8 * tid + 4, rot_embed_dim, t_step); + q.z = rotary_embedding_transform(q.z, coef2); + k.z = rotary_embedding_transform(k.z, coef2); + const auto coef3 = rotary_embedding_coefficient(8 * tid + 6, rot_embed_dim, t_step); + q.w = rotary_embedding_transform(q.w, coef3); + k.w = rotary_embedding_transform(k.w, coef3); +} + +#ifdef ENABLE_BF16 +inline __device__ void apply_rotary_embedding(__nv_bfloat162& q, int tid, int rot_embed_dim, int t_step) +{ + if (2 * tid >= rot_embed_dim) { + return; + } + const auto coef = rotary_embedding_coefficient(2 * tid, rot_embed_dim, t_step); + q = rotary_embedding_transform(q, coef); +} + +inline __device__ void +apply_rotary_embedding(__nv_bfloat162& q, __nv_bfloat162& k, int tid, int rot_embed_dim, int t_step) +{ + if (2 * tid >= rot_embed_dim) { + return; + } + const auto coef = rotary_embedding_coefficient(2 * tid, rot_embed_dim, t_step); + q = rotary_embedding_transform(q, coef); + k = rotary_embedding_transform(k, coef); +} +inline __device__ void apply_rotary_embedding(bf16_4_t& q, int tid, int rot_embed_dim, int t_step) +{ + if (4 * tid >= rot_embed_dim) { + return; + } + const auto coef0 = rotary_embedding_coefficient(4 * tid, rot_embed_dim, t_step); + q.x = rotary_embedding_transform(q.x, coef0); + const auto coef1 = rotary_embedding_coefficient(4 * tid + 2, rot_embed_dim, t_step); + q.y = rotary_embedding_transform(q.y, coef1); +} + +inline __device__ void apply_rotary_embedding(bf16_4_t& q, bf16_4_t& k, int tid, int rot_embed_dim, int t_step) +{ + if (4 * tid >= rot_embed_dim) { + return; + } + const auto coef0 = rotary_embedding_coefficient(4 * tid, rot_embed_dim, t_step); + q.x = rotary_embedding_transform(q.x, coef0); + k.x = rotary_embedding_transform(k.x, coef0); + const auto coef1 = rotary_embedding_coefficient(4 * tid + 2, rot_embed_dim, t_step); + q.y = rotary_embedding_transform(q.y, coef1); + k.y = rotary_embedding_transform(k.y, coef1); +} + +inline __device__ void apply_rotary_embedding(bf16_8_t& q, int tid, int rot_embed_dim, int t_step) +{ + if (8 * tid >= rot_embed_dim) { + return; + } + const auto coef0 = rotary_embedding_coefficient(8 * tid, rot_embed_dim, t_step); + q.x = rotary_embedding_transform(q.x, coef0); + const auto coef1 = rotary_embedding_coefficient(8 * tid + 2, rot_embed_dim, t_step); + q.y = rotary_embedding_transform(q.y, coef1); + const auto coef2 = rotary_embedding_coefficient(8 * tid + 4, rot_embed_dim, t_step); + q.z = rotary_embedding_transform(q.z, coef2); + const auto coef3 = rotary_embedding_coefficient(8 * tid + 6, rot_embed_dim, t_step); + q.w = rotary_embedding_transform(q.w, coef3); +} + +inline __device__ void apply_rotary_embedding(bf16_8_t& q, bf16_8_t& k, int tid, int rot_embed_dim, int t_step) +{ + if (8 * tid >= rot_embed_dim) { + return; + } + const auto coef0 = rotary_embedding_coefficient(8 * tid, rot_embed_dim, t_step); + q.x = rotary_embedding_transform(q.x, coef0); + k.x = rotary_embedding_transform(k.x, coef0); + const auto coef1 = rotary_embedding_coefficient(8 * tid + 2, rot_embed_dim, t_step); + q.y = rotary_embedding_transform(q.y, coef1); + k.y = rotary_embedding_transform(k.y, coef1); + const auto coef2 = rotary_embedding_coefficient(8 * tid + 4, rot_embed_dim, t_step); + q.z = rotary_embedding_transform(q.z, coef2); + k.z = rotary_embedding_transform(k.z, coef2); + const auto coef3 = rotary_embedding_coefficient(8 * tid + 6, rot_embed_dim, t_step); + q.w = rotary_embedding_transform(q.w, coef3); + k.w = rotary_embedding_transform(k.w, coef3); +} +#endif // ENABLE_BF16 + +} // namespace mmha \ No newline at end of file diff --git a/src/fastertransformer/kernels/decoding_kernels.cu b/src/fastertransformer/kernels/decoding_kernels.cu index 848eb6e77..ccca4319d 100644 --- a/src/fastertransformer/kernels/decoding_kernels.cu +++ b/src/fastertransformer/kernels/decoding_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -14,7 +14,9 @@ * limitations under the License. */ +#include "src/fastertransformer/kernels/bfloat16_fallback_kenrels.cuh" #include "src/fastertransformer/kernels/decoding_kernels.h" +#include "src/fastertransformer/utils/cuda_utils.h" namespace fastertransformer { @@ -25,21 +27,21 @@ __global__ void decodingInitialize(bool* finished, int* sequence_length, int* word_ids, T* cum_log_probs, - const int sentence_id, + const int* sentence_ids, const int batch_size, const int beam_width, const int max_input_length) { const bool IS_FP16 = std::is_same::value; - const T MAX_T_VAL = (IS_FP16) ? HALF_FLT_MAX : 1e20f; + const T MAX_T_VAL = (IS_FP16) ? (T)HALF_FLT_MAX : (T)1e20f; // BF16 and FP32 have the same dynamic range for (int index = blockIdx.x * blockDim.x + threadIdx.x; index < batch_size * beam_width; index += blockDim.x * gridDim.x) { finished[index] = false; sequence_length[index] = max_input_length; if (word_ids != nullptr) { - word_ids[index] = sentence_id; + word_ids[index] = sentence_ids[index / beam_width]; } - cum_log_probs[index] = (index % beam_width == 0) ? (T)0.0f : -MAX_T_VAL; + cum_log_probs[index] = (index % beam_width == 0) ? (T)0.0f : (T)-MAX_T_VAL; } } @@ -48,7 +50,7 @@ void invokeDecodingInitialize(bool* finished, int* sequence_length, int* word_ids, T* cum_log_probs, - const int sentence_id, + const int* sentence_ids, const int batch_size, const int beam_width, const int max_input_length, @@ -58,14 +60,14 @@ void invokeDecodingInitialize(bool* finished, dim3 block(256); decodingInitialize<<>>( - finished, sequence_length, word_ids, cum_log_probs, sentence_id, batch_size, beam_width, max_input_length); + finished, sequence_length, word_ids, cum_log_probs, sentence_ids, batch_size, beam_width, max_input_length); } template void invokeDecodingInitialize(bool* finished, int* sequence_length, int* word_ids, float* cum_log_probs, - const int sentence_id, + const int* sentence_ids, const int batch_size, const int beam_width, const int max_input_length, @@ -75,12 +77,24 @@ template void invokeDecodingInitialize(bool* finished, int* sequence_length, int* word_ids, half* cum_log_probs, - const int sentence_id, + const int* sentence_ids, const int batch_size, const int beam_width, const int max_input_length, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void invokeDecodingInitialize(bool* finished, + int* sequence_length, + int* word_ids, + __nv_bfloat16* cum_log_probs, + const int* sentence_ids, + const int batch_size, + const int beam_width, + const int max_input_length, + cudaStream_t stream); +#endif + template __global__ void embeddingLookupPosEncoding(T* from_tensor, const T* embedding_table, @@ -108,9 +122,34 @@ __global__ void embeddingLookupPosEncoding(T* from_tensor, step * hidden_units : (step - max_input_length + input_lengths[row_index]) * hidden_units; T val = embedding_table[all_ids[id_offset + row_index] * hidden_units + col_index] * scale; - if (position_encoding != nullptr) { - val = val + position_encoding[step_offset + col_index]; - } + val = val + position_encoding[step_offset + col_index]; + + from_tensor[index] = val; + } +} + +// No aboluste position embedding +template +__global__ void embeddingLookup(T* from_tensor, + const T* embedding_table, + const int* all_ids, + const int local_batch_size, + const int hidden_units, + const int step, + const int max_input_length, + const int batch_size, + const int ite, + const T scale) +{ + // 1. lookup from embedding table + // 2. multiply scale + const int id_offset = step * batch_size + ite * local_batch_size; + + for (int index = blockIdx.x * blockDim.x + threadIdx.x; index < local_batch_size * hidden_units; + index += blockDim.x * gridDim.x) { + const int row_index = index / hidden_units; + const int col_index = index % hidden_units; + T val = embedding_table[all_ids[id_offset + row_index] * hidden_units + col_index] * scale; from_tensor[index] = val; } } @@ -132,18 +171,32 @@ void invokeEmbeddingLookupPosEncoding(T* from_tensor, { dim3 grid(min(local_batch_size, 65536)); dim3 block(min(hidden_units, 1024)); - embeddingLookupPosEncoding<<>>(from_tensor, - embedding_table, - position_encoding, - all_ids, - input_lengths, - local_batch_size, - hidden_units, - step, - max_input_length, - batch_size, - ite, - scale); + if (position_encoding != nullptr) { + embeddingLookupPosEncoding<<>>(from_tensor, + embedding_table, + position_encoding, + all_ids, + input_lengths, + local_batch_size, + hidden_units, + step, + max_input_length, + batch_size, + ite, + scale); + } + else { + embeddingLookup<<>>(from_tensor, + embedding_table, + all_ids, + local_batch_size, + hidden_units, + step, + max_input_length, + batch_size, + ite, + scale); + } } template void invokeEmbeddingLookupPosEncoding(float* from_tensor, @@ -174,6 +227,22 @@ template void invokeEmbeddingLookupPosEncoding(half* from_tensor, const int ite, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void invokeEmbeddingLookupPosEncoding(__nv_bfloat16* from_tensor, + const __nv_bfloat16* embedding_table, + const __nv_bfloat16* position_encoding, + const int* all_ids, + const int* input_lengths, + const int local_batch_size, + const int hidden_units, + const __nv_bfloat16 scale, + const int step, + const int max_input_length, + const int batch_size, + const int ite, + cudaStream_t stream); +#endif + template __global__ void paddingEmbedding(T* padded_embedding_kernel, T* padded_embedding_bias, @@ -292,54 +361,78 @@ template void invokePaddingEmbeddingKernel(half* padded_embedding_kernel, const int vocab_size_padded, cudaStream_t stream); -// modified from TensorFlow's implementation of tf.contrib.seq2seq.gather_tree -__global__ void gatherTree(int* beams, - int* max_sequence_lengths, - const int max_time, - const int batch_size, - const int beam_width, - const int* step_ids, - const int* parent_ids, - const int end_token) +__global__ void gatherTree(gatherTreeParam param) { - for (int i = blockIdx.x * blockDim.x + threadIdx.x; i < batch_size * beam_width; i += gridDim.x * blockDim.x) { - const int batch = i / beam_width; - const int beam = i % beam_width; + // beam: have six parts + // [prompt | input | input_padding | prompt_padding | generated output | padding (use end_token)] + // parents: have five parts + // [prompt | input | input_padding | prompt_padding | generated output | padding (use 0)] + // step_ids: need to remove prompt, input_padding and prompt_padding + // the shape is [input_length + requested_output_length, bs, beam_width] + // need to transpose to output_ids [bs, beam_width, input_length + requested_output_length] + // max_input_length: input + input_padding + prompt_padding + + const int max_input_length = param.input_lengths == nullptr ? 0 : param.max_input_length; + + for (int i = blockIdx.x * blockDim.x + threadIdx.x; i < param.batch_size * param.beam_width; + i += gridDim.x * blockDim.x) { + const int batch = i / param.beam_width; + const int beam = i % param.beam_width; + const int prompt_len = + param.prefix_soft_prompt_lengths == nullptr ? 0 : param.prefix_soft_prompt_lengths[batch]; + const int input_len = param.input_lengths == nullptr ? 0 : param.input_lengths[i]; + + const int* parent_ids = param.parent_ids; + const int* step_ids = param.step_ids; // TODO(bhsueh) optimize the reduce_max operation for large beam_width int max_len = -1; - for (int j = 0; j < beam_width; j++) { - max_len = max(max_len, __ldg(max_sequence_lengths + batch * beam_width + j)); + int selected_beam_index = 0; + for (int j = 0; j < param.beam_width; j++) { + int tmp_len = __ldg(param.max_sequence_lengths + batch * param.beam_width + j); + if (tmp_len > max_len) { + max_len = tmp_len; + selected_beam_index = j; + } } - const int max_seq_len_b = min(max_time, max_len); + const int max_seq_len_b = min(param.max_time, max_len); if (max_seq_len_b <= 0) { continue; } -#define GET_IX(time_ix, beam_ix) (batch_size * beam_width * (time_ix) + beam_width * batch + (beam_ix)) +#define GET_IX(time_ix, beam_ix) \ + (param.batch_size * param.beam_width * (time_ix) + param.beam_width * batch + (beam_ix)) - const int initial_beam_ix = GET_IX(max_seq_len_b - 1, beam); - beams[initial_beam_ix] = __ldg(step_ids + initial_beam_ix); - int parent = __ldg(parent_ids + initial_beam_ix) % beam_width; + const int padding_offset_and_prompt_offset = max_input_length - input_len + prompt_len; + const int initial_tgt_ix = GET_IX(max_seq_len_b - 1 - padding_offset_and_prompt_offset, beam); + const int initial_parent_ix = GET_IX(max_seq_len_b - 1, beam); + param.beams[initial_tgt_ix] = __ldg(step_ids + initial_parent_ix); + int parent = parent_ids == nullptr ? 0 : __ldg(parent_ids + initial_parent_ix) % param.beam_width; bool found_bad = false; for (int level = max_seq_len_b - 2; level >= 0; --level) { - const int level_beam_ix = GET_IX(level, beam); + if (level < prompt_len || (level >= input_len && level < max_input_length)) { + continue; + } + int tgt_level = level >= max_input_length ? level - padding_offset_and_prompt_offset : level - prompt_len; + const int level_beam_ix = GET_IX(tgt_level, beam); const int level_parent_ix = GET_IX(level, parent); - if (parent < 0 || parent > beam_width) { - // beams[level_beam_ix] = -1; - beams[level_beam_ix] = end_token; + if (parent < 0 || parent > param.beam_width) { + // param.beams[level_beam_ix] = -1; + param.beams[level_beam_ix] = param.end_tokens[batch]; parent = -1; found_bad = true; } else { - beams[level_beam_ix] = __ldg(step_ids + level_parent_ix); - parent = __ldg(parent_ids + level_parent_ix) % beam_width; + param.beams[level_beam_ix] = __ldg(step_ids + level_parent_ix); + parent = parent_ids == nullptr ? 0 : __ldg(parent_ids + level_parent_ix) % param.beam_width; } } - for (int level = max_seq_len_b; level < max_time; ++level) { - const int level_beam_ix = GET_IX(level, beam); - beams[level_beam_ix] = end_token; + + // set the padded part as end_token + // input_len + for (int index = max_len - (max_input_length - input_len); index < param.max_time; ++index) { + param.beams[GET_IX(index, beam)] = param.end_tokens[batch]; } // Not necessary when using a BeamSearchDecoder, but necessary @@ -347,17 +440,27 @@ __global__ void gatherTree(int* beams, // entries in a beam following eos entries). if (!found_bad) { bool finished = false; - for (int time = 0; time < max_seq_len_b; ++time) { + // skip the step 0 because it is often the start token + int start_step = max_input_length == 0 ? 1 : max_input_length; + for (int time = start_step; time < max_seq_len_b; ++time) { const int level_beam_ix = GET_IX(time, beam); if (finished) { - beams[level_beam_ix] = end_token; + param.beams[level_beam_ix] = param.end_tokens[batch]; } - else if (beams[level_beam_ix] == end_token) { + else if (param.beams[level_beam_ix] == param.end_tokens[batch]) { finished = true; } } } #undef GET_IX + + // transpose on output_ids + if (param.output_ids != nullptr) { + for (int j = 0; j < (param.max_time - param.max_prefix_soft_prompt_length); j++) { + param.output_ids[i * (param.max_time - param.max_prefix_soft_prompt_length) + j] = + param.beams[j * param.batch_size * param.beam_width + i]; + } + } } } @@ -368,18 +471,60 @@ void invokeGatherTree(int* beams, const int beam_width, const int* step_ids, const int* parent_ids, - const int end_token, + const int* end_tokens, + cudaStream_t stream) +{ + gatherTreeParam param; + param.beams = beams; + param.max_sequence_lengths = max_sequence_lengths; + param.max_time = max_time; + param.batch_size = batch_size; + param.beam_width = beam_width; + param.step_ids = step_ids; + param.parent_ids = parent_ids; + param.end_tokens = end_tokens; + param.max_input_length = 1; + param.prefix_soft_prompt_lengths = nullptr; + param.stream = stream; + invokeGatherTree(param); +} + +void invokeGatherTree(int* beams, + int* max_sequence_lengths, + const int max_time, + const int batch_size, + const int beam_width, + const int* step_ids, + const int* parent_ids, + const int* end_tokens, + const int max_input_length, cudaStream_t stream) { - int batchbeam = batch_size * beam_width; + gatherTreeParam param; + param.beams = beams; + param.max_sequence_lengths = max_sequence_lengths; + param.max_time = max_time; + param.batch_size = batch_size; + param.beam_width = beam_width; + param.step_ids = step_ids; + param.parent_ids = parent_ids; + param.end_tokens = end_tokens; + param.max_input_length = max_input_length; + param.prefix_soft_prompt_lengths = nullptr; + param.stream = stream; + invokeGatherTree(param); +} + +void invokeGatherTree(gatherTreeParam param) +{ + int batchbeam = param.batch_size * param.beam_width; dim3 grid(1), block(batchbeam); // though decoder do not support > 1024 for now if (batchbeam > 1024) { - grid.x = ceil(batch_size * beam_width / 1024.); + grid.x = ceil(param.batch_size * param.beam_width / 1024.); block.x = 1024; } - gatherTree<<>>( - beams, max_sequence_lengths, max_time, batch_size, beam_width, step_ids, parent_ids, end_token); + gatherTree<<>>(param); } __global__ void minusUnfinishedSeqlen(int* sequence_lengths, const bool* finished, const int token_num) @@ -398,4 +543,38 @@ void invokeMinusUnfinishedSeqlen(int* sequence_lengths, const bool* finished, co minusUnfinishedSeqlen<<>>(sequence_lengths, finished, token_num); } +__global__ void plusUnfinishedSeqlen(int* sequence_lengths, const bool* finished, const int token_num) +{ + for (int i = threadIdx.x + blockIdx.x * blockDim.x; i < token_num; i += blockDim.x * gridDim.x) { + if (finished[i] == false) { + sequence_lengths[i] += 1; + } + } +} + +void invokePlusUnfinishedSeqlen(int* sequence_lengths, const bool* finished, const int token_num, cudaStream_t stream) +{ + dim3 block(min(256, token_num)); + dim3 grid(ceil(token_num / 256.)); + plusUnfinishedSeqlen<<>>(sequence_lengths, finished, token_num); +} + +template +__global__ void plusScalar(T* buf, const T val, const int size) +{ + for (int i = threadIdx.x + blockIdx.x * blockDim.x; i < size; i += blockDim.x * gridDim.x) { + buf[i] += val; + } +} + +template +void invokePlusScalar(T* buf, const T val, const int size, cudaStream_t stream) +{ + dim3 block(min(256, size)); + dim3 grid(ceil(size / 256.)); + plusScalar<<>>(buf, val, size); +} + +template void invokePlusScalar(int* buf, const int val, const int size, cudaStream_t stream); + } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/decoding_kernels.h b/src/fastertransformer/kernels/decoding_kernels.h index 2b132f60f..c378dcd37 100644 --- a/src/fastertransformer/kernels/decoding_kernels.h +++ b/src/fastertransformer/kernels/decoding_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -26,7 +26,7 @@ void invokeDecodingInitialize(bool* finished, int* sequence_length, int* word_ids, T* cum_log_probs, - const int sentence_id, + const int* sentence_ids, const int batch_size, const int beam_width, const int max_input_length, @@ -74,9 +74,43 @@ void invokeGatherTree(int* beams, const int beam_width, const int* step_ids, const int* parent_ids, - const int end_token, + const int* end_tokens, cudaStream_t stream); +void invokeGatherTree(int* beams, + int* max_sequence_lengths, + const int max_time, + const int batch_size, + const int beam_width, + const int* step_ids, + const int* parent_ids, + const int* end_tokens, + const int max_input_length, + cudaStream_t stream); + +struct gatherTreeParam { + int* beams; + const int* max_sequence_lengths = nullptr; + const int* input_lengths = nullptr; + int max_time; + int batch_size; + int beam_width; + const int* step_ids = nullptr; + const int* parent_ids = nullptr; + const int* end_tokens; + int max_input_length; + const int* prefix_soft_prompt_lengths = nullptr; + int max_prefix_soft_prompt_length; + int* output_ids = nullptr; + cudaStream_t stream; +}; + +void invokeGatherTree(gatherTreeParam param); + void invokeMinusUnfinishedSeqlen(int* sequence_lengths, const bool* finished, const int token_num, cudaStream_t stream); +void invokePlusUnfinishedSeqlen(int* sequence_lengths, const bool* finished, const int token_num, cudaStream_t stream); + +template +void invokePlusScalar(T* buf, const T val, const int size, cudaStream_t stream); } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/dequantize_kernels.cu b/src/fastertransformer/kernels/dequantize_kernels.cu new file mode 100644 index 000000000..8151ac849 --- /dev/null +++ b/src/fastertransformer/kernels/dequantize_kernels.cu @@ -0,0 +1,157 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "dequantize_kernels.h" +#include "reduce_kernel_utils.cuh" + +namespace fastertransformer { + +/***********************invoke deQuantization**************************/ +__global__ void dequantized_kernel(float4* dst, const char4* src, const int size_div_4, const float* scale_ptr) +{ + int tid = (blockIdx.x * blockDim.x + threadIdx.x); + if (tid < size_div_4) { + const float scale = __ldg(scale_ptr); + char4 tmp = __ldg(src + tid); + int outIdx = tid; + + float4 float4Tmp; + float4Tmp.x = static_cast(tmp.x) * scale; + float4Tmp.y = static_cast(tmp.y) * scale; + float4Tmp.z = static_cast(tmp.z) * scale; + float4Tmp.w = static_cast(tmp.w) * scale; + dst[outIdx] = float4Tmp; + } +} + +__global__ void dequantized_kernel(half4* dst, const char4* src, const int size_div_4, const float* scale_ptr) +{ + int tid = (blockIdx.x * blockDim.x + threadIdx.x); + if (tid < size_div_4) { + const float scale = __ldg(scale_ptr); + char4 tmp = __ldg(src + tid); + int outIdx = tid; + + half4 half4Tmp; + half4Tmp.x = static_cast(static_cast(tmp.x) * scale); + half4Tmp.y = static_cast(static_cast(tmp.y) * scale); + half4Tmp.z = static_cast(static_cast(tmp.z) * scale); + half4Tmp.w = static_cast(static_cast(tmp.w) * scale); + dst[outIdx] = half4Tmp; + } +} + +template +void invokeDequantization(T* dst, const int8_t* src, const int size, const float* scale_ptr, cudaStream_t stream) +{ + + if (size % 4 != 0) { + printf("[ERROR][invokeQuantization] size should be a multiple of 4.\n"); + exit(-1); + } + dim3 grid((size + 255) / 256); + dim3 block(64); + if (sizeof(T) == sizeof(float)) { + dequantized_kernel<<>>((float4*)dst, (const char4*)src, size / 4, scale_ptr); + } + else if (sizeof(T) == sizeof(half)) { + dequantized_kernel<<>>((half4*)dst, (const char4*)src, size / 4, scale_ptr); + } +} + +template void +invokeDequantization(float* dst, const int8_t* src, const int size, const float* scale_ptr, cudaStream_t stream); + +template void +invokeDequantization(half* dst, const int8_t* src, const int size, const float* scale_ptr, cudaStream_t stream); + +/***********************invoke deQuantization**************************/ +__global__ void dequantized_kernel_INT32( + float4* dst, const int4* src, const int size_div_4, const float* input_amax_ptr, const float* weight_amax_ptr) +{ + int tid = (blockIdx.x * blockDim.x + threadIdx.x); + if (tid < size_div_4) { + const float scale = (1.0f / __ldg(input_amax_ptr)) * (__ldg(weight_amax_ptr) / 127.0f); + int4 tmp = src[tid]; + int outIdx = tid; + + float4 float4Tmp; + float4Tmp.x = static_cast(tmp.x) * scale; + float4Tmp.y = static_cast(tmp.y) * scale; + float4Tmp.z = static_cast(tmp.z) * scale; + float4Tmp.w = static_cast(tmp.w) * scale; + dst[outIdx] = float4Tmp; + } +} + +__global__ void dequantized_kernel_INT32( + half4* dst, const int4* src, const int size_div_4, const float* input_amax_ptr, const float* weight_amax_ptr) +{ + int tid = (blockIdx.x * blockDim.x + threadIdx.x); + if (tid < size_div_4) { + const float scale = (1.0f / __ldg(input_amax_ptr)) * (__ldg(weight_amax_ptr) / 127.0f); + int4 tmp = src[tid]; + int outIdx = tid; + + half4 half4Tmp; + half4Tmp.x = static_cast(static_cast(tmp.x) * scale); + half4Tmp.y = static_cast(static_cast(tmp.y) * scale); + half4Tmp.z = static_cast(static_cast(tmp.z) * scale); + half4Tmp.w = static_cast(static_cast(tmp.w) * scale); + dst[outIdx] = half4Tmp; + } +} + +template +void invokeDequantization_INT32(T* dst, + const int32_t* src, + const int size, + cudaStream_t stream, + const float* input_amax_ptr, + const float* weight_amax_ptr) +{ + + if (size % 4 != 0) { + printf("[ERROR][invokeQuantization] size should be a multiple of 4.\n"); + exit(-1); + } + dim3 grid((size + 255) / 256); + dim3 block(64); + if (sizeof(T) == sizeof(float)) { + dequantized_kernel_INT32<<>>( + (float4*)dst, (const int4*)src, size / 4, input_amax_ptr, weight_amax_ptr); + } + else if (sizeof(T) == sizeof(half)) { + dequantized_kernel_INT32<<>>( + (half4*)dst, (const int4*)src, size / 4, input_amax_ptr, weight_amax_ptr); + } +} + +template void invokeDequantization_INT32(float* dst, + const int32_t* src, + const int size, + cudaStream_t stream, + const float* input_amax_ptr, + const float* weight_amax_ptr); + +template void invokeDequantization_INT32(half* dst, + const int32_t* src, + const int size, + cudaStream_t stream, + const float* input_amax_ptr, + const float* weight_amax_ptr); + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/dequantize_kernels.h b/src/fastertransformer/kernels/dequantize_kernels.h new file mode 100644 index 000000000..e690c762b --- /dev/null +++ b/src/fastertransformer/kernels/dequantize_kernels.h @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once +#include "src/fastertransformer/utils/cuda_utils.h" +#include +#include +#include + +namespace fastertransformer { + +template +void invokeDequantization(T* dst, const int8_t* src, const int size, const float* scale_ptr, cudaStream_t stream); + +template +void invokeDequantization_INT32(T* dst, + const int32_t* src, + const int size, + cudaStream_t stream, + const float* input_amax_ptr, + const float* weight_amax_ptr); + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/gen_relative_pos_bias.cu b/src/fastertransformer/kernels/gen_relative_pos_bias.cu new file mode 100644 index 000000000..12af8de2d --- /dev/null +++ b/src/fastertransformer/kernels/gen_relative_pos_bias.cu @@ -0,0 +1,106 @@ +/* + * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "gen_relative_pos_bias.h" +#include "reduce_kernel_utils.cuh" + +namespace fastertransformer { + +/******************* invokeGenRelativePosBias ***********************/ +// relative_position_bias_table is [(2*window_size-1)*(2*window_size-1), headNum] +// relative_position_bias is [head_num, window_size^2, window_size^2] +// grid(window_size*window_size, head_num) +// block(window_size*window_size) + +// relative_position_bias_table is [(2*window_size-1)*(2*window_size-1), headNum] +// relative_position_bias_index is [window_size^2, window_size^2] +// relative_position_bias is [head_num, window_size^2, window_size^2] +// grid(window_size*window_size, head_num) +// block(window_size*window_size) +template +__global__ void gen_relative_pos_bias(T* relative_position_bias, + const T* relative_position_bias_table, + const Tindex* relative_position_bias_index, + const int window_size, + const int head_num) +{ + const int h_in_window = blockIdx.x / window_size; + const int w_in_window = blockIdx.x % window_size; + const int h_in_token = threadIdx.x / window_size; + const int w_in_token = threadIdx.x % window_size; + const int head_idx = blockIdx.y; + const int elements_per_window = window_size * window_size; + const size_t elements_per_window_2 = elements_per_window * elements_per_window; + const size_t output_idx = head_idx * elements_per_window_2 + blockIdx.x * elements_per_window + threadIdx.x; + if (output_idx < head_num * elements_per_window_2) { + const Tindex idx_in_table = + relative_position_bias_index[(h_in_window * window_size + w_in_window) * elements_per_window + + h_in_token * window_size + w_in_token]; + relative_position_bias[output_idx] = relative_position_bias_table[idx_in_table * head_num + head_idx]; + } +} + +template +void invokeGenRelativePosBias(T* relative_position_bias, + const T* relative_position_bias_table, + const Tindex* relative_position_bias_index, + const int window_size, + const int head_num, + cudaStream_t stream) +{ + dim3 grid(window_size * window_size, head_num); + dim3 block(window_size * window_size); + + if (block.x > 1024) { + printf("[ERROR][invokeGenRelativePosBias] window_size*window_size > 1024.\n"); + exit(-1); + } + + gen_relative_pos_bias<<>>( + relative_position_bias, relative_position_bias_table, relative_position_bias_index, window_size, head_num); +} + +/******************* instantiation ***********************/ + +template void invokeGenRelativePosBias(float* relative_position_bias, + const float* relative_position_bias_table, + const int* relative_position_bias_index, + const int window_size, + const int head_num, + cudaStream_t stream); + +template void invokeGenRelativePosBias(half* relative_position_bias, + const half* relative_position_bias_table, + const int* relative_position_bias_index, + const int window_size, + const int head_num, + cudaStream_t stream); + +template void invokeGenRelativePosBias(float* relative_position_bias, + const float* relative_position_bias_table, + const int64_t* relative_position_bias_index, + const int window_size, + const int head_num, + cudaStream_t stream); + +template void invokeGenRelativePosBias(half* relative_position_bias, + const half* relative_position_bias_table, + const int64_t* relative_position_bias_index, + const int window_size, + const int head_num, + cudaStream_t stream); + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/gen_relative_pos_bias.h b/src/fastertransformer/kernels/gen_relative_pos_bias.h new file mode 100644 index 000000000..1d560d721 --- /dev/null +++ b/src/fastertransformer/kernels/gen_relative_pos_bias.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once +#include +#include +#include +#include + +namespace fastertransformer { + +enum class PositionEmbeddingType { + relative, + absolute, +}; + +template +void invokeGenRelativePosBias(T* relative_position_bias, + const T* relative_position_bias_table, + const Tindex* relative_position_bias_index, + const int window_size, + const int head_num, + cudaStream_t stream); + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/gpt_kernels.cu b/src/fastertransformer/kernels/gpt_kernels.cu index e7594fc7e..bf3dc8455 100644 --- a/src/fastertransformer/kernels/gpt_kernels.cu +++ b/src/fastertransformer/kernels/gpt_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -36,8 +36,9 @@ __global__ void start_id_embedding_position_lookups_kernel(T* from_tensor, if (index < batch_size * max_length) { const int seq_id = index % max_length; const int batch_id = index / max_length; - if (seq_id < length) + if (seq_id < length) { output_ids[seq_id * batch_size + batch_id] = input_ids[index]; + } // output_ids[index] = input_ids[index]; } @@ -50,7 +51,34 @@ __global__ void start_id_embedding_position_lookups_kernel(T* from_tensor, const int step = start_step + word_index % length; const int col_index = index % hidden_units; T embedding = embedding_table[input_ids[real_word_index] * hidden_units + col_index]; - T pos_embed = pos_table==nullptr? (T)0 : pos_table[(step - 1) * hidden_units + col_index]; + T pos_embed = pos_table == nullptr ? (T)0.f : pos_table[(step - 1) * hidden_units + col_index]; + from_tensor[index] = embedding + pos_embed; + } +} + +template +__global__ void start_id_embedding_position_lookups_kernel(T* from_tensor, + const T* embedding_table, + const T* pos_table, + const int* input_ids, + const int start_step, + const int length, + const int max_length, + const int batch_size, + const int hidden_units) +{ + for (int index = blockIdx.x * blockDim.x + threadIdx.x; index < batch_size * length * hidden_units; + index += blockDim.x * gridDim.x) { + // embedding lookup from word ids [batch, length] (part of [batch, max_length]) and [vocab, hidden] to generate + // embedding [batch, length, hidden] + const int word_index = index / hidden_units; + const int word_index_row = word_index / length; + const int word_index_col = word_index % length; + const int real_word_index = word_index_row * max_length + word_index_col; + const int step = start_step + word_index % length; + const int col_index = index % hidden_units; + T embedding = embedding_table[input_ids[real_word_index] * hidden_units + col_index]; + T pos_embed = pos_table == nullptr ? (T)0.f : pos_table[(step - 1) * hidden_units + col_index]; from_tensor[index] = embedding + pos_embed; } } @@ -70,16 +98,29 @@ void invokeInputIdsEmbeddingLookupPosEncoding(T* from_tensor, { dim3 grid(min(batch_size * length, 65536)); dim3 block(min(hidden_units, 512)); - start_id_embedding_position_lookups_kernel<<>>(from_tensor, - output_ids, - embedding_table, - pos_table, - input_ids, - start_step, - length, - max_length, - batch_size, - hidden_units); + if (output_ids == nullptr) { + start_id_embedding_position_lookups_kernel<<>>(from_tensor, + embedding_table, + pos_table, + input_ids, + start_step, + length, + max_length, + batch_size, + hidden_units); + } + else { + start_id_embedding_position_lookups_kernel<<>>(from_tensor, + output_ids, + embedding_table, + pos_table, + input_ids, + start_step, + length, + max_length, + batch_size, + hidden_units); + } } template void invokeInputIdsEmbeddingLookupPosEncoding(float* from_tensor, @@ -106,6 +147,112 @@ template void invokeInputIdsEmbeddingLookupPosEncoding(half* from_tensor, const int hidden_units, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void invokeInputIdsEmbeddingLookupPosEncoding(__nv_bfloat16* from_tensor, + int* output_ids, + const __nv_bfloat16* embedding_table, + const __nv_bfloat16* pos_table, + const int* input_ids, + const int start_step, + const int length, + const int max_length, + const int batch_size, + const int hidden_units, + cudaStream_t stream); +#endif + +template +__global__ void inputIdsEmbeddingLookupPosEncodingSoftPrompt(inputIdsEmbeddingLookupPosEncodingSoftPromptParam param) +{ + // 1. Copy the input ids to output ids and transpose ouptut ids to [seq_len, batch_size, beam_width]. + // 2. Embedding lookup by input ids and concat with soft prompt. The axis of concatenation is on axis of seq_len. + + // Assume batch size is 2 and prompts are [[t1, t2], [t3], [t4, t5]], input_ids are [[s1, s2], [s3], [s4]] + // then the order of output_ids is + // [ [?, ?, s1, s2] + // [?, s3, padding, padding] + // [?, ?, s4, padding] ] + // and the order of embedding is + // [ [t1, t2, s1, s2] + // [t3, s3, padding, padding] + // [t4, t5, s4, padding] ] + // where "?" means undefined values and we should attach it. + + for (int index = blockIdx.x * blockDim.x + threadIdx.x; + index < param.batch_size * param.beam_width * (param.max_prefix_soft_prompt_length + param.max_input_length) + * param.hidden_units; + index += blockDim.x * gridDim.x) { + // transpose the input_ids [batch, length] (part of [batch, beam, max_input_length]) to + // output_ids [length, batch, beam]. + // ouptut_ids need to add padding in the beginning for soft prompting. + + if (index < param.batch_size * param.beam_width * param.max_input_length) { + int tmp_index = index; + const int seq_id = tmp_index % param.max_input_length; + tmp_index = (tmp_index - seq_id) / param.max_input_length; + const int beam_id = tmp_index % param.beam_width; + tmp_index = (tmp_index - beam_id) / param.beam_width; + const int batch_id = tmp_index % param.batch_size; + if (seq_id < param.max_input_length) { + param.output_ids[(param.prefix_soft_prompt_lengths[batch_id] + seq_id) * param.batch_size + * param.beam_width + + batch_id * param.beam_width + beam_id] = param.input_ids[index]; + } + } + + // embedding lookup from word ids [batch, beam, length] (part of [batch, beam, max_input_length]), [vocab, + // hidden] and [batch, max_prefix_soft_prompt_length, hidden] to generate embedding [batch, beam, length + + // max_prefix_soft_prompt_length, hidden] + int tmp_index = index; + const int hidden_id = tmp_index % param.hidden_units; + tmp_index = (tmp_index - hidden_id) / param.hidden_units; + const int seq_id = tmp_index % (param.max_prefix_soft_prompt_length + param.max_input_length); + tmp_index = (tmp_index - seq_id) / (param.max_prefix_soft_prompt_length + param.max_input_length); + const int beam_id = tmp_index % param.beam_width; + tmp_index = (tmp_index - beam_id) / param.beam_width; + const int batch_id = tmp_index % param.batch_size; + T embedding = + (seq_id < param.prefix_soft_prompt_lengths[batch_id]) ? + (T)param + .prefix_soft_prompt_embedding[batch_id * param.max_prefix_soft_prompt_length * param.hidden_units + + seq_id * param.hidden_units + hidden_id] : + param.embedding_table[param.input_ids[batch_id * param.beam_width * param.max_input_length + + beam_id * param.max_input_length + + (seq_id - param.prefix_soft_prompt_lengths[batch_id])] + * param.hidden_units + + hidden_id]; + + T pos_embed = param.pos_table == nullptr ? + (T)0.0f : + param.pos_table[(param.start_step + seq_id - 1) * param.hidden_units + hidden_id]; + param.from_tensor[index] = embedding + pos_embed; + + if (seq_id == 0 && hidden_id == 0) { + param.input_lengths[batch_id * param.beam_width + beam_id] += param.prefix_soft_prompt_lengths[batch_id]; + } + } +} + +template +void invokeInputIdsEmbeddingLookupPosEncodingSoftPrompt(inputIdsEmbeddingLookupPosEncodingSoftPromptParam param) +{ + dim3 grid(min(param.batch_size * param.beam_width * (param.max_input_length + param.max_prefix_soft_prompt_length), + 65536)); + dim3 block(min(param.hidden_units, 512)); + inputIdsEmbeddingLookupPosEncodingSoftPrompt<<>>(param); +} + +template void +invokeInputIdsEmbeddingLookupPosEncodingSoftPrompt(inputIdsEmbeddingLookupPosEncodingSoftPromptParam param); + +template void +invokeInputIdsEmbeddingLookupPosEncodingSoftPrompt(inputIdsEmbeddingLookupPosEncodingSoftPromptParam param); + +#ifdef ENABLE_BF16 +template void invokeInputIdsEmbeddingLookupPosEncodingSoftPrompt( + inputIdsEmbeddingLookupPosEncodingSoftPromptParam<__nv_bfloat16> param); +#endif + // TODO Add half2 implementation template __global__ void transposeAxis01(T* out, T* in, const int dim0, const int dim1, const int dim2) @@ -140,6 +287,36 @@ invokeTransposeAxis01(half* out, half* in, const int dim0, const int dim1, const template void invokeTransposeAxis01(int* out, int* in, const int dim0, const int dim1, const int dim2, cudaStream_t stream); +template +__global__ void transposeAxis01(T* out, T* in, const int* in_skipping_dim1, const int dim0, const int dim1) +{ + // out: [dim1, dim0] + // in: [dim0, dim1] + // in_skipping_dim1: [dim1] + + int index = threadIdx.x + blockIdx.x * blockDim.x; + if (index < dim0 * dim1) { + const int input_dim1_index = index % dim1; + index = (index - input_dim1_index) / dim1; + const int input_dim0_index = index % dim0; + const int in_offset = in_skipping_dim1 == nullptr ? 0 : in_skipping_dim1[input_dim1_index] * dim1; + + out[input_dim1_index * dim0 + input_dim0_index] = in[in_offset + input_dim0_index * dim1 + input_dim1_index]; + } +} + +template +void invokeTransposeAxis01( + T* out, T* in, const int* in_skipping_dim1, const int dim0, const int dim1, cudaStream_t stream) +{ + dim3 block(512); + dim3 grid((int)(ceil(dim0 * dim1 / 512.))); + transposeAxis01<<>>(out, in, in_skipping_dim1, dim0, dim1); +} + +template void invokeTransposeAxis01( + int* out, int* in, const int* in_skipping_dim1, const int dim0, const int dim1, cudaStream_t stream); + template __global__ void buildDecoderAttentionMaskKernel(T* attention_mask, const int* sequence_lengths, const int max_seq_len) { @@ -150,10 +327,12 @@ __global__ void buildDecoderAttentionMaskKernel(T* attention_mask, const int* se for (int i = threadIdx.x; i < max_seq_len * max_seq_len; i += blockDim.x) { int row_id = i / max_seq_len; int col_id = i % max_seq_len; - if (row_id < length && col_id <= row_id) + if (row_id < length && col_id <= row_id) { attention_mask[i] = (T)(1.0f); - else + } + else { attention_mask[i] = (T)(0.0f); + } } } @@ -174,6 +353,13 @@ template void invokeBuildDecoderAttentionMask(half* attention_mask, const int batch_size, const int max_seq_len, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void invokeBuildDecoderAttentionMask(__nv_bfloat16* attention_mask, + const int* sequence_lengths, + const int batch_size, + const int max_seq_len, + cudaStream_t stream); +#endif template __launch_bounds__(1024, 1) __global__ void lookupHiddenStateOfLastToken(T* from_tensor, @@ -224,4 +410,99 @@ template void invokeLookupHiddenStateOfLastToken(half* from_tensor, const int hidden_units, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void invokeLookupHiddenStateOfLastToken(__nv_bfloat16* from_tensor, + const __nv_bfloat16* hidden_state, + const int* input_lengths, + const int max_input_length, + const int batch_size, + const int hidden_units, + cudaStream_t stream); +#endif + +__global__ void tileGptInputs(int* tiled_input_ids, + int* tiled_input_lengths, + const int* input_ids, + const int* input_lengths, + const int max_input_length) +{ + if (threadIdx.x == 0) { + tiled_input_lengths[blockIdx.x * gridDim.y + blockIdx.y] = input_lengths[blockIdx.x]; + } + for (int index = threadIdx.x; index < max_input_length; index += blockDim.x) { + tiled_input_ids[(blockIdx.x * gridDim.y + blockIdx.y) * max_input_length + index] = + input_ids[blockIdx.x * max_input_length + index]; + } +} + +void invokeTileGptInputs(int* tiled_input_ids, + int* tiled_input_lengths, + const int* input_ids, + const int* input_lengths, + const int batch_size, + const int beam_width, + const int max_input_length, + cudaStream_t stream) +{ + dim3 grid(batch_size, beam_width); + dim3 block(min(1024, max_input_length)); + tileGptInputs<<>>( + tiled_input_ids, tiled_input_lengths, input_ids, input_lengths, max_input_length); +} + +bool hasDiffRuntimeArgs(const std::unordered_map* input_tensors) +{ + // runtime_top_k [1] or [batch_size] on cpu, optional. + // runtime_top_p [1] or [batch_size] on cpu, optional + // beam_search_diversity_rate [1] or [batch_size] on cpu, optional + // temperature [1] or [batch_size] on cpu, optional + // len_penalty [1] or [batch_size] on cpu, optional + // repetition_penalty [1] or [batch_size] on cpu, optional + // random_seed [1] or [batch_size] on cpu, optional + + std::vector check_list = {"runtime_top_k", + "runtime_top_p", + "beam_search_diversity_rate", + "temperature", + "len_penalty", + "repetition_penalty", + "random_seed"}; + + for (int i = 0; i < (int)check_list.size(); i++) { + if (input_tensors->count(check_list[i])) { + auto tensor = input_tensors->at(check_list[i]); + FT_CHECK(tensor.shape.size() == 1); + for (int j = 1; j < (int)tensor.shape[0]; j++) { + const void* data = tensor.data; + switch (tensor.type) { + case TYPE_FP32: + if (((const float*)data)[0] != ((const float*)data)[j]) { + return true; + } + break; + case TYPE_INT32: + if (((const int*)data)[0] != ((const int*)data)[j]) { + return true; + } + break; + case TYPE_UINT32: + if (((const uint*)data)[0] != ((const uint*)data)[j]) { + return true; + } + break; + case TYPE_UINT64: + if (((const unsigned long long int*)data)[0] != ((const unsigned long long int*)data)[j]) { + return true; + } + break; + default: + FT_CHECK_WITH_INFO(false, check_list[i] + ": " + tensor.toString() + " is invalid."); + break; + } + } + } + } + return false; +} + } // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/gpt_kernels.h b/src/fastertransformer/kernels/gpt_kernels.h index 42ab43fbc..5f0fcdbfc 100644 --- a/src/fastertransformer/kernels/gpt_kernels.h +++ b/src/fastertransformer/kernels/gpt_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -18,6 +18,9 @@ #include #include +#include + +#include "src/fastertransformer/utils/Tensor.h" namespace fastertransformer { @@ -34,9 +37,35 @@ void invokeInputIdsEmbeddingLookupPosEncoding(T* from_tensor, const int hidden_units, cudaStream_t stream); +template +struct inputIdsEmbeddingLookupPosEncodingSoftPromptParam { + T* from_tensor; + int* output_ids; + int* input_lengths; + const T* embedding_table; + const T* pos_table; + const float* prefix_soft_prompt_embedding; + const int* prefix_soft_prompt_lengths; + int* input_ids; + int start_step; + int max_input_length; + int max_prefix_soft_prompt_length; + int batch_size; + int beam_width; + int hidden_units; + cudaStream_t stream; +}; + +template +void invokeInputIdsEmbeddingLookupPosEncodingSoftPrompt(inputIdsEmbeddingLookupPosEncodingSoftPromptParam param); + template void invokeTransposeAxis01(T* out, T* in, const int dim0, const int dim1, const int dim2, cudaStream_t stream); +template +void invokeTransposeAxis01( + T* out, T* in, const int* in_skipping_dim1, const int dim0, const int dim1, cudaStream_t stream); + template void invokeBuildDecoderAttentionMask( T* attention_mask, const int* sequence_lengths, const int batch_size, const int max_seq_len, cudaStream_t stream); @@ -50,4 +79,31 @@ void invokeLookupHiddenStateOfLastToken(T* from_tensor, const int hidden_units, cudaStream_t stream); +void invokeTileGptInputs(int* tiled_input_ids, + int* tiled_input_lengths, + const int* input_ids, + const int* input_lengths, + const int batch_size, + const int beam_width, + const int max_input_length, + cudaStream_t stream); + +bool hasDiffRuntimeArgs(const std::unordered_map* input_tensors); + +template +void handleOptArg(const std::unordered_map* input_tensors, + const std::string& arg_name, + T* d_ptr, + T default_value, + size_t size) +{ + if (input_tensors->find(arg_name) != input_tensors->end()) { + FT_CHECK(input_tensors->at(arg_name).size() == size); + cudaH2Dcpy(d_ptr, (const T*)input_tensors->at(arg_name).data, size); + } + else { + deviceFill(d_ptr, size, default_value); + } +} + } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/layernorm_int8_kernels.cu b/src/fastertransformer/kernels/layernorm_int8_kernels.cu index 93f0105b7..297f4dd1e 100644 --- a/src/fastertransformer/kernels/layernorm_int8_kernels.cu +++ b/src/fastertransformer/kernels/layernorm_int8_kernels.cu @@ -19,778 +19,2252 @@ namespace fastertransformer { -//input1/input2/output matrix with layout of cublasLt CUBLASLT_ORDER_COL32 (m*n) +// input1/input2/output matrix with layout of cublasLt CUBLASLT_ORDER_COL32 (m*n) //(grid, block) must be (m, n) -//for per_channel_quantization for weight -__global__ -void add_bias_input_layernorm_COL32_int32I_DataTypeO(float* output, const int32_t* input1, const float* input2, const float* bias, const float* gamma, - const float* beta, int m, int n, const float* weight_amax, const float *input1_amax_ptr) +// for per_channel_quantization for weight +__global__ void add_bias_input_layernorm_COL32_int32I_DataTypeO(float* output, + const int32_t* input1, + const float* input2, + const float* bias, + const float* gamma, + const float* beta, + int m, + int n, + const float* weight_amax, + const float* input1_amax_ptr) { - const float input1_amax = __ldg(input1_amax_ptr); - int col_start = threadIdx.x; + const float input1_amax = __ldg(input1_amax_ptr); + int col_start = threadIdx.x; - __shared__ float s_mean; - __shared__ float s_variance; - float mean = 0.0f; - float variance = 0.0f; + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; - float local_out; - int outIdx = ((col_start & 0xffffffe0)*m+(blockIdx.x << 5) + (col_start&31)); + float local_out; + int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)); - float tmp = static_cast(__ldg(input1 + outIdx)) * __ldg(weight_amax + col_start) * input1_amax * 0.000062f; //(1/127/127); - float inputTmp = __ldg(input2 + outIdx); + float tmp = static_cast(__ldg(input1 + outIdx)) * __ldg(weight_amax + col_start) * input1_amax + * 0.000062f; //(1/127/127); + float inputTmp = __ldg(input2 + outIdx); - local_out = tmp + inputTmp + __ldg(bias + col_start); + local_out = tmp + inputTmp + __ldg(bias + col_start); - mean = blockReduceSum(local_out); - if(threadIdx.x == 0) - s_mean = __fdividef(mean, n); - __syncthreads(); + mean = blockReduceSum(local_out); + if (threadIdx.x == 0) { + s_mean = __fdividef(mean, n); + } + __syncthreads(); - local_out = local_out - s_mean; + local_out = local_out - s_mean; - variance = blockReduceSum(local_out * local_out); - if(threadIdx.x == 0){ - s_variance = __fdividef(variance, n) + 1e-6f; - s_variance = rsqrtf(s_variance); - } - __syncthreads(); + variance = blockReduceSum(local_out * local_out); + if (threadIdx.x == 0) { + s_variance = __fdividef(variance, n) + 1e-6f; + s_variance = rsqrtf(s_variance); + } + __syncthreads(); - local_out = (local_out * s_variance) * __ldg(gamma + col_start) + __ldg(beta + col_start); + local_out = (local_out * s_variance) * __ldg(gamma + col_start) + __ldg(beta + col_start); - output[outIdx] = local_out; + output[outIdx] = local_out; } -__global__ -void add_bias_input_layernorm_COL32_int32I_DataTypeO(half2* output, const int2* input1, const half2* input2, const half2* bias, const half2* gamma, - const half2* beta, int m, int n, const float2* weight_amax, const float *input1_amax_ptr) +__global__ void add_bias_input_layernorm_COL32_int32I_DataTypeO(half2* output, + const int2* input1, + const half2* input2, + const half2* bias, + const half2* gamma, + const half2* beta, + int m, + int n, + const float2* weight_amax, + const float* input1_amax_ptr) { - int col_start = threadIdx.x << 1; + int col_start = threadIdx.x << 1; - const float input1_amax = __ldg(input1_amax_ptr); + const float input1_amax = __ldg(input1_amax_ptr); - __shared__ float s_mean; - __shared__ float s_variance; - float mean = 0.0f; - float variance = 0.0f; + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; - float2 local_out; - int outIdx = ((col_start & 0xffffffe0)*m+(blockIdx.x << 5) + (col_start&31)) >> 1; + float2 local_out; + int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)) >> 1; - const int2 input1Tmp = __ldg(input1 + outIdx); - const float2 weightTmp = __ldg(weight_amax + threadIdx.x); + const int2 input1Tmp = __ldg(input1 + outIdx); + const float2 weightTmp = __ldg(weight_amax + threadIdx.x); - float2 addTmp2; - addTmp2.x = static_cast(input1Tmp.x) * weightTmp.x * input1_amax * 0.000062f; //(1/127/127); - addTmp2.y = static_cast(input1Tmp.y) * weightTmp.y * input1_amax * 0.000062f; //(1/127/127); - - const half2 inputTmp = __ldg(input2 + outIdx); - const half2 biasTmp = __ldg(bias + threadIdx.x); + float2 addTmp2; + addTmp2.x = static_cast(input1Tmp.x) * weightTmp.x * input1_amax * 0.000062f; //(1/127/127); + addTmp2.y = static_cast(input1Tmp.y) * weightTmp.y * input1_amax * 0.000062f; //(1/127/127); - local_out = __half22float2(__hadd2(inputTmp, biasTmp)); - local_out.x = local_out.x + addTmp2.x; - local_out.y = local_out.y + addTmp2.y; + const half2 inputTmp = __ldg(input2 + outIdx); + const half2 biasTmp = __ldg(bias + threadIdx.x); - mean = blockReduceSum(local_out.x + local_out.y); - if(threadIdx.x == 0) - s_mean = __fdividef(mean, n); - __syncthreads(); + local_out = __half22float2(__hadd2(inputTmp, biasTmp)); + local_out.x = local_out.x + addTmp2.x; + local_out.y = local_out.y + addTmp2.y; - local_out.x = local_out.x - s_mean; - local_out.y = local_out.y - s_mean; + mean = blockReduceSum(local_out.x + local_out.y); + if (threadIdx.x == 0) { + s_mean = __fdividef(mean, n); + } + __syncthreads(); - variance = blockReduceSum(local_out.x*local_out.x + local_out.y*local_out.y); - if(threadIdx.x == 0){ - s_variance = __fdividef(variance, n) + 1e-6f; - s_variance = rsqrtf(s_variance); - } - __syncthreads(); + local_out.x = local_out.x - s_mean; + local_out.y = local_out.y - s_mean; - float2 outputTmp; - const half2 gammaTmp = __ldg(gamma + threadIdx.x); - const half2 betaTmp = __ldg(beta + threadIdx.x); + variance = blockReduceSum(local_out.x * local_out.x + local_out.y * local_out.y); + if (threadIdx.x == 0) { + s_variance = __fdividef(variance, n) + 1e-6f; + s_variance = rsqrtf(s_variance); + } + __syncthreads(); - outputTmp.x = (local_out.x * s_variance) * static_cast(gammaTmp.x) + static_cast(betaTmp.x); - outputTmp.y = (local_out.y * s_variance) * static_cast(gammaTmp.y) + static_cast(betaTmp.y); + float2 outputTmp; + const half2 gammaTmp = __ldg(gamma + threadIdx.x); + const half2 betaTmp = __ldg(beta + threadIdx.x); - output[outIdx] = __float22half2_rn(outputTmp); + outputTmp.x = (local_out.x * s_variance) * static_cast(gammaTmp.x) + static_cast(betaTmp.x); + outputTmp.y = (local_out.y * s_variance) * static_cast(gammaTmp.y) + static_cast(betaTmp.y); + + output[outIdx] = __float22half2_rn(outputTmp); +} + +template +void invokeAddBiasResidualLayerNormCol32(T* output, + const int32_t* input1, + const T* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + cudaStream_t stream, + const float* weight_amax, + const float* input1_amax_ptr) +{ + + dim3 grid(m); + dim3 block(n); + if (sizeof(T) == sizeof(half)) { + block.x /= 2; + assert(block.x <= 1024); + add_bias_input_layernorm_COL32_int32I_DataTypeO<<>>((half2*)output, + (const int2*)input1, + (const half2*)input2, + (const half2*)bias, + (const half2*)gamma, + (const half2*)beta, + m, + n, + (const float2*)weight_amax, + input1_amax_ptr); + } + else { + assert(block.x <= 1024); + add_bias_input_layernorm_COL32_int32I_DataTypeO<<>>((float*)output, + input1, + (const float*)input2, + (const float*)bias, + (const float*)gamma, + (const float*)beta, + m, + n, + weight_amax, + input1_amax_ptr); + } +} + +template void invokeAddBiasResidualLayerNormCol32(float* output, + const int32_t* input1, + const float* input2, + const float* bias, + const float* gamma, + const float* beta, + int m, + int n, + cudaStream_t stream, + const float* weight_amax, + const float* input1_amax_ptr); +template void invokeAddBiasResidualLayerNormCol32(half* output, + const int32_t* input1, + const half* input2, + const half* bias, + const half* gamma, + const half* beta, + int m, + int n, + cudaStream_t stream, + const float* weight_amax, + const float* input1_amax_ptr); + +// input1/input2/out matrix with layout of cublasLt CUBLASLT_ORDER_COL32 (m*n) +//(grid, block) must be (m, n/4) +// using char4 +template +__global__ void add_bias_input_layernorm_COL32_int8IO(int8_t* output, + const int8_t* input1, + const int8_t* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr, + const float* output_scale_ptr) +{ + const float input1_deQFactor = __ldg(input1_deQFactor_ptr); + const float input2_deQFactor = __ldg(input2_deQFactor_ptr); + const float output_scale = __ldg(output_scale_ptr); + int col_start = threadIdx.x << 2; + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + float local_out[4]; + int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)) >> 2; + char4* outTmpPtr = (char4*)output; + char4* input1TmpPtr = (char4*)input1; + char4* input2TmpPtr = (char4*)input2; + char4 input1Tmp = __ldg(input1TmpPtr + outIdx); + char4 input2Tmp = __ldg(input2TmpPtr + outIdx); + + int col_start_tmp = col_start; + local_out[0] = static_cast(input2Tmp.x) * input2_deQFactor + + static_cast(input1Tmp.x) * input1_deQFactor + + static_cast(__ldg(bias + col_start_tmp)); + col_start_tmp = col_start_tmp + 1; + local_out[1] = static_cast(input2Tmp.y) * input2_deQFactor + + static_cast(input1Tmp.y) * input1_deQFactor + + static_cast(__ldg(bias + col_start_tmp)); + col_start_tmp = col_start_tmp + 1; + local_out[2] = static_cast(input2Tmp.z) * input2_deQFactor + + static_cast(input1Tmp.z) * input1_deQFactor + + static_cast(__ldg(bias + col_start_tmp)); + col_start_tmp = col_start_tmp + 1; + local_out[3] = static_cast(input2Tmp.w) * input2_deQFactor + + static_cast(input1Tmp.w) * input1_deQFactor + + static_cast(__ldg(bias + col_start_tmp)); + + mean = blockReduceSum(local_out[0] + local_out[1] + local_out[2] + local_out[3]); + if (threadIdx.x == 0) { + s_mean = mean * __fdividef(1.0f, n); + } + __syncthreads(); + + local_out[0] = local_out[0] - s_mean; + local_out[1] = local_out[1] - s_mean; + local_out[2] = local_out[2] - s_mean; + local_out[3] = local_out[3] - s_mean; + variance = blockReduceSum(local_out[0] * local_out[0] + local_out[1] * local_out[1] + + local_out[2] * local_out[2] + local_out[3] * local_out[3]); + if (threadIdx.x == 0) { + s_variance = variance * __fdividef(1.0f, n) + 1e-6f; + s_variance = rsqrtf(s_variance); + } + __syncthreads(); + + local_out[0] = (local_out[0] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + input2Tmp.x = float_to_int8_rn(local_out[0] * output_scale); + + col_start = col_start + 1; + local_out[1] = (local_out[1] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + input2Tmp.y = float_to_int8_rn(local_out[1] * output_scale); + + col_start = col_start + 1; + local_out[2] = (local_out[2] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + input2Tmp.z = float_to_int8_rn(local_out[2] * output_scale); + + col_start = col_start + 1; + local_out[3] = (local_out[3] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + input2Tmp.w = float_to_int8_rn(local_out[3] * output_scale); + + outTmpPtr[outIdx] = input2Tmp; +} + +template<> +__global__ void add_bias_input_layernorm_COL32_int8IO(int8_t* output, + const int8_t* input1, + const int8_t* input2, + const half2* bias, + const half2* gamma, + const half2* beta, + int m, + int n, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr, + const float* output_scale_ptr) +{ + const float input1_deQFactor = __ldg(input1_deQFactor_ptr); + const float input2_deQFactor = __ldg(input2_deQFactor_ptr); + const float output_scale = __ldg(output_scale_ptr); + int col_start = threadIdx.x << 2; + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + float local_out[4]; + int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)) >> 2; + char4* outTmpPtr = (char4*)output; + char4* input1TmpPtr = (char4*)input1; + char4* input2TmpPtr = (char4*)input2; + char4 input1Tmp = __ldg(input1TmpPtr + outIdx); + char4 input2Tmp = __ldg(input2TmpPtr + outIdx); + + int col_start_tmp = col_start; + half2 biasTmp = __ldg(bias + (col_start_tmp >> 1)); + local_out[0] = static_cast(input2Tmp.x) * input2_deQFactor + + static_cast(input1Tmp.x) * input1_deQFactor + static_cast(biasTmp.x); + col_start_tmp = col_start_tmp + 1; + local_out[1] = static_cast(input2Tmp.y) * input2_deQFactor + + static_cast(input1Tmp.y) * input1_deQFactor + static_cast(biasTmp.y); + + col_start_tmp = col_start_tmp + 1; + biasTmp = __ldg(bias + (col_start_tmp >> 1)); + local_out[2] = static_cast(input2Tmp.z) * input2_deQFactor + + static_cast(input1Tmp.z) * input1_deQFactor + static_cast(biasTmp.x); + col_start_tmp = col_start_tmp + 1; + local_out[3] = static_cast(input2Tmp.w) * input2_deQFactor + + static_cast(input1Tmp.w) * input1_deQFactor + static_cast(biasTmp.y); + + mean = blockReduceSum(local_out[0] + local_out[1] + local_out[2] + local_out[3]); + if (threadIdx.x == 0) { + s_mean = mean * __fdividef(1.0f, n); + } + __syncthreads(); + + local_out[0] = local_out[0] - s_mean; + local_out[1] = local_out[1] - s_mean; + local_out[2] = local_out[2] - s_mean; + local_out[3] = local_out[3] - s_mean; + variance = blockReduceSum(local_out[0] * local_out[0] + local_out[1] * local_out[1] + + local_out[2] * local_out[2] + local_out[3] * local_out[3]); + if (threadIdx.x == 0) { + s_variance = variance * __fdividef(1.0f, n) + 1e-6f; + s_variance = rsqrtf(s_variance); + } + __syncthreads(); + + col_start_tmp = col_start >> 1; + biasTmp = __ldg(gamma + col_start_tmp); + half2 betaTmp = __ldg(beta + col_start_tmp); + + local_out[0] = (local_out[0] * s_variance) * static_cast(biasTmp.x) + static_cast(betaTmp.x); + input2Tmp.x = float_to_int8_rn(local_out[0] * output_scale); + + col_start = col_start + 1; + local_out[1] = (local_out[1] * s_variance) * static_cast(biasTmp.y) + static_cast(betaTmp.y); + input2Tmp.y = float_to_int8_rn(local_out[1] * output_scale); + + col_start = col_start + 1; + col_start_tmp = col_start >> 1; + biasTmp = __ldg(gamma + col_start_tmp); + betaTmp = __ldg(beta + col_start_tmp); + local_out[2] = (local_out[2] * s_variance) * static_cast(biasTmp.x) + static_cast(betaTmp.x); + input2Tmp.z = float_to_int8_rn(local_out[2] * output_scale); + + col_start = col_start + 1; + local_out[3] = (local_out[3] * s_variance) * static_cast(biasTmp.y) + static_cast(betaTmp.y); + input2Tmp.w = float_to_int8_rn(local_out[3] * output_scale); + + outTmpPtr[outIdx] = input2Tmp; +} + +template +void invokeAddBiasResidualLayerNormCol32(int8_t* output, + const int8_t* input1, + const int8_t* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr, + const float* output_scale_ptr) +{ + dim3 grid(m); + dim3 block(n / 4); + assert(n <= 1024); + if (sizeof(T) == sizeof(half)) { + add_bias_input_layernorm_COL32_int8IO<<>>(output, + input1, + input2, + (const half2*)bias, + (const half2*)gamma, + (const half2*)beta, + m, + n, + input1_deQFactor_ptr, + input2_deQFactor_ptr, + output_scale_ptr); + } + else { + add_bias_input_layernorm_COL32_int8IO<<>>(output, + input1, + input2, + bias, + gamma, + beta, + m, + n, + input1_deQFactor_ptr, + input2_deQFactor_ptr, + output_scale_ptr); + } } +template void invokeAddBiasResidualLayerNormCol32(int8_t* output, + const int8_t* input1, + const int8_t* input2, + const float* bias, + const float* gamma, + const float* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr, + const float* output_scale_ptr); + +template void invokeAddBiasResidualLayerNormCol32(int8_t* output, + const int8_t* input1, + const int8_t* input2, + const half* bias, + const half* gamma, + const half* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr, + const float* output_scale_ptr); + +// input1/input2/out matrix with layout of cublasLt CUBLASLT_ORDER_COL32 (m*n) +//(grid, block) must be (m, n) +template +__global__ void add_bias_input_layernorm_COL32_int8I_DataTypeO(T* output, + const int8_t* input1, + const int8_t* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr) +{ + const float input1_deQFactor = __ldg(input1_deQFactor_ptr); + const float input2_deQFactor = __ldg(input2_deQFactor_ptr); + int col_start = threadIdx.x; + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + float local_out; + int idx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)); + + local_out = static_cast(__ldg(input2 + idx)) * input2_deQFactor + + static_cast(__ldg(input1 + idx)) * input1_deQFactor + + static_cast(__ldg(bias + col_start)); + + mean = blockReduceSum(local_out); + if (threadIdx.x == 0) { + s_mean = mean * __fdividef(1.0f, n); + } + __syncthreads(); + + local_out = local_out - s_mean; + + variance = blockReduceSum(local_out * local_out); + + if (threadIdx.x == 0) { + s_variance = variance * __fdividef(1.0f, n) + 1e-6f; + s_variance = rsqrtf(s_variance); + } + __syncthreads(); + + local_out = (local_out * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + + output[idx] = local_out; +} + +// input1/input2/out matrix with layout of cublasLt CUBLASLT_ORDER_COL32 (m*n) +//(grid, block) must be (m, n/2) +template<> +__global__ void add_bias_input_layernorm_COL32_int8I_DataTypeO(half2* output, + const int8_t* input1, + const int8_t* input2, + const half2* bias, + const half2* gamma, + const half2* beta, + int m, + int n, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr) +{ + const float input1_deQFactor = __ldg(input1_deQFactor_ptr); + const float input2_deQFactor = __ldg(input2_deQFactor_ptr); + int col_start = threadIdx.x << 1; + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + float2 local_out; + int idx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)) >> 1; -template -void invokeAddBiasResidualLayerNormCol32(T* output, const int32_t* input1, const T* input2, const T* bias, const T* gamma, - const T* beta, int m, int n, cudaStream_t stream, const float* weight_amax, - const float* input1_amax_ptr){ + const char2* input1_ptr2 = (const char2*)input1; + const char2* input2_ptr2 = (const char2*)input2; + char2 input_tmp1 = __ldg(input1_ptr2 + idx); + char2 input_tmp2 = __ldg(input2_ptr2 + idx); - dim3 grid(m); - dim3 block(n); - if (sizeof(T) == sizeof(half)){ - block.x /= 2; - assert(block.x <= 1024); - add_bias_input_layernorm_COL32_int32I_DataTypeO<<>>((half2 *)output, (const int2*)input1, (const half2 *)input2, (const half2 *)bias, (const half2 *)gamma, - (const half2 *)beta, m, n, (const float2*)weight_amax, input1_amax_ptr); - } - else{ - assert(block.x <= 1024); - add_bias_input_layernorm_COL32_int32I_DataTypeO<<>>((float *)output, input1, (const float*)input2, (const float*)bias, (const float*)gamma, - (const float*)beta, m, n, weight_amax, input1_amax_ptr); - } + half2 bias_tmp = __ldg(bias + threadIdx.x); + + local_out.x = static_cast(input_tmp1.x) * input1_deQFactor + + static_cast(input_tmp2.x) * input2_deQFactor + static_cast(bias_tmp.x); + + local_out.y = static_cast(input_tmp1.y) * input1_deQFactor + + static_cast(input_tmp2.y) * input2_deQFactor + static_cast(bias_tmp.y); + + mean = blockReduceSum(local_out.x + local_out.y); + if (threadIdx.x == 0) { + s_mean = mean * __fdividef(1.0f, n); + } + __syncthreads(); + + local_out.x = local_out.x - s_mean; + + local_out.y = local_out.y - s_mean; + + variance = blockReduceSum(local_out.x * local_out.x + local_out.y * local_out.y); + + if (threadIdx.x == 0) { + s_variance = variance * __fdividef(1.0f, n) + 1e-6f; + s_variance = rsqrtf(s_variance); + } + __syncthreads(); + + half2 gamma_tmp = __ldg(gamma + threadIdx.x); + half2 beta_tmp = __ldg(beta + threadIdx.x); + + local_out.x = (local_out.x * s_variance) * static_cast(gamma_tmp.x) + static_cast(beta_tmp.x); + local_out.y = (local_out.y * s_variance) * static_cast(gamma_tmp.y) + static_cast(beta_tmp.y); + + bias_tmp.x = half(local_out.x); + bias_tmp.y = half(local_out.y); + + output[idx] = bias_tmp; } -template -void invokeAddBiasResidualLayerNormCol32(float* output, const int32_t* input1, const float* input2, const float* bias, const float* gamma, - const float* beta, int m, int n, cudaStream_t stream, const float* weight_amax, - const float* input1_amax_ptr); -template -void invokeAddBiasResidualLayerNormCol32(half* output, const int32_t* input1, const half* input2, const half* bias, const half* gamma, - const half* beta, int m, int n, cudaStream_t stream, const float* weight_amax, - const float* input1_amax_ptr); +template +void invokeAddBiasResidualLayerNormCol32(T* output, + const int8_t* input1, + const int8_t* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr) +{ + dim3 grid(m); + dim3 block(n); + if (sizeof(T) == sizeof(half)) { + assert(n / 2 <= 1024 && n % 2 == 0); + block.x = n / 2; + add_bias_input_layernorm_COL32_int8I_DataTypeO<<>>((half2*)output, + input1, + input2, + (const half2*)bias, + (const half2*)gamma, + (const half2*)beta, + m, + n, + input1_deQFactor_ptr, + input2_deQFactor_ptr); + } + else { + assert(n <= 1024); + add_bias_input_layernorm_COL32_int8I_DataTypeO<<>>( + output, input1, input2, bias, gamma, beta, m, n, input1_deQFactor_ptr, input2_deQFactor_ptr); + } +} +template void invokeAddBiasResidualLayerNormCol32(float* output, + const int8_t* input1, + const int8_t* input2, + const float* bias, + const float* gamma, + const float* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr); + +template void invokeAddBiasResidualLayerNormCol32(half* output, + const int8_t* input1, + const int8_t* input2, + const half* bias, + const half* gamma, + const half* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr); + +// input1/input2/out matrix with layout of cublasLt CUBLASLT_ORDER_COL32 (m*n) +//(grid, block) must be (m, n/4) +// using char4 +template +__global__ void add_bias_input_layernorm_COL32_int8IO_noRes(int8_t* output, + int8_t* input1, + T* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + const float* input1_deQFactor_ptr, + const float* output_scale_ptr) +{ + const float input1_deQFactor = __ldg(input1_deQFactor_ptr); + const float output_scale = __ldg(output_scale_ptr); + int col_start = threadIdx.x << 2; + bool qual = (col_start < n); + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + float local_out[4]; + int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)) >> 2; + char4* input1TmpPtr = (char4*)input1; + char4 input1Tmp; + if (qual) { + input1Tmp = __ldg(input1TmpPtr + outIdx); + int col_start_tmp = col_start; + local_out[0] = static_cast(input1Tmp.x) * input1_deQFactor + + static_cast(input2[(outIdx << 2) + 0]) + static_cast(bias[col_start_tmp]); + input2[(outIdx << 2) + 0] = local_out[0]; + + col_start_tmp = col_start_tmp + 1; + local_out[1] = static_cast(input1Tmp.y) * input1_deQFactor + + static_cast(input2[(outIdx << 2) + 1]) + static_cast(bias[col_start_tmp]); + input2[(outIdx << 2) + 1] = local_out[1]; + + col_start_tmp = col_start_tmp + 1; + local_out[2] = static_cast(input1Tmp.z) * input1_deQFactor + + static_cast(input2[(outIdx << 2) + 2]) + static_cast(bias[col_start_tmp]); + input2[(outIdx << 2) + 2] = local_out[2]; + + col_start_tmp = col_start_tmp + 1; + local_out[3] = static_cast(input1Tmp.w) * input1_deQFactor + + static_cast(input2[(outIdx << 2) + 3]) + static_cast(bias[col_start_tmp]); + input2[(outIdx << 2) + 3] = local_out[3]; + } + + mean = blockReduceSum(qual ? local_out[0] + local_out[1] + local_out[2] + local_out[3] : 0.0f); + if (threadIdx.x == 0) { + s_mean = mean * __fdividef(1.0f, n); + } + __syncthreads(); + + if (qual) { + local_out[0] = local_out[0] - s_mean; + local_out[1] = local_out[1] - s_mean; + local_out[2] = local_out[2] - s_mean; + local_out[3] = local_out[3] - s_mean; + } + variance = blockReduceSum(qual ? local_out[0] * local_out[0] + local_out[1] * local_out[1] + + local_out[2] * local_out[2] + local_out[3] * local_out[3] : + 0.0f); + if (threadIdx.x == 0) { + s_variance = variance * __fdividef(1.0f, n) + 1e-6f; + s_variance = rsqrtf(s_variance); + } + __syncthreads(); + + char4 outputTmp; + char4* outputTmpPtr = (char4*)output; + if (qual) { + local_out[0] = (local_out[0] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + outputTmp.x = float_to_int8_rn(local_out[0] * output_scale); + + col_start = col_start + 1; + local_out[1] = (local_out[1] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + outputTmp.y = float_to_int8_rn(local_out[1] * output_scale); + + col_start = col_start + 1; + local_out[2] = (local_out[2] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + outputTmp.z = float_to_int8_rn(local_out[2] * output_scale); + + col_start = col_start + 1; + local_out[3] = (local_out[3] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + outputTmp.w = float_to_int8_rn(local_out[3] * output_scale); + + outputTmpPtr[outIdx] = outputTmp; + } +} -//input1/input2/out matrix with layout of cublasLt CUBLASLT_ORDER_COL32 (m*n) +template<> +__global__ void add_bias_input_layernorm_COL32_int8IO_noRes(int8_t* output, + int8_t* input1, + half2* input2, + const half2* bias, + const half2* gamma, + const half2* beta, + int m, + int n, + const float* input1_deQFactor_ptr, + const float* output_scale_ptr) +{ + const float input1_deQFactor = __ldg(input1_deQFactor_ptr); + const float output_scale = __ldg(output_scale_ptr); + int col_start = threadIdx.x << 1; + bool qual = (col_start < n); + + __shared__ float s_mean; + __shared__ float s_variance; + float sums[2] = {0.0f, 0.0f}; + // float mean = 0.0f; + // float variance = 0.0f; + + float local_out[2]; + int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)) >> 1; + char2* input1TmpPtr = (char2*)input1; + char2 input1Tmp; + if (qual) { + input1Tmp = input1TmpPtr[outIdx]; + half2 biasTmp = bias[threadIdx.x]; + half2 input2Tmp = input2[outIdx]; + local_out[0] = static_cast(input1Tmp.x) * input1_deQFactor + static_cast(input2Tmp.x) + + static_cast(biasTmp.x); + local_out[1] = static_cast(input1Tmp.y) * input1_deQFactor + static_cast(input2Tmp.y) + + static_cast(biasTmp.y); + + input2Tmp.x = local_out[0]; + input2Tmp.y = local_out[1]; + input2[outIdx] = input2Tmp; + for (int i = 0; i < 2; i++) { + sums[0] += local_out[i]; + sums[1] += local_out[i] * local_out[i]; + } + } + + blockReduceSumV2(sums); + + if (threadIdx.x == 0) { + s_mean = sums[0] * __fdividef(1.0f, n); + s_variance = rsqrtf(sums[1] * __fdividef(1.0f, n) - s_mean * s_mean + 1e-6); + } + __syncthreads(); + + char2 outputTmp; + char2* outputTmpPtr = (char2*)output; + if (qual) { + half2 gammaTmp = gamma[threadIdx.x]; + half2 betaTmp = beta[threadIdx.x]; + local_out[0] = + (local_out[0] - s_mean) * s_variance * static_cast(gammaTmp.x) + static_cast(betaTmp.x); + outputTmp.x = float_to_int8_rn(local_out[0] * output_scale); + + local_out[1] = + (local_out[1] - s_mean) * s_variance * static_cast(gammaTmp.y) + static_cast(betaTmp.y); + outputTmp.y = float_to_int8_rn(local_out[1] * output_scale); + + outputTmpPtr[outIdx] = outputTmp; + } +} + +template +void invokeAddBiasResidualLayerNormCol32_noRes(int8_t* output, + int8_t* input1, + T* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* output_scale_ptr) +{ + dim3 grid(m); + int blockSize = (n / 4 + 31) / 32 * 32; + dim3 block(blockSize); + assert(blockSize <= 1024); + if (sizeof(T) == sizeof(half)) { + blockSize = (n / 2 + 31) / 32 * 32; + assert(blockSize <= 1024); + add_bias_input_layernorm_COL32_int8IO_noRes<<>>(output, + input1, + (half2*)input2, + (const half2*)bias, + (const half2*)gamma, + (const half2*)beta, + m, + n, + input1_deQFactor_ptr, + output_scale_ptr); + } + else { + add_bias_input_layernorm_COL32_int8IO_noRes<<>>( + output, input1, input2, bias, gamma, beta, m, n, input1_deQFactor_ptr, output_scale_ptr); + } +} + +template void invokeAddBiasResidualLayerNormCol32_noRes(int8_t* output, + int8_t* input1, + float* input2, + const float* bias, + const float* gamma, + const float* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* output_scale_ptr); + +template void invokeAddBiasResidualLayerNormCol32_noRes(int8_t* output, + int8_t* input1, + half* input2, + const half* bias, + const half* gamma, + const half* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* output_scale_ptr); + +// input1/input2/out matrix with layout of cublasLt CUBLASLT_ORDER_COL32 (m*n) //(grid, block) must be (m, n/4) -//using char4 -template -__global__ -void add_bias_input_layernorm_COL32_int8IO(int8_t* output, const int8_t* input1, const int8_t* input2, const T* bias, const T* gamma, - const T* beta, int m, int n, - const float *input1_deQFactor_ptr, - const float *input2_deQFactor_ptr, const float *output_scale_ptr) -{ - const float input1_deQFactor = __ldg(input1_deQFactor_ptr); - const float input2_deQFactor = __ldg(input2_deQFactor_ptr); - const float output_scale = __ldg(output_scale_ptr); - int col_start = threadIdx.x << 2; - - __shared__ float s_mean; - __shared__ float s_variance; - float mean = 0.0f; - float variance = 0.0f; - - float local_out[4]; - int outIdx = ((col_start & 0xffffffe0)*m+(blockIdx.x << 5) + (col_start&31)) >> 2; - char4 *outTmpPtr = (char4*)output; - char4 *input1TmpPtr = (char4*)input1; - char4 *input2TmpPtr = (char4*)input2; - char4 input1Tmp = __ldg(input1TmpPtr+outIdx); - char4 input2Tmp = __ldg(input2TmpPtr+outIdx); - - - int col_start_tmp = col_start; - local_out[0] = static_cast(input2Tmp.x)*input2_deQFactor + static_cast(input1Tmp.x)*input1_deQFactor + static_cast(__ldg(bias+col_start_tmp)); - col_start_tmp = col_start_tmp + 1; - local_out[1] = static_cast(input2Tmp.y)*input2_deQFactor + static_cast(input1Tmp.y)*input1_deQFactor + static_cast(__ldg(bias+col_start_tmp)); - col_start_tmp = col_start_tmp + 1; - local_out[2] = static_cast(input2Tmp.z)*input2_deQFactor + static_cast(input1Tmp.z)*input1_deQFactor + static_cast(__ldg(bias+col_start_tmp)); - col_start_tmp = col_start_tmp + 1; - local_out[3] = static_cast(input2Tmp.w)*input2_deQFactor + static_cast(input1Tmp.w)*input1_deQFactor + static_cast(__ldg(bias+col_start_tmp)); - - - mean = blockReduceSum(local_out[0] + local_out[1] + local_out[2] + local_out[3]); - if(threadIdx.x == 0) - s_mean = mean * __fdividef(1.0f, n); - __syncthreads(); - - local_out[0] = local_out[0] - s_mean; - local_out[1] = local_out[1] - s_mean; - local_out[2] = local_out[2] - s_mean; - local_out[3] = local_out[3] - s_mean; - variance = blockReduceSum(local_out[0] * local_out[0] + - local_out[1] * local_out[1] + - local_out[2] * local_out[2] + - local_out[3] * local_out[3] - ); - if(threadIdx.x == 0){ - s_variance = variance * __fdividef(1.0f, n) + 1e-6f; - s_variance = rsqrtf(s_variance); - } - __syncthreads(); - - local_out[0] = (local_out[0] * s_variance) * static_cast(__ldg(gamma+col_start)) + static_cast(__ldg(beta+col_start)); - input2Tmp.x = float_to_int8_rn(local_out[0] * output_scale); - - col_start = col_start+1; - local_out[1] = (local_out[1] * s_variance) * static_cast(__ldg(gamma+col_start)) + static_cast(__ldg(beta+col_start)); - input2Tmp.y = float_to_int8_rn(local_out[1] * output_scale); - - col_start = col_start+1; - local_out[2] = (local_out[2] * s_variance) * static_cast(__ldg(gamma+col_start)) + static_cast(__ldg(beta+col_start)); - input2Tmp.z = float_to_int8_rn(local_out[2] * output_scale); - - col_start = col_start+1; - local_out[3] = (local_out[3] * s_variance) * static_cast(__ldg(gamma+col_start)) + static_cast(__ldg(beta+col_start)); - input2Tmp.w = float_to_int8_rn(local_out[3] * output_scale); - - outTmpPtr[outIdx] = input2Tmp; -} - -template <> -__global__ -void add_bias_input_layernorm_COL32_int8IO(int8_t* output, const int8_t* input1, const int8_t* input2, const half2* bias, const half2* gamma, - const half2* beta, int m, int n, const float *input1_deQFactor_ptr, - const float *input2_deQFactor_ptr, const float *output_scale_ptr) -{ - const float input1_deQFactor = __ldg(input1_deQFactor_ptr); - const float input2_deQFactor = __ldg(input2_deQFactor_ptr); - const float output_scale = __ldg(output_scale_ptr); - int col_start = threadIdx.x << 2; - - __shared__ float s_mean; - __shared__ float s_variance; - float mean = 0.0f; - float variance = 0.0f; - - float local_out[4]; - int outIdx = ((col_start & 0xffffffe0)*m+(blockIdx.x << 5) + (col_start&31)) >> 2; - char4 *outTmpPtr = (char4*)output; - char4 *input1TmpPtr = (char4*)input1; - char4 *input2TmpPtr = (char4*)input2; - char4 input1Tmp = __ldg(input1TmpPtr + outIdx); - char4 input2Tmp = __ldg(input2TmpPtr + outIdx); - - int col_start_tmp = col_start; - half2 biasTmp = __ldg(bias + (col_start_tmp >> 1)); - local_out[0] = static_cast(input2Tmp.x)*input2_deQFactor + static_cast(input1Tmp.x)*input1_deQFactor + static_cast(biasTmp.x); - col_start_tmp = col_start_tmp + 1; - local_out[1] = static_cast(input2Tmp.y)*input2_deQFactor + static_cast(input1Tmp.y)*input1_deQFactor + static_cast(biasTmp.y); - - col_start_tmp = col_start_tmp + 1; - biasTmp = __ldg(bias + (col_start_tmp >> 1)); - local_out[2] = static_cast(input2Tmp.z)*input2_deQFactor + static_cast(input1Tmp.z)*input1_deQFactor + static_cast(biasTmp.x); - col_start_tmp = col_start_tmp + 1; - local_out[3] = static_cast(input2Tmp.w)*input2_deQFactor + static_cast(input1Tmp.w)*input1_deQFactor + static_cast(biasTmp.y); - - - mean = blockReduceSum(local_out[0] + local_out[1] + local_out[2] + local_out[3]); - if(threadIdx.x == 0) - s_mean = mean * __fdividef(1.0f, n); - __syncthreads(); - - local_out[0] = local_out[0] - s_mean; - local_out[1] = local_out[1] - s_mean; - local_out[2] = local_out[2] - s_mean; - local_out[3] = local_out[3] - s_mean; - variance = blockReduceSum(local_out[0] * local_out[0] + - local_out[1] * local_out[1] + - local_out[2] * local_out[2] + - local_out[3] * local_out[3] - ); - if(threadIdx.x == 0){ - s_variance = variance * __fdividef(1.0f, n) + 1e-6f; - s_variance = rsqrtf(s_variance); - } - __syncthreads(); - - col_start_tmp = col_start >> 1; - biasTmp = __ldg(gamma+col_start_tmp); - half2 betaTmp = __ldg(beta+col_start_tmp); - - local_out[0] = (local_out[0] * s_variance) * static_cast(biasTmp.x) + static_cast(betaTmp.x); - input2Tmp.x = float_to_int8_rn(local_out[0] * output_scale); - - col_start = col_start+1; - local_out[1] = (local_out[1] * s_variance) * static_cast(biasTmp.y) + static_cast(betaTmp.y); - input2Tmp.y = float_to_int8_rn(local_out[1] * output_scale); - - col_start = col_start+1; - col_start_tmp = col_start >> 1; - biasTmp = __ldg(gamma+col_start_tmp); - betaTmp = __ldg(beta+col_start_tmp); - local_out[2] = (local_out[2] * s_variance) * static_cast(biasTmp.x) + static_cast(betaTmp.x); - input2Tmp.z = float_to_int8_rn(local_out[2] * output_scale); - - col_start = col_start+1; - local_out[3] = (local_out[3] * s_variance) * static_cast(biasTmp.y) + static_cast(betaTmp.y); - input2Tmp.w = float_to_int8_rn(local_out[3] * output_scale); - - outTmpPtr[outIdx] = input2Tmp; +// using char4 +template +__global__ void add_bias_input_layernorm_COL32_int8IO_noRes(int8_t* output, + int32_t* input1, + T* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + const float* weight_amax, + const float* input1_amax_ptr, + const float* output_scale_ptr) +{ + const float input1_amax = __ldg(input1_amax_ptr); + const float output_scale = __ldg(output_scale_ptr); + int col_start = threadIdx.x << 2; + bool qual = (col_start < n); + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + float local_out[4]; + int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)) >> 2; + int4* input1TmpPtr = (int4*)input1; + int4 input1Tmp; + if (qual) { + input1Tmp = __ldg(input1TmpPtr + outIdx); + int col_start_tmp = col_start; + // NOTE: 0.000062f = 1 / 127/.0f / 127.0f + local_out[0] = static_cast(input1Tmp.x) * input1_amax * weight_amax[col_start_tmp] * 0.000062f + + static_cast(input2[(outIdx << 2) + 0]) + static_cast(bias[col_start_tmp]); + input2[(outIdx << 2) + 0] = local_out[0]; + + col_start_tmp = col_start_tmp + 1; + local_out[1] = static_cast(input1Tmp.y) * input1_amax * weight_amax[col_start_tmp] * 0.000062f + + static_cast(input2[(outIdx << 2) + 1]) + static_cast(bias[col_start_tmp]); + input2[(outIdx << 2) + 1] = local_out[1]; + + col_start_tmp = col_start_tmp + 1; + local_out[2] = static_cast(input1Tmp.z) * input1_amax * weight_amax[col_start_tmp] * 0.000062f + + static_cast(input2[(outIdx << 2) + 2]) + static_cast(bias[col_start_tmp]); + input2[(outIdx << 2) + 2] = local_out[2]; + + col_start_tmp = col_start_tmp + 1; + local_out[3] = static_cast(input1Tmp.w) * input1_amax * weight_amax[col_start_tmp] * 0.000062f + + static_cast(input2[(outIdx << 2) + 3]) + static_cast(bias[col_start_tmp]); + input2[(outIdx << 2) + 3] = local_out[3]; + } + + mean = blockReduceSum(qual ? local_out[0] + local_out[1] + local_out[2] + local_out[3] : 0.0f); + if (threadIdx.x == 0) { + s_mean = mean * __fdividef(1.0f, n); + } + __syncthreads(); + + if (qual) { + local_out[0] = local_out[0] - s_mean; + local_out[1] = local_out[1] - s_mean; + local_out[2] = local_out[2] - s_mean; + local_out[3] = local_out[3] - s_mean; + } + variance = blockReduceSum(qual ? local_out[0] * local_out[0] + local_out[1] * local_out[1] + + local_out[2] * local_out[2] + local_out[3] * local_out[3] : + 0.0f); + if (threadIdx.x == 0) { + s_variance = variance * __fdividef(1.0f, n) + 1e-6f; + s_variance = rsqrtf(s_variance); + } + __syncthreads(); + + char4* outputTmpPtr = (char4*)output; + char4 outputTmp; + if (qual) { + local_out[0] = (local_out[0] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + outputTmp.x = float_to_int8_rn(local_out[0] * output_scale); + + col_start = col_start + 1; + local_out[1] = (local_out[1] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + outputTmp.y = float_to_int8_rn(local_out[1] * output_scale); + + col_start = col_start + 1; + local_out[2] = (local_out[2] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + outputTmp.z = float_to_int8_rn(local_out[2] * output_scale); + + col_start = col_start + 1; + local_out[3] = (local_out[3] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + outputTmp.w = float_to_int8_rn(local_out[3] * output_scale); + + outputTmpPtr[outIdx] = outputTmp; + } +} + +template<> +__global__ void add_bias_input_layernorm_COL32_int8IO_noRes(int8_t* output, + int32_t* input1, + half2* input2, + const half2* bias, + const half2* gamma, + const half2* beta, + int m, + int n, + const float* weight_amax, + const float* input1_amax_ptr, + const float* output_scale_ptr) +{ + const float2* weight_scale_ptr = (const float2*)weight_amax; + const float input1_amax = __ldg(input1_amax_ptr); + const float output_scale = __ldg(output_scale_ptr); + int col_start = threadIdx.x << 1; + bool qual = (col_start < n); + + __shared__ float s_mean; + __shared__ float s_variance; + float sums[2] = {0.0f, 0.0f}; + // float mean = 0.0f; + // float variance = 0.0f; + + float local_out[2]; + int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)) >> 1; + int2* input1TmpPtr = (int2*)input1; + int2 input1Tmp; + if (qual) { + const float2 weight_scale = __ldg(weight_scale_ptr + threadIdx.x); + input1Tmp = input1TmpPtr[outIdx]; + half2 biasTmp = bias[threadIdx.x]; + half2 input2Tmp = input2[outIdx]; + // NOTE: 0.000062f = 1 / 127/.0f / 127.0f + local_out[0] = + static_cast(input1Tmp.x) * input1_amax * weight_scale.x * 0.000062f + static_cast(biasTmp.x); + local_out[1] = + static_cast(input1Tmp.y) * input1_amax * weight_scale.y * 0.000062f + static_cast(biasTmp.y); + + local_out[0] += static_cast(input2Tmp.x); + local_out[1] += static_cast(input2Tmp.y); + + input2Tmp.x = local_out[0]; + input2Tmp.y = local_out[1]; + input2[outIdx] = input2Tmp; + for (int i = 0; i < 2; i++) { + sums[0] += local_out[i]; + sums[1] += local_out[i] * local_out[i]; + } + } + + blockReduceSumV2(sums); + + if (threadIdx.x == 0) { + s_mean = sums[0] * __fdividef(1.0f, n); + s_variance = rsqrtf(sums[1] * __fdividef(1.0f, n) - s_mean * s_mean + 1e-6); + } + __syncthreads(); + + char2* outputTmpPtr = (char2*)output; + char2 outputTmp; + if (qual) { + half2 gammaTmp = gamma[threadIdx.x]; + half2 betaTmp = beta[threadIdx.x]; + local_out[0] = + (local_out[0] - s_mean) * s_variance * static_cast(gammaTmp.x) + static_cast(betaTmp.x); + outputTmp.x = float_to_int8_rn(local_out[0] * output_scale); + + local_out[1] = + (local_out[1] - s_mean) * s_variance * static_cast(gammaTmp.y) + static_cast(betaTmp.y); + outputTmp.y = float_to_int8_rn(local_out[1] * output_scale); + + outputTmpPtr[outIdx] = outputTmp; + } } template -void invokeAddBiasResidualLayerNormCol32(int8_t* output, const int8_t* input1, const int8_t* input2, const T* bias, const T* gamma, - const T* beta, int m, int n, cudaStream_t stream, - const float *input1_deQFactor_ptr, const float *input2_deQFactor_ptr, const float *output_scale_ptr) -{ - dim3 grid(m); - dim3 block(n/4); - assert(n <= 1024); - if (sizeof(T) == sizeof(half)){ - add_bias_input_layernorm_COL32_int8IO<<>>(output, input1, input2, (const half2*)bias, (const half2*)gamma, - (const half2*)beta, m, n, input1_deQFactor_ptr, - input2_deQFactor_ptr, output_scale_ptr); - } - else{ - add_bias_input_layernorm_COL32_int8IO<<>>(output, input1, input2, bias, gamma, beta, - m, n, input1_deQFactor_ptr, - input2_deQFactor_ptr, output_scale_ptr); - } -} - -template -void invokeAddBiasResidualLayerNormCol32(int8_t* output, const int8_t* input1, const int8_t* input2, const float* bias, const float* gamma, - const float* beta, int m, int n, cudaStream_t stream, - const float *input1_deQFactor_ptr, const float *input2_deQFactor_ptr, const float *output_scale_ptr); - -template -void invokeAddBiasResidualLayerNormCol32(int8_t* output, const int8_t* input1, const int8_t* input2, const half* bias, const half* gamma, - const half* beta, int m, int n, cudaStream_t stream, - const float *input1_deQFactor_ptr, const float *input2_deQFactor_ptr, const float *output_scale_ptr); - -//input1/input2/out matrix with layout of cublasLt CUBLASLT_ORDER_COL32 (m*n) -//(grid, block) must be (m, n) -template -__global__ -void add_bias_input_layernorm_COL32_int8I_DataTypeO(T* output, const int8_t* input1, const int8_t* input2, const T* bias, const T* gamma, - const T* beta, int m, int n, - const float *input1_deQFactor_ptr, - const float *input2_deQFactor_ptr) -{ - const float input1_deQFactor = __ldg(input1_deQFactor_ptr); - const float input2_deQFactor = __ldg(input2_deQFactor_ptr); - int col_start = threadIdx.x; - - __shared__ float s_mean; - __shared__ float s_variance; - float mean = 0.0f; - float variance = 0.0f; - - float local_out; - int idx = ((col_start & 0xffffffe0)*m+(blockIdx.x << 5) + (col_start&31)); - - local_out = static_cast(__ldg(input2+idx))*input2_deQFactor + static_cast(__ldg(input1+idx))*input1_deQFactor + static_cast(__ldg(bias+col_start)); - - mean = blockReduceSum(local_out); - if(threadIdx.x == 0) - s_mean = mean * __fdividef(1.0f, n); - __syncthreads(); - - local_out = local_out - s_mean; - - variance = blockReduceSum(local_out * local_out); - - if(threadIdx.x == 0){ - s_variance = variance * __fdividef(1.0f, n) + 1e-6f; - s_variance = rsqrtf(s_variance); - } - __syncthreads(); - - local_out = (local_out * s_variance) * static_cast(__ldg(gamma+col_start)) + static_cast(__ldg(beta+col_start)); - - output[idx] = local_out; -} - -//input1/input2/out matrix with layout of cublasLt CUBLASLT_ORDER_COL32 (m*n) -//(grid, block) must be (m, n/2) -template <> -__global__ -void add_bias_input_layernorm_COL32_int8I_DataTypeO(half2* output, const int8_t* input1, const int8_t* input2, const half2* bias, const half2* gamma, - const half2* beta, int m, int n, - const float *input1_deQFactor_ptr, - const float *input2_deQFactor_ptr) -{ - const float input1_deQFactor = __ldg(input1_deQFactor_ptr); - const float input2_deQFactor = __ldg(input2_deQFactor_ptr); - int col_start = threadIdx.x << 1; - - __shared__ float s_mean; - __shared__ float s_variance; - float mean = 0.0f; - float variance = 0.0f; - - float2 local_out; - int idx = ((col_start & 0xffffffe0)*m+(blockIdx.x << 5) + (col_start&31)) >> 1; - - const char2 * input1_ptr2 = (const char2*)input1; - const char2 * input2_ptr2 = (const char2*)input2; - char2 input_tmp1 = __ldg(input1_ptr2 + idx); - char2 input_tmp2 = __ldg(input2_ptr2 + idx); - - half2 bias_tmp = __ldg(bias+threadIdx.x); - - local_out.x = static_cast(input_tmp1.x)*input1_deQFactor + static_cast(input_tmp2.x)*input2_deQFactor + static_cast(bias_tmp.x); - - local_out.y = static_cast(input_tmp1.y)*input1_deQFactor + static_cast(input_tmp2.y)*input2_deQFactor + static_cast(bias_tmp.y); - - mean = blockReduceSum(local_out.x + local_out.y); - if(threadIdx.x == 0) - s_mean = mean * __fdividef(1.0f, n); - __syncthreads(); - - local_out.x = local_out.x - s_mean; - - local_out.y = local_out.y - s_mean; - - variance = blockReduceSum(local_out.x * local_out.x + local_out.y * local_out.y); - - if(threadIdx.x == 0){ - s_variance = variance * __fdividef(1.0f, n) + 1e-6f; - s_variance = rsqrtf(s_variance); - } - __syncthreads(); - - half2 gamma_tmp = __ldg(gamma+threadIdx.x); - half2 beta_tmp = __ldg(beta+threadIdx.x); - - local_out.x = (local_out.x * s_variance) * static_cast(gamma_tmp.x) + static_cast(beta_tmp.x); - local_out.y = (local_out.y * s_variance) * static_cast(gamma_tmp.y) + static_cast(beta_tmp.y); - - bias_tmp.x = half(local_out.x); - bias_tmp.y = half(local_out.y); - - output[idx] = bias_tmp; +void invokeAddBiasResidualLayerNormCol32_noRes(int8_t* output, + int32_t* input1, + T* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + cudaStream_t stream, + const float* weight_amax, + const float* input1_amax_ptr, + const float* output_scale_ptr) +{ + dim3 grid(m); + int blockSize = (n / 4 + 31) / 32 * 32; + dim3 block(blockSize); + assert(blockSize <= 1024); + if (sizeof(T) == sizeof(half)) { + blockSize = (n / 2 + 31) / 32 * 32; + assert(blockSize <= 1024); + add_bias_input_layernorm_COL32_int8IO_noRes<<>>(output, + input1, + (half2*)input2, + (const half2*)bias, + (const half2*)gamma, + (const half2*)beta, + m, + n, + weight_amax, + input1_amax_ptr, + output_scale_ptr); + } + else { + add_bias_input_layernorm_COL32_int8IO_noRes<<>>( + output, input1, input2, bias, gamma, beta, m, n, weight_amax, input1_amax_ptr, output_scale_ptr); + } } +template void invokeAddBiasResidualLayerNormCol32_noRes(int8_t* output, + int32_t* input1, + float* input2, + const float* bias, + const float* gamma, + const float* beta, + int m, + int n, + cudaStream_t stream, + const float* weight_amax, + const float* input1_amax_ptr, + const float* output_scale_ptr); + +template void invokeAddBiasResidualLayerNormCol32_noRes(int8_t* output, + int32_t* input1, + half* input2, + const half* bias, + const half* gamma, + const half* beta, + int m, + int n, + cudaStream_t stream, + const float* weight_amax, + const float* input1_amax_ptr, + const float* output_scale_ptr); + +/******************* invokeLayernormCol32 ***********************/ + +// input1/input2/out matrix with layout of cublasLt CUBLASLT_ORDER_COL32 (m*n) +//(grid, block) must be (m, n/4) +// using char4 template -void invokeAddBiasResidualLayerNormCol32(T *output, const int8_t *input1, - const int8_t *input2, const T *bias, - const T *gamma, const T *beta, - int m, int n, cudaStream_t stream, - const float *input1_deQFactor_ptr, - const float *input2_deQFactor_ptr) -{ - dim3 grid(m); - dim3 block(n); - if (sizeof(T) == sizeof(half)){ - assert(n/2 <= 1024 && n%2 == 0); - block.x = n/2; - add_bias_input_layernorm_COL32_int8I_DataTypeO<<>>((half2*)output, input1, input2, (const half2*)bias, (const half2*)gamma, - (const half2*)beta, m, n, input1_deQFactor_ptr, - input2_deQFactor_ptr); - } - else{ - assert(n <= 1024); - add_bias_input_layernorm_COL32_int8I_DataTypeO<<>>(output, input1, input2, bias, gamma, beta, - m, n, input1_deQFactor_ptr, - input2_deQFactor_ptr); - } +__global__ void layernorm_COL32_DataTypeI_int8O( + int8_t* out, const T* input, const T* gamma, const T* beta, int m, int n, const float* output_scale_ptr) +{ + const float output_scale = __ldg(output_scale_ptr); + int col_start = threadIdx.x << 2; + bool qual = (col_start < n); + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + float local_out[4]; + int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)) >> 2; + + if (qual) { + local_out[0] = static_cast(input[(outIdx << 2) + 0]); + local_out[1] = static_cast(input[(outIdx << 2) + 1]); + local_out[2] = static_cast(input[(outIdx << 2) + 2]); + local_out[3] = static_cast(input[(outIdx << 2) + 3]); + } + + mean = blockReduceSum(qual ? local_out[0] + local_out[1] + local_out[2] + local_out[3] : 0.0f); + if (threadIdx.x == 0) { + s_mean = mean * __fdividef(1.0f, n); + } + __syncthreads(); + + if (qual) { + local_out[0] = local_out[0] - s_mean; + local_out[1] = local_out[1] - s_mean; + local_out[2] = local_out[2] - s_mean; + local_out[3] = local_out[3] - s_mean; + } + variance = blockReduceSum(qual ? local_out[0] * local_out[0] + local_out[1] * local_out[1] + + local_out[2] * local_out[2] + local_out[3] * local_out[3] : + 0.0f); + if (threadIdx.x == 0) { + s_variance = variance * __fdividef(1.0f, n) + 1e-6f; + s_variance = rsqrtf(s_variance); + } + __syncthreads(); + + char4 outTmp; + char4* outPtr = (char4*)out; + if (qual) { + local_out[0] = (local_out[0] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + outTmp.x = float_to_int8_rn(local_out[0] * output_scale); + + col_start = col_start + 1; + local_out[1] = (local_out[1] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + outTmp.y = float_to_int8_rn(local_out[1] * output_scale); + + col_start = col_start + 1; + local_out[2] = (local_out[2] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + outTmp.z = float_to_int8_rn(local_out[2] * output_scale); + + col_start = col_start + 1; + local_out[3] = (local_out[3] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + outTmp.w = float_to_int8_rn(local_out[3] * output_scale); + + outPtr[outIdx] = outTmp; + } +} + +template<> +__global__ void layernorm_COL32_DataTypeI_int8O( + int8_t* out, const half2* input, const half2* gamma, const half2* beta, int m, int n, const float* output_scale_ptr) +{ + const float output_scale = __ldg(output_scale_ptr); + int col_start = threadIdx.x << 1; + bool qual = (col_start < n); + + __shared__ float s_mean; + __shared__ float s_variance; + float sums[2] = {0.0f, 0.0f}; + // float mean = 0.0f; + // float variance = 0.0f; + + float local_out[2]; + int outIdx = ((col_start & 0xffffffe0) * m + (blockIdx.x << 5) + (col_start & 31)) >> 1; + + if (qual) { + half2 inputTmp = input[outIdx]; + local_out[0] = static_cast(inputTmp.x); + local_out[1] = static_cast(inputTmp.y); + + for (int i = 0; i < 2; i++) { + sums[0] += local_out[i]; + sums[1] += local_out[i] * local_out[i]; + } + } + + blockReduceSumV2(sums); + + if (threadIdx.x == 0) { + s_mean = sums[0] * __fdividef(1.0f, n); + s_variance = rsqrtf(sums[1] * __fdividef(1.0f, n) - s_mean * s_mean + 1e-6); + } + __syncthreads(); + + char2 outTmp; + char2* outPtr = (char2*)out; + if (qual) { + half2 gammaTmp = gamma[threadIdx.x]; + half2 betaTmp = beta[threadIdx.x]; + local_out[0] = + (local_out[0] - s_mean) * s_variance * static_cast(gammaTmp.x) + static_cast(betaTmp.x); + outTmp.x = float_to_int8_rn(local_out[0] * output_scale); + + local_out[1] = + (local_out[1] - s_mean) * s_variance * static_cast(gammaTmp.y) + static_cast(betaTmp.y); + outTmp.y = float_to_int8_rn(local_out[1] * output_scale); + + outPtr[outIdx] = outTmp; + } } -template void invokeAddBiasResidualLayerNormCol32(float* output, const int8_t* input1, const int8_t* input2, const float* bias, const float* gamma, const float* beta, int m, int n, cudaStream_t stream, const float *input1_deQFactor_ptr, const float *input2_deQFactor_ptr); +template +void invokeLayernormCol32(int8_t* out, + const T* input, + const T* gamma, + const T* beta, + int m, + int n, + const float* output_scale_ptr, + cudaStream_t stream) +{ + dim3 grid(m); + int blockSize = (n / 4 + 31) / 32 * 32; + dim3 block(blockSize); + assert(blockSize <= 1024); + if (sizeof(T) == sizeof(half)) { + blockSize = (n / 2 + 31) / 32 * 32; + assert(blockSize <= 1024); + layernorm_COL32_DataTypeI_int8O<<>>( + out, (const half2*)input, (const half2*)gamma, (const half2*)beta, m, n, output_scale_ptr); + } + else { + layernorm_COL32_DataTypeI_int8O<<>>(out, input, gamma, beta, m, n, output_scale_ptr); + } +} -template void invokeAddBiasResidualLayerNormCol32(half* output, const int8_t* input1, const int8_t* input2, const half* bias, const half* gamma, const half* beta, int m, int n, cudaStream_t stream, const float *input1_deQFactor_ptr, const float *input2_deQFactor_ptr); +template void invokeLayernormCol32(int8_t* out, + const float* input, + const float* gamma, + const float* beta, + int m, + int n, + const float* output_scale_ptr, + cudaStream_t stream); + +template void invokeLayernormCol32(int8_t* out, + const half* input, + const half* gamma, + const half* beta, + int m, + int n, + const float* output_scale_ptr, + cudaStream_t stream); + +/******************* invokeLayernormShiftPartitionCol32 ***********************/ +template +__global__ void layernorm_shift_partition_COL32_noRes(int8_t* out, + const T* input, + const T* gamma, + const T* beta, + int batch, + int H, + int W, + int n, + const float* norm_scale_ptr, + int shift_size, + int window_size) +{ + float norm_scale = __ldg(norm_scale_ptr); + int tid = threadIdx.x; + const int batch_offset = blockIdx.z * gridDim.y * gridDim.x; + const int m = gridDim.z * gridDim.y * gridDim.x; + const int bid = batch_offset + blockIdx.y * gridDim.x + blockIdx.x; + const int shifted_H_idx = (shift_size != 0) ? ((blockIdx.y - shift_size + gridDim.y) % gridDim.y) : blockIdx.y; + const int shifted_W_idx = (shift_size != 0) ? ((blockIdx.x - shift_size + gridDim.x) % gridDim.x) : blockIdx.x; + const int window_H_idx = shifted_H_idx / window_size; + const int window_W_idx = shifted_W_idx / window_size; + const int stride_of_window_H = W / window_size; + const int window_idx = window_H_idx * stride_of_window_H + window_W_idx; + const int idx_in_window = (shifted_H_idx % window_size) * window_size + (shifted_W_idx % window_size); + const int output_bid = batch_offset + window_idx * window_size * window_size + idx_in_window; + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + const int offset_col32_in = (tid & 0xffffffe0) * m + (bid << 5) + (tid & 31); + float local_out = (tid < n) ? (float)(__ldg(input + offset_col32_in)) : 0.0f; + + mean = blockReduceSum(local_out); + if (threadIdx.x == 0) { + s_mean = mean / n; + } + __syncthreads(); + + float diff = (tid < n) ? (local_out - s_mean) : 0.0f; + variance = blockReduceSum(diff * diff); + if (threadIdx.x == 0) { + s_variance = variance / n + 1e-6f; + } + __syncthreads(); + + if (tid < n) { + const int offset_col32_out = (tid & 0xffffffe0) * m + (output_bid << 5) + (tid & 31); + local_out = + ((local_out - s_mean) * rsqrtf(s_variance)) * (float)(__ldg(&gamma[tid])) + (float)(__ldg(&beta[tid])); + out[offset_col32_out] = float_to_int8_rn(norm_scale * local_out); + } +} -//input1/input2/out matrix with layout of row major (m*n) +template<> +__global__ void layernorm_shift_partition_COL32_noRes(int8_t* out_ptr, + const half4* input_ptr, + const half4* gamma_ptr, + const half4* beta_ptr, + int batch, + int H, + int W, + int n, + const float* norm_scale_ptr, + int shift_size, + int window_size) +{ + float norm_scale = __ldg(norm_scale_ptr); + + const int batch_offset = blockIdx.z * gridDim.y * gridDim.x; + const int m = gridDim.z * gridDim.y * gridDim.x; + const int bid = batch_offset + blockIdx.y * gridDim.x + blockIdx.x; + + const int shifted_H_idx = (shift_size != 0) ? ((blockIdx.y - shift_size + gridDim.y) % gridDim.y) : blockIdx.y; + const int shifted_W_idx = (shift_size != 0) ? ((blockIdx.x - shift_size + gridDim.x) % gridDim.x) : blockIdx.x; + const int window_H_idx = shifted_H_idx / window_size; + const int window_W_idx = shifted_W_idx / window_size; + const int stride_of_window_H = W / window_size; + const int window_idx = window_H_idx * stride_of_window_H + window_W_idx; + const int idx_in_window = (shifted_H_idx % window_size) * window_size + (shifted_W_idx % window_size); + const int output_bid = batch_offset + window_idx * window_size * window_size + idx_in_window; + + int tid = threadIdx.x << 2; + __shared__ float s_mean; + __shared__ float s_variance; + float sums[2] = {0.0f, 0.0f}; + half4 inputTmp; + float inputBuf[4]; + + char4* output_ptr = (char4*)out_ptr; + char4 int8_buf; + + const int offset_col32 = (tid & 0xffffffe0) * m + (bid << 5) + (tid & 31); + if (tid < n) { + inputTmp = input_ptr[offset_col32 >> 2]; + inputBuf[0] = static_cast(inputTmp.x); + inputBuf[1] = static_cast(inputTmp.y); + inputBuf[2] = static_cast(inputTmp.z); + inputBuf[3] = static_cast(inputTmp.w); + for (int i = 0; i < 4; i++) { + sums[0] += inputBuf[i]; + sums[1] += inputBuf[i] * inputBuf[i]; + } + } + + blockReduceSumV2(sums); + + if (threadIdx.x == 0) { + s_mean = sums[0] / n; + s_variance = rsqrtf(sums[1] / n - s_mean * s_mean + 1e-6); + } + __syncthreads(); + + if (tid < n) { + half4 gamma_val = gamma_ptr[tid >> 2]; + half4 beta_val = beta_ptr[tid >> 2]; + inputBuf[0] = + (inputBuf[0] - s_mean) * s_variance * static_cast(gamma_val.x) + static_cast(beta_val.x); + inputBuf[1] = + (inputBuf[1] - s_mean) * s_variance * static_cast(gamma_val.y) + static_cast(beta_val.y); + inputBuf[2] = + (inputBuf[2] - s_mean) * s_variance * static_cast(gamma_val.z) + static_cast(beta_val.z); + inputBuf[3] = + (inputBuf[3] - s_mean) * s_variance * static_cast(gamma_val.w) + static_cast(beta_val.w); + + const int offset_col32_out = (tid & 0xffffffe0) * m + (output_bid << 5) + (tid & 31); + // const int offset_colMajor_out = output_bid * n + tid; + // const int offset_out = index_CUBLASLT_ORDER_COL32_2R_4R4(tid, output_bid, m << 5); + int8_buf.x = float_to_int8_rn(norm_scale * inputBuf[0]); + int8_buf.y = float_to_int8_rn(norm_scale * inputBuf[1]); + int8_buf.z = float_to_int8_rn(norm_scale * inputBuf[2]); + int8_buf.w = float_to_int8_rn(norm_scale * inputBuf[3]); + output_ptr[offset_col32_out >> 2] = int8_buf; + } +} + +template +__global__ void layernorm_shift_partition_v2_COL32_noRes(int8_t* out, + const T* __restrict input, + const T* __restrict gamma, + const T* __restrict beta, + int batch, + int H, + int W, + int n, + const float* norm_scale_ptr, + int shift_size, + int window_size) +{ + float norm_scale = __ldg(norm_scale_ptr); + const int ite = 4; + const int tid = threadIdx.x; + const int batch_offset = blockIdx.z * gridDim.y * gridDim.x; + const int m = gridDim.z * gridDim.y * gridDim.x; + const int bid = batch_offset + blockIdx.y * gridDim.x + blockIdx.x; + const int shifted_H_idx = (shift_size != 0) ? ((blockIdx.y - shift_size + gridDim.y) % gridDim.y) : blockIdx.y; + const int shifted_W_idx = (shift_size != 0) ? ((blockIdx.x - shift_size + gridDim.x) % gridDim.x) : blockIdx.x; + const int window_H_idx = shifted_H_idx / window_size; + const int window_W_idx = shifted_W_idx / window_size; + const int stride_of_window_H = W / window_size; + const int window_idx = window_H_idx * stride_of_window_H + window_W_idx; + const int idx_in_window = (shifted_H_idx % window_size) * window_size + (shifted_W_idx % window_size); + const int output_bid = batch_offset + window_idx * window_size * window_size + idx_in_window; + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + float local_out[ite]; + + float sum = 0.0f; +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = i * blockDim.x + tid; + if (col_id < n) { + const int offset_col32_in = (col_id & 0xffffffe0) * m + (bid << 5) + (col_id & 31); + local_out[i] = (float)(__ldg(input + offset_col32_in)); + sum += local_out[i]; + } + } + + mean = blockReduceSum(sum); + if (tid == 0) { + s_mean = mean / n; + } + __syncthreads(); + + float var = 0.0f; +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = i * blockDim.x + tid; + if (col_id < n) { + float diff = local_out[i] - s_mean; + local_out[i] = diff; + var += diff * diff; + } + } + + variance = blockReduceSum(var); + if (tid == 0) { + s_variance = rsqrtf(variance / n + 1e-6f); + } + __syncthreads(); + +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = i * blockDim.x + tid; + if (col_id < n) { + const int offset_col32_out = (col_id & 0xffffffe0) * m + (output_bid << 5) + (col_id & 31); + out[offset_col32_out] = float_to_int8_rn( + norm_scale * (local_out[i] * s_variance * (float)__ldg(&gamma[col_id]) + (float)__ldg(&beta[col_id]))); + } + } +} + +template<> +__global__ void layernorm_shift_partition_v2_COL32_noRes(int8_t* out_ptr, + const half2* __restrict input_ptr, + const half2* __restrict gamma_ptr, + const half2* __restrict beta_ptr, + int batch, + int H, + int W, + int n, + const float* norm_scale_ptr, + int shift_size, + int window_size) +{ + float norm_scale = __ldg(norm_scale_ptr); + const int ite = 4; + const int tid = threadIdx.x; + const int batch_offset = blockIdx.z * gridDim.y * gridDim.x; + const int m = gridDim.z * gridDim.y * gridDim.x; + const int bid = batch_offset + blockIdx.y * gridDim.x + blockIdx.x; + + const int shifted_H_idx = (shift_size != 0) ? ((blockIdx.y - shift_size + gridDim.y) % gridDim.y) : blockIdx.y; + const int shifted_W_idx = (shift_size != 0) ? ((blockIdx.x - shift_size + gridDim.x) % gridDim.x) : blockIdx.x; + const int window_H_idx = shifted_H_idx / window_size; + const int window_W_idx = shifted_W_idx / window_size; + const int stride_of_window_H = W / window_size; + const int window_idx = window_H_idx * stride_of_window_H + window_W_idx; + const int idx_in_window = (shifted_H_idx % window_size) * window_size + (shifted_W_idx % window_size); + const int output_bid = batch_offset + window_idx * window_size * window_size + idx_in_window; + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + half2 local_out_half2[ite]; + const half2 zero = {static_cast(0.0f), static_cast(0.0f)}; + + char2* output_ptr = (char2*)out_ptr; + char2 int8_buf; + + // float sum = 0.0f; + half2 sum = __float2half2_rn(0.0f); +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = (i * blockDim.x + tid) << 1; + if (col_id < n) { + const int offset_col32 = (col_id & 0xffffffe0) * m + (bid << 5) + (col_id & 31); + local_out_half2[i] = __ldg(input_ptr + (offset_col32 >> 1)); + + sum += local_out_half2[i]; + } + } + + mean = blockReduceSum((float)(sum.x + sum.y)); + if (threadIdx.x == 0) { + s_mean = mean / n; + } + __syncthreads(); + + float var = 0.0f; + half2 s_mean_2 = __float2half2_rn(s_mean); +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = (i * blockDim.x + tid) << 1; + if (col_id < n) { + local_out_half2[i] = local_out_half2[i] - s_mean_2; + float v1 = (float)local_out_half2[i].x; + float v2 = (float)local_out_half2[i].y; + var += v1 * v1 + v2 * v2; + } + } + + variance = blockReduceSum(var); + if (threadIdx.x == 0) { + s_variance = rsqrtf(variance / n + 1e-6f); + } + __syncthreads(); + + half2 s_var_2 = __float2half2_rn(s_variance); +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = (i * blockDim.x + tid) << 1; + if (col_id < n) { + const int offset_col32_out = (col_id & 0xffffffe0) * m + (output_bid << 5) + (col_id & 31); + half2 outVal = + local_out_half2[i] * s_var_2 * __ldg(&gamma_ptr[col_id >> 1]) + __ldg(&beta_ptr[col_id >> 1]); + int8_buf.x = float_to_int8_rn(norm_scale * static_cast(outVal.x)); + int8_buf.y = float_to_int8_rn(norm_scale * static_cast(outVal.y)); + output_ptr[offset_col32_out >> 1] = int8_buf; + } + } +} + +template +void invokeLayernormShiftPartitionCol32(int8_t* out, + const T* input, + const T* gamma, + const T* beta, + int batch, + int H, + int W, + int n, + const float* norm_scale_ptr, + int shift_size, + int window_size, + cudaStream_t stream) +{ + dim3 grid(W, H, batch); + int blockSize = (n + 31) / 32 * 32; + if (blockSize >= 768) { + blockSize = ((blockSize / 4) + 31) / 32 * 32; + layernorm_shift_partition_v2_COL32_noRes<<>>( + out, input, gamma, beta, batch, H, W, n, norm_scale_ptr, shift_size, window_size); + } + else { + layernorm_shift_partition_COL32_noRes<<>>( + out, input, gamma, beta, batch, H, W, n, norm_scale_ptr, shift_size, window_size); + } +} + +template<> +void invokeLayernormShiftPartitionCol32(int8_t* out, + const half* input, + const half* gamma, + const half* beta, + int batch, + int H, + int W, + int n, + const float* norm_scale_ptr, + int shift_size, + int window_size, + cudaStream_t stream) +{ + dim3 grid(W, H, batch); + int blockSize = n / 2; + blockSize = (blockSize + 31) / 32 * 32; + + if ((batch * H * W >= 512 && blockSize >= 768) || blockSize > 1024) { + blockSize = ((blockSize / 4) + 31) / 32 * 32; + layernorm_shift_partition_v2_COL32_noRes<<>>(out, + (const half2*)input, + (const half2*)gamma, + (const half2*)beta, + batch, + H, + W, + n, + norm_scale_ptr, + shift_size, + window_size); + } + else { + blockSize = (n / 4 + 32) / 32 * 32; + layernorm_shift_partition_COL32_noRes<<>>(out, + (const half4*)input, + (const half4*)gamma, + (const half4*)beta, + batch, + H, + W, + n, + norm_scale_ptr, + shift_size, + window_size); + } +} + +template void invokeLayernormShiftPartitionCol32(int8_t* out, + const float* input, + const float* gamma, + const float* beta, + int batch, + int H, + int W, + int n, + const float* norm_scale_ptr, + int shift_size, + int window_size, + cudaStream_t stream); + +template void invokeLayernormShiftPartitionCol32(int8_t* out, + const half* input, + const half* gamma, + const half* beta, + int batch, + int H, + int W, + int n, + const float* norm_scale_ptr, + int shift_size, + int window_size, + cudaStream_t stream); + +/******************* invokeMergeLayerNormCol32 ***********************/ + +// input is [batch, 2*H, 2*W, n/4] +// output is [batch, H, W, n] +// grid (W, H, batch) +// block (n) +template +__global__ void merge_layernorm_v2(int8_t* out, + const T* __restrict input, + const T* __restrict gamma, + const T* __restrict beta, + int batch, + const float* merge_inFactor, + int H, + int W, + int n) +{ + const int ite = 4; + const int tid = threadIdx.x; + const int W_idx = blockIdx.x; + const int H_idx = blockIdx.y; + const float out_scale = __ldg(merge_inFactor); + // const size_t batch_offset = blockIdx.z * H * W * n; + // const int input_H_stride = W*n/2; + // const int output_H_stride = W*n; + const int n_4 = n >> 2; + const int m = batch * 4 * H * W; + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + float local_out[ite]; + + float sum = 0.0f; +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = i * blockDim.x + tid; + if (col_id < n) { + int part_id = col_id / n_4; + int offset_in_W = part_id / 2; + int offset_in_H = part_id % 2; + // size_t input_id = batch_offset + (2*H_idx + offset_in_H)*input_H_stride + (2*W_idx + offset_in_W)*n_4 + + // (col_id % n_4); + + int col_input = col_id % n_4; + int row_input = blockIdx.z * H * W * 4 + (2 * H_idx + offset_in_H) * W * 2 + (2 * W_idx + offset_in_W); + int input_idx_col32 = ((col_input >> 5) << 5) * m + (row_input << 5) + (col_input & 31); + local_out[i] = (float)(__ldg(input + input_idx_col32)); + sum += local_out[i]; + } + } + + mean = blockReduceSum(sum); + if (tid == 0) { + s_mean = mean / n; + } + __syncthreads(); + + float var = 0.0f; +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = i * blockDim.x + tid; + if (col_id < n) { + local_out[i] = local_out[i] - s_mean; + var += local_out[i] * local_out[i]; + } + } + + variance = blockReduceSum(var); + if (tid == 0) { + s_variance = rsqrtf(variance / n + 1e-6f); + } + __syncthreads(); + +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = i * blockDim.x + tid; + if (col_id < n) { + // size_t output_idx = batch_offset + (H_idx*W + W_idx)*n + col_id; + + int col_output = col_id; + int row_output = blockIdx.z * H * W + H_idx * W + W_idx; + int output_idx_col32 = ((col_output >> 5) << 5) * (m >> 2) + (row_output << 5) + (col_output & 31); + out[output_idx_col32] = float_to_int8_rn( + out_scale * (local_out[i] * s_variance * (float)__ldg(&gamma[col_id]) + (float)__ldg(&beta[col_id]))); + } + } +} + +// TODO : accelerate with half2 +template +void invokeMergeLayerNormCol32(int8_t* output, + const T* input, + const T* gamma, + const T* beta, + int batch, + const float* merge_inFactor, + int H, + int W, + int n, + cudaStream_t stream) +{ + if ((W % 2 != 0) || (H % 2 != 0)) { + printf("[ERROR][invokeMergeLayerNormCol32] H(W) should be a multiple of 2.\n"); + return; + } + dim3 grid(W / 2, H / 2, batch); + int blockSize = 4 * n; + blockSize = (blockSize + 31) / 32 * 32; + // TODO + // if (blockSize >= 768) + { + blockSize = ((blockSize / 4) + 31) / 32 * 32; + merge_layernorm_v2 + <<>>(output, input, gamma, beta, batch, merge_inFactor, H / 2, W / 2, n * 4); + } + /* + else + merge_layernorm<<>>(output, input, gamma, beta, batch, H/2, W/2, n*4); + */ +} + +template void invokeMergeLayerNormCol32(int8_t* output, + const float* input, + const float* gamma, + const float* beta, + int batch, + const float* merge_inFactor, + int H, + int W, + int n, + cudaStream_t stream); + +template void invokeMergeLayerNormCol32(int8_t* output, + const half* input, + const half* gamma, + const half* beta, + int batch, + const float* merge_inFactor, + int H, + int W, + int n, + cudaStream_t stream); + +// input1/input2/out matrix with layout of row major (m*n) //(grid, block) must be (m, n/4) -//using char4 -template -__global__ -void add_bias_input_layernorm_ROW_int8IO(int8_t* output, const int8_t* input1, const int8_t* input2, const T* bias, - const T* gamma, const T* beta, int m, int n, - const float *input1_deQFactor_ptr, - const float *input2_deQFactor_ptr, const float *output_scale_ptr) -{ - const float input1_deQFactor = __ldg(input1_deQFactor_ptr); - const float input2_deQFactor = __ldg(input2_deQFactor_ptr); - const float output_scale = __ldg(output_scale_ptr); - int col_start = threadIdx.x << 2; - - __shared__ float s_mean; - __shared__ float s_variance; - float mean = 0.0f; - float variance = 0.0f; - - float local_out[4]; - int outIdx = (blockIdx.x * n + col_start) >> 2; - char4 *outTmpPtr = (char4*)output; - char4 *input1TmpPtr = (char4*)input1; - char4 *input2TmpPtr = (char4*)input2; - char4 input1Tmp = __ldg(input1TmpPtr+outIdx); - char4 input2Tmp = __ldg(input2TmpPtr+outIdx); - - - int col_start_tmp = col_start; - local_out[0] = static_cast(input2Tmp.x)*input2_deQFactor + static_cast(input1Tmp.x)*input1_deQFactor + static_cast(__ldg(bias+col_start_tmp)); - col_start_tmp = col_start_tmp + 1; - local_out[1] = static_cast(input2Tmp.y)*input2_deQFactor + static_cast(input1Tmp.y)*input1_deQFactor + static_cast(__ldg(bias+col_start_tmp)); - col_start_tmp = col_start_tmp + 1; - local_out[2] = static_cast(input2Tmp.z)*input2_deQFactor + static_cast(input1Tmp.z)*input1_deQFactor + static_cast(__ldg(bias+col_start_tmp)); - col_start_tmp = col_start_tmp + 1; - local_out[3] = static_cast(input2Tmp.w)*input2_deQFactor + static_cast(input1Tmp.w)*input1_deQFactor + static_cast(__ldg(bias+col_start_tmp)); - - - mean = blockReduceSum(local_out[0] + local_out[1] + local_out[2] + local_out[3]); - if(threadIdx.x == 0) - s_mean = mean * __fdividef(1.0f, n); - __syncthreads(); - - local_out[0] = local_out[0] - s_mean; - local_out[1] = local_out[1] - s_mean; - local_out[2] = local_out[2] - s_mean; - local_out[3] = local_out[3] - s_mean; - variance = blockReduceSum(local_out[0] * local_out[0] + - local_out[1] * local_out[1] + - local_out[2] * local_out[2] + - local_out[3] * local_out[3] - ); - if(threadIdx.x == 0){ - s_variance = variance * __fdividef(1.0f, n) + 1e-6f; - s_variance = rsqrtf(s_variance); - } - __syncthreads(); - - local_out[0] = (local_out[0] * s_variance) * static_cast(__ldg(gamma+col_start)) + static_cast(__ldg(beta+col_start)); - input2Tmp.x = float_to_int8_rn(local_out[0] * output_scale); - - col_start = col_start+1; - local_out[1] = (local_out[1] * s_variance) * static_cast(__ldg(gamma+col_start)) + static_cast(__ldg(beta+col_start)); - input2Tmp.y = float_to_int8_rn(local_out[1] * output_scale); - - col_start = col_start+1; - local_out[2] = (local_out[2] * s_variance) * static_cast(__ldg(gamma+col_start)) + static_cast(__ldg(beta+col_start)); - input2Tmp.z = float_to_int8_rn(local_out[2] * output_scale); - - col_start = col_start+1; - local_out[3] = (local_out[3] * s_variance) * static_cast(__ldg(gamma+col_start)) + static_cast(__ldg(beta+col_start)); - input2Tmp.w = float_to_int8_rn(local_out[3] * output_scale); - - outTmpPtr[outIdx] = input2Tmp; -} - -template <> -__global__ -void add_bias_input_layernorm_ROW_int8IO(int8_t* output, const int8_t* input1, const int8_t* input2, const half2* bias, - const half2* gamma, const half2* beta, int m, int n, const float *input1_deQFactor_ptr, - const float *input2_deQFactor_ptr, const float *output_scale_ptr) -{ - const float input1_deQFactor = __ldg(input1_deQFactor_ptr); - const float input2_deQFactor = __ldg(input2_deQFactor_ptr); - const float output_scale = __ldg(output_scale_ptr); - int col_start = threadIdx.x << 2; - - __shared__ float s_mean; - __shared__ float s_variance; - float mean = 0.0f; - float variance = 0.0f; - - float local_out[4]; - int outIdx = (blockIdx.x * n + col_start) >> 2; - char4 *outTmpPtr = (char4*)output; - char4 *input1TmpPtr = (char4*)input1; - char4 *input2TmpPtr = (char4*)input2; - char4 input1Tmp = __ldg(input1TmpPtr + outIdx); - char4 input2Tmp = __ldg(input2TmpPtr + outIdx); - - int col_start_tmp = col_start; - half2 biasTmp = __ldg(bias + (col_start_tmp >> 1)); - local_out[0] = static_cast(input2Tmp.x)*input2_deQFactor + static_cast(input1Tmp.x)*input1_deQFactor + static_cast(biasTmp.x); - col_start_tmp = col_start_tmp + 1; - local_out[1] = static_cast(input2Tmp.y)*input2_deQFactor + static_cast(input1Tmp.y)*input1_deQFactor + static_cast(biasTmp.y); - - col_start_tmp = col_start_tmp + 1; - biasTmp = __ldg(bias + (col_start_tmp >> 1)); - local_out[2] = static_cast(input2Tmp.z)*input2_deQFactor + static_cast(input1Tmp.z)*input1_deQFactor + static_cast(biasTmp.x); - col_start_tmp = col_start_tmp + 1; - local_out[3] = static_cast(input2Tmp.w)*input2_deQFactor + static_cast(input1Tmp.w)*input1_deQFactor + static_cast(biasTmp.y); - - - mean = blockReduceSum(local_out[0] + local_out[1] + local_out[2] + local_out[3]); - if(threadIdx.x == 0) - s_mean = mean * __fdividef(1.0f, n); - __syncthreads(); - - local_out[0] = local_out[0] - s_mean; - local_out[1] = local_out[1] - s_mean; - local_out[2] = local_out[2] - s_mean; - local_out[3] = local_out[3] - s_mean; - variance = blockReduceSum(local_out[0] * local_out[0] + - local_out[1] * local_out[1] + - local_out[2] * local_out[2] + - local_out[3] * local_out[3] - ); - if(threadIdx.x == 0){ - s_variance = variance * __fdividef(1.0f, n) + 1e-6f; - s_variance = rsqrtf(s_variance); - } - __syncthreads(); - - col_start_tmp = col_start >> 1; - biasTmp = __ldg(gamma+col_start_tmp); - half2 betaTmp = __ldg(beta+col_start_tmp); - - local_out[0] = (local_out[0] * s_variance) * static_cast(biasTmp.x) + static_cast(betaTmp.x); - input2Tmp.x = float_to_int8_rn(local_out[0] * output_scale); - - col_start = col_start+1; - local_out[1] = (local_out[1] * s_variance) * static_cast(biasTmp.y) + static_cast(betaTmp.y); - input2Tmp.y = float_to_int8_rn(local_out[1] * output_scale); - - col_start = col_start+1; - col_start_tmp = col_start >> 1; - biasTmp = __ldg(gamma+col_start_tmp); - betaTmp = __ldg(beta+col_start_tmp); - local_out[2] = (local_out[2] * s_variance) * static_cast(biasTmp.x) + static_cast(betaTmp.x); - input2Tmp.z = float_to_int8_rn(local_out[2] * output_scale); - - col_start = col_start+1; - local_out[3] = (local_out[3] * s_variance) * static_cast(biasTmp.y) + static_cast(betaTmp.y); - input2Tmp.w = float_to_int8_rn(local_out[3] * output_scale); - - outTmpPtr[outIdx] = input2Tmp; +// using char4 +template +__global__ void add_bias_input_layernorm_ROW_int8IO(int8_t* output, + const int8_t* input1, + const int8_t* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr, + const float* output_scale_ptr) +{ + const float input1_deQFactor = __ldg(input1_deQFactor_ptr); + const float input2_deQFactor = __ldg(input2_deQFactor_ptr); + const float output_scale = __ldg(output_scale_ptr); + int col_start = threadIdx.x << 2; + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + float local_out[4]; + int outIdx = (blockIdx.x * n + col_start) >> 2; + char4* outTmpPtr = (char4*)output; + char4* input1TmpPtr = (char4*)input1; + char4* input2TmpPtr = (char4*)input2; + char4 input1Tmp = __ldg(input1TmpPtr + outIdx); + char4 input2Tmp = __ldg(input2TmpPtr + outIdx); + + int col_start_tmp = col_start; + local_out[0] = static_cast(input2Tmp.x) * input2_deQFactor + + static_cast(input1Tmp.x) * input1_deQFactor + + static_cast(__ldg(bias + col_start_tmp)); + col_start_tmp = col_start_tmp + 1; + local_out[1] = static_cast(input2Tmp.y) * input2_deQFactor + + static_cast(input1Tmp.y) * input1_deQFactor + + static_cast(__ldg(bias + col_start_tmp)); + col_start_tmp = col_start_tmp + 1; + local_out[2] = static_cast(input2Tmp.z) * input2_deQFactor + + static_cast(input1Tmp.z) * input1_deQFactor + + static_cast(__ldg(bias + col_start_tmp)); + col_start_tmp = col_start_tmp + 1; + local_out[3] = static_cast(input2Tmp.w) * input2_deQFactor + + static_cast(input1Tmp.w) * input1_deQFactor + + static_cast(__ldg(bias + col_start_tmp)); + + mean = blockReduceSum(local_out[0] + local_out[1] + local_out[2] + local_out[3]); + if (threadIdx.x == 0) { + s_mean = mean * __fdividef(1.0f, n); + } + __syncthreads(); + + local_out[0] = local_out[0] - s_mean; + local_out[1] = local_out[1] - s_mean; + local_out[2] = local_out[2] - s_mean; + local_out[3] = local_out[3] - s_mean; + variance = blockReduceSum(local_out[0] * local_out[0] + local_out[1] * local_out[1] + + local_out[2] * local_out[2] + local_out[3] * local_out[3]); + if (threadIdx.x == 0) { + s_variance = variance * __fdividef(1.0f, n) + 1e-6f; + s_variance = rsqrtf(s_variance); + } + __syncthreads(); + + local_out[0] = (local_out[0] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + input2Tmp.x = float_to_int8_rn(local_out[0] * output_scale); + + col_start = col_start + 1; + local_out[1] = (local_out[1] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + input2Tmp.y = float_to_int8_rn(local_out[1] * output_scale); + + col_start = col_start + 1; + local_out[2] = (local_out[2] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + input2Tmp.z = float_to_int8_rn(local_out[2] * output_scale); + + col_start = col_start + 1; + local_out[3] = (local_out[3] * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + input2Tmp.w = float_to_int8_rn(local_out[3] * output_scale); + + outTmpPtr[outIdx] = input2Tmp; +} + +template<> +__global__ void add_bias_input_layernorm_ROW_int8IO(int8_t* output, + const int8_t* input1, + const int8_t* input2, + const half2* bias, + const half2* gamma, + const half2* beta, + int m, + int n, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr, + const float* output_scale_ptr) +{ + const float input1_deQFactor = __ldg(input1_deQFactor_ptr); + const float input2_deQFactor = __ldg(input2_deQFactor_ptr); + const float output_scale = __ldg(output_scale_ptr); + int col_start = threadIdx.x << 2; + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + float local_out[4]; + int outIdx = (blockIdx.x * n + col_start) >> 2; + char4* outTmpPtr = (char4*)output; + char4* input1TmpPtr = (char4*)input1; + char4* input2TmpPtr = (char4*)input2; + char4 input1Tmp = __ldg(input1TmpPtr + outIdx); + char4 input2Tmp = __ldg(input2TmpPtr + outIdx); + + int col_start_tmp = col_start; + half2 biasTmp = __ldg(bias + (col_start_tmp >> 1)); + local_out[0] = static_cast(input2Tmp.x) * input2_deQFactor + + static_cast(input1Tmp.x) * input1_deQFactor + static_cast(biasTmp.x); + col_start_tmp = col_start_tmp + 1; + local_out[1] = static_cast(input2Tmp.y) * input2_deQFactor + + static_cast(input1Tmp.y) * input1_deQFactor + static_cast(biasTmp.y); + + col_start_tmp = col_start_tmp + 1; + biasTmp = __ldg(bias + (col_start_tmp >> 1)); + local_out[2] = static_cast(input2Tmp.z) * input2_deQFactor + + static_cast(input1Tmp.z) * input1_deQFactor + static_cast(biasTmp.x); + col_start_tmp = col_start_tmp + 1; + local_out[3] = static_cast(input2Tmp.w) * input2_deQFactor + + static_cast(input1Tmp.w) * input1_deQFactor + static_cast(biasTmp.y); + + mean = blockReduceSum(local_out[0] + local_out[1] + local_out[2] + local_out[3]); + if (threadIdx.x == 0) { + s_mean = mean * __fdividef(1.0f, n); + } + __syncthreads(); + + local_out[0] = local_out[0] - s_mean; + local_out[1] = local_out[1] - s_mean; + local_out[2] = local_out[2] - s_mean; + local_out[3] = local_out[3] - s_mean; + variance = blockReduceSum(local_out[0] * local_out[0] + local_out[1] * local_out[1] + + local_out[2] * local_out[2] + local_out[3] * local_out[3]); + if (threadIdx.x == 0) { + s_variance = variance * __fdividef(1.0f, n) + 1e-6f; + s_variance = rsqrtf(s_variance); + } + __syncthreads(); + + col_start_tmp = col_start >> 1; + biasTmp = __ldg(gamma + col_start_tmp); + half2 betaTmp = __ldg(beta + col_start_tmp); + + local_out[0] = (local_out[0] * s_variance) * static_cast(biasTmp.x) + static_cast(betaTmp.x); + input2Tmp.x = float_to_int8_rn(local_out[0] * output_scale); + + col_start = col_start + 1; + local_out[1] = (local_out[1] * s_variance) * static_cast(biasTmp.y) + static_cast(betaTmp.y); + input2Tmp.y = float_to_int8_rn(local_out[1] * output_scale); + + col_start = col_start + 1; + col_start_tmp = col_start >> 1; + biasTmp = __ldg(gamma + col_start_tmp); + betaTmp = __ldg(beta + col_start_tmp); + local_out[2] = (local_out[2] * s_variance) * static_cast(biasTmp.x) + static_cast(betaTmp.x); + input2Tmp.z = float_to_int8_rn(local_out[2] * output_scale); + + col_start = col_start + 1; + local_out[3] = (local_out[3] * s_variance) * static_cast(biasTmp.y) + static_cast(betaTmp.y); + input2Tmp.w = float_to_int8_rn(local_out[3] * output_scale); + + outTmpPtr[outIdx] = input2Tmp; } template -void invokeAddBiasResidualLayerNormRow(int8_t* output, const int8_t* input1, const int8_t* input2, const T* bias, const T* gamma, - const T* beta, int m, int n, cudaStream_t stream, - const float *input1_deQFactor_ptr, const float *input2_deQFactor_ptr, const float *output_scale_ptr) -{ - dim3 grid(m); - dim3 block(n/4); - assert(n <= 1024); - if (sizeof(T) == sizeof(half)){ - add_bias_input_layernorm_ROW_int8IO<<>>(output, input1, input2, (const half2*)bias, (const half2*)gamma, - (const half2*)beta, m, n, input1_deQFactor_ptr, - input2_deQFactor_ptr, output_scale_ptr); - } - else{ - add_bias_input_layernorm_ROW_int8IO<<>>(output, input1, input2, bias, gamma, beta, - m, n, input1_deQFactor_ptr, - input2_deQFactor_ptr, output_scale_ptr); - } -} - -template -void invokeAddBiasResidualLayerNormRow(int8_t* output, const int8_t* input1, const int8_t* input2, const float* bias, const float* gamma, - const float* beta, int m, int n, cudaStream_t stream, - const float *input1_deQFactor_ptr, const float *input2_deQFactor_ptr, const float *output_scale_ptr); - -template -void invokeAddBiasResidualLayerNormRow(int8_t* output, const int8_t* input1, const int8_t* input2, const half* bias, const half* gamma, - const half* beta, int m, int n, cudaStream_t stream, - const float *input1_deQFactor_ptr, const float *input2_deQFactor_ptr, const float *output_scale_ptr); - - -//input1/input2/out matrix with layout of row major (m*n) +void invokeAddBiasResidualLayerNormRow(int8_t* output, + const int8_t* input1, + const int8_t* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr, + const float* output_scale_ptr) +{ + dim3 grid(m); + dim3 block(n / 4); + assert(n <= 1024); + if (sizeof(T) == sizeof(half)) { + add_bias_input_layernorm_ROW_int8IO<<>>(output, + input1, + input2, + (const half2*)bias, + (const half2*)gamma, + (const half2*)beta, + m, + n, + input1_deQFactor_ptr, + input2_deQFactor_ptr, + output_scale_ptr); + } + else { + add_bias_input_layernorm_ROW_int8IO<<>>(output, + input1, + input2, + bias, + gamma, + beta, + m, + n, + input1_deQFactor_ptr, + input2_deQFactor_ptr, + output_scale_ptr); + } +} + +template void invokeAddBiasResidualLayerNormRow(int8_t* output, + const int8_t* input1, + const int8_t* input2, + const float* bias, + const float* gamma, + const float* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr, + const float* output_scale_ptr); + +template void invokeAddBiasResidualLayerNormRow(int8_t* output, + const int8_t* input1, + const int8_t* input2, + const half* bias, + const half* gamma, + const half* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr, + const float* output_scale_ptr); + +// input1/input2/out matrix with layout of row major (m*n) //(grid, block) must be (m, n) -template -__global__ -void add_bias_input_layernorm_ROW_int8I_DataTypeO(T* output, const int8_t* input1, const int8_t* input2, const T* bias, const T* gamma, - const T* beta, int m, int n, - const float *input1_deQFactor_ptr, - const float *input2_deQFactor_ptr) -{ - const float input1_deQFactor = __ldg(input1_deQFactor_ptr); - const float input2_deQFactor = __ldg(input2_deQFactor_ptr); - int col_start = threadIdx.x; - - __shared__ float s_mean; - __shared__ float s_variance; - float mean = 0.0f; - float variance = 0.0f; - - float local_out; - int idx = blockIdx.x * n + col_start; - - local_out = static_cast(__ldg(input2+idx))*input2_deQFactor + static_cast(__ldg(input1+idx))*input1_deQFactor + static_cast(__ldg(bias+col_start)); - - mean = blockReduceSum(local_out); - if(threadIdx.x == 0) - s_mean = mean * __fdividef(1.0f, n); - __syncthreads(); - - local_out = local_out - s_mean; - - variance = blockReduceSum(local_out * local_out); - - if(threadIdx.x == 0){ - s_variance = variance * __fdividef(1.0f, n) + 1e-6f; - s_variance = rsqrtf(s_variance); - } - __syncthreads(); - - local_out = (local_out * s_variance) * static_cast(__ldg(gamma+col_start)) + static_cast(__ldg(beta+col_start)); - - output[idx] = local_out; -} - -//input1/input2/out matrix with layout of row major (m*n) +template +__global__ void add_bias_input_layernorm_ROW_int8I_DataTypeO(T* output, + const int8_t* input1, + const int8_t* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr) +{ + const float input1_deQFactor = __ldg(input1_deQFactor_ptr); + const float input2_deQFactor = __ldg(input2_deQFactor_ptr); + int col_start = threadIdx.x; + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + float local_out; + int idx = blockIdx.x * n + col_start; + + local_out = static_cast(__ldg(input2 + idx)) * input2_deQFactor + + static_cast(__ldg(input1 + idx)) * input1_deQFactor + + static_cast(__ldg(bias + col_start)); + + mean = blockReduceSum(local_out); + if (threadIdx.x == 0) { + s_mean = mean * __fdividef(1.0f, n); + } + __syncthreads(); + + local_out = local_out - s_mean; + + variance = blockReduceSum(local_out * local_out); + + if (threadIdx.x == 0) { + s_variance = variance * __fdividef(1.0f, n) + 1e-6f; + s_variance = rsqrtf(s_variance); + } + __syncthreads(); + + local_out = (local_out * s_variance) * static_cast(__ldg(gamma + col_start)) + + static_cast(__ldg(beta + col_start)); + + output[idx] = local_out; +} + +// input1/input2/out matrix with layout of row major (m*n) //(grid, block) must be (m, n/2) -template <> -__global__ -void add_bias_input_layernorm_ROW_int8I_DataTypeO(half2* output, const int8_t* input1, const int8_t* input2, const half2* bias, const half2* gamma, - const half2* beta, int m, int n, - const float *input1_deQFactor_ptr, - const float *input2_deQFactor_ptr) -{ - const float input1_deQFactor = __ldg(input1_deQFactor_ptr); - const float input2_deQFactor = __ldg(input2_deQFactor_ptr); - int col_start = threadIdx.x << 1; - - __shared__ float s_mean; - __shared__ float s_variance; - float mean = 0.0f; - float variance = 0.0f; - - float2 local_out; - int idx = (blockIdx.x * n + col_start) >> 1; - - const char2 * input1_ptr2 = (const char2*)input1; - const char2 * input2_ptr2 = (const char2*)input2; - char2 input_tmp1 = __ldg(input1_ptr2 + idx); - char2 input_tmp2 = __ldg(input2_ptr2 + idx); - - half2 bias_tmp = __ldg(bias+threadIdx.x); - - local_out.x = static_cast(input_tmp1.x)*input1_deQFactor + static_cast(input_tmp2.x)*input2_deQFactor + static_cast(bias_tmp.x); - - local_out.y = static_cast(input_tmp1.y)*input1_deQFactor + static_cast(input_tmp2.y)*input2_deQFactor + static_cast(bias_tmp.y); - - mean = blockReduceSum(local_out.x + local_out.y); - if(threadIdx.x == 0) - s_mean = mean * __fdividef(1.0f, n); - __syncthreads(); - - local_out.x = local_out.x - s_mean; - - local_out.y = local_out.y - s_mean; - - variance = blockReduceSum(local_out.x * local_out.x + local_out.y * local_out.y); - - if(threadIdx.x == 0){ - s_variance = variance * __fdividef(1.0f, n) + 1e-6f; - s_variance = rsqrtf(s_variance); - } - __syncthreads(); - - half2 gamma_tmp = __ldg(gamma+threadIdx.x); - half2 beta_tmp = __ldg(beta+threadIdx.x); - - local_out.x = (local_out.x * s_variance) * static_cast(gamma_tmp.x) + static_cast(beta_tmp.x); - local_out.y = (local_out.y * s_variance) * static_cast(gamma_tmp.y) + static_cast(beta_tmp.y); - - bias_tmp.x = half(local_out.x); - bias_tmp.y = half(local_out.y); - - output[idx] = bias_tmp; +template<> +__global__ void add_bias_input_layernorm_ROW_int8I_DataTypeO(half2* output, + const int8_t* input1, + const int8_t* input2, + const half2* bias, + const half2* gamma, + const half2* beta, + int m, + int n, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr) +{ + const float input1_deQFactor = __ldg(input1_deQFactor_ptr); + const float input2_deQFactor = __ldg(input2_deQFactor_ptr); + int col_start = threadIdx.x << 1; + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + float2 local_out; + int idx = (blockIdx.x * n + col_start) >> 1; + + const char2* input1_ptr2 = (const char2*)input1; + const char2* input2_ptr2 = (const char2*)input2; + char2 input_tmp1 = __ldg(input1_ptr2 + idx); + char2 input_tmp2 = __ldg(input2_ptr2 + idx); + + half2 bias_tmp = __ldg(bias + threadIdx.x); + + local_out.x = static_cast(input_tmp1.x) * input1_deQFactor + + static_cast(input_tmp2.x) * input2_deQFactor + static_cast(bias_tmp.x); + + local_out.y = static_cast(input_tmp1.y) * input1_deQFactor + + static_cast(input_tmp2.y) * input2_deQFactor + static_cast(bias_tmp.y); + + mean = blockReduceSum(local_out.x + local_out.y); + if (threadIdx.x == 0) { + s_mean = mean * __fdividef(1.0f, n); + } + __syncthreads(); + + local_out.x = local_out.x - s_mean; + + local_out.y = local_out.y - s_mean; + + variance = blockReduceSum(local_out.x * local_out.x + local_out.y * local_out.y); + + if (threadIdx.x == 0) { + s_variance = variance * __fdividef(1.0f, n) + 1e-6f; + s_variance = rsqrtf(s_variance); + } + __syncthreads(); + + half2 gamma_tmp = __ldg(gamma + threadIdx.x); + half2 beta_tmp = __ldg(beta + threadIdx.x); + + local_out.x = (local_out.x * s_variance) * static_cast(gamma_tmp.x) + static_cast(beta_tmp.x); + local_out.y = (local_out.y * s_variance) * static_cast(gamma_tmp.y) + static_cast(beta_tmp.y); + + bias_tmp.x = half(local_out.x); + bias_tmp.y = half(local_out.y); + + output[idx] = bias_tmp; } template -void invokeAddBiasResidualLayerNormRow(T *output, const int8_t *input1, - const int8_t *input2, const T *bias, - const T *gamma, const T *beta, - int m, int n, cudaStream_t stream, - const float *input1_deQFactor_ptr, - const float *input2_deQFactor_ptr) -{ - dim3 grid(m); - dim3 block(n); - if (sizeof(T) == sizeof(half)){ - assert(n/2 <= 1024 && n%2 == 0); - block.x = n/2; - add_bias_input_layernorm_ROW_int8I_DataTypeO<<>>((half2*)output, input1, input2, (const half2*)bias, (const half2*)gamma, - (const half2*)beta, m, n, input1_deQFactor_ptr, - input2_deQFactor_ptr); - } - else{ - assert(n <= 1024); - add_bias_input_layernorm_ROW_int8I_DataTypeO<<>>(output, input1, input2, bias, gamma, beta, - m, n, input1_deQFactor_ptr, - input2_deQFactor_ptr); - } +void invokeAddBiasResidualLayerNormRow(T* output, + const int8_t* input1, + const int8_t* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr) +{ + dim3 grid(m); + dim3 block(n); + if (sizeof(T) == sizeof(half)) { + assert(n / 2 <= 1024 && n % 2 == 0); + block.x = n / 2; + add_bias_input_layernorm_ROW_int8I_DataTypeO<<>>((half2*)output, + input1, + input2, + (const half2*)bias, + (const half2*)gamma, + (const half2*)beta, + m, + n, + input1_deQFactor_ptr, + input2_deQFactor_ptr); + } + else { + assert(n <= 1024); + add_bias_input_layernorm_ROW_int8I_DataTypeO<<>>( + output, input1, input2, bias, gamma, beta, m, n, input1_deQFactor_ptr, input2_deQFactor_ptr); + } } -template void invokeAddBiasResidualLayerNormRow(float* output, const int8_t* input1, const int8_t* input2, const float* bias, const float* gamma, const float* beta, int m, int n, cudaStream_t stream, const float *input1_deQFactor_ptr, const float *input2_deQFactor_ptr); - -template void invokeAddBiasResidualLayerNormRow(half* output, const int8_t* input1, const int8_t* input2, const half* bias, const half* gamma, const half* beta, int m, int n, cudaStream_t stream, const float *input1_deQFactor_ptr, const float *input2_deQFactor_ptr); +template void invokeAddBiasResidualLayerNormRow(float* output, + const int8_t* input1, + const int8_t* input2, + const float* bias, + const float* gamma, + const float* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr); + +template void invokeAddBiasResidualLayerNormRow(half* output, + const int8_t* input1, + const int8_t* input2, + const half* bias, + const half* gamma, + const half* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr); } // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/layernorm_int8_kernels.h b/src/fastertransformer/kernels/layernorm_int8_kernels.h index d40150e84..53f01b25c 100644 --- a/src/fastertransformer/kernels/layernorm_int8_kernels.h +++ b/src/fastertransformer/kernels/layernorm_int8_kernels.h @@ -16,43 +16,143 @@ #pragma once +#include "int8_utils.cuh" +#include "src/fastertransformer/kernels/layernorm_kernels.h" +#include "src/fastertransformer/utils/cuda_utils.h" #include #include #include -#include "src/fastertransformer/kernels/layernorm_kernels.h" -#include "int8_utils.cuh" namespace fastertransformer { -template -void invokeAddBiasResidualLayerNormCol32(T* output, const int32_t* input1, const T* input2, const T* bias, const T* gamma, - const T* beta, int m, int n, cudaStream_t stream, const float* weight_amax, +template +void invokeAddBiasResidualLayerNormCol32(T* output, + const int32_t* input1, + const T* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + cudaStream_t stream, + const float* weight_amax, const float* input1_amax_ptr); - -template -void invokeAddBiasResidualLayerNormCol32(int8_t* output, const int8_t* input1, const int8_t* input2, const T* bias, const T* gamma, - const T* beta, int m, int n, cudaStream_t stream, - const float *input1_deQFactor_ptr, const float *input2_deQFactor_ptr, const float *output_scale_ptr); - -template -void invokeAddBiasResidualLayerNormCol32(T *output, const int8_t *input1, - const int8_t *input2, const T *bias, - const T *gamma, const T *beta, - int m, int n, cudaStream_t stream, - const float *input1_deQFactor_ptr, - const float *input2_deQFactor_ptr); - -template -void invokeAddBiasResidualLayerNormRow(int8_t* output, const int8_t* input1, const int8_t* input2, const T* bias, const T* gamma, - const T* beta, int m, int n, cudaStream_t stream, - const float *input1_deQFactor_ptr, const float *input2_deQFactor_ptr, const float *output_scale_ptr); - -template -void invokeAddBiasResidualLayerNormRow(T *output, const int8_t *input1, - const int8_t *input2, const T *bias, - const T *gamma, const T *beta, - int m, int n, cudaStream_t stream, - const float *input1_deQFactor_ptr, - const float *input2_deQFactor_ptr); + +template +void invokeAddBiasResidualLayerNormCol32(int8_t* output, + const int8_t* input1, + const int8_t* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr, + const float* output_scale_ptr); + +template +void invokeAddBiasResidualLayerNormCol32(T* output, + const int8_t* input1, + const int8_t* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr); + +template +void invokeAddBiasResidualLayerNormCol32_noRes(int8_t* output, + int8_t* input1, + T* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* output_scale_ptr); + +template +void invokeAddBiasResidualLayerNormCol32_noRes(int8_t* output, + int32_t* input1, + T* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + cudaStream_t stream, + const float* weight_amax, + const float* input1_amax_ptr, + const float* output_scale_ptr); + +template +void invokeLayernormCol32(int8_t* out, + const T* input, + const T* gamma, + const T* beta, + int m, + int n, + const float* norm_scale_ptr, + cudaStream_t stream); + +template +void invokeLayernormShiftPartitionCol32(int8_t* out, + const T* input, + const T* gamma, + const T* beta, + int batch, + int H, + int W, + int n, + const float* norm_scale_ptr, + int shift_size, + int window_size, + cudaStream_t stream); + +template +void invokeMergeLayerNormCol32(int8_t* output, + const T* input, + const T* gamma, + const T* beta, + int batch, + const float* merge_inFactor, + int H, + int W, + int n, + cudaStream_t stream); + +template +void invokeAddBiasResidualLayerNormRow(int8_t* output, + const int8_t* input1, + const int8_t* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr, + const float* output_scale_ptr); + +template +void invokeAddBiasResidualLayerNormRow(T* output, + const int8_t* input1, + const int8_t* input2, + const T* bias, + const T* gamma, + const T* beta, + int m, + int n, + cudaStream_t stream, + const float* input1_deQFactor_ptr, + const float* input2_deQFactor_ptr); } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/layernorm_kernels.cu b/src/fastertransformer/kernels/layernorm_kernels.cu index 37f833a38..96a090ed9 100644 --- a/src/fastertransformer/kernels/layernorm_kernels.cu +++ b/src/fastertransformer/kernels/layernorm_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -14,11 +14,155 @@ * limitations under the License. */ +#include "src/fastertransformer/kernels/bfloat16_fallback_kenrels.cuh" #include "src/fastertransformer/kernels/layernorm_kernels.h" #include "src/fastertransformer/kernels/reduce_kernel_utils.cuh" namespace fastertransformer { +// * Note that typename T is half2 or bfloat2 type +template +__global__ void generalAddBiasResidualLayerNormOpt(T* normed_output, + T* output, + const T* __restrict bias, + const T* __restrict residual, + const T* __restrict gamma, + const T* __restrict beta, + int m, + int n) +{ + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + T local_sum = float2type2(0.0f); +#pragma unroll + for (int i = threadIdx.x; i < n; i += blockDim.x) { + const int index = blockIdx.x * n + i; + T val = float2type2(0.0f); + + if (IS_BIAS) { + val = hadd2(val, ldg(&bias[i])); + } + if (IS_RESIDUAL) { + val = hadd2(val, ldg(&residual[index])); + } + + if (IS_OUTPUT) { + val = hadd2(val, output[index]); + } + output[index] = val; + local_sum = hadd2(local_sum, val); + } + + mean = blockReduceSum((float)(local_sum.x + local_sum.y)); + + if (threadIdx.x == 0) { + s_mean = mean / n / 2; + } + __syncthreads(); + + float local_var_sum = 0.0f; +#pragma unroll UNROLL_FACTOR + for (int i = threadIdx.x; i < n; i += blockDim.x) { + T val = output[blockIdx.x * n + i]; + float diff_1 = (float)(val.x) - s_mean; + float diff_2 = (float)(val.y) - s_mean; + local_var_sum += (diff_1 * diff_1 + diff_2 * diff_2); + } + variance = blockReduceSum(local_var_sum); + + if (threadIdx.x == 0) { + s_variance = rsqrtf(variance / n / 2 + 1e-6f); + } + __syncthreads(); + + T mean_2 = float2type2(s_mean); + T var_2 = float2type2(s_variance); +#pragma unroll UNROLL_FACTOR + for (int i = threadIdx.x; i < n; i += blockDim.x) { + const int index = blockIdx.x * n + i; + T val = hmul2(hmul2(hsub2(output[index], mean_2), var_2), ldg(&gamma[i])); + if (IS_BETA) { + val = hadd2(val, ldg(&beta[i])); + } + normed_output[index] = val; + } +} + +// * Note that typename T is half2 or bfloat2 type +template +__global__ void generalAddBiasResidualLayerNormOpt2(T* normed_output, + T* output, + const T* __restrict bias, + const T* __restrict residual, + const T* __restrict gamma, + const T* __restrict beta, + int m, + int n) +{ + __shared__ float s_mean; + __shared__ float s_variance; + float x_sum = 0.0f; + float x2_sum = 0.0f; + const int b_offset = blockIdx.x * n; + using T1 = typename TypeConverter::Type; + +#pragma unroll UNROLL_FACTOR + for (int i = threadIdx.x; i < n; i += blockDim.x) { + const int index = b_offset + i; + float val_1 = 0.0f; + float val_2 = 0.0f; + T tmp; + + if (IS_BIAS) { + tmp = ldg(&bias[i]); + val_1 += static_cast(tmp.x); + val_2 += static_cast(tmp.y); + } + if (IS_RESIDUAL) { + tmp = ldg(&residual[index]); + val_1 += static_cast(tmp.x); + val_2 += static_cast(tmp.y); + } + + if (IS_OUTPUT) { + tmp = ldg(&output[index]); + val_1 += static_cast(tmp.x); + val_2 += static_cast(tmp.y); + } + tmp.x = float2type(val_1); + tmp.y = float2type(val_2); + output[index] = tmp; + x_sum += val_1 + val_2; + x2_sum += val_1 * val_1 + val_2 * val_2; + } + float sums[2]; + sums[0] = x_sum; + sums[1] = x2_sum; + blockReduceSumV2(sums); + + if (threadIdx.x == 0) { + s_mean = sums[0] / n / 2; + s_variance = rsqrtf(sums[1] / n / 2 - s_mean * s_mean + 1e-6f); + } + __syncthreads(); + + T mean_2 = float2type2(s_mean); + T var_2 = float2type2(s_variance); + +#pragma unroll UNROLL_FACTOR + for (int i = threadIdx.x; i < n; i += blockDim.x) { + const int index = b_offset + i; + T val = hmul2(hmul2(hsub2(output[index], mean_2), var_2), ldg(&gamma[i])); + if (IS_BETA) { + val = hadd2(val, ldg(&beta[i])); + } + normed_output[index] = val; + } +} + // TODO(bhsueh) add half2 implementation template __global__ void @@ -40,8 +184,9 @@ addBiasResidualPostLayerNorm(T* out, const T* input, const T* bias, const T* gam } mean = blockReduceSum(mean); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_mean = mean / n; + } __syncthreads(); #pragma unroll N @@ -51,8 +196,9 @@ addBiasResidualPostLayerNorm(T* out, const T* input, const T* bias, const T* gam idx += blockDim.x; } variance = blockReduceSum(variance); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_variance = variance / n + 1e-6f; + } __syncthreads(); #pragma unroll N @@ -94,8 +240,9 @@ __global__ void addBiasResidualPostLayerNormHalf( } mean = blockReduceSum(local_out); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_mean = mean / n; + } __syncthreads(); #pragma unroll N @@ -107,8 +254,9 @@ __global__ void addBiasResidualPostLayerNormHalf( } variance = blockReduceSum(variance); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_variance = rsqrtf(variance / n + 1e-6f); + } __syncthreads(); #pragma unroll N @@ -141,8 +289,9 @@ generalAddBiasResidualPostLayerNorm(T* out, const T* input, const T* bias, const } mean = blockReduceSum(mean); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_mean = mean / n; + } __syncthreads(); for (int idx = threadIdx.x; idx < n; idx += blockDim.x) { @@ -150,8 +299,9 @@ generalAddBiasResidualPostLayerNorm(T* out, const T* input, const T* bias, const variance += (local_out - s_mean) * (local_out - s_mean); } variance = blockReduceSum(variance); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_variance = variance / n + 1e-6f; + } __syncthreads(); for (int idx = threadIdx.x; idx < n; idx += blockDim.x) { @@ -188,8 +338,9 @@ __global__ void generalAddBiasResidualPostLayerNorm( } mean = blockReduceSum(local_out); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_mean = mean / n; + } __syncthreads(); for (int idx = threadIdx.x; idx < n / 2; idx += blockDim.x) { @@ -200,8 +351,9 @@ __global__ void generalAddBiasResidualPostLayerNorm( } variance = blockReduceSum(variance); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_variance = rsqrtf(variance / n + 1e-6f); + } __syncthreads(); for (int idx = threadIdx.x; idx < n / 2; idx += blockDim.x) { @@ -243,8 +395,9 @@ __global__ void addBiasResidualPostLayerNormV2(T* out, } mean = blockReduceSum(sum); - if (tid == 0) + if (tid == 0) { s_mean = mean / n; + } __syncthreads(); float var = 0.0f; @@ -255,8 +408,9 @@ __global__ void addBiasResidualPostLayerNormV2(T* out, } variance = blockReduceSum(var); - if (tid == 0) + if (tid == 0) { s_variance = rsqrtf(variance / n + 1e-6f); + } __syncthreads(); #pragma unroll @@ -302,8 +456,9 @@ __global__ void addBiasResidualPostLayerNormV2(half* out, } mean = blockReduceSum((float)(sum.x + sum.y)); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_mean = mean / n; + } __syncthreads(); float var = 0.0f; @@ -317,8 +472,9 @@ __global__ void addBiasResidualPostLayerNormV2(half* out, } variance = blockReduceSum(var); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_variance = rsqrtf(variance / n + 1e-6f); + } __syncthreads(); half2 s_var_2 = __float2half2_rn(s_variance); @@ -421,10 +577,10 @@ __global__ void generalAddBiasResidualLayerNorm(const T* __restrict input, float local_sum = 0.0f; for (int i = tid; i < n; i += blockDim.x) { - float local_out = (float)(__ldg(&input[blockIdx.x * n + i])); + float local_out = (float)(ldg(&input[blockIdx.x * n + i])); local_out += (float)(output[blockIdx.x * n + i]); if (bias != nullptr) { - local_out += (float)(__ldg(&bias[i])); + local_out += (float)(ldg(&bias[i])); } output[blockIdx.x * n + i] = (T)local_out; local_sum += local_out; @@ -432,8 +588,9 @@ __global__ void generalAddBiasResidualLayerNorm(const T* __restrict input, mean = blockReduceSum(local_sum); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_mean = mean / n; + } __syncthreads(); float local_var_sum = 0.0f; @@ -443,17 +600,40 @@ __global__ void generalAddBiasResidualLayerNorm(const T* __restrict input, } variance = blockReduceSum(local_var_sum); - if (threadIdx.x == 0) - s_variance = rsqrtf(variance / n + 1e-6); + if (threadIdx.x == 0) { + s_variance = rsqrtf(variance / n + 1e-6f); + } __syncthreads(); for (int i = tid; i < n; i += blockDim.x) { - float beta_val = (beta == nullptr) ? 0.0f : (float)(__ldg(&beta[i])); + float beta_val = (beta == nullptr) ? 0.0f : (float)(ldg(&beta[i])); norm_output[blockIdx.x * n + i] = - (T)((((float)output[blockIdx.x * n + i] - s_mean) * s_variance) * (float)(__ldg(&gamma[i])) + beta_val); + (T)((((float)output[blockIdx.x * n + i] - s_mean) * s_variance) * (float)(ldg(&gamma[i])) + beta_val); } } +#define HALF_LAYERNORM_OPT(UNROLL_FACTOR) \ + generalAddBiasResidualLayerNormOpt \ + <<>>((T2*)norm_output, \ + (T2*)output, \ + (const T2*)bias, \ + (const T2*)input, \ + (const T2*)gamma, \ + (const T2*)beta, \ + m, \ + half_n); + +#define HALF_LAYERNORM_OPT2(UNROLL_FACTOR) \ + generalAddBiasResidualLayerNormOpt2 \ + <<>>((T2*)norm_output, \ + (T2*)output, \ + (const T2*)bias, \ + (const T2*)input, \ + (const T2*)gamma, \ + (const T2*)beta, \ + m, \ + half_n); + template void invokeGeneralAddBiasResidualPreLayerNorm(T* output, T* norm_output, @@ -463,25 +643,79 @@ void invokeGeneralAddBiasResidualPreLayerNorm(T* output, const T* bias, int m, int n, - cudaStream_t stream) + cudaStream_t stream, + int opt_version) { - dim3 grid(m); - dim3 block(min(n, 1024)); + if (opt_version > 0 && sizeof(T) == 2 && n % 2 == 0) { + dim3 grid(m); + int half_n = n / 2; + int half_n_32 = (half_n + 31) / 32 * 32; + dim3 block(min(half_n_32, 512)); + int rolls_per_thread = half_n / block.x; + int unroll_factor = 8; + while (unroll_factor > rolls_per_thread && unroll_factor > 1) { + unroll_factor /= 2; + } + using T2 = typename TypeConverter::Type; + if (opt_version == 1) { + if (unroll_factor == 1) { + HALF_LAYERNORM_OPT(1); + } + else if (unroll_factor == 2) { + HALF_LAYERNORM_OPT(2); + } + else if (unroll_factor == 3) { + HALF_LAYERNORM_OPT(3); + } + else if (unroll_factor == 4) { + HALF_LAYERNORM_OPT(4); + } + else if (unroll_factor == 8) { + HALF_LAYERNORM_OPT(8); + } + } + else { + if (unroll_factor == 1) { + HALF_LAYERNORM_OPT2(1); + } + else if (unroll_factor == 2) { + HALF_LAYERNORM_OPT2(2); + } + else if (unroll_factor == 3) { + HALF_LAYERNORM_OPT2(3); + } + else if (unroll_factor == 4) { + HALF_LAYERNORM_OPT2(4); + } + else if (unroll_factor == 8) { + HALF_LAYERNORM_OPT2(8); + } + } + } + else { - /* For general cases, n is equal to hidden_units, e.g., 512/1024. - Since we have warp shuffle inside the code, block.x % 32 should be 0. - */ + dim3 grid(m); + dim3 block(min(n, 1024)); - if (n % 32 != 0) - block.x = 1024; + /* For general cases, n is equal to hidden_units, e.g., 512/1024. + Since we have warp shuffle inside the code, block.x % 32 should be 0. + */ - block.x = block.x / (4 / sizeof(T)); // if using half, only need half of block.x + if (n % 32 != 0) { + block.x = 1024; + } - /* should pay attention to the rsqrt precision*/ - generalAddBiasResidualLayerNorm - <<>>(input, gamma, beta, bias, output, norm_output, m, n); // For gpt-3 + block.x = block.x / (4 / sizeof(T)); // if using half, only need half of block.x + + /* should pay attention to the rsqrt precision*/ + generalAddBiasResidualLayerNorm + <<>>(input, gamma, beta, bias, output, norm_output, m, n); // For gpt-3 + } } +#undef HALF_LAYERNORM_OPT +#undef HALF_LAYERNORM_OPT2 + template void invokeGeneralAddBiasResidualPreLayerNorm(float* output, float* norm_output, const float* input, @@ -490,7 +724,8 @@ template void invokeGeneralAddBiasResidualPreLayerNorm(float* output, const float* bias, int m, int n, - cudaStream_t stream); + cudaStream_t stream, + int opt_version); template void invokeGeneralAddBiasResidualPreLayerNorm(half* output, half* norm_output, @@ -500,7 +735,21 @@ template void invokeGeneralAddBiasResidualPreLayerNorm(half* output, const half* bias, int m, int n, - cudaStream_t stream); + cudaStream_t stream, + int opt_version); + +#ifdef ENABLE_BF16 +template void invokeGeneralAddBiasResidualPreLayerNorm(__nv_bfloat16* output, + __nv_bfloat16* norm_output, + const __nv_bfloat16* input, + const __nv_bfloat16* gamma, + const __nv_bfloat16* beta, + const __nv_bfloat16* bias, + int m, + int n, + cudaStream_t stream, + int opt_version); +#endif template __global__ void generalAddResidualT5LayerNorm( @@ -521,7 +770,7 @@ __global__ void generalAddResidualT5LayerNorm( variance = blockReduceSum(local_var_sum); if (threadIdx.x == 0) { - s_variance = rsqrtf(variance / n + 1e-6); + s_variance = rsqrtf(variance / n + 1e-6f); } __syncthreads(); @@ -559,6 +808,46 @@ template void invokeGeneralAddResidualT5PreLayerNorm( template void invokeGeneralAddResidualT5PreLayerNorm( half* output, half* norm_output, const half* input, const half* gamma, int m, int n, cudaStream_t stream); +template +void invokeGeneralAddBiasResidualT5PreLayerNorm(T* output, + T* norm_output, + const T* input, + const T* gamma, + const T* beta, + const T* bias, + int m, + int n, + cudaStream_t stream) +{ + if (beta != nullptr && bias != nullptr) { + invokeGeneralAddBiasResidualPreLayerNorm(output, norm_output, input, gamma, beta, bias, m, n, stream); + } + else { + invokeGeneralAddResidualT5PreLayerNorm(output, norm_output, input, gamma, m, n, stream); + } + return; +} + +template void invokeGeneralAddBiasResidualT5PreLayerNorm(float* output, + float* norm_output, + const float* input, + const float* gamma, + const float* beta, + const float* bias, + int m, + int n, + cudaStream_t stream); + +template void invokeGeneralAddBiasResidualT5PreLayerNorm(half* output, + half* norm_output, + const half* input, + const half* gamma, + const half* beta, + const half* bias, + int m, + int n, + cudaStream_t stream); + template __global__ void generalLayerNorm( const T* __restrict input, const T* __restrict gamma, const T* __restrict beta, T* output, int m, int n) @@ -572,61 +861,143 @@ __global__ void generalLayerNorm( float local_sum = 0.0f; for (int i = tid; i < n; i += blockDim.x) { - local_sum += (float)(__ldg(&input[blockIdx.x * n + i])); + local_sum += (float)(ldg(&input[blockIdx.x * n + i])); } mean = blockReduceSum(local_sum); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_mean = mean / n; + } __syncthreads(); float local_var_sum = 0.0f; for (int i = tid; i < n; i += blockDim.x) { - float diff = (float)(__ldg(&input[blockIdx.x * n + i])) - s_mean; + float diff = (float)(ldg(&input[blockIdx.x * n + i])) - s_mean; local_var_sum += diff * diff; } variance = blockReduceSum(local_var_sum); - if (threadIdx.x == 0) - s_variance = rsqrtf(variance / n + 1e-6); + if (threadIdx.x == 0) { + s_variance = rsqrtf(variance / n + 1e-6f); + } __syncthreads(); for (int i = tid; i < n; i += blockDim.x) { - float beta_val = (beta == nullptr) ? 0.0f : (float)__ldg(&beta[i]); + float beta_val = (beta == nullptr) ? 0.0f : (float)ldg(&beta[i]); output[blockIdx.x * n + i] = - (T)((((float)input[blockIdx.x * n + i] - s_mean) * s_variance) * (float)(__ldg(&gamma[i])) + beta_val); + (T)((((float)input[blockIdx.x * n + i] - s_mean) * s_variance) * (float)(ldg(&gamma[i])) + beta_val); } } +#define HALF_LAYERNORM_OPT(UNROLL_FACTOR) \ + generalAddBiasResidualLayerNormOpt<<>>( \ + (T2*)out, (T2*)out, nullptr, (const T2*)input, (const T2*)gamma, (const T2*)beta, m, half_n); + +#define HALF_LAYERNORM_OPT2(UNROLL_FACTOR) \ + generalAddBiasResidualLayerNormOpt2<<>>( \ + (T2*)out, (T2*)out, nullptr, (const T2*)input, (const T2*)gamma, (const T2*)beta, m, half_n); + template -void invokeGeneralLayerNorm( - T* out, const T* input, const T* gamma, const T* beta, const int m, const int n, cudaStream_t stream) +void invokeGeneralLayerNorm(T* out, + const T* input, + const T* gamma, + const T* beta, + const int m, + const int n, + cudaStream_t stream, + int opt_version) { dim3 grid(m); - dim3 block(min(n, 1024)); - - /* For general cases, n is equal to hidden_units, e.g., 512/1024. - Since we have warp shuffle inside the code, block.x % 32 should be 0. - */ - if (n % 32 != 0) - block.x = 1024; + if (n % 2 == 0 && std::is_same::value && opt_version > 0) { + int half_n = n / 2; + int half_n_32 = (half_n + 31) / 32 * 32; + dim3 block(min(half_n_32, 512)); + int rolls_per_thread = half_n / block.x; + int unroll_factor = 8; + while (unroll_factor > rolls_per_thread && unroll_factor > 1) { + unroll_factor /= 2; + } + using T2 = typename TypeConverter::Type; + if (opt_version == 1) { + if (unroll_factor == 1) { + HALF_LAYERNORM_OPT(1); + } + else if (unroll_factor == 2) { + HALF_LAYERNORM_OPT(2); + } + else if (unroll_factor == 3) { + HALF_LAYERNORM_OPT(3); + } + else if (unroll_factor == 4) { + HALF_LAYERNORM_OPT(4); + } + else if (unroll_factor == 8) { + HALF_LAYERNORM_OPT(8); + } + } + else { + if (unroll_factor == 1) { + HALF_LAYERNORM_OPT2(1); + } + else if (unroll_factor == 2) { + HALF_LAYERNORM_OPT2(2); + } + else if (unroll_factor == 3) { + HALF_LAYERNORM_OPT2(3); + } + else if (unroll_factor == 4) { + HALF_LAYERNORM_OPT2(4); + } + else if (unroll_factor == 8) { + HALF_LAYERNORM_OPT2(8); + } + } + } + else { + dim3 block(min(n, 1024)); - block.x = block.x / (4 / sizeof(T)); // if using half, only need half of block.x + /* For general cases, n is equal to hidden_units, e.g., 512/1024. + Since we have warp shuffle inside the code, block.x % 32 should be 0. + */ + if (n % 32 != 0) { + block.x = 1024; + } - /* should pay attention to the rsqrt precision*/ - generalLayerNorm<<>>(input, gamma, beta, out, m, n); // For gpt-3 + /* should pay attention to the rsqrt precision*/ + generalLayerNorm<<>>(input, gamma, beta, out, m, n); // For gpt-3 + } } +#undef HALF_LAYERNORM_OPT +#undef HALF_LAYERNORM_OPT2 + template void invokeGeneralLayerNorm(float* out, const float* input, const float* gamma, const float* beta, const int m, const int n, - cudaStream_t stream); -template void invokeGeneralLayerNorm( - half* out, const half* input, const half* gamma, const half* beta, const int m, const int n, cudaStream_t stream); + cudaStream_t stream, + int opt_version); +template void invokeGeneralLayerNorm(half* out, + const half* input, + const half* gamma, + const half* beta, + const int m, + const int n, + cudaStream_t stream, + int opt_version); +#ifdef ENABLE_BF16 +template void invokeGeneralLayerNorm(__nv_bfloat16* out, + const __nv_bfloat16* input, + const __nv_bfloat16* gamma, + const __nv_bfloat16* beta, + const int m, + const int n, + cudaStream_t stream, + int opt_version); +#endif template __global__ void generalT5LayerNorm(const T* __restrict input, const T* __restrict gamma, T* output, int m, int n) @@ -644,8 +1015,9 @@ __global__ void generalT5LayerNorm(const T* __restrict input, const T* __restric } variance = blockReduceSum(local_var_sum); - if (threadIdx.x == 0) - s_variance = rsqrtf(variance / n + 1e-6); + if (threadIdx.x == 0) { + s_variance = rsqrtf(variance / n + 1e-6f); + } __syncthreads(); for (int i = tid; i < n; i += blockDim.x) { @@ -655,16 +1027,23 @@ __global__ void generalT5LayerNorm(const T* __restrict input, const T* __restric } template -void invokeGeneralT5LayerNorm(T* out, const T* input, const T* gamma, const int m, const int n, cudaStream_t stream) +void invokeGeneralT5LayerNorm( + T* out, const T* input, const T* gamma, const T* beta, const int m, const int n, cudaStream_t stream) { + if (beta != nullptr) { + invokeGeneralLayerNorm(out, input, gamma, beta, m, n, stream); + return; + } + dim3 grid(m); dim3 block(min(n, 1024)); /* For general cases, n is equal to hidden_units, e.g., 512/1024. Since we have warp shuffle inside the code, block.x % 32 should be 0. */ - if (n % 32 != 0) + if (n % 32 != 0) { block.x = 1024; + } block.x = block.x / (4 / sizeof(T)); // if using half, only need half of block.x @@ -672,9 +1051,687 @@ void invokeGeneralT5LayerNorm(T* out, const T* input, const T* gamma, const int generalT5LayerNorm<<>>(input, gamma, out, m, n); // For gpt-3 } +template void invokeGeneralT5LayerNorm(float* out, + const float* input, + const float* gamma, + const float* beta, + const int m, + const int n, + cudaStream_t stream); template void invokeGeneralT5LayerNorm( - float* out, const float* input, const float* gamma, const int m, const int n, cudaStream_t stream); -template void invokeGeneralT5LayerNorm( - half* out, const half* input, const half* gamma, const int m, const int n, cudaStream_t stream); + half* out, const half* input, const half* gamma, const half* beta, const int m, const int n, cudaStream_t stream); + +/******************* invokeLayernormShiftPartition ***********************/ + +template +__global__ void layernorm_shift_partition(T* out, + const T* input, + const T* gamma, + const T* beta, + int batch, + int H, + int W, + int n, + int shift_size, + int window_size) +{ + int tid = threadIdx.x; + const int batch_offset = blockIdx.z * gridDim.y * gridDim.x; + const int bid = batch_offset + blockIdx.y * gridDim.x + blockIdx.x; + const int shifted_H_idx = (shift_size != 0) ? ((blockIdx.y - shift_size + gridDim.y) % gridDim.y) : blockIdx.y; + const int shifted_W_idx = (shift_size != 0) ? ((blockIdx.x - shift_size + gridDim.x) % gridDim.x) : blockIdx.x; + const int window_H_idx = shifted_H_idx / window_size; + const int window_W_idx = shifted_W_idx / window_size; + const int stride_of_window_H = W / window_size; + const int window_idx = window_H_idx * stride_of_window_H + window_W_idx; + const int idx_in_window = (shifted_H_idx % window_size) * window_size + (shifted_W_idx % window_size); + const int output_bid = batch_offset + window_idx * window_size * window_size + idx_in_window; + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + float local_out = (tid < n) ? (float)(__ldg(input + bid * n + tid)) : 0.0f; + + mean = blockReduceSum(local_out); + if (threadIdx.x == 0) { + s_mean = mean / n; + } + __syncthreads(); + + float diff = (tid < n) ? (local_out - s_mean) : 0.0f; + variance = blockReduceSum(diff * diff); + if (threadIdx.x == 0) { + s_variance = variance / n + 1e-6f; + } + __syncthreads(); + + if (tid < n) { + out[output_bid * n + tid] = + (T)(((local_out - s_mean) * rsqrtf(s_variance)) * (float)(__ldg(&gamma[tid])) + (float)(__ldg(&beta[tid]))); + } +} + +template<> +__global__ void layernorm_shift_partition(half2* out_ptr, + const half2* input_ptr, + const half2* gamma_ptr, + const half2* beta_ptr, + int batch, + int H, + int W, + int n, + int shift_size, + int window_size) +{ + const int batch_offset = blockIdx.z * gridDim.y * gridDim.x; + const int bid = batch_offset + blockIdx.y * gridDim.x + blockIdx.x; + const int shifted_H_idx = (shift_size != 0) ? ((blockIdx.y - shift_size + gridDim.y) % gridDim.y) : blockIdx.y; + const int shifted_W_idx = (shift_size != 0) ? ((blockIdx.x - shift_size + gridDim.x) % gridDim.x) : blockIdx.x; + const int window_H_idx = shifted_H_idx / window_size; + const int window_W_idx = shifted_W_idx / window_size; + const int stride_of_window_H = W / window_size; + const int window_idx = window_H_idx * stride_of_window_H + window_W_idx; + const int idx_in_window = (shifted_H_idx % window_size) * window_size + (shifted_W_idx % window_size); + const int output_bid = batch_offset + window_idx * window_size * window_size + idx_in_window; + int tid = threadIdx.x; + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + float2 local_out_fp2; + + float local_out = 0.0f; + int id = bid * n + tid; + if (tid < n) { + local_out_fp2 = __half22float2(__ldg(input_ptr + id)); + local_out += local_out_fp2.x; + local_out += local_out_fp2.y; + } + + mean = blockReduceSum(local_out); + if (threadIdx.x == 0) { + s_mean = mean / (n * 2); + } + __syncthreads(); + + if (tid < n) { + variance = (local_out_fp2.x - s_mean) * (local_out_fp2.x - s_mean); + variance += (local_out_fp2.y - s_mean) * (local_out_fp2.y - s_mean); + } + variance = blockReduceSum(variance); + if (threadIdx.x == 0) { + s_variance = rsqrtf(variance / (n * 2) + 1e-6f); + } + __syncthreads(); + + if (tid < n) { + float2 gamma_val = __half22float2(__ldg(&gamma_ptr[tid])); + float2 beta_val = __half22float2(__ldg(&beta_ptr[tid])); + local_out_fp2.x = (local_out_fp2.x - s_mean) * s_variance * gamma_val.x + beta_val.x; + local_out_fp2.y = (local_out_fp2.y - s_mean) * s_variance * gamma_val.y + beta_val.y; + out_ptr[output_bid * n + tid] = __float22half2_rn(local_out_fp2); + } +} + +template +__global__ void layernorm_shift_partition_v2(T* out, + const T* __restrict input, + const T* __restrict gamma, + const T* __restrict beta, + int batch, + int H, + int W, + int n, + int shift_size, + int window_size) +{ + const int ite = 4; + const int tid = threadIdx.x; + const int batch_offset = blockIdx.z * gridDim.y * gridDim.x; + const int bid = batch_offset + blockIdx.y * gridDim.x + blockIdx.x; + const int shifted_H_idx = (shift_size != 0) ? ((blockIdx.y - shift_size + gridDim.y) % gridDim.y) : blockIdx.y; + const int shifted_W_idx = (shift_size != 0) ? ((blockIdx.x - shift_size + gridDim.x) % gridDim.x) : blockIdx.x; + const int window_H_idx = shifted_H_idx / window_size; + const int window_W_idx = shifted_W_idx / window_size; + const int stride_of_window_H = W / window_size; + const int window_idx = window_H_idx * stride_of_window_H + window_W_idx; + const int idx_in_window = (shifted_H_idx % window_size) * window_size + (shifted_W_idx % window_size); + const int output_bid = batch_offset + window_idx * window_size * window_size + idx_in_window; + const int offset = bid * n; + const int output_offset = output_bid * n; + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + float local_out[ite]; + + float sum = 0.0f; +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = i * blockDim.x + tid; + if (col_id < n) { + local_out[i] = (float)(__ldg(input + offset + col_id)); + sum += local_out[i]; + } + } + + mean = blockReduceSum(sum); + if (tid == 0) { + s_mean = mean / n; + } + __syncthreads(); + + float var = 0.0f; +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = i * blockDim.x + tid; + if (col_id < n) { + float diff = local_out[i] - s_mean; + local_out[i] = diff; + var += diff * diff; + } + } + + variance = blockReduceSum(var); + if (tid == 0) { + s_variance = rsqrtf(variance / n + 1e-6f); + } + __syncthreads(); + +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = i * blockDim.x + tid; + if (col_id < n) { + out[output_offset + col_id] = + (T)(local_out[i] * s_variance * (float)__ldg(&gamma[col_id]) + (float)__ldg(&beta[col_id])); + } + } +} + +template<> +__global__ void layernorm_shift_partition_v2(half2* out_ptr, + const half2* __restrict input_ptr, + const half2* __restrict gamma_ptr, + const half2* __restrict beta_ptr, + int batch, + int H, + int W, + int n, + int shift_size, + int window_size) +{ + const int ite = 4; + const int tid = threadIdx.x; + const int batch_offset = blockIdx.z * gridDim.y * gridDim.x; + const int bid = batch_offset + blockIdx.y * gridDim.x + blockIdx.x; + const int shifted_H_idx = (shift_size != 0) ? ((blockIdx.y - shift_size + gridDim.y) % gridDim.y) : blockIdx.y; + const int shifted_W_idx = (shift_size != 0) ? ((blockIdx.x - shift_size + gridDim.x) % gridDim.x) : blockIdx.x; + const int window_H_idx = shifted_H_idx / window_size; + const int window_W_idx = shifted_W_idx / window_size; + const int stride_of_window_H = W / window_size; + const int window_idx = window_H_idx * stride_of_window_H + window_W_idx; + const int idx_in_window = (shifted_H_idx % window_size) * window_size + (shifted_W_idx % window_size); + const int output_bid = batch_offset + window_idx * window_size * window_size + idx_in_window; + const int offset = bid * n; + const int output_offset = output_bid * n; + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + half2 local_out_half2[ite]; + const half2 zero = {static_cast(0.0f), static_cast(0.0f)}; + + // float sum = 0.0f; + half2 sum = __float2half2_rn(0.0f); +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = i * blockDim.x + tid; + if (col_id < n) { + local_out_half2[i] = __ldg(input_ptr + offset + col_id); + sum += local_out_half2[i]; + } + } + + mean = blockReduceSum((float)(sum.x + sum.y)); + if (threadIdx.x == 0) { + s_mean = mean / (n * 2); + } + __syncthreads(); + + float var = 0.0f; + half2 s_mean_2 = __float2half2_rn(s_mean); +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = i * blockDim.x + tid; + if (col_id < n) { + local_out_half2[i] = local_out_half2[i] - s_mean_2; + float v1 = (float)local_out_half2[i].x; + float v2 = (float)local_out_half2[i].y; + var += v1 * v1 + v2 * v2; + } + } + + variance = blockReduceSum(var); + if (threadIdx.x == 0) { + s_variance = rsqrtf(variance / (n * 2) + 1e-6f); + } + __syncthreads(); + + half2 s_var_2 = __float2half2_rn(s_variance); +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = i * blockDim.x + tid; + if (col_id < n) { + out_ptr[output_offset + col_id] = + local_out_half2[i] * s_var_2 * __ldg(&gamma_ptr[col_id]) + __ldg(&beta_ptr[col_id]); + } + } +} + +template +void invokeLayernormShiftPartition(T* out, + const T* input, + const T* gamma, + const T* beta, + int batch, + int H, + int W, + int n, + int shift_size, + int window_size, + cudaStream_t stream) +{ + dim3 grid(W, H, batch); + int blockSize = (n + 31) / 32 * 32; + if (blockSize >= 768) { + blockSize = ((blockSize / 4) + 31) / 32 * 32; + layernorm_shift_partition_v2 + <<>>(out, input, gamma, beta, batch, H, W, n, shift_size, window_size); + } + else { + layernorm_shift_partition + <<>>(out, input, gamma, beta, batch, H, W, n, shift_size, window_size); + } +} + +template<> +void invokeLayernormShiftPartition(half* out, + const half* input, + const half* gamma, + const half* beta, + int batch, + int H, + int W, + int n, + int shift_size, + int window_size, + cudaStream_t stream) +{ + dim3 grid(W, H, batch); + int blockSize = n / 2; + blockSize = (blockSize + 31) / 32 * 32; + + if ((batch * H * W >= 512 && blockSize >= 768) || blockSize > 1024) { + blockSize = ((blockSize / 4) + 31) / 32 * 32; + layernorm_shift_partition_v2<<>>((half2*)out, + (const half2*)input, + (const half2*)gamma, + (const half2*)beta, + batch, + H, + W, + n / 2, + shift_size, + window_size); + } + else { + layernorm_shift_partition<<>>((half2*)out, + (const half2*)input, + (const half2*)gamma, + (const half2*)beta, + batch, + H, + W, + n / 2, + shift_size, + window_size); + } +} + +template void invokeLayernormShiftPartition(float* out, + const float* input, + const float* gamma, + const float* beta, + int batch, + int H, + int W, + int n, + int shift_size, + int window_size, + cudaStream_t stream); + +template void invokeLayernormShiftPartition(half* out, + const half* input, + const half* gamma, + const half* beta, + int batch, + int H, + int W, + int n, + int shift_size, + int window_size, + cudaStream_t stream); + +/******************* invokeAddBiasLayernorm ***********************/ + +template +__global__ void add_bias_layernorm(T* out, const T* bias, const T* gamma, const T* beta, int n) +{ + int tid = threadIdx.x; + const int bid = blockIdx.x; + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + + float local_out = (tid < n) ? (float)(out[bid * n + tid] + ldg(&bias[tid])) : 0.0f; + + mean = blockReduceSum(local_out); + if (threadIdx.x == 0) { + s_mean = mean / n; + } + __syncthreads(); + + float diff = (tid < n) ? (local_out - s_mean) : 0.0f; + variance = blockReduceSum(diff * diff); + if (threadIdx.x == 0) { + s_variance = variance / n + 1e-6f; + } + __syncthreads(); + + if (tid < n) { + out[bid * n + tid] = + (T)(((local_out - s_mean) * rsqrtf(s_variance)) * (float)(ldg(&gamma[tid])) + (float)(ldg(&beta[tid]))); + } +} + +template +__global__ void +add_bias_layernorm_v2(T* out, const T* __restrict bias, const T* __restrict gamma, const T* __restrict beta, int n) +{ + const int ite = 4; + const int tid = threadIdx.x; + const int bid = blockIdx.x; + const int offset = bid * n; + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + float local_out[ite]; + + float sum = 0.0f; +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = i * blockDim.x + tid; + local_out[i] = (col_id < n) ? (float)(out[offset + col_id] + ldg(&bias[col_id])) : 0.0f; + sum += local_out[i]; + } + + mean = blockReduceSum(sum); + if (tid == 0) { + s_mean = mean / n; + } + __syncthreads(); + + float var = 0.0f; +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = i * blockDim.x + tid; + float diff = (col_id < n) ? (local_out[i] - s_mean) : 0.0f; + var += diff * diff; + } + + variance = blockReduceSum(var); + if (tid == 0) { + s_variance = rsqrtf(variance / n + 1e-6f); + } + __syncthreads(); + +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = i * blockDim.x + tid; + if (col_id < n) { + out[offset + col_id] = + (T)((local_out[i] - s_mean) * s_variance * (float)ldg(&gamma[col_id]) + (float)ldg(&beta[col_id])); + } + } +} + +#define HALF_LAYERNORM_OPT(UNROLL_FACTOR) \ + generalAddBiasResidualLayerNormOpt<<>>( \ + (T2*)out, (T2*)out, (const T2*)bias, (const T2*)out, (const T2*)gamma, (const T2*)beta, m, half_n); + +#define HALF_LAYERNORM_OPT2(UNROLL_FACTOR) \ + generalAddBiasResidualLayerNormOpt2<<>>( \ + (T2*)out, (T2*)out, (const T2*)bias, (const T2*)out, (const T2*)gamma, (const T2*)beta, m, half_n); + +template +void invokeAddBiasLayernorm( + T* out, const T* bias, const T* gamma, const T* beta, int m, int n, cudaStream_t stream, int opt_version) +{ + dim3 grid(m); + if (n % 2 == 0 && std::is_same::value && opt_version > 0) { + int half_n = n / 2; + int half_n_32 = (half_n + 31) / 32 * 32; + dim3 block(min(half_n_32, 512)); + int rolls_per_thread = half_n / block.x; + int unroll_factor = 8; + while (unroll_factor > rolls_per_thread && unroll_factor > 1) { + unroll_factor /= 2; + } + using T2 = typename TypeConverter::Type; + if (opt_version == 1) { + if (unroll_factor == 1) { + HALF_LAYERNORM_OPT(1); + } + else if (unroll_factor == 2) { + HALF_LAYERNORM_OPT(2); + } + else if (unroll_factor == 3) { + HALF_LAYERNORM_OPT(3); + } + else if (unroll_factor == 4) { + HALF_LAYERNORM_OPT(4); + } + else if (unroll_factor == 8) { + HALF_LAYERNORM_OPT(8); + } + } + else { + if (unroll_factor == 1) { + HALF_LAYERNORM_OPT2(1); + } + else if (unroll_factor == 2) { + HALF_LAYERNORM_OPT2(2); + } + else if (unroll_factor == 3) { + HALF_LAYERNORM_OPT2(3); + } + else if (unroll_factor == 4) { + HALF_LAYERNORM_OPT2(4); + } + else if (unroll_factor == 8) { + HALF_LAYERNORM_OPT2(8); + } + } + } + else { + int blockSize = (n + 31) / 32 * 32; + if (blockSize >= 768) { + blockSize = ((blockSize / 4) + 31) / 32 * 32; + add_bias_layernorm_v2<<>>(out, bias, gamma, beta, n); + } + else { + add_bias_layernorm<<>>(out, bias, gamma, beta, n); + } + } +} + +#undef HALF_LAYERNORM_OPT +#undef HALF_LAYERNORM_OPT2 + +template void invokeAddBiasLayernorm(float* out, + const float* bias, + const float* gamma, + const float* beta, + int m, + int n, + cudaStream_t stream, + int opt_version); + +template void invokeAddBiasLayernorm(half* out, + const half* bias, + const half* gamma, + const half* beta, + int m, + int n, + cudaStream_t stream, + int opt_version); +#ifdef ENABLE_BF16 +template void invokeAddBiasLayernorm<__nv_bfloat16>(__nv_bfloat16* out, + const __nv_bfloat16* bias, + const __nv_bfloat16* gamma, + const __nv_bfloat16* beta, + int m, + int n, + cudaStream_t stream, + int opt_version); +#endif + +/******************* invokeMergeLayernorm ***********************/ + +// input is [batch, 2*H, 2*W, n/4] +// output is [batch, H, W, n] +// grid (W, H, batch) +// block (n) +template +__global__ void merge_layernorm_v2(T* out, + const T* __restrict input, + const T* __restrict gamma, + const T* __restrict beta, + int batch, + int H, + int W, + int n) +{ + const int ite = 4; + const int tid = threadIdx.x; + const int W_idx = blockIdx.x; + const int H_idx = blockIdx.y; + const size_t batch_offset = blockIdx.z * H * W * n; + const int input_H_stride = W * n / 2; + const int output_H_stride = W * n; + const int n_4 = n >> 2; + + __shared__ float s_mean; + __shared__ float s_variance; + float mean = 0.0f; + float variance = 0.0f; + float local_out[ite]; + + float sum = 0.0f; +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = i * blockDim.x + tid; + if (col_id < n) { + int part_id = col_id / n_4; + int offset_in_W = part_id / 2; + int offset_in_H = part_id % 2; + size_t input_id = batch_offset + (2 * H_idx + offset_in_H) * input_H_stride + + (2 * W_idx + offset_in_W) * n_4 + (col_id % n_4); + local_out[i] = (float)(__ldg(input + input_id)); + sum += local_out[i]; + } + } + + mean = blockReduceSum(sum); + if (tid == 0) { + s_mean = mean / n; + } + __syncthreads(); + + float var = 0.0f; +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = i * blockDim.x + tid; + if (col_id < n) { + local_out[i] = local_out[i] - s_mean; + var += local_out[i] * local_out[i]; + } + } + + variance = blockReduceSum(var); + if (tid == 0) { + s_variance = rsqrtf(variance / n + 1e-6f); + } + __syncthreads(); + +#pragma unroll + for (int i = 0; i < ite; i++) { + int col_id = i * blockDim.x + tid; + if (col_id < n) { + size_t output_idx = batch_offset + H_idx * output_H_stride + W_idx * n + col_id; + out[output_idx] = + (T)(local_out[i] * s_variance * (float)__ldg(&gamma[col_id]) + (float)__ldg(&beta[col_id])); + } + } +} + +// TODO : accelerate with half2 +template +void invokeMergeLayernorm( + T* output, const T* input, const T* gamma, const T* beta, int batch, int H, int W, int n, cudaStream_t stream) +{ + if ((W % 2 != 0) || (H % 2 != 0)) { + printf("[ERROR][invokeMergeLayernorm] H(W) should be a multiple of 2.\n"); + return; + } + dim3 grid(W / 2, H / 2, batch); + int blockSize = 4 * n; + blockSize = (blockSize + 31) / 32 * 32; + // TODO + // if (blockSize >= 768) + { + blockSize = ((blockSize / 4) + 31) / 32 * 32; + merge_layernorm_v2<<>>(output, input, gamma, beta, batch, H / 2, W / 2, n * 4); + } + /* + else + merge_layernorm<<>>(output, input, gamma, beta, batch, H/2, W/2, n*4); + */ +} + +template void invokeMergeLayernorm(float* output, + const float* input, + const float* gamma, + const float* beta, + int batch, + int H, + int W, + int n, + cudaStream_t stream); + +template void invokeMergeLayernorm(half* output, + const half* input, + const half* gamma, + const half* beta, + int batch, + int H, + int W, + int n, + cudaStream_t stream); } // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/layernorm_kernels.h b/src/fastertransformer/kernels/layernorm_kernels.h index a99621462..e8319debd 100644 --- a/src/fastertransformer/kernels/layernorm_kernels.h +++ b/src/fastertransformer/kernels/layernorm_kernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,14 +16,14 @@ #pragma once +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" #include #include #include namespace fastertransformer { -enum LayerNormType -{ +enum LayerNormType { pre_layernorm, post_layernorm }; @@ -53,17 +53,57 @@ void invokeGeneralAddBiasResidualPreLayerNorm(T* output, const T* bias, int m, int n, - cudaStream_t stream); + cudaStream_t stream, + int opt_version = 2); template -void invokeGeneralLayerNorm( - T* out, const T* input, const T* gamma, const T* beta, const int m, const int n, cudaStream_t stream); +void invokeGeneralLayerNorm(T* out, + const T* input, + const T* gamma, + const T* beta, + const int m, + const int n, + cudaStream_t stream, + int opt_version = 2); template -void invokeGeneralT5LayerNorm(T* out, const T* input, const T* gamma, const int m, const int n, cudaStream_t stream); +void invokeGeneralT5LayerNorm( + T* out, const T* input, const T* gamma, const T* beta, const int m, const int n, cudaStream_t stream); template void invokeGeneralAddResidualT5PreLayerNorm( T* output, T* norm_output, const T* input, const T* gamma, int m, int n, cudaStream_t stream); +template +void invokeGeneralAddBiasResidualT5PreLayerNorm(T* output, + T* norm_output, + const T* input, + const T* gamma, + const T* beta, + const T* bias, + int m, + int n, + cudaStream_t stream); + +template +void invokeLayernormShiftPartition(T* out, + const T* input, + const T* gamma, + const T* beta, + int batch, + int H, + int W, + int n, + int shift_size, + int window_size, + cudaStream_t stream); + +template +void invokeAddBiasLayernorm( + T* out, const T* bias, const T* gamma, const T* beta, int m, int n, cudaStream_t stream, int opt_version = 2); + +template +void invokeMergeLayernorm( + T* output, const T* input, const T* gamma, const T* beta, int batch, int H, int W, int n, cudaStream_t stream); + } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/layout_transformer_int8_kernels.cu b/src/fastertransformer/kernels/layout_transformer_int8_kernels.cu index cedfe49c4..ab8905ea7 100644 --- a/src/fastertransformer/kernels/layout_transformer_int8_kernels.cu +++ b/src/fastertransformer/kernels/layout_transformer_int8_kernels.cu @@ -18,181 +18,225 @@ namespace fastertransformer { -//transpose matrix & transform COL32 to col-major -//input matrix is (m n) COL32 -//output matrix is (n m) col-major -//grid((n+31)/32, (m+31)/32) -//block(32, 32) +// transpose matrix & transform COL32 to col-major +// input matrix is (m n) COL32 +// output matrix is (n m) col-major +// grid((n+31)/32, (m+31)/32) +// block(32, 32) template -__global__ -void transposeMatrix_COL32ToColMajor_kernel(T*dst, const T* src, const int m, const int n) +__global__ void transposeMatrix_COL32ToColMajor_kernel(T* dst, const T* src, const int m, const int n) { - int x = blockIdx.x*blockDim.x + threadIdx.x; - int y = blockIdx.y*blockDim.y + threadIdx.y; + int x = blockIdx.x * blockDim.x + threadIdx.x; + int y = blockIdx.y * blockDim.y + threadIdx.y; - bool check = ((x < n) && (y < m)); - // COL32_col = x >> 5 ; COL32_row = (y << 5) + (x & 31); - // COL32_idx = (COL32_col << 5) * m + COL32_row = (x & 0xffffffe0)*m + (y << 5) + (x & 31) - if (check) - dst[y*n+x] = __ldg(src+((x & 0xffffffe0)*m + (y << 5) + (x & 31))); + bool check = ((x < n) && (y < m)); + // COL32_col = x >> 5 ; COL32_row = (y << 5) + (x & 31); + // COL32_idx = (COL32_col << 5) * m + COL32_row = (x & 0xffffffe0)*m + (y << 5) + (x & 31) + if (check) { + dst[y * n + x] = __ldg(src + ((x & 0xffffffe0) * m + (y << 5) + (x & 31))); + } } -//transpose matrix & transform COL32 to col-major -//input matrix is (m n) COL32 -//output matrix is (n m) col-major -//grid((n+31)/32, (m+31)/32) -//block(16, 32) +// transpose matrix & transform COL32 to col-major +// input matrix is (m n) COL32 +// output matrix is (n m) col-major +// grid((n+31)/32, (m+31)/32) +// block(16, 32) template<> -__global__ -void transposeMatrix_COL32ToColMajor_kernel(half2*dst, const half2* src, const int m, const int n) +__global__ void transposeMatrix_COL32ToColMajor_kernel(half2* dst, const half2* src, const int m, const int n) { - int x = (blockIdx.x*blockDim.x + threadIdx.x) << 1; - int y = blockIdx.y*blockDim.y + threadIdx.y; + int x = (blockIdx.x * blockDim.x + threadIdx.x) << 1; + int y = blockIdx.y * blockDim.y + threadIdx.y; - bool check = ((x < n) && (y < m)); - // COL32_col = x >> 5 ; COL32_row = (y << 5) + (x & 31); - // COL32_idx = (COL32_col << 5) * m + COL32_row = (x & 0xffffffe0)*m + (y << 5) + (x & 31) - if (check) - dst[(y*n+x) >> 1] = __ldg(src+(((x & 0xffffffe0)*m + (y << 5) + (x & 31)) >> 1)); + bool check = ((x < n) && (y < m)); + // COL32_col = x >> 5 ; COL32_row = (y << 5) + (x & 31); + // COL32_idx = (COL32_col << 5) * m + COL32_row = (x & 0xffffffe0)*m + (y << 5) + (x & 31) + if (check) { + dst[(y * n + x) >> 1] = __ldg(src + (((x & 0xffffffe0) * m + (y << 5) + (x & 31)) >> 1)); + } } -//transpose matrix & transform COL32 to col-major -//input matrix is (m n) COL32 -//output matrix is (n m) col-major -template +// transpose matrix & transform COL32 to col-major +// input matrix is (m n) COL32 +// output matrix is (n m) col-major +template void invokeTransposeMatrixCOL32ToColMajor(T* dst, const T* src, const int m, const int n, cudaStream_t stream) { - assert(n%32 == 0); - if (sizeof(T) == sizeof(float)) - transposeMatrix_COL32ToColMajor_kernel<<>>(dst, src, m, n); - else if (sizeof(T) == sizeof(half)) - transposeMatrix_COL32ToColMajor_kernel<<>>((half2*)dst, (const half2*)src, m, n); + assert(n % 32 == 0); + if (sizeof(T) == sizeof(half)) { + transposeMatrix_COL32ToColMajor_kernel<<>>( + (half2*)dst, (const half2*)src, m, n); + } + else { + transposeMatrix_COL32ToColMajor_kernel + <<>>(dst, src, m, n); + } } +template void invokeTransposeMatrixCOL32ToColMajor( + float* dst, const float* src, const int m, const int n, cudaStream_t stream); -template void invokeTransposeMatrixCOL32ToColMajor(float* dst, const float* src, const int m, const int n, cudaStream_t stream); - -template void invokeTransposeMatrixCOL32ToColMajor(half *dst, const half* src, const int m, const int n, cudaStream_t stream); +template void +invokeTransposeMatrixCOL32ToColMajor(half* dst, const half* src, const int m, const int n, cudaStream_t stream); -template void invokeTransposeMatrixCOL32ToColMajor(int8_t* dst, const int8_t* src, const int m, const int n, cudaStream_t stream); +template void invokeTransposeMatrixCOL32ToColMajor( + int8_t* dst, const int8_t* src, const int m, const int n, cudaStream_t stream); -//transpose matrix & transfrom col-major to COL32 -//input matrix is (m, n) col-major -//output matrix is (n, m) COL32 -//m should be a mutiple of 32 -//grid((m+31)/32, (n+31)/32) -//block(32, 32) +// transpose matrix & transfrom col-major to COL32 +// input matrix is (m, n) col-major +// output matrix is (n, m) COL32 +// m should be a mutiple of 32 +// grid((m+31)/32, (n+31)/32) +// block(32, 32) template -__global__ -void transposeMatrix_colMajorToCOL32_kernel(T*dst, const T* src, const int m, const int n) +__global__ void transposeMatrix_colMajorToCOL32_kernel(T* dst, const T* src, const int m, const int n) { - int x = blockIdx.x*blockDim.x + threadIdx.x; - int y = blockIdx.y*blockDim.y + threadIdx.y; - - bool check = ((x < m) && (y < n)); - if (check) - { - - // COL32_col = x >> 5 ; COL32_row = (y << 5) + (x & 31); - // COL32_idx = (COL32_col << 5) * n + COL32_row = (x & 0xffffffe0)*n + (y << 5) + (x & 31) - dst[(x & 0xffffffe0) * n + (y << 5) + (x & 31)] = __ldg(src+y*m+x); - } + int x = blockIdx.x * blockDim.x + threadIdx.x; + int y = blockIdx.y * blockDim.y + threadIdx.y; + + bool check = ((x < m) && (y < n)); + if (check) { + + // COL32_col = x >> 5 ; COL32_row = (y << 5) + (x & 31); + // COL32_idx = (COL32_col << 5) * n + COL32_row = (x & 0xffffffe0)*n + (y << 5) + (x & 31) + dst[(x & 0xffffffe0) * n + (y << 5) + (x & 31)] = __ldg(src + y * m + x); + } } -//transpose matrix & transfrom col-major to COL32 -//input matrix is (m, n) col-major -//output matrix is (n, m) COL32 -//m should be a mutiple of 32 -//grid((m+31)/32, (n+31)/32) -//block(16, 32) +// transpose matrix & transfrom col-major to COL32 +// input matrix is (m, n) col-major +// output matrix is (n, m) COL32 +// m should be a mutiple of 32 +// grid((m+31)/32, (n+31)/32) +// block(16, 32) template<> -__global__ -void transposeMatrix_colMajorToCOL32_kernel(half2*dst, const half2* src, const int m, const int n) +__global__ void transposeMatrix_colMajorToCOL32_kernel(half2* dst, const half2* src, const int m, const int n) { - int x = (blockIdx.x*blockDim.x + threadIdx.x) << 1; - int y = blockIdx.y*blockDim.y + threadIdx.y; - - bool check = ((x < m) && (y < n)); - if (check) - { - - // COL32_col = x >> 5 ; COL32_row = (y << 5) + (x & 31); - // COL32_idx = (COL32_col << 5) * n + COL32_row = (x & 0xffffffe0)*n + (y << 5) + (x & 31) - dst[((x & 0xffffffe0) * n + (y << 5) + (x & 31)) >> 1] = __ldg(src+((y*m+x) >> 1)); - } + int x = (blockIdx.x * blockDim.x + threadIdx.x) << 1; + int y = blockIdx.y * blockDim.y + threadIdx.y; + + bool check = ((x < m) && (y < n)); + if (check) { + + // COL32_col = x >> 5 ; COL32_row = (y << 5) + (x & 31); + // COL32_idx = (COL32_col << 5) * n + COL32_row = (x & 0xffffffe0)*n + (y << 5) + (x & 31) + dst[((x & 0xffffffe0) * n + (y << 5) + (x & 31)) >> 1] = __ldg(src + ((y * m + x) >> 1)); + } } -//transpose matrix & transfrom col-major to COL32 -//input matrix is (m, n) col-major -//output matrix is (n, m) COL32, using char4 to write out -//m should be a mutiple of 32 -//grid((m+31)/32, (n+31)/32) -//block(8, 32) -template +// transpose matrix & transfrom col-major to COL32 +// input matrix is (m, n) col-major +// output matrix is (n, m) COL32, using char4 to write out +// m should be a mutiple of 32 +// grid((m+31)/32, (n+31)/32) +// block(8, 32) +template void invokeTransposeMatrixColMajorToCOL32(T* dst, const T* src, const int m, const int n, cudaStream_t stream) { - assert(m%32 == 0); - if (sizeof(T) == sizeof(float)) - transposeMatrix_colMajorToCOL32_kernel<<>>(dst, src, m, n); - else if (sizeof(T) == sizeof(half)) - transposeMatrix_colMajorToCOL32_kernel<<>>((half2*)dst, (const half2*)src, m, n); + assert(m % 32 == 0); + if (sizeof(T) == sizeof(float)) { + transposeMatrix_colMajorToCOL32_kernel + <<>>(dst, src, m, n); + } + else if (sizeof(T) == sizeof(half)) { + transposeMatrix_colMajorToCOL32_kernel<<>>( + (half2*)dst, (const half2*)src, m, n); + } } -template void invokeTransposeMatrixColMajorToCOL32(float* dst, const float* src, const int m, const int n, cudaStream_t stream); +template void invokeTransposeMatrixColMajorToCOL32( + float* dst, const float* src, const int m, const int n, cudaStream_t stream); -template void invokeTransposeMatrixColMajorToCOL32(half *dst, const half* src, const int m, const int n, cudaStream_t stream); +template void +invokeTransposeMatrixColMajorToCOL32(half* dst, const half* src, const int m, const int n, cudaStream_t stream); -//transpose matrix & transfrom col-major to COL32 & quantize -//input matrix is (m, n) col-major -//output matrix is (n, m) COL32, using char4 to write out -//m should be a mutiple of 32 -//grid((m+31)/32, (n+31)/32) -//block(8, 32) +// transpose matrix & transfrom col-major to COL32 & quantize +// input matrix is (m, n) col-major +// output matrix is (n, m) COL32, using char4 to write out +// m should be a mutiple of 32 +// grid((m+31)/32, (n+31)/32) +// block(8, 32) template -__global__ -void transposeMatrix_colMajorToCOL32_quantize_kernel(char4*dst, const T* src, const int m, const int n, const float* scale_ptr) +__global__ void transposeMatrix_colMajorToCOL32_quantize_kernel( + char4* dst, const T* src, const int m, const int n, const float* scale_ptr) { - const float scale = __ldg(scale_ptr); - - int x = (blockIdx.x*blockDim.x + threadIdx.x) << 2; - int y = blockIdx.y*blockDim.y + threadIdx.y; - - bool check = ((x < m) && (y < n)); - if (check) - { - char4 tmp4; - tmp4.x = float_to_int8_rn(static_cast(__ldg(src+y*m+x))*scale); - tmp4.y = float_to_int8_rn(static_cast(__ldg(src+y*m+x+1))*scale); - tmp4.z = float_to_int8_rn(static_cast(__ldg(src+y*m+x+2))*scale); - tmp4.w = float_to_int8_rn(static_cast(__ldg(src+y*m+x+3))*scale); - - // COL32_col = x >> 5 ; COL32_row = (y << 5) + (x & 31); - // COL32_idx = (COL32_col << 5) * n + COL32_row = (x & 0xffffffe0)*n + (y << 5) + (x & 31) - - dst[((x & 0xffffffe0) * n + (y << 5) + (x & 31)) >> 2] = tmp4; - } + const float scale = __ldg(scale_ptr); + + int x = (blockIdx.x * blockDim.x + threadIdx.x) << 2; + int y = blockIdx.y * blockDim.y + threadIdx.y; + + bool check = ((x < m) && (y < n)); + if (check) { + char4 tmp4; + tmp4.x = float_to_int8_rn(static_cast(__ldg(src + y * m + x)) * scale); + tmp4.y = float_to_int8_rn(static_cast(__ldg(src + y * m + x + 1)) * scale); + tmp4.z = float_to_int8_rn(static_cast(__ldg(src + y * m + x + 2)) * scale); + tmp4.w = float_to_int8_rn(static_cast(__ldg(src + y * m + x + 3)) * scale); + + // COL32_col = x >> 5 ; COL32_row = (y << 5) + (x & 31); + // COL32_idx = (COL32_col << 5) * n + COL32_row = (x & 0xffffffe0)*n + (y << 5) + (x & 31) + + dst[((x & 0xffffffe0) * n + (y << 5) + (x & 31)) >> 2] = tmp4; + } } -//transpose matrix & transfrom col-major to COL32 & quantize -//input matrix is (m, n) col-major -//output matrix is (n, m) COL32, using char4 to write out -//m should be a mutiple of 32 -//grid((m+31)/32, (n+31)/32) -//block(8, 32) -template -void invokeTransposeMatrixColMajorToCOL32Quantize(int8_t* dst, const T* src, const int m, const int n, const float* scale_ptr, cudaStream_t stream) +// transpose matrix & transfrom col-major to COL32 & quantize +// input matrix is (m, n) col-major +// output matrix is (n, m) COL32, using char4 to write out +// m should be a mutiple of 32 +// grid((m+31)/32, (n+31)/32) +// block(8, 32) +template +void invokeTransposeMatrixColMajorToCOL32Quantize( + int8_t* dst, const T* src, const int m, const int n, const float* scale_ptr, cudaStream_t stream) { - assert(m%32 == 0); - transposeMatrix_colMajorToCOL32_quantize_kernel<<>>((char4 *)dst, src, m, n, scale_ptr); + assert(m % 32 == 0); + transposeMatrix_colMajorToCOL32_quantize_kernel + <<>>((char4*)dst, src, m, n, scale_ptr); } -template void invokeTransposeMatrixColMajorToCOL32Quantize(int8_t* dst, const float* src, const int m, const int n, const float* scale_ptr, cudaStream_t stream); +template void invokeTransposeMatrixColMajorToCOL32Quantize( + int8_t* dst, const float* src, const int m, const int n, const float* scale_ptr, cudaStream_t stream); + +template void invokeTransposeMatrixColMajorToCOL32Quantize( + int8_t* dst, const half* src, const int m, const int n, const float* scale_ptr, cudaStream_t stream); + +// transfrom row-major to COL32 +// input matrix is (m, n) row-major +// output matrix is (m, n) COL32 +// n should be a mutiple of 32 +// grid((n+31)/32, (m+31)/32) +// block(8, 32) +__global__ void rowMajorToCOL32_kernel(char4* dst, const char4* src, const int m, const int n) +{ + + int n_id = (blockIdx.x * blockDim.x + threadIdx.x) << 2; + int m_id = blockIdx.y * blockDim.y + threadIdx.y; + + bool check = ((m_id < m) && (n_id < n)); + if (check) { -template void invokeTransposeMatrixColMajorToCOL32Quantize(int8_t *dst, const half* src, const int m, const int n, const float* scale_ptr, cudaStream_t stream); + // COL32_col = n_id >> 5 ; COL32_row = (m_id << 5) + (n_id & 31); + // COL32_idx = (COL32_col << 5) * m + COL32_row = (n_id & 0xffffffe0)*m + (m_id << 5) + (n_id & 31) + dst[((n_id & 0xffffffe0) * m + (m_id << 5) + (n_id & 31)) >> 2] = __ldg(src + ((m_id * n + n_id) >> 2)); + } +} +// transfrom row-major to COL32 +// input matrix is (m, n) row-major +// output matrix is (m, n) COL32 +// n should be a mutiple of 32 +// grid((n+31)/32, (m+31)/32) +// block(8, 32) +void invokeRowMajorToCOL32(int8_t* dst, const int8_t* src, const int m, const int n, cudaStream_t stream) +{ + assert(n % 32 == 0); + rowMajorToCOL32_kernel<<>>( + (char4*)dst, (const char4*)src, m, n); +} } // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/layout_transformer_int8_kernels.h b/src/fastertransformer/kernels/layout_transformer_int8_kernels.h index 65abbdebb..0f11ca6eb 100644 --- a/src/fastertransformer/kernels/layout_transformer_int8_kernels.h +++ b/src/fastertransformer/kernels/layout_transformer_int8_kernels.h @@ -16,20 +16,22 @@ #pragma once +#include "int8_utils.cuh" #include #include #include -#include "int8_utils.cuh" namespace fastertransformer { -template +template void invokeTransposeMatrixCOL32ToColMajor(T* dst, const T* src, const int m, const int n, cudaStream_t stream); -template +template void invokeTransposeMatrixColMajorToCOL32(T* dst, const T* src, const int m, const int n, cudaStream_t stream); -template -void invokeTransposeMatrixColMajorToCOL32Quantize(int8_t* dst, const T* src, const int m, const int n, const float* scale_ptr, cudaStream_t stream); +template +void invokeTransposeMatrixColMajorToCOL32Quantize( + int8_t* dst, const T* src, const int m, const int n, const float* scale_ptr, cudaStream_t stream); +void invokeRowMajorToCOL32(int8_t* dst, const int8_t* src, const int m, const int n, cudaStream_t stream); } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/logprob_kernels.cu b/src/fastertransformer/kernels/logprob_kernels.cu new file mode 100644 index 000000000..5d4938766 --- /dev/null +++ b/src/fastertransformer/kernels/logprob_kernels.cu @@ -0,0 +1,207 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include + +#ifndef CUDART_VERSION +#error CUDART_VERSION Undefined! +#elif (CUDART_VERSION >= 11050) +#include +#else +#include "3rdparty/cub/cub.cuh" +#endif + +#include "src/fastertransformer/kernels/logprob_kernels.h" +#include "src/fastertransformer/kernels/reduce_kernel_utils.cuh" +#include "src/fastertransformer/utils/logger.h" + +namespace fastertransformer { + +template +__global__ void log_probs_kernel(float* log_probs, + const T* logits, + const int* ids, + const int* lengths, + const size_t max_input_length, + const size_t batch_size, + const size_t vocab_size, + const size_t vocab_size_padded, + bool batch_first) +{ + // Calculate the log probability from logits. + // log_probs[i,j] = log(softmax(logits))[ids[i,j]] + // + // log_probs: [max_length, batch_size] or [batch_size, max_length], + // log probabilities of each token. + // logits: [max_length, batch_size, vocab_size_padded] or [batch_size, max_length, vocab_size_padded] + // lengths: [batch_size], sequence lengths + // ids: [max_length, batch_size], token ids. + // batch_size: [1], batch_size. in case of beam > 1, batch x beam. + // vocab_size: [1], vocab_size, + // vocab_size: [1], vocab_size_padded, padded vocab size. + + const bool IS_FP16 = std::is_same::value; + const T MAX_T_VAL = (IS_FP16) ? HALF_FLT_MAX : FLT_MAX; + + int tidx = threadIdx.x; // vocab dim + int bidx = batch_first ? blockIdx.x : blockIdx.y; // batch dim + int step = batch_first ? blockIdx.y : blockIdx.x; // step dim + + __shared__ float s_max_logit; + + if (bidx < batch_size && step < lengths[bidx]) { + // reposition logits to data for the current batch. + int step_offset = batch_first ? step * vocab_size_padded : step * batch_size * vocab_size_padded; + int batch_offset = batch_first ? bidx * max_input_length * vocab_size_padded : bidx * vocab_size_padded; + logits += step_offset + batch_offset; + + // Find max(logits). + float local_max = -MAX_T_VAL; + float val = -MAX_T_VAL; + for (int i = tidx; i < vocab_size; i += blockDim.x) { + val = static_cast(logits[i]); + local_max = fmax(local_max, val); + } + + float max_val = blockDim.x <= 32 ? warpReduceMax(local_max) : blockReduceMax(local_max); + if (tidx == 0) { + s_max_logit = max_val; + } + __syncthreads(); + + // Calculate the denominator: sum_i exp(logits[i]) + float local_sum_exp = 0.0f; + for (int i = tidx; i < vocab_size; i += blockDim.x) { + val = __expf(static_cast(logits[i]) - s_max_logit); + local_sum_exp += val; + } + + float sum_exp = blockDim.x <= 32 ? warpReduceSum(local_sum_exp) : blockReduceSum(local_sum_exp); + if (tidx == 0) { + int idx = batch_first ? step + bidx * max_input_length : step * batch_size + bidx; + log_probs[idx] = static_cast(logits[ids[idx]]) - s_max_logit - __logf(sum_exp + 1e-9f); + } + } +} + +__global__ void accumulate_log_probs(float* cum_log_probs, + const float* log_probs, + const int* lengths, + const size_t max_input_length, + const size_t batch_size, + const bool batch_first) +{ + // Accumulate the log probability along with the sequence dimension. + // cum_log_probs[j] = sum_i log(softmax(logits))[ids[i,j]] + // + // cum_log_probs: [batch_size], cumulative log probability + // log_probs: [max_length, batch_size] or [batch_size, max_length], log probability of each token + // lengths: [batch_size], sequence lengths + // batch_size: [1], batch_size. in case of beam > 1, batch x beam. + + int bidx = blockIdx.x; // batch dim + int tidx = threadIdx.x; // step dim + + if (bidx < batch_size) { + int length = lengths[bidx]; + // reposition logits to data for the current batch. + log_probs += batch_first ? bidx * max_input_length : bidx; + int stride = batch_first ? 1 : batch_size; // stride along with seq dim. + float local_accum = 0.0f; + for (int step = tidx; step < length; step += blockDim.x) { + local_accum += static_cast(log_probs[step * stride]); + } + float accum = blockDim.x <= 32 ? warpReduceSum(local_accum) : blockReduceSum(local_accum); + if (tidx == 0) { + cum_log_probs[bidx] = accum; + } + } +} + +template +void invokeLogProbFromLogits(float* cum_log_probs, + const T* logits, + const int* input_ids, + const int* input_lengths, + const size_t max_input_length, + const size_t batch_size, + const size_t vocab_size, + const size_t vocab_size_padded, + void* workspace, + const size_t workspace_size, + cudaStream_t stream, + const bool batch_first) +{ + // A batched version of log prob computation. + // + // cum_log_probs: [batch_size] + // logits: [max_input_length, batch_size, vocab_size] or [batch_size, max_input_length, vocab_size] + // input_ids: [max_input_length, batch_size] or [max_input_length, batch_size] + // input_lengths: [batch_size] + // workspace: workspace buffer of size at least sizeof(float) * max_input_length * batch_size. + + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + // block_size should be multiple of 32 to use warpReduceMax. + const int block_size = vocab_size < 1024 ? (vocab_size + 31) / 32 * 32 : 1024; + assert(block_size % 32 == 0); + assert(workspace != nullptr && workspace_size >= sizeof(float) * max_input_length * batch_size); + assert(vocab_size <= vocab_size_padded); + + float* log_probs = reinterpret_cast(workspace); + int gx = batch_first ? batch_size : max_input_length; + int gy = batch_first ? max_input_length : batch_size; + dim3 grid(gx, gy); + log_probs_kernel<<>>(log_probs, + logits, + input_ids, + input_lengths, + max_input_length, + batch_size, + vocab_size, + vocab_size_padded, + batch_first); + accumulate_log_probs<<>>( + cum_log_probs, log_probs, input_lengths, max_input_length, batch_size, batch_first); +} + +template void invokeLogProbFromLogits(float* cum_log_probs, + const float* logits, + const int* input_ids, + const int* input_lengths, + const size_t max_input_length, + const size_t batch_size, + const size_t vocab_size, + const size_t vocab_size_padded, + void* workspace, + const size_t workspace_size, + cudaStream_t stream, + const bool batch_first); + +template void invokeLogProbFromLogits(float* cum_log_probs, + const half* logits, + const int* input_ids, + const int* input_lengths, + const size_t max_input_length, + const size_t batch_size, + const size_t vocab_size, + const size_t vocab_size_padded, + void* workspace, + const size_t workspace_size, + cudaStream_t stream, + const bool batch_first); +} // end of namespace fastertransformer diff --git a/src/fastertransformer/kernels/logprob_kernels.h b/src/fastertransformer/kernels/logprob_kernels.h new file mode 100644 index 000000000..8e480c108 --- /dev/null +++ b/src/fastertransformer/kernels/logprob_kernels.h @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +namespace fastertransformer { + +template +void invokeLogProbFromLogits(float* cum_log_probs, + const T* logits, + const int* input_ids, + const int* input_lengths, + const size_t max_input_length, + const size_t batch_size, + const size_t vocab_size, + const size_t vocab_size_padded, + void* workspace, + const size_t workspace_size, + cudaStream_t stream, + const bool batch_first = false); +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/longformer_kernels.cu b/src/fastertransformer/kernels/longformer_kernels.cu index 4695f51ee..ca7d2c03c 100644 --- a/src/fastertransformer/kernels/longformer_kernels.cu +++ b/src/fastertransformer/kernels/longformer_kernels.cu @@ -15,7 +15,13 @@ */ #include +#ifndef CUDART_VERSION +#error CUDART_VERSION Undefined! +#elif (CUDART_VERSION >= 11050) +#include +#else #include "3rdparty/cub/cub.cuh" +#endif #include "longformer_kernels.h" #include "src/fastertransformer/utils/cuda_utils.h" @@ -65,9 +71,11 @@ void invokeLocalAttnMaskShift(T* local_attn_mask, T* out, int batch_size, int se local_attn_mask, out, thread_block_repeat, batch_size * seq_len); } -template void invokeLocalAttnMaskShift(float* local_attn_mask, float* out, int batch_size, int seq_len, cudaStream_t stream); +template void +invokeLocalAttnMaskShift(float* local_attn_mask, float* out, int batch_size, int seq_len, cudaStream_t stream); -template void invokeLocalAttnMaskShift(half* local_attn_mask, half* out, int batch_size, int seq_len, cudaStream_t stream); +template void +invokeLocalAttnMaskShift(half* local_attn_mask, half* out, int batch_size, int seq_len, cudaStream_t stream); template void invokeInitLongformerIdx(T* global_attn_mask, @@ -116,21 +124,25 @@ template void invokeInitLongformerIdx(half* global_attn_mask, cudaStream_t stream); // Apply softmax to local and global attention. Rewrite the result to the same buffer in-place -template -__launch_bounds__(blockSize) -__global__ void longformerMHASoftmaxKernel(const T* global_attn, - const int* global_idx, const int* global_token_nums, - void* input_ptrs, const T* attn_mask, float scaler, - int seq_len, int head_num, int attn_window_size) +template +__launch_bounds__(blockSize) __global__ void longformerMHASoftmaxKernel(const T* global_attn, + const int* global_idx, + const int* global_token_nums, + void* input_ptrs, + const T* attn_mask, + float scaler, + int seq_len, + int head_num, + int attn_window_size) { typedef cub::BlockReduce BlockReduce; __shared__ typename BlockReduce::TempStorage breduce_temp; - size_t* p_inputs = (size_t*) (input_ptrs); + size_t* p_inputs = (size_t*)(input_ptrs); // use input buffer as output buffer - size_t* p_outputs = (size_t*) (input_ptrs); - size_t* input_sizes = (size_t*) (input_ptrs) + 5; - size_t* input_strides = (size_t*) (input_ptrs) + 10; + size_t* p_outputs = (size_t*)(input_ptrs); + size_t* input_sizes = (size_t*)(input_ptrs) + 5; + size_t* input_strides = (size_t*)(input_ptrs) + 10; int tid = threadIdx.x; const int batch_idx = blockIdx.x / (seq_len * head_num); @@ -144,9 +156,9 @@ __global__ void longformerMHASoftmaxKernel(const T* global_attn, T* inputs[5]; T* outputs[5]; - for (int i = 0; i < 5; ++i) { - inputs[i] = (T*) p_inputs[i] + batch_idx * head_num * input_sizes[i]; - outputs[i] = (T*) p_outputs[i] + batch_idx * head_num * input_sizes[i]; + for (int i = 0; i < 5; ++i) { + inputs[i] = (T*)p_inputs[i] + batch_idx * head_num * input_sizes[i]; + outputs[i] = (T*)p_outputs[i] + batch_idx * head_num * input_sizes[i]; } int col_start = 0; @@ -161,26 +173,32 @@ __global__ void longformerMHASoftmaxKernel(const T* global_attn, col_end = row_idx + attn_window_size + 1; } - if (col_start < 0) col_start = 0; - if (col_end > seq_len) col_end = seq_len; + if (col_start < 0) { + col_start = 0; + } + if (col_end > seq_len) { + col_end = seq_len; + } // if mask is set then set everything to zero to match Python implementation - if (mask_blk[row_idx] != (T) 0.f) { + if (mask_blk[row_idx] != (T)0.f) { if (is_local_row) { T* output_blk = nullptr; T* output_glb = nullptr; int local_offset = row_idx % attn_window_size; int local_start = 0; - int local_end = 3 * attn_window_size; - if (row_idx < attn_window_size) { + int local_end = 3 * attn_window_size; + if (row_idx < attn_window_size) { local_start = 0; - local_end = 2 * attn_window_size; + local_end = 2 * attn_window_size; output_blk = outputs[0] + row_idx * input_strides[0] + head_idx * input_sizes[0]; - } else if (row_idx < seq_len - attn_window_size) { + } + else if (row_idx < seq_len - attn_window_size) { output_blk = outputs[1] + (row_idx - attn_window_size) * input_strides[1] + head_idx * input_sizes[1]; - } else { + } + else { local_start = 0; - local_end = 2 * attn_window_size; + local_end = 2 * attn_window_size; output_blk = outputs[2] + local_offset * input_strides[2] + head_idx * input_sizes[2]; } @@ -197,11 +215,12 @@ __global__ void longformerMHASoftmaxKernel(const T* global_attn, output_glb[i] = 0; } } - - } else { + } + else { T* output_blk = outputs[4]; - for (int i = tid; i < seq_len; i += blockSize) + for (int i = tid; i < seq_len; i += blockSize) { output_blk[i] = 0; + } } return; } @@ -221,17 +240,19 @@ __global__ void longformerMHASoftmaxKernel(const T* global_attn, int local_end = local_start + 2 * attn_window_size + 1; int zero_start = 0; int zero_end = 3 * attn_window_size; - if (row_idx < attn_window_size) { + if (row_idx < attn_window_size) { local_start = 0; - local_end = local_offset + attn_window_size + 1; + local_end = local_offset + attn_window_size + 1; zero_end = 2 * attn_window_size; input_blk = inputs[0] + row_idx * input_strides[0] + head_idx * input_sizes[0]; output_blk = outputs[0] + row_idx * input_strides[0] + head_idx * input_sizes[0]; - } else if (row_idx < seq_len - attn_window_size) { + } + else if (row_idx < seq_len - attn_window_size) { input_blk = inputs[1] + (row_idx - attn_window_size) * input_strides[1] + head_idx * input_sizes[1]; output_blk = outputs[1] + (row_idx - attn_window_size) * input_strides[1] + head_idx * input_sizes[1]; - } else { + } + else { local_start = local_offset; local_end = 2 * attn_window_size; zero_end = 2 * attn_window_size; @@ -242,33 +263,38 @@ __global__ void longformerMHASoftmaxKernel(const T* global_attn, const T* input_glb = nullptr; int local_global = row_idx - attn_window_size; - if (local_global > global_num) local_global = global_num; + if (local_global > global_num) { + local_global = global_num; + } if (local_global > 0) { - input_glb = inputs[3] + (row_idx - attn_window_size) * input_strides[3] + head_idx * input_sizes[3]; + input_glb = inputs[3] + (row_idx - attn_window_size) * input_strides[3] + head_idx * input_sizes[3]; } - if (row_idx < attn_window_size) { - output_glb = (T*) outputs[0] + row_idx * input_strides[0] + head_idx * input_sizes[0]; - } else if (row_idx < 2*attn_window_size) { + output_glb = (T*)outputs[0] + row_idx * input_strides[0] + head_idx * input_sizes[0]; + } + else if (row_idx < 2 * attn_window_size) { output_glb = outputs[1] + (row_idx - attn_window_size) * input_strides[1] + head_idx * input_sizes[1]; - } else { + } + else { output_glb = outputs[3] + (row_idx - attn_window_size) * input_strides[3] + head_idx * input_sizes[3]; } for (int i = local_start + tid, ii = col_start + tid; i < local_end; i += blockSize, ii += blockSize) { float x = (float)input_blk[i]; x = x * scaler + (float)mask_blk[ii]; - if (max_input < x) + if (max_input < x) { max_input = x; + } } if (input_glb != nullptr) { for (int i = tid; i < local_global; i += blockSize) { float x = (float)input_glb[global_idx_blk[i]]; x = x * scaler + (float)mask_blk[global_idx_blk[i]]; - if (max_input < x) + if (max_input < x) { max_input = x; + } } } @@ -322,16 +348,18 @@ __global__ void longformerMHASoftmaxKernel(const T* global_attn, output_glb[i] = (T)(recip_sum * x); } } - } else { + } + else { // global tokens - const T* input_blk = inputs[4] + row_idx * input_strides[4] + head_idx * input_sizes[4]; - T* output_blk = outputs[4] + row_idx * input_strides[4] + head_idx * input_sizes[4]; + const T* input_blk = inputs[4] + row_idx * input_strides[4] + head_idx * input_sizes[4]; + T* output_blk = outputs[4] + row_idx * input_strides[4] + head_idx * input_sizes[4]; for (int i = tid; i < seq_len; i += blockSize) { float x = (float)input_blk[i]; x = x * scaler + (float)mask_blk[i]; - if (max_input < x) + if (max_input < x) { max_input = x; + } } float max_blk = BlockReduce(breduce_temp).Reduce(max_input, cub::Max()); diff --git a/src/fastertransformer/kernels/longformer_kernels.h b/src/fastertransformer/kernels/longformer_kernels.h index c8afe0e14..e84887beb 100644 --- a/src/fastertransformer/kernels/longformer_kernels.h +++ b/src/fastertransformer/kernels/longformer_kernels.h @@ -25,15 +25,26 @@ template void invokeLocalAttnMaskShift(T* local_attn_mask, T* out, int batch_size, int seq_len, cudaStream_t stream); template -void invokeInitLongformerIdx(T* global_attn_mask, int* seq_idx, int* global_idx, - int* global_token_nums, int seq_len, int batch_size, - void* cub_storage, cudaStream_t stream); +void invokeInitLongformerIdx(T* global_attn_mask, + int* seq_idx, + int* global_idx, + int* global_token_nums, + int seq_len, + int batch_size, + void* cub_storage, + cudaStream_t stream); template void invokeLongformerMHASoftmax(const T* global_attn_mask, - const int* global_idx, const int* global_token_nums, - void* input_ptrs, const T* local_attn_mask, float scaler, - int seq_len, int head_num, int batch_size, int local_attn_window_size, + const int* global_idx, + const int* global_token_nums, + void* input_ptrs, + const T* local_attn_mask, + float scaler, + int seq_len, + int head_num, + int batch_size, + int local_attn_window_size, cudaStream_t stream); } // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/matrix_vector_multiplication.cu b/src/fastertransformer/kernels/matrix_vector_multiplication.cu index 6d4864039..f88566990 100644 --- a/src/fastertransformer/kernels/matrix_vector_multiplication.cu +++ b/src/fastertransformer/kernels/matrix_vector_multiplication.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -18,8 +18,10 @@ #include #include +#include "bfloat16_fallback_kenrels.cuh" #include "matrix_vector_multiplication.h" #include "reduce_kernel_utils.cuh" +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" namespace fastertransformer { @@ -27,6 +29,12 @@ typedef struct half4 { half x, y, z, w; } half4; +#ifdef ENABLE_BF16 +typedef struct bf164 { + __nv_bfloat16 x, y, z, w; +} bf164; +#endif + template struct ARRAY { T data[NUM]; @@ -167,6 +175,79 @@ __global__ void int8WeightPerChannelLdkMultiplication( } } } + +#ifdef ENABLE_BF16 +template +__global__ void int8WeightPerChannelLdkMultiplication( + const char4* weight, const bf164* input, const float* scale_list, void* output, const int k_4) +{ + + const int tidx = threadIdx.x; + const int bidx = blockIdx.x; + const int row_idx = bidx * nPerThread; + const size_t b_offset = row_idx * k_4; + + using array = struct ARRAY; + array sum_list[m]; +#pragma unroll + for (int m_i = 0; m_i < m; m_i++) { +#pragma unroll + for (int i = 0; i < nPerThread; i++) { + sum_list[m_i].data[i] = 0.0f; + } + } + + for (int k_idx = tidx; k_idx < k_4; k_idx += blockDim.x) { + __nv_bfloat162 input_val_0[m]; + __nv_bfloat162 input_val_1[m]; +#pragma unroll + for (int m_i = 0; m_i < m; m_i++) { + const bf164 input_val = input[k_idx + m_i * k_4]; + input_val_0[m_i] = {input_val.x, input_val.y}; + input_val_1[m_i] = {input_val.z, input_val.w}; + } +#pragma unroll + for (int i = 0; i < nPerThread; i++) { + const char4 weight_val = weight[b_offset + i * k_4 + k_idx]; +#if defined(__CUDA_ARCH__) && __CUDA_ARCH__ >= 800 + const __nv_bfloat162 weight_val_0 = {static_cast<__nv_bfloat16>(weight_val.x), + static_cast<__nv_bfloat16>(weight_val.y)}; + const __nv_bfloat162 weight_val_1 = {static_cast<__nv_bfloat16>(weight_val.z), + static_cast<__nv_bfloat16>(weight_val.w)}; +#else + const __nv_bfloat162 weight_val_0 = {__float2bfloat16(static_cast(weight_val.x)), + __float2bfloat16(static_cast(weight_val.y))}; + const __nv_bfloat162 weight_val_1 = {__float2bfloat16(static_cast(weight_val.z)), + __float2bfloat16(static_cast(weight_val.w))}; +#endif +#pragma unroll + for (int m_i = 0; m_i < m; m_i++) { + const __nv_bfloat162 weight_val_2 = + bf16hadd2(bf16hmul2(input_val_0[m_i], weight_val_0), bf16hmul2(input_val_1[m_i], weight_val_1)); + sum_list[m_i].data[i] += static_cast(weight_val_2.x + weight_val_2.y); + } + } + } +#pragma unroll + for (int m_i = 0; m_i < m; m_i++) { + cgBlockReduceSumElements(sum_list[m_i].data, cgBlockReduceSumElements_shm); + __syncthreads(); + } + if (tidx == 0) { + using array_half = struct ARRAY; + const array scale = *((const array*)scale_list + bidx); +#pragma unroll + for (int m_i = 0; m_i < m; m_i++) { + array_half sum_list_half; +#pragma unroll + for (int i = 0; i < nPerThread; i++) { + sum_list_half.data[i] = __float2bfloat16_rn(sum_list[m_i].data[i] * scale.data[i]); + } + *((array_half*)output + bidx + m_i * gridDim.x) = sum_list_half; + } + } +} +#endif /////////////////////////////////////////////////////////////////////// #define RUN(M, TYPE) \ @@ -195,20 +276,29 @@ void int8WeightPerChannelLdkMultiplicationLauncher(const int8_t* weight, dim3 grid(n / nPerThread); dim3 block; // block size tuned with gpt-3 parameter - if (k > 10000) + if (k > 10000) { block.x = 256; - else if (k > 2000) + } + else if (k > 2000) { block.x = 128; - else + } + else { block.x = 64; - while (block.x * 4 > k) + } + while (block.x * 4 > k) { block.x /= 2; + } block.x = (block.x + 31) / 32 * 32; const size_t shm_size = block.x * nPerThread * sizeof(float); if (m == 1) { if (std::is_same::value) { RUN(1, half4) } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + RUN(1, bf164); + } +#endif else { RUN(1, float4) } @@ -217,6 +307,11 @@ void int8WeightPerChannelLdkMultiplicationLauncher(const int8_t* weight, if (std::is_same::value) { RUN(2, half4) } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + RUN(2, bf164); + } +#endif else { RUN(2, float4) } @@ -245,6 +340,16 @@ template void int8WeightPerChannelLdkMultiplicationLauncher(const int8_t* matrix const int k, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void int8WeightPerChannelLdkMultiplicationLauncher(const int8_t* matrix, + const __nv_bfloat16* vector, + const float* scale_list, + __nv_bfloat16* output, + const int m, + const int n, + const int k, + cudaStream_t stream); +#endif ///////////////////////////////////////////////////////////////////// } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/online_softmax_beamsearch_kernels.cu b/src/fastertransformer/kernels/online_softmax_beamsearch_kernels.cu index 97b61ddb8..b12bbf6bb 100644 --- a/src/fastertransformer/kernels/online_softmax_beamsearch_kernels.cu +++ b/src/fastertransformer/kernels/online_softmax_beamsearch_kernels.cu @@ -14,10 +14,17 @@ * limitations under the License. */ +#ifndef CUDART_VERSION +#error CUDART_VERSION Undefined! +#elif (CUDART_VERSION >= 11050) +#include +#else #include "3rdparty/cub/cub.cuh" +#endif #include "src/fastertransformer/kernels/online_softmax_beamsearch_kernels.h" #include "src/fastertransformer/kernels/reduce_kernel_utils.cuh" +#include "src/fastertransformer/utils/cuda_utils.h" namespace fastertransformer { @@ -84,8 +91,10 @@ __launch_bounds__(THREADBLOCK_SIZE) __global__ void batch_topk_kernel(const int* const T* __restrict y, int* __restrict z, float* __restrict v, + float* output_log_probs, int V, int K, + int vocab_size, T diversity_rate) { int thread_id = threadIdx.x; @@ -120,6 +129,9 @@ __launch_bounds__(THREADBLOCK_SIZE) __global__ void batch_topk_kernel(const int* for (int i = 0; i < MAX_K; ++i) { if (i < K) { z[i] = x[total.p[i]]; + if (output_log_probs != nullptr) { + output_log_probs[vector_id * K + i] = (float)y[total.p[i]] - v[(z[i] / vocab_size) % K]; + } v[i] = (float)y[total.p[i]]; } } @@ -167,7 +179,7 @@ __launch_bounds__(THREADBLOCK_SIZE) __global__ void beam_online_softmax_topk_ker T* __restrict v, int V, int K, - int E) + const int* __restrict end_ids) { int thread_id = threadIdx.x; int vector_id = blockIdx.x; @@ -192,7 +204,7 @@ __launch_bounds__(THREADBLOCK_SIZE) __global__ void beam_online_softmax_topk_ker if (finish) { for (int elem_id = thread_id; elem_id < V; elem_id += THREADBLOCK_SIZE) { - float elem = (elem_id == E) ? MAX_T_VAL : -MAX_T_VAL; + float elem = (elem_id == end_ids[vector_id / K]) ? MAX_T_VAL : -MAX_T_VAL; MD new_elem{elem, 1.0F}; partial.md = reduce_md_op(partial.md, new_elem); partial.topk.insert(elem, elem_id); @@ -236,7 +248,7 @@ __launch_bounds__(THREADBLOCK_SIZE, 1) __global__ float* __restrict t, int V, int K, - int E) + const int* __restrict end_ids) { int thread_id = threadIdx.x; int vector_id = blockIdx.x; @@ -278,7 +290,7 @@ __launch_bounds__(THREADBLOCK_SIZE, 1) __global__ if (finish) { #pragma unroll 1 for (int elem_id = section_start + thread_id; elem_id < section_end; elem_id += THREADBLOCK_SIZE) { - float elem = (elem_id == E) ? MAX_T_VAL : -MAX_T_VAL; + float elem = (elem_id == end_ids[vector_id / K]) ? MAX_T_VAL : -MAX_T_VAL; MD new_elem{elem, 1.0F}; partial.md = reduce_md_op(partial.md, new_elem); partial.topk.insert(elem, elem_id); @@ -417,13 +429,14 @@ void topK_softMax_kernelLauncher(const T* log_probs, const T* bias, const bool* finished, float* cum_log_probs, + float* output_log_probs, int* ids, void* temp_storage, const int temp_storage_size, const int batch_size, const int beam_width, const int vocab_size, - const int end_id, + const int* end_ids, T diversity_rate, cudaStream_t stream) { @@ -451,7 +464,7 @@ void topK_softMax_kernelLauncher(const T* log_probs, cudaFuncAttributePreferredSharedMemoryCarveout, cudaSharedmemCarveoutMaxL1); beam_online_softmax_topk_stage1_kernel - <<>>(log_probs, bias, finished, tmp_buffer, vocab_size, beam_width, end_id); + <<>>(log_probs, bias, finished, tmp_buffer, vocab_size, beam_width, end_ids); #endif if (beam_width > 1) { #ifdef DO_SPLIT_SMALL_TOP_K_SOFTMAX @@ -467,25 +480,33 @@ void topK_softMax_kernelLauncher(const T* log_probs, topk_tmp_val_buf, vocab_size, beam_width, - end_id); + end_ids); #endif #if 0 // wrong result with diversity_rate != 0.f batch_topK_kernel<<>> (topk_tmp_id_buf, topk_tmp_val_buf, ids, cum_log_probs); #else - batch_topk_kernel<<>>( - topk_tmp_id_buf, topk_tmp_val_buf, ids, cum_log_probs, beam_width * beam_width, beam_width, diversity_rate); + batch_topk_kernel<<>>(topk_tmp_id_buf, + topk_tmp_val_buf, + ids, + cum_log_probs, + output_log_probs, + beam_width * beam_width, + beam_width, + vocab_size, + diversity_rate); #endif } else { + FT_CHECK(false); #ifdef DO_SPLIT_SMALL_TOP_K_SOFTMAX beam_online_softmax_topk_stage2_kernelLauncher( tmp_buffer, cum_log_probs, ids, cum_log_probs, batch_size, beam_width, voc_parts, stream); #else beam_online_softmax_topk_kernel <<>>( - log_probs, bias, cum_log_probs, finished, ids, cum_log_probs, vocab_size, beam_width, end_id); + log_probs, bias, cum_log_probs, finished, ids, cum_log_probs, vocab_size, beam_width, end_ids); #endif } } @@ -495,13 +516,14 @@ void invokeTopkSoftMax(const T* log_probs, const T* bias, const bool* finished, float* cum_log_probs, + float* output_log_probs, int* ids, void* temp_storage, const int temp_storage_size, const int batch_size, const int beam_width, const int vocab_size, - const int end_id, + const int* end_ids, const float diversity_rate, cudaStream_t stream) { @@ -511,13 +533,14 @@ void invokeTopkSoftMax(const T* log_probs, bias, finished, cum_log_probs, + output_log_probs, ids, temp_storage, temp_storage_size, batch_size, beam_width, vocab_size, - end_id, + end_ids, diversity_rate, stream); break; @@ -526,13 +549,14 @@ void invokeTopkSoftMax(const T* log_probs, bias, finished, cum_log_probs, + output_log_probs, ids, temp_storage, temp_storage_size, batch_size, beam_width, vocab_size, - end_id, + end_ids, diversity_rate, stream); break; @@ -541,13 +565,14 @@ void invokeTopkSoftMax(const T* log_probs, bias, finished, cum_log_probs, + output_log_probs, ids, temp_storage, temp_storage_size, batch_size, beam_width, vocab_size, - end_id, + end_ids, diversity_rate, stream); break; @@ -556,13 +581,14 @@ void invokeTopkSoftMax(const T* log_probs, bias, finished, cum_log_probs, + output_log_probs, ids, temp_storage, temp_storage_size, batch_size, beam_width, vocab_size, - end_id, + end_ids, diversity_rate, stream); break; @@ -571,13 +597,14 @@ void invokeTopkSoftMax(const T* log_probs, bias, finished, cum_log_probs, + output_log_probs, ids, temp_storage, temp_storage_size, batch_size, beam_width, vocab_size, - end_id, + end_ids, diversity_rate, stream); break; @@ -586,13 +613,14 @@ void invokeTopkSoftMax(const T* log_probs, bias, finished, cum_log_probs, + output_log_probs, ids, temp_storage, temp_storage_size, batch_size, beam_width, vocab_size, - end_id, + end_ids, diversity_rate, stream); break; @@ -601,13 +629,14 @@ void invokeTopkSoftMax(const T* log_probs, bias, finished, cum_log_probs, + output_log_probs, ids, temp_storage, temp_storage_size, batch_size, beam_width, vocab_size, - end_id, + end_ids, diversity_rate, stream); break; @@ -622,13 +651,14 @@ template void invokeTopkSoftMax(const float* log_probs, const float* bias, const bool* finished, float* cum_log_probs, + float* output_log_probs, int* ids, void* tmp_storage, const int temp_storage_size, const int batch_size, const int beam_width, const int vocab_size, - const int end_id, + const int* end_ids, const float diversity_rate, cudaStream_t stream); @@ -636,13 +666,14 @@ template void invokeTopkSoftMax(const half* log_probs, const half* bias, const bool* finished, float* cum_log_probs, + float* output_log_probs, int* ids, void* tmp_storage, const int temp_storage_size, const int batch_size, const int beam_width, const int vocab_size, - const int end_id, + const int* end_ids, const float diversity_rate, cudaStream_t stream); diff --git a/src/fastertransformer/kernels/online_softmax_beamsearch_kernels.h b/src/fastertransformer/kernels/online_softmax_beamsearch_kernels.h index b847d5bcc..5407865f6 100644 --- a/src/fastertransformer/kernels/online_softmax_beamsearch_kernels.h +++ b/src/fastertransformer/kernels/online_softmax_beamsearch_kernels.h @@ -22,13 +22,14 @@ void invokeTopkSoftMax(const T* log_probs, const T* bias, const bool* finished, float* cum_log_probs, + float* output_log_probs, int* ids, void* tmp_storage, const int temp_storage_size, const int batch_size, const int beam_width, const int vocab_size, - const int end_id, + const int* end_ids, const float diversity_rate, cudaStream_t stream); diff --git a/src/fastertransformer/kernels/quantization_int8_kernels.cu b/src/fastertransformer/kernels/quantization_int8_kernels.cu index f92dbc3d1..6ef3897ca 100644 --- a/src/fastertransformer/kernels/quantization_int8_kernels.cu +++ b/src/fastertransformer/kernels/quantization_int8_kernels.cu @@ -17,57 +17,61 @@ #include "src/fastertransformer/kernels/quantization_int8_kernels.h" namespace fastertransformer { -__global__ -void quantized_kernel(char4 *dst, const float4* src, const int size_div_4, const float* scale_ptr) { - int tid = (blockIdx.x*blockDim.x + threadIdx.x); +__global__ void quantized_kernel(char4* dst, const float4* src, const int size_div_4, const float* scale_ptr) +{ + int tid = (blockIdx.x * blockDim.x + threadIdx.x); if (tid < size_div_4) { const float scale = __ldg(scale_ptr); char4 tmp; const float4 floatTmp = __ldg(src + tid); - tmp.x = float_to_int8_rn(floatTmp.x*scale); - tmp.y = float_to_int8_rn(floatTmp.y*scale); - tmp.z = float_to_int8_rn(floatTmp.z*scale); - tmp.w = float_to_int8_rn(floatTmp.w*scale); + tmp.x = float_to_int8_rn(floatTmp.x * scale); + tmp.y = float_to_int8_rn(floatTmp.y * scale); + tmp.z = float_to_int8_rn(floatTmp.z * scale); + tmp.w = float_to_int8_rn(floatTmp.w * scale); dst[tid] = tmp; } } -__global__ -void quantized_kernel(char4 *dst, const half2* src, const int size_div_4, const float* scale_ptr) { - int tid = (blockIdx.x*blockDim.x + threadIdx.x); +__global__ void quantized_kernel(char4* dst, const half2* src, const int size_div_4, const float* scale_ptr) +{ + int tid = (blockIdx.x * blockDim.x + threadIdx.x); if (tid < size_div_4) { const float scale = __ldg(scale_ptr); char4 tmp; int src_id = tid << 1; - + const half2 half2Tmp = __ldg(src + src_id); - tmp.x = float_to_int8_rn(static_cast(half2Tmp.x)*scale); - tmp.y = float_to_int8_rn(static_cast(half2Tmp.y)*scale); - + tmp.x = float_to_int8_rn(static_cast(half2Tmp.x) * scale); + tmp.y = float_to_int8_rn(static_cast(half2Tmp.y) * scale); + const half2 half2Tmp2 = __ldg(src + src_id + 1); - tmp.z = float_to_int8_rn(static_cast(half2Tmp2.x)*scale); - tmp.w = float_to_int8_rn(static_cast(half2Tmp2.y)*scale); + tmp.z = float_to_int8_rn(static_cast(half2Tmp2.x) * scale); + tmp.w = float_to_int8_rn(static_cast(half2Tmp2.y) * scale); dst[tid] = tmp; } } -template -void invokeQuantization(int8_t* dst, const T * src, const int size, const float* scale_ptr, cudaStream_t stream) { - - if (size % 4 != 0) { - printf("[ERROR][invokeQuantization] size should be a multiple of 4.\n"); - exit(-1); - } - dim3 grid((size+255)/256); - dim3 block(64); - if (sizeof(T) == sizeof(float)) - quantized_kernel<<>>((char4*)dst, (const float4*)src, size/4, scale_ptr); - else if (sizeof(T) == sizeof(half)) - quantized_kernel<<>>((char4*)dst, (const half2*)src, size/4, scale_ptr); +template +void invokeQuantization(int8_t* dst, const T* src, const int size, const float* scale_ptr, cudaStream_t stream) +{ + if (size % 4 != 0) { + printf("[ERROR][invokeQuantization] size should be a multiple of 4.\n"); + exit(-1); + } + dim3 grid((size + 255) / 256); + dim3 block(64); + if (sizeof(T) == sizeof(float)) { + quantized_kernel<<>>((char4*)dst, (const float4*)src, size / 4, scale_ptr); + } + else if (sizeof(T) == sizeof(half)) { + quantized_kernel<<>>((char4*)dst, (const half2*)src, size / 4, scale_ptr); + } } -template void invokeQuantization(int8_t* dst, const float * src, const int size, const float* scale_ptr, cudaStream_t stream); +template void +invokeQuantization(int8_t* dst, const float* src, const int size, const float* scale_ptr, cudaStream_t stream); -template void invokeQuantization(int8_t* dst, const half * src, const int size, const float* scale_ptr, cudaStream_t stream); +template void +invokeQuantization(int8_t* dst, const half* src, const int size, const float* scale_ptr, cudaStream_t stream); } // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/quantization_int8_kernels.h b/src/fastertransformer/kernels/quantization_int8_kernels.h index 64073f74b..2935d8d9b 100644 --- a/src/fastertransformer/kernels/quantization_int8_kernels.h +++ b/src/fastertransformer/kernels/quantization_int8_kernels.h @@ -16,13 +16,13 @@ #pragma once +#include "int8_utils.cuh" #include #include -#include "int8_utils.cuh" namespace fastertransformer { -template -void invokeQuantization(int8_t* dst, const T * src, const int size, const float* scale_ptr, cudaStream_t stream); +template +void invokeQuantization(int8_t* dst, const T* src, const int size, const float* scale_ptr, cudaStream_t stream); } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/quantize_weight.cu b/src/fastertransformer/kernels/quantize_weight.cu index b2663d65b..84b4af84f 100644 --- a/src/fastertransformer/kernels/quantize_weight.cu +++ b/src/fastertransformer/kernels/quantize_weight.cu @@ -17,96 +17,133 @@ #include "src/fastertransformer/kernels/quantize_weight.h" namespace fastertransformer { -__device__ __host__ -int index_CUBLASLT_ORDER_COL4_4R2_8C(int col_id, int row_id, int m_32){ - int new_col = col_id >> 5; - int new_row = //CUBLASLT_ORDER_COL4_4R2_8C - ////row_id/8 is the number of tile of (8 rows 32 columns) -- column-major - ////row_id%2 is even row, otherwise odd row - ////col_id%COL32_/8 is the number tile of (8 rows 8 columns) - ( - ((((row_id >> 3) << 3) + ((row_id&1) << 2) + ((col_id&31) >> 3)) << 5) + - ////col_id%8 >= 4 is the right half of (8 rows 8 columns) tile - ////(row_id%8/2) is (the row id of alternating 4 rows) - 1 - (((((col_id&7) >= 4)?4:0) + ((row_id&7) >> 1)) << 2) + - ////col_id%4 is the id of 4 cols - (col_id&3) - ) - ; - return new_col*m_32 + new_row; +__device__ __host__ int index_CUBLASLT_ORDER_COL4_4R2_8C(int col_id, int row_id, int m_32) +{ + int new_col = col_id >> 5; + int new_row = // CUBLASLT_ORDER_COL4_4R2_8C + ////row_id/8 is the number of tile of (8 rows 32 columns) -- column-major + ////row_id%2 is even row, otherwise odd row + ////col_id%COL32_/8 is the number tile of (8 rows 8 columns) + (((((row_id >> 3) << 3) + ((row_id & 1) << 2) + ((col_id & 31) >> 3)) << 5) + + ////col_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(row_id%8/2) is (the row id of alternating 4 rows) - 1 + (((((col_id & 7) >= 4) ? 4 : 0) + ((row_id & 7) >> 1)) << 2) + + ////col_id%4 is the id of 4 cols + (col_id & 3)); + return new_col * m_32 + new_row; } -__device__ __host__ -int index_CUBLASLT_ORDER_COL32_2R_4R4(int col_id, int row_id, int m_32){ - int new_col = col_id >> 5; - int row_in_tile = row_id & 31; - int col_in_tile = col_id & 31; - int new_row = //CUBLASLT_ORDER_COL32_2R_4R4 - ( - ((row_id >> 5) << 10) + - //(((row%8)/2*4+row/8)*2+row%2)*32+col - (((((((row_in_tile&7)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile - ) - ; - return new_col*m_32 + new_row; +__device__ __host__ int index_CUBLASLT_ORDER_COL32_2R_4R4(int col_id, int row_id, int m_32) +{ + int new_col = col_id >> 5; + int row_in_tile = row_id & 31; + int col_in_tile = col_id & 31; + int new_row = // CUBLASLT_ORDER_COL32_2R_4R4 + (((row_id >> 5) << 10) + + //(((row%8)/2*4+row/8)*2+row%2)*32+col + (((((((row_in_tile & 7) >> 1) << 2) + (row_in_tile >> 3)) << 1) + (row_in_tile & 1)) << 5) + col_in_tile); + return new_col * m_32 + new_row; } -__global__ -void quantize_weight_kernel(int8_t *dst, const float* src, const float* amax, const int n, const int k, const int format) { - int tid = (blockIdx.x*blockDim.x + threadIdx.x); +__global__ void quantize_weight_kernel(int8_t* dst, + const float* src, + const float* amax, + const int n, + const int k, + const int format, + const int scale_is_vector) +{ + int tid = (blockIdx.x * blockDim.x + threadIdx.x); int col_idx = tid / n; int row_idx = tid - col_idx * n; int new_idx; if (format == 0) { new_idx = row_idx * k + col_idx; - } else if (format == 1) { - new_idx = index_CUBLASLT_ORDER_COL32_2R_4R4(col_idx, row_idx, 32*n); - } else if (format == 2) { - new_idx = index_CUBLASLT_ORDER_COL4_4R2_8C(col_idx, row_idx, 32*n); + } + else if (format == 1) { + new_idx = index_CUBLASLT_ORDER_COL32_2R_4R4(col_idx, row_idx, 32 * n); + } + else if (format == 2) { + new_idx = index_CUBLASLT_ORDER_COL4_4R2_8C(col_idx, row_idx, 32 * n); } if (tid < n * k) { - int8_t v = float_to_int8_rn(src[tid] * 127.0 / amax[row_idx]); + int8_t v = float_to_int8_rn(src[tid] * 127.0 / amax[row_idx * scale_is_vector]); dst[new_idx] = v; } } -__global__ -void quantize_weight_kernel(int8_t *dst, const half* src, const float* amax, const int n, const int k, const int format) { - int tid = (blockIdx.x*blockDim.x + threadIdx.x); +__global__ void quantize_weight_kernel(int8_t* dst, + const half* src, + const float* amax, + const int n, + const int k, + const int format, + const int scale_is_vector) +{ + int tid = (blockIdx.x * blockDim.x + threadIdx.x); int col_idx = tid / n; int row_idx = tid - col_idx * n; int new_idx; if (format == 0) { new_idx = row_idx * k + col_idx; - } else if (format == 1) { - new_idx = index_CUBLASLT_ORDER_COL32_2R_4R4(col_idx, row_idx, 32*n); - } else if (format == 2) { - new_idx = index_CUBLASLT_ORDER_COL4_4R2_8C(col_idx, row_idx, 32*n); + } + else if (format == 1) { + new_idx = index_CUBLASLT_ORDER_COL32_2R_4R4(col_idx, row_idx, 32 * n); + } + else if (format == 2) { + new_idx = index_CUBLASLT_ORDER_COL4_4R2_8C(col_idx, row_idx, 32 * n); } if (tid < n * k) { - int8_t v = float_to_int8_rn(__half2float(src[tid]) * 127.0 / amax[row_idx]); + int8_t v = float_to_int8_rn(__half2float(src[tid]) * 127.0 / amax[row_idx * scale_is_vector]); dst[new_idx] = v; } } -template -void invokeQuantizeWeight(int8_t* dst, const T* src, const float* amax, const int n, const int k, const int format, cudaStream_t stream) { +template +void invokeQuantizeWeight(int8_t* dst, + const T* src, + const float* amax, + const int n, + const int k, + const int format, + cudaStream_t stream, + const int scale_is_vector) +{ if (format != 0 && format != 1 & format != 2) { printf("[ERROR][invokeQuantizeWeight] format must be one of 0, 1, 2. current value: %d\n", format); exit(-1); } - dim3 grid((n*k+255)/256); + if (scale_is_vector != 0 && scale_is_vector != 1) { + printf("[ERROR][invokeQuantizeWeight] scale_is_vector must be either 0 or 1. current value: %d\n", + scale_is_vector); + exit(-1); + } + dim3 grid((n * k + 255) / 256); dim3 block(256); - if (sizeof(T) == sizeof(float)) - quantize_weight_kernel<<>>(dst, (const float*)src, amax, n, k, format); - else if (sizeof(T) == sizeof(half)) - quantize_weight_kernel<<>>(dst, (const half*)src, amax, n, k, format); - } + if (sizeof(T) == sizeof(float)) { + quantize_weight_kernel<<>>(dst, (const float*)src, amax, n, k, format, scale_is_vector); + } + else if (sizeof(T) == sizeof(half)) { + quantize_weight_kernel<<>>(dst, (const half*)src, amax, n, k, format, scale_is_vector); + } +} -template -void invokeQuantizeWeight(int8_t* dst, const float* src, const float* amax, const int n, const int k, const int format, cudaStream_t stream); +template void invokeQuantizeWeight(int8_t* dst, + const float* src, + const float* amax, + const int n, + const int k, + const int format, + cudaStream_t stream, + const int scale_is_vector); -template -void invokeQuantizeWeight(int8_t* dst, const half* src, const float* amax, const int n, const int k, const int format, cudaStream_t stream); +template void invokeQuantizeWeight(int8_t* dst, + const half* src, + const float* amax, + const int n, + const int k, + const int format, + cudaStream_t stream, + const int scale_is_vector); } // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/quantize_weight.h b/src/fastertransformer/kernels/quantize_weight.h index 7ad5caa76..d3ae0b787 100644 --- a/src/fastertransformer/kernels/quantize_weight.h +++ b/src/fastertransformer/kernels/quantize_weight.h @@ -16,9 +16,9 @@ #pragma once +#include "int8_utils.cuh" #include #include -#include "int8_utils.cuh" namespace fastertransformer { @@ -26,7 +26,14 @@ namespace fastertransformer { // 0: row major // 1: CUBLASLT_ORDER_COL32_2R_4R4 // 2: CUBLASLT_ORDER_COL4_4R2_8C -template -void invokeQuantizeWeight(int8_t* dst, const T* src, const float* amax, const int n, const int k, const int format, cudaStream_t stream); +template +void invokeQuantizeWeight(int8_t* dst, + const T* src, + const float* amax, + const int n, + const int k, + const int format, + cudaStream_t stream, + const int scale_is_vector = 1); } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/reduce_kernel_utils.cuh b/src/fastertransformer/kernels/reduce_kernel_utils.cuh index 2529b6fc7..b3ee2e04e 100644 --- a/src/fastertransformer/kernels/reduce_kernel_utils.cuh +++ b/src/fastertransformer/kernels/reduce_kernel_utils.cuh @@ -16,7 +16,11 @@ #pragma once #include #include +#if ((__CUDACC_VER_MAJOR__ > 11) || (__CUDACC_VER_MAJOR__ == 11 && __CUDACC_VER_MINOR__ >= 0)) #include +#else +#include +#endif #include #include #include @@ -109,7 +113,7 @@ __inline__ __device__ T warpReduceSumV2(T* val) template __inline__ __device__ T blockReduceSumV2(T* val) { - static __shared__ T shared[32][NUM]; + static __shared__ T shared[NUM][33]; int lane = threadIdx.x & 0x1f; int wid = threadIdx.x >> 5; @@ -118,7 +122,7 @@ __inline__ __device__ T blockReduceSumV2(T* val) if (lane == 0) { #pragma unroll for (int i = 0; i < NUM; i++) { - shared[wid][i] = val[i]; + shared[i][wid] = val[i]; } } @@ -127,7 +131,7 @@ __inline__ __device__ T blockReduceSumV2(T* val) bool is_mask = threadIdx.x < (blockDim.x / 32.f); #pragma unroll for (int i = 0; i < NUM; i++) { - val[i] = is_mask ? shared[lane][i] : (T)(0.0f); + val[i] = is_mask ? shared[i][lane] : (T)(0.0f); } warpReduceSumV2(val); return (T)0.0f; @@ -185,7 +189,15 @@ __inline__ __device__ void cgBlockReduceSumElements(float* element_list, float* const int tid = cta.thread_rank(); const int blockz = blockDim.x; for (int i = 0; i < NUM; i++) { +#if ((__CUDACC_VER_MAJOR__ > 11) || (__CUDACC_VER_MAJOR__ == 11 && __CUDACC_VER_MINOR__ >= 0)) cgBlockReduceSumElements_shm[i * blockz + tid] = cg::reduce(tile, element_list[i], cg::plus()); +#else + // TODO Add implementation here + if (threadIdx.x == 0 && blockIdx.x == 0) { + printf("[ERROR] Not support cgBlockReduceSumElements when CUDA < 11 \n"); + assert(false); + } +#endif } cg::sync(cta); if (tid == 0) { diff --git a/src/fastertransformer/kernels/reverse_roll_kernels.cu b/src/fastertransformer/kernels/reverse_roll_kernels.cu new file mode 100644 index 000000000..f7f64b00b --- /dev/null +++ b/src/fastertransformer/kernels/reverse_roll_kernels.cu @@ -0,0 +1,171 @@ +/* + * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "reduce_kernel_utils.cuh" +#include "reverse_roll_kernels.h" + +namespace fastertransformer { + +/******************* invokeReverseRollCol32 ***********************/ +// src is [batch*window_num, window_len, dim] +// dst is [batch, H, W, dim] + rolled +// grid(W, H, batch) +// block(min(1024, dim)) + +__global__ void reverse_roll_col32(int8_t* dst, + const int8_t* src, + const int batch, + const int window_num, + const int window_len, + const int window_size, + const int H, + const int W, + const int shift_size, + const int dim) +{ + const int batch_idx = blockIdx.z; + const int HW_idx = (blockIdx.y << 5) + threadIdx.y; + if (HW_idx < H * W) { + const int H_idx = HW_idx / W; + const int W_idx = HW_idx % W; + const int H_idx_shifted = (H_idx + shift_size) % H; + const int W_idx_shifted = (W_idx + shift_size) % W; + + const int window_idx = H_idx / window_size * (W / window_size) + W_idx / window_size; + const int idx_in_window = (H_idx % window_size) * window_size + (W_idx % window_size); + const int input_offset = (batch_idx * window_num + window_idx) * window_len + idx_in_window; + const int output_offset = (batch_idx * H + H_idx_shifted) * W + W_idx_shifted; + const int m = H * W * batch; + char4* inPtr = (char4*)src; + char4* outPtr = (char4*)dst; + const int col_start = (blockIdx.x << 5) + (threadIdx.x << 2); + const int offset_col32_in = (col_start & 0xffffffe0) * m + (input_offset << 5) + (col_start & 31); + const int offset_col32_out = (col_start & 0xffffffe0) * m + (output_offset << 5) + (col_start & 31); + outPtr[offset_col32_out >> 2] = inPtr[offset_col32_in >> 2]; + } +} + +void invokeReverseRollCol32(int8_t* dst, + const int8_t* src, + int batch, + int window_num, + int window_len, + int window_size, + int H, + int W, + int dim, + int shift_size, + cudaStream_t stream) +{ + dim3 grid((dim + 31) / 32, (H * W + 31) / 32, batch); + dim3 block(8, 32); + reverse_roll_col32<<>>( + dst, src, batch, window_num, window_len, window_size, H, W, shift_size, dim); +} + +/******************* invokeReverseRoll ***********************/ +// src is [batch*window_num, window_len, dim] +// dst is [batch, H, W, dim] + rolled +// grid(W, H, batch) +// block(min(1024, dim)) + +template +__global__ void reverse_roll(T* dst, + const T* src, + const int batch, + const int window_num, + const int window_len, + const int window_size, + const int H, + const int W, + const int shift_size, + const int dim) +{ + const int batch_idx = blockIdx.z; + const int H_idx_shifted = (blockIdx.y + shift_size) % H; + const int W_idx_shifted = (blockIdx.x + shift_size) % W; + const int H_idx = blockIdx.y; + const int W_idx = blockIdx.x; + const int window_idx = H_idx / window_size * (W / window_size) + W_idx / window_size; + const int idx_in_window = (H_idx % window_size) * window_size + (W_idx % window_size); + const int input_offset = (batch_idx * window_num + window_idx) * window_len + idx_in_window; + const int output_offset = (batch_idx * H + H_idx_shifted) * W + W_idx_shifted; + for (int tid = threadIdx.x; tid < dim; tid += blockDim.x) { + dst[output_offset * dim + tid] = src[input_offset * dim + tid]; + } +} + +// src is [batch*window_num, window_len, dim] +// dst is [batch, H, W, dim] + rolled +// grid(W, H, batch) +// block(min(1024, dim)) +template +void invokeReverseRoll(T* dst, + const T* src, + int batch, + int window_num, + int window_len, + int window_size, + int H, + int W, + int dim, + int shift_size, + cudaStream_t stream) +{ + dim3 grid(W, H, batch); + int blockSize = dim; + if (std::is_same::value && (dim % 2 == 0)) { + blockSize = dim / 2; + if (blockSize > 1024) { + blockSize = 1024; + } + reverse_roll<<>>( + (half2*)dst, (const half2*)src, batch, window_num, window_len, window_size, H, W, shift_size, dim / 2); + } + else { + if (blockSize > 1024) { + blockSize = 1024; + } + reverse_roll<<>>( + dst, src, batch, window_num, window_len, window_size, H, W, shift_size, dim); + } +} + +template void invokeReverseRoll(float* dst, + const float* src, + int batch, + int window_num, + int window_len, + int window_size, + int H, + int W, + int dim, + int shift_size, + cudaStream_t stream); + +template void invokeReverseRoll(half* dst, + const half* src, + int batch, + int window_num, + int window_len, + int window_size, + int H, + int W, + int dim, + int shift_size, + cudaStream_t stream); + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/reverse_roll_kernels.h b/src/fastertransformer/kernels/reverse_roll_kernels.h new file mode 100644 index 000000000..1e076d4b0 --- /dev/null +++ b/src/fastertransformer/kernels/reverse_roll_kernels.h @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once +#include +#include +#include + +namespace fastertransformer { + +void invokeReverseRollCol32(int8_t* dst, + const int8_t* src, + int batch, + int window_num, + int window_len, + int window_size, + int H, + int W, + int dim, + int shift_size, + cudaStream_t stream); + +template +void invokeReverseRoll(T* dst, + const T* src, + int batch, + int window_num, + int window_len, + int window_size, + int H, + int W, + int dim, + int shift_size, + cudaStream_t stream); + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/sampling_penalty_kernels.cu b/src/fastertransformer/kernels/sampling_penalty_kernels.cu index fac6a7aef..18b7a7057 100644 --- a/src/fastertransformer/kernels/sampling_penalty_kernels.cu +++ b/src/fastertransformer/kernels/sampling_penalty_kernels.cu @@ -145,18 +145,18 @@ void invokeApplyRepetitionPenalty(T* logits, { dim3 block(min(512, step)); dim3 grid((int)(local_batch_size)); - applyRepetitionPenalty<<>>(logits, - penalty, - start_ids, - output_ids, - batch_size, - local_batch_size, - vocab_size, - vocab_size_padd, - input_lengths, - max_input_len, - step, - ite); + applyRepetitionPenalty<<>>(logits, + penalty, + start_ids, + output_ids, + batch_size, + local_batch_size, + vocab_size, + vocab_size_padd, + input_lengths, + max_input_len, + step, + ite); } template void invokeApplyRepetitionPenalty(float* logits, diff --git a/src/fastertransformer/kernels/sampling_topk_kernels.cu b/src/fastertransformer/kernels/sampling_topk_kernels.cu index bb76bd0c4..6da5f558f 100644 --- a/src/fastertransformer/kernels/sampling_topk_kernels.cu +++ b/src/fastertransformer/kernels/sampling_topk_kernels.cu @@ -15,7 +15,13 @@ * limitations under the License. */ +#ifndef CUDART_VERSION +#error CUDART_VERSION Undefined! +#elif (CUDART_VERSION >= 11050) +#include +#else #include "3rdparty/cub/cub.cuh" +#endif #include "src/fastertransformer/kernels/reduce_kernel_utils.cuh" #include "src/fastertransformer/kernels/sampling_topk_kernels.h" @@ -24,10 +30,8 @@ namespace fastertransformer { __global__ void curandInitialize(curandState_t* state, const int size, const unsigned long long random_seed) { - // TODO(bhsueh) should we fix the sequence of different batch as same? if (threadIdx.x + blockIdx.x * blockDim.x < size) { - curand_init( - random_seed, 0, 0, &state[blockIdx.x * blockDim.x + threadIdx.x]); + curand_init(random_seed, 0, 0, &state[blockIdx.x * blockDim.x + threadIdx.x]); } } @@ -49,7 +53,7 @@ __global__ void topk_stage_1_opt3(const T* __restrict log_probs, const bool* finished, const int k, const int vocab_size, - const int end_id) + const int* end_ids) { typedef cub::BlockReduce, BLOCK_SIZE_> BlockReduce; __shared__ typename BlockReduce::TempStorage temp_storage; @@ -69,6 +73,7 @@ __global__ void topk_stage_1_opt3(const T* __restrict log_probs, if (tid < k) { const int index = tmp_topk_buf_index + tid; if (block_lane == 0 && tid == 0) { + const int end_id = end_ids[row_id]; topk_tmp_id_buf[index] = tmp_log_buf_index + end_id; topk_tmp_val_buf[index] = log_probs[tmp_log_buf_index + end_id]; } @@ -108,7 +113,7 @@ __global__ void topk_stage_1_opt3(const T* __restrict log_probs, } template -__global__ void addBiasEndMask(T* logits, const T* bias, const int end_id, const bool* finished, const int n) +__global__ void addBiasEndMask(T* logits, const T* bias, const int* end_ids, const bool* finished, const int n) { int bid = blockIdx.x; bool finish = finished != nullptr ? finished[bid] : false; @@ -118,28 +123,29 @@ __global__ void addBiasEndMask(T* logits, const T* bias, const int end_id, const const T MAX_T_VAL = (IS_FP16) ? HALF_FLT_MAX : FLT_MAX; for (int tid = threadIdx.x; tid < n; tid += blockDim.x) { if (finish) { - logits[offset + tid] = (tid == end_id) ? MAX_T_VAL : -MAX_T_VAL; + logits[offset + tid] = (tid == end_ids[bid]) ? MAX_T_VAL : -MAX_T_VAL; } else { - if (bias != nullptr) + if (bias != nullptr) { logits[offset + tid] += bias[tid]; + } } } } template void invokeAddBiasEndMask( - T* logits, const T* bias, const int end_id, const bool* finished, const int m, const int n, cudaStream_t stream) + T* logits, const T* bias, const int* end_ids, const bool* finished, const int m, const int n, cudaStream_t stream) { dim3 grid(m); dim3 block(min(n, 1024)); /*n is the vocab_size, e.g., 30000, 7000.... vocab_size is usually very big. */ - addBiasEndMask<<>>(logits, bias, end_id, finished, n); + addBiasEndMask<<>>(logits, bias, end_ids, finished, n); } template void invokeAddBiasEndMask(float* logits, const float* bias, - const int end_id, + const int* end_ids, const bool* finished, const int m, const int n, @@ -147,24 +153,26 @@ template void invokeAddBiasEndMask(float* logits, template void invokeAddBiasEndMask(half* logits, const half* bias, - const int end_id, + const int* end_ids, const bool* finished, const int m, const int n, cudaStream_t stream); template -__global__ void topk_stage_2_opt3_sampling(const int* __restrict topk_tmp_id_buf, - T* topk_tmp_val_buf, - T* topk_tmp2_val_buf, - int* ids, - int* sequence_length, - bool* finished_buf, - float* cum_log_probs, - const int k, - curandState_t* curandstate, - const int end_id, - const int vocab_size) +__global__ void topk_topp_stage_2_opt3_sampling(const int* __restrict topk_tmp_id_buf, + T* topk_tmp_val_buf, + T* topk_tmp2_val_buf, + int* ids, + int* sequence_length, + bool* finished_buf, + float* cum_log_probs, + float* output_log_probs, + const int k, + const T prob_threshold, + curandState_t* curandstate, + const int* end_ids, + const int vocab_size) { const int size = k * BLOCKS_PER_BEAM_; const int tid = threadIdx.x; @@ -180,12 +188,12 @@ __global__ void topk_stage_2_opt3_sampling(const int* __restrict topk_tmp_id_buf __shared__ float s_max; T* s_val = topk_tmp_val_buf + batch_id * size; int* s_id = (int*)(array); - s_max = (float)0.0f; - s_sum = (float)0.0f; + s_max = 0.0f; + s_sum = 0.0f; TopK_2 partial; if (finished_buf != nullptr && finished_buf[batch_id] == true) { - ids[batch_id] = end_id; + ids[batch_id] = end_ids[batch_id]; return; } @@ -214,7 +222,7 @@ __global__ void topk_stage_2_opt3_sampling(const int* __restrict topk_tmp_id_buf // when cum_log_probs are computed, topk_tmp_val_buf (logits_buf_) are already pre-processed by // softmax_kernel - if (cum_log_probs == nullptr) { + if (cum_log_probs == nullptr && output_log_probs == nullptr) { total.u = __expf(total.u - s_max); } s_val2[ite] = total.u; @@ -223,14 +231,26 @@ __global__ void topk_stage_2_opt3_sampling(const int* __restrict topk_tmp_id_buf __syncthreads(); } if (tid == 0) { - rand_num = (float)curand_uniform(curandstate + blockIdx.x) * s_sum; + rand_num = (float)curand_uniform(curandstate + blockIdx.x) * (float)prob_threshold * s_sum; for (int i = 0; i < k; i++) { float exp_logit = s_val2[i]; rand_num = rand_num - exp_logit; - if (rand_num <= 0.0f) { + if (rand_num <= 0.0f || i == k - 1) { ids[batch_id] = topk_tmp_id_buf[batch_id * size + s_id[i]] % vocab_size; - if (cum_log_probs != nullptr) { - cum_log_probs[batch_id] = logf(exp_logit / s_sum); + if (cum_log_probs != nullptr || output_log_probs != nullptr) { + float log_prob = logf(exp_logit); + if (cum_log_probs != nullptr) { + cum_log_probs[batch_id] += log_prob; + } + if (output_log_probs != nullptr) { + // 'output_log_probs' is the probability induced by the top-k sampling. + // We normalize the probability 'exp_logit' of the selected token by + // the probability 's_sum' of a set of top-k tokens, meaning the log_prob + // is the probability of the selected token, conditioned on the event that + // it is selected, i.e., + // log_prob = log P(i | i is in top-k) = log(exp_logit / s_sum). + output_log_probs[batch_id] = log_prob - logf(s_sum); + } } break; } @@ -238,7 +258,7 @@ __global__ void topk_stage_2_opt3_sampling(const int* __restrict topk_tmp_id_buf if (sequence_length != nullptr && finished_buf != nullptr) { sequence_length[batch_id] = finished_buf[batch_id] ? sequence_length[batch_id] : sequence_length[batch_id] + 1; - finished_buf[batch_id] = ids[batch_id] == end_id ? 1 : 0; + finished_buf[batch_id] = ids[batch_id] == end_ids[batch_id] ? 1 : 0; } } } @@ -253,8 +273,8 @@ __global__ void topk_stage_2_opt3_sampling(const int* __restrict topk_tmp_id_buf finished_buf, \ candidate_num, \ vocab_size, \ - end_id); \ - topk_stage_2_opt3_sampling \ + end_ids); \ + topk_topp_stage_2_opt3_sampling \ <<>>(topk_tmp_id_buf, \ topk_tmp_val_buf, \ topk_tmp2_val_buf, \ @@ -262,9 +282,11 @@ __global__ void topk_stage_2_opt3_sampling(const int* __restrict topk_tmp_id_buf sequence_length, \ finished_buf, \ cum_log_probs, \ + output_log_probs, \ candidate_num, \ + 1.0f, \ curandstate, \ - end_id, \ + end_ids, \ vocab_size); \ break; @@ -276,10 +298,11 @@ void invokeTopKSampling(void* workspace, int* sequence_length, bool* finished_buf, float* cum_log_probs, + float* output_log_probs, curandState_t* curandstate, const int top_k, const int vocab_size_padded, - const int end_id, + const int* end_ids, cudaStream_t stream, const int batch_size) { @@ -331,10 +354,11 @@ template void invokeTopKSampling(void* workspace, int* sequence_length, bool* finished_buf, float* cum_log_probs, + float* output_log_probs, curandState_t* curandstate, const int top_k, const int vocab_size_padded, - const int end_id, + const int* end_ids, cudaStream_t stream, const int batch_size); @@ -345,93 +369,14 @@ template void invokeTopKSampling(void* workspace, int* sequence_length, bool* finished_buf, float* cum_log_probs, + float* output_log_probs, curandState_t* curandstate, const int top_k, const int vocab_size_padded, - const int end_id, + const int* end_ids, cudaStream_t stream, const int batch_size); -template -__global__ void topk_topp_sampling_kernel_v2(const int* __restrict topk_tmp_id_buf, - T* topk_tmp_val_buf, - T* topk_tmp2_val_buf, - int* ids, - int* sequence_length, - bool* finished_buf, - const int k, - const T prob_threshold, - curandState_t* curandstate, - const int end_id, - const int vocab_size) -{ - const int size = k * BLOCKS_PER_BEAM_; - const int tid = threadIdx.x; - const int batch_id = blockIdx.x; - const bool IS_FP16 = std::is_same::value; - const T MAX_T_VAL = (IS_FP16) ? HALF_FLT_MAX : FLT_MAX; - - typedef cub::BlockReduce, BLOCK_SIZE_> BlockReduce; - __shared__ typename BlockReduce::TempStorage temp_storage; - extern __shared__ char array[]; - __shared__ float rand_num; - __shared__ float s_max; - __shared__ float s_sum; - T* s_val = topk_tmp_val_buf + batch_id * size; - int* s_id = (int*)(array); - s_max = 0.0f; - s_sum = 0.0f; - TopK_2 partial; - - if (finished_buf != nullptr && finished_buf[batch_id] == true) { - ids[batch_id] = end_id; - return; - } - - for (int index = tid; index < size; index += BLOCK_SIZE_) { - topk_tmp2_val_buf[batch_id * size + index] = topk_tmp_val_buf[batch_id * size + index]; - } - __syncthreads(); - T* s_val2 = topk_tmp2_val_buf + batch_id * size; - - for (int ite = 0; ite < k; ite++) { - partial.init(); -#pragma unroll - for (int i = tid; i < size; i += BLOCK_SIZE_) { - partial.insert((float)s_val[i], i); - } - - TopK_2 total = BlockReduce(temp_storage).Reduce(partial, reduce_topk_op_2); - - if (ite == 0) - s_max = total.u; - - if (tid == 0) { - s_id[ite] = total.p; - s_val[total.p] = -MAX_T_VAL; - total.u = __expf(total.u - s_max); - s_val2[total.p] = (T)total.u; - s_sum += total.u; - } - __syncthreads(); - } - if (tid == 0) { - rand_num = (float)curand_uniform(curandstate + blockIdx.x) * (float)prob_threshold * s_sum; - for (int i = 0; i < k; i++) { - rand_num = rand_num - (float)s_val2[s_id[i]]; - if (rand_num <= 0.0f) { - ids[batch_id] = topk_tmp_id_buf[batch_id * size + s_id[i]] % vocab_size; - break; - } - } - if (sequence_length != nullptr && finished_buf != nullptr) { - sequence_length[batch_id] = - finished_buf[batch_id] ? sequence_length[batch_id] : sequence_length[batch_id] + 1; - finished_buf[batch_id] = ids[batch_id] == end_id ? 1 : 0; - } - } -} - #define CASE_K(K_MIN, K_MAX, BLOCK_SIZE_1_, BLOCK_SIZE_2_, BLOCKS_PER_BEAM_) \ case K_MIN ... K_MAX: \ topk_stage_1_opt3 \ @@ -442,19 +387,21 @@ __global__ void topk_topp_sampling_kernel_v2(const int* __restrict topk_tmp_id_b finished_buf, \ candidate_num, \ vocab_size, \ - end_id); \ - topk_topp_sampling_kernel_v2 \ - <<>>(topk_tmp_id_buf, \ - topk_tmp_val_buf, \ - topk_tmp2_val_buf, \ - output_ids, \ - sequence_length, \ - finished_buf, \ - candidate_num, \ - prob_threshold, \ - curandstate, \ - end_id, \ - vocab_size); \ + end_ids); \ + topk_topp_stage_2_opt3_sampling \ + <<>>(topk_tmp_id_buf, \ + topk_tmp_val_buf, \ + topk_tmp2_val_buf, \ + output_ids, \ + sequence_length, \ + finished_buf, \ + cum_log_probs, \ + output_log_probs, \ + candidate_num, \ + prob_threshold, \ + curandstate, \ + end_ids, \ + vocab_size); \ break; template @@ -464,12 +411,14 @@ void invokeTopKTopPSampling(void* workspace, const T* logits, int* sequence_length, bool* finished_buf, + float* cum_log_probs, + float* output_log_probs, curandState_t* curandstate, const int batch_size, const int top_k, const T top_p, const int vocab_size_padded, - const int end_id, + const int* end_ids, cudaStream_t stream) { // Here, we put batch size as an argument because the batch size of initialization @@ -518,12 +467,14 @@ template void invokeTopKTopPSampling(void* workspace, const float* logits, int* sequence_length, bool* finished_buf, + float* cum_log_probs, + float* output_log_probs, curandState_t* curandstate, const int batch_size, const int top_k, const float top_p, const int vocab_size_padded, - const int end_id, + const int* end_ids, cudaStream_t stream); template void invokeTopKTopPSampling(void* workspace, @@ -532,11 +483,13 @@ template void invokeTopKTopPSampling(void* workspace, const half* logits, int* sequence_length, bool* finished_buf, + float* cum_log_probs, + float* output_log_probs, curandState_t* curandstate, const int batch_size, const int top_k, const half top_p, const int vocab_size_padded, - const int end_id, + const int* end_ids, cudaStream_t stream); -} // namespace fastertransformer \ No newline at end of file +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/sampling_topk_kernels.h b/src/fastertransformer/kernels/sampling_topk_kernels.h index 7393becdf..0adef4fc3 100644 --- a/src/fastertransformer/kernels/sampling_topk_kernels.h +++ b/src/fastertransformer/kernels/sampling_topk_kernels.h @@ -16,8 +16,8 @@ */ #pragma once +#include "src/fastertransformer/utils/logger.h" #include - namespace fastertransformer { template @@ -28,10 +28,11 @@ void invokeTopKSampling(void* workspace, int* sequence_length, bool* finished_buf, float* cum_log_probs, + float* output_log_probs, curandState_t* curandstate, const int top_k, const int vocab_size_padded, - const int end_id, + const int* end_ids, cudaStream_t stream, const int batch_size); @@ -42,7 +43,7 @@ void invokeCurandInitialize(curandState_t* state, template void invokeAddBiasEndMask( - T* logits, const T* bias, const int end_id, const bool* finished, const int m, const int n, cudaStream_t stream); + T* logits, const T* bias, const int* end_ids, const bool* finished, const int m, const int n, cudaStream_t stream); template void invokeTopKTopPSampling(void* workspace, @@ -51,12 +52,14 @@ void invokeTopKTopPSampling(void* workspace, const T* logits, int* sequence_length, bool* finished_buf, + float* cum_log_probs, + float* output_log_probs, curandState_t* curandstate, const int batch_size, const int top_k, const T top_p, const int vocab_size_padded, - const int end_id, + const int* end_ids, cudaStream_t stream); } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/sampling_topp_kernels.cu b/src/fastertransformer/kernels/sampling_topp_kernels.cu index e7e675d3c..5b7aa9411 100644 --- a/src/fastertransformer/kernels/sampling_topp_kernels.cu +++ b/src/fastertransformer/kernels/sampling_topp_kernels.cu @@ -14,7 +14,13 @@ * limitations under the License. */ +#ifndef CUDART_VERSION +#error CUDART_VERSION Undefined! +#elif (CUDART_VERSION >= 11050) +#include +#else #include "3rdparty/cub/cub.cuh" +#endif #include "src/fastertransformer/kernels/reduce_kernel_utils.cuh" #include "src/fastertransformer/kernels/sampling_topp_kernels.h" @@ -27,48 +33,60 @@ namespace fastertransformer { namespace segmented_topp_impl { -template -using Copy_half_t = - typename std::conditional::type - >::type - >::type; +template +using Copy_half_t = typename std::conditional< + HALF_ELEMENTS_PER_WARP_LOAD == 32, + half, + typename std::conditional::type>::type>:: + type; -template +template using Copy_t = Copy_half_t; -template< typename T> +template struct Float_as_int_ {}; -template<> struct Float_as_int_ { using Type = uint32_t; }; -template<> struct Float_as_int_<__half> { using Type = uint16_t; }; +template<> +struct Float_as_int_ { + using Type = uint32_t; +}; +template<> +struct Float_as_int_<__half> { + using Type = uint16_t; +}; using kernel_params_float = Segmented_topk_kernel_params; using kernel_params_float_1 = Segmented_topk_kernel_params; -using kernel_params_half = Segmented_topk_kernel_params<__half, int32_t, 256, 4>; +using kernel_params_half = Segmented_topk_kernel_params<__half, int32_t, 256, 4>; using kernel_params_half_1 = Segmented_topk_kernel_params<__half, int32_t, 256, 1>; /////////////////////////////////////////////////////////////////////////////////////////////////// -static inline __device__ float to_float(uint32_t src) { +static inline __device__ float to_float(uint32_t src) +{ return __int_as_float(src); } /////////////////////////////////////////////////////////////////////////////////////////////////// -static inline __device__ float to_float(uint16_t src) { +static inline __device__ float to_float(uint16_t src) +{ __half dst = __ushort_as_half(src); - return __half2float(dst); + return __half2float(dst); } /////////////////////////////////////////////////////////////////////////////////////////////////// // sort one segment per cta template -__global__ void blockSortKernel(const T_SCORE *d_keys_in, T_SCORE *d_keys_out, - const int32_t *d_values_in, int32_t *d_values_out, - const int32_t* active_counts, int num_items_, int stride_items, +__global__ void blockSortKernel(const T_SCORE* d_keys_in, + T_SCORE* d_keys_out, + const int32_t* d_values_in, + int32_t* d_values_out, + const int32_t* active_counts, + int num_items_, + int stride_items, int num_segments) { // Specialize BlockRadixSort for a 1D block @@ -77,10 +95,11 @@ __global__ void blockSortKernel(const T_SCORE *d_keys_in, T_SCORE *d_keys_out, // Allocate shared memory for BlockRadixSort __shared__ typename BlockRadixSort::TempStorage temp_storage; - if (blockIdx.x >= num_segments) + if (blockIdx.x >= num_segments) { return; + } - int num_items = active_counts[blockIdx.x]; // > num_items_ ? num_items_ : active_counts[blockIdx.x]; + int num_items = active_counts[blockIdx.x]; // > num_items_ ? num_items_ : active_counts[blockIdx.x]; if (num_items == 0) { return; @@ -91,32 +110,35 @@ __global__ void blockSortKernel(const T_SCORE *d_keys_in, T_SCORE *d_keys_out, int32_t thread_values[ELEMENTS_PER_THREAD]; int32_t block_offset = blockIdx.x * stride_items; - cub::LoadDirectStriped(threadIdx.x, d_keys_out + block_offset, thread_keys, - num_items, 0); - cub::LoadDirectStriped(threadIdx.x, d_values_out + block_offset, thread_values, - num_items, -1); + cub::LoadDirectStriped(threadIdx.x, d_keys_out + block_offset, thread_keys, num_items, 0); + cub::LoadDirectStriped(threadIdx.x, d_values_out + block_offset, thread_values, num_items, -1); __syncthreads(); // Collectively sort the keys and values among block threads BlockRadixSort(temp_storage).SortDescendingBlockedToStriped(thread_keys, thread_values); // Store output in striped fashion - cub::StoreDirectStriped(threadIdx.x, d_keys_out + block_offset, thread_keys, - num_items); - cub::StoreDirectStriped(threadIdx.x, d_values_out + block_offset, thread_values, - num_items); + cub::StoreDirectStriped(threadIdx.x, d_keys_out + block_offset, thread_keys, num_items); + cub::StoreDirectStriped(threadIdx.x, d_values_out + block_offset, thread_values, num_items); } /////////////////////////////////////////////////////////////////////////////////////////////////// /// block sort kernel -template -void blockSort(const T_SCORE *d_keys_in, T_SCORE *d_keys_out, const int32_t *d_values_in, - int32_t *d_values_out, const int32_t* active_counts, int num_items, int stride_items, - int num_segments, cudaStream_t stream) +template +void blockSort(const T_SCORE* d_keys_in, + T_SCORE* d_keys_out, + const int32_t* d_values_in, + int32_t* d_values_out, + const int32_t* active_counts, + int num_items, + int stride_items, + int num_segments, + cudaStream_t stream) { - if (num_items == 0) + if (num_items == 0) { return; + } int kernel_index = div_up(num_items, 128) - 1; int warps_per_cta = (kernel_index + 1) * 128 / 32; @@ -129,10 +151,14 @@ void blockSort(const T_SCORE *d_keys_in, T_SCORE *d_keys_out, const int32_t *d_v dim3 block(warps_per_cta * 32); dim3 grid(num_segments); - using kernel_func = void (*)(const T_SCORE *d_keys_in, T_SCORE *d_keys_out, - const int32_t *d_values_in, int32_t *d_values_out, - const int32_t* active_counts, int num_items, int stride_items, - int num_segments); + using kernel_func = void (*)(const T_SCORE* d_keys_in, + T_SCORE* d_keys_out, + const int32_t* d_values_in, + int32_t* d_values_out, + const int32_t* active_counts, + int num_items, + int stride_items, + int num_segments); static const kernel_func kernel_funcs[] = { &blockSortKernel, @@ -147,19 +173,17 @@ void blockSort(const T_SCORE *d_keys_in, T_SCORE *d_keys_out, const int32_t *d_v &blockSortKernel, //&blockSortKernel, }; - kernel_funcs[kernel_index]<<>>(d_keys_in, d_keys_out, - d_values_in, d_values_out, active_counts, num_items, - stride_items, num_segments); + kernel_funcs[kernel_index]<<>>( + d_keys_in, d_keys_out, d_values_in, d_values_out, active_counts, num_items, stride_items, num_segments); } /////////////////////////////////////////////////////////////////////////////////////////////////// -struct BlockPrefixCallbackOp -{ +struct BlockPrefixCallbackOp { // Running prefix int running_total; // Constructor - __device__ BlockPrefixCallbackOp(uint32_t running_total) : running_total(running_total) {} + __device__ BlockPrefixCallbackOp(uint32_t running_total): running_total(running_total) {} // Callback operator to be entered by the first warp of threads in the block. // Thread-0 is responsible for returning a value for seeding the block-wide scan. __device__ int operator()(uint32_t block_aggregate) @@ -181,9 +205,9 @@ constexpr float P_EPSILON = 0.01F; constexpr int MAX_TOP_K = 3072; constexpr int WARP_SZ = 32; -template -__global__ __launch_bounds__(Kernel_params::BLOCK_THREADS, 1) -void segmented_top_p_single_pass(TopKPerSegmentParams params) +template +__global__ __launch_bounds__(Kernel_params::BLOCK_THREADS, + 1) void segmented_top_p_single_pass(TopKPerSegmentParams params) { #if DO_DEBUG_PRINT constexpr int debug_block_id = 26; @@ -195,26 +219,28 @@ void segmented_top_p_single_pass(TopKPerSegmentParams params) // 4 fp16 keys or 2 fp32 keys constexpr int KEYS_PER_LDG = Kernel_params::KEYS_PER_LDG; typedef Copy_t copy_t; - union access_t - { - copy_t v; - Int_Key_Data_Type x[KEYS_PER_LDG]; // supported size 1,2,4 + union access_t { + copy_t v; + Int_Key_Data_Type x[KEYS_PER_LDG]; // supported size 1,2,4 }; - constexpr int BLOCK_THREADS = Kernel_params::BLOCK_THREADS; + constexpr int BLOCK_THREADS = Kernel_params::BLOCK_THREADS; constexpr int ITEMS_PER_THREAD_IN_REGS = ITEMS_PER_THREAD * (1.0F - SMEM_FRACTION); constexpr int ITEMS_PER_THREAD_IN_SMEM = ITEMS_PER_THREAD - ITEMS_PER_THREAD_IN_REGS; #if DO_DEBUG_PRINT == 1 if (blockIdx.x == 0 && threadIdx.x == 0) { - printf("ITEMS_PER_THREAD, ITEMS_PER_THREAD_IN_REGS, ITEMS_PER_THREAD_IN_SMEM = %d, %d, %d\n", ITEMS_PER_THREAD, ITEMS_PER_THREAD_IN_REGS, ITEMS_PER_THREAD_IN_SMEM); + printf("ITEMS_PER_THREAD, ITEMS_PER_THREAD_IN_REGS, ITEMS_PER_THREAD_IN_SMEM = %d, %d, %d\n", + ITEMS_PER_THREAD, + ITEMS_PER_THREAD_IN_REGS, + ITEMS_PER_THREAD_IN_SMEM); } #endif constexpr int MIN_KEY = 0; - constexpr int ENABLED_PER_THREAD = (ITEMS_PER_THREAD + 32 - 1) / 32; - extern __shared__ int2 dynamic_smem[]; + constexpr int ENABLED_PER_THREAD = (ITEMS_PER_THREAD + 32 - 1) / 32; + extern __shared__ int2 dynamic_smem[]; int2* smem_selected_elements = dynamic_smem; Int_Key_Data_Type* smem_thread_items = reinterpret_cast(smem_selected_elements + MAX_TOP_K); @@ -228,7 +254,7 @@ void segmented_top_p_single_pass(TopKPerSegmentParams params) __shared__ float smem_p_sum_total; __shared__ union { - typename BlockScan::TempStorage scan; + typename BlockScan::TempStorage scan; typename BlockReduce::TempStorage reduce; } temp_storage; @@ -248,9 +274,9 @@ void segmented_top_p_single_pass(TopKPerSegmentParams params) return; } - Int_Key_Data_Type *gmem_src_keys = reinterpret_cast(params.gmem_src_keys); - Int_Key_Data_Type *gmem_dst_keys = reinterpret_cast(params.gmem_dst_keys); - int32_t *gmem_dst_vals = reinterpret_cast(params.gmem_dst_vals); + Int_Key_Data_Type* gmem_src_keys = reinterpret_cast(params.gmem_src_keys); + Int_Key_Data_Type* gmem_dst_keys = reinterpret_cast(params.gmem_dst_keys); + int32_t* gmem_dst_vals = reinterpret_cast(params.gmem_dst_vals); constexpr int BITS_IN_KEY = sizeof(Key_Data_Type) * 8; @@ -263,7 +289,7 @@ void segmented_top_p_single_pass(TopKPerSegmentParams params) int index_limit = items; Int_Key_Data_Type thread_items[ITEMS_PER_THREAD_IN_REGS] = {0}; -// Load all keys into registers and smem + // Load all keys into registers and smem const int lane_id = threadIdx.x % WARP_SZ; const int warp_id = threadIdx.x / WARP_SZ; constexpr int NUM_WARPS = BLOCK_THREADS / WARP_SZ; @@ -274,9 +300,9 @@ void segmented_top_p_single_pass(TopKPerSegmentParams params) } // registers - for (int iter = 0; iter < ITEMS_PER_THREAD_IN_REGS ; iter++ ) { + for (int iter = 0; iter < ITEMS_PER_THREAD_IN_REGS; iter++) { int offset = (iter + threadIdx.x * ITEMS_PER_THREAD); - thread_items[iter] = (offset < index_limit)? gmem_src_keys[offset] : MIN_KEY; + thread_items[iter] = (offset < index_limit) ? gmem_src_keys[offset] : MIN_KEY; } // shared memory @@ -284,18 +310,18 @@ void segmented_top_p_single_pass(TopKPerSegmentParams params) for (int iter = lane_id * KEYS_PER_LDG; iter < ITEMS_PER_THREAD_IN_SMEM; iter += WARP_SZ * KEYS_PER_LDG) { int offset = iter + c * ITEMS_PER_THREAD + ITEMS_PER_THREAD_IN_REGS; access_t val; - val.v = (offset < index_limit)? *reinterpret_cast(&gmem_src_keys[offset]) : ZERO.v; - for (int i = 0; i < KEYS_PER_LDG; i++) { - smem_thread_items[c + (iter + i) * BLOCK_THREADS] = val.x[i]; + val.v = (offset < index_limit) ? *reinterpret_cast(&gmem_src_keys[offset]) : ZERO.v; + for (int i = 0; i < KEYS_PER_LDG; i++) { + smem_thread_items[c + (iter + i) * BLOCK_THREADS] = val.x[i]; } - //smem_thread_items[c + iter * BLOCK_THREADS] = (offset < index_limit)? gmem_src_keys[offset] : MIN_KEY; + // smem_thread_items[c + iter * BLOCK_THREADS] = (offset < index_limit)? gmem_src_keys[offset] : MIN_KEY; } } Int_Key_Data_Type select_mask = 0; Int_Key_Data_Type save_mask = 0; - //Int_Key_Data_Type save_bit = 0; + // Int_Key_Data_Type save_bit = 0; // set to true when we finish with too few keys, so we go back to last_save_mask one more time bool is_last_iter = false; @@ -307,11 +333,11 @@ void segmented_top_p_single_pass(TopKPerSegmentParams params) // iterate over bits. // skip the first two bits, // * bit 31 is the sign bit. all values are positive - // * bit 30 is only set for values >= 2, but the input consists only of values in + // * bit 30 is only set for values >= 2, but the input consists only of values in // the range of [0,1] constexpr int START_BIT = BITS_IN_KEY - 1; constexpr int SKIP_BITS = 2; - constexpr Int_Key_Data_Type ONE = (Int_Key_Data_Type) 1; + constexpr Int_Key_Data_Type ONE = (Int_Key_Data_Type)1; uint32_t selected; uint32_t sc; float p_sum_total = 0.0F; @@ -329,30 +355,30 @@ void segmented_top_p_single_pass(TopKPerSegmentParams params) // bit of enabled auto val = thread_items[item]; uint32_t is_enabled = uint32_t(((val ^ bit_mask) & bit_mask) == 0); - //thread_sum += (is_enabled)? to_float(val) : 0.0F; + // thread_sum += (is_enabled)? to_float(val) : 0.0F; thread_sum += is_enabled * to_float(val); - enabled[item / 32] |= is_enabled<< (item % 32); + enabled[item / 32] |= is_enabled << (item % 32); } for (int item = 0; item < ITEMS_PER_THREAD_IN_SMEM; ++item) { int idx = threadIdx.x + item * BLOCK_THREADS; - //int idx = item + ITEMS_PER_THREAD_IN_SMEM * threadIdx.x; + // int idx = item + ITEMS_PER_THREAD_IN_SMEM * threadIdx.x; auto val = smem_thread_items[idx]; uint32_t is_enabled = uint32_t(((val ^ bit_mask) & bit_mask) == 0); - //thread_sum += (is_enabled)? to_float(val) : 0.0F; + // thread_sum += (is_enabled)? to_float(val) : 0.0F; thread_sum += is_enabled * to_float(val); - enabled[(ITEMS_PER_THREAD_IN_REGS + item) / 32] |= is_enabled << ( (ITEMS_PER_THREAD_IN_REGS + item) % 32); + enabled[(ITEMS_PER_THREAD_IN_REGS + item) / 32] |= is_enabled << ((ITEMS_PER_THREAD_IN_REGS + item) % 32); } selected = 0; - #pragma unroll - for (int i = 0; i < ENABLED_PER_THREAD; i++){ +#pragma unroll + for (int i = 0; i < ENABLED_PER_THREAD; i++) { selected += __popc(enabled[i]); } - float p_sum = BlockReduce(temp_storage.reduce).Sum(thread_sum); + float p_sum = BlockReduce(temp_storage.reduce).Sum(thread_sum); - if (threadIdx.x == 0) { + if (threadIdx.x == 0) { p_sum_total += p_sum; smem_p_sum_total = p_sum_total; } @@ -362,7 +388,7 @@ void segmented_top_p_single_pass(TopKPerSegmentParams params) __syncthreads(); BlockScan(temp_storage.scan).ExclusiveSum(selected, offset, prefix_op); - + if (threadIdx.x == 0) { smem_selected_count = prefix_op.running_total; } @@ -371,63 +397,76 @@ void segmented_top_p_single_pass(TopKPerSegmentParams params) sc = smem_selected_count; __syncthreads(); - //float p_diff = params.top_p - p_sum_total; + // float p_diff = params.top_p - p_sum_total; float p_diff = p_sum_total - params.top_p; - if ((p_sum_total <= params.top_p + P_EPSILON && p_sum_total > 0) || - (p_sum_total > params.top_p && sc <= MAX_TOP_K ) || - (bit == 0 && p_sum_total > 0) || is_last_iter ) { - + if ((p_sum_total <= params.top_p + P_EPSILON && p_sum_total > 0) + || (p_sum_total > params.top_p && sc <= MAX_TOP_K) || (bit == 0 && p_sum_total > 0) || is_last_iter) { #if DO_DEBUG_PRINT == 1 -__syncthreads(); -if (threadIdx.x == 0 && blockIdx.x == debug_block_id) { - sc = smem_selected_count; - printf("bit %d bit_mask %d offset %d (%d, %d), sc = %d, p_sum = %f, p_sum_total = %f\n", bit, bit_mask, offset, blockIdx.x, threadIdx.x, sc, p_sum, p_sum_total); - } -__syncthreads(); + __syncthreads(); + if (threadIdx.x == 0 && blockIdx.x == debug_block_id) { + sc = smem_selected_count; + printf("bit %d bit_mask %d offset %d (%d, %d), sc = %d, p_sum = %f, p_sum_total = %f\n", + bit, + bit_mask, + offset, + blockIdx.x, + threadIdx.x, + sc, + p_sum, + p_sum_total); + } + __syncthreads(); #endif - for (int item = 0; item < ITEMS_PER_THREAD_IN_REGS; ++item) { + for (int item = 0; item < ITEMS_PER_THREAD_IN_REGS; ++item) { // last condition should not trigger with well trained weights, but we will get // illegal mewmory access if we do not have one in those rare cases - if (enabled[item / 32] & (ONE << (item % 32)) && offset < MAX_TOP_K) { - smem_selected_elements[offset] = make_int2(thread_items[item], item + threadIdx.x * ITEMS_PER_THREAD); + if (enabled[item / 32] & (ONE << (item % 32)) && offset < MAX_TOP_K) { + smem_selected_elements[offset] = + make_int2(thread_items[item], item + threadIdx.x * ITEMS_PER_THREAD); ++offset; thread_items[item] = MIN_KEY; } } for (int item = 0; item < ITEMS_PER_THREAD_IN_SMEM; ++item) { - if (enabled[(item + ITEMS_PER_THREAD_IN_REGS) / 32] & (ONE << ((item + ITEMS_PER_THREAD_IN_REGS) % 32)) && offset < MAX_TOP_K) { + if (enabled[(item + ITEMS_PER_THREAD_IN_REGS) / 32] & (ONE << ((item + ITEMS_PER_THREAD_IN_REGS) % 32)) + && offset < MAX_TOP_K) { int idx = threadIdx.x + item * BLOCK_THREADS; - //int idx = item + ITEMS_PER_THREAD_IN_SMEM * threadIdx.x; - //if (idx < params.num_items_per_segment_in_smem) + // int idx = item + ITEMS_PER_THREAD_IN_SMEM * threadIdx.x; + // if (idx < params.num_items_per_segment_in_smem) { - smem_selected_elements[offset] = make_int2(smem_thread_items[idx], item + threadIdx.x * ITEMS_PER_THREAD + ITEMS_PER_THREAD_IN_REGS); + smem_selected_elements[offset] = make_int2( + smem_thread_items[idx], item + threadIdx.x * ITEMS_PER_THREAD + ITEMS_PER_THREAD_IN_REGS); ++offset; smem_thread_items[idx] = MIN_KEY; } } } - } #if DO_DEBUG_PRINT == 1 -if (threadIdx.x == 0 && blockIdx.x == debug_block_id) { - printf("!!!! bit %d bit_mask %d offset %d (%d, %d), sc = %d, p_sum = %f, p_sum_total = %f\n", bit, bit_mask, offset, blockIdx.x, threadIdx.x, sc, p_sum, p_sum_total); - } + if (threadIdx.x == 0 && blockIdx.x == debug_block_id) { + printf("!!!! bit %d bit_mask %d offset %d (%d, %d), sc = %d, p_sum = %f, p_sum_total = %f\n", + bit, + bit_mask, + offset, + blockIdx.x, + threadIdx.x, + sc, + p_sum, + p_sum_total); + } #endif - if (p_diff <= P_EPSILON && p_diff >= 0 || - (p_sum_total > params.top_p && sc <= MAX_TOP_K ) || - bit == 0) { + if (p_diff <= P_EPSILON && p_diff >= 0 || (p_sum_total > params.top_p && sc <= MAX_TOP_K) || bit == 0) { break; } // p > top_p - else if (p_diff > P_EPSILON) - { + else if (p_diff > P_EPSILON) { // There are too many bits in the current selection // Save the current state and go to the next bit // If there are not enough items left using the next bit @@ -435,8 +474,7 @@ if (threadIdx.x == 0 && blockIdx.x == debug_block_id) { save_mask = bit_mask; select_mask |= bit_mask; - if (threadIdx.x == 0) - { + if (threadIdx.x == 0) { smem_selected_count = old_selected_count; p_sum_total = old_p_sum_total; @@ -451,7 +489,7 @@ if (threadIdx.x == 0 && blockIdx.x == debug_block_id) { save_mask = 0; } if (threadIdx.x == 0) { - old_selected_count = smem_selected_count; + old_selected_count = smem_selected_count; old_p_sum_total = p_sum_total; } } @@ -460,12 +498,14 @@ if (threadIdx.x == 0 && blockIdx.x == debug_block_id) { __syncthreads(); // store data to global memory - sc = (p_sum_total < params.top_p)? params.num_items / params.num_segments : smem_selected_count; + sc = (p_sum_total < params.top_p) ? params.num_items / params.num_segments : smem_selected_count; if (threadIdx.x == 0) { params.gmem_active_count_per_segment[segment] = sc; atomicMax(params.gmem_active_count_total, sc); } - if (sc >= MAX_TOP_K) return; + if (sc >= MAX_TOP_K) { + return; + } for (int i = threadIdx.x; i < sc; i += blockDim.x) { int2 selected_element = smem_selected_elements[i]; gmem_dst_keys[i] = selected_element.x; @@ -475,53 +515,55 @@ if (threadIdx.x == 0 && blockIdx.x == debug_block_id) { /////////////////////////////////////////////////////////////////////////////////////////////////// -template -int getSmemSizeAndCheck(const TopKPerSegmentContext& context, const TopKPerSegmentParams& params) { +template +int getSmemSizeAndCheck(const TopKPerSegmentContext& context, const TopKPerSegmentParams& params) +{ constexpr int BLOCK_THREADS = Kernel_params::BLOCK_THREADS; using Key_Data_Type = typename Kernel_params::Key_Data_Type; int num_items_per_segment = params.num_items / params.num_segments; constexpr int ITEMS_INCREMENT = Kernel_params::ITEMS_INCREMENT; int kernel_index = div_up(num_items_per_segment, BLOCK_THREADS * ITEMS_INCREMENT) - 1; - + int smem_size = MAX_TOP_K * sizeof(int2); const int items_per_thread = (kernel_index + 1) * ITEMS_INCREMENT; - const int items_per_thread_in_regs = items_per_thread * (1.0F - SMEM_FRACTION); + const int items_per_thread_in_regs = items_per_thread * (1.0F - SMEM_FRACTION); const int items_per_thread_in_smem = items_per_thread - items_per_thread_in_regs; constexpr int KEYS_PER_LDG = Kernel_params::KEYS_PER_LDG; - smem_size += items_per_thread_in_smem * - BLOCK_THREADS * sizeof(typename Float_as_int_::Type); + smem_size += items_per_thread_in_smem * BLOCK_THREADS * sizeof(typename Float_as_int_::Type); int keys_per_ldg = 2 * sizeof(Key_Data_Type) / 2; - if ( smem_size + BLOCK_THREADS * sizeof(float) > context.sm_shared_size || // dynamic + static memory - items_per_thread_in_regs + items_per_thread_in_smem != items_per_thread || - params.top_p + P_EPSILON > 1.0F || - items_per_thread_in_regs % keys_per_ldg != 0 || - items_per_thread_in_smem % keys_per_ldg != 0 || - num_items_per_segment % keys_per_ldg != 0 ) { - return -1; - } + if (smem_size + BLOCK_THREADS * sizeof(float) > context.sm_shared_size || // dynamic + static memory + items_per_thread_in_regs + items_per_thread_in_smem != items_per_thread || params.top_p + P_EPSILON > 1.0F + || items_per_thread_in_regs % keys_per_ldg != 0 || items_per_thread_in_smem % keys_per_ldg != 0 + || num_items_per_segment % keys_per_ldg != 0) { + return -1; + } return smem_size; } /////////////////////////////////////////////////////////////////////////////////////////////////// -int getSmemSizeAndCheck(const TopKPerSegmentContext& context, - const TopKPerSegmentParams& params, - const DType_t DT_SCORE) { +int getSmemSizeAndCheck(const TopKPerSegmentContext& context, + const TopKPerSegmentParams& params, + const DType_t DT_SCORE) +{ int num_items_per_segment = params.num_items / params.num_segments; if (DT_SCORE == kFLOAT) { if (num_items_per_segment % 2 == 0) { return getSmemSizeAndCheck(context, params); - } else { + } + else { return getSmemSizeAndCheck(context, params); } - } else { + } + else { if (num_items_per_segment % 4 == 0) { return getSmemSizeAndCheck(context, params); - } else { + } + else { return getSmemSizeAndCheck(context, params); } } @@ -529,10 +571,11 @@ int getSmemSizeAndCheck(const TopKPerSegmentContext& context, /////////////////////////////////////////////////////////////////////////////////////////////////// -template -void segmentedTopPSinglePass_dispatch(const TopKPerSegmentParams& params, - const TopKPerSegmentContext& context, - cudaStream_t stream) { +template +void segmentedTopPSinglePass_dispatch(const TopKPerSegmentParams& params, + const TopKPerSegmentContext& context, + cudaStream_t stream) +{ constexpr int BLOCK_THREADS = Kernel_params::BLOCK_THREADS; using Key_Data_Type = typename Kernel_params::Key_Data_Type; @@ -543,67 +586,83 @@ void segmentedTopPSinglePass_dispatch(const TopKPerSegmentParams& params, constexpr int ITEMS_INCREMENT = Kernel_params::ITEMS_INCREMENT; int kernel_index = div_up(num_items_per_segment, BLOCK_THREADS * ITEMS_INCREMENT) - 1; - #define KERNEL_RUN(INDEX) \ - { \ - if( smem_size > 0 ) \ - check_cuda_error(cudaFuncSetAttribute( \ - segmented_top_p_single_pass< \ - Kernel_params, \ - ITEMS_INCREMENT * (INDEX + 1)>, \ - cudaFuncAttributeMaxDynamicSharedMemorySize, \ - smem_size)); \ - segmented_top_p_single_pass< \ - Kernel_params, \ - ITEMS_INCREMENT * (INDEX + 1)><<>>(params); } +#define KERNEL_RUN(INDEX) \ + { \ + if (smem_size > 0) \ + check_cuda_error( \ + cudaFuncSetAttribute(segmented_top_p_single_pass, \ + cudaFuncAttributeMaxDynamicSharedMemorySize, \ + smem_size)); \ + segmented_top_p_single_pass \ + <<>>(params); \ + } int smem_size = getSmemSizeAndCheck(context, params); dim3 grid_dim(params.num_segments, 1); - switch(kernel_index) { - case 0: KERNEL_RUN(0) break; - case 1: KERNEL_RUN(1) break; - case 2: KERNEL_RUN(2) break; - case 3: KERNEL_RUN(3) break; - case 4: KERNEL_RUN(4) break; - case 5: KERNEL_RUN(5) break; - case 6: KERNEL_RUN(6) break; - case 7: KERNEL_RUN(7) break; + switch (kernel_index) { + case 0: + KERNEL_RUN(0) break; + case 1: + KERNEL_RUN(1) break; + case 2: + KERNEL_RUN(2) break; + case 3: + KERNEL_RUN(3) break; + case 4: + KERNEL_RUN(4) break; + case 5: + KERNEL_RUN(5) break; + case 6: + KERNEL_RUN(6) break; + case 7: + KERNEL_RUN(7) break; default: exit(1); } - } /////////////////////////////////////////////////////////////////////////////////////////////////// -template -void topPPerSegment_dispatch( - const TopKPerSegmentContext& context, - TopKPerSegmentParams& params, - void *temp_storage, - size_t& temp_storage_bytes, - cudaStream_t stream) { +template +void topPPerSegment_dispatch(const TopKPerSegmentContext& context, + TopKPerSegmentParams& params, + void* temp_storage, + size_t& temp_storage_bytes, + cudaStream_t stream) +{ using Key_Data_Type = typename Kernel_params::Key_Data_Type; using Value_Data_Type = typename Kernel_params::Value_Data_Type; - if (temp_storage == nullptr ) { + if (temp_storage == nullptr) { if (params.num_segments > 1) { - cub::DeviceSegmentedRadixSort::SortPairsDescending(temp_storage, temp_storage_bytes, - reinterpret_cast(params.gmem_src_keys), - reinterpret_cast(params.gmem_dst_keys), - reinterpret_cast(params.gmem_src_vals), - reinterpret_cast(params.gmem_dst_vals), - params.num_items, params.num_segments, - params.gmem_begin_offsets, params.gmem_end_offsets, 0, sizeof(Key_Data_Type) * 8, stream); - } else { - cub::DeviceRadixSort::SortPairsDescending(temp_storage, temp_storage_bytes, - reinterpret_cast(params.gmem_src_keys), - reinterpret_cast(params.gmem_dst_keys), - reinterpret_cast(params.gmem_src_vals), - reinterpret_cast(params.gmem_dst_vals), - params.num_items, 0, sizeof(Key_Data_Type) * 8, stream); + cub::DeviceSegmentedRadixSort::SortPairsDescending(temp_storage, + temp_storage_bytes, + reinterpret_cast(params.gmem_src_keys), + reinterpret_cast(params.gmem_dst_keys), + reinterpret_cast(params.gmem_src_vals), + reinterpret_cast(params.gmem_dst_vals), + params.num_items, + params.num_segments, + params.gmem_begin_offsets, + params.gmem_end_offsets, + 0, + sizeof(Key_Data_Type) * 8, + stream); + } + else { + cub::DeviceRadixSort::SortPairsDescending(temp_storage, + temp_storage_bytes, + reinterpret_cast(params.gmem_src_keys), + reinterpret_cast(params.gmem_dst_keys), + reinterpret_cast(params.gmem_src_vals), + reinterpret_cast(params.gmem_dst_vals), + params.num_items, + 0, + sizeof(Key_Data_Type) * 8, + stream); } temp_storage_bytes = div_up(temp_storage_bytes, 256) * 256; // total active counts @@ -613,10 +672,12 @@ void topPPerSegment_dispatch( return; } - size_t cub_temp_storage_bytes = temp_storage_bytes - div_up(sizeof(int), 256) * 256 - div_up(sizeof(int) * params.num_segments, 256) * 256; + size_t cub_temp_storage_bytes = + temp_storage_bytes - div_up(sizeof(int), 256) * 256 - div_up(sizeof(int) * params.num_segments, 256) * 256; void* cub_temp_storage = temp_storage; - params.gmem_active_count_total = reinterpret_cast((char *)temp_storage + cub_temp_storage_bytes); - params.gmem_active_count_per_segment = reinterpret_cast((char *) params.gmem_active_count_total + div_up(sizeof(int), 256) * 256); + params.gmem_active_count_total = reinterpret_cast((char*)temp_storage + cub_temp_storage_bytes); + params.gmem_active_count_per_segment = + reinterpret_cast((char*)params.gmem_active_count_total + div_up(sizeof(int), 256) * 256); int num_items_per_segment = params.num_items / params.num_segments; @@ -625,60 +686,75 @@ void topPPerSegment_dispatch( int max_num_items = 0; cudaMemcpyAsync(&max_num_items, params.gmem_active_count_total, sizeof(int), cudaMemcpyDeviceToHost, stream); - + cudaStreamSynchronize(stream); if (max_num_items >= MAX_TOP_K || max_num_items == 0) { if (params.num_segments > 1) { - cub::DeviceSegmentedRadixSort::SortPairsDescending(cub_temp_storage, cub_temp_storage_bytes, - reinterpret_cast(params.gmem_src_keys), - reinterpret_cast(params.gmem_dst_keys), - reinterpret_cast(params.gmem_src_vals), - reinterpret_cast(params.gmem_dst_vals), - params.num_items, params.num_segments, - params.gmem_begin_offsets, params.gmem_end_offsets, 0, sizeof(Key_Data_Type) * 8, stream); - } else { - cub::DeviceRadixSort::SortPairsDescending(cub_temp_storage, cub_temp_storage_bytes, - reinterpret_cast(params.gmem_src_keys), - reinterpret_cast(params.gmem_dst_keys), - reinterpret_cast(params.gmem_src_vals), - reinterpret_cast(params.gmem_dst_vals), - params.num_items, 0, sizeof(Key_Data_Type) * 8, stream); + cub::DeviceSegmentedRadixSort::SortPairsDescending(cub_temp_storage, + cub_temp_storage_bytes, + reinterpret_cast(params.gmem_src_keys), + reinterpret_cast(params.gmem_dst_keys), + reinterpret_cast(params.gmem_src_vals), + reinterpret_cast(params.gmem_dst_vals), + params.num_items, + params.num_segments, + params.gmem_begin_offsets, + params.gmem_end_offsets, + 0, + sizeof(Key_Data_Type) * 8, + stream); + } + else { + cub::DeviceRadixSort::SortPairsDescending(cub_temp_storage, + cub_temp_storage_bytes, + reinterpret_cast(params.gmem_src_keys), + reinterpret_cast(params.gmem_dst_keys), + reinterpret_cast(params.gmem_src_vals), + reinterpret_cast(params.gmem_dst_vals), + params.num_items, + 0, + sizeof(Key_Data_Type) * 8, + stream); } - } else { - //run at max supported value - blockSort( - (const Key_Data_Type*) (params.gmem_dst_keys), (Key_Data_Type*) (params.gmem_dst_keys), - (const Value_Data_Type*) (params.gmem_dst_vals), (Value_Data_Type*) (params.gmem_dst_vals), - params.gmem_active_count_per_segment, - max_num_items, num_items_per_segment, params.num_segments, stream - ); } - - + else { + // run at max supported value + blockSort((const Key_Data_Type*)(params.gmem_dst_keys), + (Key_Data_Type*)(params.gmem_dst_keys), + (const Value_Data_Type*)(params.gmem_dst_vals), + (Value_Data_Type*)(params.gmem_dst_vals), + params.gmem_active_count_per_segment, + max_num_items, + num_items_per_segment, + params.num_segments, + stream); + } } /////////////////////////////////////////////////////////////////////////////////////////////////// -int topPPerSegment( - const TopKPerSegmentContext& context, - TopKPerSegmentParams& params, - const DType_t DT_SCORE, - void *temp_storage, - size_t &temp_storage_bytes, - cudaStream_t stream) +int topPPerSegment(const TopKPerSegmentContext& context, + TopKPerSegmentParams& params, + const DType_t DT_SCORE, + void* temp_storage, + size_t& temp_storage_bytes, + cudaStream_t stream) { int num_items_per_segment = params.num_items / params.num_segments; if (DT_SCORE == kFLOAT) { if (num_items_per_segment % 2 == 0) { topPPerSegment_dispatch(context, params, temp_storage, temp_storage_bytes, stream); - } else { + } + else { topPPerSegment_dispatch(context, params, temp_storage, temp_storage_bytes, stream); } - } else { + } + else { if (num_items_per_segment % 4 == 0) { topPPerSegment_dispatch(context, params, temp_storage, temp_storage_bytes, stream); - } else { + } + else { topPPerSegment_dispatch(context, params, temp_storage, temp_storage_bytes, stream); } } @@ -798,12 +874,14 @@ __global__ void top_p_sampling_opt(T* sorted_log_probs, int* ids, int* sequence_length, bool* finished_buf, - int* begin_offset_buf, - int* offset_buf, + float* cum_log_probs, + float* output_log_probs, + const int* begin_offset_buf, + const int* offset_buf, const int vocab_size, curandState_t* curandstate, const float prob_threshold, - const int end_id, + const int* end_ids, const int batch_size) { // Generate the random number every round to prevent that we may @@ -819,14 +897,14 @@ __global__ void top_p_sampling_opt(T* sorted_log_probs, // if begin_offset_buf and offset_buf of sorting have same value, // this means that we have find best one in beam_topK_kernel_for_topP // and skip the sorting. So, we can skip then during sampling. - if (begin_offset_buf[blockIdx.x] == offset_buf[blockIdx.x] ) { + if (begin_offset_buf[blockIdx.x] == offset_buf[blockIdx.x]) { if (threadIdx.x == 0) { ids[blockIdx.x] = sorted_id_vals[blockIdx.x * vocab_size]; if (sequence_length != nullptr && finished_buf != nullptr) { - + sequence_length[blockIdx.x] = finished_buf[blockIdx.x] ? sequence_length[blockIdx.x] : sequence_length[blockIdx.x] + 1; - finished_buf[blockIdx.x] = ids[blockIdx.x] == end_id ? 1 : 0; + finished_buf[blockIdx.x] = ids[blockIdx.x] == end_ids[blockIdx.x] ? 1 : 0; } } return; @@ -869,24 +947,38 @@ __global__ void top_p_sampling_opt(T* sorted_log_probs, } } __syncthreads(); - if (stop_shared > 0) + if (stop_shared > 0) { break; + } }; // select first active warp bool skip = (selected_shared[warp_id] > 0) ? false : true; for (int i = 0; i < warp_id; i++) { - if (selected_shared[i] != 0) + if (selected_shared[i] != 0) { skip = true; + } } if (!skip) { int active_lane_id = WARP_SIZE - __popc(selected_shared[warp_id]); if (lane_id == active_lane_id) { ids[batch_id] = sorted_id_vals[offset + i_active]; + if (cum_log_probs != nullptr || output_log_probs != nullptr) { + float lprob = logf(sorted_log_probs[offset + i_active]); + if (cum_log_probs != nullptr) { + cum_log_probs[batch_id] += lprob; + } + if (output_log_probs != nullptr) { + // TODO(jaedeokk): Check if should we normalize. + // lprob is the probability of the token, not the probability + // induced by the top-p decoding. + output_log_probs[batch_id] = lprob; + } + } if (sequence_length != nullptr && finished_buf != nullptr) { sequence_length[batch_id] = finished_buf[batch_id] ? sequence_length[batch_id] : sequence_length[batch_id] + 1; - finished_buf[batch_id] = ids[batch_id] == end_id ? 1 : 0; + finished_buf[batch_id] = ids[batch_id] == end_ids[batch_id] ? 1 : 0; } } } @@ -899,6 +991,8 @@ void invokeTopPSampling(void* workspace, int* output_ids, int* sequence_length, bool* finished_buf, + float* cum_log_probs, + float* output_log_probs, const T* log_probs, const int* id_vals, int* offset_buf, @@ -906,19 +1000,19 @@ void invokeTopPSampling(void* workspace, curandState_t* curandstate, const int batch_size, const size_t vocab_size_padded, - const int end_id, + const int* end_ids, const float top_p, cudaStream_t stream, - cudaDeviceProp *cuda_device_prop) + cudaDeviceProp* cuda_device_prop) { // Here, we put batch size as an argument because the batch size of initialization // and inference may be different due to pipelint parallelism. const int vocab_size = vocab_size_padded; const int block_size = 256; - size_t sorted_log_prob_buf_size = batch_size * vocab_size * sizeof(T); // type T - size_t sorted_id_vals_buf_size = batch_size * vocab_size * sizeof(int); // type int - sorted_log_prob_buf_size = div_up(sorted_log_prob_buf_size , 256) * 256; + size_t sorted_log_prob_buf_size = batch_size * vocab_size * sizeof(T); // type T + size_t sorted_id_vals_buf_size = batch_size * vocab_size * sizeof(int); // type int + sorted_log_prob_buf_size = div_up(sorted_log_prob_buf_size, 256) * 256; sorted_id_vals_buf_size = div_up(sorted_id_vals_buf_size, 256) * 256; void* cub_temp_storage = workspace; @@ -931,19 +1025,20 @@ void invokeTopPSampling(void* workspace, FT_CHECK(cuda_device_prop != nullptr); segmented_topp_impl::TopKPerSegmentContext context; segmented_topp_impl::TopKPerSegmentParams params; - segmented_topp_impl::DType_t dataTypeKind = (std::is_same::value)? segmented_topp_impl::kFLOAT : segmented_topp_impl::kHALF; + segmented_topp_impl::DType_t dataTypeKind = + (std::is_same::value) ? segmented_topp_impl::kFLOAT : segmented_topp_impl::kHALF; if (!do_radix_sort) { memset(&context, 0, sizeof(context)); context.sm_count = cuda_device_prop->multiProcessorCount; context.sm_shared_size = cuda_device_prop->sharedMemPerMultiprocessor; context.sm_version = cuda_device_prop->major * 100 + cuda_device_prop->minor * 10; - + memset(¶ms, 0, sizeof(params)); - params.gmem_src_keys = reinterpret_cast(const_cast(log_probs)); + params.gmem_src_keys = reinterpret_cast(const_cast(log_probs)); params.gmem_dst_keys = sorted_log_probs; - params.gmem_src_vals = reinterpret_cast(const_cast(id_vals)); - params.gmem_dst_vals = reinterpret_cast(sorted_id_vals); + params.gmem_src_vals = reinterpret_cast(const_cast(id_vals)); + params.gmem_dst_vals = reinterpret_cast(sorted_id_vals); params.gmem_begin_offsets = begin_offset_buf; params.gmem_end_offsets = offset_buf + 1; params.workspace = nullptr; @@ -959,68 +1054,74 @@ void invokeTopPSampling(void* workspace, if (do_radix_sort) { if (workspace == nullptr) { - cub::DeviceSegmentedRadixSort::SortPairsDescending(nullptr, + check_cuda_error( + cub::DeviceSegmentedRadixSort::SortPairsDescending(nullptr, + cub_temp_storage_size, + log_probs, + (T*)nullptr, + id_vals, + (int*)nullptr, + vocab_size * batch_size, + batch_size, + begin_offset_buf, + offset_buf + 1, + 0, // begin_bit + sizeof(T) * 8, // end_bit = sizeof(KeyT) * 8 + stream)); // cudaStream_t + cub_temp_storage_size = div_up(cub_temp_storage_size, 256) * 256; + workspace_size = sorted_log_prob_buf_size + sorted_id_vals_buf_size + cub_temp_storage_size; + return; + } + beam_topK_kernel_for_topP<<>>( + log_probs, sorted_id_vals, sorted_log_probs, vocab_size, offset_buf, begin_offset_buf, top_p); + + check_cuda_error( + cub::DeviceSegmentedRadixSort::SortPairsDescending(cub_temp_storage, cub_temp_storage_size, log_probs, - (T*)nullptr, + sorted_log_probs, id_vals, - (int*)nullptr, + sorted_id_vals, vocab_size * batch_size, batch_size, begin_offset_buf, offset_buf + 1, 0, // begin_bit sizeof(T) * 8, // end_bit = sizeof(KeyT) * 8 - stream); // cudaStream_t - cub_temp_storage_size = div_up(cub_temp_storage_size, 256) * 256; - workspace_size = - sorted_log_prob_buf_size + sorted_id_vals_buf_size + cub_temp_storage_size; - return; - } - beam_topK_kernel_for_topP<<>>( - log_probs, sorted_id_vals, sorted_log_probs, vocab_size, offset_buf, begin_offset_buf, top_p); - - cub::DeviceSegmentedRadixSort::SortPairsDescending(cub_temp_storage, - cub_temp_storage_size, - log_probs, - sorted_log_probs, - id_vals, - sorted_id_vals, - vocab_size * batch_size, - batch_size, - begin_offset_buf, - offset_buf + 1, - 0, // begin_bit - sizeof(T) * 8, // end_bit = sizeof(KeyT) * 8 - stream); // cudaStream_t - } else { + stream)); // cudaStream_t + } + else { if (workspace == nullptr) { - segmented_topp_impl::topPPerSegment(context, params, dataTypeKind, cub_temp_storage, cub_temp_storage_size, stream); - workspace_size = - sorted_log_prob_buf_size + sorted_id_vals_buf_size + cub_temp_storage_size; + segmented_topp_impl::topPPerSegment( + context, params, dataTypeKind, cub_temp_storage, cub_temp_storage_size, stream); + workspace_size = sorted_log_prob_buf_size + sorted_id_vals_buf_size + cub_temp_storage_size; return; - } else { + } + else { beam_topK_kernel_for_topP<<>>( log_probs, sorted_id_vals, sorted_log_probs, vocab_size, offset_buf, begin_offset_buf, top_p); - segmented_topp_impl::topPPerSegment(context, params, dataTypeKind, cub_temp_storage, cub_temp_storage_size, stream); + segmented_topp_impl::topPPerSegment( + context, params, dataTypeKind, cub_temp_storage, cub_temp_storage_size, stream); } } constexpr int SAMPLING_BLOCK_SIZE = 256; dim3 grid(batch_size); top_p_sampling_opt<<>>(sorted_log_probs, - sorted_id_vals, - output_ids, - sequence_length, - finished_buf, - begin_offset_buf, - offset_buf + 1, - vocab_size, - curandstate, - top_p, - end_id, - batch_size); + sorted_id_vals, + output_ids, + sequence_length, + finished_buf, + cum_log_probs, + output_log_probs, + begin_offset_buf, + offset_buf + 1, + vocab_size, + curandstate, + top_p, + end_ids, + batch_size); } template void invokeTopPSampling(void* workspace, @@ -1029,6 +1130,8 @@ template void invokeTopPSampling(void* workspace, int* output_ids, int* sequence_length, bool* finished_buf, + float* cum_log_probs, + float* output_log_probs, const float* log_probs, const int* id_vals, int* offset_buf, @@ -1036,10 +1139,10 @@ template void invokeTopPSampling(void* workspace, curandState_t* curandstate, const int batch_size, const size_t vocab_size_padded, - const int end_id, + const int* end_ids, const float top_p, cudaStream_t stream, - cudaDeviceProp *cuda_device_prop); + cudaDeviceProp* cuda_device_prop); template void invokeTopPSampling(void* workspace, size_t& workspace_size, @@ -1047,6 +1150,8 @@ template void invokeTopPSampling(void* workspace, int* output_ids, int* sequence_length, bool* finished_buf, + float* cum_log_probs, + float* output_log_probs, const half* log_probs, const int* id_vals, int* offset_buf, @@ -1054,14 +1159,14 @@ template void invokeTopPSampling(void* workspace, curandState_t* curandstate, const int batch_size, const size_t vocab_size_padded, - const int end_id, + const int* end_ids, const float top_p, cudaStream_t stream, - cudaDeviceProp *cuda_device_prop); + cudaDeviceProp* cuda_device_prop); template __global__ void -addBiasSoftMax(T* logits, const T* bias, const int end_id, const bool* finished, const int n_padded, const int n) +addBiasSoftMax(T* logits, const T* bias, const int* end_ids, const bool* finished, const int n_padded, const int n) { int bid = blockIdx.x; bool finish = (finished != nullptr) ? finished[bid] : false; @@ -1075,8 +1180,9 @@ addBiasSoftMax(T* logits, const T* bias, const int end_id, const bool* finished, for (int tid = threadIdx.x; tid < n_padded; tid += blockDim.x) { if (tid < n) { - if (finish) - logits[offset + tid] = (tid == end_id) ? MAX_T_VAL : -MAX_T_VAL; + if (finish) { + logits[offset + tid] = (tid == end_ids[bid]) ? MAX_T_VAL : -MAX_T_VAL; + } else { T bias_val = (bias != nullptr) ? bias[tid] : (T)0.0f; logits[offset + tid] += bias_val; @@ -1089,8 +1195,9 @@ addBiasSoftMax(T* logits, const T* bias, const int end_id, const bool* finished, } max_val = blockReduceMax((float)max_val); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_max_val = max_val; + } __syncthreads(); float sum_val = 0.0f; @@ -1100,8 +1207,9 @@ addBiasSoftMax(T* logits, const T* bias, const int end_id, const bool* finished, } sum_val = blockReduceSum(sum_val); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_sum_val = sum_val; + } __syncthreads(); for (int tid = threadIdx.x; tid < n_padded; tid += blockDim.x) { @@ -1112,7 +1220,7 @@ addBiasSoftMax(T* logits, const T* bias, const int end_id, const bool* finished, template void invokeAddBiasSoftMax(T* logits, const T* bias, - const int end_id, + const int* end_ids, const bool* finished, const int m, const int n_padded, @@ -1122,12 +1230,12 @@ void invokeAddBiasSoftMax(T* logits, dim3 grid(m); dim3 block(min(n, 1024)); /*n is the vocab_size, e.g., 30000, 7000.... vocab_size is usually very big. */ - addBiasSoftMax<<>>(logits, bias, end_id, finished, n_padded, n); + addBiasSoftMax<<>>(logits, bias, end_ids, finished, n_padded, n); } template void invokeAddBiasSoftMax(float* logits, const float* bias, - const int end_id, + const int* end_ids, const bool* finished, const int m, const int n_padded, @@ -1136,11 +1244,11 @@ template void invokeAddBiasSoftMax(float* logits, template void invokeAddBiasSoftMax(half* logits, const half* bias, - const int end_id, + const int* end_ids, const bool* finished, const int m, const int n_padded, const int n, cudaStream_t stream); -} // namespace fastertransformer \ No newline at end of file +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/sampling_topp_kernels.h b/src/fastertransformer/kernels/sampling_topp_kernels.h index 5bb0156ac..75a8100d1 100644 --- a/src/fastertransformer/kernels/sampling_topp_kernels.h +++ b/src/fastertransformer/kernels/sampling_topp_kernels.h @@ -33,6 +33,8 @@ void invokeTopPSampling(void* workspace, int* output_ids, int* sequence_length, bool* finished_buf, + float* cum_log_probs, + float* output_log_probs, const T* log_probs, const int* id_vals, int* offset_buf, @@ -40,38 +42,49 @@ void invokeTopPSampling(void* workspace, curandState_t* curandstate, const int batch_size, const size_t vocab_size_padded, - const int end_id, + const int* end_ids, const float top_p, cudaStream_t stream, - cudaDeviceProp *cuda_device_prop); + cudaDeviceProp* cuda_device_prop); template void invokeAddBiasSoftMax(T* logits, const T* bias, - const int end_id, + const int* end_ids, const bool* finished, const int m, const int n_padded, const int n, cudaStream_t stream); -namespace segmented_topp_impl -{ -enum DType_t {kFLOAT, kHALF, kINT8}; +namespace segmented_topp_impl { +enum DType_t { + kFLOAT, + kHALF, + kINT8 +}; -template +template struct Segmented_topk_kernel_params { typedef Key_Data_Type_ Key_Data_Type; typedef Value_Data_Type_ Value_Data_Type; - enum { BLOCK_THREADS = BLOCK_THREADS_ }; - enum { ITEMS_INCREMENT = 32 }; - //enum { KEYS_PER_LDG = 2 * 4 / sizeof(Key_Data_Type_) }; - enum { KEYS_PER_LDG = KEYS_PER_LDG_ }; + enum { + BLOCK_THREADS = BLOCK_THREADS_ + }; + enum { + ITEMS_INCREMENT = 32 + }; + // enum { KEYS_PER_LDG = 2 * 4 / sizeof(Key_Data_Type_) }; + enum { + KEYS_PER_LDG = KEYS_PER_LDG_ + }; }; struct TopKPerSegmentContext { - TopKPerSegmentContext() : sm_count(0), sm_shared_size(0), sm_version(0) {}; + TopKPerSegmentContext(): sm_count(0), sm_shared_size(0), sm_version(0){}; int sm_count; int sm_shared_size; int sm_version; @@ -81,14 +94,14 @@ struct TopKPerSegmentParams { // input/output keys and values void *gmem_src_keys, *gmem_dst_keys, *gmem_dst_vals; // not used in the custom implementaiton - void *gmem_src_vals; + void* gmem_src_vals; // int array of size num_segments - int *gmem_active_count_per_segment; - int *gmem_active_count_total; - int *gmem_begin_offsets; + int* gmem_active_count_per_segment; + int* gmem_active_count_total; + int* gmem_begin_offsets; // gmem_end_offsets will be populated - int *gmem_end_offsets; - void *workspace; + int* gmem_end_offsets; + void* workspace; // total number of items for all segments int num_items; int num_segments; @@ -98,13 +111,12 @@ struct TopKPerSegmentParams { float confidence_threshold; }; -int topPPerSegment( - const TopKPerSegmentContext& context, - TopKPerSegmentParams& params, - const DType_t DT_SCORE, - void *temp_storage, - size_t &temp_storage_bytes, - cudaStream_t stream); +int topPPerSegment(const TopKPerSegmentContext& context, + TopKPerSegmentParams& params, + const DType_t DT_SCORE, + void* temp_storage, + size_t& temp_storage_bytes, + cudaStream_t stream); } // namespace segmented_topp_impl } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/softmax_int8_kernels.cu b/src/fastertransformer/kernels/softmax_int8_kernels.cu index 4fd27e4ea..0342e9454 100644 --- a/src/fastertransformer/kernels/softmax_int8_kernels.cu +++ b/src/fastertransformer/kernels/softmax_int8_kernels.cu @@ -14,732 +14,996 @@ * limitations under the License. */ -#include "src/fastertransformer/kernels/softmax_int8_kernels.h" #include "int8_utils.cuh" #include "src/fastertransformer/kernels/reduce_kernel_utils.cuh" - +#include "src/fastertransformer/kernels/softmax_int8_kernels.h" namespace fastertransformer { -//input are a series of sub-matrixes of m = seq_len, n = seq_len, CUBLASLT_ORDER_COL32 -//grid = (seq_len, batch_size, head_num) -//block.x = max(32, (seq_len/4 + 31)/32*32) -//for int32_t I; int8 O; -template -__global__ -void softmax_COL32(int8_t* output, const int32_t* input, const T* attr_mask, const int batch_size, - const int head_num, const int seq_len, const float scalar1a, const float *scalar1b, - const float *scalar1c, const float *amax_ptr, const int head_num_x_seq_len, const int seq_len_x_seq_len) +// input are a series of sub-matrixes of m = seq_len, n = seq_len, CUBLASLT_ORDER_COL32 +// grid = (seq_len, batch_size, head_num) +// block.x = max(32, (seq_len/4 + 31)/32*32) +// for int32_t I; int8 O; +template +__global__ void softmax_COL32(int8_t* output, + const int32_t* input, + const T* attr_mask, + const int batch_size, + const int head_num, + const int seq_len, + const float scalar1a, + const float* scalar1b, + const float* scalar1c, + const float* amax_ptr, + const int head_num_x_seq_len, + const int seq_len_x_seq_len) { - const float amax = __ldg(amax_ptr); - const float scalar1 = scalar1a * __ldg(scalar1b) * __ldg(scalar1c); - int mask_id; - int threadIdx4 = threadIdx.x << 2; - - char4* buf4Ptr = (char4 *)output; - - bool qual = threadIdx4 < seq_len; - for (int seq_id = blockIdx.x ; seq_id < seq_len ; seq_id += gridDim.x){ - char4 tmp4 = {0, 0, 0, 0}; - int inIdx = (blockIdx.y * head_num + blockIdx.z) * (seq_len_x_seq_len) + - (threadIdx4 & 0xffffffe0) * seq_len + - (seq_id << 5) + (threadIdx4 & 31); - - //set softmax of padding word to 0 - float mask_in_seq = static_cast(__ldg(attr_mask+(blockIdx.y*seq_len_x_seq_len + seq_id))); - if (mask_in_seq < 0.1f){ - if (qual) - buf4Ptr[inIdx >> 2] = tmp4; - continue; - } - - float4 floatTmp4 = {0.0f, 0.0f, 0.0f, 0.0f}; - - if (qual){ - floatTmp4.x = static_cast(__ldg(input + inIdx)) * scalar1; - floatTmp4.y = static_cast(__ldg(input+inIdx+1)) * scalar1; - floatTmp4.z = static_cast(__ldg(input+inIdx+2)) * scalar1; - floatTmp4.w = static_cast(__ldg(input+inIdx+3)) * scalar1; - } - - float mask_val, max_val; - max_val = -1e20f; - - __shared__ float s_max, s_sum; - - if (qual){ - mask_id = threadIdx4 + blockIdx.y * seq_len_x_seq_len + seq_id * seq_len; - //for x - mask_val = (1.0f - static_cast(__ldg(attr_mask+mask_id))) * -10000.0f; - floatTmp4.x = floatTmp4.x + mask_val; - max_val = fmaxf(max_val, floatTmp4.x); - - //for y - mask_val = (1.0f - static_cast(__ldg(attr_mask+mask_id+1))) * -10000.0f; - floatTmp4.y = floatTmp4.y + mask_val; - max_val = fmaxf(max_val, floatTmp4.y); - - //for z - mask_val = (1.0f - static_cast(__ldg(attr_mask+mask_id+2))) * -10000.0f; - floatTmp4.z = floatTmp4.z + mask_val; - max_val = fmaxf(max_val, floatTmp4.z); - - //for w - mask_val = (1.0f - static_cast(__ldg(attr_mask+mask_id+3))) * -10000.0f; - floatTmp4.w = floatTmp4.w + mask_val; - max_val = fmaxf(max_val, floatTmp4.w); - } - - max_val = blockDim.x <= 32 ? warpReduceMax(max_val) : blockReduceMax(max_val); - - if (threadIdx.x == 0){ - s_max = max_val; - } - __syncthreads(); - - float sum_val = 0.0f; - - if (qual){ - floatTmp4.x = __expf(floatTmp4.x - s_max); - sum_val += floatTmp4.x; - floatTmp4.y = __expf(floatTmp4.y - s_max); - sum_val += floatTmp4.y; - floatTmp4.z = __expf(floatTmp4.z - s_max); - sum_val += floatTmp4.z; - floatTmp4.w = __expf(floatTmp4.w - s_max); - sum_val += floatTmp4.w; - } - - sum_val = blockDim.x <= 32 ? warpReduceSum(sum_val) : blockReduceSum(sum_val); - - if (threadIdx.x == 0){ - s_sum = __fdividef(127.0f, (sum_val + 1e-6f)); - s_sum = __fdividef(s_sum, amax); + const float amax = __ldg(amax_ptr); + const float scalar1 = scalar1a * __ldg(scalar1b) * __ldg(scalar1c); + int mask_id; + int threadIdx4 = threadIdx.x << 2; + + char4* buf4Ptr = (char4*)output; + + bool qual = threadIdx4 < seq_len; + for (int seq_id = blockIdx.x; seq_id < seq_len; seq_id += gridDim.x) { + char4 tmp4 = {0, 0, 0, 0}; + int inIdx = (blockIdx.y * head_num + blockIdx.z) * (seq_len_x_seq_len) + (threadIdx4 & 0xffffffe0) * seq_len + + (seq_id << 5) + (threadIdx4 & 31); + + // set softmax of padding word to 0 + float mask_in_seq = static_cast(__ldg(attr_mask + (blockIdx.y * seq_len_x_seq_len + seq_id))); + if (mask_in_seq < 0.1f) { + if (qual) { + buf4Ptr[inIdx >> 2] = tmp4; + } + continue; + } + + float4 floatTmp4 = {0.0f, 0.0f, 0.0f, 0.0f}; + + if (qual) { + floatTmp4.x = static_cast(__ldg(input + inIdx)) * scalar1; + floatTmp4.y = static_cast(__ldg(input + inIdx + 1)) * scalar1; + floatTmp4.z = static_cast(__ldg(input + inIdx + 2)) * scalar1; + floatTmp4.w = static_cast(__ldg(input + inIdx + 3)) * scalar1; + } + + float mask_val, max_val; + max_val = -1e20f; + + __shared__ float s_max, s_sum; + + if (qual) { + mask_id = threadIdx4 + blockIdx.y * seq_len_x_seq_len + seq_id * seq_len; + // for x + mask_val = (1.0f - static_cast(__ldg(attr_mask + mask_id))) * -10000.0f; + floatTmp4.x = floatTmp4.x + mask_val; + max_val = fmaxf(max_val, floatTmp4.x); + + // for y + mask_val = (1.0f - static_cast(__ldg(attr_mask + mask_id + 1))) * -10000.0f; + floatTmp4.y = floatTmp4.y + mask_val; + max_val = fmaxf(max_val, floatTmp4.y); + + // for z + mask_val = (1.0f - static_cast(__ldg(attr_mask + mask_id + 2))) * -10000.0f; + floatTmp4.z = floatTmp4.z + mask_val; + max_val = fmaxf(max_val, floatTmp4.z); + + // for w + mask_val = (1.0f - static_cast(__ldg(attr_mask + mask_id + 3))) * -10000.0f; + floatTmp4.w = floatTmp4.w + mask_val; + max_val = fmaxf(max_val, floatTmp4.w); + } + + max_val = blockDim.x <= 32 ? warpReduceMax(max_val) : blockReduceMax(max_val); + + if (threadIdx.x == 0) { + s_max = max_val; + } + __syncthreads(); + + float sum_val = 0.0f; + + if (qual) { + floatTmp4.x = __expf(floatTmp4.x - s_max); + sum_val += floatTmp4.x; + floatTmp4.y = __expf(floatTmp4.y - s_max); + sum_val += floatTmp4.y; + floatTmp4.z = __expf(floatTmp4.z - s_max); + sum_val += floatTmp4.z; + floatTmp4.w = __expf(floatTmp4.w - s_max); + sum_val += floatTmp4.w; + } + + sum_val = blockDim.x <= 32 ? warpReduceSum(sum_val) : blockReduceSum(sum_val); + + if (threadIdx.x == 0) { + s_sum = __fdividef(127.0f, (sum_val + 1e-6f)); + s_sum = __fdividef(s_sum, amax); + } + __syncthreads(); + + if (qual) { + + tmp4.x = float_to_int8_rn(floatTmp4.x * s_sum); + tmp4.y = float_to_int8_rn(floatTmp4.y * s_sum); + tmp4.z = float_to_int8_rn(floatTmp4.z * s_sum); + tmp4.w = float_to_int8_rn(floatTmp4.w * s_sum); + + buf4Ptr[inIdx >> 2] = tmp4; + } } - __syncthreads(); - - if (qual){ - - tmp4.x = float_to_int8_rn(floatTmp4.x*s_sum); - tmp4.y = float_to_int8_rn(floatTmp4.y*s_sum); - tmp4.z = float_to_int8_rn(floatTmp4.z*s_sum); - tmp4.w = float_to_int8_rn(floatTmp4.w*s_sum); +} - buf4Ptr[inIdx >> 2] = tmp4; +// input are a series of sub-matrixes of m = seq_len, n = seq_len_padded, CUBLASLT_ORDER_COL32 +// seq_len_padded = (seq_len+31)/32*32 +// grid = (seq_len, batch_size, head_num) +// block.x = max(32, (seq_len_padded/4 + 31)/32*32) +// for int8_t IO; +template +__global__ void softmax_COL32_varlen(int8_t* output, + const int8_t* input, + const T* attr_mask, + const int batch_size, + const int head_num, + const int seq_len, + const int seq_len_padded, + const float scalar1a, + const float* scalar1b, + const float* amax_ptr, + const int seq_len_x_seq_len, + const int seq_len_x_seq_len_padded) +{ + const float amax = __ldg(amax_ptr); + const float scalar1 = scalar1a * __ldg(scalar1b); + int mask_id; + int threadIdx4 = threadIdx.x << 2; + + char4* buf4Ptr = (char4*)output; + const char4* inBuf4Ptr = (const char4*)input; + + const bool qual = threadIdx4 < seq_len; + const bool qual_padded = threadIdx4 < seq_len_padded; + for (int seq_id = blockIdx.x; seq_id < seq_len; seq_id += gridDim.x) { + + char4 tmp4 = {0, 0, 0, 0}; + int inIdx = ((blockIdx.y * head_num + blockIdx.z) * (seq_len_x_seq_len_padded) + + (threadIdx4 & 0xffffffe0) * seq_len + (seq_id << 5) + (threadIdx4 & 31)) + >> 2; + + // set softmax of padding word in rows to 0 + const float mask_in_seq = static_cast(__ldg(attr_mask + (blockIdx.y * seq_len_x_seq_len + seq_id))); + if (mask_in_seq < 0.1f) { + if (qual_padded) { + buf4Ptr[inIdx] = tmp4; + } + continue; + } + + // set softmax of padding word in cols to 0 + float4 floatTmp4 = {0.0f, 0.0f, 0.0f, 0.0f}; + if (qual) { + tmp4 = __ldg(inBuf4Ptr + inIdx); + floatTmp4.x = static_cast(tmp4.x) * scalar1; + floatTmp4.y = static_cast(tmp4.y) * scalar1; + floatTmp4.z = static_cast(tmp4.z) * scalar1; + floatTmp4.w = static_cast(tmp4.w) * scalar1; + } + + float mask_val, max_val; + max_val = -1e20f; + + __shared__ float s_max, s_sum; + + if (qual) { + mask_id = threadIdx4 + blockIdx.y * seq_len_x_seq_len + seq_id * seq_len; + // for x + mask_val = (1.0f - static_cast(__ldg(attr_mask + mask_id))) * -10000.0f; + floatTmp4.x = floatTmp4.x + mask_val; + max_val = fmaxf(max_val, floatTmp4.x); + + // for y + mask_val = (1.0f - static_cast(__ldg(attr_mask + mask_id + 1))) * -10000.0f; + floatTmp4.y = floatTmp4.y + mask_val; + max_val = fmaxf(max_val, floatTmp4.y); + + // for z + mask_val = (1.0f - static_cast(__ldg(attr_mask + mask_id + 2))) * -10000.0f; + floatTmp4.z = floatTmp4.z + mask_val; + max_val = fmaxf(max_val, floatTmp4.z); + + // for w + mask_val = (1.0f - static_cast(__ldg(attr_mask + mask_id + 3))) * -10000.0f; + floatTmp4.w = floatTmp4.w + mask_val; + max_val = fmaxf(max_val, floatTmp4.w); + } + + max_val = blockDim.x <= 32 ? warpReduceMax(max_val) : blockReduceMax(max_val); + + if (threadIdx.x == 0) { + s_max = max_val; + } + __syncthreads(); + + float sum_val = 0.0f; + + if (qual) { + floatTmp4.x = __expf(floatTmp4.x - s_max); + sum_val += floatTmp4.x; + floatTmp4.y = __expf(floatTmp4.y - s_max); + sum_val += floatTmp4.y; + floatTmp4.z = __expf(floatTmp4.z - s_max); + sum_val += floatTmp4.z; + floatTmp4.w = __expf(floatTmp4.w - s_max); + sum_val += floatTmp4.w; + } + + sum_val = blockDim.x <= 32 ? warpReduceSum(sum_val) : blockReduceSum(sum_val); + + if (threadIdx.x == 0) { + s_sum = __fdividef(127.0f, (sum_val + 1e-6f)); + s_sum = __fdividef(s_sum, amax); + } + __syncthreads(); + + if (qual_padded) { + + tmp4.x = qual ? float_to_int8_rn(floatTmp4.x * s_sum) : static_cast(0); + tmp4.y = qual ? float_to_int8_rn(floatTmp4.y * s_sum) : static_cast(0); + tmp4.z = qual ? float_to_int8_rn(floatTmp4.z * s_sum) : static_cast(0); + tmp4.w = qual ? float_to_int8_rn(floatTmp4.w * s_sum) : static_cast(0); + + buf4Ptr[inIdx] = tmp4; + } } - } } -//input are a series of sub-matrixes of m = seq_len, n = seq_len_padded, CUBLASLT_ORDER_COL32 -//seq_len_padded = (seq_len+31)/32*32 -//grid = (seq_len, batch_size, head_num) -//block.x = max(32, (seq_len_padded/4 + 31)/32*32) -//for int8_t IO; -template -__global__ -void softmax_COL32_varlen(int8_t* output, const int8_t* input, const T* attr_mask, const int batch_size, - const int head_num, const int seq_len, const int seq_len_padded, - const float scalar1a, const float *scalar1b, const float *amax_ptr, - const int seq_len_x_seq_len, const int seq_len_x_seq_len_padded) +// input are a series of sub-matrixes of m = seq_len, n = seq_len_padded, CUBLASLT_ORDER_COL32 +// seq_len_padded = (seq_len+31)/32*32 +// grid = (seq_len, batch_size, head_num) +// block.x = max(32, (seq_len_padded + 31)/32*32) +// for int8_t IO, I/O with int8_t element; +template +__global__ void softmax_COL32_perElement_varlen(int8_t* output, + const int8_t* input, + const T* attr_mask, + const int batch_size, + const int head_num, + const int seq_len, + const int seq_len_padded, + const float scalar1a, + const float* scalar1b, + const float* amax_ptr, + const int seq_len_x_seq_len, + const int seq_len_x_seq_len_padded) { - const float amax = __ldg(amax_ptr); - const float scalar1 = scalar1a * __ldg(scalar1b); - int mask_id; - int threadIdx4 = threadIdx.x << 2; - - char4* buf4Ptr = (char4 *)output; - const char4* inBuf4Ptr = (const char4*)input; - - const bool qual = threadIdx4 < seq_len; - const bool qual_padded = threadIdx4 < seq_len_padded; - for (int seq_id = blockIdx.x ; seq_id < seq_len ; seq_id += gridDim.x){ - - char4 tmp4 = {0, 0, 0, 0}; - int inIdx = ((blockIdx.y * head_num + blockIdx.z) * (seq_len_x_seq_len_padded) + - (threadIdx4 & 0xffffffe0) * seq_len + - (seq_id << 5) + (threadIdx4 & 31)) >> 2; - - //set softmax of padding word in rows to 0 - const float mask_in_seq = static_cast(__ldg(attr_mask+(blockIdx.y*seq_len_x_seq_len + seq_id))); - if (mask_in_seq < 0.1f){ - if (qual_padded) - buf4Ptr[inIdx] = tmp4; - continue; - } - - //set softmax of padding word in cols to 0 - float4 floatTmp4 = {0.0f, 0.0f, 0.0f, 0.0f}; - if (qual){ - tmp4 = __ldg(inBuf4Ptr + inIdx); - floatTmp4.x = static_cast(tmp4.x) * scalar1; - floatTmp4.y = static_cast(tmp4.y) * scalar1; - floatTmp4.z = static_cast(tmp4.z) * scalar1; - floatTmp4.w = static_cast(tmp4.w) * scalar1; - } + const float amax = __ldg(amax_ptr); + const float scalar1 = scalar1a * __ldg(scalar1b); + int mask_id; + const int tidx = threadIdx.x; - float mask_val, max_val; - max_val = -1e20f; + const bool qual = tidx < seq_len; + const bool qual_padded = tidx < seq_len_padded; + for (int seq_id = blockIdx.x; seq_id < seq_len; seq_id += gridDim.x) { - __shared__ float s_max, s_sum; + int8_t tmp = 0; + int inIdx = ((blockIdx.y * head_num + blockIdx.z) * (seq_len_x_seq_len_padded) + (tidx & 0xffffffe0) * seq_len + + (seq_id << 5) + (tidx & 31)); - if (qual){ - mask_id = threadIdx4 + blockIdx.y * seq_len_x_seq_len + seq_id * seq_len; - //for x - mask_val = (1.0f - static_cast(__ldg(attr_mask+mask_id))) * -10000.0f; - floatTmp4.x = floatTmp4.x + mask_val; - max_val = fmaxf(max_val, floatTmp4.x); + // set softmax of padding word in rows to 0 + const float mask_in_seq = static_cast(__ldg(attr_mask + (blockIdx.y * seq_len_x_seq_len + seq_id))); + if (mask_in_seq < 0.1f) { + if (qual_padded) { + output[inIdx] = tmp; + } + continue; + } - //for y - mask_val = (1.0f - static_cast(__ldg(attr_mask+mask_id+1))) * -10000.0f; - floatTmp4.y = floatTmp4.y + mask_val; - max_val = fmaxf(max_val, floatTmp4.y); + // set softmax of padding word in cols to 0 + float floatTmp = qual ? (static_cast(__ldg(input + inIdx)) * scalar1) : 0.0f; - //for z - mask_val = (1.0f - static_cast(__ldg(attr_mask+mask_id+2))) * -10000.0f; - floatTmp4.z = floatTmp4.z + mask_val; - max_val = fmaxf(max_val, floatTmp4.z); + float mask_val, max_val; + max_val = -1e20f; - //for w - mask_val = (1.0f - static_cast(__ldg(attr_mask+mask_id+3))) * -10000.0f; - floatTmp4.w = floatTmp4.w + mask_val; - max_val = fmaxf(max_val, floatTmp4.w); - } + __shared__ float s_max, s_sum; - max_val = blockDim.x <= 32 ? warpReduceMax(max_val) : blockReduceMax(max_val); + if (qual) { + mask_id = tidx + blockIdx.y * seq_len_x_seq_len + seq_id * seq_len; + mask_val = (1.0f - static_cast(__ldg(attr_mask + mask_id))) * -10000.0f; + floatTmp = floatTmp + mask_val; + } - if (threadIdx.x == 0){ - s_max = max_val; - } - __syncthreads(); - - float sum_val = 0.0f; - - if (qual){ - floatTmp4.x = __expf(floatTmp4.x - s_max); - sum_val += floatTmp4.x; - floatTmp4.y = __expf(floatTmp4.y - s_max); - sum_val += floatTmp4.y; - floatTmp4.z = __expf(floatTmp4.z - s_max); - sum_val += floatTmp4.z; - floatTmp4.w = __expf(floatTmp4.w - s_max); - sum_val += floatTmp4.w; - } - - sum_val = blockDim.x <= 32 ? warpReduceSum(sum_val) : blockReduceSum(sum_val); + max_val = blockDim.x <= 32 ? warpReduceMax(floatTmp) : blockReduceMax(floatTmp); - if (threadIdx.x == 0){ - s_sum = __fdividef(127.0f, (sum_val + 1e-6f)); - s_sum = __fdividef(s_sum, amax); - } - __syncthreads(); + if (threadIdx.x == 0) { + s_max = max_val; + } + __syncthreads(); + + float sum_val = 0.0f; - if (qual_padded){ + floatTmp = qual ? __expf(floatTmp - s_max) : floatTmp; - tmp4.x = qual ? float_to_int8_rn(floatTmp4.x*s_sum) : static_cast(0); - tmp4.y = qual ? float_to_int8_rn(floatTmp4.y*s_sum) : static_cast(0); - tmp4.z = qual ? float_to_int8_rn(floatTmp4.z*s_sum) : static_cast(0); - tmp4.w = qual ? float_to_int8_rn(floatTmp4.w*s_sum) : static_cast(0); + sum_val = blockDim.x <= 32 ? warpReduceSum(floatTmp) : blockReduceSum(floatTmp); - buf4Ptr[inIdx] = tmp4; + if (threadIdx.x == 0) { + s_sum = __fdividef(127.0f, (sum_val + 1e-6f)); + s_sum = __fdividef(s_sum, amax); + } + __syncthreads(); + + if (qual_padded) { + tmp = qual ? float_to_int8_rn(floatTmp * s_sum) : static_cast(0); + output[inIdx] = tmp; + } } - } } -//input are a series of sub-matrixes of m = seq_len, n = seq_len_padded, CUBLASLT_ORDER_COL32 -//seq_len_padded = (seq_len+31)/32*32 -//grid = (seq_len, batch_size, head_num) -//block.x = max(32, (seq_len_padded + 31)/32*32) -//for int8_t IO, I/O with int8_t element; -template -__global__ -void softmax_COL32_perElement_varlen(int8_t* output, const int8_t* input, const T* attr_mask, const int batch_size, - const int head_num, const int seq_len, const int seq_len_padded, - const float scalar1a, const float *scalar1b, const float *amax_ptr, - const int seq_len_x_seq_len, const int seq_len_x_seq_len_padded) +// input are a series of sub-matrixes of m = seq_len, n = seq_len, CUBLASLT_ORDER_COL32 +// grid = (seq_len, batch_size, head_num) +// block.x = (seq_len + 31)/32 +// for int32_t I; int8 O; +// for seq_len <= 32 +template +__global__ void softmax_COL32_LE32(int8_t* output, + const int32_t* input, + const T* attr_mask, + const int batch_size, + const int head_num, + const int seq_len, + const float scalar1a, + const float* scalar1b, + const float* scalar1c, + const float* amax_ptr, + const int head_num_x_seq_len, + const int seq_len_x_seq_len) { - const float amax = __ldg(amax_ptr); - const float scalar1 = scalar1a * __ldg(scalar1b); - int mask_id; - const int tidx = threadIdx.x; - - const bool qual = tidx < seq_len; - const bool qual_padded = tidx < seq_len_padded; - for (int seq_id = blockIdx.x ; seq_id < seq_len ; seq_id += gridDim.x){ - - int8_t tmp = 0; - int inIdx = ((blockIdx.y * head_num + blockIdx.z) * (seq_len_x_seq_len_padded) + - (tidx & 0xffffffe0) * seq_len + - (seq_id << 5) + (tidx & 31)); - - //set softmax of padding word in rows to 0 - const float mask_in_seq = static_cast(__ldg(attr_mask+(blockIdx.y*seq_len_x_seq_len + seq_id))); - if (mask_in_seq < 0.1f){ - if (qual_padded) - output[inIdx] = tmp; - continue; - } + const float amax = __ldg(amax_ptr); + const float scalar1 = scalar1a * __ldg(scalar1b) * __ldg(scalar1c); + int mask_id; + int threadIdxx = threadIdx.x; + bool qual = threadIdxx < seq_len; + for (int seq_id = blockIdx.x; seq_id < seq_len; seq_id += gridDim.x) { + int inIdx = (blockIdx.y * head_num + blockIdx.z) * (seq_len_x_seq_len) + (threadIdxx & 0xffffffe0) * seq_len + + (seq_id << 5) + (threadIdxx & 31); - //set softmax of padding word in cols to 0 - float floatTmp = qual ? (static_cast(__ldg(input + inIdx)) * scalar1) : 0.0f; + // set softmax of padding word to 0 + float mask_in_seq = static_cast(__ldg(attr_mask + (blockIdx.y * seq_len_x_seq_len + seq_id))); + if (mask_in_seq < 0.1f) { + if (qual) { + output[inIdx] = 0; + } + continue; + } - float mask_val, max_val; - max_val = -1e20f; + float floatTmp = qual ? static_cast(__ldg(input + inIdx)) * scalar1 : 0.0f; - __shared__ float s_max, s_sum; + float mask_val, max_val; - if (qual){ - mask_id = tidx + blockIdx.y * seq_len_x_seq_len + seq_id * seq_len; - mask_val = (1.0f - static_cast(__ldg(attr_mask+mask_id))) * -10000.0f; - floatTmp = floatTmp + mask_val; - } + __shared__ float s_max, s_sum; - max_val = blockDim.x <= 32 ? warpReduceMax(floatTmp) : blockReduceMax(floatTmp); + mask_id = qual ? threadIdxx + blockIdx.y * seq_len_x_seq_len + seq_id * seq_len : 0; + mask_val = qual ? (1.0f - static_cast(__ldg(attr_mask + mask_id))) * -10000.0f : 0.0f; + floatTmp = qual ? floatTmp + mask_val : 0.0f; + max_val = qual ? floatTmp : -1e20f; - if (threadIdx.x == 0){ - s_max = max_val; - } - __syncthreads(); + max_val = blockDim.x <= 32 ? warpReduceMax(max_val) : blockReduceMax(max_val); - float sum_val = 0.0f; + if (threadIdx.x == 0) { + s_max = max_val; + } + __syncthreads(); - floatTmp = qual ? __expf(floatTmp - s_max) : floatTmp; + floatTmp = qual ? __expf(floatTmp - s_max) : 0.0f; - sum_val = blockDim.x <= 32 ? warpReduceSum(floatTmp) : blockReduceSum(floatTmp); + float sum_val = blockDim.x <= 32 ? warpReduceSum(floatTmp) : blockReduceSum(floatTmp); - if (threadIdx.x == 0){ - s_sum = __fdividef(127.0f, (sum_val + 1e-6f)); - s_sum = __fdividef(s_sum, amax); - } - __syncthreads(); + if (threadIdx.x == 0) { + s_sum = __fdividef(127.0f, (sum_val + 1e-6f)); + s_sum = __fdividef(s_sum, amax); + } + __syncthreads(); - if (qual_padded){ - tmp = qual ? float_to_int8_rn(floatTmp*s_sum) : static_cast(0); - output[inIdx] = tmp; + if (qual) { + output[inIdx] = float_to_int8_rn(floatTmp * s_sum); + } } - } } - -//input are a series of sub-matrixes of m = seq_len, n = seq_len, CUBLASLT_ORDER_COL32 -//grid = (seq_len, batch_size, head_num) -//block.x = (seq_len + 31)/32 -//for int32_t I; int8 O; -//for seq_len <= 32 -template -__global__ -void softmax_COL32_LE32(int8_t* output, const int32_t* input, const T* attr_mask, const int batch_size, - const int head_num, const int seq_len, const float scalar1a, const float *scalar1b, - const float *scalar1c, const float *amax_ptr, const int head_num_x_seq_len, const int seq_len_x_seq_len) +// input are a series of sub-matrixes of m = seq_len, n = seq_len_padded, CUBLASLT_ORDER_COL32 +// seq_len_padded = (seq_len+31)/32*32 +// attr_mask is [batch_size, seq_len, seq_len] +// grid = (seq_len, batch_size, head_num) +// block.x = seq_len_padded +// for int8_t IO; +// for seq_len_padded == 32 +template +__global__ void softmax_COL32_LE32_varlen(int8_t* output, + const int8_t* input, + const T* attr_mask, + const int batch_size, + const int head_num, + const int seq_len, + const int seq_len_padded, + const float scalar1a, + const float* scalar1b, + const float* amax_ptr, + const int seq_len_x_seq_len, + const int seq_len_x_seq_len_padded) { - const float amax = __ldg(amax_ptr); - const float scalar1 = scalar1a * __ldg(scalar1b) * __ldg(scalar1c); - int mask_id; - int threadIdxx = threadIdx.x; - bool qual = threadIdxx < seq_len; - for (int seq_id = blockIdx.x ; seq_id < seq_len ; seq_id += gridDim.x){ - int inIdx = (blockIdx.y * head_num + blockIdx.z) * (seq_len_x_seq_len) + - (threadIdxx & 0xffffffe0) * seq_len + - (seq_id << 5) + (threadIdxx & 31); - - //set softmax of padding word to 0 - float mask_in_seq = static_cast(__ldg(attr_mask+(blockIdx.y*seq_len_x_seq_len + seq_id))); - if (mask_in_seq < 0.1f){ - if (qual) - output[inIdx] = 0; - continue; - } - - float floatTmp = qual ? static_cast(__ldg(input + inIdx)) * scalar1 : 0.0f; - - float mask_val, max_val; - - __shared__ float s_max, s_sum; - - mask_id = qual ? threadIdxx + blockIdx.y * seq_len_x_seq_len + seq_id * seq_len : 0; - mask_val = qual ? (1.0f - static_cast(__ldg(attr_mask+mask_id))) * -10000.0f : 0.0f; - floatTmp = qual ? floatTmp + mask_val : 0.0f; - max_val = qual ? floatTmp : -1e20f; - - max_val = blockDim.x <= 32 ? warpReduceMax(max_val) : blockReduceMax(max_val); - - if (threadIdx.x == 0){ - s_max = max_val; - } - __syncthreads(); - - floatTmp = qual ? __expf(floatTmp - s_max) : 0.0f; - - float sum_val = blockDim.x <= 32 ? warpReduceSum(floatTmp) : blockReduceSum(floatTmp); - - if (threadIdx.x == 0){ - s_sum = __fdividef(127.0f, (sum_val + 1e-6f)); - s_sum = __fdividef(s_sum, amax); - } - __syncthreads(); - - - if (qual){ - output[inIdx] = float_to_int8_rn(floatTmp*s_sum); + const float amax = __ldg(amax_ptr); + const float scalar1 = scalar1a * __ldg(scalar1b); + int mask_id; + int threadIdxx = threadIdx.x; + const bool qual = threadIdxx < seq_len; + const bool qual_padded = threadIdxx < seq_len_padded; + for (int seq_id = blockIdx.x; seq_id < seq_len; seq_id += gridDim.x) { + int inIdx = (blockIdx.y * head_num + blockIdx.z) * (seq_len_x_seq_len_padded) + + (threadIdxx & 0xffffffe0) * seq_len + (seq_id << 5) + (threadIdxx & 31); + + // set softmax of padding word in rows to 0 + float mask_in_seq = static_cast(__ldg(attr_mask + (blockIdx.y * seq_len_x_seq_len + seq_id))); + if (mask_in_seq < 0.1f) { + if (qual_padded) { + output[inIdx] = 0; + } + continue; + } + + float mask_val, max_val; + __shared__ float s_max, s_sum; + + // set softmax of padding word in cols to 0 + float floatTmp = qual ? static_cast(__ldg(input + inIdx)) * scalar1 : 0.0f; + mask_id = qual ? threadIdxx + blockIdx.y * seq_len_x_seq_len + seq_id * seq_len : 0; + mask_val = qual ? (1.0f - static_cast(__ldg(attr_mask + mask_id))) * -10000.0f : 0.0f; + floatTmp = qual ? floatTmp + mask_val : 0.0f; + max_val = qual ? floatTmp : -1e20f; + + max_val = warpReduceMax(max_val); + + if (threadIdx.x == 0) { + s_max = max_val; + } + __syncthreads(); + + floatTmp = qual ? __expf(floatTmp - s_max) : 0.0f; + + float sum_val = blockDim.x <= 32 ? warpReduceSum(floatTmp) : blockReduceSum(floatTmp); + + if (threadIdx.x == 0) { + s_sum = __fdividef(127.0f, (sum_val + 1e-6f)); + s_sum = __fdividef(s_sum, amax); + } + __syncthreads(); + + if (qual_padded) { + output[inIdx] = qual ? float_to_int8_rn(floatTmp * s_sum) : static_cast(0); + } } - } } -//input are a series of sub-matrixes of m = seq_len, n = seq_len_padded, CUBLASLT_ORDER_COL32 -//seq_len_padded = (seq_len+31)/32*32 -//attr_mask is [batch_size, seq_len, seq_len] -//grid = (seq_len, batch_size, head_num) -//block.x = seq_len_padded -//for int8_t IO; -//for seq_len_padded == 32 -template -__global__ -void softmax_COL32_LE32_varlen(int8_t* output, const int8_t* input, const T* attr_mask, const int batch_size, - const int head_num, const int seq_len, const int seq_len_padded, - const float scalar1a, const float *scalar1b, const float *amax_ptr, - const int seq_len_x_seq_len, const int seq_len_x_seq_len_padded) +// input are a series of sub-matrixes of m = seq_len, n = seq_len, CUBLASLT_ORDER_COL32 +// grid = (seq_len, batch_size, head_num) +// block.x = max(32, (seq_len/2 + 31)/32*32) +// for int32_t I; int8 O; +// for seq_len in (32, 64] +template +__global__ void softmax_COL32_LE64(int8_t* output, + const int32_t* input, + const T* attr_mask, + const int batch_size, + const int head_num, + const int seq_len, + const float scalar1a, + const float* scalar1b, + const float* scalar1c, + const float* amax_ptr, + const int head_num_x_seq_len, + const int seq_len_x_seq_len) { - const float amax = __ldg(amax_ptr); - const float scalar1 = scalar1a * __ldg(scalar1b); - int mask_id; - int threadIdxx = threadIdx.x; - const bool qual = threadIdxx < seq_len; - const bool qual_padded = threadIdxx < seq_len_padded; - for (int seq_id = blockIdx.x ; seq_id < seq_len ; seq_id += gridDim.x){ - int inIdx = (blockIdx.y * head_num + blockIdx.z) * (seq_len_x_seq_len_padded) + - (threadIdxx & 0xffffffe0) * seq_len + - (seq_id << 5) + (threadIdxx & 31); - - //set softmax of padding word in rows to 0 - float mask_in_seq = static_cast(__ldg(attr_mask+(blockIdx.y*seq_len_x_seq_len + seq_id))); - if (mask_in_seq < 0.1f){ - if (qual_padded) - output[inIdx] = 0; - continue; + const float amax = __ldg(amax_ptr); + const float scalar1 = scalar1a * __ldg(scalar1b) * __ldg(scalar1c); + int mask_id; + int threadIdx2 = threadIdx.x << 1; + + char2* buf2Ptr = (char2*)output; + + bool qual = threadIdx2 < seq_len; + for (int seq_id = blockIdx.x; seq_id < seq_len; seq_id += gridDim.x) { + char2 tmp2 = {0, 0}; + int inIdx = (blockIdx.y * head_num + blockIdx.z) * (seq_len_x_seq_len) + (threadIdx2 & 0xffffffe0) * seq_len + + (seq_id << 5) + (threadIdx2 & 31); + + // set softmax of padding word to 0 + float mask_in_seq = static_cast(__ldg(attr_mask + (blockIdx.y * seq_len_x_seq_len + seq_id))); + if (mask_in_seq < 0.1f) { + if (qual) { + buf2Ptr[inIdx >> 1] = tmp2; + } + continue; + } + + float2 floatTmp2 = {0.0f, 0.0f}; + if (qual) { + floatTmp2.x = static_cast(__ldg(input + inIdx)) * scalar1; + floatTmp2.y = static_cast(__ldg(input + inIdx + 1)) * scalar1; + } + + float mask_val, max_val; + max_val = -1e20f; + + __shared__ float s_max, s_sum; + + if (qual) { + mask_id = threadIdx2 + blockIdx.y * seq_len_x_seq_len + seq_id * seq_len; + // for x + mask_val = (1.0f - static_cast(__ldg(attr_mask + mask_id))) * -10000.0f; + floatTmp2.x = floatTmp2.x + mask_val; + + // for y + mask_val = (1.0f - static_cast(__ldg(attr_mask + mask_id + 1))) * -10000.0f; + floatTmp2.y = floatTmp2.y + mask_val; + + max_val = fmaxf(floatTmp2.x, floatTmp2.y); + } + + max_val = blockDim.x <= 32 ? warpReduceMax(max_val) : blockReduceMax(max_val); + + if (threadIdx.x == 0) { + s_max = max_val; + } + __syncthreads(); + + float sum_val = 0.0f; + + if (qual) { + floatTmp2.x = __expf(floatTmp2.x - s_max); + sum_val += floatTmp2.x; + floatTmp2.y = __expf(floatTmp2.y - s_max); + sum_val += floatTmp2.y; + } + + sum_val = blockDim.x <= 32 ? warpReduceSum(sum_val) : blockReduceSum(sum_val); + + if (threadIdx.x == 0) { + s_sum = __fdividef(127.0f, (sum_val + 1e-6f)); + s_sum = __fdividef(s_sum, amax); + } + __syncthreads(); + + if (qual) { + tmp2.x = float_to_int8_rn(floatTmp2.x * s_sum); + tmp2.y = float_to_int8_rn(floatTmp2.y * s_sum); + buf2Ptr[inIdx >> 1] = tmp2; + } } - - float mask_val, max_val; - __shared__ float s_max, s_sum; - - //set softmax of padding word in cols to 0 - float floatTmp = qual ? static_cast(__ldg(input + inIdx)) * scalar1 : 0.0f; - mask_id = qual ? threadIdxx + blockIdx.y * seq_len_x_seq_len + seq_id * seq_len : 0; - mask_val = qual ? (1.0f - static_cast(__ldg(attr_mask+mask_id))) * -10000.0f : 0.0f; - floatTmp = qual ? floatTmp + mask_val : 0.0f; - max_val = qual ? floatTmp : -1e20f; - - max_val = warpReduceMax(max_val); - - if (threadIdx.x == 0){ - s_max = max_val; - } - __syncthreads(); - - floatTmp = qual ? __expf(floatTmp - s_max) : 0.0f; - - float sum_val = blockDim.x <= 32 ? warpReduceSum(floatTmp) : blockReduceSum(floatTmp); - - if (threadIdx.x == 0){ - s_sum = __fdividef(127.0f, (sum_val + 1e-6f)); - s_sum = __fdividef(s_sum, amax); - } - __syncthreads(); - - - if (qual_padded){ - output[inIdx] = qual ? float_to_int8_rn(floatTmp*s_sum) : static_cast(0); - } - } } -//input are a series of sub-matrixes of m = seq_len, n = seq_len, CUBLASLT_ORDER_COL32 -//grid = (seq_len, batch_size, head_num) -//block.x = max(32, (seq_len/2 + 31)/32*32) -//for int32_t I; int8 O; -//for seq_len in (32, 64] -template -__global__ -void softmax_COL32_LE64(int8_t* output, const int32_t* input, const T* attr_mask, const int batch_size, - const int head_num, const int seq_len, const float scalar1a, const float *scalar1b, - const float *scalar1c, const float *amax_ptr, const int head_num_x_seq_len, const int seq_len_x_seq_len) +// input are a series of sub-matrixes of m = seq_len, n = seq_len_padded, CUBLASLT_ORDER_COL32 +// seq_len_padded = (seq_len+31)/32*32 +// grid = (seq_len, batch_size, head_num) +// block.x = 32 +// for int8_t IO +// for seq_len in (32, 64] +template +__global__ void softmax_COL32_LE64_varlen(int8_t* output, + const int8_t* input, + const T* attr_mask, + const int batch_size, + const int head_num, + const int seq_len, + const int seq_len_padded, + const float scalar1a, + const float* scalar1b, + const float* amax_ptr, + const int seq_len_x_seq_len, + const int seq_len_x_seq_len_padded) { - const float amax = __ldg(amax_ptr); - const float scalar1 = scalar1a * __ldg(scalar1b) * __ldg(scalar1c); - int mask_id; - int threadIdx2 = threadIdx.x << 1; - - char2* buf2Ptr = (char2 *)output; - - bool qual = threadIdx2 < seq_len; - for (int seq_id = blockIdx.x ; seq_id < seq_len ; seq_id += gridDim.x){ - char2 tmp2 = {0, 0}; - int inIdx = (blockIdx.y * head_num + blockIdx.z) * (seq_len_x_seq_len) + - (threadIdx2 & 0xffffffe0) * seq_len + - (seq_id << 5) + (threadIdx2 & 31); - - //set softmax of padding word to 0 - float mask_in_seq = static_cast(__ldg(attr_mask+(blockIdx.y*seq_len_x_seq_len + seq_id))); - if (mask_in_seq < 0.1f){ - if (qual) - buf2Ptr[inIdx >> 1] = tmp2; - continue; - } - - float2 floatTmp2 = {0.0f, 0.0f}; - if (qual){ - floatTmp2.x = static_cast(__ldg(input + inIdx)) * scalar1; - floatTmp2.y = static_cast(__ldg(input + inIdx + 1)) * scalar1; - } - - float mask_val, max_val; - max_val = -1e20f; - - __shared__ float s_max, s_sum; - - if (qual){ - mask_id = threadIdx2 + blockIdx.y * seq_len_x_seq_len + seq_id * seq_len; - //for x - mask_val = (1.0f - static_cast(__ldg(attr_mask+mask_id))) * -10000.0f; - floatTmp2.x = floatTmp2.x + mask_val; - - //for y - mask_val = (1.0f - static_cast(__ldg(attr_mask+mask_id+1))) * -10000.0f; - floatTmp2.y = floatTmp2.y + mask_val; - - max_val = fmaxf(floatTmp2.x, floatTmp2.y); - } - - max_val = blockDim.x <= 32 ? warpReduceMax(max_val) : blockReduceMax(max_val); - - if (threadIdx.x == 0){ - s_max = max_val; - } - __syncthreads(); - - float sum_val = 0.0f; - - if (qual){ - floatTmp2.x = __expf(floatTmp2.x - s_max); - sum_val += floatTmp2.x; - floatTmp2.y = __expf(floatTmp2.y - s_max); - sum_val += floatTmp2.y; - } - - sum_val = blockDim.x <= 32 ? warpReduceSum(sum_val) : blockReduceSum(sum_val); - - if (threadIdx.x == 0){ - s_sum = __fdividef(127.0f, (sum_val + 1e-6f)); - s_sum = __fdividef(s_sum, amax); - } - __syncthreads(); - - if (qual){ - tmp2.x = float_to_int8_rn(floatTmp2.x*s_sum); - tmp2.y = float_to_int8_rn(floatTmp2.y*s_sum); - buf2Ptr[inIdx >> 1] = tmp2; + const float amax = __ldg(amax_ptr); + const float scalar1 = scalar1a * __ldg(scalar1b); + int mask_id; + int threadIdx2 = threadIdx.x << 1; + + char2* buf2Ptr = (char2*)output; + const char2* inBuf2Ptr = (const char2*)input; + + const bool qual = threadIdx2 < seq_len; + const bool qual_padded = threadIdx2 < seq_len_padded; + for (int seq_id = blockIdx.x; seq_id < seq_len; seq_id += gridDim.x) { + char2 tmp2 = {0, 0}; + int inIdx = ((blockIdx.y * head_num + blockIdx.z) * (seq_len_x_seq_len_padded) + + (threadIdx2 & 0xffffffe0) * seq_len + (seq_id << 5) + (threadIdx2 & 31)) + >> 1; + + // set softmax of padding word in rows to 0 + float mask_in_seq = static_cast(__ldg(attr_mask + (blockIdx.y * seq_len_x_seq_len + seq_id))); + if (mask_in_seq < 0.1f) { + if (qual_padded) { + buf2Ptr[inIdx] = tmp2; + } + continue; + } + + // set softmax of padding word in cols to 0 + float2 floatTmp2 = {0.0f, 0.0f}; + if (qual) { + tmp2 = __ldg(inBuf2Ptr + inIdx); + floatTmp2.x = static_cast(tmp2.x) * scalar1; + floatTmp2.y = static_cast(tmp2.y) * scalar1; + } + + float mask_val, max_val; + max_val = -1e20f; + + __shared__ float s_max, s_sum; + + if (qual) { + mask_id = threadIdx2 + blockIdx.y * seq_len_x_seq_len + seq_id * seq_len; + // for x + mask_val = (1.0f - static_cast(__ldg(attr_mask + mask_id))) * -10000.0f; + floatTmp2.x = floatTmp2.x + mask_val; + + // for y + mask_val = (1.0f - static_cast(__ldg(attr_mask + mask_id + 1))) * -10000.0f; + floatTmp2.y = floatTmp2.y + mask_val; + + max_val = fmaxf(floatTmp2.x, floatTmp2.y); + } + + max_val = warpReduceMax(max_val); + + if (threadIdx.x == 0) { + s_max = max_val; + } + __syncthreads(); + + float sum_val = 0.0f; + + if (qual) { + floatTmp2.x = __expf(floatTmp2.x - s_max); + sum_val += floatTmp2.x; + floatTmp2.y = __expf(floatTmp2.y - s_max); + sum_val += floatTmp2.y; + } + + sum_val = warpReduceSum(sum_val); + + if (threadIdx.x == 0) { + s_sum = __fdividef(127.0f, (sum_val + 1e-6f)); + s_sum = __fdividef(s_sum, amax); + } + __syncthreads(); + + if (qual_padded) { + tmp2.x = qual ? float_to_int8_rn(floatTmp2.x * s_sum) : static_cast(0); + tmp2.y = qual ? float_to_int8_rn(floatTmp2.y * s_sum) : static_cast(0); + buf2Ptr[inIdx] = tmp2; + } } - } } -//input are a series of sub-matrixes of m = seq_len, n = seq_len_padded, CUBLASLT_ORDER_COL32 -//seq_len_padded = (seq_len+31)/32*32 -//grid = (seq_len, batch_size, head_num) -//block.x = 32 -//for int8_t IO -//for seq_len in (32, 64] -template -__global__ -void softmax_COL32_LE64_varlen(int8_t* output, const int8_t* input, const T* attr_mask, const int batch_size, - const int head_num, const int seq_len, const int seq_len_padded, - const float scalar1a, const float *scalar1b, const float *amax_ptr, - const int seq_len_x_seq_len, const int seq_len_x_seq_len_padded) +template +void invokeSoftmaxCOL32(int8_t* output, + const int32_t* input, + const T* attr_mask, + const int batch_size, + const int head_num, + const int seq_len, + const float scalar1a, + const float* scalar1b, + const float* scalar1c, + const float* amax_ptr, + cudaStream_t stream) { - const float amax = __ldg(amax_ptr); - const float scalar1 = scalar1a * __ldg(scalar1b); - int mask_id; - int threadIdx2 = threadIdx.x << 1; - - char2* buf2Ptr = (char2 *)output; - const char2* inBuf2Ptr = (const char2 *)input; - - const bool qual = threadIdx2 < seq_len; - const bool qual_padded = threadIdx2 < seq_len_padded; - for (int seq_id = blockIdx.x ; seq_id < seq_len ; seq_id += gridDim.x){ - char2 tmp2 = {0, 0}; - int inIdx = ((blockIdx.y * head_num + blockIdx.z) * (seq_len_x_seq_len_padded) + - (threadIdx2 & 0xffffffe0) * seq_len + - (seq_id << 5) + (threadIdx2 & 31)) >> 1; - - //set softmax of padding word in rows to 0 - float mask_in_seq = static_cast(__ldg(attr_mask+(blockIdx.y*seq_len_x_seq_len + seq_id))); - if (mask_in_seq < 0.1f){ - if (qual_padded) - buf2Ptr[inIdx] = tmp2; - continue; - } - - //set softmax of padding word in cols to 0 - float2 floatTmp2 = {0.0f, 0.0f}; - if (qual){ - tmp2 = __ldg(inBuf2Ptr + inIdx); - floatTmp2.x = static_cast(tmp2.x) * scalar1; - floatTmp2.y = static_cast(tmp2.y) * scalar1; - } - - float mask_val, max_val; - max_val = -1e20f; - - __shared__ float s_max, s_sum; - - if (qual){ - mask_id = threadIdx2 + blockIdx.y * seq_len_x_seq_len + seq_id * seq_len; - //for x - mask_val = (1.0f - static_cast(__ldg(attr_mask+mask_id))) * -10000.0f; - floatTmp2.x = floatTmp2.x + mask_val; - - //for y - mask_val = (1.0f - static_cast(__ldg(attr_mask+mask_id+1))) * -10000.0f; - floatTmp2.y = floatTmp2.y + mask_val; - - max_val = fmaxf(floatTmp2.x, floatTmp2.y); - } - - max_val = warpReduceMax(max_val); - - if (threadIdx.x == 0){ - s_max = max_val; + dim3 grid, block; + grid.x = seq_len; + grid.y = batch_size; + grid.z = head_num; + + if (seq_len <= 32) { + if (batch_size * head_num > 960) { + grid.x = ceil(float(seq_len) / 32.0f); + } + block.x = (seq_len + 31) / 32 * 32; + softmax_COL32_LE32<<>>(output, + input, + attr_mask, + batch_size, + head_num, + seq_len, + scalar1a, + scalar1b, + scalar1c, + amax_ptr, + seq_len * head_num, + seq_len * seq_len); + } + else if (seq_len <= 64) { + assert(seq_len % 2 == 0); + block.x = (seq_len / 2 + 31) / 32 * 32; + if (batch_size * head_num > 960) { + grid.x = ceil(float(seq_len) / 32.0f); + } + softmax_COL32_LE64<<>>(output, + input, + attr_mask, + batch_size, + head_num, + seq_len, + scalar1a, + scalar1b, + scalar1c, + amax_ptr, + seq_len * head_num, + seq_len * seq_len); + } + else { + assert(seq_len % 4 == 0); + block.x = (seq_len / 4 + 31) / 32 * 32; + softmax_COL32<<>>(output, + input, + attr_mask, + batch_size, + head_num, + seq_len, + scalar1a, + scalar1b, + scalar1c, + amax_ptr, + seq_len * head_num, + seq_len * seq_len); } - __syncthreads(); - - float sum_val = 0.0f; - - if (qual){ - floatTmp2.x = __expf(floatTmp2.x - s_max); - sum_val += floatTmp2.x; - floatTmp2.y = __expf(floatTmp2.y - s_max); - sum_val += floatTmp2.y; - } - - sum_val = warpReduceSum(sum_val); - - if (threadIdx.x == 0){ - s_sum = __fdividef(127.0f, (sum_val + 1e-6f)); - s_sum = __fdividef(s_sum, amax); - } - __syncthreads(); +} - if (qual_padded){ - tmp2.x = qual ? float_to_int8_rn(floatTmp2.x*s_sum) : static_cast(0); - tmp2.y = qual ? float_to_int8_rn(floatTmp2.y*s_sum) : static_cast(0); - buf2Ptr[inIdx] = tmp2; +template void invokeSoftmaxCOL32(int8_t* output, + const int32_t* input, + const float* attr_mask, + const int batch_size, + const int head_num, + const int seq_len, + const float scalar1a, + const float* scalar1b, + const float* scalar1c, + const float* amax_ptr, + cudaStream_t stream); + +template void invokeSoftmaxCOL32(int8_t* output, + const int32_t* input, + const half* attr_mask, + const int batch_size, + const int head_num, + const int seq_len, + const float scalar1a, + const float* scalar1b, + const float* scalar1c, + const float* amax_ptr, + cudaStream_t stream); + +template +void invokeSoftmaxCOL32(int8_t* output, + const int8_t* input, + const T* attr_mask, + const int batch_size, + const int head_num, + const int seq_len, + const float scalar1a, + const float* scalar1b, + const float* amax_ptr, + cudaStream_t stream) +{ + dim3 grid, block; + grid.x = seq_len; + grid.y = batch_size; + grid.z = head_num; + const int seq_len_padded = (seq_len + 31) / 32 * 32; + + if (seq_len <= 32) { + if (batch_size * head_num > 960) { + grid.x = ceil(float(seq_len) / 32.0f); + } + block.x = seq_len_padded; + softmax_COL32_LE32_varlen<<>>(output, + input, + attr_mask, + batch_size, + head_num, + seq_len, + seq_len_padded, + scalar1a, + scalar1b, + amax_ptr, + seq_len * seq_len, + seq_len * seq_len_padded); + } + else if (seq_len <= 64 && (seq_len % 2 == 0)) { + block.x = 32; + if (batch_size * head_num > 960) { + grid.x = ceil(float(seq_len) / 32.0f); + } + softmax_COL32_LE64_varlen<<>>(output, + input, + attr_mask, + batch_size, + head_num, + seq_len, + seq_len_padded, + scalar1a, + scalar1b, + amax_ptr, + seq_len * seq_len, + seq_len * seq_len_padded); + } + else if (seq_len > 64 && (seq_len % 4 == 0)) { + block.x = (seq_len_padded / 4 + 31) / 32 * 32; + softmax_COL32_varlen<<>>(output, + input, + attr_mask, + batch_size, + head_num, + seq_len, + seq_len_padded, + scalar1a, + scalar1b, + amax_ptr, + seq_len * seq_len, + seq_len * seq_len_padded); + } + else { + block.x = (seq_len_padded + 31) / 32 * 32; + softmax_COL32_perElement_varlen<<>>(output, + input, + attr_mask, + batch_size, + head_num, + seq_len, + seq_len_padded, + scalar1a, + scalar1b, + amax_ptr, + seq_len * seq_len, + seq_len * seq_len_padded); } - } } - -template -void invokeSoftmaxCOL32(int8_t* output, const int32_t* input, const T* attr_mask, - const int batch_size, const int head_num, const int seq_len, - const float scalar1a, const float *scalar1b, const float *scalar1c, - const float *amax_ptr, cudaStream_t stream) +template void invokeSoftmaxCOL32(int8_t* output, + const int8_t* input, + const float* attr_mask, + const int batch_size, + const int head_num, + const int seq_len, + const float scalar1a, + const float* scalar1b, + const float* amax_ptr, + cudaStream_t stream); + +template void invokeSoftmaxCOL32(int8_t* output, + const int8_t* input, + const half* attr_mask, + const int batch_size, + const int head_num, + const int seq_len, + const float scalar1a, + const float* scalar1b, + const float* amax_ptr, + cudaStream_t stream); + +/******************* invokeSoftmaxCOL32 ***********************/ + +// grid = (window_len/word_per_thread, window_num*num_head, batch_size) +// block.x = max(32, (window_len + 31)/32*32) +// qk_buf is [batch, window_num, num_head, window_len, window_len] +// attn_mask is [window_num, window_len, window_len] + row-major +// relative_pos_bias is [num_head, window_len, window_len] + row-majot +template +__global__ void softmax_INT8IO_kernel_COL32(int8_t* a_buf, + int8_t* qk_buf_int8, + const T* attn_mask, + const T* relative_pos_bias, + const int batch_size, + const int num_head, + const int window_num, + const int window_len, + const int window_len_x_window_len, + const float scalar, + const float* deQ_scale_ptr, + const float* out_scale_ptr) { - dim3 grid, block; - grid.x = seq_len; - grid.y = batch_size; - grid.z = head_num; - - if (seq_len <= 32){ - if (batch_size * head_num > 960) - grid.x = ceil(float(seq_len)/32.0f); - block.x = (seq_len + 31)/32*32; - softmax_COL32_LE32<<>>(output, input, attr_mask, batch_size, head_num, - seq_len, scalar1a, scalar1b, scalar1c, - amax_ptr, seq_len*head_num, seq_len*seq_len); - } - else if (seq_len <= 64){ - assert(seq_len % 2 == 0); - block.x = (seq_len/2 + 31)/32*32; - if (batch_size * head_num > 960) - grid.x = ceil(float(seq_len)/32.0f); - softmax_COL32_LE64<<>>(output, input, attr_mask, batch_size, head_num, - seq_len, scalar1a, scalar1b, scalar1c, - amax_ptr, seq_len*head_num, seq_len*seq_len); - } - else - { - assert(seq_len % 4 == 0); - block.x = (seq_len/4 + 31)/32*32; - softmax_COL32<<>>(output, input, attr_mask, batch_size, head_num, - seq_len, scalar1a, scalar1b, scalar1c, - amax_ptr, seq_len*head_num, seq_len*seq_len); - } + + bool qual = threadIdx.x < window_len; + const int padded_winlen = (window_len + 31) / 32 * 32; + for (int window_id = blockIdx.x; window_id < window_len; window_id += gridDim.x) { + float tmp = -1e20f; + __shared__ float s_mean, s_max; + int qk_offset = (blockIdx.z * gridDim.y + blockIdx.y) * window_len * padded_winlen + + ((threadIdx.x >> 5) << 5) * window_len + (window_id << 5) + (threadIdx.x & 31); + ; + if (qual) { + const int offset_in_window = window_id * window_len + threadIdx.x; + + const int relative_pos_bias_offset = (blockIdx.y % num_head) * window_len_x_window_len + offset_in_window; + float mask_val = + (attn_mask == nullptr) ? + 0.0f : + static_cast( + __ldg(attn_mask + ((blockIdx.y / num_head) * window_len_x_window_len + offset_in_window))); + tmp = scalar * static_cast(qk_buf_int8[qk_offset]) * __ldg(deQ_scale_ptr) + mask_val + + static_cast(__ldg(relative_pos_bias + relative_pos_bias_offset)); + } + + float max_val = blockReduceMax(tmp); + if (threadIdx.x == 0) { + s_max = max_val; + } + __syncthreads(); + + float qk_tmp = qual ? __expf(tmp - s_max) : 0.0f; + float sum_val = blockReduceSum(qk_tmp); + if (threadIdx.x == 0) { + s_mean = sum_val + 1e-6f; + s_mean = __fdividef(1.0f, s_mean); + } + __syncthreads(); + a_buf[qk_offset] = qual ? float_to_int8_rn(qk_tmp * s_mean * __ldg(out_scale_ptr)) : 0; + } } -template -void invokeSoftmaxCOL32(int8_t* output, const int32_t* input, const float* attr_mask, - const int batch_size, const int head_num, const int seq_len, - const float scalar1a, const float *scalar1b, const float *scalar1c, - const float *amax_ptr, cudaStream_t stream); - -template -void invokeSoftmaxCOL32(int8_t* output, const int32_t* input, const half* attr_mask, - const int batch_size, const int head_num, const int seq_len, - const float scalar1a, const float *scalar1b, const float *scalar1c, - const float *amax_ptr, cudaStream_t stream); - -template -void invokeSoftmaxCOL32(int8_t* output, const int8_t* input, const T* attr_mask, - const int batch_size, const int head_num, const int seq_len, - const float scalar1a, const float *scalar1b, const float *amax_ptr, - cudaStream_t stream) +template +void invokeSoftmaxWithRelPosBiasCOL32(int8_t* a_buf, + int8_t* qk_buf_int8, + const T* attn_mask, + const T* relative_pos_bias, + const int batch_size, + const int num_head, + const int window_num, + const int window_len, + const float scalar, + const float* deQ_scale_ptr, + const float* out_scale_ptr, + cudaStream_t stream) { - dim3 grid, block; - grid.x = seq_len; - grid.y = batch_size; - grid.z = head_num; - const int seq_len_padded = (seq_len + 31)/32*32; - - if (seq_len <= 32){ - if (batch_size * head_num > 960) - grid.x = ceil(float(seq_len)/32.0f); - block.x = seq_len_padded; - softmax_COL32_LE32_varlen<<>>(output, input, attr_mask, batch_size, head_num, - seq_len, seq_len_padded, scalar1a, scalar1b, amax_ptr, - seq_len*seq_len, seq_len*seq_len_padded); - } - else if (seq_len <= 64 && (seq_len % 2 == 0)){ - block.x = 32; - if (batch_size * head_num > 960) - grid.x = ceil(float(seq_len)/32.0f); - softmax_COL32_LE64_varlen<<>>(output, input, attr_mask, batch_size, head_num, - seq_len, seq_len_padded, scalar1a, scalar1b, amax_ptr, - seq_len*seq_len, seq_len*seq_len_padded); - } - else if (seq_len > 64 && (seq_len % 4 == 0)) - { - block.x = (seq_len_padded/4 + 31)/32*32; - softmax_COL32_varlen<<>>(output, input, attr_mask, batch_size, head_num, - seq_len, seq_len_padded, scalar1a, scalar1b, amax_ptr, - seq_len*seq_len, seq_len*seq_len_padded); - } - else - { - block.x = (seq_len_padded + 31)/32*32; - softmax_COL32_perElement_varlen<<>>(output, input, attr_mask, batch_size, head_num, - seq_len, seq_len_padded, scalar1a, scalar1b, amax_ptr, - seq_len*seq_len, seq_len*seq_len_padded); - } + dim3 grid(window_len, window_num * num_head, batch_size); + dim3 block((window_len + 31) / 32 * 32); + softmax_INT8IO_kernel_COL32<<>>(a_buf, + qk_buf_int8, + attn_mask, + relative_pos_bias, + batch_size, + num_head, + window_num, + window_len, + window_len * window_len, + scalar, + deQ_scale_ptr, + out_scale_ptr); } -template -void invokeSoftmaxCOL32(int8_t* output, const int8_t* input, const float* attr_mask, - const int batch_size, const int head_num, const int seq_len, - const float scalar1a, const float *scalar1b, - const float *amax_ptr, cudaStream_t stream); - -template -void invokeSoftmaxCOL32(int8_t* output, const int8_t* input, const half* attr_mask, - const int batch_size, const int head_num, const int seq_len, - const float scalar1a, const float *scalar1b, - const float *amax_ptr, cudaStream_t stream); +template void invokeSoftmaxWithRelPosBiasCOL32(int8_t* a_buf, + int8_t* qk_buf_int8, + const float* attn_mask, + const float* relative_pos_bias, + const int batch_size, + const int num_head, + const int window_num, + const int window_len, + const float scalar, + const float* deQ_scale_ptr, + const float* output_scale_ptr, + cudaStream_t stream); + +template void invokeSoftmaxWithRelPosBiasCOL32(int8_t* a_buf, + int8_t* qk_buf_int8, + const half* attn_mask, + const half* relative_pos_bias, + const int batch_size, + const int num_head, + const int window_num, + const int window_len, + const float scalar, + const float* deQ_scale_ptr, + const float* output_scale_ptr, + cudaStream_t stream); } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/softmax_int8_kernels.h b/src/fastertransformer/kernels/softmax_int8_kernels.h index 1cbe78891..65d641925 100644 --- a/src/fastertransformer/kernels/softmax_int8_kernels.h +++ b/src/fastertransformer/kernels/softmax_int8_kernels.h @@ -22,15 +22,42 @@ namespace fastertransformer { -template -void invokeSoftmaxCOL32(int8_t* output, const int32_t* input, const T* attr_mask, - const int batch_size, const int head_num, const int seq_len, - const float scalar1a, const float *scalar1b, const float *scalar1c, - const float *amax_ptr, cudaStream_t stream); +template +void invokeSoftmaxCOL32(int8_t* output, + const int32_t* input, + const T* attr_mask, + const int batch_size, + const int head_num, + const int seq_len, + const float scalar1a, + const float* scalar1b, + const float* scalar1c, + const float* amax_ptr, + cudaStream_t stream); -template -void invokeSoftmaxCOL32(int8_t* output, const int8_t* input, const T* attr_mask, - const int batch_size, const int head_num, const int seq_len, - const float scalar1a, const float *scalar1b, const float *amax_ptr, +template +void invokeSoftmaxCOL32(int8_t* output, + const int8_t* input, + const T* attr_mask, + const int batch_size, + const int head_num, + const int seq_len, + const float scalar1a, + const float* scalar1b, + const float* amax_ptr, cudaStream_t stream); + +template +void invokeSoftmaxWithRelPosBiasCOL32(int8_t* a_buf, + int8_t* qk_buf_int8, + const T* attn_mask, + const T* relative_pos_bias, + const int batch_size, + const int num_head, + const int window_num, + const int window_len, + const float scalar, + const float* deQ_scale_ptr, + const float* out_scale_ptr, + cudaStream_t stream); } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/stop_criteria_kernels.cu b/src/fastertransformer/kernels/stop_criteria_kernels.cu new file mode 100644 index 000000000..43b291a72 --- /dev/null +++ b/src/fastertransformer/kernels/stop_criteria_kernels.cu @@ -0,0 +1,102 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/stop_criteria_kernels.h" +#include "src/fastertransformer/utils/cuda_utils.h" + +namespace fastertransformer { + +__global__ void stop_words_criterion(const int* output_ids, + const int* parent_ids, + const int* stop_words, + bool* finished, + size_t id_offset, + size_t stop_words_len, + int batch_size, + int beam_width, + int step) +{ + const int id = blockIdx.x * blockDim.x + threadIdx.x; + const int batch_idx = blockIdx.y / beam_width; + const int beam_idx = blockIdx.y % beam_width; + + const int* base_stop_words = stop_words + batch_idx * 2 * stop_words_len; + const int* base_offsets = base_stop_words + stop_words_len; + + if (id >= stop_words_len || base_offsets[id] < 0) { + return; + } + + const int item_end = base_offsets[id]; + const int item_start = (id > 0) ? base_offsets[id - 1] : 0; + const int item_size = item_end - item_start; + + /* The single-token case unconditionally bans the token */ + bool should_stop = false; + + /* Enough previously generated tokens to look for a match */ + if (step + 1 >= item_size) { + should_stop = true; + int parent_id = beam_idx; + const bool gather_beam = beam_width > 1; + + for (int token_idx = item_size - 1; token_idx >= 0; token_idx--) { + const int previous_token = output_ids[(step - (item_size - 1) + token_idx) * batch_size * beam_width + + id_offset + batch_idx * beam_width + parent_id]; + + if (previous_token != base_stop_words[item_start + token_idx]) { + should_stop = false; + break; + } + if (gather_beam) { + parent_id = parent_ids[(step - (item_size - 1) + token_idx) * beam_width * batch_size + id_offset + + batch_idx * beam_width + parent_id]; + + if (parent_id < 0 || parent_id >= beam_width) { + should_stop = false; + break; + } + } + } + } + + if (should_stop) { + finished[batch_idx * beam_width + beam_idx] = true; + } +} + +void invokeStopWordsCriterion(const int* output_ids, + const int* parent_ids, + const int* stop_words, + bool* finished, + size_t id_offset, + size_t stop_words_len, + int batch_size, + int beam_width, + int step, + cudaStream_t stream) +{ + dim3 block, grid; + block.x = min(((stop_words_len + 32 - 1) / 32) * 32, 256UL); + grid.x = (stop_words_len + block.x - 1) / block.x; + grid.y = batch_size * beam_width; + + stop_words_criterion<<>>( + output_ids, parent_ids, stop_words, finished, id_offset, stop_words_len, batch_size, beam_width, step); + sync_check_cuda_error(); +} + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/stop_criteria_kernels.h b/src/fastertransformer/kernels/stop_criteria_kernels.h new file mode 100644 index 000000000..88ee1edfd --- /dev/null +++ b/src/fastertransformer/kernels/stop_criteria_kernels.h @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#pragma once + +#include + +namespace fastertransformer { + +void invokeStopWordsCriterion(const int* output_ids, + const int* parent_ids, + const int* stop_words, + bool* finished, + size_t id_offset, + size_t stop_words_len, + int batch_size, + int beam_width, + int step, + cudaStream_t stream); + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/transform_mask_kernels.cu b/src/fastertransformer/kernels/transform_mask_kernels.cu new file mode 100644 index 000000000..b645049d5 --- /dev/null +++ b/src/fastertransformer/kernels/transform_mask_kernels.cu @@ -0,0 +1,169 @@ +/* + * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "reduce_kernel_utils.cuh" +#include "transform_mask_kernels.h" + +namespace fastertransformer { + +/******************* invokeTransformMask ***********************/ + +// transform mask [B, S, S](half) into [B, S2*S2/64, 64](half), S2 is the actural seqlen used in fmha row-major +// in one MMA (16*16 elements calculated by a warp), each thread calculates 8 elements +// the offsets of elements calculated by each thread are : for n, +0 +1 +8 +9; for m, +0 +8 (M_XMMAS*N_XMMAS times) +// in transformed_mask, the masks of one warp are stored in 4 continuous rows ([4, 64]), with two elements of one thread +// stored in 2 continuous halfs. one cta calculates warps_m*warps_n mma == 16*warps_m*16*warps_n elements grid(B, +// S2*S2/64) block(32) +__global__ void transform_mask_kernel(half2* tranformed_mask, + const half2* mask, + const uint32_t warps_m, + const uint32_t warps_n, + const uint32_t B, + const uint32_t S, + const uint32_t S2) +{ + const int bi = blockIdx.x; + const int r = blockIdx.y; + + const int N_per_XMMAS = warps_n << 4; + const int M_per_XMMAS = warps_m << 4; + const int N_XMMAS = (S2 + N_per_XMMAS - 1) / (N_per_XMMAS); + const int warps_in_XMMAS = warps_m * warps_n; + const half2* mask_b = mask + ((bi * S * S) >> 1); + half2* tranformed_mask_b = tranformed_mask + (bi * gridDim.y << 5); //((bi * gridDim.y << 6) >> 1); + + half2 tmp = {half(-30000.0f), half(-30000.0f)}; + + int c = threadIdx.x * 2; + int elt_offset = c % 2; + int warp_id = r / 4; + int elt_in_thread = (r % 4) * 2 + elt_offset; + int noffset_in_warp = (((elt_in_thread & 3) >> 1) << 3) + (elt_in_thread & 1); + int moffset_in_warp = ((elt_in_thread >> 2) & 1) << 3; + + int XMMAS_mi = warp_id / (N_XMMAS * warps_in_XMMAS); + int XMMAS_ni = warp_id % (N_XMMAS * warps_in_XMMAS) / warps_in_XMMAS; + int warp_id_in_XMMAS = warp_id - (XMMAS_mi * N_XMMAS + XMMAS_ni) * warps_in_XMMAS; + int warp_mi = warp_id_in_XMMAS % warps_m; + int warp_ni = warp_id_in_XMMAS / warps_m; + int noffset = XMMAS_ni * N_per_XMMAS + (warp_ni << 4) + noffset_in_warp; + int moffset = XMMAS_mi * M_per_XMMAS + (warp_mi << 4) + moffset_in_warp; + + int mi = moffset + (c >> 3); + int ni = noffset + (((c >> 1) & 3) << 1); + + if (mi < S && ni < S) { + tmp = __ldg(mask_b + ((mi * S + ni) >> 1)); + } + + tranformed_mask_b[(r << 5) + threadIdx.x] = tmp; +} + +// transform mask [B, S, S](half) into [B, S2*S2/64, 64](half), S2 is the actural seqlen used in fmha row-major +// in one MMA (16*16 elements calculated by a warp), each thread calculates 8 elements +// the offsets of elements calculated by each thread are : for n, +0 +1 +8 +9; for m, +0 +8 (M_XMMAS*N_XMMAS times) +// in transformed_mask, the masks of one warp are stored in 4 continuous rows ([4, 64]), with two elements of one thread +// stored in 2 continuous halfs. one cta calculates warps_m*warps_n mma == 16*warps_m*16*warps_n elements grid(B, +// S2*S2/64) block(32) +__global__ void transform_mask_kernel(half* tranformed_mask, + const half* mask, + const uint32_t warps_m, + const uint32_t warps_n, + const uint32_t B, + const uint32_t S, + const uint32_t S2) +{ + const int bi = blockIdx.x; + const int r = blockIdx.y; + + const int N_per_XMMAS = warps_n << 4; + const int M_per_XMMAS = warps_m << 4; + const int N_XMMAS = (S2 + N_per_XMMAS - 1) / (N_per_XMMAS); + const int warps_in_XMMAS = warps_m * warps_n; + half2* tranformed_mask_b = (half2*)(tranformed_mask + (bi * gridDim.y << 6)); + + half2 tmp = {half(-30000.0f), half(-30000.0f)}; + + int c = threadIdx.x * 2; + int elt_offset = c % 2; + int warp_id = r / 4; + int elt_in_thread = (r % 4) * 2 + elt_offset; + int noffset_in_warp = (((elt_in_thread & 3) >> 1) << 3) + (elt_in_thread & 1); + int moffset_in_warp = ((elt_in_thread >> 2) & 1) << 3; + + int XMMAS_mi = warp_id / (N_XMMAS * warps_in_XMMAS); + int XMMAS_ni = warp_id % (N_XMMAS * warps_in_XMMAS) / warps_in_XMMAS; + int warp_id_in_XMMAS = warp_id - (XMMAS_mi * N_XMMAS + XMMAS_ni) * warps_in_XMMAS; + int warp_mi = warp_id_in_XMMAS % warps_m; + int warp_ni = warp_id_in_XMMAS / warps_m; + int noffset = XMMAS_ni * N_per_XMMAS + (warp_ni << 4) + noffset_in_warp; + int moffset = XMMAS_mi * M_per_XMMAS + (warp_mi << 4) + moffset_in_warp; + + int mi = moffset + (c >> 3); + int ni = noffset + (((c >> 1) & 3) << 1); + + if (mi < S) { + mask += bi * S * S; + int idx = mi * S + ni; + if (ni < S) { + tmp.x = __ldg(mask + idx); + } + if (ni + 1 < S) { + tmp.y = __ldg(mask + idx + 1); + } + } + + tranformed_mask_b[(r << 5) + threadIdx.x] = tmp; +} + +void invokeTransformMask( + half* tranformed_mask, const half* mask, const uint32_t B, const uint32_t S, cudaStream_t stream) +{ + uint32_t S2; + uint32_t warps_m = 2, warps_n = 2; + if (S <= 64) { + S2 = 64; + } + else if (S <= 128) { + S2 = 128; + } + else if (S <= 256) { + S2 = 256; + warps_m = 1; + warps_n = 4; + } + else if (S <= 384) { + S2 = 384; + warps_m = 1; + warps_n = 8; + } + else { + printf("[ERROR][invokeTransformMask]unsupport seq_len %d\n", S); + exit(-1); + } + assert(S2 * S2 % 64 == 0); + dim3 grid(B, S2 * S2 / 64); + dim3 block(32); + if (S % 2 == 0) { + transform_mask_kernel<<>>( + (half2*)tranformed_mask, (const half2*)mask, warps_m, warps_n, B, S, S2); + } + else { + transform_mask_kernel<<>>(tranformed_mask, mask, warps_m, warps_n, B, S, S2); + } +} + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/transform_mask_kernels.h b/src/fastertransformer/kernels/transform_mask_kernels.h new file mode 100644 index 000000000..f2ae03372 --- /dev/null +++ b/src/fastertransformer/kernels/transform_mask_kernels.h @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once +#include +#include +#include +#include + +namespace fastertransformer { + +void invokeTransformMask( + half* tranformed_mask, const half* mask, const uint32_t B, const uint32_t S, cudaStream_t stream); + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/transpose_int8_kernels.cu b/src/fastertransformer/kernels/transpose_int8_kernels.cu index cb16e9e83..7de8300f8 100644 --- a/src/fastertransformer/kernels/transpose_int8_kernels.cu +++ b/src/fastertransformer/kernels/transpose_int8_kernels.cu @@ -18,301 +18,460 @@ namespace fastertransformer { -//src is the result of batch MM, whose size is batch_size*head_num*(seq_len, size_per_head), CUBLASLT_ORDER_COL32 -//dst is of m = batch_size*seq_len, k(n) = head_num*size_per_head, CUBLASLT_ORDER_COL32 -//grid(seq_len, batch_size) -//block(size_per_head/4, head_num) -//assume size_per_head is multiples of 32 -__global__ -void transpose_COL32_kernel(char4* dst, const int4* src, const int batch_size, const int seq_len, const int head_num, - const int size_per_head, const float *v_buf_addBias_deQFactor, const float* qk_afterSM_deQFactor, const float* out_scale_ptr, - const int batch_size_x_seq_len, const int seq_len_x_size_per_head) +// src is the result of batch MM, whose size is batch_size*head_num*(seq_len, size_per_head), CUBLASLT_ORDER_COL32 +// dst is of m = batch_size*seq_len, k(n) = head_num*size_per_head, CUBLASLT_ORDER_COL32 +// grid(seq_len, batch_size) +// block(size_per_head/4, head_num) +// assume size_per_head is multiples of 32 +__global__ void transpose_COL32_kernel(char4* dst, + const int4* src, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* v_buf_addBias_deQFactor, + const float* qk_afterSM_deQFactor, + const float* out_scale_ptr, + const int batch_size_x_seq_len, + const int seq_len_x_size_per_head) { - const float scale = __ldg(v_buf_addBias_deQFactor) * __ldg(qk_afterSM_deQFactor) * __ldg(out_scale_ptr); - int threadIdx4 = threadIdx.x << 2; - int batch_id = blockIdx.y; - int seq_id = blockIdx.x; - int head_id = threadIdx.y; - //get the (row, col) output layout of m*k - //m = batch_size*seq_len - //k = head_num*size_per_head - int mk_row = batch_id*seq_len + seq_id; - int mk_col = head_id*size_per_head + threadIdx4; - //get the (row, col) layout of COL32; leading dimension = 32*m = 32*batch_size*seq_len - int COL32_row = (mk_row << 5) + (mk_col&31); - //int COL32_col = mk_col >> 5; - int outIdx = ((mk_col & 0xffffffe0)*batch_size_x_seq_len + COL32_row) >> 2; - - //get the (row, col) input layout of m'*k' - //m' = seq_len - //k' = size_per_head - mk_row = seq_id; - mk_col = threadIdx4; - //get the (row, col) layout of COL32; leading dimension = 32*m' = 32*seq_len - COL32_row = (mk_row << 5) + (mk_col&31); - //COL32_col = mk_col >> 5; - - int inIdx = ((batch_id*head_num + head_id)*seq_len_x_size_per_head + (mk_col & 0xffffffe0)*seq_len + COL32_row) >> 2; - char4 tmp; - - int4 srcTmp4 = __ldg(src + inIdx); - tmp.x = float_to_int8_rn(srcTmp4.x*scale); - tmp.y = float_to_int8_rn(srcTmp4.y*scale); - tmp.z = float_to_int8_rn(srcTmp4.z*scale); - tmp.w = float_to_int8_rn(srcTmp4.w*scale); - dst[outIdx] = tmp; -} + const float scale = __ldg(v_buf_addBias_deQFactor) * __ldg(qk_afterSM_deQFactor) * __ldg(out_scale_ptr); + int threadIdx4 = threadIdx.x << 2; + int batch_id = blockIdx.y; + int seq_id = blockIdx.x; + int head_id = threadIdx.y; + // get the (row, col) output layout of m*k + // m = batch_size*seq_len + // k = head_num*size_per_head + int mk_row = batch_id * seq_len + seq_id; + int mk_col = head_id * size_per_head + threadIdx4; + // get the (row, col) layout of COL32; leading dimension = 32*m = 32*batch_size*seq_len + int COL32_row = (mk_row << 5) + (mk_col & 31); + // int COL32_col = mk_col >> 5; + int outIdx = ((mk_col & 0xffffffe0) * batch_size_x_seq_len + COL32_row) >> 2; -void invokeTransposeCOL32(int8_t* dst, const int* src, const int batch_size, const int seq_len, const int head_num, - const int size_per_head, const float *v_buf_addBias_deQFactor, const float* qk_afterSM_deQFactor, - const float* out_scale_ptr, cudaStream_t stream){ - assert(size_per_head%32==0); - transpose_COL32_kernel<<>>((char4*)dst, (const int4*)src, batch_size, seq_len, head_num, size_per_head, v_buf_addBias_deQFactor, qk_afterSM_deQFactor, out_scale_ptr, batch_size*seq_len, seq_len*size_per_head); -} + // get the (row, col) input layout of m'*k' + // m' = seq_len + // k' = size_per_head + mk_row = seq_id; + mk_col = threadIdx4; + // get the (row, col) layout of COL32; leading dimension = 32*m' = 32*seq_len + COL32_row = (mk_row << 5) + (mk_col & 31); + // COL32_col = mk_col >> 5; -//src is the result of batch MM, whose size is batch_size*head_num*(seq_len, size_per_head), CUBLASLT_ORDER_COL32 -//dst is of m = batch_size*seq_len, k(n) = head_num*size_per_head, CUBLASLT_ORDER_COL32 -//grid(seq_len, batch_size) -//block(size_per_head/4, head_num) -//assume size_per_head is multiples of 32 -__global__ -void transpose_COL32_kernel(int8_t* dst, const int8_t* src, const int batch_size, const int seq_len, const int head_num, - const int size_per_head, const float *bmm2_deQFactor, const float* out_scale_ptr, - const int batch_size_x_seq_len, const int seq_len_x_size_per_head) -{ - int threadIdx4 = threadIdx.x << 2; - int batch_id = blockIdx.y; - int seq_id = blockIdx.x; - int head_id = threadIdx.y; - //get the (row, col) output layout of m*k - //m = batch_size*seq_len - //k = head_num*size_per_head - int mk_row = batch_id*seq_len + seq_id; - int mk_col = head_id*size_per_head + threadIdx4; - //get the (row, col) layout of COL32; leading dimension = 32*m = 32*batch_size*seq_len - int COL32_row = (mk_row << 5) + (mk_col&31); - int COL32_col = mk_col >> 5; - int outIdx = ((COL32_col << 5)*batch_size_x_seq_len + COL32_row) >> 2; - - //get the (row, col) input layout of m'*k' - //m' = seq_len - //k' = size_per_head - mk_row = seq_id; - mk_col = threadIdx4; - //get the (row, col) layout of COL32; leading dimension = 32*m' = 32*seq_len - COL32_row = (mk_row << 5) + (mk_col&31); - COL32_col = mk_col >> 5; - - int inIdx = ((batch_id*head_num + head_id)*seq_len_x_size_per_head + (COL32_col << 5 )*seq_len + COL32_row) >> 2; - const char4* src_ptr4 = (const char4*)src; - char4 *dst_ptr4 = (char4 *)dst; - dst_ptr4[outIdx] = __ldg(src_ptr4 + inIdx); + int inIdx = + ((batch_id * head_num + head_id) * seq_len_x_size_per_head + (mk_col & 0xffffffe0) * seq_len + COL32_row) >> 2; + char4 tmp; + + int4 srcTmp4 = __ldg(src + inIdx); + tmp.x = float_to_int8_rn(srcTmp4.x * scale); + tmp.y = float_to_int8_rn(srcTmp4.y * scale); + tmp.z = float_to_int8_rn(srcTmp4.z * scale); + tmp.w = float_to_int8_rn(srcTmp4.w * scale); + dst[outIdx] = tmp; } -void invokeTransposeCOL32(int8_t* dst, const int8_t* src, const int batch_size, const int seq_len, const int head_num, - const int size_per_head, const float *bmm2_deQFactor, - const float* out_scale_ptr, cudaStream_t stream){ - assert(size_per_head%32==0); - transpose_COL32_kernel<<>>(dst, src, batch_size, seq_len, head_num, size_per_head, bmm2_deQFactor, out_scale_ptr, batch_size*seq_len, seq_len*size_per_head); +void invokeTransposeCOL32(int8_t* dst, + const int* src, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* v_buf_addBias_deQFactor, + const float* qk_afterSM_deQFactor, + const float* out_scale_ptr, + cudaStream_t stream) +{ + assert(size_per_head % 32 == 0); + transpose_COL32_kernel<<>>( + (char4*)dst, + (const int4*)src, + batch_size, + seq_len, + head_num, + size_per_head, + v_buf_addBias_deQFactor, + qk_afterSM_deQFactor, + out_scale_ptr, + batch_size * seq_len, + seq_len * size_per_head); } -//src is the result of batch MM, whose size is batch_size*head_num*(seq_len, size_per_head), CUBLASLT_ORDER_COL32 -//dst is of m = valid_word_num, k(n) = head_num*size_per_head, CUBLASLT_ORDER_COL32 -//grid(seq_len, batch_size) -//block(size_per_head/4, head_num) -//assume size_per_head is multiples of 32 -__global__ -void transpose_COL32_rebuild_padding_kernel(int8_t* dst, const int32_t* src, const int* sequence_id_map, const int valid_word_num, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, const float *v_buf_addBias_deQFactor, - const float* qk_afterSM_deQFactor, const float* out_scale_ptr, const int seq_len_x_size_per_head) +// src is the result of batch MM, whose size is batch_size*head_num*(seq_len, size_per_head), CUBLASLT_ORDER_COL32 +// dst is of m = batch_size*seq_len, k(n) = head_num*size_per_head, CUBLASLT_ORDER_COL32 +// grid(seq_len, batch_size) +// block(size_per_head/4, head_num) +// assume size_per_head is multiples of 32 +__global__ void transpose_COL32_kernel(int8_t* dst, + const int8_t* src, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* bmm2_deQFactor, + const float* out_scale_ptr, + const int batch_size_x_seq_len, + const int seq_len_x_size_per_head) { - const float scale = __ldg(v_buf_addBias_deQFactor) * __ldg(qk_afterSM_deQFactor) * __ldg(out_scale_ptr); - int threadIdx4 = threadIdx.x << 2; - int batch_id = blockIdx.y; - int seq_id = blockIdx.x; - int head_id = threadIdx.y; - //get the (row, col) output layout of m*k - //m = valid_word_num - //k = head_num*size_per_head - int mk_row = __ldg(sequence_id_map + batch_id*seq_len + seq_id); - if (mk_row >= 0){ - int mk_col = head_id*size_per_head + threadIdx4; - //get the (row, col) layout of COL32; leading dimension = 32*m = 32*valid_word_num - int COL32_row = (mk_row << 5) + (mk_col&31); + int threadIdx4 = threadIdx.x << 2; + int batch_id = blockIdx.y; + int seq_id = blockIdx.x; + int head_id = threadIdx.y; + // get the (row, col) output layout of m*k + // m = batch_size*seq_len + // k = head_num*size_per_head + int mk_row = batch_id * seq_len + seq_id; + int mk_col = head_id * size_per_head + threadIdx4; + // get the (row, col) layout of COL32; leading dimension = 32*m = 32*batch_size*seq_len + int COL32_row = (mk_row << 5) + (mk_col & 31); int COL32_col = mk_col >> 5; - int outIdx = ((COL32_col << 5)*valid_word_num + COL32_row) >> 2; + int outIdx = ((COL32_col << 5) * batch_size_x_seq_len + COL32_row) >> 2; - //get the (row, col) input layout of m'*k' - //m' = seq_len - //k' = size_per_head + // get the (row, col) input layout of m'*k' + // m' = seq_len + // k' = size_per_head mk_row = seq_id; mk_col = threadIdx4; - //get the (row, col) layout of COL32; leading dimension = 32*m' = 32*seq_len - COL32_row = (mk_row << 5) + (mk_col&31); + // get the (row, col) layout of COL32; leading dimension = 32*m' = 32*seq_len + COL32_row = (mk_row << 5) + (mk_col & 31); COL32_col = mk_col >> 5; - int inIdx = (batch_id*head_num + head_id)*seq_len_x_size_per_head + (COL32_col << 5 )*seq_len + COL32_row; - char4 tmp; - tmp.x = float_to_int8_rn(__ldg(src+inIdx)*scale); - tmp.y = float_to_int8_rn(__ldg(src+inIdx+1)*scale); - tmp.z = float_to_int8_rn(__ldg(src+inIdx+2)*scale); - tmp.w = float_to_int8_rn(__ldg(src+inIdx+3)*scale); - char4 *dst_ptr4 = (char4 *)dst; - dst_ptr4[outIdx] = tmp; - } + int inIdx = + ((batch_id * head_num + head_id) * seq_len_x_size_per_head + (COL32_col << 5) * seq_len + COL32_row) >> 2; + const char4* src_ptr4 = (const char4*)src; + char4* dst_ptr4 = (char4*)dst; + dst_ptr4[outIdx] = __ldg(src_ptr4 + inIdx); } -void invokeTransposeCOL32RebuildPadding(int8_t* dst, const int* src, const int* sequence_id_map, const int valid_word_num, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, const float *v_buf_addBias_deQFactor, - const float* qk_afterSM_deQFactor, const float* out_scale_ptr, cudaStream_t stream){ - assert(size_per_head%32==0); - transpose_COL32_rebuild_padding_kernel<<>>(dst, src, sequence_id_map, valid_word_num, batch_size, - seq_len, head_num, size_per_head, v_buf_addBias_deQFactor, - qk_afterSM_deQFactor, out_scale_ptr, seq_len*size_per_head); +void invokeTransposeCOL32(int8_t* dst, + const int8_t* src, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* bmm2_deQFactor, + const float* out_scale_ptr, + cudaStream_t stream) +{ + assert(size_per_head % 32 == 0); + transpose_COL32_kernel<<>>( + dst, + src, + batch_size, + seq_len, + head_num, + size_per_head, + bmm2_deQFactor, + out_scale_ptr, + batch_size * seq_len, + seq_len * size_per_head); } -//src is the result of batch MM, whose size is batch_size*head_num*(seq_len, size_per_head), CUBLASLT_ORDER_COL32 -//dst is of m = valid_word_num, k(n) = head_num*size_per_head, CUBLASLT_ORDER_COL32 -//grid(seq_len, batch_size) -//block(size_per_head/4, head_num) -//assume size_per_head is multiples of 32 -__global__ -void transpose_COL32_rebuild_padding_kernel(int8_t* dst, const int8_t* src, const int* sequence_id_map, const int valid_word_num, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, const float *bmm2_deQFactor, const float* out_scale_ptr, const int seq_len_x_size_per_head) +// src is the result of batch MM, whose size is batch_size*head_num*(seq_len, size_per_head), CUBLASLT_ORDER_COL32 +// dst is of m = valid_word_num, k(n) = head_num*size_per_head, CUBLASLT_ORDER_COL32 +// grid(seq_len, batch_size) +// block(size_per_head/4, head_num) +// assume size_per_head is multiples of 32 +__global__ void transpose_COL32_rebuild_padding_kernel(int8_t* dst, + const int32_t* src, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* v_buf_addBias_deQFactor, + const float* qk_afterSM_deQFactor, + const float* out_scale_ptr, + const int seq_len_x_size_per_head) { - int threadIdx4 = threadIdx.x << 2; - int batch_id = blockIdx.y; - int seq_id = blockIdx.x; - int head_id = threadIdx.y; - //get the (row, col) output layout of m*k - //m = valid_word_num - //k = head_num*size_per_head - int mk_row = __ldg(sequence_id_map + batch_id*seq_len + seq_id); - if (mk_row >= 0){ - int mk_col = head_id*size_per_head + threadIdx4; - //get the (row, col) layout of COL32; leading dimension = 32*m = 32*valid_word_num - int COL32_row = (mk_row << 5) + (mk_col&31); - int COL32_col = mk_col >> 5; - int outIdx = ((COL32_col << 5)*valid_word_num + COL32_row) >> 2; + const float scale = __ldg(v_buf_addBias_deQFactor) * __ldg(qk_afterSM_deQFactor) * __ldg(out_scale_ptr); + int threadIdx4 = threadIdx.x << 2; + int batch_id = blockIdx.y; + int seq_id = blockIdx.x; + int head_id = threadIdx.y; + // get the (row, col) output layout of m*k + // m = valid_word_num + // k = head_num*size_per_head + int mk_row = __ldg(sequence_id_map + batch_id * seq_len + seq_id); + if (mk_row >= 0) { + int mk_col = head_id * size_per_head + threadIdx4; + // get the (row, col) layout of COL32; leading dimension = 32*m = 32*valid_word_num + int COL32_row = (mk_row << 5) + (mk_col & 31); + int COL32_col = mk_col >> 5; + int outIdx = ((COL32_col << 5) * valid_word_num + COL32_row) >> 2; - //get the (row, col) input layout of m'*k' - //m' = seq_len - //k' = size_per_head - mk_row = seq_id; - mk_col = threadIdx4; - //get the (row, col) layout of COL32; leading dimension = 32*m' = 32*seq_len - COL32_row = (mk_row << 5) + (mk_col&31); - COL32_col = mk_col >> 5; + // get the (row, col) input layout of m'*k' + // m' = seq_len + // k' = size_per_head + mk_row = seq_id; + mk_col = threadIdx4; + // get the (row, col) layout of COL32; leading dimension = 32*m' = 32*seq_len + COL32_row = (mk_row << 5) + (mk_col & 31); + COL32_col = mk_col >> 5; - int inIdx = ((batch_id*head_num + head_id)*seq_len_x_size_per_head + (COL32_col << 5 )*seq_len + COL32_row) >> 2; - - const char4* src_ptr4 = (const char4*)src; - - char4 *dst_ptr4 = (char4 *)dst; - dst_ptr4[outIdx] = __ldg(src_ptr4 + inIdx); - } + int inIdx = (batch_id * head_num + head_id) * seq_len_x_size_per_head + (COL32_col << 5) * seq_len + COL32_row; + char4 tmp; + tmp.x = float_to_int8_rn(__ldg(src + inIdx) * scale); + tmp.y = float_to_int8_rn(__ldg(src + inIdx + 1) * scale); + tmp.z = float_to_int8_rn(__ldg(src + inIdx + 2) * scale); + tmp.w = float_to_int8_rn(__ldg(src + inIdx + 3) * scale); + char4* dst_ptr4 = (char4*)dst; + dst_ptr4[outIdx] = tmp; + } } -void invokeTransposeCOL32RebuildPadding(int8_t* dst, const int8_t* src, const int* sequence_id_map, const int valid_word_num, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, const float *bmm2_deQFactor, - const float* out_scale_ptr, cudaStream_t stream){ - assert(size_per_head%32==0); - transpose_COL32_rebuild_padding_kernel<<>>(dst, src, sequence_id_map, valid_word_num, batch_size, - seq_len, head_num, size_per_head, bmm2_deQFactor, - out_scale_ptr, seq_len*size_per_head); +void invokeTransposeCOL32RebuildPadding(int8_t* dst, + const int* src, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* v_buf_addBias_deQFactor, + const float* qk_afterSM_deQFactor, + const float* out_scale_ptr, + cudaStream_t stream) +{ + assert(size_per_head % 32 == 0); + transpose_COL32_rebuild_padding_kernel<<>>( + dst, + src, + sequence_id_map, + valid_word_num, + batch_size, + seq_len, + head_num, + size_per_head, + v_buf_addBias_deQFactor, + qk_afterSM_deQFactor, + out_scale_ptr, + seq_len * size_per_head); } - -//src is the result of batch MM, whose size is batch_size*head_num*(seq_len, size_per_head), CUBLASLT_ORDER_COL32 -//dst is of m = batch_size*seq_len, k(n) = head_num*size_per_head, row major -//grid(seq_len, batch_size) -//block(size_per_head/4, head_num) -//assume size_per_head is multiples of 32 -__global__ -void transpose_COL32_ROW_kernel(int8_t* dst, const int8_t* src, const int batch_size, const int seq_len, const int head_num, - const int size_per_head, const float *bmm2_deQFactor, const float* out_scale_ptr, - const int head_num_x_size_per_head, const int seq_len_x_size_per_head) +// src is the result of batch MM, whose size is batch_size*head_num*(seq_len, size_per_head), CUBLASLT_ORDER_COL32 +// dst is of m = valid_word_num, k(n) = head_num*size_per_head, CUBLASLT_ORDER_COL32 +// grid(seq_len, batch_size) +// block(size_per_head/4, head_num) +// assume size_per_head is multiples of 32 +__global__ void transpose_COL32_rebuild_padding_kernel(int8_t* dst, + const int8_t* src, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* bmm2_deQFactor, + const float* out_scale_ptr, + const int seq_len_x_size_per_head) { - int threadIdx4 = threadIdx.x << 2; - int batch_id = blockIdx.y; - int seq_id = blockIdx.x; - int head_id = threadIdx.y; - //get the (row, col) output layout of m*k - //m = batch_size*seq_len - //k = head_num*size_per_head - int mk_row = batch_id*seq_len + seq_id; - int mk_col = head_id*size_per_head + threadIdx4; - int outIdx = (mk_row * head_num_x_size_per_head + mk_col) >> 2; - - //get the (row, col) input layout of m'*k' - //m' = seq_len - //k' = size_per_head - mk_row = seq_id; - mk_col = threadIdx4; - //get the (row, col) layout of COL32; leading dimension = 32*m' = 32*seq_len - int COL32_row = (mk_row << 5) + (mk_col&31); - int COL32_col = mk_col >> 5; - - int inIdx = ((batch_id*head_num + head_id)*seq_len_x_size_per_head + (COL32_col << 5 )*seq_len + COL32_row) >> 2; - const char4* src_ptr4 = (const char4*)src; - char4 *dst_ptr4 = (char4 *)dst; - dst_ptr4[outIdx] = __ldg(src_ptr4 + inIdx); + int threadIdx4 = threadIdx.x << 2; + int batch_id = blockIdx.y; + int seq_id = blockIdx.x; + int head_id = threadIdx.y; + // get the (row, col) output layout of m*k + // m = valid_word_num + // k = head_num*size_per_head + int mk_row = __ldg(sequence_id_map + batch_id * seq_len + seq_id); + if (mk_row >= 0) { + int mk_col = head_id * size_per_head + threadIdx4; + // get the (row, col) layout of COL32; leading dimension = 32*m = 32*valid_word_num + int COL32_row = (mk_row << 5) + (mk_col & 31); + int COL32_col = mk_col >> 5; + int outIdx = ((COL32_col << 5) * valid_word_num + COL32_row) >> 2; + + // get the (row, col) input layout of m'*k' + // m' = seq_len + // k' = size_per_head + mk_row = seq_id; + mk_col = threadIdx4; + // get the (row, col) layout of COL32; leading dimension = 32*m' = 32*seq_len + COL32_row = (mk_row << 5) + (mk_col & 31); + COL32_col = mk_col >> 5; + + int inIdx = + ((batch_id * head_num + head_id) * seq_len_x_size_per_head + (COL32_col << 5) * seq_len + COL32_row) >> 2; + + const char4* src_ptr4 = (const char4*)src; + + char4* dst_ptr4 = (char4*)dst; + dst_ptr4[outIdx] = __ldg(src_ptr4 + inIdx); + } } -void invokeTransposeCOL32ToRow(int8_t* dst, const int8_t* src, const int batch_size, const int seq_len, const int head_num, - const int size_per_head, const float *bmm2_deQFactor, - const float* out_scale_ptr, cudaStream_t stream){ - assert(size_per_head%32==0); - transpose_COL32_ROW_kernel<<>>(dst, src, batch_size, seq_len, head_num, size_per_head, bmm2_deQFactor, out_scale_ptr, head_num*size_per_head, seq_len*size_per_head); +void invokeTransposeCOL32RebuildPadding(int8_t* dst, + const int8_t* src, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* bmm2_deQFactor, + const float* out_scale_ptr, + cudaStream_t stream) +{ + assert(size_per_head % 32 == 0); + transpose_COL32_rebuild_padding_kernel<<>>( + dst, + src, + sequence_id_map, + valid_word_num, + batch_size, + seq_len, + head_num, + size_per_head, + bmm2_deQFactor, + out_scale_ptr, + seq_len * size_per_head); } -//src is the result of batch MM, whose size is batch_size*head_num*(seq_len, size_per_head), CUBLASLT_ORDER_COL32 -//dst is of m = valid_word_num, k(n) = head_num*size_per_head, row major -//grid(seq_len, batch_size) -//block(size_per_head/4, head_num) -//assume size_per_head is multiples of 32 -__global__ -void transpose_COL32_ROW_rebuild_padding_kernel(int8_t* dst, const int8_t* src, const int* sequence_id_map, const int valid_word_num, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, const float *bmm2_deQFactor, const float* out_scale_ptr, const int seq_len_x_size_per_head, const int head_num_x_size_per_head) +// src is the result of batch MM, whose size is batch_size*head_num*(seq_len, size_per_head), CUBLASLT_ORDER_COL32 +// dst is of m = batch_size*seq_len, k(n) = head_num*size_per_head, row major +// grid(seq_len, batch_size) +// block(size_per_head/4, head_num) +// assume size_per_head is multiples of 32 +__global__ void transpose_COL32_ROW_kernel(int8_t* dst, + const int8_t* src, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* bmm2_deQFactor, + const float* out_scale_ptr, + const int head_num_x_size_per_head, + const int seq_len_x_size_per_head) { - int threadIdx4 = threadIdx.x << 2; - int batch_id = blockIdx.y; - int seq_id = blockIdx.x; - int head_id = threadIdx.y; - //get the (row, col) output layout of m*k - //m = valid_word_num - //k = head_num*size_per_head - int mk_row = __ldg(sequence_id_map + batch_id*seq_len + seq_id); - if (mk_row >= 0){ - int mk_col = head_id*size_per_head + threadIdx4; + int threadIdx4 = threadIdx.x << 2; + int batch_id = blockIdx.y; + int seq_id = blockIdx.x; + int head_id = threadIdx.y; + // get the (row, col) output layout of m*k + // m = batch_size*seq_len + // k = head_num*size_per_head + int mk_row = batch_id * seq_len + seq_id; + int mk_col = head_id * size_per_head + threadIdx4; int outIdx = (mk_row * head_num_x_size_per_head + mk_col) >> 2; - //get the (row, col) input layout of m'*k' - //m' = seq_len - //k' = size_per_head + // get the (row, col) input layout of m'*k' + // m' = seq_len + // k' = size_per_head mk_row = seq_id; mk_col = threadIdx4; - //get the (row, col) layout of COL32; leading dimension = 32*m' = 32*seq_len - int COL32_row = (mk_row << 5) + (mk_col&31); + // get the (row, col) layout of COL32; leading dimension = 32*m' = 32*seq_len + int COL32_row = (mk_row << 5) + (mk_col & 31); int COL32_col = mk_col >> 5; - int inIdx = ((batch_id*head_num + head_id)*seq_len_x_size_per_head + (COL32_col << 5 )*seq_len + COL32_row) >> 2; - + int inIdx = + ((batch_id * head_num + head_id) * seq_len_x_size_per_head + (COL32_col << 5) * seq_len + COL32_row) >> 2; const char4* src_ptr4 = (const char4*)src; - - char4 *dst_ptr4 = (char4 *)dst; + char4* dst_ptr4 = (char4*)dst; dst_ptr4[outIdx] = __ldg(src_ptr4 + inIdx); - } } -void invokeTransposeCOL32ToRowRebuildPadding(int8_t* dst, const int8_t* src, const int* sequence_id_map, const int valid_word_num, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, const float *bmm2_deQFactor, - const float* out_scale_ptr, cudaStream_t stream){ - assert(size_per_head%32==0); - transpose_COL32_ROW_rebuild_padding_kernel<<>>(dst, src, sequence_id_map, valid_word_num, batch_size, - seq_len, head_num, size_per_head, bmm2_deQFactor, - out_scale_ptr, seq_len*size_per_head, - head_num*size_per_head); +void invokeTransposeCOL32ToRow(int8_t* dst, + const int8_t* src, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* bmm2_deQFactor, + const float* out_scale_ptr, + cudaStream_t stream) +{ + assert(size_per_head % 32 == 0); + transpose_COL32_ROW_kernel<<>>( + dst, + src, + batch_size, + seq_len, + head_num, + size_per_head, + bmm2_deQFactor, + out_scale_ptr, + head_num * size_per_head, + seq_len * size_per_head); +} + +// src is the result of batch MM, whose size is batch_size*head_num*(seq_len, size_per_head), CUBLASLT_ORDER_COL32 +// dst is of m = valid_word_num, k(n) = head_num*size_per_head, row major +// grid(seq_len, batch_size) +// block(size_per_head/4, head_num) +// assume size_per_head is multiples of 32 +__global__ void transpose_COL32_ROW_rebuild_padding_kernel(int8_t* dst, + const int8_t* src, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* bmm2_deQFactor, + const float* out_scale_ptr, + const int seq_len_x_size_per_head, + const int head_num_x_size_per_head) +{ + int threadIdx4 = threadIdx.x << 2; + int batch_id = blockIdx.y; + int seq_id = blockIdx.x; + int head_id = threadIdx.y; + // get the (row, col) output layout of m*k + // m = valid_word_num + // k = head_num*size_per_head + int mk_row = __ldg(sequence_id_map + batch_id * seq_len + seq_id); + if (mk_row >= 0) { + int mk_col = head_id * size_per_head + threadIdx4; + int outIdx = (mk_row * head_num_x_size_per_head + mk_col) >> 2; + + // get the (row, col) input layout of m'*k' + // m' = seq_len + // k' = size_per_head + mk_row = seq_id; + mk_col = threadIdx4; + // get the (row, col) layout of COL32; leading dimension = 32*m' = 32*seq_len + int COL32_row = (mk_row << 5) + (mk_col & 31); + int COL32_col = mk_col >> 5; + + int inIdx = + ((batch_id * head_num + head_id) * seq_len_x_size_per_head + (COL32_col << 5) * seq_len + COL32_row) >> 2; + + const char4* src_ptr4 = (const char4*)src; + + char4* dst_ptr4 = (char4*)dst; + dst_ptr4[outIdx] = __ldg(src_ptr4 + inIdx); + } +} + +void invokeTransposeCOL32ToRowRebuildPadding(int8_t* dst, + const int8_t* src, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* bmm2_deQFactor, + const float* out_scale_ptr, + cudaStream_t stream) +{ + assert(size_per_head % 32 == 0); + transpose_COL32_ROW_rebuild_padding_kernel<<>>(dst, + src, + sequence_id_map, + valid_word_num, + batch_size, + seq_len, + head_num, + size_per_head, + bmm2_deQFactor, + out_scale_ptr, + seq_len * size_per_head, + head_num * size_per_head); } } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/transpose_int8_kernels.h b/src/fastertransformer/kernels/transpose_int8_kernels.h index 082e70723..7e143002f 100644 --- a/src/fastertransformer/kernels/transpose_int8_kernels.h +++ b/src/fastertransformer/kernels/transpose_int8_kernels.h @@ -16,36 +16,79 @@ #pragma once +#include "int8_utils.cuh" #include #include #include -#include "int8_utils.cuh" namespace fastertransformer { -void invokeTransposeCOL32(int8_t* dst, const int8_t* src, const int batch_size, const int seq_len, const int head_num, - const int size_per_head, const float *bmm2_deQFactor, - const float* out_scale_ptr, cudaStream_t stream); - -void invokeTransposeCOL32(int8_t* dst, const int* src, const int batch_size, const int seq_len, const int head_num, - const int size_per_head, const float *v_buf_addBias_deQFactor, const float* qk_afterSM_deQFactor, - const float* out_scale_ptr, cudaStream_t stream); +void invokeTransposeCOL32(int8_t* dst, + const int8_t* src, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* bmm2_deQFactor, + const float* out_scale_ptr, + cudaStream_t stream); -void invokeTransposeCOL32RebuildPadding(int8_t* dst, const int* src, const int* sequence_id_map, const int valid_word_num, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, const float *v_buf_addBias_deQFactor, - const float* qk_afterSM_deQFactor, const float* out_scale_ptr, cudaStream_t stream); +void invokeTransposeCOL32(int8_t* dst, + const int* src, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* v_buf_addBias_deQFactor, + const float* qk_afterSM_deQFactor, + const float* out_scale_ptr, + cudaStream_t stream); -void invokeTransposeCOL32RebuildPadding(int8_t* dst, const int8_t* src, const int* sequence_id_map, const int valid_word_num, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, const float *bmm2_deQFactor, - const float* out_scale_ptr, cudaStream_t stream); +void invokeTransposeCOL32RebuildPadding(int8_t* dst, + const int* src, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* v_buf_addBias_deQFactor, + const float* qk_afterSM_deQFactor, + const float* out_scale_ptr, + cudaStream_t stream); -void invokeTransposeCOL32ToRow(int8_t* dst, const int8_t* src, const int batch_size, const int seq_len, const int head_num, - const int size_per_head, const float *bmm2_deQFactor, - const float* out_scale_ptr, cudaStream_t stream); +void invokeTransposeCOL32RebuildPadding(int8_t* dst, + const int8_t* src, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* bmm2_deQFactor, + const float* out_scale_ptr, + cudaStream_t stream); -void invokeTransposeCOL32ToRowRebuildPadding(int8_t* dst, const int8_t* src, const int* sequence_id_map, const int valid_word_num, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, const float *bmm2_deQFactor, - const float* out_scale_ptr, cudaStream_t stream); +void invokeTransposeCOL32ToRow(int8_t* dst, + const int8_t* src, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* bmm2_deQFactor, + const float* out_scale_ptr, + cudaStream_t stream); +void invokeTransposeCOL32ToRowRebuildPadding(int8_t* dst, + const int8_t* src, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* bmm2_deQFactor, + const float* out_scale_ptr, + cudaStream_t stream); } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/unfused_attention_int8_kernels.cu b/src/fastertransformer/kernels/unfused_attention_int8_kernels.cu index fec59b884..34148145c 100644 --- a/src/fastertransformer/kernels/unfused_attention_int8_kernels.cu +++ b/src/fastertransformer/kernels/unfused_attention_int8_kernels.cu @@ -14,2397 +14,3216 @@ * limitations under the License. */ -#include "src/fastertransformer/kernels/reduce_kernel_utils.cuh" #include "src/fastertransformer/kernels/int8_utils.cuh" +#include "src/fastertransformer/kernels/reduce_kernel_utils.cuh" #include "src/fastertransformer/kernels/unfused_attention_int8_kernels.h" namespace fastertransformer { -__inline__ __device__ -int target_index(int id1, int id2, int id3, int id4, int dim_1, int dim_2, int dim_3, int dim_4) +__inline__ __device__ int target_index(int id1, int id2, int id3, int id4, int dim_1, int dim_2, int dim_3, int dim_4) { return id1 * (dim_2 * dim_3 * dim_4) + id3 * (dim_2 * dim_4) + id2 * dim_4 + id4; } -//build a mapping for fullData to removePaddingData -//grid((valid_word_num+63)/64) -//block(64) -__global__ void mappingRemovePaddingData(int *mapping, const int* sequence_id_offset, const int valid_word_num){ - int idx = blockIdx.x*blockDim.x + threadIdx.x; - if (idx < valid_word_num) - mapping[idx + __ldg(sequence_id_offset + idx)] = idx; +// build a mapping for fullData to removePaddingData +// grid((valid_word_num+63)/64) +// block(64) +__global__ void mappingRemovePaddingData(int* mapping, const int* sequence_id_offset, const int valid_word_num) +{ + int idx = blockIdx.x * blockDim.x + threadIdx.x; + if (idx < valid_word_num) { + mapping[idx + __ldg(sequence_id_offset + idx)] = idx; + } } -void invokeMappingRemovePaddingData(const int batch_size, const int seq_len, - const int valid_word_num, int *mapping, - const int* sequence_id_offset, cudaStream_t stream) +void invokeMappingRemovePaddingData(const int batch_size, + const int seq_len, + const int valid_word_num, + int* mapping, + const int* sequence_id_offset, + cudaStream_t stream) +{ + cudaMemsetAsync(mapping, -1, batch_size * seq_len * sizeof(int), stream); + mappingRemovePaddingData<<>>( + mapping, sequence_id_offset, valid_word_num); +} + +// add_QK_bias_transform for batch int8 cublasLtMatmul & per axis quantization for weight +// 1.add QK bias +// 2.transform each Q K CUBLASLT_ORDER_COL32 matrixes into a series of sub-matrix (with +// CUBLASLT_ORDER_COL32/CUBLASLT_ORDER_COL4_4R2_8C layout) +// Q, K are CUBLASLT_ORDER_COL32 matrixes of m = batch_size * seq_len, n = head_num * size_per_head +// q_buf_ is of batchCount = batch_size * head_num, m = seq_len, n = size_per_head, CUBLASLT_ORDER_COL32 +// k_buf_ is of batchCount = batch_size * head_num, m = seq_len, n = size_per_head, CUBLASLT_ORDER_COL4_4R2_8C +// only for int32 input & int8 output +// seq_len, size_per_head must be a multiple of 32 +// grid.x = batch_size * seq_len * 2; +// block.x = head_num * size_per_head / 4; +// using char4 +template +__global__ void add_QK_bias_transform(int8_t* q_buf_, + int8_t* k_buf_, + const int32_t* Q, + const T* bias_Q, + const int32_t* K, + const T* bias_K, + const int m, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + int stride, + const float* q_weight_amax, + const float* q_input_deQFactor_div127_ptr, + const float* k_weight_amax, + const float* k_input_deQFactor_div127_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4) { - cudaMemsetAsync(mapping, -1, batch_size * seq_len * sizeof(int), stream); - mappingRemovePaddingData<<>>(mapping, sequence_id_offset, valid_word_num); + const int32_t* data_ptr; + char4* buf_ptr4; + const T* bias_ptr; + const float* weight_amax; + int qk_id = blockIdx.x / m; + + data_ptr = qk_id == 0 ? Q : K; + buf_ptr4 = qk_id == 0 ? (char4*)q_buf_ : (char4*)k_buf_; + bias_ptr = qk_id == 0 ? bias_Q : bias_K; + const float input_deQFactor_div127 = + qk_id == 0 ? __ldg(q_input_deQFactor_div127_ptr) : __ldg(k_input_deQFactor_div127_ptr); + weight_amax = qk_id == 0 ? q_weight_amax : k_weight_amax; + const float output_scale = qk_id == 0 ? __ldg(q_output_scale_ptr) : __ldg(k_output_scale_ptr); + + int threadIdx4 = threadIdx.x << 2; + int batch_id = (blockIdx.x % m) / seq_len; + int head_id = threadIdx4 / size_per_head; + int id_in_head = threadIdx4 % size_per_head; + int word_id = blockIdx.x % seq_len; + + int data_id = (((threadIdx4 >> 5) << 5) * m + ((blockIdx.x % m) << 5) + (threadIdx4 & 31)); + + float scale; + float tmp; + char4 tmp4; + scale = static_cast(__ldg(data_ptr + data_id)) * __ldg(weight_amax + threadIdx4) * input_deQFactor_div127; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.x = float_to_int8_rn(tmp * output_scale); + + data_id = data_id + 1; + threadIdx4 = threadIdx4 + 1; + scale = static_cast(__ldg(data_ptr + data_id)) * __ldg(weight_amax + threadIdx4) * input_deQFactor_div127; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.y = float_to_int8_rn(tmp * output_scale); + + data_id = data_id + 1; + threadIdx4 = threadIdx4 + 1; + scale = static_cast(__ldg(data_ptr + data_id)) * __ldg(weight_amax + threadIdx4) * input_deQFactor_div127; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.z = float_to_int8_rn(tmp * output_scale); + + data_id = data_id + 1; + threadIdx4 = threadIdx4 + 1; + scale = static_cast(__ldg(data_ptr + data_id)) * __ldg(weight_amax + threadIdx4) * input_deQFactor_div127; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.w = float_to_int8_rn(tmp * output_scale); + + // row_id, col_id of sub-matrix (m = seq_len, n = size_per_head), column-major + + int row_id = word_id; + int col_id = id_in_head; + // new (row, rol) of LtTrans COL32/COL4 sub-matrix, leading dim = (COL32_ * seq_len) + int new_col = col_id >> 5; + int new_row; + if (use_ORDER_COL32_2R_4R4) { + int row_in_tile = row_id & 31; + int col_in_tile = col_id & 31; + new_row = (qk_id != 1) ? + // COL32 + ((row_id << 5) + (col_id & 31)) : + // COL32_2R_4R4 + (((row_id >> 5) << 10) + + //(((row%8)/2*4+row/8)*2+row%2)*32+col + (((((((row_in_tile % 8) >> 1) << 2) + (row_in_tile >> 3)) << 1) + (row_in_tile & 1)) << 5) + + col_in_tile); + } + else { + new_row = (qk_id != 1) ? + // COL32 + ((row_id << 5) + (col_id & 31)) : + // COL4 + ////row_id/8 is the number of tile of (8 rows 32 columns) -- column-major + ////row_id%2 is even row, otherwise odd row + ////col_id%COL32_/8 is the number tile of (8 rows 8 columns) + (((((row_id >> 3) << 3) + ((row_id & 1) << 2) + ((col_id % 32) >> 3)) << 5) + + ////col_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(row_id%8/2) is (the row id of alternating 4 rows) - 1 + (((((col_id & 7) >= 4) ? 4 : 0) + ((row_id % 8) >> 1)) << 2) + + ////col_id%4 is the id of 4 cols + (col_id & 3)); + } + + buf_ptr4[(((batch_id * head_num + head_id) * stride + (new_col << 5) * seq_len + new_row) >> 2)] = tmp4; } -//add_QK_bias_transform for batch int8 cublasLtMatmul & per axis quantization for weight -//1.add QK bias -//2.transform each Q K CUBLASLT_ORDER_COL32 matrixes into a series of sub-matrix (with CUBLASLT_ORDER_COL32/CUBLASLT_ORDER_COL4_4R2_8C layout) +// add_QK_bias_transform_varlen for batch int8 cublasLtMatmul & per axis quantization for weight +// 1.add QK bias +// 2.transform each Q K CUBLASLT_ORDER_COL32 matrixes into a series of sub-matrix (with +// CUBLASLT_ORDER_COL32/CUBLASLT_ORDER_COL4_4R2_8C layout) // Q, K are CUBLASLT_ORDER_COL32 matrixes of m = batch_size * seq_len, n = head_num * size_per_head // q_buf_ is of batchCount = batch_size * head_num, m = seq_len, n = size_per_head, CUBLASLT_ORDER_COL32 // k_buf_ is of batchCount = batch_size * head_num, m = seq_len, n = size_per_head, CUBLASLT_ORDER_COL4_4R2_8C -//only for int32 input & int8 output -//seq_len, size_per_head must be a multiple of 32 -//grid.x = batch_size * seq_len * 2; -//block.x = head_num * size_per_head / 4; -//using char4 -template -__global__ -void add_QK_bias_transform(int8_t *q_buf_, int8_t *k_buf_, const int32_t* Q, const T* bias_Q, - const int32_t* K, const T* bias_K, const int m, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, int stride, - const float * q_weight_amax, const float *q_input_deQFactor_div127_ptr, const float * k_weight_amax, - const float *k_input_deQFactor_div127_ptr, const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4) +// only for int32 input & int8 output +// seq_len, size_per_head must be a multiple of 32 +// grid.x = batch_size * seq_len * 2; +// block.x = head_num * size_per_head / 4; +// using char4 +template +__global__ void add_QK_bias_transform_varlen(int8_t* q_buf_, + int8_t* k_buf_, + const int32_t* Q, + const T* bias_Q, + const int32_t* K, + const T* bias_K, + const int m, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const int seq_len_padded, + int stride_q, + int stride_k, + const float* q_weight_amax, + const float* q_input_deQFactor_div127_ptr, + const float* k_weight_amax, + const float* k_input_deQFactor_div127_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4) { - const int32_t* data_ptr; - char4* buf_ptr4; - const T* bias_ptr; - const float* weight_amax; - int qk_id = blockIdx.x / m; - - data_ptr = qk_id == 0 ? Q : K; - buf_ptr4 = qk_id == 0 ? (char4*)q_buf_ : (char4*)k_buf_; - bias_ptr = qk_id == 0 ? bias_Q : bias_K; - const float input_deQFactor_div127 = qk_id == 0 ? __ldg(q_input_deQFactor_div127_ptr) : __ldg(k_input_deQFactor_div127_ptr); - weight_amax = qk_id == 0 ? q_weight_amax : k_weight_amax; - const float output_scale = qk_id == 0 ? __ldg(q_output_scale_ptr) : __ldg(k_output_scale_ptr); - - int threadIdx4 = threadIdx.x << 2; - int batch_id = (blockIdx.x % m) / seq_len; - int head_id = threadIdx4 / size_per_head; - int id_in_head = threadIdx4 % size_per_head; - int word_id = blockIdx.x % seq_len; - - int data_id = (((threadIdx4 >> 5) << 5)*m + ((blockIdx.x%m) << 5) + (threadIdx4&31)); - - float scale; - float tmp; - char4 tmp4; - scale = static_cast(__ldg(data_ptr+data_id)) * __ldg(weight_amax+threadIdx4) * input_deQFactor_div127; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.x = float_to_int8_rn(tmp*output_scale); - - data_id = data_id+1; - threadIdx4 = threadIdx4+1; - scale = static_cast(__ldg(data_ptr+data_id)) * __ldg(weight_amax+threadIdx4)* input_deQFactor_div127; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.y = float_to_int8_rn(tmp*output_scale); - - data_id = data_id+1; - threadIdx4 = threadIdx4+1; - scale = static_cast(__ldg(data_ptr+data_id)) * __ldg(weight_amax+threadIdx4) * input_deQFactor_div127; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.z = float_to_int8_rn(tmp*output_scale); - - data_id = data_id+1; - threadIdx4 = threadIdx4+1; - scale = static_cast(__ldg(data_ptr+data_id)) * __ldg(weight_amax+threadIdx4) * input_deQFactor_div127; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.w = float_to_int8_rn(tmp*output_scale); - - - //row_id, col_id of sub-matrix (m = seq_len, n = size_per_head), column-major - - int row_id = word_id; - int col_id = id_in_head; - //new (row, rol) of LtTrans COL32/COL4 sub-matrix, leading dim = (COL32_ * seq_len) - int new_col = col_id >> 5; - int new_row; - if (use_ORDER_COL32_2R_4R4) - { - int row_in_tile = row_id & 31; - int col_in_tile = col_id & 31; - new_row = (qk_id != 1) ? - //COL32 - ((row_id << 5) + (col_id&31)) - : - //COL32_2R_4R4 - ( - ((row_id >> 5) << 10) + - //(((row%8)/2*4+row/8)*2+row%2)*32+col - (((((((row_in_tile%8)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile - ) - ; - } - else - { - new_row = (qk_id != 1) ? - //COL32 - ((row_id << 5) + (col_id&31)) - : - //COL4 - ////row_id/8 is the number of tile of (8 rows 32 columns) -- column-major - ////row_id%2 is even row, otherwise odd row - ////col_id%COL32_/8 is the number tile of (8 rows 8 columns) - ( - ((((row_id >> 3) << 3) + ((row_id&1) << 2) + ((col_id%32) >> 3)) << 5) + - ////col_id%8 >= 4 is the right half of (8 rows 8 columns) tile - ////(row_id%8/2) is (the row id of alternating 4 rows) - 1 - (((((col_id&7) >= 4)?4:0) + ((row_id%8) >> 1)) << 2) + - ////col_id%4 is the id of 4 cols - (col_id&3) - ) - ; - } - - buf_ptr4[(((batch_id*head_num + head_id) * stride + (new_col << 5)*seq_len + new_row) >> 2)] = tmp4; + const int32_t* data_ptr; + char4* buf_ptr4; + const T* bias_ptr; + const float* weight_amax; + int qk_id = blockIdx.x / m; + + data_ptr = qk_id == 0 ? Q : K; + buf_ptr4 = qk_id == 0 ? (char4*)q_buf_ : (char4*)k_buf_; + bias_ptr = qk_id == 0 ? bias_Q : bias_K; + const float input_deQFactor_div127 = + qk_id == 0 ? __ldg(q_input_deQFactor_div127_ptr) : __ldg(k_input_deQFactor_div127_ptr); + weight_amax = qk_id == 0 ? q_weight_amax : k_weight_amax; + const float output_scale = qk_id == 0 ? __ldg(q_output_scale_ptr) : __ldg(k_output_scale_ptr); + + int threadIdx4 = threadIdx.x << 2; + int batch_id = (blockIdx.x % m) / seq_len; + int head_id = threadIdx4 / size_per_head; + int id_in_head = threadIdx4 % size_per_head; + int word_id = blockIdx.x % seq_len; + + int data_id = (((threadIdx4 >> 5) << 5) * m + ((blockIdx.x % m) << 5) + (threadIdx4 & 31)); + + float scale; + float tmp; + char4 tmp4; + scale = static_cast(__ldg(data_ptr + data_id)) * __ldg(weight_amax + threadIdx4) * input_deQFactor_div127; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.x = float_to_int8_rn(tmp * output_scale); + + data_id = data_id + 1; + threadIdx4 = threadIdx4 + 1; + scale = static_cast(__ldg(data_ptr + data_id)) * __ldg(weight_amax + threadIdx4) * input_deQFactor_div127; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.y = float_to_int8_rn(tmp * output_scale); + + data_id = data_id + 1; + threadIdx4 = threadIdx4 + 1; + scale = static_cast(__ldg(data_ptr + data_id)) * __ldg(weight_amax + threadIdx4) * input_deQFactor_div127; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.z = float_to_int8_rn(tmp * output_scale); + + data_id = data_id + 1; + threadIdx4 = threadIdx4 + 1; + scale = static_cast(__ldg(data_ptr + data_id)) * __ldg(weight_amax + threadIdx4) * input_deQFactor_div127; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.w = float_to_int8_rn(tmp * output_scale); + + // row_id, col_id of sub-matrix (m = seq_len, n = size_per_head), column-major + + int row_id = word_id; + int col_id = id_in_head; + // new (row, rol) of LtTrans COL32/COL4 sub-matrix, leading dim = (COL32_ * seq_len) + int new_col = col_id >> 5; + int new_row; + if (use_ORDER_COL32_2R_4R4) { + int row_in_tile = row_id & 31; + int col_in_tile = col_id & 31; + new_row = (qk_id != 1) ? + // COL32 + ((row_id << 5) + (col_id & 31)) : + // COL32_2R_4R4 + (((row_id >> 5) << 10) + + //(((row%8)/2*4+row/8)*2+row%2)*32+col + (((((((row_in_tile % 8) >> 1) << 2) + (row_in_tile >> 3)) << 1) + (row_in_tile & 1)) << 5) + + col_in_tile); + } + else { + new_row = (qk_id != 1) ? + // COL32 + ((row_id << 5) + (col_id & 31)) : + // COL4 + ////row_id/8 is the number of tile of (8 rows 32 columns) -- column-major + ////row_id%2 is even row, otherwise odd row + ////col_id%COL32_/8 is the number tile of (8 rows 8 columns) + (((((row_id >> 3) << 3) + ((row_id & 1) << 2) + ((col_id % 32) >> 3)) << 5) + + ////col_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(row_id%8/2) is (the row id of alternating 4 rows) - 1 + (((((col_id & 7) >= 4) ? 4 : 0) + ((row_id % 8) >> 1)) << 2) + + ////col_id%4 is the id of 4 cols + (col_id & 3)); + } + + const int act_seq_len = (qk_id == 0) ? seq_len : seq_len_padded; + const int stride = (qk_id == 0) ? stride_q : stride_k; + buf_ptr4[(((batch_id * head_num + head_id) * stride + (new_col << 5) * act_seq_len + new_row) >> 2)] = tmp4; } -template -void invokeAddQKBiasTransform(int8_t *q_buf, int8_t *k_buf, const int32_t* Q, const T* bias_Q, - const int32_t* K, const T* bias_K, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float * q_weight_amax, const float *q_input_deQFactor_div127_ptr, - const float * k_weight_amax, const float *k_input_deQFactor_div127_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream) +template +void invokeAddQKBiasTransform(int8_t* q_buf, + int8_t* k_buf, + const int32_t* Q, + const T* bias_Q, + const int32_t* K, + const T* bias_K, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_weight_amax, + const float* q_input_deQFactor_div127_ptr, + const float* k_weight_amax, + const float* k_input_deQFactor_div127_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream) { - add_QK_bias_transform<<>>( - q_buf, k_buf, Q, bias_Q, K, bias_K, - batch_size * seq_len, batch_size, seq_len, head_num, size_per_head, seq_len*size_per_head, - q_weight_amax, q_input_deQFactor_div127_ptr, k_weight_amax, k_input_deQFactor_div127_ptr, - q_output_scale_ptr, k_output_scale_ptr, use_ORDER_COL32_2R_4R4); + if (seq_len % 32 == 0) { + add_QK_bias_transform<<>>( + q_buf, + k_buf, + Q, + bias_Q, + K, + bias_K, + batch_size * seq_len, + batch_size, + seq_len, + head_num, + size_per_head, + seq_len * size_per_head, + q_weight_amax, + q_input_deQFactor_div127_ptr, + k_weight_amax, + k_input_deQFactor_div127_ptr, + q_output_scale_ptr, + k_output_scale_ptr, + use_ORDER_COL32_2R_4R4); + } + else { + int seq_len_padded = (seq_len + 31) / 32 * 32; + add_QK_bias_transform_varlen<<>>(q_buf, + k_buf, + Q, + bias_Q, + K, + bias_K, + batch_size * seq_len, + batch_size, + seq_len, + head_num, + size_per_head, + seq_len_padded, + seq_len * size_per_head, + seq_len_padded * size_per_head, + q_weight_amax, + q_input_deQFactor_div127_ptr, + k_weight_amax, + k_input_deQFactor_div127_ptr, + q_output_scale_ptr, + k_output_scale_ptr, + use_ORDER_COL32_2R_4R4); + } } -template -void invokeAddQKBiasTransform(int8_t *q_buf, int8_t *k_buf, const int32_t* Q, const float* bias_Q, - const int32_t* K, const float* bias_K, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float * q_weight_amax, const float *q_input_deQFactor_div127_ptr, - const float * k_weight_amax, const float *k_input_deQFactor_div127_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddQKBiasTransform(int8_t *q_buf, int8_t *k_buf, const int32_t* Q, const half* bias_Q, - const int32_t* K, const half* bias_K, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float * q_weight_amax, const float *q_input_deQFactor_div127_ptr, - const float * k_weight_amax, const float *k_input_deQFactor_div127_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -//add_QK_bias_padding_transform for batch int8 cublasLtMatmul & per tensor quantization for weight -//1.add QK bias -//2.padding seq_len in k_buf_ to a multiple of 32 named seq_len_padded -//3.transform each Q K CUBLASLT_ORDER_COL32 matrixes into a series of sub-matrix (with CUBLASLT_ORDER_COL32/CUBLASLT_ORDER_COL4_4R2_8C layout) +template void invokeAddQKBiasTransform(int8_t* q_buf, + int8_t* k_buf, + const int32_t* Q, + const float* bias_Q, + const int32_t* K, + const float* bias_K, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_weight_amax, + const float* q_input_deQFactor_div127_ptr, + const float* k_weight_amax, + const float* k_input_deQFactor_div127_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template void invokeAddQKBiasTransform(int8_t* q_buf, + int8_t* k_buf, + const int32_t* Q, + const half* bias_Q, + const int32_t* K, + const half* bias_K, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_weight_amax, + const float* q_input_deQFactor_div127_ptr, + const float* k_weight_amax, + const float* k_input_deQFactor_div127_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +// add_QK_bias_padding_transform for batch int8 cublasLtMatmul & per tensor quantization for weight +// 1.add QK bias +// 2.padding seq_len in k_buf_ to a multiple of 32 named seq_len_padded +// 3.transform each Q K CUBLASLT_ORDER_COL32 matrixes into a series of sub-matrix (with +// CUBLASLT_ORDER_COL32/CUBLASLT_ORDER_COL4_4R2_8C layout) // Q, K are CUBLASLT_ORDER_COL32 matrixes of m = batch_size * seq_len, n = head_num * size_per_head // q_buf_ is of batchCount = batch_size * head_num, m = seq_len, n = size_per_head, CUBLASLT_ORDER_COL32 // k_buf_ is of batchCount = batch_size * head_num, m = seq_len_padded, n = size_per_head, CUBLASLT_ORDER_COL4_4R2_8C -//only for int8 IO -//size_per_head must be a multiple of 32 -//grid.x = batch_size * seq_len * 2; -//block.x = head_num * size_per_head / 4; -//using char4 -template -__global__ -void add_QK_bias_transform_varlen(int8_t *q_buf_, int8_t *k_buf_, const int8_t* Q, const T* bias_Q, - const int8_t* K, const T* bias_K, const int m, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const int seq_len_padded, const int stride_q, const int stride_k, - const float *q_input_deQFactor_ptr, const float *k_input_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4) +// only for int8 IO +// size_per_head must be a multiple of 32 +// grid.x = batch_size * seq_len * 2; +// block.x = head_num * size_per_head / 4; +// using char4 +template +__global__ void add_QK_bias_transform_varlen(int8_t* q_buf_, + int8_t* k_buf_, + const int8_t* Q, + const T* bias_Q, + const int8_t* K, + const T* bias_K, + const int m, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const int seq_len_padded, + const int stride_q, + const int stride_k, + const float* q_input_deQFactor_ptr, + const float* k_input_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4) { - const char4* data_ptr; - char4* buf_ptr4; - const T* bias_ptr; - int qk_id = blockIdx.x / m; - - data_ptr = qk_id == 0 ? (const char4*)Q : (const char4*)K; - buf_ptr4 = qk_id == 0 ? (char4*)q_buf_ : (char4*)k_buf_; - bias_ptr = qk_id == 0 ? bias_Q : bias_K; - const float input_deQFactor = qk_id == 0 ? __ldg(q_input_deQFactor_ptr) : __ldg(k_input_deQFactor_ptr); - const float output_scale = qk_id == 0 ? __ldg(q_output_scale_ptr) : __ldg(k_output_scale_ptr); - - int threadIdx4 = threadIdx.x << 2; - int batch_id = (blockIdx.x % m) / seq_len; - int head_id = threadIdx4 / size_per_head; - int id_in_head = threadIdx4 % size_per_head; - int word_id = blockIdx.x % seq_len; - - int data_id = (((threadIdx4 >> 5) << 5)*m + ((blockIdx.x%m) << 5) + (threadIdx4&31)) >> 2; - - float scale; - float tmp; - char4 tmp4 = __ldg(data_ptr+data_id); - scale = static_cast(tmp4.x) * input_deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.x = float_to_int8_rn(tmp*output_scale); - - threadIdx4 = threadIdx4+1; - scale = static_cast(tmp4.y) * input_deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.y = float_to_int8_rn(tmp*output_scale); - - threadIdx4 = threadIdx4+1; - scale = static_cast(tmp4.z) * input_deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.z = float_to_int8_rn(tmp*output_scale); - - threadIdx4 = threadIdx4+1; - scale = static_cast(tmp4.w) * input_deQFactor;; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.w = float_to_int8_rn(tmp*output_scale); - - - //row_id, col_id of sub-matrix (m = seq_len/seq_len_padded, n = size_per_head), column-major - - int row_id = word_id; - int col_id = id_in_head; - //new (row, rol) of LtTrans COL32/COL4 sub-matrix, leading dim = (COL32_ * seq_len / COL32_ * seq_len_padded) - int new_col = col_id >> 5; - int new_row; - if (use_ORDER_COL32_2R_4R4) - { - int row_in_tile = row_id & 31; - int col_in_tile = col_id & 31; - new_row = (qk_id != 1) ? - //COL32 - ((row_id << 5) + (col_id&31)) - : - //COL32_2R_4R4 - ( - ((row_id >> 5) << 10) + - //(((row%8)/2*4+row/8)*2+row%2)*32+col - (((((((row_in_tile%8)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile - ) - ; - } - else - { - new_row = (qk_id != 1) ? - //COL32 - ((row_id << 5) + (col_id&31)) - : - //COL4 - ////row_id/8 is the number of tile of (8 rows 32 columns) -- column-major - ////row_id%2 is even row, otherwise odd row - ////col_id%COL32_/8 is the number tile of (8 rows 8 columns) - ( - ((((row_id >> 3) << 3) + ((row_id&1) << 2) + ((col_id%32) >> 3)) << 5) + - ////col_id%8 >= 4 is the right half of (8 rows 8 columns) tile - ////(row_id%8/2) is (the row id of alternating 4 rows) - 1 - (((((col_id&7) >= 4)?4:0) + ((row_id%8) >> 1)) << 2) + - ////col_id%4 is the id of 4 cols - (col_id&3) - ) - ; - } - - const int act_seq_len = (qk_id == 0) ? seq_len : seq_len_padded; - const int stride = (qk_id == 0) ? stride_q : stride_k; - buf_ptr4[(((batch_id*head_num + head_id) * stride + (new_col << 5)*act_seq_len + new_row) >> 2)] = tmp4; -} - -//add_QK_bias_transform for batch int8 cublasLtMatmul & per axis quantization for weight -//1.add QK bias -//2.transform each Q K CUBLASLT_ORDER_COL32 matrixes into a series of sub-matrix (with CUBLASLT_ORDER_COL32/CUBLASLT_ORDER_COL4_4R2_8C layout) + const char4* data_ptr; + char4* buf_ptr4; + const T* bias_ptr; + int qk_id = blockIdx.x / m; + + data_ptr = qk_id == 0 ? (const char4*)Q : (const char4*)K; + buf_ptr4 = qk_id == 0 ? (char4*)q_buf_ : (char4*)k_buf_; + bias_ptr = qk_id == 0 ? bias_Q : bias_K; + const float input_deQFactor = qk_id == 0 ? __ldg(q_input_deQFactor_ptr) : __ldg(k_input_deQFactor_ptr); + const float output_scale = qk_id == 0 ? __ldg(q_output_scale_ptr) : __ldg(k_output_scale_ptr); + + int threadIdx4 = threadIdx.x << 2; + int batch_id = (blockIdx.x % m) / seq_len; + int head_id = threadIdx4 / size_per_head; + int id_in_head = threadIdx4 % size_per_head; + int word_id = blockIdx.x % seq_len; + + int data_id = (((threadIdx4 >> 5) << 5) * m + ((blockIdx.x % m) << 5) + (threadIdx4 & 31)) >> 2; + + float scale; + float tmp; + char4 tmp4 = __ldg(data_ptr + data_id); + scale = static_cast(tmp4.x) * input_deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.x = float_to_int8_rn(tmp * output_scale); + + threadIdx4 = threadIdx4 + 1; + scale = static_cast(tmp4.y) * input_deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.y = float_to_int8_rn(tmp * output_scale); + + threadIdx4 = threadIdx4 + 1; + scale = static_cast(tmp4.z) * input_deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.z = float_to_int8_rn(tmp * output_scale); + + threadIdx4 = threadIdx4 + 1; + scale = static_cast(tmp4.w) * input_deQFactor; + ; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.w = float_to_int8_rn(tmp * output_scale); + + // row_id, col_id of sub-matrix (m = seq_len/seq_len_padded, n = size_per_head), column-major + + int row_id = word_id; + int col_id = id_in_head; + // new (row, rol) of LtTrans COL32/COL4 sub-matrix, leading dim = (COL32_ * seq_len / COL32_ * seq_len_padded) + int new_col = col_id >> 5; + int new_row; + if (use_ORDER_COL32_2R_4R4) { + int row_in_tile = row_id & 31; + int col_in_tile = col_id & 31; + new_row = (qk_id != 1) ? + // COL32 + ((row_id << 5) + (col_id & 31)) : + // COL32_2R_4R4 + (((row_id >> 5) << 10) + + //(((row%8)/2*4+row/8)*2+row%2)*32+col + (((((((row_in_tile % 8) >> 1) << 2) + (row_in_tile >> 3)) << 1) + (row_in_tile & 1)) << 5) + + col_in_tile); + } + else { + new_row = (qk_id != 1) ? + // COL32 + ((row_id << 5) + (col_id & 31)) : + // COL4 + ////row_id/8 is the number of tile of (8 rows 32 columns) -- column-major + ////row_id%2 is even row, otherwise odd row + ////col_id%COL32_/8 is the number tile of (8 rows 8 columns) + (((((row_id >> 3) << 3) + ((row_id & 1) << 2) + ((col_id % 32) >> 3)) << 5) + + ////col_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(row_id%8/2) is (the row id of alternating 4 rows) - 1 + (((((col_id & 7) >= 4) ? 4 : 0) + ((row_id % 8) >> 1)) << 2) + + ////col_id%4 is the id of 4 cols + (col_id & 3)); + } + + const int act_seq_len = (qk_id == 0) ? seq_len : seq_len_padded; + const int stride = (qk_id == 0) ? stride_q : stride_k; + buf_ptr4[(((batch_id * head_num + head_id) * stride + (new_col << 5) * act_seq_len + new_row) >> 2)] = tmp4; +} + +// add_QK_bias_transform for batch int8 cublasLtMatmul & per axis quantization for weight +// 1.add QK bias +// 2.transform each Q K CUBLASLT_ORDER_COL32 matrixes into a series of sub-matrix (with +// CUBLASLT_ORDER_COL32/CUBLASLT_ORDER_COL4_4R2_8C layout) // Q, K are CUBLASLT_ORDER_COL32 matrixes of m = batch_size * seq_len, n = head_num * size_per_head // q_buf_ is of batchCount = batch_size * head_num, m = seq_len, n = size_per_head, CUBLASLT_ORDER_COL32 // k_buf_ is of batchCount = batch_size * head_num, m = seq_len, n = size_per_head, CUBLASLT_ORDER_COL4_4R2_8C -//only for int8 IO -//seq_len, size_per_head must be a multiple of 32 -//grid.x = batch_size * seq_len * 2; -//block.x = head_num * size_per_head / 4; -//using char4 -template -__global__ -void add_QK_bias_transform(int8_t *q_buf_, int8_t *k_buf_, const int8_t* Q, const T* bias_Q, - const int8_t* K, const T* bias_K, const int m, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, int stride, - const float *q_input_deQFactor_ptr, const float *k_input_deQFactor_ptr, const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4) +// only for int8 IO +// seq_len, size_per_head must be a multiple of 32 +// grid.x = batch_size * seq_len * 2; +// block.x = head_num * size_per_head / 4; +// using char4 +template +__global__ void add_QK_bias_transform(int8_t* q_buf_, + int8_t* k_buf_, + const int8_t* Q, + const T* bias_Q, + const int8_t* K, + const T* bias_K, + const int m, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + int stride, + const float* q_input_deQFactor_ptr, + const float* k_input_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4) { - const char4* data_ptr; - char4* buf_ptr4; - const T* bias_ptr; - int qk_id = blockIdx.x / m; - - data_ptr = qk_id == 0 ? (const char4*)Q : (const char4*)K; - buf_ptr4 = qk_id == 0 ? (char4*)q_buf_ : (char4*)k_buf_; - bias_ptr = qk_id == 0 ? bias_Q : bias_K; - const float input_deQFactor = qk_id == 0 ? __ldg(q_input_deQFactor_ptr) : __ldg(k_input_deQFactor_ptr); - const float output_scale = qk_id == 0 ? __ldg(q_output_scale_ptr) : __ldg(k_output_scale_ptr); - - int threadIdx4 = threadIdx.x << 2; - int batch_id = (blockIdx.x % m) / seq_len; - int head_id = threadIdx4 / size_per_head; - int id_in_head = threadIdx4 % size_per_head; - int word_id = blockIdx.x % seq_len; - - int data_id = (((threadIdx4 >> 5) << 5)*m + ((blockIdx.x%m) << 5) + (threadIdx4&31)) >> 2; - - float scale; - float tmp; - char4 tmp4 = __ldg(data_ptr+data_id); - scale = static_cast(tmp4.x) * input_deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.x = float_to_int8_rn(tmp*output_scale); - - threadIdx4 = threadIdx4+1; - scale = static_cast(tmp4.y) * input_deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.y = float_to_int8_rn(tmp*output_scale); - - threadIdx4 = threadIdx4+1; - scale = static_cast(tmp4.z) * input_deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.z = float_to_int8_rn(tmp*output_scale); - - threadIdx4 = threadIdx4+1; - scale = static_cast(tmp4.w) * input_deQFactor;; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.w = float_to_int8_rn(tmp*output_scale); - - - //row_id, col_id of sub-matrix (m = seq_len, n = size_per_head), column-major - - int row_id = word_id; - int col_id = id_in_head; - //new (row, rol) of LtTrans COL32/COL4 sub-matrix, leading dim = (COL32_ * seq_len) - int new_col = col_id >> 5; - int new_row; - if (use_ORDER_COL32_2R_4R4) - { - int row_in_tile = row_id & 31; - int col_in_tile = col_id & 31; - new_row = (qk_id != 1) ? - //COL32 - ((row_id << 5) + (col_id&31)) - : - //COL32_2R_4R4 - ( - ((row_id >> 5) << 10) + - //(((row%8)/2*4+row/8)*2+row%2)*32+col - (((((((row_in_tile%8)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile - ) - ; - } - else - { - new_row = (qk_id != 1) ? - //COL32 - ((row_id << 5) + (col_id&31)) - : - //COL4 - ////row_id/8 is the number of tile of (8 rows 32 columns) -- column-major - ////row_id%2 is even row, otherwise odd row - ////col_id%COL32_/8 is the number tile of (8 rows 8 columns) - ( - ((((row_id >> 3) << 3) + ((row_id&1) << 2) + ((col_id%32) >> 3)) << 5) + - ////col_id%8 >= 4 is the right half of (8 rows 8 columns) tile - ////(row_id%8/2) is (the row id of alternating 4 rows) - 1 - (((((col_id&7) >= 4)?4:0) + ((row_id%8) >> 1)) << 2) + - ////col_id%4 is the id of 4 cols - (col_id&3) - ) - ; - } - - buf_ptr4[(((batch_id*head_num + head_id) * stride + (new_col << 5)*seq_len + new_row) >> 2)] = tmp4; -} - - -template -void invokeAddQKBiasTransform(int8_t *q_buf, int8_t *k_buf, const int8_t* Q, const T* bias_Q, - const int8_t* K, const T* bias_K, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float *q_input_deQFactor_ptr, const float *k_input_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream) + const char4* data_ptr; + char4* buf_ptr4; + const T* bias_ptr; + int qk_id = blockIdx.x / m; + + data_ptr = qk_id == 0 ? (const char4*)Q : (const char4*)K; + buf_ptr4 = qk_id == 0 ? (char4*)q_buf_ : (char4*)k_buf_; + bias_ptr = qk_id == 0 ? bias_Q : bias_K; + const float input_deQFactor = qk_id == 0 ? __ldg(q_input_deQFactor_ptr) : __ldg(k_input_deQFactor_ptr); + const float output_scale = qk_id == 0 ? __ldg(q_output_scale_ptr) : __ldg(k_output_scale_ptr); + + int threadIdx4 = threadIdx.x << 2; + int batch_id = (blockIdx.x % m) / seq_len; + int head_id = threadIdx4 / size_per_head; + int id_in_head = threadIdx4 % size_per_head; + int word_id = blockIdx.x % seq_len; + + int data_id = (((threadIdx4 >> 5) << 5) * m + ((blockIdx.x % m) << 5) + (threadIdx4 & 31)) >> 2; + + float scale; + float tmp; + char4 tmp4 = __ldg(data_ptr + data_id); + scale = static_cast(tmp4.x) * input_deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.x = float_to_int8_rn(tmp * output_scale); + + threadIdx4 = threadIdx4 + 1; + scale = static_cast(tmp4.y) * input_deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.y = float_to_int8_rn(tmp * output_scale); + + threadIdx4 = threadIdx4 + 1; + scale = static_cast(tmp4.z) * input_deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.z = float_to_int8_rn(tmp * output_scale); + + threadIdx4 = threadIdx4 + 1; + scale = static_cast(tmp4.w) * input_deQFactor; + ; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.w = float_to_int8_rn(tmp * output_scale); + + // row_id, col_id of sub-matrix (m = seq_len, n = size_per_head), column-major + + int row_id = word_id; + int col_id = id_in_head; + // new (row, rol) of LtTrans COL32/COL4 sub-matrix, leading dim = (COL32_ * seq_len) + int new_col = col_id >> 5; + int new_row; + if (use_ORDER_COL32_2R_4R4) { + int row_in_tile = row_id & 31; + int col_in_tile = col_id & 31; + new_row = (qk_id != 1) ? + // COL32 + ((row_id << 5) + (col_id & 31)) : + // COL32_2R_4R4 + (((row_id >> 5) << 10) + + //(((row%8)/2*4+row/8)*2+row%2)*32+col + (((((((row_in_tile % 8) >> 1) << 2) + (row_in_tile >> 3)) << 1) + (row_in_tile & 1)) << 5) + + col_in_tile); + } + else { + new_row = (qk_id != 1) ? + // COL32 + ((row_id << 5) + (col_id & 31)) : + // COL4 + ////row_id/8 is the number of tile of (8 rows 32 columns) -- column-major + ////row_id%2 is even row, otherwise odd row + ////col_id%COL32_/8 is the number tile of (8 rows 8 columns) + (((((row_id >> 3) << 3) + ((row_id & 1) << 2) + ((col_id % 32) >> 3)) << 5) + + ////col_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(row_id%8/2) is (the row id of alternating 4 rows) - 1 + (((((col_id & 7) >= 4) ? 4 : 0) + ((row_id % 8) >> 1)) << 2) + + ////col_id%4 is the id of 4 cols + (col_id & 3)); + } + + buf_ptr4[(((batch_id * head_num + head_id) * stride + (new_col << 5) * seq_len + new_row) >> 2)] = tmp4; +} + +template +void invokeAddQKBiasTransform(int8_t* q_buf, + int8_t* k_buf, + const int8_t* Q, + const T* bias_Q, + const int8_t* K, + const T* bias_K, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_input_deQFactor_ptr, + const float* k_input_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream) { - assert(size_per_head % 32 == 0); - if (seq_len % 32 == 0) - { - add_QK_bias_transform_varlen<<>>( - q_buf, k_buf, Q, bias_Q, K, bias_K, - batch_size * seq_len, batch_size, seq_len, head_num, size_per_head, - seq_len, seq_len*size_per_head, seq_len*size_per_head, - q_input_deQFactor_ptr, k_input_deQFactor_ptr, q_output_scale_ptr, k_output_scale_ptr, - use_ORDER_COL32_2R_4R4); - } - else - { - int seq_len_padded = (seq_len + 31)/32*32; - //The padding words will not be considered in softmax, so we don't need memset for k_buf_ - //cudaMemsetAsync(k_buf, 0, batch_size * head_num * seq_len_padded * size_per_head * sizeof(int8_t), stream); - add_QK_bias_transform_varlen<<>>( - q_buf, k_buf, Q, bias_Q, K, bias_K, - batch_size * seq_len, batch_size, seq_len, head_num, size_per_head, - seq_len_padded, seq_len*size_per_head, seq_len_padded*size_per_head, - q_input_deQFactor_ptr, k_input_deQFactor_ptr, q_output_scale_ptr, k_output_scale_ptr, - use_ORDER_COL32_2R_4R4); - } + assert(size_per_head % 32 == 0); + if (seq_len % 32 == 0) { + add_QK_bias_transform_varlen<<>>(q_buf, + k_buf, + Q, + bias_Q, + K, + bias_K, + batch_size * seq_len, + batch_size, + seq_len, + head_num, + size_per_head, + seq_len, + seq_len * size_per_head, + seq_len * size_per_head, + q_input_deQFactor_ptr, + k_input_deQFactor_ptr, + q_output_scale_ptr, + k_output_scale_ptr, + use_ORDER_COL32_2R_4R4); + } + else { + int seq_len_padded = (seq_len + 31) / 32 * 32; + // The padding words will not be considered in softmax, so we don't need memset for k_buf_ + // cudaMemsetAsync(k_buf, 0, batch_size * head_num * seq_len_padded * size_per_head * sizeof(int8_t), stream); + add_QK_bias_transform_varlen<<>>(q_buf, + k_buf, + Q, + bias_Q, + K, + bias_K, + batch_size * seq_len, + batch_size, + seq_len, + head_num, + size_per_head, + seq_len_padded, + seq_len * size_per_head, + seq_len_padded * size_per_head, + q_input_deQFactor_ptr, + k_input_deQFactor_ptr, + q_output_scale_ptr, + k_output_scale_ptr, + use_ORDER_COL32_2R_4R4); + } } -template -void invokeAddQKBiasTransform(int8_t *q_buf, int8_t *k_buf, const int8_t* Q, const float* bias_Q, - const int8_t* K, const float* bias_K, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float *q_input_deQFactor_ptr, const float *k_input_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddQKBiasTransform(int8_t *q_buf, int8_t *k_buf, const int8_t* Q, const half* bias_Q, - const int8_t* K, const half* bias_K, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float *q_input_deQFactor_ptr, const float *k_input_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -//add_QK_bias_padding_transform for batch int8 cublasLtMatmul & per tensor quantization for weight -//1.add QK bias -//2.padding seq_len in k_buf_ to a multiple of 32 named seq_len_padded -//3.transform each Q K row-major matrixes into a series of sub-matrix (with CUBLASLT_ORDER_COL32/CUBLASLT_ORDER_COL4_4R2_8C layout) +template void invokeAddQKBiasTransform(int8_t* q_buf, + int8_t* k_buf, + const int8_t* Q, + const float* bias_Q, + const int8_t* K, + const float* bias_K, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_input_deQFactor_ptr, + const float* k_input_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template void invokeAddQKBiasTransform(int8_t* q_buf, + int8_t* k_buf, + const int8_t* Q, + const half* bias_Q, + const int8_t* K, + const half* bias_K, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_input_deQFactor_ptr, + const float* k_input_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +// add_QK_bias_padding_transform for batch int8 cublasLtMatmul & per tensor quantization for weight +// 1.add QK bias +// 2.padding seq_len in k_buf_ to a multiple of 32 named seq_len_padded +// 3.transform each Q K row-major matrixes into a series of sub-matrix (with +// CUBLASLT_ORDER_COL32/CUBLASLT_ORDER_COL4_4R2_8C layout) // Q, K are row-major matrixes of m = batch_size * seq_len, n = head_num * size_per_head // q_buf_ is of batchCount = batch_size * head_num, m = seq_len, n = size_per_head, CUBLASLT_ORDER_COL32 // k_buf_ is of batchCount = batch_size * head_num, m = seq_len_padded, n = size_per_head, CUBLASLT_ORDER_COL4_4R2_8C -//only for int8 IO -//size_per_head must be a multiple of 32 -//grid.x = batch_size * seq_len * 2; -//block.x = head_num * size_per_head / 4; -//using char4 -template -__global__ -void add_QK_bias_transform_varlen_row(int8_t *q_buf_, int8_t *k_buf_, const int8_t* Q, const T* bias_Q, - const int8_t* K, const T* bias_K, const int m, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const int seq_len_padded, const int stride_q, const int stride_k, - const float *q_input_deQFactor_ptr, const float *k_input_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, const int head_num_x_size_per_head) +// only for int8 IO +// size_per_head must be a multiple of 32 +// grid.x = batch_size * seq_len * 2; +// block.x = head_num * size_per_head / 4; +// using char4 +template +__global__ void add_QK_bias_transform_varlen_row(int8_t* q_buf_, + int8_t* k_buf_, + const int8_t* Q, + const T* bias_Q, + const int8_t* K, + const T* bias_K, + const int m, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const int seq_len_padded, + const int stride_q, + const int stride_k, + const float* q_input_deQFactor_ptr, + const float* k_input_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + const int head_num_x_size_per_head) { - const char4* data_ptr; - char4* buf_ptr4; - const T* bias_ptr; - int qk_id = blockIdx.x / m; - - data_ptr = qk_id == 0 ? (const char4*)Q : (const char4*)K; - buf_ptr4 = qk_id == 0 ? (char4*)q_buf_ : (char4*)k_buf_; - bias_ptr = qk_id == 0 ? bias_Q : bias_K; - const float input_deQFactor = qk_id == 0 ? __ldg(q_input_deQFactor_ptr) : __ldg(k_input_deQFactor_ptr); - const float output_scale = qk_id == 0 ? __ldg(q_output_scale_ptr) : __ldg(k_output_scale_ptr); - - int threadIdx4 = threadIdx.x << 2; - int batch_seq_id = blockIdx.x % m; - int batch_id = (batch_seq_id) / seq_len; - int head_id = threadIdx4 / size_per_head; - int id_in_head = threadIdx4 % size_per_head; - int word_id = blockIdx.x % seq_len; - - int data_id = (batch_seq_id * head_num_x_size_per_head + threadIdx4) >> 2; - - float scale; - float tmp; - char4 tmp4 = __ldg(data_ptr+data_id); - scale = static_cast(tmp4.x) * input_deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.x = float_to_int8_rn(tmp*output_scale); - - threadIdx4 = threadIdx4+1; - scale = static_cast(tmp4.y) * input_deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.y = float_to_int8_rn(tmp*output_scale); - - threadIdx4 = threadIdx4+1; - scale = static_cast(tmp4.z) * input_deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.z = float_to_int8_rn(tmp*output_scale); - - threadIdx4 = threadIdx4+1; - scale = static_cast(tmp4.w) * input_deQFactor;; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.w = float_to_int8_rn(tmp*output_scale); - - - //row_id, col_id of sub-matrix (m = seq_len/seq_len_padded, n = size_per_head), column-major - - int row_id = word_id; - int col_id = id_in_head; - //new (row, rol) of LtTrans COL32/COL4 sub-matrix, leading dim = (COL32_ * seq_len / COL32_ * seq_len_padded) - int new_col = col_id >> 5; - int new_row; - if (use_ORDER_COL32_2R_4R4) - { - int row_in_tile = row_id & 31; - int col_in_tile = col_id & 31; - new_row = (qk_id != 1) ? - //COL32 - ((row_id << 5) + (col_id&31)) - : - //COL32_2R_4R4 - ( - ((row_id >> 5) << 10) + - //(((row%8)/2*4+row/8)*2+row%2)*32+col - (((((((row_in_tile%8)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile - ) - ; - } - else - { - new_row = (qk_id != 1) ? - //COL32 - ((row_id << 5) + (col_id&31)) - : - //COL4 - ////row_id/8 is the number of tile of (8 rows 32 columns) -- column-major - ////row_id%2 is even row, otherwise odd row - ////col_id%COL32_/8 is the number tile of (8 rows 8 columns) - ( - ((((row_id >> 3) << 3) + ((row_id&1) << 2) + ((col_id%32) >> 3)) << 5) + - ////col_id%8 >= 4 is the right half of (8 rows 8 columns) tile - ////(row_id%8/2) is (the row id of alternating 4 rows) - 1 - (((((col_id&7) >= 4)?4:0) + ((row_id%8) >> 1)) << 2) + - ////col_id%4 is the id of 4 cols - (col_id&3) - ) - ; - } - - const int act_seq_len = (qk_id == 0) ? seq_len : seq_len_padded; - const int stride = (qk_id == 0) ? stride_q : stride_k; - buf_ptr4[(((batch_id*head_num + head_id) * stride + (new_col << 5)*act_seq_len + new_row) >> 2)] = tmp4; -} - -template -void invokeAddQKBiasTransformRow(int8_t *q_buf, int8_t *k_buf, const int8_t* Q, const T* bias_Q, - const int8_t* K, const T* bias_K, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float *q_input_deQFactor_ptr, const float *k_input_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream) + const char4* data_ptr; + char4* buf_ptr4; + const T* bias_ptr; + int qk_id = blockIdx.x / m; + + data_ptr = qk_id == 0 ? (const char4*)Q : (const char4*)K; + buf_ptr4 = qk_id == 0 ? (char4*)q_buf_ : (char4*)k_buf_; + bias_ptr = qk_id == 0 ? bias_Q : bias_K; + const float input_deQFactor = qk_id == 0 ? __ldg(q_input_deQFactor_ptr) : __ldg(k_input_deQFactor_ptr); + const float output_scale = qk_id == 0 ? __ldg(q_output_scale_ptr) : __ldg(k_output_scale_ptr); + + int threadIdx4 = threadIdx.x << 2; + int batch_seq_id = blockIdx.x % m; + int batch_id = (batch_seq_id) / seq_len; + int head_id = threadIdx4 / size_per_head; + int id_in_head = threadIdx4 % size_per_head; + int word_id = blockIdx.x % seq_len; + + int data_id = (batch_seq_id * head_num_x_size_per_head + threadIdx4) >> 2; + + float scale; + float tmp; + char4 tmp4 = __ldg(data_ptr + data_id); + scale = static_cast(tmp4.x) * input_deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.x = float_to_int8_rn(tmp * output_scale); + + threadIdx4 = threadIdx4 + 1; + scale = static_cast(tmp4.y) * input_deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.y = float_to_int8_rn(tmp * output_scale); + + threadIdx4 = threadIdx4 + 1; + scale = static_cast(tmp4.z) * input_deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.z = float_to_int8_rn(tmp * output_scale); + + threadIdx4 = threadIdx4 + 1; + scale = static_cast(tmp4.w) * input_deQFactor; + ; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.w = float_to_int8_rn(tmp * output_scale); + + // row_id, col_id of sub-matrix (m = seq_len/seq_len_padded, n = size_per_head), column-major + + int row_id = word_id; + int col_id = id_in_head; + // new (row, rol) of LtTrans COL32/COL4 sub-matrix, leading dim = (COL32_ * seq_len / COL32_ * seq_len_padded) + int new_col = col_id >> 5; + int new_row; + if (use_ORDER_COL32_2R_4R4) { + int row_in_tile = row_id & 31; + int col_in_tile = col_id & 31; + new_row = (qk_id != 1) ? + // COL32 + ((row_id << 5) + (col_id & 31)) : + // COL32_2R_4R4 + (((row_id >> 5) << 10) + + //(((row%8)/2*4+row/8)*2+row%2)*32+col + (((((((row_in_tile % 8) >> 1) << 2) + (row_in_tile >> 3)) << 1) + (row_in_tile & 1)) << 5) + + col_in_tile); + } + else { + new_row = (qk_id != 1) ? + // COL32 + ((row_id << 5) + (col_id & 31)) : + // COL4 + ////row_id/8 is the number of tile of (8 rows 32 columns) -- column-major + ////row_id%2 is even row, otherwise odd row + ////col_id%COL32_/8 is the number tile of (8 rows 8 columns) + (((((row_id >> 3) << 3) + ((row_id & 1) << 2) + ((col_id % 32) >> 3)) << 5) + + ////col_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(row_id%8/2) is (the row id of alternating 4 rows) - 1 + (((((col_id & 7) >= 4) ? 4 : 0) + ((row_id % 8) >> 1)) << 2) + + ////col_id%4 is the id of 4 cols + (col_id & 3)); + } + + const int act_seq_len = (qk_id == 0) ? seq_len : seq_len_padded; + const int stride = (qk_id == 0) ? stride_q : stride_k; + buf_ptr4[(((batch_id * head_num + head_id) * stride + (new_col << 5) * act_seq_len + new_row) >> 2)] = tmp4; +} + +template +void invokeAddQKBiasTransformRow(int8_t* q_buf, + int8_t* k_buf, + const int8_t* Q, + const T* bias_Q, + const int8_t* K, + const T* bias_K, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_input_deQFactor_ptr, + const float* k_input_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream) { - assert(size_per_head % 32 == 0); - if (seq_len % 32 == 0) - { - add_QK_bias_transform_varlen_row<<>>( - q_buf, k_buf, Q, bias_Q, K, bias_K, - batch_size * seq_len, batch_size, seq_len, head_num, size_per_head, - seq_len, seq_len*size_per_head, seq_len*size_per_head, - q_input_deQFactor_ptr, k_input_deQFactor_ptr, q_output_scale_ptr, k_output_scale_ptr, - use_ORDER_COL32_2R_4R4, head_num*size_per_head); - } - else - { - int seq_len_padded = (seq_len + 31)/32*32; - //The padding words will not be considered in softmax, so we don't need memset for k_buf_ - //cudaMemsetAsync(k_buf, 0, batch_size * head_num * seq_len_padded * size_per_head * sizeof(int8_t), stream); - add_QK_bias_transform_varlen_row<<>>( - q_buf, k_buf, Q, bias_Q, K, bias_K, - batch_size * seq_len, batch_size, seq_len, head_num, size_per_head, - seq_len_padded, seq_len*size_per_head, seq_len_padded*size_per_head, - q_input_deQFactor_ptr, k_input_deQFactor_ptr, q_output_scale_ptr, k_output_scale_ptr, - use_ORDER_COL32_2R_4R4, head_num*size_per_head); - } + assert(size_per_head % 32 == 0); + if (seq_len % 32 == 0) { + add_QK_bias_transform_varlen_row<<>>(q_buf, + k_buf, + Q, + bias_Q, + K, + bias_K, + batch_size * seq_len, + batch_size, + seq_len, + head_num, + size_per_head, + seq_len, + seq_len * size_per_head, + seq_len * size_per_head, + q_input_deQFactor_ptr, + k_input_deQFactor_ptr, + q_output_scale_ptr, + k_output_scale_ptr, + use_ORDER_COL32_2R_4R4, + head_num * size_per_head); + } + else { + int seq_len_padded = (seq_len + 31) / 32 * 32; + // The padding words will not be considered in softmax, so we don't need memset for k_buf_ + // cudaMemsetAsync(k_buf, 0, batch_size * head_num * seq_len_padded * size_per_head * sizeof(int8_t), stream); + add_QK_bias_transform_varlen_row<<>>(q_buf, + k_buf, + Q, + bias_Q, + K, + bias_K, + batch_size * seq_len, + batch_size, + seq_len, + head_num, + size_per_head, + seq_len_padded, + seq_len * size_per_head, + seq_len_padded * size_per_head, + q_input_deQFactor_ptr, + k_input_deQFactor_ptr, + q_output_scale_ptr, + k_output_scale_ptr, + use_ORDER_COL32_2R_4R4, + head_num * size_per_head); + } } -template -void invokeAddQKBiasTransformRow(int8_t *q_buf, int8_t *k_buf, const int8_t* Q, const float* bias_Q, - const int8_t* K, const float* bias_K, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float *q_input_deQFactor_ptr, const float *k_input_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddQKBiasTransformRow(int8_t *q_buf, int8_t *k_buf, const int8_t* Q, const half* bias_Q, - const int8_t* K, const half* bias_K, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float *q_input_deQFactor_ptr, const float *k_input_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -//add_QK_bias_transform & rebuild padding for batch int8 cublasLtMatmul & per axis quantization for weight -//1.add QK bias -//2.transform each Q K CUBLASLT_ORDER_COL32 matrixes into a series of sub-matrix (with CUBLASLT_ORDER_COL32/CUBLASLT_ORDER_COL4_4R2_8C layout) +template void invokeAddQKBiasTransformRow(int8_t* q_buf, + int8_t* k_buf, + const int8_t* Q, + const float* bias_Q, + const int8_t* K, + const float* bias_K, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_input_deQFactor_ptr, + const float* k_input_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template void invokeAddQKBiasTransformRow(int8_t* q_buf, + int8_t* k_buf, + const int8_t* Q, + const half* bias_Q, + const int8_t* K, + const half* bias_K, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_input_deQFactor_ptr, + const float* k_input_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +// add_QK_bias_transform & rebuild padding for batch int8 cublasLtMatmul & per axis quantization for weight +// 1.add QK bias +// 2.transform each Q K CUBLASLT_ORDER_COL32 matrixes into a series of sub-matrix (with +// CUBLASLT_ORDER_COL32/CUBLASLT_ORDER_COL4_4R2_8C layout) // Q, K are CUBLASLT_ORDER_COL32 matrixes of m = valid_word_num, n = head_num * size_per_head // q_buf_ is of batchCount = batch_size * head_num, m = seq_len, n = size_per_head, CUBLASLT_ORDER_COL32 -// k_buf_ is of batchCount = batch_size * head_num, m = seq_len, n = size_per_head, CUBLASLT_ORDER_COL4_4R2_8C or CUBLASLT_ORDER_COL32_2R_4R4 -//only for int32 input & int8 output -//seq_len, size_per_head must be a multiple of 32 -//grid.x = valid_word_num * 2; -//block.x = head_num * size_per_head / 4; -//using char4 -template -__global__ -void add_QK_bias_transform_rebuild_padding(int8_t *q_buf_, int8_t *k_buf_, const int32_t* Q, const T* bias_Q, - const int32_t* K, const T* bias_K, const int* sequence_id_offset, - const int valid_word_num, const int m, const int batch_size, const int seq_len, - const int head_num, const int size_per_head, int stride, const float * q_weight_amax, - const float *q_input_deQFactor_div127_ptr, const float * k_weight_amax, - const float *k_input_deQFactor_div127_ptr, const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4) +// k_buf_ is of batchCount = batch_size * head_num, m = seq_len, n = size_per_head, CUBLASLT_ORDER_COL4_4R2_8C or +// CUBLASLT_ORDER_COL32_2R_4R4 +// only for int32 input & int8 output +// seq_len, size_per_head must be a multiple of 32 +// grid.x = valid_word_num * 2; +// block.x = head_num * size_per_head / 4; +// using char4 +template +__global__ void add_QK_bias_transform_rebuild_padding(int8_t* q_buf_, + int8_t* k_buf_, + const int32_t* Q, + const T* bias_Q, + const int32_t* K, + const T* bias_K, + const int* sequence_id_offset, + const int valid_word_num, + const int m, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + int stride, + const float* q_weight_amax, + const float* q_input_deQFactor_div127_ptr, + const float* k_weight_amax, + const float* k_input_deQFactor_div127_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4) { - const int32_t* data_ptr; - char4* buf_ptr4; - const T* bias_ptr; - const float* weight_amax; - int qk_id = blockIdx.x / valid_word_num; - - data_ptr = qk_id == 0 ? Q : K; - buf_ptr4 = qk_id == 0 ? (char4*)q_buf_ : (char4*)k_buf_; - bias_ptr = qk_id == 0 ? bias_Q : bias_K; - - int threadIdx4 = threadIdx.x << 2; - int m_full_idx = blockIdx.x % valid_word_num; - m_full_idx = (valid_word_num != m) ? (m_full_idx + __ldg(sequence_id_offset+m_full_idx)) : m_full_idx; - int batch_id = m_full_idx / seq_len; - int head_id = threadIdx4 / size_per_head; - int id_in_head = threadIdx4 % size_per_head; - int word_id = m_full_idx % seq_len; - - const float input_deQFactor_div127 = qk_id == 0 ? __ldg(q_input_deQFactor_div127_ptr) : __ldg(k_input_deQFactor_div127_ptr); - weight_amax = qk_id == 0 ? q_weight_amax : k_weight_amax; - const float output_scale = qk_id == 0 ? __ldg(q_output_scale_ptr) : __ldg(k_output_scale_ptr); - - int data_id = (((threadIdx4 >> 5) << 5)*valid_word_num + ((blockIdx.x%valid_word_num) << 5) + (threadIdx4&31)); - - float scale; - float tmp; - char4 tmp4; - scale = static_cast(__ldg(data_ptr+data_id)) * __ldg(weight_amax+threadIdx4) * input_deQFactor_div127; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.x = float_to_int8_rn(tmp*output_scale); - - data_id = data_id+1; - threadIdx4 = threadIdx4+1; - scale = static_cast(__ldg(data_ptr+data_id)) * __ldg(weight_amax+threadIdx4)* input_deQFactor_div127; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.y = float_to_int8_rn(tmp*output_scale); - - data_id = data_id+1; - threadIdx4 = threadIdx4+1; - scale = static_cast(__ldg(data_ptr+data_id)) * __ldg(weight_amax+threadIdx4) * input_deQFactor_div127; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.z = float_to_int8_rn(tmp*output_scale); - - data_id = data_id+1; - threadIdx4 = threadIdx4+1; - scale = static_cast(__ldg(data_ptr+data_id)) * __ldg(weight_amax+threadIdx4) * input_deQFactor_div127; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.w = float_to_int8_rn(tmp*output_scale); - - //row_id, col_id of sub-matrix (m = seq_len, n = size_per_head), column-major - int row_id = word_id; - int col_id = id_in_head; - //new (row, rol) of LtTrans COL32/COL4 sub-matrix, leading dim = (COL32_ * seq_len) - int new_col = col_id >> 5; - int new_row; - if (use_ORDER_COL32_2R_4R4) - { - int row_in_tile = row_id & 31; - int col_in_tile = col_id & 31; - new_row = (qk_id != 1) ? - //COL32 - ((row_id << 5) + (col_id&31)) - : - //COL32_2R_4R4 - ( - ((row_id >> 5) << 10) + - //(((row%8)/2*4+row/8)*2+row%2)*32+col - (((((((row_in_tile%8)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile - ) - ; - } - else - { - new_row = (qk_id != 1) ? - //COL32 - ((row_id << 5) + (col_id&31)) - : - //COL4 - ////row_id/8 is the number of tile of (8 rows 32 columns) -- column-major - ////row_id%2 is even row, otherwise odd row - ////col_id%COL32_/8 is the number tile of (8 rows 8 columns) - ( - ((((row_id >> 3) << 3) + ((row_id&1) << 2) + ((col_id%32) >> 3)) << 5) + - ////col_id%8 >= 4 is the right half of (8 rows 8 columns) tile - ////(row_id%8/2) is (the row id of alternating 4 rows) - 1 - (((((col_id&7) >= 4)?4:0) + ((row_id%8) >> 1)) << 2) + - ////col_id%4 is the id of 4 cols - (col_id&3) - ) - ; - } - - buf_ptr4[(((batch_id*head_num + head_id) * stride + (new_col << 5)*seq_len + new_row) >> 2)] = tmp4; + const int32_t* data_ptr; + char4* buf_ptr4; + const T* bias_ptr; + const float* weight_amax; + int qk_id = blockIdx.x / valid_word_num; + + data_ptr = qk_id == 0 ? Q : K; + buf_ptr4 = qk_id == 0 ? (char4*)q_buf_ : (char4*)k_buf_; + bias_ptr = qk_id == 0 ? bias_Q : bias_K; + + int threadIdx4 = threadIdx.x << 2; + int m_full_idx = blockIdx.x % valid_word_num; + m_full_idx = (valid_word_num != m) ? (m_full_idx + __ldg(sequence_id_offset + m_full_idx)) : m_full_idx; + int batch_id = m_full_idx / seq_len; + int head_id = threadIdx4 / size_per_head; + int id_in_head = threadIdx4 % size_per_head; + int word_id = m_full_idx % seq_len; + + const float input_deQFactor_div127 = + qk_id == 0 ? __ldg(q_input_deQFactor_div127_ptr) : __ldg(k_input_deQFactor_div127_ptr); + weight_amax = qk_id == 0 ? q_weight_amax : k_weight_amax; + const float output_scale = qk_id == 0 ? __ldg(q_output_scale_ptr) : __ldg(k_output_scale_ptr); + + int data_id = + (((threadIdx4 >> 5) << 5) * valid_word_num + ((blockIdx.x % valid_word_num) << 5) + (threadIdx4 & 31)); + + float scale; + float tmp; + char4 tmp4; + scale = static_cast(__ldg(data_ptr + data_id)) * __ldg(weight_amax + threadIdx4) * input_deQFactor_div127; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.x = float_to_int8_rn(tmp * output_scale); + + data_id = data_id + 1; + threadIdx4 = threadIdx4 + 1; + scale = static_cast(__ldg(data_ptr + data_id)) * __ldg(weight_amax + threadIdx4) * input_deQFactor_div127; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.y = float_to_int8_rn(tmp * output_scale); + + data_id = data_id + 1; + threadIdx4 = threadIdx4 + 1; + scale = static_cast(__ldg(data_ptr + data_id)) * __ldg(weight_amax + threadIdx4) * input_deQFactor_div127; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.z = float_to_int8_rn(tmp * output_scale); + + data_id = data_id + 1; + threadIdx4 = threadIdx4 + 1; + scale = static_cast(__ldg(data_ptr + data_id)) * __ldg(weight_amax + threadIdx4) * input_deQFactor_div127; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.w = float_to_int8_rn(tmp * output_scale); + + // row_id, col_id of sub-matrix (m = seq_len, n = size_per_head), column-major + int row_id = word_id; + int col_id = id_in_head; + // new (row, rol) of LtTrans COL32/COL4 sub-matrix, leading dim = (COL32_ * seq_len) + int new_col = col_id >> 5; + int new_row; + if (use_ORDER_COL32_2R_4R4) { + int row_in_tile = row_id & 31; + int col_in_tile = col_id & 31; + new_row = (qk_id != 1) ? + // COL32 + ((row_id << 5) + (col_id & 31)) : + // COL32_2R_4R4 + (((row_id >> 5) << 10) + + //(((row%8)/2*4+row/8)*2+row%2)*32+col + (((((((row_in_tile % 8) >> 1) << 2) + (row_in_tile >> 3)) << 1) + (row_in_tile & 1)) << 5) + + col_in_tile); + } + else { + new_row = (qk_id != 1) ? + // COL32 + ((row_id << 5) + (col_id & 31)) : + // COL4 + ////row_id/8 is the number of tile of (8 rows 32 columns) -- column-major + ////row_id%2 is even row, otherwise odd row + ////col_id%COL32_/8 is the number tile of (8 rows 8 columns) + (((((row_id >> 3) << 3) + ((row_id & 1) << 2) + ((col_id % 32) >> 3)) << 5) + + ////col_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(row_id%8/2) is (the row id of alternating 4 rows) - 1 + (((((col_id & 7) >= 4) ? 4 : 0) + ((row_id % 8) >> 1)) << 2) + + ////col_id%4 is the id of 4 cols + (col_id & 3)); + } + + buf_ptr4[(((batch_id * head_num + head_id) * stride + (new_col << 5) * seq_len + new_row) >> 2)] = tmp4; } -template -void invokeAddQKBiasTransformRebuildPadding(int8_t *q_buf, int8_t *k_buf, - const int32_t* Q, const T* bias_Q, - const int32_t* K, const T* bias_K, - const int* sequence_id_offset, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float * q_weight_amax, - const float *q_input_deQFactor_div127_ptr, - const float * k_weight_amax, - const float *k_input_deQFactor_div127_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream) +template +void invokeAddQKBiasTransformRebuildPadding(int8_t* q_buf, + int8_t* k_buf, + const int32_t* Q, + const T* bias_Q, + const int32_t* K, + const T* bias_K, + const int* sequence_id_offset, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_weight_amax, + const float* q_input_deQFactor_div127_ptr, + const float* k_weight_amax, + const float* k_input_deQFactor_div127_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream) { - add_QK_bias_transform_rebuild_padding<<>>( - q_buf, k_buf, Q, bias_Q, K, bias_K, - sequence_id_offset, valid_word_num, - batch_size*seq_len, batch_size, seq_len, - head_num, size_per_head, seq_len*size_per_head, - q_weight_amax, q_input_deQFactor_div127_ptr, - k_weight_amax, k_input_deQFactor_div127_ptr, - q_output_scale_ptr, k_output_scale_ptr, - use_ORDER_COL32_2R_4R4); -} - -template -void invokeAddQKBiasTransformRebuildPadding(int8_t *q_buf, int8_t *k_buf, - const int32_t* Q, const float* bias_Q, - const int32_t* K, const float* bias_K, - const int* sequence_id_offset, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float * q_weight_amax, - const float *q_input_deQFactor_div127_ptr, - const float * k_weight_amax, - const float *k_input_deQFactor_div127_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddQKBiasTransformRebuildPadding(int8_t *q_buf, int8_t *k_buf, - const int32_t* Q, const half* bias_Q, - const int32_t* K, const half* bias_K, - const int* sequence_id_offset, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float * q_weight_amax, - const float *q_input_deQFactor_div127_ptr, - const float * k_weight_amax, - const float *k_input_deQFactor_div127_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -//add_QK_bias_transform & rebuild padding for batch int8 cublasLtMatmul & per tensor quantization for weight -//1.add QK bias -//2.transform each Q K CUBLASLT_ORDER_COL32 matrixes into a series of sub-matrix (with CUBLASLT_ORDER_COL32/CUBLASLT_ORDER_COL4_4R2_8C layout) + add_QK_bias_transform_rebuild_padding<<>>(q_buf, + k_buf, + Q, + bias_Q, + K, + bias_K, + sequence_id_offset, + valid_word_num, + batch_size * seq_len, + batch_size, + seq_len, + head_num, + size_per_head, + seq_len * size_per_head, + q_weight_amax, + q_input_deQFactor_div127_ptr, + k_weight_amax, + k_input_deQFactor_div127_ptr, + q_output_scale_ptr, + k_output_scale_ptr, + use_ORDER_COL32_2R_4R4); +} + +template void invokeAddQKBiasTransformRebuildPadding(int8_t* q_buf, + int8_t* k_buf, + const int32_t* Q, + const float* bias_Q, + const int32_t* K, + const float* bias_K, + const int* sequence_id_offset, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_weight_amax, + const float* q_input_deQFactor_div127_ptr, + const float* k_weight_amax, + const float* k_input_deQFactor_div127_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template void invokeAddQKBiasTransformRebuildPadding(int8_t* q_buf, + int8_t* k_buf, + const int32_t* Q, + const half* bias_Q, + const int32_t* K, + const half* bias_K, + const int* sequence_id_offset, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_weight_amax, + const float* q_input_deQFactor_div127_ptr, + const float* k_weight_amax, + const float* k_input_deQFactor_div127_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +// add_QK_bias_transform & rebuild padding for batch int8 cublasLtMatmul & per tensor quantization for weight +// 1.add QK bias +// 2.transform each Q K CUBLASLT_ORDER_COL32 matrixes into a series of sub-matrix (with +// CUBLASLT_ORDER_COL32/CUBLASLT_ORDER_COL4_4R2_8C layout) // Q, K are CUBLASLT_ORDER_COL32 matrixes of m = valid_word_num, n = head_num * size_per_head // q_buf_ is of batchCount = batch_size * head_num, m = seq_len, n = size_per_head, CUBLASLT_ORDER_COL32 -// k_buf_ is of batchCount = batch_size * head_num, m = seq_len, n = size_per_head, CUBLASLT_ORDER_COL4_4R2_8C or CUBLASLT_ORDER_COL32_2R_4R4 -//only for int8 IO -//seq_len, size_per_head must be a multiple of 32 -//grid.x = valid_word_num * 2; -//block.x = head_num * size_per_head / 4; -//using char4 -template -__global__ -void add_QK_bias_transform_rebuild_padding(int8_t *q_buf_, int8_t *k_buf_, const int8_t* Q, const T* bias_Q, - const int8_t* K, const T* bias_K, const int* sequence_id_offset, - const int valid_word_num, const int m, const int batch_size, const int seq_len, - const int head_num, const int size_per_head, int stride, - const float *q_deQFactor_ptr, const float *k_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4) +// k_buf_ is of batchCount = batch_size * head_num, m = seq_len, n = size_per_head, CUBLASLT_ORDER_COL4_4R2_8C or +// CUBLASLT_ORDER_COL32_2R_4R4 +// only for int8 IO +// seq_len, size_per_head must be a multiple of 32 +// grid.x = valid_word_num * 2; +// block.x = head_num * size_per_head / 4; +// using char4 +template +__global__ void add_QK_bias_transform_rebuild_padding(int8_t* q_buf_, + int8_t* k_buf_, + const int8_t* Q, + const T* bias_Q, + const int8_t* K, + const T* bias_K, + const int* sequence_id_offset, + const int valid_word_num, + const int m, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + int stride, + const float* q_deQFactor_ptr, + const float* k_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4) { - const char4* data_ptr; - char4* buf_ptr4; - const T* bias_ptr; - int qk_id = blockIdx.x / valid_word_num; - - data_ptr = qk_id == 0 ? (const char4*)Q : (const char4*)K; - buf_ptr4 = qk_id == 0 ? (char4*)q_buf_ : (char4*)k_buf_; - bias_ptr = qk_id == 0 ? bias_Q : bias_K; - - int threadIdx4 = threadIdx.x << 2; - int m_full_idx = blockIdx.x % valid_word_num; - m_full_idx = (valid_word_num != m) ? (m_full_idx + __ldg(sequence_id_offset+m_full_idx)) : m_full_idx; - int batch_id = m_full_idx / seq_len; - int head_id = threadIdx4 / size_per_head; - int id_in_head = threadIdx4 % size_per_head; - int word_id = m_full_idx % seq_len; - - const float deQFactor = qk_id == 0 ? __ldg(q_deQFactor_ptr) : __ldg(k_deQFactor_ptr); - const float output_scale = qk_id == 0 ? __ldg(q_output_scale_ptr) : __ldg(k_output_scale_ptr); - - int data_id = (((threadIdx4 >> 5) << 5)*valid_word_num + ((blockIdx.x%valid_word_num) << 5) + (threadIdx4&31)) >> 2; - - float scale; - float tmp; - char4 tmp4; - - tmp4 = __ldg(data_ptr+data_id); - - scale = static_cast(tmp4.x) * deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.x = float_to_int8_rn(tmp*output_scale); - - threadIdx4 = threadIdx4+1; - scale = static_cast(tmp4.y) * deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.y = float_to_int8_rn(tmp*output_scale); - - threadIdx4 = threadIdx4+1; - scale = static_cast(tmp4.z) * deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.z = float_to_int8_rn(tmp*output_scale); - - threadIdx4 = threadIdx4+1; - scale = static_cast(tmp4.w) * deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.w = float_to_int8_rn(tmp*output_scale); - - //row_id, col_id of sub-matrix (m = seq_len, n = size_per_head), column-major - int row_id = word_id; - int col_id = id_in_head; - //new (row, rol) of LtTrans COL32/COL4 sub-matrix, leading dim = (COL32_ * seq_len) - int new_col = col_id >> 5; - int new_row; - if (use_ORDER_COL32_2R_4R4) - { - int row_in_tile = row_id & 31; - int col_in_tile = col_id & 31; - new_row = (qk_id != 1) ? - //COL32 - ((row_id << 5) + (col_id&31)) - : - //COL32_2R_4R4 - ( - ((row_id >> 5) << 10) + - //(((row%8)/2*4+row/8)*2+row%2)*32+col - (((((((row_in_tile%8)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile - ) - ; - } - else - { - new_row = (qk_id != 1) ? - //COL32 - ((row_id << 5) + (col_id&31)) - : - //COL4 - ////row_id/8 is the number of tile of (8 rows 32 columns) -- column-major - ////row_id%2 is even row, otherwise odd row - ////col_id%COL32_/8 is the number tile of (8 rows 8 columns) - ( - ((((row_id >> 3) << 3) + ((row_id&1) << 2) + ((col_id%32) >> 3)) << 5) + - ////col_id%8 >= 4 is the right half of (8 rows 8 columns) tile - ////(row_id%8/2) is (the row id of alternating 4 rows) - 1 - (((((col_id&7) >= 4)?4:0) + ((row_id%8) >> 1)) << 2) + - ////col_id%4 is the id of 4 cols - (col_id&3) - ) - ; - } - - buf_ptr4[(((batch_id*head_num + head_id) * stride + (new_col << 5)*seq_len + new_row) >> 2)] = tmp4; -} + const char4* data_ptr; + char4* buf_ptr4; + const T* bias_ptr; + int qk_id = blockIdx.x / valid_word_num; + + data_ptr = qk_id == 0 ? (const char4*)Q : (const char4*)K; + buf_ptr4 = qk_id == 0 ? (char4*)q_buf_ : (char4*)k_buf_; + bias_ptr = qk_id == 0 ? bias_Q : bias_K; + + int threadIdx4 = threadIdx.x << 2; + int m_full_idx = blockIdx.x % valid_word_num; + m_full_idx = (valid_word_num != m) ? (m_full_idx + __ldg(sequence_id_offset + m_full_idx)) : m_full_idx; + int batch_id = m_full_idx / seq_len; + int head_id = threadIdx4 / size_per_head; + int id_in_head = threadIdx4 % size_per_head; + int word_id = m_full_idx % seq_len; + const float deQFactor = qk_id == 0 ? __ldg(q_deQFactor_ptr) : __ldg(k_deQFactor_ptr); + const float output_scale = qk_id == 0 ? __ldg(q_output_scale_ptr) : __ldg(k_output_scale_ptr); -//add_QK_bias_transform & rebuild padding for batch int8 cublasLtMatmul & per tensor quantization for weight -//1.add QK bias -//2.transform each Q K CUBLASLT_ORDER_COL32 matrixes into a series of sub-matrix (with CUBLASLT_ORDER_COL32/CUBLASLT_ORDER_COL4_4R2_8C layout) + int data_id = + (((threadIdx4 >> 5) << 5) * valid_word_num + ((blockIdx.x % valid_word_num) << 5) + (threadIdx4 & 31)) >> 2; + + float scale; + float tmp; + char4 tmp4; + + tmp4 = __ldg(data_ptr + data_id); + + scale = static_cast(tmp4.x) * deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.x = float_to_int8_rn(tmp * output_scale); + + threadIdx4 = threadIdx4 + 1; + scale = static_cast(tmp4.y) * deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.y = float_to_int8_rn(tmp * output_scale); + + threadIdx4 = threadIdx4 + 1; + scale = static_cast(tmp4.z) * deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.z = float_to_int8_rn(tmp * output_scale); + + threadIdx4 = threadIdx4 + 1; + scale = static_cast(tmp4.w) * deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.w = float_to_int8_rn(tmp * output_scale); + + // row_id, col_id of sub-matrix (m = seq_len, n = size_per_head), column-major + int row_id = word_id; + int col_id = id_in_head; + // new (row, rol) of LtTrans COL32/COL4 sub-matrix, leading dim = (COL32_ * seq_len) + int new_col = col_id >> 5; + int new_row; + if (use_ORDER_COL32_2R_4R4) { + int row_in_tile = row_id & 31; + int col_in_tile = col_id & 31; + new_row = (qk_id != 1) ? + // COL32 + ((row_id << 5) + (col_id & 31)) : + // COL32_2R_4R4 + (((row_id >> 5) << 10) + + //(((row%8)/2*4+row/8)*2+row%2)*32+col + (((((((row_in_tile % 8) >> 1) << 2) + (row_in_tile >> 3)) << 1) + (row_in_tile & 1)) << 5) + + col_in_tile); + } + else { + new_row = (qk_id != 1) ? + // COL32 + ((row_id << 5) + (col_id & 31)) : + // COL4 + ////row_id/8 is the number of tile of (8 rows 32 columns) -- column-major + ////row_id%2 is even row, otherwise odd row + ////col_id%COL32_/8 is the number tile of (8 rows 8 columns) + (((((row_id >> 3) << 3) + ((row_id & 1) << 2) + ((col_id % 32) >> 3)) << 5) + + ////col_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(row_id%8/2) is (the row id of alternating 4 rows) - 1 + (((((col_id & 7) >= 4) ? 4 : 0) + ((row_id % 8) >> 1)) << 2) + + ////col_id%4 is the id of 4 cols + (col_id & 3)); + } + + buf_ptr4[(((batch_id * head_num + head_id) * stride + (new_col << 5) * seq_len + new_row) >> 2)] = tmp4; +} + +// add_QK_bias_transform & rebuild padding for batch int8 cublasLtMatmul & per tensor quantization for weight +// 1.add QK bias +// 2.transform each Q K CUBLASLT_ORDER_COL32 matrixes into a series of sub-matrix (with +// CUBLASLT_ORDER_COL32/CUBLASLT_ORDER_COL4_4R2_8C layout) // Q, K are CUBLASLT_ORDER_COL32 matrixes of m = valid_word_num, n = head_num * size_per_head // q_buf_ is of batchCount = batch_size * head_num, m = seq_len, n = size_per_head, CUBLASLT_ORDER_COL32 // seq_len_padded = (seq_len + 31)/32*32; -// k_buf_ is of batchCount = batch_size * head_num, m = seq_len_padded, n = size_per_head, CUBLASLT_ORDER_COL4_4R2_8C or CUBLASLT_ORDER_COL32_2R_4R4 -//only for int8 IO -//seq_len, size_per_head must be a multiple of 32 -//grid.x = valid_word_num * 2; -//block.x = head_num * size_per_head / 4; -//using char4 -template -__global__ -void add_QK_bias_transform_rebuild_padding_varlen(int8_t *q_buf_, int8_t *k_buf_, const int8_t* Q, const T* bias_Q, - const int8_t* K, const T* bias_K, const int* sequence_id_offset, - const int valid_word_num, const int m, const int batch_size, - const int seq_len, const int seq_len_padded, const int head_num, - const int size_per_head, int stride_q, int stride_k, - const float *q_deQFactor_ptr, const float *k_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4) +// k_buf_ is of batchCount = batch_size * head_num, m = seq_len_padded, n = size_per_head, CUBLASLT_ORDER_COL4_4R2_8C +// or CUBLASLT_ORDER_COL32_2R_4R4 +// only for int8 IO +// seq_len, size_per_head must be a multiple of 32 +// grid.x = valid_word_num * 2; +// block.x = head_num * size_per_head / 4; +// using char4 +template +__global__ void add_QK_bias_transform_rebuild_padding_varlen(int8_t* q_buf_, + int8_t* k_buf_, + const int8_t* Q, + const T* bias_Q, + const int8_t* K, + const T* bias_K, + const int* sequence_id_offset, + const int valid_word_num, + const int m, + const int batch_size, + const int seq_len, + const int seq_len_padded, + const int head_num, + const int size_per_head, + int stride_q, + int stride_k, + const float* q_deQFactor_ptr, + const float* k_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4) { - const char4* data_ptr; - char4* buf_ptr4; - const T* bias_ptr; - int qk_id = blockIdx.x / valid_word_num; - - data_ptr = qk_id == 0 ? (const char4*)Q : (const char4*)K; - buf_ptr4 = qk_id == 0 ? (char4*)q_buf_ : (char4*)k_buf_; - bias_ptr = qk_id == 0 ? bias_Q : bias_K; - - int threadIdx4 = threadIdx.x << 2; - int m_full_idx = blockIdx.x % valid_word_num; - m_full_idx = (valid_word_num != m) ? (m_full_idx + __ldg(sequence_id_offset+m_full_idx)) : m_full_idx; - int batch_id = m_full_idx / seq_len; - int head_id = threadIdx4 / size_per_head; - int id_in_head = threadIdx4 % size_per_head; - int word_id = m_full_idx % seq_len; - - const float deQFactor = qk_id == 0 ? __ldg(q_deQFactor_ptr) : __ldg(k_deQFactor_ptr); - const float output_scale = qk_id == 0 ? __ldg(q_output_scale_ptr) : __ldg(k_output_scale_ptr); - - int data_id = (((threadIdx4 >> 5) << 5)*valid_word_num + ((blockIdx.x%valid_word_num) << 5) + (threadIdx4&31)) >> 2; - - float scale; - float tmp; - char4 tmp4; - - tmp4 = __ldg(data_ptr+data_id); - - scale = static_cast(tmp4.x) * deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.x = float_to_int8_rn(tmp*output_scale); - - threadIdx4 = threadIdx4+1; - scale = static_cast(tmp4.y) * deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.y = float_to_int8_rn(tmp*output_scale); - - threadIdx4 = threadIdx4+1; - scale = static_cast(tmp4.z) * deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.z = float_to_int8_rn(tmp*output_scale); - - threadIdx4 = threadIdx4+1; - scale = static_cast(tmp4.w) * deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.w = float_to_int8_rn(tmp*output_scale); - - //row_id, col_id of sub-matrix (m = seq_len or seq_len_padded, n = size_per_head), column-major - int row_id = word_id; - int col_id = id_in_head; - //new (row, rol) of LtTrans COL32/COL4 sub-matrix, leading dim = (COL32_ * seq_len) or (COL32_ * seq_len_padded) - int new_col = col_id >> 5; - int new_row; - if (use_ORDER_COL32_2R_4R4) - { - int row_in_tile = row_id & 31; - int col_in_tile = col_id & 31; - new_row = (qk_id != 1) ? - //COL32 - ((row_id << 5) + (col_id&31)) - : - //COL32_2R_4R4 - ( - ((row_id >> 5) << 10) + - //(((row%8)/2*4+row/8)*2+row%2)*32+col - (((((((row_in_tile%8)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile - ) - ; - } - else - { - new_row = (qk_id != 1) ? - //COL32 - ((row_id << 5) + (col_id&31)) - : - //COL4 - ////row_id/8 is the number of tile of (8 rows 32 columns) -- column-major - ////row_id%2 is even row, otherwise odd row - ////col_id%COL32_/8 is the number tile of (8 rows 8 columns) - ( - ((((row_id >> 3) << 3) + ((row_id&1) << 2) + ((col_id%32) >> 3)) << 5) + - ////col_id%8 >= 4 is the right half of (8 rows 8 columns) tile - ////(row_id%8/2) is (the row id of alternating 4 rows) - 1 - (((((col_id&7) >= 4)?4:0) + ((row_id%8) >> 1)) << 2) + - ////col_id%4 is the id of 4 cols - (col_id&3) - ) - ; - } - - const int stride = (qk_id != 1) ? stride_q : stride_k; - const int len = (qk_id != 1) ? seq_len : seq_len_padded; - buf_ptr4[(((batch_id*head_num + head_id) * stride + (new_col << 5)*len + new_row) >> 2)] = tmp4; + const char4* data_ptr; + char4* buf_ptr4; + const T* bias_ptr; + int qk_id = blockIdx.x / valid_word_num; + + data_ptr = qk_id == 0 ? (const char4*)Q : (const char4*)K; + buf_ptr4 = qk_id == 0 ? (char4*)q_buf_ : (char4*)k_buf_; + bias_ptr = qk_id == 0 ? bias_Q : bias_K; + + int threadIdx4 = threadIdx.x << 2; + int m_full_idx = blockIdx.x % valid_word_num; + m_full_idx = (valid_word_num != m) ? (m_full_idx + __ldg(sequence_id_offset + m_full_idx)) : m_full_idx; + int batch_id = m_full_idx / seq_len; + int head_id = threadIdx4 / size_per_head; + int id_in_head = threadIdx4 % size_per_head; + int word_id = m_full_idx % seq_len; + + const float deQFactor = qk_id == 0 ? __ldg(q_deQFactor_ptr) : __ldg(k_deQFactor_ptr); + const float output_scale = qk_id == 0 ? __ldg(q_output_scale_ptr) : __ldg(k_output_scale_ptr); + + int data_id = + (((threadIdx4 >> 5) << 5) * valid_word_num + ((blockIdx.x % valid_word_num) << 5) + (threadIdx4 & 31)) >> 2; + + float scale; + float tmp; + char4 tmp4; + + tmp4 = __ldg(data_ptr + data_id); + + scale = static_cast(tmp4.x) * deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.x = float_to_int8_rn(tmp * output_scale); + + threadIdx4 = threadIdx4 + 1; + scale = static_cast(tmp4.y) * deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.y = float_to_int8_rn(tmp * output_scale); + + threadIdx4 = threadIdx4 + 1; + scale = static_cast(tmp4.z) * deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.z = float_to_int8_rn(tmp * output_scale); + + threadIdx4 = threadIdx4 + 1; + scale = static_cast(tmp4.w) * deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.w = float_to_int8_rn(tmp * output_scale); + + // row_id, col_id of sub-matrix (m = seq_len or seq_len_padded, n = size_per_head), column-major + int row_id = word_id; + int col_id = id_in_head; + // new (row, rol) of LtTrans COL32/COL4 sub-matrix, leading dim = (COL32_ * seq_len) or (COL32_ * seq_len_padded) + int new_col = col_id >> 5; + int new_row; + if (use_ORDER_COL32_2R_4R4) { + int row_in_tile = row_id & 31; + int col_in_tile = col_id & 31; + new_row = (qk_id != 1) ? + // COL32 + ((row_id << 5) + (col_id & 31)) : + // COL32_2R_4R4 + (((row_id >> 5) << 10) + + //(((row%8)/2*4+row/8)*2+row%2)*32+col + (((((((row_in_tile % 8) >> 1) << 2) + (row_in_tile >> 3)) << 1) + (row_in_tile & 1)) << 5) + + col_in_tile); + } + else { + new_row = (qk_id != 1) ? + // COL32 + ((row_id << 5) + (col_id & 31)) : + // COL4 + ////row_id/8 is the number of tile of (8 rows 32 columns) -- column-major + ////row_id%2 is even row, otherwise odd row + ////col_id%COL32_/8 is the number tile of (8 rows 8 columns) + (((((row_id >> 3) << 3) + ((row_id & 1) << 2) + ((col_id % 32) >> 3)) << 5) + + ////col_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(row_id%8/2) is (the row id of alternating 4 rows) - 1 + (((((col_id & 7) >= 4) ? 4 : 0) + ((row_id % 8) >> 1)) << 2) + + ////col_id%4 is the id of 4 cols + (col_id & 3)); + } + + const int stride = (qk_id != 1) ? stride_q : stride_k; + const int len = (qk_id != 1) ? seq_len : seq_len_padded; + buf_ptr4[(((batch_id * head_num + head_id) * stride + (new_col << 5) * len + new_row) >> 2)] = tmp4; } -template -void invokeAddQKBiasTransformRebuildPadding(int8_t *q_buf, int8_t *k_buf, const int8_t* Q, const T* bias_Q, - const int8_t* K, const T* bias_K, const int* sequence_id_offset, - const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float *q_deQFactor_ptr, const float *k_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream) +template +void invokeAddQKBiasTransformRebuildPadding(int8_t* q_buf, + int8_t* k_buf, + const int8_t* Q, + const T* bias_Q, + const int8_t* K, + const T* bias_K, + const int* sequence_id_offset, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_deQFactor_ptr, + const float* k_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream) { - int seq_len_padded = (seq_len + 31)/32*32; - add_QK_bias_transform_rebuild_padding_varlen<<>>( - q_buf, k_buf, Q, bias_Q, K, bias_K, - sequence_id_offset, valid_word_num, - batch_size * seq_len, batch_size, - seq_len, seq_len_padded, head_num, size_per_head, - seq_len*size_per_head, seq_len_padded*size_per_head, - q_deQFactor_ptr, k_deQFactor_ptr, - q_output_scale_ptr, k_output_scale_ptr, - use_ORDER_COL32_2R_4R4); + int seq_len_padded = (seq_len + 31) / 32 * 32; + add_QK_bias_transform_rebuild_padding_varlen<<>>(q_buf, + k_buf, + Q, + bias_Q, + K, + bias_K, + sequence_id_offset, + valid_word_num, + batch_size * seq_len, + batch_size, + seq_len, + seq_len_padded, + head_num, + size_per_head, + seq_len * size_per_head, + seq_len_padded * size_per_head, + q_deQFactor_ptr, + k_deQFactor_ptr, + q_output_scale_ptr, + k_output_scale_ptr, + use_ORDER_COL32_2R_4R4); } -template -void invokeAddQKBiasTransformRebuildPadding(int8_t *q_buf, int8_t *k_buf, - const int8_t* Q, const float* bias_Q, - const int8_t* K, const float* bias_K, - const int* sequence_id_offset, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float *q_deQFactor_ptr, const float *k_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddQKBiasTransformRebuildPadding(int8_t *q_buf, int8_t *k_buf, - const int8_t* Q, const half* bias_Q, - const int8_t* K, const half* bias_K, - const int* sequence_id_offset, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float *q_deQFactor_ptr, const float *k_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -//add_QK_bias_transform & rebuild padding for batch int8 cublasLtMatmul & per tensor quantization for weight -//1.add QK bias -//2.transform each Q K row-major matrixes into a series of sub-matrix (with CUBLASLT_ORDER_COL32/CUBLASLT_ORDER_COL4_4R2_8C layout) +template void invokeAddQKBiasTransformRebuildPadding(int8_t* q_buf, + int8_t* k_buf, + const int8_t* Q, + const float* bias_Q, + const int8_t* K, + const float* bias_K, + const int* sequence_id_offset, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_deQFactor_ptr, + const float* k_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template void invokeAddQKBiasTransformRebuildPadding(int8_t* q_buf, + int8_t* k_buf, + const int8_t* Q, + const half* bias_Q, + const int8_t* K, + const half* bias_K, + const int* sequence_id_offset, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_deQFactor_ptr, + const float* k_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +// add_QK_bias_transform & rebuild padding for batch int8 cublasLtMatmul & per tensor quantization for weight +// 1.add QK bias +// 2.transform each Q K row-major matrixes into a series of sub-matrix (with +// CUBLASLT_ORDER_COL32/CUBLASLT_ORDER_COL4_4R2_8C layout) // Q, K are CUBLASLT_ORDER_COL32 matrixes of m = valid_word_num, n = head_num * size_per_head // q_buf_ is of batchCount = batch_size * head_num, m = seq_len, n = size_per_head, CUBLASLT_ORDER_COL32 // seq_len_padded = (seq_len + 31)/32*32; -// k_buf_ is of batchCount = batch_size * head_num, m = seq_len_padded, n = size_per_head, CUBLASLT_ORDER_COL4_4R2_8C or CUBLASLT_ORDER_COL32_2R_4R4 -//only for int8 IO -//seq_len, size_per_head must be a multiple of 32 -//grid.x = valid_word_num * 2; -//block.x = head_num * size_per_head / 4; -//using char4 -template -__global__ -void add_QK_bias_transform_rebuild_padding_varlen_row(int8_t *q_buf_, int8_t *k_buf_, const int8_t* Q, const T* bias_Q, - const int8_t* K, const T* bias_K, const int* sequence_id_offset, - const int valid_word_num, const int m, const int batch_size, - const int seq_len, const int seq_len_padded, const int head_num, - const int size_per_head, int stride_q, int stride_k, - const float *q_deQFactor_ptr, const float *k_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, const int head_num_x_size_per_head) +// k_buf_ is of batchCount = batch_size * head_num, m = seq_len_padded, n = size_per_head, CUBLASLT_ORDER_COL4_4R2_8C +// or CUBLASLT_ORDER_COL32_2R_4R4 +// only for int8 IO +// seq_len, size_per_head must be a multiple of 32 +// grid.x = valid_word_num * 2; +// block.x = head_num * size_per_head / 4; +// using char4 +template +__global__ void add_QK_bias_transform_rebuild_padding_varlen_row(int8_t* q_buf_, + int8_t* k_buf_, + const int8_t* Q, + const T* bias_Q, + const int8_t* K, + const T* bias_K, + const int* sequence_id_offset, + const int valid_word_num, + const int m, + const int batch_size, + const int seq_len, + const int seq_len_padded, + const int head_num, + const int size_per_head, + int stride_q, + int stride_k, + const float* q_deQFactor_ptr, + const float* k_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + const int head_num_x_size_per_head) { - const char4* data_ptr; - char4* buf_ptr4; - const T* bias_ptr; - int qk_id = blockIdx.x / valid_word_num; - - data_ptr = qk_id == 0 ? (const char4*)Q : (const char4*)K; - buf_ptr4 = qk_id == 0 ? (char4*)q_buf_ : (char4*)k_buf_; - bias_ptr = qk_id == 0 ? bias_Q : bias_K; - - int threadIdx4 = threadIdx.x << 2; - int batch_seq_id = blockIdx.x % valid_word_num; - int m_full_idx = (valid_word_num != m) ? (batch_seq_id + __ldg(sequence_id_offset+batch_seq_id)) : batch_seq_id; - int batch_id = m_full_idx / seq_len; - int head_id = threadIdx4 / size_per_head; - int id_in_head = threadIdx4 % size_per_head; - int word_id = m_full_idx % seq_len; - - const float deQFactor = qk_id == 0 ? __ldg(q_deQFactor_ptr) : __ldg(k_deQFactor_ptr); - const float output_scale = qk_id == 0 ? __ldg(q_output_scale_ptr) : __ldg(k_output_scale_ptr); - - int data_id = (batch_seq_id * head_num_x_size_per_head + threadIdx4) >> 2; - - float scale; - float tmp; - char4 tmp4; - - tmp4 = __ldg(data_ptr+data_id); - - scale = static_cast(tmp4.x) * deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.x = float_to_int8_rn(tmp*output_scale); - - threadIdx4 = threadIdx4+1; - scale = static_cast(tmp4.y) * deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.y = float_to_int8_rn(tmp*output_scale); - - threadIdx4 = threadIdx4+1; - scale = static_cast(tmp4.z) * deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.z = float_to_int8_rn(tmp*output_scale); - - threadIdx4 = threadIdx4+1; - scale = static_cast(tmp4.w) * deQFactor; - tmp = static_cast(__ldg(bias_ptr+threadIdx4)) + scale; - tmp4.w = float_to_int8_rn(tmp*output_scale); - - //row_id, col_id of sub-matrix (m = seq_len or seq_len_padded, n = size_per_head), column-major - int row_id = word_id; - int col_id = id_in_head; - //new (row, rol) of LtTrans COL32/COL4 sub-matrix, leading dim = (COL32_ * seq_len) or (COL32_ * seq_len_padded) - int new_col = col_id >> 5; - int new_row; - if (use_ORDER_COL32_2R_4R4) - { - int row_in_tile = row_id & 31; - int col_in_tile = col_id & 31; - new_row = (qk_id != 1) ? - //COL32 - ((row_id << 5) + (col_id&31)) - : - //COL32_2R_4R4 - ( - ((row_id >> 5) << 10) + - //(((row%8)/2*4+row/8)*2+row%2)*32+col - (((((((row_in_tile%8)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile - ) - ; - } - else - { - new_row = (qk_id != 1) ? - //COL32 - ((row_id << 5) + (col_id&31)) - : - //COL4 - ////row_id/8 is the number of tile of (8 rows 32 columns) -- column-major - ////row_id%2 is even row, otherwise odd row - ////col_id%COL32_/8 is the number tile of (8 rows 8 columns) - ( - ((((row_id >> 3) << 3) + ((row_id&1) << 2) + ((col_id%32) >> 3)) << 5) + - ////col_id%8 >= 4 is the right half of (8 rows 8 columns) tile - ////(row_id%8/2) is (the row id of alternating 4 rows) - 1 - (((((col_id&7) >= 4)?4:0) + ((row_id%8) >> 1)) << 2) + - ////col_id%4 is the id of 4 cols - (col_id&3) - ) - ; - } - - const int stride = (qk_id != 1) ? stride_q : stride_k; - const int len = (qk_id != 1) ? seq_len : seq_len_padded; - buf_ptr4[(((batch_id*head_num + head_id) * stride + (new_col << 5)*len + new_row) >> 2)] = tmp4; -} + const char4* data_ptr; + char4* buf_ptr4; + const T* bias_ptr; + int qk_id = blockIdx.x / valid_word_num; -template -void invokeAddQKBiasTransformRebuildPaddingRow(int8_t *q_buf, int8_t *k_buf, const int8_t* Q, const T* bias_Q, - const int8_t* K, const T* bias_K, const int* sequence_id_offset, - const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float *q_deQFactor_ptr, const float *k_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream) -{ - int seq_len_padded = (seq_len + 31)/32*32; - add_QK_bias_transform_rebuild_padding_varlen_row<<>>( - q_buf, k_buf, Q, bias_Q, K, bias_K, - sequence_id_offset, valid_word_num, - batch_size * seq_len, batch_size, - seq_len, seq_len_padded, head_num, size_per_head, - seq_len*size_per_head, seq_len_padded*size_per_head, - q_deQFactor_ptr, k_deQFactor_ptr, - q_output_scale_ptr, k_output_scale_ptr, - use_ORDER_COL32_2R_4R4, head_num*size_per_head); -} + data_ptr = qk_id == 0 ? (const char4*)Q : (const char4*)K; + buf_ptr4 = qk_id == 0 ? (char4*)q_buf_ : (char4*)k_buf_; + bias_ptr = qk_id == 0 ? bias_Q : bias_K; -template -void invokeAddQKBiasTransformRebuildPaddingRow(int8_t *q_buf, int8_t *k_buf, - const int8_t* Q, const float* bias_Q, - const int8_t* K, const float* bias_K, - const int* sequence_id_offset, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float *q_deQFactor_ptr, const float *k_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddQKBiasTransformRebuildPaddingRow(int8_t *q_buf, int8_t *k_buf, - const int8_t* Q, const half* bias_Q, - const int8_t* K, const half* bias_K, - const int* sequence_id_offset, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float *q_deQFactor_ptr, const float *k_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -//input matrix a matrix of m = batch_size*seq_len , n = head_num*size_per_head, CUBLASLT_ORDER_COL32 -//output matrixes are a series of sub-matrixes with size of m = size_per_head, n = seq_len , CUBLASLT_ORDER_COL4_4R2_8C or CUBLASLT_ORDER_COL32_2R_4R4 -//only for int32_t Input int8_t Output -//seq_len, size_per_head must be a multiple of 32 -//grid = (size_per_head/32, seq_len/32, batch_size*head_num) -//block = (8, 32); -//using char4 -//per axis quantization for weight -template -__global__ -void add_V_bias_transform(int8_t *v_buf_, const int32_t *V, const T *V_bias, const int batch_size, const int seq_len, - const int head_num, const int size_per_head, int stride, const float* weight_amax, - const float *input_deQFactor_div127_ptr, const float *out_scale_ptr, bool use_ORDER_COL32_2R_4R4) -{ - const float input_deQFactor_div127 = __ldg(input_deQFactor_div127_ptr); - const float out_scale = __ldg(out_scale_ptr); - __shared__ int8_t shm[32][33]; - const int32_t* data_ptr = V; - char4* buf_ptr4 = (char4*) v_buf_; - const T* bias_ptr = V_bias; - - int threadIdx4 = threadIdx.x << 2; - - //for src of (seq_len, size_per_head) - int batch_id = blockIdx.z/head_num; - int head_id = blockIdx.z%head_num; - int word_id = (blockIdx.y << 5) + threadIdx.y; - int id_in_size = (blockIdx.x << 5) + threadIdx4; - - //for V layout (batch_size*seq_len, head_num*size_per_head) - int col = head_id*size_per_head + id_in_size; - int row = batch_id*seq_len + word_id; - int inIdx = (((col >> 5) << 5)*batch_size*seq_len + ((row << 5) + (col&31))); - //for shm row-major - int sh_col = threadIdx4; - int sh_row = threadIdx.y; - - float tmp; - float scale; - - //const half2* bias_ptr2 = (const half2*)bias_ptr; - //half2 tmp2; - - //tmp2 = __ldg(&bias_ptr2[col >> 1]); - - scale = __ldg(data_ptr + inIdx) * __ldg(weight_amax + col) * input_deQFactor_div127; - tmp = scale + static_cast(__ldg(bias_ptr + col));//(tmp2.x); - shm[sh_row][sh_col] = float_to_int8_rn(tmp*out_scale); - - scale = __ldg(data_ptr + inIdx + 1) * __ldg(weight_amax + col + 1) * input_deQFactor_div127; - tmp = scale + static_cast(__ldg(bias_ptr+col+1));//(tmp2.y); - shm[sh_row][sh_col+1] = float_to_int8_rn(tmp*out_scale); - - //tmp2 = __ldg(&bias_ptr2[(col >> 1) + 1]); - - scale = __ldg(data_ptr+inIdx+2) * __ldg(weight_amax+col+2) * input_deQFactor_div127; - tmp = scale + static_cast(__ldg(bias_ptr+col+2));//(tmp2.x); - shm[sh_row][sh_col+2] = float_to_int8_rn(tmp*out_scale); - - scale = __ldg(data_ptr+inIdx + 3) * __ldg(weight_amax+col+3) * input_deQFactor_div127; - tmp = scale + static_cast(__ldg(bias_ptr+col+3));//(tmp2.y); - shm[sh_row][sh_col+3] = float_to_int8_rn(tmp*out_scale); - - __syncthreads(); - - //for dst of (size_per_head, seq_len) - word_id = (blockIdx.y << 5) + threadIdx4; - id_in_size = (blockIdx.x << 5) + threadIdx.y; - col = (word_id >> 5); - - if (use_ORDER_COL32_2R_4R4) - { - int row_in_tile = id_in_size & 31; - int col_in_tile = word_id & 31; - row = ( - //COL32_2R_4R4 - ((id_in_size >> 5) << 10) + - //(((row%8)/2*4+row/8)*2+row%2)*32+col - (((((((row_in_tile%8)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile - ); - } - else - { - row = ( - //COL4 - ////id_in_size/8 is the number of tile of (8 rows 32 columns) -- column-major - ////id_in_size%2 is even row, otherwise odd row - ////word_id%COL32_/8 is the number tile of (8 rows 8 columns) - ((((id_in_size >> 3) << 3) + ((id_in_size&1) << 2) + ((word_id%32) >> 3)) << 5) + - ////word_id%8 >= 4 is the right half of (8 rows 8 columns) tile - ////(id_in_size%8/2) is (the row id of alternating 4 rows) - 1 - (((((word_id&7) >= 4)?4:0) + ((id_in_size%8) >> 1)) << 2) + - ////word_id%4 is the id of 4 cols - (word_id&3) - ); - } - - - char4 dataTmp; - dataTmp.x = shm[sh_col][sh_row]; - dataTmp.y = shm[sh_col+1][sh_row]; - dataTmp.z = shm[sh_col+2][sh_row]; - dataTmp.w = shm[sh_col+3][sh_row]; - buf_ptr4[(blockIdx.z*stride + (col << 5)*size_per_head + row) >> 2] = dataTmp; -} + int threadIdx4 = threadIdx.x << 2; + int batch_seq_id = blockIdx.x % valid_word_num; + int m_full_idx = (valid_word_num != m) ? (batch_seq_id + __ldg(sequence_id_offset + batch_seq_id)) : batch_seq_id; + int batch_id = m_full_idx / seq_len; + int head_id = threadIdx4 / size_per_head; + int id_in_head = threadIdx4 % size_per_head; + int word_id = m_full_idx % seq_len; -template <> -__global__ -void add_V_bias_transform(int8_t *v_buf_, const int32_t *V, const half *V_bias, const int batch_size, const int seq_len, - const int head_num, const int size_per_head, int stride, const float* weight_amax, - const float *input_deQFactor_div127_ptr, const float *out_scale_ptr, bool use_ORDER_COL32_2R_4R4) -{ - const float input_deQFactor_div127 = __ldg(input_deQFactor_div127_ptr); - const float out_scale = __ldg(out_scale_ptr); - __shared__ int8_t shm[32][33]; - const int32_t* data_ptr = V; - char4* buf_ptr4 = (char4*) v_buf_; - - int threadIdx4 = threadIdx.x << 2; - - //for src of (seq_len, size_per_head) - int batch_id = blockIdx.z/head_num; - int head_id = blockIdx.z%head_num; - - int blockIdy32 = (blockIdx.y << 5); - int blockIdx32 = (blockIdx.x << 5); - int word_id = blockIdy32 + threadIdx.y; - int id_in_size = blockIdx32 + threadIdx4; - - //for V layout (batch_size*seq_len, head_num*size_per_head) - int col = head_id*size_per_head + id_in_size; - int row = batch_id*seq_len + word_id; - int inIdx = ((col & 0xffffffe0)*batch_size*seq_len + ((row << 5) + (col&31))); - //for shm row-major - int sh_col = threadIdx4; - int sh_row = threadIdx.y; - - int col_2 = col >> 1; - float scale; - - const half2* bias_ptr2 = (const half2*)V_bias; - half2 tmp2; - - tmp2 = __ldg(bias_ptr2+col_2); - - scale = __ldg(data_ptr+inIdx) * __ldg(weight_amax+col) * input_deQFactor_div127; - scale = scale + static_cast(tmp2.x); - shm[sh_row][sh_col] = float_to_int8_rn(scale*out_scale); - - scale = __ldg(data_ptr+inIdx+1) * __ldg(weight_amax+col+1) * input_deQFactor_div127; - scale = scale + static_cast(tmp2.y); - shm[sh_row][sh_col+1] = float_to_int8_rn(scale*out_scale); - - tmp2 = __ldg(bias_ptr2 + col_2 + 1); - - scale = __ldg(data_ptr + inIdx + 2) * __ldg(weight_amax + col + 2) * input_deQFactor_div127; - scale = scale + static_cast(tmp2.x); - shm[sh_row][sh_col+2] = float_to_int8_rn(scale*out_scale); - - scale = __ldg(data_ptr + inIdx + 3) * __ldg(weight_amax + col + 3) * input_deQFactor_div127; - scale = scale + static_cast(tmp2.y); - shm[sh_row][sh_col+3] = float_to_int8_rn(scale*out_scale); - - __syncthreads(); - - //for dst of (size_per_head, seq_len) - word_id = blockIdy32 + threadIdx4; - id_in_size = blockIdx32 + threadIdx.y; - col = (word_id >> 5); - - if (use_ORDER_COL32_2R_4R4) - { - int row_in_tile = id_in_size & 31; - int col_in_tile = word_id & 31; - row = ( - //COL32_2R_4R4 - ((id_in_size >> 5) << 10) + - //(((row%8)/2*4+row/8)*2+row%2)*32+col - (((((((row_in_tile%8)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile - ); - } - else - { - row = ( - //COL4 - ////id_in_size/8 is the number of tile of (8 rows 32 columns) -- column-major - ////id_in_size%2 is even row, otherwise odd row - ////word_id%COL32_/8 is the number tile of (8 rows 8 columns) - (((id_in_size & 0xfffffff8) + ((id_in_size&1) << 2) + ((word_id%32) >> 3)) << 5) + - ////word_id%8 >= 4 is the right half of (8 rows 8 columns) tile - ////(id_in_size%8/2) is (the row id of alternating 4 rows) - 1 - (((((word_id&7) >= 4)?4:0) + ((id_in_size%8) >> 1)) << 2) + - ////word_id%4 is the id of 4 cols - (word_id&3) - ); - } - - char4 dataTmp; - dataTmp.x = shm[sh_col][sh_row]; - dataTmp.y = shm[sh_col+1][sh_row]; - dataTmp.z = shm[sh_col+2][sh_row]; - dataTmp.w = shm[sh_col+3][sh_row]; - buf_ptr4[(blockIdx.z*stride + (col << 5)*size_per_head + row) >> 2] = dataTmp; -} + const float deQFactor = qk_id == 0 ? __ldg(q_deQFactor_ptr) : __ldg(k_deQFactor_ptr); + const float output_scale = qk_id == 0 ? __ldg(q_output_scale_ptr) : __ldg(k_output_scale_ptr); -template -void invokeAddVBiasTransform(int8_t *v_buf, const int32_t *V, const T *V_bias, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float* weight_amax, - const float *input_deQFactor_div127_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream) -{ - add_V_bias_transform<<>>(v_buf, V, V_bias, batch_size, seq_len, head_num, size_per_head, seq_len*size_per_head, weight_amax, input_deQFactor_div127_ptr, out_scale_ptr, use_ORDER_COL32_2R_4R4); -} + int data_id = (batch_seq_id * head_num_x_size_per_head + threadIdx4) >> 2; -template -void invokeAddVBiasTransform(int8_t *v_buf, const int32_t *V, const float *V_bias, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float* weight_amax, - const float *input_deQFactor_div127_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddVBiasTransform(int8_t *v_buf, const int32_t *V, const half *V_bias, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float* weight_amax, - const float *input_deQFactor_div127_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -//input matrix a matrix of m = batch_size*seq_len , n = head_num*size_per_head, CUBLASLT_ORDER_COL32 -//seq_len_padded = (seq_len+31)/32*32 -//output matrixes are a series of sub-matrixes with size of m = size_per_head, n = seq_len_padded , CUBLASLT_ORDER_COL4_4R2_8C or CUBLASLT_ORDER_COL32_2R_4R4 -//only for int8_t IO -//size_per_head must be a multiple of 32 -//grid = (size_per_head/32, seq_len_padded/32, batch_size*head_num) -//block = (8, 32); -//using char4 -//per tensor quantization for weight -template -__global__ -void add_V_bias_transform_varlen(int8_t *v_buf_, const int8_t *V, const T *V_bias, const int batch_size, const int seq_len, - const int head_num, const int size_per_head, const int seq_len_padded, int stride, - const float *input_deQFactor_ptr, const float *out_scale_ptr, bool use_ORDER_COL32_2R_4R4) -{ - const float input_deQFactor = __ldg(input_deQFactor_ptr); - const float out_scale = __ldg(out_scale_ptr); - __shared__ int8_t shm[32][33]; - const char4* data_ptr = (const char4*)V; - char4* buf_ptr4 = (char4*) v_buf_; - const T* bias_ptr = V_bias; - - int threadIdx4 = threadIdx.x << 2; - - //for src of (seq_len, size_per_head) - int batch_id = blockIdx.z/head_num; - int head_id = blockIdx.z%head_num; - int word_id = (blockIdx.y << 5) + threadIdx.y; - int id_in_size = (blockIdx.x << 5) + threadIdx4; - - int col, row; - //for shm row-major - int sh_col = threadIdx4; - int sh_row = threadIdx.y; - char4 dataTmp; - if (word_id < seq_len) - { - //for V layout (batch_size*seq_len, head_num*size_per_head) - col = head_id*size_per_head + id_in_size; - row = batch_id*seq_len + word_id; - int inIdx = (((col >> 5) << 5)*batch_size*seq_len + ((row << 5) + (col&31))) >> 2; - - float tmp; float scale; - - dataTmp = __ldg(data_ptr + inIdx); - - scale = dataTmp.x * input_deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr + col));//(tmp2.x); - shm[sh_row][sh_col] = float_to_int8_rn(tmp*out_scale); - - scale = dataTmp.y * input_deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr+col+1));//(tmp2.y); - shm[sh_row][sh_col+1] = float_to_int8_rn(tmp*out_scale); - - scale = dataTmp.z * input_deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr+col+2));//(tmp2.x); - shm[sh_row][sh_col+2] = float_to_int8_rn(tmp*out_scale); - - scale = dataTmp.w * input_deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr+col+3));//(tmp2.y); - shm[sh_row][sh_col+3] = float_to_int8_rn(tmp*out_scale); - } - else - { - shm[sh_row][sh_col] = shm[sh_row][sh_col+1] = shm[sh_row][sh_col+2] = shm[sh_row][sh_col+3] = 0; - } - - __syncthreads(); - - //for dst of (size_per_head, seq_len_padded) - word_id = (blockIdx.y << 5) + threadIdx4; - id_in_size = (blockIdx.x << 5) + threadIdx.y; - col = (word_id >> 5); - - if (use_ORDER_COL32_2R_4R4) - { - int row_in_tile = id_in_size & 31; - int col_in_tile = word_id & 31; - row = ( - //COL32_2R_4R4 - ((id_in_size >> 5) << 10) + - //(((row%8)/2*4+row/8)*2+row%2)*32+col - (((((((row_in_tile%8)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile - ); - } - else - { - row = ( - //COL4 - ////id_in_size/8 is the number of tile of (8 rows 32 columns) -- column-major - ////id_in_size%2 is even row, otherwise odd row - ////word_id%COL32_/8 is the number tile of (8 rows 8 columns) - ((((id_in_size >> 3) << 3) + ((id_in_size&1) << 2) + ((word_id%32) >> 3)) << 5) + - ////word_id%8 >= 4 is the right half of (8 rows 8 columns) tile - ////(id_in_size%8/2) is (the row id of alternating 4 rows) - 1 - (((((word_id&7) >= 4)?4:0) + ((id_in_size%8) >> 1)) << 2) + - ////word_id%4 is the id of 4 cols - (word_id&3) - ); - } - - dataTmp.x = shm[sh_col][sh_row]; - dataTmp.y = shm[sh_col+1][sh_row]; - dataTmp.z = shm[sh_col+2][sh_row]; - dataTmp.w = shm[sh_col+3][sh_row]; - buf_ptr4[(blockIdx.z*stride + (col << 5)*size_per_head + row) >> 2] = dataTmp; + float tmp; + char4 tmp4; + + tmp4 = __ldg(data_ptr + data_id); + + scale = static_cast(tmp4.x) * deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.x = float_to_int8_rn(tmp * output_scale); + + threadIdx4 = threadIdx4 + 1; + scale = static_cast(tmp4.y) * deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.y = float_to_int8_rn(tmp * output_scale); + + threadIdx4 = threadIdx4 + 1; + scale = static_cast(tmp4.z) * deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.z = float_to_int8_rn(tmp * output_scale); + + threadIdx4 = threadIdx4 + 1; + scale = static_cast(tmp4.w) * deQFactor; + tmp = static_cast(__ldg(bias_ptr + threadIdx4)) + scale; + tmp4.w = float_to_int8_rn(tmp * output_scale); + + // row_id, col_id of sub-matrix (m = seq_len or seq_len_padded, n = size_per_head), column-major + int row_id = word_id; + int col_id = id_in_head; + // new (row, rol) of LtTrans COL32/COL4 sub-matrix, leading dim = (COL32_ * seq_len) or (COL32_ * seq_len_padded) + int new_col = col_id >> 5; + int new_row; + if (use_ORDER_COL32_2R_4R4) { + int row_in_tile = row_id & 31; + int col_in_tile = col_id & 31; + new_row = (qk_id != 1) ? + // COL32 + ((row_id << 5) + (col_id & 31)) : + // COL32_2R_4R4 + (((row_id >> 5) << 10) + + //(((row%8)/2*4+row/8)*2+row%2)*32+col + (((((((row_in_tile % 8) >> 1) << 2) + (row_in_tile >> 3)) << 1) + (row_in_tile & 1)) << 5) + + col_in_tile); + } + else { + new_row = (qk_id != 1) ? + // COL32 + ((row_id << 5) + (col_id & 31)) : + // COL4 + ////row_id/8 is the number of tile of (8 rows 32 columns) -- column-major + ////row_id%2 is even row, otherwise odd row + ////col_id%COL32_/8 is the number tile of (8 rows 8 columns) + (((((row_id >> 3) << 3) + ((row_id & 1) << 2) + ((col_id % 32) >> 3)) << 5) + + ////col_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(row_id%8/2) is (the row id of alternating 4 rows) - 1 + (((((col_id & 7) >= 4) ? 4 : 0) + ((row_id % 8) >> 1)) << 2) + + ////col_id%4 is the id of 4 cols + (col_id & 3)); + } + + const int stride = (qk_id != 1) ? stride_q : stride_k; + const int len = (qk_id != 1) ? seq_len : seq_len_padded; + buf_ptr4[(((batch_id * head_num + head_id) * stride + (new_col << 5) * len + new_row) >> 2)] = tmp4; } -template -void invokeAddVBiasTransform(int8_t *v_buf, const int8_t *V, const T *V_bias, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float *input_deQFactor_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream) -{ - assert(size_per_head % 32 == 0); - if (seq_len % 32 == 0) - { - add_V_bias_transform_varlen<<>>( - v_buf, V, V_bias, - batch_size, seq_len, head_num, size_per_head, - seq_len, seq_len*size_per_head, - input_deQFactor_ptr, out_scale_ptr, use_ORDER_COL32_2R_4R4); - } - else - { - const int seq_len_padded = (seq_len + 31)/32*32; - add_V_bias_transform_varlen<<>>( - v_buf, V, V_bias, - batch_size, seq_len, head_num, size_per_head, - seq_len_padded, seq_len_padded*size_per_head, - input_deQFactor_ptr, out_scale_ptr, use_ORDER_COL32_2R_4R4); - } -} - -template -void invokeAddVBiasTransform(int8_t *v_buf, const int8_t *V, const float *V_bias, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float *input_deQFactor_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddVBiasTransform(int8_t *v_buf, const int8_t *V, const half *V_bias, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float *input_deQFactor_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); -//input matrix a matrix of m = batch_size*seq_len , n = head_num*size_per_head, row major -//seq_len_padded = (seq_len+31)/32*32 -//output matrixes are a series of sub-matrixes with size of m = size_per_head, n = seq_len_padded , CUBLASLT_ORDER_COL4_4R2_8C or CUBLASLT_ORDER_COL32_2R_4R4 -//only for int8_t IO -//size_per_head must be a multiple of 32 -//grid = (size_per_head/32, seq_len_padded/32, batch_size*head_num) -//block = (8, 32); -//using char4 -//per tensor quantization for weight -template -__global__ -void add_V_bias_transform_varlen_row(int8_t *v_buf_, const int8_t *V, const T *V_bias, const int batch_size, const int seq_len, - const int head_num, const int size_per_head, const int seq_len_padded, int stride, - const float *input_deQFactor_ptr, const float *out_scale_ptr, bool use_ORDER_COL32_2R_4R4, const int head_num_x_size_per_head) +template +void invokeAddQKBiasTransformRebuildPaddingRow(int8_t* q_buf, + int8_t* k_buf, + const int8_t* Q, + const T* bias_Q, + const int8_t* K, + const T* bias_K, + const int* sequence_id_offset, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_deQFactor_ptr, + const float* k_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream) { - const float input_deQFactor = __ldg(input_deQFactor_ptr); - const float out_scale = __ldg(out_scale_ptr); - __shared__ int8_t shm[32][33]; - const char4* data_ptr = (const char4*)V; - char4* buf_ptr4 = (char4*) v_buf_; - const T* bias_ptr = V_bias; - - int threadIdx4 = threadIdx.x << 2; - - //for src of (seq_len, size_per_head) - int batch_id = blockIdx.z/head_num; - int head_id = blockIdx.z%head_num; - int word_id = (blockIdx.y << 5) + threadIdx.y; - int id_in_size = (blockIdx.x << 5) + threadIdx4; - - int col, row; - //for shm row-major - int sh_col = threadIdx4; - int sh_row = threadIdx.y; - char4 dataTmp; - if (word_id < seq_len) - { - //for V layout (batch_size*seq_len, head_num*size_per_head) - col = head_id*size_per_head + id_in_size; - row = batch_id*seq_len + word_id; - int inIdx = (row * head_num_x_size_per_head + col) >> 2; - - float tmp; - float scale; - - dataTmp = __ldg(data_ptr + inIdx); - - scale = dataTmp.x * input_deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr + col));//(tmp2.x); - shm[sh_row][sh_col] = float_to_int8_rn(tmp*out_scale); - - scale = dataTmp.y * input_deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr+col+1));//(tmp2.y); - shm[sh_row][sh_col+1] = float_to_int8_rn(tmp*out_scale); - - scale = dataTmp.z * input_deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr+col+2));//(tmp2.x); - shm[sh_row][sh_col+2] = float_to_int8_rn(tmp*out_scale); - - scale = dataTmp.w * input_deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr+col+3));//(tmp2.y); - shm[sh_row][sh_col+3] = float_to_int8_rn(tmp*out_scale); - } - else - { - shm[sh_row][sh_col] = shm[sh_row][sh_col+1] = shm[sh_row][sh_col+2] = shm[sh_row][sh_col+3] = 0; - } - - __syncthreads(); - - //for dst of (size_per_head, seq_len_padded) - word_id = (blockIdx.y << 5) + threadIdx4; - id_in_size = (blockIdx.x << 5) + threadIdx.y; - col = (word_id >> 5); - - if (use_ORDER_COL32_2R_4R4) - { - int row_in_tile = id_in_size & 31; - int col_in_tile = word_id & 31; - row = ( - //COL32_2R_4R4 - ((id_in_size >> 5) << 10) + - (((((((row_in_tile%8)/2)*4)+(row_in_tile/8))*2)+(row_in_tile%2))*32)+col_in_tile - // (((((((row_in_tile%8)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile - ); - } - else - { - row = ( - //COL4 - ////id_in_size/8 is the number of tile of (8 rows 32 columns) -- column-major - ////id_in_size%2 is even row, otherwise odd row - ////word_id%COL32_/8 is the number tile of (8 rows 8 columns) - ((((id_in_size >> 3) << 3) + ((id_in_size&1) << 2) + ((word_id%32) >> 3)) << 5) + - ////word_id%8 >= 4 is the right half of (8 rows 8 columns) tile - ////(id_in_size%8/2) is (the row id of alternating 4 rows) - 1 - (((((word_id&7) >= 4)?4:0) + ((id_in_size%8) >> 1)) << 2) + - ////word_id%4 is the id of 4 cols - (word_id&3) - ); - } - - dataTmp.x = shm[sh_col][sh_row]; - dataTmp.y = shm[sh_col+1][sh_row]; - dataTmp.z = shm[sh_col+2][sh_row]; - dataTmp.w = shm[sh_col+3][sh_row]; - buf_ptr4[(blockIdx.z*stride + (col << 5)*size_per_head + row) >> 2] = dataTmp; + int seq_len_padded = (seq_len + 31) / 32 * 32; + add_QK_bias_transform_rebuild_padding_varlen_row<<>>(q_buf, + k_buf, + Q, + bias_Q, + K, + bias_K, + sequence_id_offset, + valid_word_num, + batch_size * seq_len, + batch_size, + seq_len, + seq_len_padded, + head_num, + size_per_head, + seq_len * size_per_head, + seq_len_padded * size_per_head, + q_deQFactor_ptr, + k_deQFactor_ptr, + q_output_scale_ptr, + k_output_scale_ptr, + use_ORDER_COL32_2R_4R4, + head_num * size_per_head); } -template -void invokeAddVBiasTransformRow(int8_t *v_buf, const int8_t *V, const T *V_bias, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float *input_deQFactor_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream) -{ - assert(size_per_head % 32 == 0); - if (seq_len % 32 == 0) - { - add_V_bias_transform_varlen_row<<>>( - v_buf, V, V_bias, - batch_size, seq_len, head_num, size_per_head, - seq_len, seq_len*size_per_head, - input_deQFactor_ptr, out_scale_ptr, use_ORDER_COL32_2R_4R4, head_num*size_per_head); - } - else - { - const int seq_len_padded = (seq_len + 31)/32*32; - add_V_bias_transform_varlen_row<<>>( - v_buf, V, V_bias, - batch_size, seq_len, head_num, size_per_head, - seq_len_padded, seq_len_padded*size_per_head, - input_deQFactor_ptr, out_scale_ptr, use_ORDER_COL32_2R_4R4, head_num*size_per_head); - } -} - -template -void invokeAddVBiasTransformRow(int8_t *v_buf, const int8_t *V, const float *V_bias, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float *input_deQFactor_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddVBiasTransformRow(int8_t *v_buf, const int8_t *V, const half *V_bias, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float *input_deQFactor_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - - -//add bias into V & rebuild padding -//input matrix a matrix of m = valid_word_num, n = head_num*size_per_head, CUBLASLT_ORDER_COL32 -//output matrixes are a series of sub-matrixes with size of m = size_per_head, n = seq_len , CUBLASLT_ORDER_COL4_4R2_8C or CUBLASLT_ORDER_COL32_2R_4R4 -//only for int32_t Input int8_t Output -//seq_len, size_per_head must be a multiple of 32 -//grid = (size_per_head/32, seq_len/32, batch_size*head_num) -//block = (8, 32); -//using char4 -//per axis quantization for weight -template -__global__ -void add_V_bias_transform_rebuild_padding(int8_t *v_buf_, const int32_t *V, const T *V_bias, const int* sequence_id_map, const int valid_word_num, - const int batch_size, const int seq_len, const int head_num, const int size_per_head, int stride, - const float* weight_amax, const float *input_deQFactor_div127_ptr, const float *out_scale_ptr, bool use_ORDER_COL32_2R_4R4) +template void invokeAddQKBiasTransformRebuildPaddingRow(int8_t* q_buf, + int8_t* k_buf, + const int8_t* Q, + const float* bias_Q, + const int8_t* K, + const float* bias_K, + const int* sequence_id_offset, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_deQFactor_ptr, + const float* k_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template void invokeAddQKBiasTransformRebuildPaddingRow(int8_t* q_buf, + int8_t* k_buf, + const int8_t* Q, + const half* bias_Q, + const int8_t* K, + const half* bias_K, + const int* sequence_id_offset, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_deQFactor_ptr, + const float* k_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +// input matrix a matrix of m = batch_size*seq_len , n = head_num*size_per_head, CUBLASLT_ORDER_COL32 +// output matrixes are a series of sub-matrixes with size of m = size_per_head, n = seq_len , CUBLASLT_ORDER_COL4_4R2_8C +// or CUBLASLT_ORDER_COL32_2R_4R4 only for int32_t Input int8_t Output seq_len, size_per_head must be a multiple of 32 +// grid = (size_per_head/32, seq_len/32, batch_size*head_num) +// block = (8, 32); +// using char4 +// per axis quantization for weight +template +__global__ void add_V_bias_transform(int8_t* v_buf_, + const int32_t* V, + const T* V_bias, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + int stride, + const float* weight_amax, + const float* input_deQFactor_div127_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4) { - __shared__ int8_t shm[32][33]; - const int32_t* data_ptr = V; - char4* buf_ptr4 = (char4*) v_buf_; - const T* bias_ptr = V_bias; - - int threadIdx4 = threadIdx.x << 2; - - //for src of (seq_len, size_per_head) - int batch_id = blockIdx.z/head_num; - int head_id = blockIdx.z%head_num; - int word_id = (blockIdx.y << 5) + threadIdx.y; - int id_in_size = (blockIdx.x << 5) + threadIdx4; - - //for shm row-major - int sh_col = threadIdx4; - int sh_row = threadIdx.y; - - //for V layout (batch_size*seq_len, head_num*size_per_head) - int col; - int row = __ldg(sequence_id_map + batch_id*seq_len + word_id); - - if (row != -1){ - col = head_id*size_per_head + id_in_size; - int inIdx = ((col & 0xffffffe0)*valid_word_num + ((row << 5) + (col&31))); - - float tmp; - float scale; - const float input_deQFactor_div127 = __ldg(input_deQFactor_div127_ptr); const float out_scale = __ldg(out_scale_ptr); - + __shared__ int8_t shm[32][33]; + const int32_t* data_ptr = V; + char4* buf_ptr4 = (char4*)v_buf_; + const T* bias_ptr = V_bias; + + int threadIdx4 = threadIdx.x << 2; + + // for src of (seq_len, size_per_head) + int batch_id = blockIdx.z / head_num; + int head_id = blockIdx.z % head_num; + int word_id = (blockIdx.y << 5) + threadIdx.y; + int id_in_size = (blockIdx.x << 5) + threadIdx4; + + // for V layout (batch_size*seq_len, head_num*size_per_head) + int col = head_id * size_per_head + id_in_size; + int row = batch_id * seq_len + word_id; + int inIdx = (((col >> 5) << 5) * batch_size * seq_len + ((row << 5) + (col & 31))); + // for shm row-major + int sh_col = threadIdx4; + int sh_row = threadIdx.y; + + float tmp; + float scale; + + // const half2* bias_ptr2 = (const half2*)bias_ptr; + // half2 tmp2; + + // tmp2 = __ldg(&bias_ptr2[col >> 1]); + scale = __ldg(data_ptr + inIdx) * __ldg(weight_amax + col) * input_deQFactor_div127; - tmp = scale + static_cast(__ldg(bias_ptr + col)); - shm[sh_row][sh_col] = float_to_int8_rn(tmp*out_scale); - + tmp = scale + static_cast(__ldg(bias_ptr + col)); //(tmp2.x); + shm[sh_row][sh_col] = float_to_int8_rn(tmp * out_scale); + scale = __ldg(data_ptr + inIdx + 1) * __ldg(weight_amax + col + 1) * input_deQFactor_div127; - tmp = scale + static_cast(__ldg(bias_ptr+col+1)); - shm[sh_row][sh_col+1] = float_to_int8_rn(tmp*out_scale); - - scale = __ldg(data_ptr+inIdx+2) * __ldg(weight_amax+col+2) * input_deQFactor_div127; - tmp = scale + static_cast(__ldg(bias_ptr+col+2)); - shm[sh_row][sh_col+2] = float_to_int8_rn(tmp*out_scale); - - scale = __ldg(data_ptr+inIdx + 3) * __ldg(weight_amax+col+3) * input_deQFactor_div127; - tmp = scale + static_cast(__ldg(bias_ptr+col+3)); - shm[sh_row][sh_col+3] = float_to_int8_rn(tmp*out_scale); - } - else{ - shm[sh_row][sh_col] = shm[sh_row][sh_col + 1] = shm[sh_row][sh_col + 2] = shm[sh_row][sh_col + 3] = 0; - } - __syncthreads(); - - char4 dataTmp; - dataTmp.x = shm[sh_col][sh_row]; - dataTmp.y = shm[sh_col+1][sh_row]; - dataTmp.z = shm[sh_col+2][sh_row]; - dataTmp.w = shm[sh_col+3][sh_row]; - - //for dst of (size_per_head, seq_len) - word_id = (blockIdx.y << 5) + threadIdx4; - id_in_size = (blockIdx.x << 5) + threadIdx.y; - col = (word_id >> 5); - - if (use_ORDER_COL32_2R_4R4) - { - int row_in_tile = id_in_size & 31; - int col_in_tile = word_id & 31; - row = ( - //COL32_2R_4R4 - ((id_in_size >> 5) << 10) + - //(((row%8)/2*4+row/8)*2+row%2)*32+col - (((((((row_in_tile%8)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile - ); - } - else - { - row = ( - //COL4 - ////id_in_size/8 is the number of tile of (8 rows 32 columns) -- column-major - ////id_in_size%2 is even row, otherwise odd row - ////word_id%COL32_/8 is the number tile of (8 rows 8 columns) - (((id_in_size & 0xfffffff8) + ((id_in_size&1) << 2) + ((word_id%32) >> 3)) << 5) + - ////word_id%8 >= 4 is the right half of (8 rows 8 columns) tile - ////(id_in_size%8/2) is (the row id of alternating 4 rows) - 1 - (((((word_id&7) >= 4)?4:0) + ((id_in_size%8) >> 1)) << 2) + - ////word_id%4 is the id of 4 cols - (word_id&3) - ); - } - - buf_ptr4[(blockIdx.z*stride + (col << 5)*size_per_head + row) >> 2] = dataTmp; + tmp = scale + static_cast(__ldg(bias_ptr + col + 1)); //(tmp2.y); + shm[sh_row][sh_col + 1] = float_to_int8_rn(tmp * out_scale); + + // tmp2 = __ldg(&bias_ptr2[(col >> 1) + 1]); + + scale = __ldg(data_ptr + inIdx + 2) * __ldg(weight_amax + col + 2) * input_deQFactor_div127; + tmp = scale + static_cast(__ldg(bias_ptr + col + 2)); //(tmp2.x); + shm[sh_row][sh_col + 2] = float_to_int8_rn(tmp * out_scale); + + scale = __ldg(data_ptr + inIdx + 3) * __ldg(weight_amax + col + 3) * input_deQFactor_div127; + tmp = scale + static_cast(__ldg(bias_ptr + col + 3)); //(tmp2.y); + shm[sh_row][sh_col + 3] = float_to_int8_rn(tmp * out_scale); + + __syncthreads(); + + // for dst of (size_per_head, seq_len) + word_id = (blockIdx.y << 5) + threadIdx4; + id_in_size = (blockIdx.x << 5) + threadIdx.y; + col = (word_id >> 5); + + if (use_ORDER_COL32_2R_4R4) { + int row_in_tile = id_in_size & 31; + int col_in_tile = word_id & 31; + row = ( + // COL32_2R_4R4 + ((id_in_size >> 5) << 10) + + //(((row%8)/2*4+row/8)*2+row%2)*32+col + (((((((row_in_tile % 8) >> 1) << 2) + (row_in_tile >> 3)) << 1) + (row_in_tile & 1)) << 5) + col_in_tile); + } + else { + row = ( + // COL4 + ////id_in_size/8 is the number of tile of (8 rows 32 columns) -- column-major + ////id_in_size%2 is even row, otherwise odd row + ////word_id%COL32_/8 is the number tile of (8 rows 8 columns) + ((((id_in_size >> 3) << 3) + ((id_in_size & 1) << 2) + ((word_id % 32) >> 3)) << 5) + + ////word_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(id_in_size%8/2) is (the row id of alternating 4 rows) - 1 + (((((word_id & 7) >= 4) ? 4 : 0) + ((id_in_size % 8) >> 1)) << 2) + + ////word_id%4 is the id of 4 cols + (word_id & 3)); + } + + char4 dataTmp; + dataTmp.x = shm[sh_col][sh_row]; + dataTmp.y = shm[sh_col + 1][sh_row]; + dataTmp.z = shm[sh_col + 2][sh_row]; + dataTmp.w = shm[sh_col + 3][sh_row]; + buf_ptr4[(blockIdx.z * stride + (col << 5) * size_per_head + row) >> 2] = dataTmp; } -template <> -__global__ -void add_V_bias_transform_rebuild_padding(int8_t *v_buf_, const int32_t *V, const half *V_bias, const int* sequence_id_map, const int valid_word_num, - const int batch_size, const int seq_len, const int head_num, const int size_per_head, int stride, - const float* weight_amax, const float *input_deQFactor_div127_ptr, const float *out_scale_ptr, bool use_ORDER_COL32_2R_4R4) +template<> +__global__ void add_V_bias_transform(int8_t* v_buf_, + const int32_t* V, + const half* V_bias, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + int stride, + const float* weight_amax, + const float* input_deQFactor_div127_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4) { - __shared__ int8_t shm[32][33]; - const int32_t* data_ptr = V; - char4* buf_ptr4 = (char4*) v_buf_; - - int threadIdx4 = threadIdx.x << 2; - - //for src of (seq_len, size_per_head) - int batch_id = blockIdx.z/head_num; - int head_id = blockIdx.z%head_num; - - int blockIdy32 = (blockIdx.y << 5); - int blockIdx32 = (blockIdx.x << 5); - int word_id = blockIdy32 + threadIdx.y; - int id_in_size = blockIdx32 + threadIdx4; - - - //for shm row-major - int sh_col = threadIdx4; - int sh_row = threadIdx.y; - - //for V layout (batch_size*seq_len, head_num*size_per_head) - int col; - int row = __ldg(sequence_id_map + batch_id*seq_len + word_id); - - if (row >= 0){ const float input_deQFactor_div127 = __ldg(input_deQFactor_div127_ptr); const float out_scale = __ldg(out_scale_ptr); - col = head_id*size_per_head + id_in_size; - int inIdx = ((col & 0xffffffe0)*valid_word_num + ((row << 5) + (col&31))); + __shared__ int8_t shm[32][33]; + const int32_t* data_ptr = V; + char4* buf_ptr4 = (char4*)v_buf_; + + int threadIdx4 = threadIdx.x << 2; + + // for src of (seq_len, size_per_head) + int batch_id = blockIdx.z / head_num; + int head_id = blockIdx.z % head_num; + + int blockIdy32 = (blockIdx.y << 5); + int blockIdx32 = (blockIdx.x << 5); + int word_id = blockIdy32 + threadIdx.y; + int id_in_size = blockIdx32 + threadIdx4; + + // for V layout (batch_size*seq_len, head_num*size_per_head) + int col = head_id * size_per_head + id_in_size; + int row = batch_id * seq_len + word_id; + int inIdx = ((col & 0xffffffe0) * batch_size * seq_len + ((row << 5) + (col & 31))); + // for shm row-major + int sh_col = threadIdx4; + int sh_row = threadIdx.y; + int col_2 = col >> 1; float scale; const half2* bias_ptr2 = (const half2*)V_bias; half2 tmp2; - tmp2 = __ldg(bias_ptr2+col_2); - - scale = __ldg(data_ptr+inIdx) * __ldg(weight_amax+col) * input_deQFactor_div127; + tmp2 = __ldg(bias_ptr2 + col_2); + + scale = __ldg(data_ptr + inIdx) * __ldg(weight_amax + col) * input_deQFactor_div127; scale = scale + static_cast(tmp2.x); - shm[sh_row][sh_col] = float_to_int8_rn(scale*out_scale); - - scale = __ldg(data_ptr+inIdx+1) * __ldg(weight_amax+col+1) * input_deQFactor_div127; + shm[sh_row][sh_col] = float_to_int8_rn(scale * out_scale); + + scale = __ldg(data_ptr + inIdx + 1) * __ldg(weight_amax + col + 1) * input_deQFactor_div127; scale = scale + static_cast(tmp2.y); - shm[sh_row][sh_col+1] = float_to_int8_rn(scale*out_scale); - + shm[sh_row][sh_col + 1] = float_to_int8_rn(scale * out_scale); + tmp2 = __ldg(bias_ptr2 + col_2 + 1); scale = __ldg(data_ptr + inIdx + 2) * __ldg(weight_amax + col + 2) * input_deQFactor_div127; scale = scale + static_cast(tmp2.x); - shm[sh_row][sh_col+2] = float_to_int8_rn(scale*out_scale); - + shm[sh_row][sh_col + 2] = float_to_int8_rn(scale * out_scale); + scale = __ldg(data_ptr + inIdx + 3) * __ldg(weight_amax + col + 3) * input_deQFactor_div127; scale = scale + static_cast(tmp2.y); - shm[sh_row][sh_col+3] = float_to_int8_rn(scale*out_scale); - } - else{ - shm[sh_row][sh_col] = shm[sh_row][sh_col + 1] = shm[sh_row][sh_col + 2] = shm[sh_row][sh_col + 3] = 0; - } - __syncthreads(); - - char4 dataTmp; - dataTmp.x = shm[sh_col][sh_row]; - dataTmp.y = shm[sh_col+1][sh_row]; - dataTmp.z = shm[sh_col+2][sh_row]; - dataTmp.w = shm[sh_col+3][sh_row]; - - //for dst of (size_per_head, seq_len) - word_id = blockIdy32 + threadIdx4; - id_in_size = blockIdx32 + threadIdx.y; - col = (word_id >> 5); - - if (use_ORDER_COL32_2R_4R4) - { - int row_in_tile = id_in_size & 31; - int col_in_tile = word_id & 31; - row = ( - //COL32_2R_4R4 - ((id_in_size >> 5) << 10) + - //(((row%8)/2*4+row/8)*2+row%2)*32+col - (((((((row_in_tile%8)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile - ); - } - else - { - row = ( - //COL4 - ////id_in_size/8 is the number of tile of (8 rows 32 columns) -- column-major - ////id_in_size%2 is even row, otherwise odd row - ////word_id%COL32_/8 is the number tile of (8 rows 8 columns) - (((id_in_size & 0xfffffff8) + ((id_in_size&1) << 2) + ((word_id%32) >> 3)) << 5) + - ////word_id%8 >= 4 is the right half of (8 rows 8 columns) tile - ////(id_in_size%8/2) is (the row id of alternating 4 rows) - 1 - (((((word_id&7) >= 4)?4:0) + ((id_in_size%8) >> 1)) << 2) + - ////word_id%4 is the id of 4 cols - (word_id&3) - ); - } - - buf_ptr4[(blockIdx.z*stride + (col << 5)*size_per_head + row) >> 2] = dataTmp; + shm[sh_row][sh_col + 3] = float_to_int8_rn(scale * out_scale); + + __syncthreads(); + + // for dst of (size_per_head, seq_len) + word_id = blockIdy32 + threadIdx4; + id_in_size = blockIdx32 + threadIdx.y; + col = (word_id >> 5); + + if (use_ORDER_COL32_2R_4R4) { + int row_in_tile = id_in_size & 31; + int col_in_tile = word_id & 31; + row = ( + // COL32_2R_4R4 + ((id_in_size >> 5) << 10) + + //(((row%8)/2*4+row/8)*2+row%2)*32+col + (((((((row_in_tile % 8) >> 1) << 2) + (row_in_tile >> 3)) << 1) + (row_in_tile & 1)) << 5) + col_in_tile); + } + else { + row = ( + // COL4 + ////id_in_size/8 is the number of tile of (8 rows 32 columns) -- column-major + ////id_in_size%2 is even row, otherwise odd row + ////word_id%COL32_/8 is the number tile of (8 rows 8 columns) + (((id_in_size & 0xfffffff8) + ((id_in_size & 1) << 2) + ((word_id % 32) >> 3)) << 5) + + ////word_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(id_in_size%8/2) is (the row id of alternating 4 rows) - 1 + (((((word_id & 7) >= 4) ? 4 : 0) + ((id_in_size % 8) >> 1)) << 2) + + ////word_id%4 is the id of 4 cols + (word_id & 3)); + } + + char4 dataTmp; + dataTmp.x = shm[sh_col][sh_row]; + dataTmp.y = shm[sh_col + 1][sh_row]; + dataTmp.z = shm[sh_col + 2][sh_row]; + dataTmp.w = shm[sh_col + 3][sh_row]; + buf_ptr4[(blockIdx.z * stride + (col << 5) * size_per_head + row) >> 2] = dataTmp; } -template -void invokeAddVBiasTransformRebuildPadding(int8_t *v_buf, const int32_t *V, const T *V_bias, - const int* sequence_id_map, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float* weight_amax, - const float *input_deQFactor_div127_ptr, - const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream) +template +__global__ void add_V_bias_transform_varlen(int8_t* v_buf_, + const int32_t* V, + const T* V_bias, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + int stride, + const float* weight_amax, + const float* input_deQFactor_div127_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4) { - add_V_bias_transform_rebuild_padding<<>>( - v_buf, V, V_bias, - sequence_id_map, valid_word_num, - batch_size, seq_len, - head_num, size_per_head, - seq_len*size_per_head, - weight_amax, input_deQFactor_div127_ptr, - out_scale_ptr, use_ORDER_COL32_2R_4R4); -} - -template -void invokeAddVBiasTransformRebuildPadding(int8_t *v_buf, const int32_t *V, const float *V_bias, - const int* sequence_id_map, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float* weight_amax, - const float *input_deQFactor_div127_ptr, - const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddVBiasTransformRebuildPadding(int8_t *v_buf, const int32_t *V, const half *V_bias, - const int* sequence_id_map, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float* weight_amax, - const float *input_deQFactor_div127_ptr, - const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -//add bias into V & rebuild padding -//input matrix a matrix of m = valid_word_num, n = head_num*size_per_head, CUBLASLT_ORDER_COL32 -//output matrixes are a series of sub-matrixes with size of m = size_per_head, n = seq_len , CUBLASLT_ORDER_COL4_4R2_8C or CUBLASLT_ORDER_COL32_2R_4R4 -//only for int8_t IO -//seq_len, size_per_head must be a multiple of 32 -//grid = (size_per_head/32, seq_len/32, batch_size*head_num) -//block = (8, 32); -//using char4 -//per tensor quantization for weight -template -__global__ -void add_V_bias_transform_rebuild_padding(int8_t *v_buf_, const int8_t *V, const T *V_bias, const int* sequence_id_map, const int valid_word_num, - const int batch_size, const int seq_len, const int head_num, const int size_per_head, int stride, - const float *deQFactor_ptr, const float *out_scale_ptr, bool use_ORDER_COL32_2R_4R4) -{ - __shared__ int8_t shm[32][33]; - const char4* data_ptr = (const char4*)V; - char4* buf_ptr4 = (char4*) v_buf_; - const T* bias_ptr = V_bias; - - int threadIdx4 = threadIdx.x << 2; - - //for src of (seq_len, size_per_head) - int batch_id = blockIdx.z/head_num; - int head_id = blockIdx.z%head_num; - int word_id = (blockIdx.y << 5) + threadIdx.y; - int id_in_size = (blockIdx.x << 5) + threadIdx4; - - //for shm row-major - int sh_col = threadIdx4; - int sh_row = threadIdx.y; - - //for V layout (batch_size*seq_len, head_num*size_per_head) - int col; - int row = __ldg(sequence_id_map + batch_id*seq_len + word_id); - - if (row != -1){ - col = head_id*size_per_head + id_in_size; - int inIdx = ((col & 0xffffffe0)*valid_word_num + ((row << 5) + (col&31))) >> 2; - - float tmp; - float scale; - - const float deQFactor = __ldg(deQFactor_ptr); + const float input_deQFactor_div127 = __ldg(input_deQFactor_div127_ptr); const float out_scale = __ldg(out_scale_ptr); - - char4 dataTmp = __ldg(data_ptr + inIdx); - - scale = dataTmp.x * deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr + col)); - shm[sh_row][sh_col] = float_to_int8_rn(tmp*out_scale); - - scale = dataTmp.y * deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr+col+1)); - shm[sh_row][sh_col+1] = float_to_int8_rn(tmp*out_scale); - - scale = dataTmp.z * deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr+col+2)); - shm[sh_row][sh_col+2] = float_to_int8_rn(tmp*out_scale); - - scale = dataTmp.w * deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr+col+3)); - shm[sh_row][sh_col+3] = float_to_int8_rn(tmp*out_scale); - } - else{ - shm[sh_row][sh_col] = shm[sh_row][sh_col + 1] = shm[sh_row][sh_col + 2] = shm[sh_row][sh_col + 3] = 0; - } - __syncthreads(); - - char4 dataTmp; - dataTmp.x = shm[sh_col][sh_row]; - dataTmp.y = shm[sh_col+1][sh_row]; - dataTmp.z = shm[sh_col+2][sh_row]; - dataTmp.w = shm[sh_col+3][sh_row]; - - //for dst of (size_per_head, seq_len) - word_id = (blockIdx.y << 5) + threadIdx4; - id_in_size = (blockIdx.x << 5) + threadIdx.y; - col = (word_id >> 5); - - if (use_ORDER_COL32_2R_4R4) - { - int row_in_tile = id_in_size & 31; - int col_in_tile = word_id & 31; - row = ( - //COL32_2R_4R4 - ((id_in_size >> 5) << 10) + - //(((row%8)/2*4+row/8)*2+row%2)*32+col - (((((((row_in_tile%8)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile - ); - } - else - { - row = ( - //COL4 - ////id_in_size/8 is the number of tile of (8 rows 32 columns) -- column-major - ////id_in_size%2 is even row, otherwise odd row - ////word_id%COL32_/8 is the number tile of (8 rows 8 columns) - (((id_in_size & 0xfffffff8) + ((id_in_size&1) << 2) + ((word_id%32) >> 3)) << 5) + - ////word_id%8 >= 4 is the right half of (8 rows 8 columns) tile - ////(id_in_size%8/2) is (the row id of alternating 4 rows) - 1 - (((((word_id&7) >= 4)?4:0) + ((id_in_size%8) >> 1)) << 2) + - ////word_id%4 is the id of 4 cols - (word_id&3) - ); - } - - buf_ptr4[(blockIdx.z*stride + (col << 5)*size_per_head + row) >> 2] = dataTmp; -} - -//add bias into V & rebuild padding -//input matrix a matrix of m = valid_word_num, n = head_num*size_per_head, CUBLASLT_ORDER_COL32 -//output matrixes are a series of sub-matrixes with size of m = size_per_head, n = seq_len_padded , CUBLASLT_ORDER_COL4_4R2_8C or CUBLASLT_ORDER_COL32_2R_4R4 -//only for int8_t IO -//seq_len, size_per_head must be a multiple of 32 -//grid = (size_per_head/32, seq_len_padded/32, batch_size*head_num) -//block = (8, 32); -//using char4 -//per tensor quantization for weight -template -__global__ -void add_V_bias_transform_rebuild_padding_varlen(int8_t *v_buf_, const int8_t *V, const T *V_bias, const int* sequence_id_map, const int valid_word_num, - const int batch_size, const int seq_len, const int seq_len_padded, - const int head_num, const int size_per_head, int stride, - const float *deQFactor_ptr, const float *out_scale_ptr, bool use_ORDER_COL32_2R_4R4) -{ - __shared__ int8_t shm[32][33]; - const char4* data_ptr = (const char4*)V; - char4* buf_ptr4 = (char4*) v_buf_; - const T* bias_ptr = V_bias; + __shared__ int8_t shm[32][33]; + const int32_t* data_ptr = V; + char4* buf_ptr4 = (char4*)v_buf_; - int threadIdx4 = threadIdx.x << 2; + int threadIdx4 = threadIdx.x << 2; - //for src of (seq_len, size_per_head) - int batch_id = blockIdx.z/head_num; - int head_id = blockIdx.z%head_num; - int word_id = (blockIdx.y << 5) + threadIdx.y; - int id_in_size = (blockIdx.x << 5) + threadIdx4; + // for src of (seq_len, size_per_head) + int batch_id = blockIdx.z / head_num; + int head_id = blockIdx.z % head_num; - //for shm row-major - int sh_col = threadIdx4; - int sh_row = threadIdx.y; + int blockIdy32 = (blockIdx.y << 5); + int blockIdx32 = (blockIdx.x << 5); + int word_id = blockIdy32 + threadIdx.y; + int id_in_size = blockIdx32 + threadIdx4; - //for V layout (batch_size*seq_len, head_num*size_per_head) - int col; - int row = word_id < seq_len ? __ldg(sequence_id_map + batch_id*seq_len + word_id) : -1; + // for V layout (batch_size*seq_len, head_num*size_per_head) + int col = head_id * size_per_head + id_in_size; + int row = batch_id * seq_len + word_id; + int inIdx = ((col & 0xffffffe0) * batch_size * seq_len + ((row << 5) + (col & 31))); + // for shm row-major + int sh_col = threadIdx4; + int sh_row = threadIdx.y; - if (row != -1){ - col = head_id*size_per_head + id_in_size; - int inIdx = ((col & 0xffffffe0)*valid_word_num + ((row << 5) + (col&31))) >> 2; - - float tmp; float scale; - const float deQFactor = __ldg(deQFactor_ptr); - const float out_scale = __ldg(out_scale_ptr); + if (word_id < seq_len) { + const T* bias_ptr = V_bias; + + scale = __ldg(data_ptr + inIdx) * __ldg(weight_amax + col) * input_deQFactor_div127; + scale = scale + static_cast(__ldg(bias_ptr + col)); + shm[sh_row][sh_col] = float_to_int8_rn(scale * out_scale); + + scale = __ldg(data_ptr + inIdx + 1) * __ldg(weight_amax + col + 1) * input_deQFactor_div127; + scale = scale + static_cast(__ldg(bias_ptr + col + 1)); + shm[sh_row][sh_col + 1] = float_to_int8_rn(scale * out_scale); + + scale = __ldg(data_ptr + inIdx + 2) * __ldg(weight_amax + col + 2) * input_deQFactor_div127; + scale = scale + static_cast(__ldg(bias_ptr + col + 2)); + shm[sh_row][sh_col + 2] = float_to_int8_rn(scale * out_scale); + + scale = __ldg(data_ptr + inIdx + 3) * __ldg(weight_amax + col + 3) * input_deQFactor_div127; + scale = scale + static_cast(__ldg(bias_ptr + col + 3)); + shm[sh_row][sh_col + 3] = float_to_int8_rn(scale * out_scale); + } + else { + shm[sh_row][sh_col] = shm[sh_row][sh_col + 1] = shm[sh_row][sh_col + 2] = shm[sh_row][sh_col + 3] = 0; + } + + __syncthreads(); + + // for dst of (size_per_head, seq_len) + word_id = blockIdy32 + threadIdx4; + id_in_size = blockIdx32 + threadIdx.y; + col = (word_id >> 5); + + if (use_ORDER_COL32_2R_4R4) { + int row_in_tile = id_in_size & 31; + int col_in_tile = word_id & 31; + row = ( + // COL32_2R_4R4 + ((id_in_size >> 5) << 10) + + //(((row%8)/2*4+row/8)*2+row%2)*32+col + (((((((row_in_tile % 8) >> 1) << 2) + (row_in_tile >> 3)) << 1) + (row_in_tile & 1)) << 5) + col_in_tile); + } + else { + row = ( + // COL4 + ////id_in_size/8 is the number of tile of (8 rows 32 columns) -- column-major + ////id_in_size%2 is even row, otherwise odd row + ////word_id%COL32_/8 is the number tile of (8 rows 8 columns) + (((id_in_size & 0xfffffff8) + ((id_in_size & 1) << 2) + ((word_id % 32) >> 3)) << 5) + + ////word_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(id_in_size%8/2) is (the row id of alternating 4 rows) - 1 + (((((word_id & 7) >= 4) ? 4 : 0) + ((id_in_size % 8) >> 1)) << 2) + + ////word_id%4 is the id of 4 cols + (word_id & 3)); + } + + char4 dataTmp; + dataTmp.x = shm[sh_col][sh_row]; + dataTmp.y = shm[sh_col + 1][sh_row]; + dataTmp.z = shm[sh_col + 2][sh_row]; + dataTmp.w = shm[sh_col + 3][sh_row]; + buf_ptr4[(blockIdx.z * stride + (col << 5) * size_per_head + row) >> 2] = dataTmp; +} - char4 dataTmp = __ldg(data_ptr + inIdx); - - scale = dataTmp.x * deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr + col)); - shm[sh_row][sh_col] = float_to_int8_rn(tmp*out_scale); - - scale = dataTmp.y * deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr+col+1)); - shm[sh_row][sh_col+1] = float_to_int8_rn(tmp*out_scale); - - scale = dataTmp.z * deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr+col+2)); - shm[sh_row][sh_col+2] = float_to_int8_rn(tmp*out_scale); - - scale = dataTmp.w * deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr+col+3)); - shm[sh_row][sh_col+3] = float_to_int8_rn(tmp*out_scale); - } - else{ - shm[sh_row][sh_col] = shm[sh_row][sh_col + 1] = shm[sh_row][sh_col + 2] = shm[sh_row][sh_col + 3] = 0; - } - __syncthreads(); - - char4 dataTmp; - dataTmp.x = shm[sh_col][sh_row]; - dataTmp.y = shm[sh_col+1][sh_row]; - dataTmp.z = shm[sh_col+2][sh_row]; - dataTmp.w = shm[sh_col+3][sh_row]; - - //for dst of (size_per_head, seq_len_padded) - word_id = (blockIdx.y << 5) + threadIdx4; - id_in_size = (blockIdx.x << 5) + threadIdx.y; - col = (word_id >> 5); - - if (use_ORDER_COL32_2R_4R4) - { - int row_in_tile = id_in_size & 31; - int col_in_tile = word_id & 31; - row = ( - //COL32_2R_4R4 - ((id_in_size >> 5) << 10) + - //(((row%8)/2*4+row/8)*2+row%2)*32+col - (((((((row_in_tile%8)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile - ); - } - else - { - row = ( - //COL4 - ////id_in_size/8 is the number of tile of (8 rows 32 columns) -- column-major - ////id_in_size%2 is even row, otherwise odd row - ////word_id%COL32_/8 is the number tile of (8 rows 8 columns) - (((id_in_size & 0xfffffff8) + ((id_in_size&1) << 2) + ((word_id%32) >> 3)) << 5) + - ////word_id%8 >= 4 is the right half of (8 rows 8 columns) tile - ////(id_in_size%8/2) is (the row id of alternating 4 rows) - 1 - (((((word_id&7) >= 4)?4:0) + ((id_in_size%8) >> 1)) << 2) + - ////word_id%4 is the id of 4 cols - (word_id&3) - ); - } - - buf_ptr4[(blockIdx.z*stride + (col << 5)*size_per_head + row) >> 2] = dataTmp; +template +void invokeAddVBiasTransform(int8_t* v_buf, + const int32_t* V, + const T* V_bias, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* weight_amax, + const float* input_deQFactor_div127_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream) +{ + if (seq_len % 32 == 0) { + add_V_bias_transform<<>>( + v_buf, + V, + V_bias, + batch_size, + seq_len, + head_num, + size_per_head, + seq_len * size_per_head, + weight_amax, + input_deQFactor_div127_ptr, + out_scale_ptr, + use_ORDER_COL32_2R_4R4); + } + else { + const int seq_len_padded = (seq_len + 31) / 32 * 32; + add_V_bias_transform_varlen<<>>(v_buf, + V, + V_bias, + batch_size, + seq_len, + head_num, + size_per_head, + seq_len_padded * size_per_head, + weight_amax, + input_deQFactor_div127_ptr, + out_scale_ptr, + use_ORDER_COL32_2R_4R4); + } } +template void invokeAddVBiasTransform(int8_t* v_buf, + const int32_t* V, + const float* V_bias, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* weight_amax, + const float* input_deQFactor_div127_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template void invokeAddVBiasTransform(int8_t* v_buf, + const int32_t* V, + const half* V_bias, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* weight_amax, + const float* input_deQFactor_div127_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +// input matrix a matrix of m = batch_size*seq_len , n = head_num*size_per_head, CUBLASLT_ORDER_COL32 +// seq_len_padded = (seq_len+31)/32*32 +// output matrixes are a series of sub-matrixes with size of m = size_per_head, n = seq_len_padded , +// CUBLASLT_ORDER_COL4_4R2_8C or CUBLASLT_ORDER_COL32_2R_4R4 only for int8_t IO size_per_head must be a multiple of 32 +// grid = (size_per_head/32, seq_len_padded/32, batch_size*head_num) +// block = (8, 32); +// using char4 +// per tensor quantization for weight +template +__global__ void add_V_bias_transform_varlen(int8_t* v_buf_, + const int8_t* V, + const T* V_bias, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const int seq_len_padded, + int stride, + const float* input_deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4) +{ + const float input_deQFactor = __ldg(input_deQFactor_ptr); + const float out_scale = __ldg(out_scale_ptr); + __shared__ int8_t shm[32][33]; + const char4* data_ptr = (const char4*)V; + char4* buf_ptr4 = (char4*)v_buf_; + const T* bias_ptr = V_bias; + + int threadIdx4 = threadIdx.x << 2; + + // for src of (seq_len, size_per_head) + int batch_id = blockIdx.z / head_num; + int head_id = blockIdx.z % head_num; + int word_id = (blockIdx.y << 5) + threadIdx.y; + int id_in_size = (blockIdx.x << 5) + threadIdx4; + + int col, row; + // for shm row-major + int sh_col = threadIdx4; + int sh_row = threadIdx.y; + char4 dataTmp; + if (word_id < seq_len) { + // for V layout (batch_size*seq_len, head_num*size_per_head) + col = head_id * size_per_head + id_in_size; + row = batch_id * seq_len + word_id; + int inIdx = (((col >> 5) << 5) * batch_size * seq_len + ((row << 5) + (col & 31))) >> 2; + + float tmp; + float scale; + + dataTmp = __ldg(data_ptr + inIdx); + + scale = dataTmp.x * input_deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col)); //(tmp2.x); + shm[sh_row][sh_col] = float_to_int8_rn(tmp * out_scale); + + scale = dataTmp.y * input_deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col + 1)); //(tmp2.y); + shm[sh_row][sh_col + 1] = float_to_int8_rn(tmp * out_scale); + + scale = dataTmp.z * input_deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col + 2)); //(tmp2.x); + shm[sh_row][sh_col + 2] = float_to_int8_rn(tmp * out_scale); + + scale = dataTmp.w * input_deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col + 3)); //(tmp2.y); + shm[sh_row][sh_col + 3] = float_to_int8_rn(tmp * out_scale); + } + else { + shm[sh_row][sh_col] = shm[sh_row][sh_col + 1] = shm[sh_row][sh_col + 2] = shm[sh_row][sh_col + 3] = 0; + } + + __syncthreads(); + + // for dst of (size_per_head, seq_len_padded) + word_id = (blockIdx.y << 5) + threadIdx4; + id_in_size = (blockIdx.x << 5) + threadIdx.y; + col = (word_id >> 5); + + if (use_ORDER_COL32_2R_4R4) { + int row_in_tile = id_in_size & 31; + int col_in_tile = word_id & 31; + row = ( + // COL32_2R_4R4 + ((id_in_size >> 5) << 10) + + //(((row%8)/2*4+row/8)*2+row%2)*32+col + (((((((row_in_tile % 8) >> 1) << 2) + (row_in_tile >> 3)) << 1) + (row_in_tile & 1)) << 5) + col_in_tile); + } + else { + row = ( + // COL4 + ////id_in_size/8 is the number of tile of (8 rows 32 columns) -- column-major + ////id_in_size%2 is even row, otherwise odd row + ////word_id%COL32_/8 is the number tile of (8 rows 8 columns) + ((((id_in_size >> 3) << 3) + ((id_in_size & 1) << 2) + ((word_id % 32) >> 3)) << 5) + + ////word_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(id_in_size%8/2) is (the row id of alternating 4 rows) - 1 + (((((word_id & 7) >= 4) ? 4 : 0) + ((id_in_size % 8) >> 1)) << 2) + + ////word_id%4 is the id of 4 cols + (word_id & 3)); + } + + dataTmp.x = shm[sh_col][sh_row]; + dataTmp.y = shm[sh_col + 1][sh_row]; + dataTmp.z = shm[sh_col + 2][sh_row]; + dataTmp.w = shm[sh_col + 3][sh_row]; + buf_ptr4[(blockIdx.z * stride + (col << 5) * size_per_head + row) >> 2] = dataTmp; +} -template -void invokeAddVBiasTransformRebuildPadding(int8_t *v_buf, const int8_t *V, const T *V_bias, - const int* sequence_id_map, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float *deQFactor_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream) +template +void invokeAddVBiasTransform(int8_t* v_buf, + const int8_t* V, + const T* V_bias, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* input_deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream) { - int seq_len_padded = (seq_len + 31)/32*32; - add_V_bias_transform_rebuild_padding_varlen<<>>( - v_buf, V, V_bias, sequence_id_map, valid_word_num, - batch_size, seq_len, seq_len_padded, head_num, size_per_head, seq_len_padded*size_per_head, - deQFactor_ptr, out_scale_ptr, use_ORDER_COL32_2R_4R4); -} - -template -void invokeAddVBiasTransformRebuildPadding(int8_t *v_buf, const int8_t *V, const float *V_bias, - const int* sequence_id_map, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float *deQFactor_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddVBiasTransformRebuildPadding(int8_t *v_buf, const int8_t *V, const half *V_bias, - const int* sequence_id_map, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float *deQFactor_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -//add bias into V & rebuild padding -//input matrix a matrix of m = valid_word_num, n = head_num*size_per_head, row major -//output matrixes are a series of sub-matrixes with size of m = size_per_head, n = seq_len_padded , CUBLASLT_ORDER_COL4_4R2_8C or CUBLASLT_ORDER_COL32_2R_4R4 -//only for int8_t IO -//seq_len, size_per_head must be a multiple of 32 -//grid = (size_per_head/32, seq_len_padded/32, batch_size*head_num) -//block = (8, 32); -//using char4 -//per tensor quantization for weight -template -__global__ -void add_V_bias_transform_rebuild_padding_varlen_row(int8_t *v_buf_, const int8_t *V, const T *V_bias, const int* sequence_id_map, const int valid_word_num, - const int batch_size, const int seq_len, const int seq_len_padded, - const int head_num, const int size_per_head, int stride, - const float *deQFactor_ptr, const float *out_scale_ptr, bool use_ORDER_COL32_2R_4R4, const int head_num_x_size_per_head) + assert(size_per_head % 32 == 0); + if (seq_len % 32 == 0) { + add_V_bias_transform_varlen<<>>(v_buf, + V, + V_bias, + batch_size, + seq_len, + head_num, + size_per_head, + seq_len, + seq_len * size_per_head, + input_deQFactor_ptr, + out_scale_ptr, + use_ORDER_COL32_2R_4R4); + } + else { + const int seq_len_padded = (seq_len + 31) / 32 * 32; + add_V_bias_transform_varlen<<>>(v_buf, + V, + V_bias, + batch_size, + seq_len, + head_num, + size_per_head, + seq_len_padded, + seq_len_padded * size_per_head, + input_deQFactor_ptr, + out_scale_ptr, + use_ORDER_COL32_2R_4R4); + } +} + +template void invokeAddVBiasTransform(int8_t* v_buf, + const int8_t* V, + const float* V_bias, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* input_deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template void invokeAddVBiasTransform(int8_t* v_buf, + const int8_t* V, + const half* V_bias, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* input_deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); +// input matrix a matrix of m = batch_size*seq_len , n = head_num*size_per_head, row major +// seq_len_padded = (seq_len+31)/32*32 +// output matrixes are a series of sub-matrixes with size of m = size_per_head, n = seq_len_padded , +// CUBLASLT_ORDER_COL4_4R2_8C or CUBLASLT_ORDER_COL32_2R_4R4 only for int8_t IO size_per_head must be a multiple of 32 +// grid = (size_per_head/32, seq_len_padded/32, batch_size*head_num) +// block = (8, 32); +// using char4 +// per tensor quantization for weight +template +__global__ void add_V_bias_transform_varlen_row(int8_t* v_buf_, + const int8_t* V, + const T* V_bias, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const int seq_len_padded, + int stride, + const float* input_deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + const int head_num_x_size_per_head) { - __shared__ int8_t shm[32][33]; - const char4* data_ptr = (const char4*)V; - char4* buf_ptr4 = (char4*) v_buf_; - const T* bias_ptr = V_bias; + const float input_deQFactor = __ldg(input_deQFactor_ptr); + const float out_scale = __ldg(out_scale_ptr); + __shared__ int8_t shm[32][33]; + const char4* data_ptr = (const char4*)V; + char4* buf_ptr4 = (char4*)v_buf_; + const T* bias_ptr = V_bias; + + int threadIdx4 = threadIdx.x << 2; + + // for src of (seq_len, size_per_head) + int batch_id = blockIdx.z / head_num; + int head_id = blockIdx.z % head_num; + int word_id = (blockIdx.y << 5) + threadIdx.y; + int id_in_size = (blockIdx.x << 5) + threadIdx4; + + int col, row; + // for shm row-major + int sh_col = threadIdx4; + int sh_row = threadIdx.y; + char4 dataTmp; + if (word_id < seq_len) { + // for V layout (batch_size*seq_len, head_num*size_per_head) + col = head_id * size_per_head + id_in_size; + row = batch_id * seq_len + word_id; + int inIdx = (row * head_num_x_size_per_head + col) >> 2; + + float tmp; + float scale; + + dataTmp = __ldg(data_ptr + inIdx); + + scale = dataTmp.x * input_deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col)); //(tmp2.x); + shm[sh_row][sh_col] = float_to_int8_rn(tmp * out_scale); + + scale = dataTmp.y * input_deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col + 1)); //(tmp2.y); + shm[sh_row][sh_col + 1] = float_to_int8_rn(tmp * out_scale); + + scale = dataTmp.z * input_deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col + 2)); //(tmp2.x); + shm[sh_row][sh_col + 2] = float_to_int8_rn(tmp * out_scale); + + scale = dataTmp.w * input_deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col + 3)); //(tmp2.y); + shm[sh_row][sh_col + 3] = float_to_int8_rn(tmp * out_scale); + } + else { + shm[sh_row][sh_col] = shm[sh_row][sh_col + 1] = shm[sh_row][sh_col + 2] = shm[sh_row][sh_col + 3] = 0; + } + + __syncthreads(); + + // for dst of (size_per_head, seq_len_padded) + word_id = (blockIdx.y << 5) + threadIdx4; + id_in_size = (blockIdx.x << 5) + threadIdx.y; + col = (word_id >> 5); + + if (use_ORDER_COL32_2R_4R4) { + int row_in_tile = id_in_size & 31; + int col_in_tile = word_id & 31; + row = ( + // COL32_2R_4R4 + ((id_in_size >> 5) << 10) + + (((((((row_in_tile % 8) / 2) * 4) + (row_in_tile / 8)) * 2) + (row_in_tile % 2)) * 32) + col_in_tile + // (((((((row_in_tile%8)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile + ); + } + else { + row = ( + // COL4 + ////id_in_size/8 is the number of tile of (8 rows 32 columns) -- column-major + ////id_in_size%2 is even row, otherwise odd row + ////word_id%COL32_/8 is the number tile of (8 rows 8 columns) + ((((id_in_size >> 3) << 3) + ((id_in_size & 1) << 2) + ((word_id % 32) >> 3)) << 5) + + ////word_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(id_in_size%8/2) is (the row id of alternating 4 rows) - 1 + (((((word_id & 7) >= 4) ? 4 : 0) + ((id_in_size % 8) >> 1)) << 2) + + ////word_id%4 is the id of 4 cols + (word_id & 3)); + } + + dataTmp.x = shm[sh_col][sh_row]; + dataTmp.y = shm[sh_col + 1][sh_row]; + dataTmp.z = shm[sh_col + 2][sh_row]; + dataTmp.w = shm[sh_col + 3][sh_row]; + buf_ptr4[(blockIdx.z * stride + (col << 5) * size_per_head + row) >> 2] = dataTmp; +} - int threadIdx4 = threadIdx.x << 2; +template +void invokeAddVBiasTransformRow(int8_t* v_buf, + const int8_t* V, + const T* V_bias, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* input_deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream) +{ + assert(size_per_head % 32 == 0); + if (seq_len % 32 == 0) { + add_V_bias_transform_varlen_row<<>>(v_buf, + V, + V_bias, + batch_size, + seq_len, + head_num, + size_per_head, + seq_len, + seq_len * size_per_head, + input_deQFactor_ptr, + out_scale_ptr, + use_ORDER_COL32_2R_4R4, + head_num * size_per_head); + } + else { + const int seq_len_padded = (seq_len + 31) / 32 * 32; + add_V_bias_transform_varlen_row<<>>(v_buf, + V, + V_bias, + batch_size, + seq_len, + head_num, + size_per_head, + seq_len_padded, + seq_len_padded * size_per_head, + input_deQFactor_ptr, + out_scale_ptr, + use_ORDER_COL32_2R_4R4, + head_num * size_per_head); + } +} - //for src of (seq_len, size_per_head) - int batch_id = blockIdx.z/head_num; - int head_id = blockIdx.z%head_num; - int word_id = (blockIdx.y << 5) + threadIdx.y; - int id_in_size = (blockIdx.x << 5) + threadIdx4; +template void invokeAddVBiasTransformRow(int8_t* v_buf, + const int8_t* V, + const float* V_bias, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* input_deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template void invokeAddVBiasTransformRow(int8_t* v_buf, + const int8_t* V, + const half* V_bias, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* input_deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +// add bias into V & rebuild padding +// input matrix a matrix of m = valid_word_num, n = head_num*size_per_head, CUBLASLT_ORDER_COL32 +// output matrixes are a series of sub-matrixes with size of m = size_per_head, n = seq_len , CUBLASLT_ORDER_COL4_4R2_8C +// or CUBLASLT_ORDER_COL32_2R_4R4 only for int32_t Input int8_t Output seq_len, size_per_head must be a multiple of 32 +// grid = (size_per_head/32, seq_len/32, batch_size*head_num) +// block = (8, 32); +// using char4 +// per axis quantization for weight +template +__global__ void add_V_bias_transform_rebuild_padding(int8_t* v_buf_, + const int32_t* V, + const T* V_bias, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + int stride, + const float* weight_amax, + const float* input_deQFactor_div127_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4) +{ + __shared__ int8_t shm[32][33]; + const int32_t* data_ptr = V; + char4* buf_ptr4 = (char4*)v_buf_; + const T* bias_ptr = V_bias; + + int threadIdx4 = threadIdx.x << 2; + + // for src of (seq_len, size_per_head) + int batch_id = blockIdx.z / head_num; + int head_id = blockIdx.z % head_num; + int word_id = (blockIdx.y << 5) + threadIdx.y; + int id_in_size = (blockIdx.x << 5) + threadIdx4; + + // for shm row-major + int sh_col = threadIdx4; + int sh_row = threadIdx.y; + + // for V layout (batch_size*seq_len, head_num*size_per_head) + int col; + int row = __ldg(sequence_id_map + batch_id * seq_len + word_id); + + if (row != -1) { + col = head_id * size_per_head + id_in_size; + int inIdx = ((col & 0xffffffe0) * valid_word_num + ((row << 5) + (col & 31))); + + float tmp; + float scale; + + const float input_deQFactor_div127 = __ldg(input_deQFactor_div127_ptr); + const float out_scale = __ldg(out_scale_ptr); + + scale = __ldg(data_ptr + inIdx) * __ldg(weight_amax + col) * input_deQFactor_div127; + tmp = scale + static_cast(__ldg(bias_ptr + col)); + shm[sh_row][sh_col] = float_to_int8_rn(tmp * out_scale); + + scale = __ldg(data_ptr + inIdx + 1) * __ldg(weight_amax + col + 1) * input_deQFactor_div127; + tmp = scale + static_cast(__ldg(bias_ptr + col + 1)); + shm[sh_row][sh_col + 1] = float_to_int8_rn(tmp * out_scale); + + scale = __ldg(data_ptr + inIdx + 2) * __ldg(weight_amax + col + 2) * input_deQFactor_div127; + tmp = scale + static_cast(__ldg(bias_ptr + col + 2)); + shm[sh_row][sh_col + 2] = float_to_int8_rn(tmp * out_scale); + + scale = __ldg(data_ptr + inIdx + 3) * __ldg(weight_amax + col + 3) * input_deQFactor_div127; + tmp = scale + static_cast(__ldg(bias_ptr + col + 3)); + shm[sh_row][sh_col + 3] = float_to_int8_rn(tmp * out_scale); + } + else { + shm[sh_row][sh_col] = shm[sh_row][sh_col + 1] = shm[sh_row][sh_col + 2] = shm[sh_row][sh_col + 3] = 0; + } + __syncthreads(); + + char4 dataTmp; + dataTmp.x = shm[sh_col][sh_row]; + dataTmp.y = shm[sh_col + 1][sh_row]; + dataTmp.z = shm[sh_col + 2][sh_row]; + dataTmp.w = shm[sh_col + 3][sh_row]; + + // for dst of (size_per_head, seq_len) + word_id = (blockIdx.y << 5) + threadIdx4; + id_in_size = (blockIdx.x << 5) + threadIdx.y; + col = (word_id >> 5); + + if (use_ORDER_COL32_2R_4R4) { + int row_in_tile = id_in_size & 31; + int col_in_tile = word_id & 31; + row = ( + // COL32_2R_4R4 + ((id_in_size >> 5) << 10) + + //(((row%8)/2*4+row/8)*2+row%2)*32+col + (((((((row_in_tile % 8) >> 1) << 2) + (row_in_tile >> 3)) << 1) + (row_in_tile & 1)) << 5) + col_in_tile); + } + else { + row = ( + // COL4 + ////id_in_size/8 is the number of tile of (8 rows 32 columns) -- column-major + ////id_in_size%2 is even row, otherwise odd row + ////word_id%COL32_/8 is the number tile of (8 rows 8 columns) + (((id_in_size & 0xfffffff8) + ((id_in_size & 1) << 2) + ((word_id % 32) >> 3)) << 5) + + ////word_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(id_in_size%8/2) is (the row id of alternating 4 rows) - 1 + (((((word_id & 7) >= 4) ? 4 : 0) + ((id_in_size % 8) >> 1)) << 2) + + ////word_id%4 is the id of 4 cols + (word_id & 3)); + } + + buf_ptr4[(blockIdx.z * stride + (col << 5) * size_per_head + row) >> 2] = dataTmp; +} - //for shm row-major - int sh_col = threadIdx4; - int sh_row = threadIdx.y; +template<> +__global__ void add_V_bias_transform_rebuild_padding(int8_t* v_buf_, + const int32_t* V, + const half* V_bias, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + int stride, + const float* weight_amax, + const float* input_deQFactor_div127_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4) +{ + __shared__ int8_t shm[32][33]; + const int32_t* data_ptr = V; + char4* buf_ptr4 = (char4*)v_buf_; + + int threadIdx4 = threadIdx.x << 2; + + // for src of (seq_len, size_per_head) + int batch_id = blockIdx.z / head_num; + int head_id = blockIdx.z % head_num; + + int blockIdy32 = (blockIdx.y << 5); + int blockIdx32 = (blockIdx.x << 5); + int word_id = blockIdy32 + threadIdx.y; + int id_in_size = blockIdx32 + threadIdx4; + + // for shm row-major + int sh_col = threadIdx4; + int sh_row = threadIdx.y; + + // for V layout (batch_size*seq_len, head_num*size_per_head) + int col; + int row = __ldg(sequence_id_map + batch_id * seq_len + word_id); + + if (row >= 0) { + const float input_deQFactor_div127 = __ldg(input_deQFactor_div127_ptr); + const float out_scale = __ldg(out_scale_ptr); + col = head_id * size_per_head + id_in_size; + int inIdx = ((col & 0xffffffe0) * valid_word_num + ((row << 5) + (col & 31))); + int col_2 = col >> 1; + float scale; + + const half2* bias_ptr2 = (const half2*)V_bias; + half2 tmp2; + + tmp2 = __ldg(bias_ptr2 + col_2); + + scale = __ldg(data_ptr + inIdx) * __ldg(weight_amax + col) * input_deQFactor_div127; + scale = scale + static_cast(tmp2.x); + shm[sh_row][sh_col] = float_to_int8_rn(scale * out_scale); + + scale = __ldg(data_ptr + inIdx + 1) * __ldg(weight_amax + col + 1) * input_deQFactor_div127; + scale = scale + static_cast(tmp2.y); + shm[sh_row][sh_col + 1] = float_to_int8_rn(scale * out_scale); + + tmp2 = __ldg(bias_ptr2 + col_2 + 1); + + scale = __ldg(data_ptr + inIdx + 2) * __ldg(weight_amax + col + 2) * input_deQFactor_div127; + scale = scale + static_cast(tmp2.x); + shm[sh_row][sh_col + 2] = float_to_int8_rn(scale * out_scale); + + scale = __ldg(data_ptr + inIdx + 3) * __ldg(weight_amax + col + 3) * input_deQFactor_div127; + scale = scale + static_cast(tmp2.y); + shm[sh_row][sh_col + 3] = float_to_int8_rn(scale * out_scale); + } + else { + shm[sh_row][sh_col] = shm[sh_row][sh_col + 1] = shm[sh_row][sh_col + 2] = shm[sh_row][sh_col + 3] = 0; + } + __syncthreads(); + + char4 dataTmp; + dataTmp.x = shm[sh_col][sh_row]; + dataTmp.y = shm[sh_col + 1][sh_row]; + dataTmp.z = shm[sh_col + 2][sh_row]; + dataTmp.w = shm[sh_col + 3][sh_row]; + + // for dst of (size_per_head, seq_len) + word_id = blockIdy32 + threadIdx4; + id_in_size = blockIdx32 + threadIdx.y; + col = (word_id >> 5); + + if (use_ORDER_COL32_2R_4R4) { + int row_in_tile = id_in_size & 31; + int col_in_tile = word_id & 31; + row = ( + // COL32_2R_4R4 + ((id_in_size >> 5) << 10) + + //(((row%8)/2*4+row/8)*2+row%2)*32+col + (((((((row_in_tile % 8) >> 1) << 2) + (row_in_tile >> 3)) << 1) + (row_in_tile & 1)) << 5) + col_in_tile); + } + else { + row = ( + // COL4 + ////id_in_size/8 is the number of tile of (8 rows 32 columns) -- column-major + ////id_in_size%2 is even row, otherwise odd row + ////word_id%COL32_/8 is the number tile of (8 rows 8 columns) + (((id_in_size & 0xfffffff8) + ((id_in_size & 1) << 2) + ((word_id % 32) >> 3)) << 5) + + ////word_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(id_in_size%8/2) is (the row id of alternating 4 rows) - 1 + (((((word_id & 7) >= 4) ? 4 : 0) + ((id_in_size % 8) >> 1)) << 2) + + ////word_id%4 is the id of 4 cols + (word_id & 3)); + } + + buf_ptr4[(blockIdx.z * stride + (col << 5) * size_per_head + row) >> 2] = dataTmp; +} - //for V layout (batch_size*seq_len, head_num*size_per_head) - int col; - int row = word_id < seq_len ? __ldg(sequence_id_map + batch_id*seq_len + word_id) : -1; +template +void invokeAddVBiasTransformRebuildPadding(int8_t* v_buf, + const int32_t* V, + const T* V_bias, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* weight_amax, + const float* input_deQFactor_div127_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream) +{ + add_V_bias_transform_rebuild_padding<<>>(v_buf, + V, + V_bias, + sequence_id_map, + valid_word_num, + batch_size, + seq_len, + head_num, + size_per_head, + seq_len * size_per_head, + weight_amax, + input_deQFactor_div127_ptr, + out_scale_ptr, + use_ORDER_COL32_2R_4R4); +} - if (row != -1){ - col = head_id*size_per_head + id_in_size; - int inIdx = (row * head_num_x_size_per_head + col) >> 2; +template void invokeAddVBiasTransformRebuildPadding(int8_t* v_buf, + const int32_t* V, + const float* V_bias, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* weight_amax, + const float* input_deQFactor_div127_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template void invokeAddVBiasTransformRebuildPadding(int8_t* v_buf, + const int32_t* V, + const half* V_bias, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* weight_amax, + const float* input_deQFactor_div127_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +// add bias into V & rebuild padding +// input matrix a matrix of m = valid_word_num, n = head_num*size_per_head, CUBLASLT_ORDER_COL32 +// output matrixes are a series of sub-matrixes with size of m = size_per_head, n = seq_len , CUBLASLT_ORDER_COL4_4R2_8C +// or CUBLASLT_ORDER_COL32_2R_4R4 only for int8_t IO seq_len, size_per_head must be a multiple of 32 grid = +// (size_per_head/32, seq_len/32, batch_size*head_num) block = (8, 32); using char4 per tensor quantization for weight +template +__global__ void add_V_bias_transform_rebuild_padding(int8_t* v_buf_, + const int8_t* V, + const T* V_bias, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + int stride, + const float* deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4) +{ + __shared__ int8_t shm[32][33]; + const char4* data_ptr = (const char4*)V; + char4* buf_ptr4 = (char4*)v_buf_; + const T* bias_ptr = V_bias; + + int threadIdx4 = threadIdx.x << 2; + + // for src of (seq_len, size_per_head) + int batch_id = blockIdx.z / head_num; + int head_id = blockIdx.z % head_num; + int word_id = (blockIdx.y << 5) + threadIdx.y; + int id_in_size = (blockIdx.x << 5) + threadIdx4; + + // for shm row-major + int sh_col = threadIdx4; + int sh_row = threadIdx.y; + + // for V layout (batch_size*seq_len, head_num*size_per_head) + int col; + int row = __ldg(sequence_id_map + batch_id * seq_len + word_id); + + if (row != -1) { + col = head_id * size_per_head + id_in_size; + int inIdx = ((col & 0xffffffe0) * valid_word_num + ((row << 5) + (col & 31))) >> 2; + + float tmp; + float scale; + + const float deQFactor = __ldg(deQFactor_ptr); + const float out_scale = __ldg(out_scale_ptr); + + char4 dataTmp = __ldg(data_ptr + inIdx); + + scale = dataTmp.x * deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col)); + shm[sh_row][sh_col] = float_to_int8_rn(tmp * out_scale); + + scale = dataTmp.y * deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col + 1)); + shm[sh_row][sh_col + 1] = float_to_int8_rn(tmp * out_scale); + + scale = dataTmp.z * deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col + 2)); + shm[sh_row][sh_col + 2] = float_to_int8_rn(tmp * out_scale); + + scale = dataTmp.w * deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col + 3)); + shm[sh_row][sh_col + 3] = float_to_int8_rn(tmp * out_scale); + } + else { + shm[sh_row][sh_col] = shm[sh_row][sh_col + 1] = shm[sh_row][sh_col + 2] = shm[sh_row][sh_col + 3] = 0; + } + __syncthreads(); + + char4 dataTmp; + dataTmp.x = shm[sh_col][sh_row]; + dataTmp.y = shm[sh_col + 1][sh_row]; + dataTmp.z = shm[sh_col + 2][sh_row]; + dataTmp.w = shm[sh_col + 3][sh_row]; + + // for dst of (size_per_head, seq_len) + word_id = (blockIdx.y << 5) + threadIdx4; + id_in_size = (blockIdx.x << 5) + threadIdx.y; + col = (word_id >> 5); + + if (use_ORDER_COL32_2R_4R4) { + int row_in_tile = id_in_size & 31; + int col_in_tile = word_id & 31; + row = ( + // COL32_2R_4R4 + ((id_in_size >> 5) << 10) + + //(((row%8)/2*4+row/8)*2+row%2)*32+col + (((((((row_in_tile % 8) >> 1) << 2) + (row_in_tile >> 3)) << 1) + (row_in_tile & 1)) << 5) + col_in_tile); + } + else { + row = ( + // COL4 + ////id_in_size/8 is the number of tile of (8 rows 32 columns) -- column-major + ////id_in_size%2 is even row, otherwise odd row + ////word_id%COL32_/8 is the number tile of (8 rows 8 columns) + (((id_in_size & 0xfffffff8) + ((id_in_size & 1) << 2) + ((word_id % 32) >> 3)) << 5) + + ////word_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(id_in_size%8/2) is (the row id of alternating 4 rows) - 1 + (((((word_id & 7) >= 4) ? 4 : 0) + ((id_in_size % 8) >> 1)) << 2) + + ////word_id%4 is the id of 4 cols + (word_id & 3)); + } + + buf_ptr4[(blockIdx.z * stride + (col << 5) * size_per_head + row) >> 2] = dataTmp; +} - float tmp; - float scale; +// add bias into V & rebuild padding +// input matrix a matrix of m = valid_word_num, n = head_num*size_per_head, CUBLASLT_ORDER_COL32 +// output matrixes are a series of sub-matrixes with size of m = size_per_head, n = seq_len_padded , +// CUBLASLT_ORDER_COL4_4R2_8C or CUBLASLT_ORDER_COL32_2R_4R4 only for int8_t IO seq_len, size_per_head must be a +// multiple of 32 grid = (size_per_head/32, seq_len_padded/32, batch_size*head_num) block = (8, 32); using char4 per +// tensor quantization for weight +template +__global__ void add_V_bias_transform_rebuild_padding_varlen(int8_t* v_buf_, + const int8_t* V, + const T* V_bias, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int seq_len_padded, + const int head_num, + const int size_per_head, + int stride, + const float* deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4) +{ + __shared__ int8_t shm[32][33]; + const char4* data_ptr = (const char4*)V; + char4* buf_ptr4 = (char4*)v_buf_; + const T* bias_ptr = V_bias; + + int threadIdx4 = threadIdx.x << 2; + + // for src of (seq_len, size_per_head) + int batch_id = blockIdx.z / head_num; + int head_id = blockIdx.z % head_num; + int word_id = (blockIdx.y << 5) + threadIdx.y; + int id_in_size = (blockIdx.x << 5) + threadIdx4; + + // for shm row-major + int sh_col = threadIdx4; + int sh_row = threadIdx.y; + + // for V layout (batch_size*seq_len, head_num*size_per_head) + int col; + int row = word_id < seq_len ? __ldg(sequence_id_map + batch_id * seq_len + word_id) : -1; + + if (row != -1) { + col = head_id * size_per_head + id_in_size; + int inIdx = ((col & 0xffffffe0) * valid_word_num + ((row << 5) + (col & 31))) >> 2; + + float tmp; + float scale; + + const float deQFactor = __ldg(deQFactor_ptr); + const float out_scale = __ldg(out_scale_ptr); + + char4 dataTmp = __ldg(data_ptr + inIdx); + + scale = dataTmp.x * deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col)); + shm[sh_row][sh_col] = float_to_int8_rn(tmp * out_scale); + + scale = dataTmp.y * deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col + 1)); + shm[sh_row][sh_col + 1] = float_to_int8_rn(tmp * out_scale); + + scale = dataTmp.z * deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col + 2)); + shm[sh_row][sh_col + 2] = float_to_int8_rn(tmp * out_scale); + + scale = dataTmp.w * deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col + 3)); + shm[sh_row][sh_col + 3] = float_to_int8_rn(tmp * out_scale); + } + else { + shm[sh_row][sh_col] = shm[sh_row][sh_col + 1] = shm[sh_row][sh_col + 2] = shm[sh_row][sh_col + 3] = 0; + } + __syncthreads(); + + char4 dataTmp; + dataTmp.x = shm[sh_col][sh_row]; + dataTmp.y = shm[sh_col + 1][sh_row]; + dataTmp.z = shm[sh_col + 2][sh_row]; + dataTmp.w = shm[sh_col + 3][sh_row]; + + // for dst of (size_per_head, seq_len_padded) + word_id = (blockIdx.y << 5) + threadIdx4; + id_in_size = (blockIdx.x << 5) + threadIdx.y; + col = (word_id >> 5); + + if (use_ORDER_COL32_2R_4R4) { + int row_in_tile = id_in_size & 31; + int col_in_tile = word_id & 31; + row = ( + // COL32_2R_4R4 + ((id_in_size >> 5) << 10) + + //(((row%8)/2*4+row/8)*2+row%2)*32+col + (((((((row_in_tile % 8) >> 1) << 2) + (row_in_tile >> 3)) << 1) + (row_in_tile & 1)) << 5) + col_in_tile); + } + else { + row = ( + // COL4 + ////id_in_size/8 is the number of tile of (8 rows 32 columns) -- column-major + ////id_in_size%2 is even row, otherwise odd row + ////word_id%COL32_/8 is the number tile of (8 rows 8 columns) + (((id_in_size & 0xfffffff8) + ((id_in_size & 1) << 2) + ((word_id % 32) >> 3)) << 5) + + ////word_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(id_in_size%8/2) is (the row id of alternating 4 rows) - 1 + (((((word_id & 7) >= 4) ? 4 : 0) + ((id_in_size % 8) >> 1)) << 2) + + ////word_id%4 is the id of 4 cols + (word_id & 3)); + } + + buf_ptr4[(blockIdx.z * stride + (col << 5) * size_per_head + row) >> 2] = dataTmp; +} - const float deQFactor = __ldg(deQFactor_ptr); - const float out_scale = __ldg(out_scale_ptr); +template +void invokeAddVBiasTransformRebuildPadding(int8_t* v_buf, + const int8_t* V, + const T* V_bias, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream) +{ + int seq_len_padded = (seq_len + 31) / 32 * 32; + add_V_bias_transform_rebuild_padding_varlen<<>>(v_buf, + V, + V_bias, + sequence_id_map, + valid_word_num, + batch_size, + seq_len, + seq_len_padded, + head_num, + size_per_head, + seq_len_padded * size_per_head, + deQFactor_ptr, + out_scale_ptr, + use_ORDER_COL32_2R_4R4); +} - char4 dataTmp = __ldg(data_ptr + inIdx); - - scale = dataTmp.x * deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr + col)); - shm[sh_row][sh_col] = float_to_int8_rn(tmp*out_scale); - - scale = dataTmp.y * deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr+col+1)); - shm[sh_row][sh_col+1] = float_to_int8_rn(tmp*out_scale); - - scale = dataTmp.z * deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr+col+2)); - shm[sh_row][sh_col+2] = float_to_int8_rn(tmp*out_scale); - - scale = dataTmp.w * deQFactor; - tmp = scale + static_cast(__ldg(bias_ptr+col+3)); - shm[sh_row][sh_col+3] = float_to_int8_rn(tmp*out_scale); - } - else{ - shm[sh_row][sh_col] = shm[sh_row][sh_col + 1] = shm[sh_row][sh_col + 2] = shm[sh_row][sh_col + 3] = 0; - } - __syncthreads(); - - char4 dataTmp; - dataTmp.x = shm[sh_col][sh_row]; - dataTmp.y = shm[sh_col+1][sh_row]; - dataTmp.z = shm[sh_col+2][sh_row]; - dataTmp.w = shm[sh_col+3][sh_row]; - - //for dst of (size_per_head, seq_len_padded) - word_id = (blockIdx.y << 5) + threadIdx4; - id_in_size = (blockIdx.x << 5) + threadIdx.y; - col = (word_id >> 5); - - if (use_ORDER_COL32_2R_4R4) - { - int row_in_tile = id_in_size & 31; - int col_in_tile = word_id & 31; - row = ( - //COL32_2R_4R4 - ((id_in_size >> 5) << 10) + - (((((((row_in_tile%8)/2)*4)+(row_in_tile/8))*2)+(row_in_tile%2))*32)+col_in_tile - // (((((((row_in_tile%8)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile - ); - } - else - { - row = ( - //COL4 - ////id_in_size/8 is the number of tile of (8 rows 32 columns) -- column-major - ////id_in_size%2 is even row, otherwise odd row - ////word_id%COL32_/8 is the number tile of (8 rows 8 columns) - (((id_in_size & 0xfffffff8) + ((id_in_size&1) << 2) + ((word_id%32) >> 3)) << 5) + - ////word_id%8 >= 4 is the right half of (8 rows 8 columns) tile - ////(id_in_size%8/2) is (the row id of alternating 4 rows) - 1 - (((((word_id&7) >= 4)?4:0) + ((id_in_size%8) >> 1)) << 2) + - ////word_id%4 is the id of 4 cols - (word_id&3) - ); - } - - buf_ptr4[(blockIdx.z*stride + (col << 5)*size_per_head + row) >> 2] = dataTmp; +template void invokeAddVBiasTransformRebuildPadding(int8_t* v_buf, + const int8_t* V, + const float* V_bias, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template void invokeAddVBiasTransformRebuildPadding(int8_t* v_buf, + const int8_t* V, + const half* V_bias, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +// add bias into V & rebuild padding +// input matrix a matrix of m = valid_word_num, n = head_num*size_per_head, row major +// output matrixes are a series of sub-matrixes with size of m = size_per_head, n = seq_len_padded , +// CUBLASLT_ORDER_COL4_4R2_8C or CUBLASLT_ORDER_COL32_2R_4R4 only for int8_t IO seq_len, size_per_head must be a +// multiple of 32 grid = (size_per_head/32, seq_len_padded/32, batch_size*head_num) block = (8, 32); using char4 per +// tensor quantization for weight +template +__global__ void add_V_bias_transform_rebuild_padding_varlen_row(int8_t* v_buf_, + const int8_t* V, + const T* V_bias, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int seq_len_padded, + const int head_num, + const int size_per_head, + int stride, + const float* deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + const int head_num_x_size_per_head) +{ + __shared__ int8_t shm[32][33]; + const char4* data_ptr = (const char4*)V; + char4* buf_ptr4 = (char4*)v_buf_; + const T* bias_ptr = V_bias; + + int threadIdx4 = threadIdx.x << 2; + + // for src of (seq_len, size_per_head) + int batch_id = blockIdx.z / head_num; + int head_id = blockIdx.z % head_num; + int word_id = (blockIdx.y << 5) + threadIdx.y; + int id_in_size = (blockIdx.x << 5) + threadIdx4; + + // for shm row-major + int sh_col = threadIdx4; + int sh_row = threadIdx.y; + + // for V layout (batch_size*seq_len, head_num*size_per_head) + int col; + int row = word_id < seq_len ? __ldg(sequence_id_map + batch_id * seq_len + word_id) : -1; + + if (row != -1) { + col = head_id * size_per_head + id_in_size; + int inIdx = (row * head_num_x_size_per_head + col) >> 2; + + float tmp; + float scale; + + const float deQFactor = __ldg(deQFactor_ptr); + const float out_scale = __ldg(out_scale_ptr); + + char4 dataTmp = __ldg(data_ptr + inIdx); + + scale = dataTmp.x * deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col)); + shm[sh_row][sh_col] = float_to_int8_rn(tmp * out_scale); + + scale = dataTmp.y * deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col + 1)); + shm[sh_row][sh_col + 1] = float_to_int8_rn(tmp * out_scale); + + scale = dataTmp.z * deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col + 2)); + shm[sh_row][sh_col + 2] = float_to_int8_rn(tmp * out_scale); + + scale = dataTmp.w * deQFactor; + tmp = scale + static_cast(__ldg(bias_ptr + col + 3)); + shm[sh_row][sh_col + 3] = float_to_int8_rn(tmp * out_scale); + } + else { + shm[sh_row][sh_col] = shm[sh_row][sh_col + 1] = shm[sh_row][sh_col + 2] = shm[sh_row][sh_col + 3] = 0; + } + __syncthreads(); + + char4 dataTmp; + dataTmp.x = shm[sh_col][sh_row]; + dataTmp.y = shm[sh_col + 1][sh_row]; + dataTmp.z = shm[sh_col + 2][sh_row]; + dataTmp.w = shm[sh_col + 3][sh_row]; + + // for dst of (size_per_head, seq_len_padded) + word_id = (blockIdx.y << 5) + threadIdx4; + id_in_size = (blockIdx.x << 5) + threadIdx.y; + col = (word_id >> 5); + + if (use_ORDER_COL32_2R_4R4) { + int row_in_tile = id_in_size & 31; + int col_in_tile = word_id & 31; + row = ( + // COL32_2R_4R4 + ((id_in_size >> 5) << 10) + + (((((((row_in_tile % 8) / 2) * 4) + (row_in_tile / 8)) * 2) + (row_in_tile % 2)) * 32) + col_in_tile + // (((((((row_in_tile%8)>>1)<<2)+(row_in_tile>>3))<<1)+(row_in_tile&1))<<5)+col_in_tile + ); + } + else { + row = ( + // COL4 + ////id_in_size/8 is the number of tile of (8 rows 32 columns) -- column-major + ////id_in_size%2 is even row, otherwise odd row + ////word_id%COL32_/8 is the number tile of (8 rows 8 columns) + (((id_in_size & 0xfffffff8) + ((id_in_size & 1) << 2) + ((word_id % 32) >> 3)) << 5) + + ////word_id%8 >= 4 is the right half of (8 rows 8 columns) tile + ////(id_in_size%8/2) is (the row id of alternating 4 rows) - 1 + (((((word_id & 7) >= 4) ? 4 : 0) + ((id_in_size % 8) >> 1)) << 2) + + ////word_id%4 is the id of 4 cols + (word_id & 3)); + } + + buf_ptr4[(blockIdx.z * stride + (col << 5) * size_per_head + row) >> 2] = dataTmp; } -template -void invokeAddVBiasTransformRebuildPaddingRow(int8_t *v_buf, const int8_t *V, const T *V_bias, - const int* sequence_id_map, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float *deQFactor_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream) +template +void invokeAddVBiasTransformRebuildPaddingRow(int8_t* v_buf, + const int8_t* V, + const T* V_bias, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream) { - int seq_len_padded = (seq_len + 31)/32*32; - add_V_bias_transform_rebuild_padding_varlen_row<<>>( - v_buf, V, V_bias, sequence_id_map, valid_word_num, - batch_size, seq_len, seq_len_padded, head_num, size_per_head, seq_len_padded*size_per_head, - deQFactor_ptr, out_scale_ptr, use_ORDER_COL32_2R_4R4, head_num*size_per_head); -} - -template -void invokeAddVBiasTransformRebuildPaddingRow(int8_t *v_buf, const int8_t *V, const float *V_bias, - const int* sequence_id_map, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float *deQFactor_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddVBiasTransformRebuildPaddingRow(int8_t *v_buf, const int8_t *V, const half *V_bias, - const int* sequence_id_map, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float *deQFactor_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - + int seq_len_padded = (seq_len + 31) / 32 * 32; + add_V_bias_transform_rebuild_padding_varlen_row<<< + dim3(size_per_head / 32, seq_len_padded / 32, batch_size * head_num), + dim3(8, 32), + 0, + stream>>>(v_buf, + V, + V_bias, + sequence_id_map, + valid_word_num, + batch_size, + seq_len, + seq_len_padded, + head_num, + size_per_head, + seq_len_padded * size_per_head, + deQFactor_ptr, + out_scale_ptr, + use_ORDER_COL32_2R_4R4, + head_num * size_per_head); } + +template void invokeAddVBiasTransformRebuildPaddingRow(int8_t* v_buf, + const int8_t* V, + const float* V_bias, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template void invokeAddVBiasTransformRebuildPaddingRow(int8_t* v_buf, + const int8_t* V, + const half* V_bias, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/unfused_attention_int8_kernels.h b/src/fastertransformer/kernels/unfused_attention_int8_kernels.h index d0dbfa085..9e1dbf572 100644 --- a/src/fastertransformer/kernels/unfused_attention_int8_kernels.h +++ b/src/fastertransformer/kernels/unfused_attention_int8_kernels.h @@ -16,117 +16,215 @@ namespace fastertransformer { -void invokeMappingRemovePaddingData(const int batch_size, const int seq_len, - const int valid_word_num, int *mapping, - const int* sequence_id_offset, cudaStream_t stream); - - - -template -void invokeAddQKBiasTransform(int8_t *q_buf, int8_t *k_buf, const int32_t* Q, const T* bias_Q, - const int32_t* K, const T* bias_K, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float * q_weight_amax, const float *q_input_deQFactor_div127_ptr, - const float * k_weight_amax, const float *k_input_deQFactor_div127_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - - -template -void invokeAddQKBiasTransform(int8_t *q_buf, int8_t *k_buf, const int8_t* Q, const T* bias_Q, - const int8_t* K, const T* bias_K, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float *q_input_deQFactor_ptr, const float *k_input_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddQKBiasTransformRow(int8_t *q_buf, int8_t *k_buf, const int8_t* Q, const T* bias_Q, - const int8_t* K, const T* bias_K, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float *q_input_deQFactor_ptr, const float *k_input_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddQKBiasTransformRebuildPadding(int8_t *q_buf, int8_t *k_buf, - const int32_t* Q, const T* bias_Q, - const int32_t* K, const T* bias_K, - const int* sequence_id_offset, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float * q_weight_amax, - const float *q_input_deQFactor_div127_ptr, - const float * k_weight_amax, - const float *k_input_deQFactor_div127_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddQKBiasTransformRebuildPadding(int8_t *q_buf, int8_t *k_buf, const int8_t* Q, const T* bias_Q, - const int8_t* K, const T* bias_K, const int* sequence_id_offset, - const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float *q_deQFactor_ptr, const float *k_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddQKBiasTransformRebuildPaddingRow(int8_t *q_buf, int8_t *k_buf, const int8_t* Q, const T* bias_Q, - const int8_t* K, const T* bias_K, const int* sequence_id_offset, - const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float *q_deQFactor_ptr, const float *k_deQFactor_ptr, - const float *q_output_scale_ptr, const float *k_output_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddVBiasTransform(int8_t *v_buf, const int32_t *V, const T *V_bias, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float* weight_amax, - const float *input_deQFactor_div127_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddVBiasTransform(int8_t *v_buf, const int8_t *V, const T *V_bias, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float *input_deQFactor_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddVBiasTransformRow(int8_t *v_buf, const int8_t *V, const T *V_bias, const int batch_size, - const int seq_len, const int head_num, const int size_per_head, - const float *input_deQFactor_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddVBiasTransformRebuildPadding(int8_t *v_buf, const int32_t *V, const T *V_bias, - const int* sequence_id_map, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float* weight_amax, - const float *input_deQFactor_div127_ptr, - const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - - -template -void invokeAddVBiasTransformRebuildPadding(int8_t *v_buf, const int8_t *V, const T *V_bias, - const int* sequence_id_map, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float *deQFactor_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -template -void invokeAddVBiasTransformRebuildPaddingRow(int8_t *v_buf, const int8_t *V, const T *V_bias, - const int* sequence_id_map, const int valid_word_num, - const int batch_size, const int seq_len, - const int head_num, const int size_per_head, - const float *deQFactor_ptr, const float *out_scale_ptr, - bool use_ORDER_COL32_2R_4R4, cudaStream_t stream); - -} +void invokeMappingRemovePaddingData(const int batch_size, + const int seq_len, + const int valid_word_num, + int* mapping, + const int* sequence_id_offset, + cudaStream_t stream); + +template +void invokeAddQKBiasTransform(int8_t* q_buf, + int8_t* k_buf, + const int32_t* Q, + const T* bias_Q, + const int32_t* K, + const T* bias_K, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_weight_amax, + const float* q_input_deQFactor_div127_ptr, + const float* k_weight_amax, + const float* k_input_deQFactor_div127_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template +void invokeAddQKBiasTransform(int8_t* q_buf, + int8_t* k_buf, + const int8_t* Q, + const T* bias_Q, + const int8_t* K, + const T* bias_K, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_input_deQFactor_ptr, + const float* k_input_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template +void invokeAddQKBiasTransformRow(int8_t* q_buf, + int8_t* k_buf, + const int8_t* Q, + const T* bias_Q, + const int8_t* K, + const T* bias_K, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_input_deQFactor_ptr, + const float* k_input_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template +void invokeAddQKBiasTransformRebuildPadding(int8_t* q_buf, + int8_t* k_buf, + const int32_t* Q, + const T* bias_Q, + const int32_t* K, + const T* bias_K, + const int* sequence_id_offset, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_weight_amax, + const float* q_input_deQFactor_div127_ptr, + const float* k_weight_amax, + const float* k_input_deQFactor_div127_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template +void invokeAddQKBiasTransformRebuildPadding(int8_t* q_buf, + int8_t* k_buf, + const int8_t* Q, + const T* bias_Q, + const int8_t* K, + const T* bias_K, + const int* sequence_id_offset, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_deQFactor_ptr, + const float* k_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template +void invokeAddQKBiasTransformRebuildPaddingRow(int8_t* q_buf, + int8_t* k_buf, + const int8_t* Q, + const T* bias_Q, + const int8_t* K, + const T* bias_K, + const int* sequence_id_offset, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* q_deQFactor_ptr, + const float* k_deQFactor_ptr, + const float* q_output_scale_ptr, + const float* k_output_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template +void invokeAddVBiasTransform(int8_t* v_buf, + const int32_t* V, + const T* V_bias, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* weight_amax, + const float* input_deQFactor_div127_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template +void invokeAddVBiasTransform(int8_t* v_buf, + const int8_t* V, + const T* V_bias, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* input_deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template +void invokeAddVBiasTransformRow(int8_t* v_buf, + const int8_t* V, + const T* V_bias, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* input_deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template +void invokeAddVBiasTransformRebuildPadding(int8_t* v_buf, + const int32_t* V, + const T* V_bias, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* weight_amax, + const float* input_deQFactor_div127_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template +void invokeAddVBiasTransformRebuildPadding(int8_t* v_buf, + const int8_t* V, + const T* V_bias, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +template +void invokeAddVBiasTransformRebuildPaddingRow(int8_t* v_buf, + const int8_t* V, + const T* V_bias, + const int* sequence_id_map, + const int valid_word_num, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const float* deQFactor_ptr, + const float* out_scale_ptr, + bool use_ORDER_COL32_2R_4R4, + cudaStream_t stream); + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/unfused_attention_kernels.cu b/src/fastertransformer/kernels/unfused_attention_kernels.cu index 9f81b41db..f951e718a 100644 --- a/src/fastertransformer/kernels/unfused_attention_kernels.cu +++ b/src/fastertransformer/kernels/unfused_attention_kernels.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -15,6 +15,7 @@ * limitations under the License. */ +#include "src/fastertransformer/kernels/bfloat16_fallback_kenrels.cuh" #include "src/fastertransformer/kernels/decoder_masked_multihead_attention_utils.h" #include "src/fastertransformer/kernels/reduce_kernel_utils.cuh" #include "src/fastertransformer/kernels/unfused_attention_kernels.h" @@ -208,7 +209,7 @@ __global__ void softmax_kernel_v4(T* qk_buf_, int mask_offset = (blockIdx.y * seq_len + seq_id) * seq_len + blockDim.x * i + threadIdx.x; float qk = static_cast(qk_buf_src[qk_offset]); - float mask_val = static_cast(__ldg(&attr_mask[mask_offset])); + float mask_val = static_cast(ldg(&attr_mask[mask_offset])); mask_val = (1.0f - mask_val) * -10000.0f; @@ -242,19 +243,16 @@ __global__ void softmax_kernel_v4(T* qk_buf_, } } -template -__global__ void softmax_kernel_v4_half2(half* qk_buf_, - const half* attr_mask, - const int batch_size, - const int head_num, - const int seq_len, - const half scalar) +template +__global__ void softmax_kernel_v4_half2( + T* qk_buf_, const T* attr_mask, const int batch_size, const int head_num, const int seq_len, const T scalar) { - half2* qk_buf_half2 = (half2*)qk_buf_; - const half2* attr_mask_half2 = (const half2*)attr_mask; + using T2 = typename TypeConverter::Type; + T2* qk_buf_half2 = (T2*)qk_buf_; + const T2* attr_mask_half2 = (const T2*)attr_mask; for (int seq_id = blockIdx.x; seq_id < seq_len; seq_id += gridDim.x) { - half2 data[ITEMS_PER_THREAD]; + T2 data[ITEMS_PER_THREAD]; int qk_offset; __shared__ float s_mean, s_max; float local_max = -1e20f; @@ -263,11 +261,11 @@ __global__ void softmax_kernel_v4_half2(half* qk_buf_, + threadIdx.x; int mask_offset = (blockIdx.y * seq_len + seq_id) * (seq_len / 2) + blockDim.x * i + threadIdx.x; - half2 qk = qk_buf_half2[qk_offset]; - half2 mask_val = __ldg(&attr_mask_half2[mask_offset]); - mask_val = __hmul2(__hsub2(__float2half2_rn(1.0f), mask_val), __float2half2_rn(-10000.0f)); + T2 qk = qk_buf_half2[qk_offset]; + T2 mask_val = ldg(&attr_mask_half2[mask_offset]); + mask_val = hmul2(hsub2(float2type2(1.0f), mask_val), float2type2(-10000.0f)); - data[i] = __hadd2(__hmul2(qk, __half2half2(scalar)), mask_val); + data[i] = hadd2(hmul2(qk, type2type2(scalar)), mask_val); local_max = fmax(local_max, fmax((float)data[i].x, (float)data[i].y)); } @@ -280,7 +278,7 @@ __global__ void softmax_kernel_v4_half2(half* qk_buf_, float local_sum = 0; for (int i = 0; blockDim.x * i + threadIdx.x < (seq_len / 2) && i < ITEMS_PER_THREAD; i++) { - data[i] = h2exp(__hsub2(data[i], __float2half2_rn(s_max))); + data[i] = hexp2(hsub2(data[i], float2type2(s_max))); local_sum += (float)(data[i].x + data[i].y); } @@ -295,24 +293,21 @@ __global__ void softmax_kernel_v4_half2(half* qk_buf_, for (int i = 0; blockDim.x * i + threadIdx.x < (seq_len / 2) && i < ITEMS_PER_THREAD; i++) { qk_offset = ((blockIdx.y * head_num + blockIdx.z) * seq_len + seq_id) * (seq_len / 2) + blockDim.x * i + threadIdx.x; - qk_buf_half2[qk_offset] = __hmul2(data[i], __float2half2_rn(s_mean)); + qk_buf_half2[qk_offset] = hmul2(data[i], float2type2(s_mean)); } } } -template -__global__ void softmax_kernel_v5_half2(half* qk_buf_, - const half* attr_mask, - const int batch_size, - const int head_num, - const int seq_len, - const half scalar) +template +__global__ void softmax_kernel_v5_half2( + T* qk_buf_, const T* attr_mask, const int batch_size, const int head_num, const int seq_len, const T scalar) { - half2* qk_buf_half2 = (half2*)qk_buf_; - const half2* attr_mask_half2 = (const half2*)attr_mask; + using T2 = typename TypeConverter::Type; + T2* qk_buf_half2 = (T2*)qk_buf_; + const T2* attr_mask_half2 = (const T2*)attr_mask; for (int seq_id = blockIdx.x; seq_id < seq_len; seq_id += gridDim.x * NUM) { - half2 data[NUM][ITEMS_PER_THREAD]; + T2 data[NUM][ITEMS_PER_THREAD]; int qk_offset[NUM]; @@ -333,13 +328,13 @@ __global__ void softmax_kernel_v5_half2(half* qk_buf_, (blockIdx.y * seq_len + seq_id + j * gridDim.x) * (seq_len / 2) + blockDim.x * i + threadIdx.x; } - half2 mask_val[NUM]; + T2 mask_val[NUM]; #pragma unroll for (int j = 0; j < NUM; j++) { - mask_val[j] = __ldg(&attr_mask_half2[mask_offset[j]]); + mask_val[j] = ldg(&attr_mask_half2[mask_offset[j]]); } - half2 qk[NUM]; + T2 qk[NUM]; #pragma unroll for (int j = 0; j < NUM; j++) { qk[j] = qk_buf_half2[qk_offset[j]]; @@ -347,12 +342,12 @@ __global__ void softmax_kernel_v5_half2(half* qk_buf_, #pragma unroll for (int j = 0; j < NUM; j++) { - mask_val[j] = __hmul2(__hsub2(__float2half2_rn(1.0f), mask_val[j]), __float2half2_rn(-10000.0f)); + mask_val[j] = hmul2(hsub2(float2type2(1.0f), mask_val[j]), float2type2(-10000.0f)); } #pragma unroll for (int j = 0; j < NUM; j++) { - data[j][i] = __hadd2(__hmul2(qk[j], __half2half2(scalar)), mask_val[j]); + data[j][i] = hadd2(hmul2(qk[j], type2type2(scalar)), mask_val[j]); local_max[j] = fmax(local_max[j], fmax((float)data[j][i].x, (float)data[j][i].y)); } } @@ -381,7 +376,7 @@ __global__ void softmax_kernel_v5_half2(half* qk_buf_, for (int i = 0; blockDim.x * i + threadIdx.x < (seq_len / 2) && i < ITEMS_PER_THREAD; i++) { #pragma unroll for (int j = 0; j < NUM; j++) { - data[j][i] = h2exp(__hsub2(data[j][i], __float2half2_rn(s_max[j]))); + data[j][i] = hexp2(hsub2(data[j][i], float2type2(s_max[j]))); } #pragma unroll @@ -414,7 +409,7 @@ __global__ void softmax_kernel_v5_half2(half* qk_buf_, #pragma unroll for (int j = 0; j < NUM; j++) { - qk_buf_half2[qk_offset[j]] = __hmul2(data[j][i], __float2half2_rn(s_sum[j])); + qk_buf_half2[qk_offset[j]] = hmul2(data[j][i], float2type2(s_sum[j])); } } } @@ -426,11 +421,11 @@ __global__ void softmax_kernel_v5_half2(half* qk_buf_, if (is_half2) { \ if (grid.x % 4 == 0) { \ grid.x /= 4; \ - softmax_kernel_v5_half2<<>>( \ + softmax_kernel_v5_half2<<>>( \ (half*)buffer, (const half*)attr_mask, batch_size, head_num, seq_len, (const half)scalar); \ } \ else { \ - softmax_kernel_v4_half2<<>>( \ + softmax_kernel_v4_half2<<>>( \ (half*)buffer, (const half*)attr_mask, batch_size, head_num, seq_len, (const half)scalar); \ } \ } \ @@ -439,6 +434,37 @@ __global__ void softmax_kernel_v5_half2(half* qk_buf_, <<>>(buffer, buffer_src, attr_mask, batch_size, head_num, seq_len, scalar); \ } +#ifdef ENABLE_BF16 +#define SOFTMAX_KERNEL_BF16(ITEMS_PER_THREAD) \ + block.x /= ITEMS_PER_THREAD; \ + assert(block.x <= 1024); \ + if (is_half2) { \ + if (grid.x % 4 == 0) { \ + grid.x /= 4; \ + softmax_kernel_v5_half2<__nv_bfloat16, ITEMS_PER_THREAD, 4> \ + <<>>((__nv_bfloat16*)buffer, \ + (const __nv_bfloat16*)attr_mask, \ + batch_size, \ + head_num, \ + seq_len, \ + (const __nv_bfloat16)scalar); \ + } \ + else { \ + softmax_kernel_v4_half2<__nv_bfloat16, ITEMS_PER_THREAD> \ + <<>>((__nv_bfloat16*)buffer, \ + (const __nv_bfloat16*)attr_mask, \ + batch_size, \ + head_num, \ + seq_len, \ + (const __nv_bfloat16)scalar); \ + } \ + } \ + else { \ + softmax_kernel_v4 \ + <<>>(buffer, buffer_src, attr_mask, batch_size, head_num, seq_len, scalar); \ + } +#endif // ENABLE_BF16 + template void invokeMaskedSoftMax(T* buffer, const T_IN* buffer_src, @@ -475,6 +501,81 @@ void invokeMaskedSoftMax(T* buffer, } } +#ifdef ENABLE_BF16 +template<> +void invokeMaskedSoftMax(__nv_bfloat16* buffer, + const __nv_bfloat16* buffer_src, + const __nv_bfloat16* attr_mask, + const int batch_size, + const int seq_len, + const int head_num, + const __nv_bfloat16 scalar, + cudaStream_t stream) +{ + + using T_IN = __nv_bfloat16; + dim3 grid(seq_len, batch_size, head_num); + if (batch_size * head_num > 360) { + grid.x = ceil(float(seq_len) / 32.0f); + } + + bool is_half2 = seq_len % 2 == 0; + dim3 block((seq_len / (is_half2 ? 2 : 1) + 31) / 32 * 32); + + if (block.x > 3072 && block.x <= 4096) { + SOFTMAX_KERNEL_BF16(4) + } + if (block.x > 2048) { + SOFTMAX_KERNEL_BF16(3) + } + else if (block.x > 1024) { + SOFTMAX_KERNEL_BF16(2) + } + else if (block.x > 0) { + SOFTMAX_KERNEL_BF16(1) + } + else { + FT_CHECK(seq_len <= 4096); + } +} + +template<> +void invokeMaskedSoftMax(__nv_bfloat16* buffer, + const float* buffer_src, + const __nv_bfloat16* attr_mask, + const int batch_size, + const int seq_len, + const int head_num, + const __nv_bfloat16 scalar, + cudaStream_t stream) +{ + using T_IN = float; + dim3 grid(seq_len, batch_size, head_num); + if (batch_size * head_num > 360) { + grid.x = ceil(float(seq_len) / 32.0f); + } + + bool is_half2 = false; + dim3 block((seq_len / (is_half2 ? 2 : 1) + 31) / 32 * 32); + + if (block.x > 3072 && block.x <= 4096) { + SOFTMAX_KERNEL_BF16(4) + } + if (block.x > 2048) { + SOFTMAX_KERNEL_BF16(3) + } + else if (block.x > 1024) { + SOFTMAX_KERNEL_BF16(2) + } + else if (block.x > 0) { + SOFTMAX_KERNEL_BF16(1) + } + else { + FT_CHECK(seq_len <= 4096); + } +} +#endif // ENABLE_BF16 + template void invokeMaskedSoftMax(float* buffer, const float* buffer_src, const float* attr_mask, @@ -502,6 +603,26 @@ template void invokeMaskedSoftMax(half* buffer, const half scalar, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void invokeMaskedSoftMax(__nv_bfloat16* buffer, + const __nv_bfloat16* buffer_src, + const __nv_bfloat16* attr_mask, + const int batch_size, + const int seq_len, + const int head_num, + const __nv_bfloat16 scalar, + cudaStream_t stream); + +template void invokeMaskedSoftMax(__nv_bfloat16* buffer, + const float* buffer_src, + const __nv_bfloat16* attr_mask, + const int batch_size, + const int seq_len, + const int head_num, + const __nv_bfloat16 scalar, + cudaStream_t stream); +#endif // ENABLE_BF16 + template __global__ void transpose(T* src, T* dst, const int batch_size, const int seq_len, const int head_num, const int size_per_head) @@ -525,12 +646,68 @@ transpose(half* src, half* dst, const int batch_size, const int seq_len, const i int id = tid % size_per_head; int target_id = target_index(batch_id, head_id, seq_id, id, batch_size, head_num, seq_len, size_per_head); - half2* src_ptr = (half2*)src; - half2* dst_ptr = (half2*)dst; - dst_ptr[target_id] = src_ptr[tid]; + dst[target_id] = src[tid]; } +template<> +__global__ void +transpose(half2* src, half2* dst, const int batch_size, const int seq_len, const int head_num, const int size_per_head) +{ + int tid = blockIdx.x * blockDim.x + threadIdx.x; + + int batch_id = tid / (head_num * seq_len * size_per_head); + int head_id = (tid % (head_num * seq_len * size_per_head)) / (seq_len * size_per_head); + int seq_id = (tid % (seq_len * size_per_head)) / size_per_head; + int id = tid % size_per_head; + + int target_id = target_index(batch_id, head_id, seq_id, id, batch_size, head_num, seq_len, size_per_head); + + dst[target_id] = src[tid]; +} + +#ifdef ENABLE_BF16 +template<> +__global__ void transpose(__nv_bfloat16* src, + __nv_bfloat16* dst, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head) +{ + int tid = blockIdx.x * blockDim.x + threadIdx.x; + + int batch_id = tid / (head_num * seq_len * size_per_head); + int head_id = (tid % (head_num * seq_len * size_per_head)) / (seq_len * size_per_head); + int seq_id = (tid % (seq_len * size_per_head)) / size_per_head; + int id = tid % size_per_head; + + int target_id = target_index(batch_id, head_id, seq_id, id, batch_size, head_num, seq_len, size_per_head); + + dst[target_id] = src[tid]; +} + +template<> +__global__ void transpose(__nv_bfloat162* src, + __nv_bfloat162* dst, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head) +{ + int tid = blockIdx.x * blockDim.x + threadIdx.x; + + int batch_id = tid / (head_num * seq_len * size_per_head); + int head_id = (tid % (head_num * seq_len * size_per_head)) / (seq_len * size_per_head); + int seq_id = (tid % (seq_len * size_per_head)) / size_per_head; + int id = tid % size_per_head; + + int target_id = target_index(batch_id, head_id, seq_id, id, batch_size, head_num, seq_len, size_per_head); + + dst[target_id] = src[tid]; +} +#endif + template void invokeTransposeQKV(T* dst, T* src, @@ -542,13 +719,32 @@ void invokeTransposeQKV(T* dst, { dim3 grid, block; if (sizeof(T) == 2) { - const int seq_per_block = 4; + int seq_per_block = 1; grid.x = batch_size * head_num * seq_len / seq_per_block; - block.x = seq_per_block * size_per_head / 2; + while (seq_per_block < 4 && grid.x % 2 == 0) { + grid.x /= 2; + seq_per_block *= 2; + } - assert(grid.x * seq_per_block == batch_size * head_num * seq_len); + FT_CHECK(grid.x * seq_per_block == batch_size * head_num * seq_len); - transpose<<>>(src, dst, batch_size, seq_len, head_num, size_per_head / 2); + if (seq_per_block * size_per_head % 2 == 0) { + block.x = seq_per_block * size_per_head / 2; + if (std::is_same::value) { + transpose<<>>( + (half2*)src, (half2*)dst, batch_size, seq_len, head_num, size_per_head / 2); + } +#ifdef ENABLE_BF16 + else { + transpose<__nv_bfloat162><<>>( + (__nv_bfloat162*)src, (__nv_bfloat162*)dst, batch_size, seq_len, head_num, size_per_head / 2); + } +#endif + } + else { + block.x = seq_per_block * size_per_head; + transpose<<>>(src, dst, batch_size, seq_len, head_num, size_per_head); + } } else { const int seq_per_block = 1; @@ -574,6 +770,16 @@ template void invokeTransposeQKV(half* src, const int size_per_head, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void invokeTransposeQKV(__nv_bfloat16* src, + __nv_bfloat16* dst, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + cudaStream_t stream); +#endif + template __global__ void add_QKV_bias_rebuild_padding(const T* Q, const T* bias_Q, @@ -770,13 +976,13 @@ template void invokeAddQKVBiasRebuildPadding(half* Q, cudaStream_t stream); template -__global__ void transpose_rebuild_padding(const T* src, - T* dst, - const int batch_size, - const int seq_len, - const int head_num, - const int size_per_head, - const int* mask_offset) +__global__ void transpose_remove_padding(const T* src, + T* dst, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const int* mask_offset) { // TODO: optimize this kernel? // do remove_sequence_length_padding @@ -826,11 +1032,11 @@ void invokeTransposeAttentionOutRemovePadding(T* src, } if (is_half2) { - transpose_rebuild_padding<<>>( + transpose_remove_padding<<>>( (half2*)src, (half2*)dst, batch_size, seq_len, head_num, size_per_head / 2, mask_offset); } else { - transpose_rebuild_padding<<>>( + transpose_remove_padding<<>>( src, dst, batch_size, seq_len, head_num, size_per_head, mask_offset); } } @@ -875,7 +1081,7 @@ __global__ void add_fusedQKV_bias_transpose_kernel(T* q_buf, for (int index = blockDim.x * blockIdx.x + threadIdx.x; index < batch_size * seq_len * 3 * n; index += gridDim.x * blockDim.x) { int bias_id = index % (3 * n); - T val = __ldg(&QKV[index]) + __ldg(&qkv_bias[bias_id]); + T val = ldg(&QKV[index]) + ldg(&qkv_bias[bias_id]); int tmp_index = index; const int target_batch_id = tmp_index / (seq_len * 3 * n); @@ -893,8 +1099,7 @@ __global__ void add_fusedQKV_bias_transpose_kernel(T* q_buf, } template -struct Vec_t { -}; +struct Vec_t {}; template<> struct Vec_t { using Type = float2; @@ -904,6 +1109,13 @@ struct Vec_t { using Type = uint32_t; }; +#ifdef ENABLE_BF16 +template<> +struct Vec_t<__nv_bfloat16> { + using Type = __nv_bfloat162; +}; +#endif + template __global__ void add_fusedQKV_bias_transpose_kernel(T* q_buf, T* k_buf, @@ -921,8 +1133,9 @@ __global__ void add_fusedQKV_bias_transpose_kernel(T* q_buf, const int head_idx = blockIdx.y; const int seq_idx = blockIdx.x; const int tidx = threadIdx.x; - if (tidx * 2 >= size_per_head) + if (tidx * 2 >= size_per_head) { return; + } const int batch_time_idx = seq_len * batch_idx + seq_idx; const int hidden_idx = head_idx * size_per_head + tidx * 2; @@ -1011,6 +1224,20 @@ template void invokeAddFusedQKVBiasTranspose(half* q_buf, const int rotary_embedding_dim, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void invokeAddFusedQKVBiasTranspose(__nv_bfloat16* q_buf, + __nv_bfloat16* k_buf, + __nv_bfloat16* v_buf, + __nv_bfloat16* QKV, + const __nv_bfloat16* qkv_bias, + const int batch_size, + const int seq_len, + const int head_num, + const int size_per_head, + const int rotary_embedding_dim, + cudaStream_t stream); +#endif + template __global__ void transpose_4d(T* dst, T* src, @@ -1154,8 +1381,9 @@ __global__ void transpose_4d_batch_major_v_cache( constexpr int X_ELEMS = (sizeof(T) == 4) ? 4 : 8; const int size_per_head_div_x = size_per_head / X_ELEMS; - if (idx >= size_per_head_div_x * seq_len) + if (idx >= size_per_head_div_x * seq_len) { return; + } val_dst[idx] = val_src[idx]; } @@ -1207,6 +1435,19 @@ template void invokeTranspose4dBatchMajor(half* k_dst, const int local_head_num, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void invokeTranspose4dBatchMajor(__nv_bfloat16* k_dst, + __nv_bfloat16* v_dst, + const __nv_bfloat16* k_src, + const __nv_bfloat16* v_src, + const int local_batch_size, + const int seq_len, + const int max_seq_len, + const int size_per_head, + const int local_head_num, + cudaStream_t stream); +#endif + template __global__ void addRelativeAttentionBias( T* qk_buf, const T* relative_attention_bias, const int batch_size, const int head_num, const int seq_len) @@ -1232,7 +1473,7 @@ __global__ void addRelativeAttentionBias( const int bias_index = blockIdx.x * half2_seq_len + seq_id; const int qk_index = batch_id * gridDim.x * half2_seq_len + bias_index; - qk_buf[qk_index] = qk_buf[qk_index] + relative_attention_bias[bias_index]; + qk_buf[qk_index] += relative_attention_bias[bias_index]; } } @@ -1272,4 +1513,351 @@ template void invokeAddRelativeAttentionBias(half* qk_buf, const int seq_len, cudaStream_t stream); +/******************* invokeAddHead3SizeQKVBias ***********************/ +// m = batch*window_num*window_len +// mm_qkv is [m, head*3*size_per_head] row-major +// bias_qkv is [head*3*size_per_head] +// q_buf_, k_buf_, v_buf_ is [batch*window_num, num_head, window_len, size_per_head] row-major +// grid(window_len, window_num, 3*batch); +// block(num_head * size_per_head) +template +__global__ void add_head3Size_QKV_bias(const T* mm_qkv, + const T* bias_qkv, + T* q_buf_, + T* k_buf_, + T* v_buf_, + const int batch, + const int window_num, + const int window_len, + const int num_head, + const int size_per_head) +{ + + T* buf_ptr; + int qkv_id = blockIdx.z / batch; + if (qkv_id == 0) { + buf_ptr = q_buf_; + } + else if (qkv_id == 1) { + buf_ptr = k_buf_; + } + else { + buf_ptr = v_buf_; + } + + const int batch_id = blockIdx.z % batch; + const int token_id = blockIdx.x; + const int window_id = blockIdx.y; + const int head_id = threadIdx.x / size_per_head; + const int id_in_head = threadIdx.x % size_per_head; + + const int bias_idx = (head_id * 3 + qkv_id) * size_per_head + id_in_head; + const T bias = __ldg(bias_qkv + bias_idx); + + const int input_idx = + ((batch_id * window_num + window_id) * window_len + token_id) * num_head * 3 * size_per_head + bias_idx; + T tmp = mm_qkv[input_idx] + bias; + + int target_id = (((batch_id * window_num + window_id) * num_head + head_id) * window_len + token_id) * size_per_head + + id_in_head; + ; + buf_ptr[target_id] = tmp; +} + +// for float2, size_per_head /= 2 +// m = batch*window_num*window_len +// mm_qkv is [m, head*3*size_per_head] row-major +// bias_qkv is [head*3*size_per_head] +// q_buf_, k_buf_, v_buf_ is [batch*window_num, num_head, window_len, size_per_head] row-major +// grid(window_len, window_num, 3*batch); +// block(num_head * size_per_head) +template<> +__global__ void add_head3Size_QKV_bias(const float2* mm_qkv, + const float2* bias_qkv, + float2* q_buf_, + float2* k_buf_, + float2* v_buf_, + const int batch, + const int window_num, + const int window_len, + const int num_head, + const int size_per_head) +{ + + float2* buf_ptr; + int qkv_id = blockIdx.z / batch; + if (qkv_id == 0) { + buf_ptr = q_buf_; + } + else if (qkv_id == 1) { + buf_ptr = k_buf_; + } + else { + buf_ptr = v_buf_; + } + + const int batch_id = blockIdx.z % batch; + const int token_id = blockIdx.x; + const int window_id = blockIdx.y; + const int head_id = threadIdx.x / size_per_head; + const int id_in_head = threadIdx.x % size_per_head; + + const int bias_idx = (head_id * 3 + qkv_id) * size_per_head + id_in_head; + const float2 bias = __ldg(bias_qkv + bias_idx); + + const int input_idx = + ((batch_id * window_num + window_id) * window_len + token_id) * num_head * 3 * size_per_head + bias_idx; + float2 tmp = mm_qkv[input_idx]; + tmp.x += bias.x; + tmp.y += bias.y; + + int target_id = (((batch_id * window_num + window_id) * num_head + head_id) * window_len + token_id) * size_per_head + + id_in_head; + ; + buf_ptr[target_id] = tmp; +} + +// for half2, size_per_head /= 2 +// m = batch*window_num*window_len +// mm_qkv is [m, head*3*size_per_head] row-major +// bias_qkv is [head*3*size_per_head] +// q_buf_, k_buf_, v_buf_ is [batch*window_num, num_head, window_len, size_per_head] row-major +// grid(window_len, window_num, batch); +// block(num_head * size_per_head) +template<> +__global__ void add_head3Size_QKV_bias(const half2* mm_qkv, + const half2* bias_qkv, + half2* q_buf_, + half2* k_buf_, + half2* v_buf_, + const int batch, + const int window_num, + const int window_len, + const int num_head, + const int size_per_head) +{ + + const int batch_id = blockIdx.z; + const int token_id = blockIdx.x; + const int window_id = blockIdx.y; + const int head_id = threadIdx.x / size_per_head; + const int id_in_head = threadIdx.x % size_per_head; + + const int input_offset = + ((batch_id * window_num + window_id) * window_len + token_id) * num_head * 3 * size_per_head; + const int target_id = + (((batch_id * window_num + window_id) * num_head + head_id) * window_len + token_id) * size_per_head + + id_in_head; + + int qkv_id = 0; + int bias_idx = (head_id * 3 + qkv_id) * size_per_head + id_in_head; + half2 bias = __ldg(bias_qkv + bias_idx); + int input_idx = input_offset + bias_idx; + half2 tmp = mm_qkv[input_idx]; + tmp = __hadd2(tmp, bias); + q_buf_[target_id] = tmp; + + qkv_id = 1; + bias_idx = (head_id * 3 + qkv_id) * size_per_head + id_in_head; + bias = __ldg(bias_qkv + bias_idx); + input_idx = input_offset + bias_idx; + tmp = mm_qkv[input_idx]; + tmp = __hadd2(tmp, bias); + k_buf_[target_id] = tmp; + + qkv_id = 2; + bias_idx = (head_id * 3 + qkv_id) * size_per_head + id_in_head; + bias = __ldg(bias_qkv + bias_idx); + input_idx = input_offset + bias_idx; + tmp = mm_qkv[input_idx]; + tmp = __hadd2(tmp, bias); + v_buf_[target_id] = tmp; +} + +template +void invokeAddHead3SizeQKVBias(const T* mm_qkv, + const T* bias_qkv, + T* q_buf_, + T* k_buf_, + T* v_buf_, + const int batch, + const int window_num, + const int window_len, + const int num_head, + const int size_per_head, + cudaStream_t stream) +{ + if (std::is_same::value) { + dim3 grid(window_len, window_num, 3 * batch); + dim3 block(num_head * size_per_head); + + if (block.x < 1024) { + add_head3Size_QKV_bias<<>>( + mm_qkv, bias_qkv, q_buf_, k_buf_, v_buf_, batch, window_num, window_len, num_head, size_per_head); + } + else if ((block.x % 2 == 0) && (block.x / 2 < 1024)) { + block.x /= 2; + add_head3Size_QKV_bias<<>>((const float2*)mm_qkv, + (const float2*)bias_qkv, + (float2*)q_buf_, + (float2*)k_buf_, + (float2*)v_buf_, + batch, + window_num, + window_len, + num_head, + size_per_head / 2); + } + else { + printf("[ERROR][invokeAddHead3SizeQKVBias] unsupport block.x!\n"); + exit(-1); + } + } + else if (std::is_same::value) { + dim3 grid(window_len, window_num, batch); + dim3 block(num_head * size_per_head / 2); + + if (block.x > 1024) { + printf("[ERROR][invokeAddHead3SizeQKVBias] block.x > 1024!\n"); + exit(-1); + } + + add_head3Size_QKV_bias<<>>((const half2*)mm_qkv, + (const half2*)bias_qkv, + (half2*)q_buf_, + (half2*)k_buf_, + (half2*)v_buf_, + batch, + window_num, + window_len, + num_head, + size_per_head / 2); + } +} + +template void invokeAddHead3SizeQKVBias(const float* mm_qkv, + const float* bias_qkv, + float* q_buf_, + float* k_buf_, + float* v_buf_, + const int batch, + const int window_num, + const int window_len, + const int num_head, + const int size_per_head, + cudaStream_t stream); + +template void invokeAddHead3SizeQKVBias(const half* mm_qkv, + const half* bias_qkv, + half* q_buf_, + half* k_buf_, + half* v_buf_, + const int batch, + const int window_num, + const int window_len, + const int num_head, + const int size_per_head, + cudaStream_t stream); + +/******************* invokeMaskedSoftMax ***********************/ + +// grid = (window_len/word_per_thread, window_num*num_head, batch_size) +// block.x = max(32, (window_len + 31)/32*32) +// qk_buf is [batch, window_num, num_head, window_len, window_len] +// attn_mask is [window_num, window_len, window_len] + row-major +// relative_pos_bias is [num_head, window_len, window_len] + row-majot +template +__global__ void softmax_kernel(T* qk_buf, + const T* attn_mask, + const T* relative_pos_bias, + const int batch_size, + const int num_head, + const int window_num, + const int window_len, + const int window_len_x_window_len, + const float qk_scale) +{ + + bool qual = threadIdx.x < window_len; + for (int window_id = blockIdx.x; window_id < window_len; window_id += gridDim.x) { + float tmp = -1e20f; + __shared__ float s_mean, s_max; + int qk_offset; + if (qual) { + const int offset_in_window = window_id * window_len + threadIdx.x; + qk_offset = (blockIdx.z * gridDim.y + blockIdx.y) * window_len_x_window_len + offset_in_window; + const int relative_pos_bias_offset = (blockIdx.y % num_head) * window_len_x_window_len + offset_in_window; + float mask_val = + (attn_mask == nullptr) ? + 0.0f : + static_cast( + __ldg(attn_mask + ((blockIdx.y / num_head) * window_len_x_window_len + offset_in_window))); + tmp = qk_scale * static_cast(qk_buf[qk_offset]) + mask_val + + static_cast(__ldg(relative_pos_bias + relative_pos_bias_offset)); + } + + float max_val = blockReduceMax(tmp); + if (threadIdx.x == 0) { + s_max = max_val; + } + __syncthreads(); + + float qk_tmp = qual ? __expf(tmp - s_max) : 0.0f; + float sum_val = blockReduceSum(qk_tmp); + if (threadIdx.x == 0) { + s_mean = sum_val + 1e-6f; + s_mean = __fdividef(1.0f, s_mean); + } + __syncthreads(); + if (qual) { + qk_buf[qk_offset] = (T)(qk_tmp * s_mean); + } + } +} + +template +void invokeMaskedSoftMaxWithRelPosBias(T* qk_buf, + const T* attn_mask, + const T* relative_pos_bias, + const int batch_size, + const int num_head, + const int window_num, + const int window_len, + float qk_scale, + cudaStream_t stream) +{ + const int word_per_thread = 1; + dim3 grid(window_len / word_per_thread, window_num * num_head, batch_size); + dim3 block((window_len + 31) / 32 * 32); + softmax_kernel<<>>(qk_buf, + attn_mask, + relative_pos_bias, + batch_size, + num_head, + window_num, + window_len, + window_len * window_len, + qk_scale); +} + +template void invokeMaskedSoftMaxWithRelPosBias(float* qk_buf, + const float* attn_mask, + const float* relative_pos_bias, + const int batch_size, + const int num_head, + const int window_num, + const int window_len, + const float qk_scale, + cudaStream_t stream); + +template void invokeMaskedSoftMaxWithRelPosBias(half* qk_buf, + const half* attn_mask, + const half* relative_pos_bias, + const int batch_size, + const int num_head, + const int window_num, + const int window_len, + const float qk_scale, + cudaStream_t stream); + } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/unfused_attention_kernels.h b/src/fastertransformer/kernels/unfused_attention_kernels.h index ac23fb826..be8b178e9 100644 --- a/src/fastertransformer/kernels/unfused_attention_kernels.h +++ b/src/fastertransformer/kernels/unfused_attention_kernels.h @@ -93,9 +93,8 @@ void invokeAddFusedQKVBiasTranspose(T* q_buf, const int size_per_head, cudaStream_t stream) { - invokeAddFusedQKVBiasTranspose(q_buf, k_buf, v_buf, QKV, - qkv_bias, batch_size, seq_len, - head_num, size_per_head, 0, stream); + invokeAddFusedQKVBiasTranspose( + q_buf, k_buf, v_buf, QKV, qkv_bias, batch_size, seq_len, head_num, size_per_head, 0, stream); } template @@ -143,4 +142,28 @@ void invokeAddRelativeAttentionBias(T* qk_buf, const int seq_len, cudaStream_t stream); +template +void invokeAddHead3SizeQKVBias(const T* mm_qkv, + const T* bias_qkv, + T* q_buf_, + T* k_buf_, + T* v_buf_, + const int batch, + const int window_num, + const int window_len, + const int head_num, + const int size_per_head, + cudaStream_t stream); + +template +void invokeMaskedSoftMaxWithRelPosBias(T* qk_buf, + const T* attn_mask, + const T* relative_pos_bias, + const int batch_size, + const int num_head, + const int window_num, + const int window_len, + const float qk_scale, + cudaStream_t stream); + } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/vit_kernels.cu b/src/fastertransformer/kernels/vit_kernels.cu new file mode 100644 index 000000000..5cdd30f11 --- /dev/null +++ b/src/fastertransformer/kernels/vit_kernels.cu @@ -0,0 +1,305 @@ +/* + * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/vit_kernels.h" +#include "src/fastertransformer/utils/cuda_utils.h" +namespace fastertransformer { + +template +__global__ void add_bias_slice( + const T* __restrict in, T* __restrict out, const T* __restrict bias, int m, int n, int s, bool on_top = true) +{ + // s = slice_cnt, input_slice_size = s*n, + // n = element size after concate axis. for example: [2,3,4,5] concate_axis = 1, then n = 4*5=20 + // on_top: concate slice on top or not. + const int offset = on_top ? 1 : 0; + + for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < m * n; id += blockDim.x * gridDim.x) { + int slice_id = id / (s * n); + out[id + (slice_id + offset) * n] = __ldg(&in[id]) + __ldg(&bias[id % n]); + } +} + +template<> +__global__ void add_bias_slice( + const half* __restrict in, half* __restrict out, const half* __restrict bias, int m, int n, int s, bool on_top) +{ + const int offset = on_top ? 1 : 0; + const half2* in_ptr = (half2*)in; + const half2* bias_ptr = (half2*)bias; + half2* out_ptr = (half2*)out; + + for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < m * n; id += blockDim.x * gridDim.x) { + half2 d1 = __ldg(&in_ptr[id]); + half2 d2 = __ldg(&bias_ptr[id % n]); + int slice_id = id / (s * n); + out_ptr[id + (slice_id + offset) * n] = __hadd2(d1, d2); + } +} + +template +void invokeAddBiasSlice(T* in, T* out, const T* bias, const int m, const int n, const int s, cudaStream_t stream) +{ + const int data_type_factor = 4 / sizeof(T); // 1 for fp32, 2 for fp16 + dim3 block, grid; + if (n / 4 / data_type_factor <= 1024) { + block.x = n / 4 / data_type_factor; + grid.x = m; + } + else { + block.x = 1024; + grid.x = (m * n + 1023) / 1024; + } + add_bias_slice<<>>(in, out, bias, m, n / data_type_factor, s); +} + +template +__global__ void add_bias_concat_clstoken_add_posembed(const T* __restrict in, // b*h*w*n + T* __restrict out, // b*(h*w+1)*n + const T* __restrict bias, // n + const T* __restrict cls_token, // n + const T* __restrict pos_embed, // (h*w+1)*n + const int m, // b * (h*w+1) + const int n, + const int s, // h*w+1 + bool on_top = true) +{ + const int concat_row_idx = on_top ? 0 : (s - 1); + const int offset = on_top ? 1 : 0; + + for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < m * n; id += blockDim.x * gridDim.x) { + int col_idx = id % n; + int row_idx = id / n; + int slice_row_idx = row_idx % s; + int slice_idx = row_idx / s; + int idx_s = slice_row_idx * n + col_idx; + int idx_i = (slice_row_idx - offset + slice_idx * (s - 1)) * n + col_idx; + + if (slice_row_idx == concat_row_idx) { + out[id] = __ldg(&cls_token[col_idx]) + __ldg(&pos_embed[idx_s]); + } + else { + out[id] = __ldg(&in[idx_i]) + __ldg(&bias[col_idx]) + __ldg(&pos_embed[idx_s]); + } + } +} + +template<> +__global__ void add_bias_concat_clstoken_add_posembed(const half* __restrict in, // b*h*w*n + half* __restrict out, // b*(h*w+1)*n + const half* __restrict bias, // n + const half* __restrict cls_token, // n + const half* __restrict pos_embed, // (h*w+1)*n + const int m, // b * (h*w+1) + const int n, + const int s, // h*w+1 + bool on_top) +{ + const int concat_row_idx = on_top ? 0 : (s - 1); + const int offset = on_top ? 1 : 0; + half2* out_ptr = (half2*)out; + const half2* in_ptr = (half2*)in; + const half2* bias_ptr = (half2*)bias; + const half2* token_ptr = (half2*)cls_token; + const half2* embed_ptr = (half2*)pos_embed; + + for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < m * n; id += blockDim.x * gridDim.x) { + int col_idx = id % n; + int row_idx = id / n; + int slice_row_idx = row_idx % s; + int slice_idx = row_idx / s; + int idx_s = slice_row_idx * n + col_idx; + int idx_i = (slice_row_idx - offset + slice_idx * (s - 1)) * n + col_idx; + + if (slice_row_idx == concat_row_idx) { + half2 d1 = __ldg(&token_ptr[col_idx]); + half2 d2 = __ldg(&embed_ptr[idx_s]); + out_ptr[id] = __hadd2(d1, d2); + } + else { + half2 d1 = __ldg(&in_ptr[idx_i]); + half2 d2 = __ldg(&bias_ptr[col_idx]); + half2 d3 = __ldg(&embed_ptr[idx_s]); + out_ptr[id] = __hadd2(d3, __hadd2(d1, d2)); + } + } +} + +template +void invokeAddBiasConcatClsTokenAddPosEmbed(const T* in, + T* out, + const T* bias, + const T* cls_token, + const T* pos_embed, + const int m, + const int n, + const int s, + cudaStream_t stream) +{ + const int data_type_factor = 4 / sizeof(T); // 1 for fp32, 2 for fp16 + dim3 block, grid; + if (n / 4 / data_type_factor <= 1024) { + block.x = n / 4 / data_type_factor; + grid.x = m; + } + else { + block.x = 1024; + grid.x = (m * n + 1023) / 1024; + } + add_bias_concat_clstoken_add_posembed<<>>( + in, out, bias, cls_token, pos_embed, m, n / data_type_factor, s); +} + +template void invokeAddBiasConcatClsTokenAddPosEmbed(const float* in, + float* out, + const float* bias, + const float* cls_token, + const float* pos_embed, + const int m, + const int n, + const int s, + cudaStream_t stream); + +template void invokeAddBiasConcatClsTokenAddPosEmbed(const half* in, + half* out, + const half* bias, + const half* cls_token, + const half* pos_embed, + const int m, + const int n, + const int s, + cudaStream_t stream); + +template +__global__ void +slice_copy(const T* __restrict in, T* __restrict out, const int m, const int n, const int s, const int offset_s) +{ + int idx = blockDim.x * blockIdx.x + threadIdx.x; + if (idx > m * n) { + return; + } + + int m_idx = idx / n; + int col = idx % n; + int in_idx = (m_idx * s + offset_s) * n + col; + + out[idx] = __ldg(&in[in_idx]); +} + +template<> +__global__ void +slice_copy(const half* __restrict in, half* __restrict out, const int m, const int n, const int s, const int offset_s) +{ + int idx = blockDim.x * blockIdx.x + threadIdx.x; + if (idx > m * n) { + return; + } + + int m_idx = idx / n; + int col = idx % n; + int in_idx = (m_idx * s + offset_s) * n + col; + + half2* out_ptr = (half2*)out; + const half2* in_ptr = (half2*)in; + + out_ptr[idx] = __ldg(&in_ptr[in_idx]); +} + +template +void invokeSliceCopy( + const T* in, T* out, const int m, const int n, const int s, const int offset_s, cudaStream_t stream) +{ + const int data_type_factor = 4 / sizeof(T); // 1 for fp32, 2 for fp16 + dim3 block, grid; + if (n / data_type_factor <= 1024) { + block.x = n / data_type_factor; + grid.x = m; + } + else { + block.x = 1024; + grid.x = (m * n + 1023) / 1024; + } + slice_copy<<>>(in, out, m, n / data_type_factor, s, offset_s); +} + +template void invokeSliceCopy( + const float* in, float* out, const int m, const int n, const int s, const int offset_s, cudaStream_t stream); +template void invokeSliceCopy( + const half* in, half* out, const int m, const int n, const int s, const int offset_s, cudaStream_t stream); + +template +__global__ void add_bias_add_posembed(T* __restrict out, // b*(h*w)*n + const T* __restrict bias, // n + const T* __restrict pos_embed, // (h*w)*n + const int m, // b * (h*w) + const int n, + const int s // h*w*n +) +{ + for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < m * n; id += blockDim.x * gridDim.x) { + int b_idx = id % n; + int p_idx = id % s; + + out[id] += __ldg(&bias[b_idx]) + __ldg(&pos_embed[p_idx]); + } +} + +template<> +__global__ void add_bias_add_posembed(half* __restrict out, // b*(h*w+1)*n + const half* __restrict bias, // n + const half* __restrict pos_embed, // (h*w)*n + const int m, // b * (h*w) + const int n, + const int s // h*w *n +) +{ + half2* out_ptr = (half2*)out; + const half2* bias_ptr = (half2*)bias; + const half2* embed_ptr = (half2*)pos_embed; + + for (int id = blockIdx.x * blockDim.x + threadIdx.x; id < m * n; id += blockDim.x * gridDim.x) { + int b_idx = id % n; + int p_idx = id % s; + half2 d1 = __ldg(&bias_ptr[b_idx]); + half2 d2 = __ldg(&embed_ptr[p_idx]); + out_ptr[id] = __hadd2(out_ptr[id], __hadd2(d1, d2)); + } +} + +template +void invokeAddBiasAddPosEmbed( + T* out, const T* bias, const T* pos_embed, const int m, const int n, const int s, cudaStream_t stream) +{ + const int data_type_factor = 4 / sizeof(T); // 1 for fp32, 2 for fp16 + dim3 block, grid; + if (n / 4 / data_type_factor <= 1024) { + block.x = n / 4 / data_type_factor; + grid.x = m; + } + else { + block.x = 1024; + grid.x = (m * n + 1023) / 1024; + } + add_bias_add_posembed<<>>(out, bias, pos_embed, m, n / data_type_factor, s); +} + +template void invokeAddBiasAddPosEmbed( + float* out, const float* bias, const float* pos_embed, const int m, const int n, const int s, cudaStream_t stream); + +template void invokeAddBiasAddPosEmbed( + half* out, const half* bias, const half* pos_embed, const int m, const int n, const int s, cudaStream_t stream); + +} // namespace fastertransformer diff --git a/src/fastertransformer/kernels/vit_kernels.h b/src/fastertransformer/kernels/vit_kernels.h new file mode 100644 index 000000000..354b07384 --- /dev/null +++ b/src/fastertransformer/kernels/vit_kernels.h @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#pragma once + +#include +#include + +namespace fastertransformer { + +template +void invokeAddBiasSlice(T* in, T* out, const T* bias, const int m, const int n, const int s, cudaStream_t stream); + +template +void invokeAddBiasConcatClsTokenAddPosEmbed(const T* in, + T* out, + const T* bias, + const T* cls_token, + const T* pos_embed, + const int m, + const int n, + const int s, + cudaStream_t stream); + +template +void invokeSliceCopy( + const T* in, T* out, const int m, const int n, const int s, const int offset_s, cudaStream_t stream); + +template +void invokeAddBiasAddPosEmbed( + T* out, const T* bias, const T* pos_embed, const int m, const int n, const int s, cudaStream_t stream); + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/kernels/xlnet_attention_kernels.cu b/src/fastertransformer/kernels/xlnet_attention_kernels.cu index 4f93a2c4b..1ae80a9b7 100644 --- a/src/fastertransformer/kernels/xlnet_attention_kernels.cu +++ b/src/fastertransformer/kernels/xlnet_attention_kernels.cu @@ -25,8 +25,9 @@ int next_pow2(int a) { int rval = 32; if (a > 32) { - while (rval < a) + while (rval < a) { rval <<= 1; + } } return rval; } @@ -53,16 +54,18 @@ __forceinline__ __device__ unsigned warp_id() template __inline__ __device__ T warpReduceSum(T val) { - for (int mask = 16; mask > 0; mask >>= 1) + for (int mask = 16; mask > 0; mask >>= 1) { val += __shfl_xor_sync(FINAL_MASK, val, mask, 32); + } return val; } template __inline__ __device__ T warpReduceMax(T val) { - for (int mask = 16; mask > 0; mask >>= 1) + for (int mask = 16; mask > 0; mask >>= 1) { val = max(val, __shfl_xor_sync(FINAL_MASK, val, mask, 32)); + } return val; } @@ -75,8 +78,9 @@ __inline__ __device__ T blockReduceSum(T val) val = warpReduceSum(val); - if (lane == 0) + if (lane == 0) { shared[wid] = val; + } __syncthreads(); @@ -95,8 +99,9 @@ __inline__ __device__ T blockReduceMax(T val) val = warpReduceMax(val); // get maxx in each warp - if (lane == 0) // record in-warp maxx by warp Idx + if (lane == 0) { // record in-warp maxx by warp Idx shared[wid] = val; + } __syncthreads(); @@ -437,9 +442,9 @@ __global__ void calAttnScore_valueBuf(T* attn_score, int out_index; T score; T mask; - T large_value= -1e4; - if(sizeof(T)==4){ - large_value=-1e30f; + T large_value = -1e4; + if (sizeof(T) == 4) { + large_value = -1e30f; } if (seq2 < seq_len) { score = ac[index] + bd[index] + ef[index]; @@ -453,8 +458,9 @@ __global__ void calAttnScore_valueBuf(T* attn_score, __shared__ float s_sum, s_max; float tmp = seq2 < seq_len ? score : large_value; float max_val = blockReduceMax(tmp); - if (seq2 == 0) + if (seq2 == 0) { s_max = max_val; + } __syncthreads(); float qk_tmp = seq2 < seq_len ? __expf((float)(tmp - s_max)) : 0.0f; float sum_val = blockReduceSum(qk_tmp); @@ -758,12 +764,14 @@ addBias_layerNorm(T* out, const T* input, const T* bias, const T* gamma, const T local_out += (float)(__ldg(&bias[id])); mean = blockReduceSum(local_out); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_mean = mean / n; + } __syncthreads(); variance = blockReduceSum((local_out - s_mean) * (local_out - s_mean)); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_variance = variance / n + epsilon; + } __syncthreads(); out[id] = @@ -802,15 +810,17 @@ __global__ void addBias_layerNorm(__half* out, local_out += local_out_fp2.y; mean = blockReduceSum(local_out); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_mean = mean / n; + } __syncthreads(); variance = (local_out_fp2.x - s_mean) * (local_out_fp2.x - s_mean); variance += (local_out_fp2.y - s_mean) * (local_out_fp2.y - s_mean); variance = blockReduceSum(variance); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_variance = rsqrtf(variance / n + epsilon); + } __syncthreads(); float2 gamma_val = __half22float2(__ldg(&gamma_ptr[tid])); diff --git a/src/fastertransformer/kernels/xlnet_attention_kernels.h b/src/fastertransformer/kernels/xlnet_attention_kernels.h index 2cc283d71..9579b86b0 100644 --- a/src/fastertransformer/kernels/xlnet_attention_kernels.h +++ b/src/fastertransformer/kernels/xlnet_attention_kernels.h @@ -23,50 +23,69 @@ namespace fastertransformer { #define FINAL_MASK 0xffffffff const float epsilon = 0.0f; -template -void invokePrepareMatrixes(int batch_size, int seq_len, int hidden_dim, - int size_per_head, T* q_buf, T* q_buf_bd, - T* q_buf_ef, T* k_buf, T* k_buf_bd, T* k_buf_ef, - T* query_buf, T* key_buf, T* k_head_r, - T* attr_seg_embed, T* attr_bias_Q_w, - T* attr_bias_Q_r, T* attr_bias_Q_s, +template +void invokePrepareMatrixes(int batch_size, + int seq_len, + int hidden_dim, + int size_per_head, + T* q_buf, + T* q_buf_bd, + T* q_buf_ef, + T* k_buf, + T* k_buf_bd, + T* k_buf_ef, + T* query_buf, + T* key_buf, + T* k_head_r, + T* attr_seg_embed, + T* attr_bias_Q_w, + T* attr_bias_Q_r, + T* attr_bias_Q_s, cudaStream_t stream); -template -void invokeTranspose102(int batch_size, int seq_len, int head_num, - T* qk_buf_ef_trans, T* qk_buf_ef, cudaStream_t stream); +template +void invokeTranspose102( + int batch_size, int seq_len, int head_num, T* qk_buf_ef_trans, T* qk_buf_ef, cudaStream_t stream); -template -void invokeTranspose201(int batch_size, int seq_len, int head_num, - T* qk_buf_ef_seg_trans, T* qk_buf_ef_seg, - cudaStream_t stream); +template +void invokeTranspose201( + int batch_size, int seq_len, int head_num, T* qk_buf_ef_seg_trans, T* qk_buf_ef_seg, cudaStream_t stream); -template -void invokeRelShiftBd(int batch_size, int head_num, int seq_len, - T* qk_buf_bd_shift, T* qk_buf_bd, cudaStream_t stream); +template +void invokeRelShiftBd(int batch_size, int head_num, int seq_len, T* qk_buf_bd_shift, T* qk_buf_bd, cudaStream_t stream); -template -void invokeCalAttnScore(int batch_size, int head_num, int seq_len, - int size_per_head, float q_scaling, T* attn_score, - T* qk_buf, T* qk_buf_bd_shift, T* qk_buf_ef_seg_trans, - T* attn_mask, T* value_buf_trans, T* value_buf, +template +void invokeCalAttnScore(int batch_size, + int head_num, + int seq_len, + int size_per_head, + float q_scaling, + T* attn_score, + T* qk_buf, + T* qk_buf_bd_shift, + T* qk_buf_ef_seg_trans, + T* attn_mask, + T* value_buf_trans, + T* value_buf, cudaStream_t stream); -template -void invokeTranspose102v2(int batch_size, int seq_len, int head_num, - int size_per_head, T* attn_vec_trans, T* attn_vec, - cudaStream_t stream); +template +void invokeTranspose102v2( + int batch_size, int seq_len, int head_num, int size_per_head, T* attn_vec_trans, T* attn_vec, cudaStream_t stream); -template -void invokeAddResidualLayerNorm(int batch_size, int seq_len, int hidden_dim, - T* attn_layernorm, T* attn_out, +template +void invokeAddResidualLayerNorm(int batch_size, + int seq_len, + int hidden_dim, + T* attn_layernorm, + T* attn_out, const T* in_tensor, const T* attr_layernorm_gamma, const T* attr_layernorm_beta, cudaStream_t stream); -template -void invokeGelu(int batch_size, int seq_len, int hidden_dim_ff, T* output_fc1, - const T* attr_fc1_bias, cudaStream_t stream); +template +void invokeGelu( + int batch_size, int seq_len, int hidden_dim_ff, T* output_fc1, const T* attr_fc1_bias, cudaStream_t stream); } // namespace fastertransformer diff --git a/src/fastertransformer/kernels/xlnet_preprocess_kernels.h b/src/fastertransformer/kernels/xlnet_preprocess_kernels.h index 5165c8fe3..7548aeb47 100644 --- a/src/fastertransformer/kernels/xlnet_preprocess_kernels.h +++ b/src/fastertransformer/kernels/xlnet_preprocess_kernels.h @@ -15,21 +15,27 @@ */ #pragma once +#include "src/fastertransformer/utils/cuda_utils.h" #include #include -#include "src/fastertransformer/utils/cuda_utils.h" namespace fastertransformer { -template +template void blockAttnMask(dim3& grid, dim3& block, int batch_size, int seq_len); -template -void genWordEmdK(int batch_size, int seq_len, int hidden_dim, T* word_emb_k, - T* params_word_emb_k, int* inp_k, cudaStream_t stream); +template +void genWordEmdK( + int batch_size, int seq_len, int hidden_dim, T* word_emb_k, T* params_word_emb_k, int* inp_k, cudaStream_t stream); -template -void preProcess(int batch_size, int seq_len, int hidden_dim, T* attn_mask, - float* input_mask, T* seg_mat, int* seg_id, T* attr_k_head_r, +template +void preProcess(int batch_size, + int seq_len, + int hidden_dim, + T* attn_mask, + float* input_mask, + T* seg_mat, + int* seg_id, + T* attr_k_head_r, cudaStream_t stream); } // namespace fastertransformer diff --git a/src/fastertransformer/layers/BaseLayer.h b/src/fastertransformer/layers/BaseLayer.h index cc087dd44..ad3a38707 100644 --- a/src/fastertransformer/layers/BaseLayer.h +++ b/src/fastertransformer/layers/BaseLayer.h @@ -37,9 +37,14 @@ class BaseLayer { allocator_(allocator), cuda_device_prop_(cuda_device_prop), is_free_buffer_after_forward_(is_free_buffer_after_forward), - sparse_(sparse) {}; + sparse_(sparse){}; virtual ~BaseLayer() = default; + virtual void setStream(cudaStream_t stream) + { + stream_ = stream; + } + protected: virtual void allocateBuffer() = 0; virtual void freeBuffer() = 0; @@ -51,7 +56,7 @@ class BaseLayer { cudaDeviceProp* cuda_device_prop_ = nullptr; bool is_free_buffer_after_forward_; - bool is_allocate_buffer_ = false; + bool is_allocate_buffer_ = false; // TODO (bhsueh) to be deprecated bool sparse_; }; diff --git a/src/fastertransformer/layers/CMakeLists.txt b/src/fastertransformer/layers/CMakeLists.txt index e2d1cd28a..cbaf4fac4 100644 --- a/src/fastertransformer/layers/CMakeLists.txt +++ b/src/fastertransformer/layers/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -30,14 +30,19 @@ set_property(TARGET FfnLayerINT8 PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET FfnLayerINT8 PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) target_link_libraries(FfnLayerINT8 PUBLIC -lcublasLt -lcublas -lcudart cublasMMWrapper cublasINT8MMWrapper activation_int8_kernels memory_utils) -if(BUILD_GPT) - add_library(TensorParallelGeluFfnLayer STATIC TensorParallelGeluFfnLayer.cc) - set_property(TARGET TensorParallelGeluFfnLayer PROPERTY POSITION_INDEPENDENT_CODE ON) - set_property(TARGET TensorParallelGeluFfnLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) - target_link_libraries(TensorParallelGeluFfnLayer PUBLIC -lcudart FfnLayer) +add_library(TensorParallelGeluFfnLayer STATIC TensorParallelGeluFfnLayer.cc) +set_property(TARGET TensorParallelGeluFfnLayer PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET TensorParallelGeluFfnLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(TensorParallelGeluFfnLayer PUBLIC -lcudart FfnLayer nccl_utils) - add_library(TensorParallelReluFfnLayer STATIC TensorParallelReluFfnLayer.cc) - set_property(TARGET TensorParallelReluFfnLayer PROPERTY POSITION_INDEPENDENT_CODE ON) - set_property(TARGET TensorParallelReluFfnLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) - target_link_libraries(TensorParallelReluFfnLayer PUBLIC -lcudart FfnLayer) -endif() +add_library(TensorParallelReluFfnLayer STATIC TensorParallelReluFfnLayer.cc) +set_property(TARGET TensorParallelReluFfnLayer PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET TensorParallelReluFfnLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(TensorParallelReluFfnLayer PUBLIC -lcudart FfnLayer nccl_utils) + +add_library(DynamicDecodeLayer STATIC DynamicDecodeLayer.cc) +set_property(TARGET DynamicDecodeLayer PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET DynamicDecodeLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(DynamicDecodeLayer PUBLIC -lcudart + TopKSamplingLayer TopPSamplingLayer TopKTopPSamplingLayer + OnlineBeamSearchLayer BeamSearchLayer ban_bad_words stop_criteria) diff --git a/src/fastertransformer/layers/DynamicDecodeBaseLayer.h b/src/fastertransformer/layers/DynamicDecodeBaseLayer.h index 78b0f0eec..c59479f43 100644 --- a/src/fastertransformer/layers/DynamicDecodeBaseLayer.h +++ b/src/fastertransformer/layers/DynamicDecodeBaseLayer.h @@ -16,6 +16,9 @@ #pragma once +#include +#include + #include "src/fastertransformer/layers/BaseLayer.h" namespace fastertransformer { @@ -33,10 +36,12 @@ class DynamicDecodeBaseLayer: public BaseLayer { cudaDeviceProp* cuda_device_prop): BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward, cuda_device_prop){}; ~DynamicDecodeBaseLayer() = default; - DynamicDecodeBaseLayer(DynamicDecodeBaseLayer const& dynmaic_decode_layer): BaseLayer(dynmaic_decode_layer){}; + DynamicDecodeBaseLayer(DynamicDecodeBaseLayer const& dynamic_decode_layer): BaseLayer(dynamic_decode_layer){}; virtual void forward(std::vector* output_tensors, const std::vector* input_tensors) = 0; + virtual void forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors) = 0; }; } // namespace fastertransformer diff --git a/src/fastertransformer/layers/DynamicDecodeLayer.cc b/src/fastertransformer/layers/DynamicDecodeLayer.cc new file mode 100644 index 000000000..8b834bc41 --- /dev/null +++ b/src/fastertransformer/layers/DynamicDecodeLayer.cc @@ -0,0 +1,404 @@ +/* + * Copyright (c) 2022-2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/layers/DynamicDecodeLayer.h" +#include "src/fastertransformer/kernels/ban_bad_words.h" +#include "src/fastertransformer/kernels/stop_criteria_kernels.h" +#include "src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.h" +#include "src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.h" +#include "src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.h" +#include "src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.h" +#include "src/fastertransformer/layers/sampling_layers/TopKTopPSamplingLayer.h" +#include "src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.h" + +namespace fastertransformer { + +template +void DynamicDecodeLayer::allocateBuffer() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + return; +} + +template +void DynamicDecodeLayer::freeBuffer() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + return; +} + +template +void DynamicDecodeLayer::initialize() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + online_beamsearch_decode_ = new OnlineBeamSearchLayer(0, // max_batch_size, deprecated + 0, // local_head_num, deprecated + 0, // size_per_head, deprecated + 0, // beam_width, deprecated + vocab_size_, + vocab_size_padded_, + 0, // end_id, deprecated + 0.0f, // beam_search_diversity_rate_, deprecated + 1.0f, // temperature_, deprecated + 1.0f, // len_penalty_, deprecated + 1.0f, // repetition_penalty_, deprecated + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_); + + beamsearch_decode_ = new BeamSearchLayer(0, // max_batch_size, deprecated + 0, // local_head_num, deprecated + 0, // size_per_head, deprecated + 0, // beam_width, deprecated + vocab_size_, + vocab_size_padded_, + 0, // end_id, deprecated + 0.0f, // beam_search_diversity_rate_, deprecated + 1.0f, // temperature_, deprecated + 1.0f, // len_penalty_, deprecated + 1.0f, // repetition_penalty_, deprecated + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_); + + topk_decode_ = new TopKSamplingLayer(0, + vocab_size_, + vocab_size_padded_, + 0, // end_id, deprecated + 0, // top_k_, deprecated + 0, // random_seed_, deprecated + 1.0f, // temperature_, deprecated + 1.0f, // len_penalty_, deprecated + 1.0f, // repetition_penalty_, deprecated + stream_, + cublas_wrapper_, + allocator_, + false); + + topp_decode_ = new TopPSamplingLayer(0, + vocab_size_, + vocab_size_padded_, + 0, // end_id, deprecated + 0.0f, // top_p_, deprecated + 0, // random_seed_, deprecated + 1.0f, // temperature_, deprecated + 1.0f, // len_penalty_, deprecated + 1.0f, // repetition_penalty_, deprecated + stream_, + cublas_wrapper_, + allocator_, + false, + cuda_device_prop_); + + topk_topp_decode_ = new TopKTopPSamplingLayer(0, + vocab_size_, + vocab_size_padded_, + 0, // end_id, deprecated + 0, // top_k_, deprecated + 0.0f, // top_p_, deprecated + 0, // random_seed_, deprecated + 1.0f, // temperature_, deprecated + 1.0f, // len_penalty_, deprecated + 1.0f, // repetition_penalty_, deprecated + stream_, + cublas_wrapper_, + allocator_, + false); +} + +template +DynamicDecodeLayer::DynamicDecodeLayer(size_t vocab_size, + size_t vocab_size_padded, + int end_id, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + cudaDeviceProp* cuda_device_prop): + BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), + vocab_size_(vocab_size), + vocab_size_padded_(vocab_size_padded), + cuda_device_prop_(cuda_device_prop) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + initialize(); +} + +template +DynamicDecodeLayer::~DynamicDecodeLayer() +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); +} + +template +DynamicDecodeLayer::DynamicDecodeLayer(DynamicDecodeLayer const& dynamic_decode_layer): + BaseLayer(dynamic_decode_layer), + vocab_size_(dynamic_decode_layer.vocab_size_), + vocab_size_padded_(dynamic_decode_layer.vocab_size_padded_), + cuda_device_prop_(dynamic_decode_layer.cuda_device_prop_) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + initialize(); +} + +template +void DynamicDecodeLayer::forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors) +{ + // TODO(bhsueh) + // check that can we remove the src_key_cache from inputs + + /** + * input_tensors: + * \param logits [batch_size, beam_width, vocab_size_padded] + * \param embedding_bias [vocab_size_padded] + * \param step [1] on cpu + * \param max_input_length [1] on cpu + * \param input_lengths [batch_size, beam_width] + * \param ite [1] on cpu + * \param local_batch_size [1] on cpu + * \param has_diff_runtime_args [1] on cpu + * \param stop_words_list [batch_size, 2, stop_words_length], optional + * \param runtime_top_k [1] or [batch_size] on cpu, optional + * \param runtime_top_p [1] or [batch_size] on cpu, optional + * \param temperature [1] or [batch_size] on cpu, optional + * \param len_penalty [1] or [batch_size] on cpu, optional + * \param repetition_penalty [1] or [batch_size] on cpu, optional + * \param random_seed [1] or [batch_size] on cpu, optional + * \param bad_words_list [2, bad_words_length] or [batch_size, 2, bad_words_length], optional + * \param src_key_cache + [layer, batch_size * beam_width, local_head_num, + size_per_head / (16 / sizeof(T)), max_output_seq_len, 16 / sizeof(T)] + necessary in beam search + * \param src_value_cache + [layer, batch_size * beam_width, local_head_num, max_output_seq_len, size_per_head] + necessary in beam search + * \param src_cache_indirection + [local_batch_size, beam_width, max_seq_len] + the k/v cache index for beam search + * \param is_initialize_random_table [1] on cpu, bool + + * output_tensors: + * \param output_ids [max_seq_len, batch_size] + * \param finished [batch_size * beam_width] + * \param cum_log_probs [batch_size * beam_width], necessary in beam search + * \param parent_ids [max_seq_len, batch_size * beam_width] + * \param sequence_length [batch_size * beam_width] + * \param output_log_probs [request_ouptut_length, batch_size * beam_width], must be float*, optional + * \param tgt_cache_indirection + [local_batch_size, beam_width, max_seq_len] + the k/v cache index for beam search + + **/ + + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + const int ite = input_tensors->at("ite").getVal(); + const int step = input_tensors->at("step").getVal(); + const int has_diff_runtime_args = input_tensors->at("has_diff_runtime_args").getVal(); + FT_CHECK(input_tensors->at("logits").shape.size() == 3); + const size_t batch_size = input_tensors->at("logits").shape[0]; + const size_t beam_width = input_tensors->at("logits").shape[1]; + const size_t local_batch_size = (size_t)input_tensors->at("local_batch_size").getVal(); + + int* tmp_seed_ptr = new int(0); + Tensor tmp_seed_tensor = Tensor{MEMORY_CPU, TYPE_INT32, {1}, tmp_seed_ptr}; + int* tmp_k_ptr = new int(1); + Tensor tmp_k_tensor = Tensor{MEMORY_CPU, TYPE_UINT32, {1}, tmp_k_ptr}; + + if (input_tensors->find("bad_words_list") != input_tensors->end()) { + const auto& bad_words = input_tensors->at("bad_words_list"); + const int* bad_words_ptr = reinterpret_cast(bad_words.data); + const bool shared_bad_words = bad_words.shape.size() == 2; + const size_t bad_words_len = bad_words.shape[shared_bad_words ? 1 : 2]; + + const int id_offset = ite * local_batch_size; + const int decode_vocab_size_units_offset = id_offset * vocab_size_padded_; + + invokeBanBadWords((T*)input_tensors->at("logits").getPtrWithOffset(decode_vocab_size_units_offset), + (const int*)output_tensors->at("output_ids").data, + beam_width > 1 ? (const int*)output_tensors->at("parent_ids").data : nullptr, + batch_size, + local_batch_size, + beam_width, + shared_bad_words ? + bad_words_ptr : + (const int*)bad_words.getPtrWithOffset(ite * local_batch_size * 2 * bad_words_len), + shared_bad_words, + bad_words_len, + id_offset, + vocab_size_padded_, + step, + stream_); + } + + // dynamic decode GPT + const size_t dynamic_decode_batch_size = has_diff_runtime_args ? 1 : local_batch_size; + const int dynamic_decode_total_iteration = local_batch_size / dynamic_decode_batch_size; + + for (int dynamic_ite = ite * dynamic_decode_total_iteration; + dynamic_ite < (ite + 1) * dynamic_decode_total_iteration; + ++dynamic_ite) { + const int dynamic_id_offset = dynamic_ite * dynamic_decode_batch_size * beam_width; + const int dynamic_decode_vocab_size_units_offset = dynamic_id_offset * vocab_size_padded_; + + // common inputs + Tensor logits = input_tensors->at("logits"); + Tensor input_lengths = input_tensors->at("input_lengths"); + Tensor end_id = input_tensors->at("end_id"); + std::unordered_map dynamic_decode_input_tensors{ + {"logits", + Tensor{logits.where, + logits.type, + {dynamic_decode_batch_size, logits.shape[1], logits.shape[2]}, + logits.getPtrWithOffset(dynamic_decode_vocab_size_units_offset)}}, + {"embedding_bias", input_tensors->at("embedding_bias")}, + {"step", input_tensors->at("step")}, + {"max_input_length", input_tensors->at("max_input_length")}, + {"end_id", + Tensor{end_id.where, + end_id.type, + {dynamic_decode_batch_size}, + end_id.getPtrWithOffset(dynamic_ite * dynamic_decode_batch_size)}}, + {"input_lengths", + Tensor{input_lengths.where, + input_lengths.type, + {dynamic_decode_batch_size, input_lengths.shape[1]}, + input_tensors->at("input_lengths").getPtrWithOffset(dynamic_id_offset)}}, + {"ite", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &dynamic_ite}}}; + + for (auto t = input_tensors->begin(); t != input_tensors->end(); ++t) { + if (t->first.find("random_seed") == std::string::npos) { + dynamic_decode_input_tensors.insert(*t); + } + } + + Tensor finished = output_tensors->at("finished"); + Tensor sequence_length = output_tensors->at("sequence_length"); + // common outputs + std::unordered_map dynamic_decode_output_tensors{ + {"output_ids", output_tensors->at("output_ids")}, + {"finished", + Tensor{finished.where, + finished.type, + {dynamic_decode_batch_size * beam_width}, + finished.getPtrWithOffset(dynamic_id_offset)}}, + {"sequence_length", + Tensor{sequence_length.where, + sequence_length.type, + {dynamic_decode_batch_size * beam_width}, + sequence_length.getPtrWithOffset(dynamic_id_offset)}}}; + + if (output_tensors->count("cum_log_probs") > 0) { + Tensor cum_log_probs = output_tensors->at("cum_log_probs"); + dynamic_decode_output_tensors.insert({"cum_log_probs", + Tensor{cum_log_probs.where, + cum_log_probs.type, + {dynamic_decode_batch_size * beam_width}, + cum_log_probs.getPtrWithOffset(dynamic_id_offset)}}); + } + + if (output_tensors->count("output_log_probs")) { + dynamic_decode_output_tensors.insert( + {"output_log_probs", + Tensor{MEMORY_GPU, + TYPE_FP32, + {dynamic_decode_batch_size * beam_width}, + output_tensors->at("output_log_probs") + .getPtrWithOffset((step - input_tensors->at("max_input_length").getVal()) * batch_size + * beam_width + + dynamic_id_offset)}}); + } + + if (beam_width > 1) { + dynamic_decode_input_tensors.insert({"src_cache_indirection", input_tensors->at("src_cache_indirection")}); + + dynamic_decode_output_tensors.insert({"parent_ids", output_tensors->at("parent_ids")}); + dynamic_decode_output_tensors.insert( + {"tgt_cache_indirection", output_tensors->at("tgt_cache_indirection")}); + + FT_CHECK_WITH_INFO(dynamic_decode_output_tensors.count("cum_log_probs") > 0, + "cum_log_probs should be provided in beam search."); + + if (beam_width < 16) { + online_beamsearch_decode_->forward(&dynamic_decode_output_tensors, &dynamic_decode_input_tensors); + } + else { + beamsearch_decode_->forward(&dynamic_decode_output_tensors, &dynamic_decode_input_tensors); + } + } + else { // beam_width = 1 + if (input_tensors->at("is_initialize_random_table").getVal()) { + // only insert random seed for first generation to initialize the random table + if (input_tensors->count("random_seed")) { + dynamic_decode_input_tensors.insert({"random_seed", input_tensors->at("random_seed")}); + } + else { + dynamic_decode_input_tensors.insert({"random_seed", tmp_seed_tensor}); + } + } + + if (input_tensors->count("runtime_top_p") == 0 + || input_tensors->at("runtime_top_p").getVal(has_diff_runtime_args ? dynamic_ite : 0) == 0.0f) { + + if (input_tensors->count("runtime_top_k") == 0 + || input_tensors->at("runtime_top_k").getVal() == 0) { + FT_LOG_WARNING("beam_width = 1 and top_k = 0 and top_p == 0.0f at the same time is invalid." + "Using Greedy search by default."); + + if (dynamic_decode_input_tensors.count("dynamic_decode_input_tensors")) { + dynamic_decode_input_tensors.erase("runtime_top_k"); + } + dynamic_decode_input_tensors.insert({"runtime_top_k", tmp_k_tensor}); + } + topk_decode_->forward(&dynamic_decode_output_tensors, &dynamic_decode_input_tensors); + } + else if (input_tensors->count("runtime_top_k") == 0 + || input_tensors->at("runtime_top_k").getVal(has_diff_runtime_args ? dynamic_ite : 0) == 0) { + topp_decode_->forward(&dynamic_decode_output_tensors, &dynamic_decode_input_tensors); + } + else { + topk_topp_decode_->forward(&dynamic_decode_output_tensors, &dynamic_decode_input_tensors); + } + } + } // dynamic_ite + + if (input_tensors->find("stop_words_list") != input_tensors->end()) { + const size_t id_offset = ite * local_batch_size * beam_width; + const size_t stop_words_length = input_tensors->at("stop_words_list").shape[2]; + + invokeStopWordsCriterion((const int*)output_tensors->at("output_ids").data, + (const int*)output_tensors->at("parent_ids").data, + (const int*)input_tensors->at("stop_words_list") + .getPtrWithOffset(ite * local_batch_size * 2 * stop_words_length), + (bool*)output_tensors->at("finished").getPtrWithOffset(id_offset), + id_offset, + stop_words_length, + batch_size, + beam_width, + step, + stream_); + } + + delete tmp_seed_ptr; + delete tmp_k_ptr; +} + +template class DynamicDecodeLayer; +template class DynamicDecodeLayer; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/DynamicDecodeLayer.h b/src/fastertransformer/layers/DynamicDecodeLayer.h new file mode 100644 index 000000000..1f64db4e8 --- /dev/null +++ b/src/fastertransformer/layers/DynamicDecodeLayer.h @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2022-2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include +#include + +#include "src/fastertransformer/layers/BaseLayer.h" +#include "src/fastertransformer/layers/DynamicDecodeBaseLayer.h" +#include "src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.h" + +namespace fastertransformer { + +template +class DynamicDecodeLayer: public BaseLayer { +protected: + void allocateBuffer() override; + void freeBuffer() override; + void initialize(); + + DynamicDecodeBaseLayer* online_beamsearch_decode_; + DynamicDecodeBaseLayer* beamsearch_decode_; + DynamicDecodeBaseLayer* topk_decode_; + DynamicDecodeBaseLayer* topp_decode_; + DynamicDecodeBaseLayer* topk_topp_decode_; + + size_t vocab_size_; + size_t vocab_size_padded_; + cudaDeviceProp* cuda_device_prop_; + +public: + DynamicDecodeLayer(size_t vocab_size, + size_t vocab_size_padded, + int end_id, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + cudaDeviceProp* cuda_device_prop); + + ~DynamicDecodeLayer(); + DynamicDecodeLayer(DynamicDecodeLayer const& dynamic_decode_layer); + + void forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors); +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/FfnINT8Weight.h b/src/fastertransformer/layers/FfnINT8Weight.h index 33d788df7..c362a6e1c 100644 --- a/src/fastertransformer/layers/FfnINT8Weight.h +++ b/src/fastertransformer/layers/FfnINT8Weight.h @@ -21,8 +21,8 @@ namespace fastertransformer { template -struct FfnINT8Weight : FfnWeight { - ScaleList * scale_list_ptr; +struct FfnINT8Weight: FfnWeight { + ScaleList* scale_list_ptr; }; } // namespace fastertransformer diff --git a/src/fastertransformer/layers/FfnLayer.cc b/src/fastertransformer/layers/FfnLayer.cc index f3a85d13d..e05bea949 100644 --- a/src/fastertransformer/layers/FfnLayer.cc +++ b/src/fastertransformer/layers/FfnLayer.cc @@ -29,10 +29,11 @@ void FfnLayer::forward(std::vector* output_tensors // output tensors: // ffn_output [token_num, hidden_dimension], + FT_LOG_DEBUG(__PRETTY_FUNCTION__); FT_CHECK(input_tensors->size() == 1); FT_CHECK(output_tensors->size() == 1); - FT_CHECK(isValidTokenNum(input_tensors->at(0).shape[0])); - allocateBuffer(); + // FT_CHECK(isValidTokenNum(input_tensors->at(0).shape[0])); + allocateBuffer(input_tensors->at(0).shape[0]); const int m = input_tensors->at(0).shape[0]; T* output_tensor = (T*)output_tensors->at(0).data; @@ -158,6 +159,7 @@ FfnLayer::FfnLayer(size_t max_batch_size, inter_size_(inter_size), int8_mode_(int8_mode) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); } template @@ -175,11 +177,13 @@ FfnLayer::FfnLayer(FfnLayer const& ffn_layer): inter_size_(ffn_layer.inter_size_), int8_mode_(ffn_layer.int8_mode_) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); } template FfnLayer::~FfnLayer() { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); cublas_wrapper_ = nullptr; freeBuffer(); } @@ -187,16 +191,26 @@ FfnLayer::~FfnLayer() template void FfnLayer::allocateBuffer() { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); if (is_allocate_buffer_ == false) { inter_buf_ = (T*)allocator_->malloc(sizeof(T) * max_token_num_ * inter_size_, false); is_allocate_buffer_ = true; } } +template +void FfnLayer::allocateBuffer(size_t token_num) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + inter_buf_ = (T*)allocator_->reMalloc(inter_buf_, sizeof(T) * token_num * inter_size_, false); + is_allocate_buffer_ = true; +} + template void FfnLayer::freeBuffer() { - if (is_allocate_buffer_ == true) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + if (is_allocate_buffer_) { allocator_->free(inter_buf_); is_allocate_buffer_ = false; } @@ -205,18 +219,17 @@ void FfnLayer::freeBuffer() template bool FfnLayer::isValidTokenNum(size_t token_num) { - if (token_num <= max_token_num_) { - return true; - } - else { - freeBuffer(); - max_token_num_ = token_num * 1.2; - return true; + if (max_token_num_ < token_num) { + max_token_num_ = token_num; } + return true; } template class FfnLayer; template class FfnLayer; +#ifdef ENABLE_BF16 +template class FfnLayer<__nv_bfloat16>; +#endif template GeluFfnLayer::GeluFfnLayer(size_t max_batch_size, @@ -257,6 +270,9 @@ void GeluFfnLayer::invokeAddBiasActivation(const int m, const T* bias) template class GeluFfnLayer; template class GeluFfnLayer; +#ifdef ENABLE_BF16 +template class GeluFfnLayer<__nv_bfloat16>; +#endif template ReluFfnLayer::ReluFfnLayer(size_t max_batch_size, @@ -295,5 +311,8 @@ void ReluFfnLayer::invokeAddBiasActivation(const int m, const T* bias) template class ReluFfnLayer; template class ReluFfnLayer; +#ifdef ENABLE_BF16 +template class ReluFfnLayer<__nv_bfloat16>; +#endif } // namespace fastertransformer diff --git a/src/fastertransformer/layers/FfnLayer.h b/src/fastertransformer/layers/FfnLayer.h index ecef01174..f5d1bc87d 100644 --- a/src/fastertransformer/layers/FfnLayer.h +++ b/src/fastertransformer/layers/FfnLayer.h @@ -25,8 +25,7 @@ namespace fastertransformer { -enum ActivationType -{ +enum ActivationType { Gelu, Relu }; @@ -50,9 +49,10 @@ class FfnLayer: public BaseLayer { void allocateBuffer() override; void freeBuffer() override; bool isValidTokenNum(size_t token_num); + void allocateBuffer(size_t token_num); protected: - T* inter_buf_; + T* inter_buf_ = nullptr; size_t inter_size_; virtual void invokeAddBiasActivation(const int m, const T* bias) = 0; diff --git a/src/fastertransformer/layers/FfnLayerINT8.cc b/src/fastertransformer/layers/FfnLayerINT8.cc index 5d2838d8f..46a597fc9 100644 --- a/src/fastertransformer/layers/FfnLayerINT8.cc +++ b/src/fastertransformer/layers/FfnLayerINT8.cc @@ -26,9 +26,9 @@ void FfnLayerINT8::forward(std::vector* output_ten // input_tensors: [input (token_num, hidden_dimension)] // output_tensors: [output (token_num, hidden_dimension)] ScaleList* scale_list = ((const FfnINT8Weight*)ffn_weights)->scale_list_ptr; - - cublasINT8MMWrapper* cublas_wrapper = (cublasINT8MMWrapper*)cublas_wrapper_; - + + cublasINT8MMWrapper* cublas_wrapper = (cublasINT8MMWrapper*)cublas_wrapper_; + FT_CHECK(isValidTokenNum(input_tensors->at(0).shape[0])); allocateBuffer(); @@ -45,22 +45,41 @@ void FfnLayerINT8::forward(std::vector* output_ten const int8_t* input_tensor = (const int8_t*)input_tensors->at(0).data; if (int8_mode_ == 1) { - cublas_wrapper->Gemm(inter_int_buf_, 1, m, inter_size_, hidden_units_, 0, 0, 0, - input_tensor, (int8_t*)(ffn_weights->intermediate_weight.kernel)); + cublas_wrapper->Gemm(inter_int_buf_, + 1, + m, + inter_size_, + hidden_units_, + 0, + 0, + 0, + input_tensor, + (int8_t*)(ffn_weights->intermediate_weight.kernel)); } else if (int8_mode_ == 2 || int8_mode_ == 3) { #ifdef SPARSITY_ENABLED if (sparse_) { - cublas_wrapper->SpGemm(inter_size_, m_padded, hidden_units_, - scale_list->h_scale_list_[scale_list->p3_offset_+6], + cublas_wrapper->SpGemm(inter_size_, + m_padded, + hidden_units_, + scale_list->h_scale_list_[scale_list->p3_offset_ + 6], (int8_t*)(ffn_weights->intermediate_weight.sp_kernel), input_tensor, (int8_t*)inter_int_buf_); - } else { + } + else { #endif - cublas_wrapper->Gemm((int8_t*)inter_int_buf_, 1, m, inter_size_, hidden_units_, - 0, 0, 0, scale_list->h_scale_list_[scale_list->p3_offset_+6], - input_tensor, (int8_t*)(ffn_weights->intermediate_weight.kernel)); + cublas_wrapper->Gemm((int8_t*)inter_int_buf_, + 1, + m, + inter_size_, + hidden_units_, + 0, + 0, + 0, + scale_list->h_scale_list_[scale_list->p3_offset_ + 6], + input_tensor, + (int8_t*)(ffn_weights->intermediate_weight.kernel)); #ifdef SPARSITY_ENABLED } #endif @@ -70,22 +89,41 @@ void FfnLayerINT8::forward(std::vector* output_ten sync_check_cuda_error(); if (int8_mode_ == 1) { - cublas_wrapper->Gemm(output_tensor, 1, m, hidden_units_, inter_size_, 0, 0, 0, - inter_buf_, (int8_t*)(ffn_weights->output_weight.kernel)); + cublas_wrapper->Gemm(output_tensor, + 1, + m, + hidden_units_, + inter_size_, + 0, + 0, + 0, + inter_buf_, + (int8_t*)(ffn_weights->output_weight.kernel)); } else if (int8_mode_ == 2 || int8_mode_ == 3) { #ifdef SPARSITY_ENABLED if (sparse_) { - cublas_wrapper->SpGemm(hidden_units_, m_padded, inter_size_, - scale_list->h_scale_list_[scale_list->p3_offset_+7], + cublas_wrapper->SpGemm(hidden_units_, + m_padded, + inter_size_, + scale_list->h_scale_list_[scale_list->p3_offset_ + 7], (int8_t*)(ffn_weights->output_weight.sp_kernel), inter_buf_, (int8_t*)output_tensor); - } else { + } + else { #endif - cublas_wrapper->Gemm((int8_t*)output_tensor, 1, m, hidden_units_, inter_size_, - 0, 0, 0, scale_list->h_scale_list_[scale_list->p3_offset_+7], - inter_buf_, (int8_t*)(ffn_weights->output_weight.kernel)); + cublas_wrapper->Gemm((int8_t*)output_tensor, + 1, + m, + hidden_units_, + inter_size_, + 0, + 0, + 0, + scale_list->h_scale_list_[scale_list->p3_offset_ + 7], + inter_buf_, + (int8_t*)(ffn_weights->output_weight.kernel)); #ifdef SPARSITY_ENABLED } #endif @@ -190,16 +228,16 @@ GeluFfnLayerINT8::GeluFfnLayerINT8(size_t max_batch_size, bool is_free_buffer_after_forward, bool sparse): FfnLayerINT8(max_batch_size, - max_seq_len, - head_num, - size_per_head, - inter_size, - int8_mode, - stream, - cublas_wrapper, - allocator, - is_free_buffer_after_forward, - sparse) + max_seq_len, + head_num, + size_per_head, + inter_size, + int8_mode, + stream, + cublas_wrapper, + allocator, + is_free_buffer_after_forward, + sparse) { } @@ -212,20 +250,38 @@ template void GeluFfnLayerINT8::invokeAddBiasActivation(const int m, const T* bias, ScaleList* scale_list) { if (int8_mode_ == 1) { - invokeAddBiasGeluCol32(inter_buf_, inter_int_buf_, bias, m, inter_size_, stream_, - &(scale_list->d_scale_list_[scale_list->p2_offset_ + 4*hidden_units_]), + invokeAddBiasGeluCol32(inter_buf_, + inter_int_buf_, + bias, + m, + inter_size_, + stream_, + &(scale_list->d_scale_list_[scale_list->p2_offset_ + 4 * hidden_units_]), &(scale_list->d_scale_list_[44 + 2]), &(scale_list->d_scale_list_[52 + 3])); } else if (int8_mode_ == 2 || int8_mode_ == 3) { #ifdef SPARSITY_ENABLED if (sparse_) { - invokeAddBiasGeluRow(inter_buf_, (const int8_t*)inter_int_buf_, bias, m, inter_size_, stream_, - &(scale_list->d_scale_list_[48 + 1]), &(scale_list->d_scale_list_[52 + 3])); - } else { + invokeAddBiasGeluRow(inter_buf_, + (const int8_t*)inter_int_buf_, + bias, + m, + inter_size_, + stream_, + &(scale_list->d_scale_list_[48 + 1]), + &(scale_list->d_scale_list_[52 + 3])); + } + else { #endif - invokeAddBiasGeluCol32(inter_buf_, (const int8_t*)inter_int_buf_, bias, m, inter_size_, stream_, - &(scale_list->d_scale_list_[48 + 1]), &(scale_list->d_scale_list_[52 + 3])); + invokeAddBiasGeluCol32(inter_buf_, + (const int8_t*)inter_int_buf_, + bias, + m, + inter_size_, + stream_, + &(scale_list->d_scale_list_[48 + 1]), + &(scale_list->d_scale_list_[52 + 3])); #ifdef SPARSITY_ENABLED } #endif @@ -267,7 +323,7 @@ ReluFfnLayerINT8::ReluFfnLayerINT8(ReluFfnLayerINT8 const& relu_ffn_layer) template void ReluFfnLayerINT8::invokeAddBiasActivation(const int m, const T* bias, ScaleList* scale_list) { - //TODO + // TODO } template class ReluFfnLayerINT8; diff --git a/src/fastertransformer/layers/TensorParallelGeluFfnLayer.cc b/src/fastertransformer/layers/TensorParallelGeluFfnLayer.cc index 2f5435095..a1f3e7e79 100644 --- a/src/fastertransformer/layers/TensorParallelGeluFfnLayer.cc +++ b/src/fastertransformer/layers/TensorParallelGeluFfnLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -23,14 +23,25 @@ void TensorParallelGeluFfnLayer::forward(std::vector* input_tensors, const FfnWeight* ffn_weights) { - GeluFfnLayer::forward(output_tensors, input_tensors, ffn_weights); - const size_t token_num = output_tensors->at(0).shape[0]; const size_t hidden_units = output_tensors->at(0).shape[1]; + bool use_custom_all_reduce_kernel = false; + if (enable_custom_all_reduce_ && custom_all_reduce_comm_ != nullptr) { + use_custom_all_reduce_kernel = + custom_all_reduce_comm_->swapInternalBuffer(output_tensors, token_num * hidden_units); + } + + GeluFfnLayer::forward(output_tensors, input_tensors, ffn_weights); + T* ffn_out = (T*)(output_tensors->at(0).data); - if (tensor_para_size_ > 1) { - ftNcclAllReduceSum(ffn_out, ffn_out, token_num * hidden_units, tensor_para_comm_, GeluFfnLayer::stream_); + if (tensor_para_.world_size_ > 1) { + if (!use_custom_all_reduce_kernel) { + ftNcclAllReduceSum(ffn_out, ffn_out, token_num * hidden_units, tensor_para_, GeluFfnLayer::stream_); + } + else { + custom_all_reduce_comm_->customAllReduce(token_num * hidden_units, GeluFfnLayer::stream_); + } sync_check_cuda_error(); } } @@ -41,40 +52,46 @@ TensorParallelGeluFfnLayer::TensorParallelGeluFfnLayer(size_t max_batch_size, size_t head_num, size_t size_per_head, size_t inter_size, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, + NcclParam tensor_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, bool is_sparse, - int int8_mode): + int int8_mode, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): GeluFfnLayer(max_batch_size, max_seq_len, head_num, size_per_head, - inter_size / tensor_para_size, + inter_size / tensor_para.world_size_, stream, cublas_wrapper, allocator, is_free_buffer_after_forward, is_sparse, int8_mode), - tensor_para_size_(tensor_para_size), - tensor_para_comm_(tensor_para_comm) + tensor_para_(tensor_para), + custom_all_reduce_comm_(custom_all_reduce_comm), + enable_custom_all_reduce_(enable_custom_all_reduce) { - FT_CHECK(inter_size % tensor_para_size == 0); + FT_CHECK(inter_size % tensor_para_.world_size_ == 0); } template TensorParallelGeluFfnLayer::TensorParallelGeluFfnLayer(TensorParallelGeluFfnLayer const& ffn_layer): GeluFfnLayer(ffn_layer), - tensor_para_size_(ffn_layer.tensor_para_size_), - tensor_para_comm_(ffn_layer.tensor_para_comm_) + tensor_para_(ffn_layer.tensor_para_), + custom_all_reduce_comm_(ffn_layer.custom_all_reduce_comm_), + enable_custom_all_reduce_(ffn_layer.enable_custom_all_reduce_) { } template class TensorParallelGeluFfnLayer; template class TensorParallelGeluFfnLayer; +#ifdef ENABLE_BF16 +template class TensorParallelGeluFfnLayer<__nv_bfloat16>; +#endif } // namespace fastertransformer diff --git a/src/fastertransformer/layers/TensorParallelGeluFfnLayer.h b/src/fastertransformer/layers/TensorParallelGeluFfnLayer.h index f34b041f9..4a9330886 100644 --- a/src/fastertransformer/layers/TensorParallelGeluFfnLayer.h +++ b/src/fastertransformer/layers/TensorParallelGeluFfnLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,6 +17,7 @@ #pragma once #include "src/fastertransformer/layers/FfnLayer.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" #include "src/fastertransformer/utils/nccl_utils.h" namespace fastertransformer { @@ -24,8 +25,9 @@ namespace fastertransformer { template class TensorParallelGeluFfnLayer: public GeluFfnLayer { private: - size_t tensor_para_size_; - ncclComm_t tensor_para_comm_; + NcclParam tensor_para_; + std::shared_ptr custom_all_reduce_comm_; + int enable_custom_all_reduce_; protected: public: @@ -34,14 +36,15 @@ class TensorParallelGeluFfnLayer: public GeluFfnLayer { size_t head_num, size_t size_per_head, size_t inter_size, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, + NcclParam tensor_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, bool is_sparse = false, - int int8_mode = 0); + int int8_mode = 0, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce = 0); TensorParallelGeluFfnLayer(TensorParallelGeluFfnLayer const& ffn_layer); diff --git a/src/fastertransformer/layers/TensorParallelReluFfnLayer.cc b/src/fastertransformer/layers/TensorParallelReluFfnLayer.cc index 665a2f8d3..1b798b9ca 100644 --- a/src/fastertransformer/layers/TensorParallelReluFfnLayer.cc +++ b/src/fastertransformer/layers/TensorParallelReluFfnLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -23,14 +23,25 @@ void TensorParallelReluFfnLayer::forward(std::vector* input_tensors, const FfnWeight* ffn_weights) { - ReluFfnLayer::forward(output_tensors, input_tensors, ffn_weights); - const size_t token_num = output_tensors->at(0).shape[0]; const size_t hidden_units = output_tensors->at(0).shape[1]; + bool use_custom_all_reduce_kernel = false; + if (enable_custom_all_reduce_ && custom_all_reduce_comm_ != nullptr) { + use_custom_all_reduce_kernel = + custom_all_reduce_comm_->swapInternalBuffer(output_tensors, token_num * hidden_units); + } + + ReluFfnLayer::forward(output_tensors, input_tensors, ffn_weights); + T* ffn_out = (T*)(output_tensors->at(0).data); - if (tensor_para_size_ > 1) { - ftNcclAllReduceSum(ffn_out, ffn_out, token_num * hidden_units, tensor_para_comm_, ReluFfnLayer::stream_); + if (tensor_para_.world_size_ > 1) { + if (!use_custom_all_reduce_kernel) { + ftNcclAllReduceSum(ffn_out, ffn_out, token_num * hidden_units, tensor_para_, ReluFfnLayer::stream_); + } + else { + custom_all_reduce_comm_->customAllReduce(token_num * hidden_units, ReluFfnLayer::stream_); + } sync_check_cuda_error(); } } @@ -41,34 +52,34 @@ TensorParallelReluFfnLayer::TensorParallelReluFfnLayer(size_t max_batch_size, size_t head_num, size_t size_per_head, size_t inter_size, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, + NcclParam tensor_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, - bool is_sparse): + bool is_sparse, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): ReluFfnLayer(max_batch_size, max_seq_len, head_num, size_per_head, - inter_size / tensor_para_size, + inter_size / tensor_para.world_size_, stream, cublas_wrapper, allocator, is_free_buffer_after_forward, is_sparse), - tensor_para_size_(tensor_para_size), - tensor_para_comm_(tensor_para_comm) + tensor_para_(tensor_para), + custom_all_reduce_comm_(custom_all_reduce_comm), + enable_custom_all_reduce_(enable_custom_all_reduce) { - FT_CHECK(inter_size % tensor_para_size == 0); + FT_CHECK(inter_size % tensor_para_.world_size_ == 0); } template TensorParallelReluFfnLayer::TensorParallelReluFfnLayer(TensorParallelReluFfnLayer const& ffn_layer): - ReluFfnLayer(ffn_layer), - tensor_para_size_(ffn_layer.tensor_para_size_), - tensor_para_comm_(ffn_layer.tensor_para_comm_) + ReluFfnLayer(ffn_layer), tensor_para_(ffn_layer.tensor_para_) { } diff --git a/src/fastertransformer/layers/TensorParallelReluFfnLayer.h b/src/fastertransformer/layers/TensorParallelReluFfnLayer.h index bc2aeddaf..8d6adec42 100644 --- a/src/fastertransformer/layers/TensorParallelReluFfnLayer.h +++ b/src/fastertransformer/layers/TensorParallelReluFfnLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,6 +17,7 @@ #pragma once #include "src/fastertransformer/layers/FfnLayer.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" #include "src/fastertransformer/utils/nccl_utils.h" namespace fastertransformer { @@ -24,8 +25,9 @@ namespace fastertransformer { template class TensorParallelReluFfnLayer: public ReluFfnLayer { private: - size_t tensor_para_size_; - ncclComm_t tensor_para_comm_; + NcclParam tensor_para_; + std::shared_ptr custom_all_reduce_comm_; + int enable_custom_all_reduce_; protected: public: @@ -34,13 +36,14 @@ class TensorParallelReluFfnLayer: public ReluFfnLayer { size_t head_num, size_t size_per_head, size_t inter_size, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, + NcclParam tensor_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, - bool is_sparse); + bool is_sparse, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce = 0); TensorParallelReluFfnLayer(TensorParallelReluFfnLayer const& ffn_layer); diff --git a/src/fastertransformer/layers/attention_layers/BaseAttentionLayer.h b/src/fastertransformer/layers/attention_layers/BaseAttentionLayer.h index a9806ca13..b21e3a7c2 100644 --- a/src/fastertransformer/layers/attention_layers/BaseAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/BaseAttentionLayer.h @@ -29,8 +29,7 @@ namespace fastertransformer { -enum class AttentionType -{ +enum class AttentionType { UNFUSED_MHA, UNFUSED_PADDED_MHA, FUSED_MHA, @@ -38,7 +37,8 @@ enum class AttentionType }; template -AttentionType getAttentionType(size_t size_per_head, const int sm, const bool remove_padding, const int max_seq_len, const bool is_fuse = true) +AttentionType getAttentionType( + size_t size_per_head, const int sm, const bool remove_padding, const int max_seq_len, const bool is_fuse = true) { if (std::is_same::value && (sm == kSM_70 || sm == kSM_86 || sm == kSM_80 || sm == kSM_75 || sm == kSM_72) && size_per_head == 64 && max_seq_len <= 384 && is_fuse == true) { diff --git a/src/fastertransformer/layers/attention_layers/CMakeLists.txt b/src/fastertransformer/layers/attention_layers/CMakeLists.txt index db6a7ceb2..9cef31540 100644 --- a/src/fastertransformer/layers/attention_layers/CMakeLists.txt +++ b/src/fastertransformer/layers/attention_layers/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -44,24 +44,28 @@ set_property(TARGET GptContextAttentionLayer PROPERTY POSITION_INDEPENDENT_CODE set_property(TARGET GptContextAttentionLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) target_link_libraries(GptContextAttentionLayer PUBLIC -lcublas -lcudart cublasMMWrapper memory_utils unfused_attention_kernels) -if(BUILD_GPT) - add_library(TensorParallelDecoderSelfAttentionLayer STATIC TensorParallelDecoderSelfAttentionLayer.cc) - set_property(TARGET TensorParallelDecoderSelfAttentionLayer PROPERTY POSITION_INDEPENDENT_CODE ON) - set_property(TARGET TensorParallelDecoderSelfAttentionLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) - target_link_libraries(TensorParallelDecoderSelfAttentionLayer PUBLIC -lcudart DecoderSelfAttentionLayer nccl_utils) +add_library(TensorParallelDecoderSelfAttentionLayer STATIC TensorParallelDecoderSelfAttentionLayer.cc) +set_property(TARGET TensorParallelDecoderSelfAttentionLayer PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET TensorParallelDecoderSelfAttentionLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(TensorParallelDecoderSelfAttentionLayer PUBLIC -lcudart DecoderSelfAttentionLayer nccl_utils custom_ar_kernels) - add_library(TensorParallelDecoderCrossAttentionLayer STATIC TensorParallelDecoderCrossAttentionLayer.cu) - set_property(TARGET TensorParallelDecoderCrossAttentionLayer PROPERTY POSITION_INDEPENDENT_CODE ON) - set_property(TARGET TensorParallelDecoderCrossAttentionLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) - target_link_libraries(TensorParallelDecoderCrossAttentionLayer PUBLIC -lcudart DecoderCrossAttentionLayer nccl_utils) +add_library(TensorParallelDecoderCrossAttentionLayer STATIC TensorParallelDecoderCrossAttentionLayer.cc) +set_property(TARGET TensorParallelDecoderCrossAttentionLayer PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET TensorParallelDecoderCrossAttentionLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(TensorParallelDecoderCrossAttentionLayer PUBLIC -lcudart DecoderCrossAttentionLayer nccl_utils) - add_library(TensorParallelGptContextAttentionLayer STATIC TensorParallelGptContextAttentionLayer.cc) - set_property(TARGET TensorParallelGptContextAttentionLayer PROPERTY POSITION_INDEPENDENT_CODE ON) - set_property(TARGET TensorParallelGptContextAttentionLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) - target_link_libraries(TensorParallelGptContextAttentionLayer PUBLIC -lcudart GptContextAttentionLayer nccl_utils) +add_library(TensorParallelGptContextAttentionLayer STATIC TensorParallelGptContextAttentionLayer.cc) +set_property(TARGET TensorParallelGptContextAttentionLayer PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET TensorParallelGptContextAttentionLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(TensorParallelGptContextAttentionLayer PUBLIC -lcudart GptContextAttentionLayer nccl_utils custom_ar_kernels) - add_library(TensorParallelUnfusedAttentionLayer STATIC TensorParallelUnfusedAttentionLayer.cc) - set_property(TARGET TensorParallelUnfusedAttentionLayer PROPERTY POSITION_INDEPENDENT_CODE ON) - set_property(TARGET TensorParallelUnfusedAttentionLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) - target_link_libraries(TensorParallelUnfusedAttentionLayer PUBLIC -lcudart UnfusedAttentionLayer nccl_utils) -endif() +add_library(TensorParallelUnfusedAttentionLayer STATIC TensorParallelUnfusedAttentionLayer.cc) +set_property(TARGET TensorParallelUnfusedAttentionLayer PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET TensorParallelUnfusedAttentionLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(TensorParallelUnfusedAttentionLayer PUBLIC -lcudart UnfusedAttentionLayer nccl_utils) + +add_library(WindowAttention STATIC WindowAttention.cc) +set_property(TARGET WindowAttention PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET WindowAttention PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(WindowAttention PUBLIC -lcublasLt -lcublas -lcudart transform_mask_kernels + unfused_attention_kernels trt_fused_multi_head_attention reverse_roll_kernels activation_kernels) \ No newline at end of file diff --git a/src/fastertransformer/layers/attention_layers/DecoderCrossAttentionLayer.cu b/src/fastertransformer/layers/attention_layers/DecoderCrossAttentionLayer.cu index f64ac821c..b54c84de0 100644 --- a/src/fastertransformer/layers/attention_layers/DecoderCrossAttentionLayer.cu +++ b/src/fastertransformer/layers/attention_layers/DecoderCrossAttentionLayer.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -14,7 +14,16 @@ * limitations under the License. */ +#ifndef CUDART_VERSION +#error CUDART_VERSION Undefined! +#elif (CUDART_VERSION >= 11050) +#include +#else #include "3rdparty/cub/cub.cuh" +#endif + +#include "src/fastertransformer/kernels/decoder_masked_multihead_attention.h" +#include "src/fastertransformer/kernels/decoder_masked_multihead_attention_utils.h" #include "src/fastertransformer/kernels/reduce_kernel_utils.cuh" #include "src/fastertransformer/layers/attention_layers/DecoderCrossAttentionLayer.h" @@ -57,8 +66,9 @@ __global__ void cross_attention_kernel(T* query_buf, const int seq_len, const T scalar) { - if (finished != nullptr && finished[blockIdx.x / head_num] == true) + if (finished != nullptr && finished[blockIdx.x / head_num] == true) { return; + } int tid = threadIdx.x; int bid = blockIdx.x / head_num; int head_id = blockIdx.x % head_num; @@ -72,8 +82,9 @@ __global__ void cross_attention_kernel(T* query_buf, int qkv_id = bid * head_num * size_per_head + head_id * size_per_head + tid; int qkv_bias_id = head_id * size_per_head + tid; - if (tid < size_per_head) + if (tid < size_per_head) { sq[tid] = query_buf[qkv_id] + Q_bias[qkv_bias_id]; + } __syncthreads(); for (int ite = 0; ite < length; ++ite) { @@ -91,8 +102,9 @@ __global__ void cross_attention_kernel(T* query_buf, T val = (tid < size_per_head) ? key * sq[tid] * scalar : (T)(0.0f); T qk = blockReduceSum(val); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { logits[ite] = qk; + } __syncthreads(); // try to remove } __syncthreads(); @@ -101,19 +113,22 @@ __global__ void cross_attention_kernel(T* query_buf, float local_i = tid < length ? (float)logits[tid] : -1e20f; float max_val = blockReduceMax(local_i); - if (tid == 0) + if (tid == 0) { s_max_val = max_val; + } __syncthreads(); local_i -= s_max_val; float local_o = tid < length ? __expf(local_i) : 0.0f; float val = blockReduceSum(local_o); - if (tid == 0) + if (tid == 0) { s_sum = val + 1e-6; + } __syncthreads(); - if (tid < length) + if (tid < length) { logits[tid] = local_o / s_sum; + } __syncthreads(); if (tid < size_per_head) { @@ -151,8 +166,9 @@ __global__ void cross_attention_kernel_opt(T* __restrict query_buf, const int seq_len, const float scalar) { - if (finished != nullptr && finished[blockIdx.x / head_num] == true) + if (finished != nullptr && finished[blockIdx.x / head_num] == true) { return; + } typedef Copy_t copy_t; const int elems_per_thread = size_per_head / WARP_SIZE; union Access_t { @@ -235,12 +251,14 @@ __global__ void cross_attention_kernel_opt(T* __restrict query_buf, __shared__ float s_max_val, s_sum; float local_i = -1e20f; - for (int i = tid; i < length; i += blockDim.x) + for (int i = tid; i < length; i += blockDim.x) { local_i = max(local_i, logits[i]); + } float max_val = MaxValBlockReduce(max_val_block_temp_storage).Reduce(local_i, cub::Max()); - if (tid == 0) + if (tid == 0) { s_max_val = max_val; + } __syncthreads(); float local_o = 0.0f; @@ -250,8 +268,9 @@ __global__ void cross_attention_kernel_opt(T* __restrict query_buf, } float val = BlockReduce(block_temp_storage).Sum(local_o); - if (tid == 0) + if (tid == 0) { s_sum = val + 1e-6; + } __syncthreads(); float s_sum_inverse = __fdividef(1.0f, s_sum); @@ -321,7 +340,7 @@ void cross_attention_dispatch(T* query_buf, { if (!batch_major_cache) { const int block_sz = ATTENTION_BLOCK_SIZE; - float scalar = 1.f / sqrtf(size_per_head * 1.0f); + float scalar = 1.f / (sqrtf(size_per_head * 1.0f) * q_scaling); dim3 grid(inference_batch_size * head_num); @@ -383,19 +402,25 @@ void cross_attention_dispatch(T* query_buf, int block_size = 128; - if (seq_len <= 64) + if (seq_len <= 64) { block_size = 64; - else if (seq_len <= 128 && seq_len > size_per_head) + } + else if (seq_len <= 128 && seq_len > size_per_head) { block_size = 128; - else if (seq_len > 128 && seq_len <= 256) + } + else if (seq_len > 128 && seq_len <= 256) { block_size = 256; - else if (seq_len > 256 && seq_len <= 512) + } + else if (seq_len > 256 && seq_len <= 512) { block_size = 512; - else + } + else { block_size = 1024; + } - if (block_size < size_per_head) + if (block_size < size_per_head) { block_size = size_per_head; + } assert(block_size <= 1024); dim3 block(block_size); @@ -444,6 +469,9 @@ void cross_attention_dispatch(T* query_buf, params.k_cache = reinterpret_cast(key_cache); params.v_cache = reinterpret_cast(value_cache); params.batch_size = inference_batch_size; + // TODO(bhsueh) We can use batch but not batch * beam_width in k/v cache in cross attention + // because they are same for all beams. + params.beam_width = 1; // We don't care the beam_width in cross attention, set to 1 is enough. params.seq_length = seq_len; params.timestep = step - 1; params.num_heads = head_num; @@ -509,8 +537,9 @@ __global__ void transpose_4d_batch_major_mem_k_cache( const int out_idx = blockIdx.x * blockDim.x + threadIdx.x; int size_per_head_div_x = size_per_head / X_ELEMS; - if (out_idx >= size_per_head_div_x * max_seq_len) + if (out_idx >= size_per_head_div_x * max_seq_len) { return; + } int idx = out_idx; const int k_seq_len_id = idx % max_seq_len; @@ -539,8 +568,9 @@ __global__ void transpose_4d_batch_major_mem_v_cache( constexpr int X_ELEMS = (sizeof(T) == 4) ? 4 : 8; const int size_per_head_div_x = size_per_head / X_ELEMS; - if (out_idx >= size_per_head_div_x * max_seq_len) + if (out_idx >= size_per_head_div_x * max_seq_len) { return; + } int idx = out_idx; const int v_head_size_id = idx % size_per_head_div_x; @@ -609,10 +639,25 @@ void DecoderCrossAttentionLayer::allocateBuffer() } } +template +void DecoderCrossAttentionLayer::allocateBuffer(size_t batch_size, size_t max_mem_seq_len) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + q_buf_ = reinterpret_cast(allocator_->reMalloc(q_buf_, sizeof(T) * batch_size * hidden_units_, false)); + context_buf_ = + reinterpret_cast(allocator_->reMalloc(context_buf_, sizeof(T) * batch_size * hidden_units_, false)); + + if (is_batch_major_cache_) { + mem_cache_buf_ = reinterpret_cast( + allocator_->reMalloc(mem_cache_buf_, sizeof(T) * batch_size * max_mem_seq_len * hidden_units_, false)); + } + is_allocate_buffer_ = true; +} + template void DecoderCrossAttentionLayer::freeBuffer() { - if (is_allocate_buffer_ == true) { + if (is_allocate_buffer_) { allocator_->free(q_buf_); allocator_->free(context_buf_); if (is_batch_major_cache_) { @@ -756,7 +801,7 @@ void DecoderCrossAttentionLayer::forward(std::vectorsize() == 3); FT_CHECK(isValidBatchSize(input_tensors->at(0).shape[0])); FT_CHECK(isValidSeqLen(input_tensors->at(1).shape[1])); - allocateBuffer(); + allocateBuffer(input_tensors->at(0).shape[0], input_tensors->at(1).shape[1]); const T* attention_input = reinterpret_cast(input_tensors->at(0).data); Tensor encoder_output_tensor = input_tensors->at(1); diff --git a/src/fastertransformer/layers/attention_layers/DecoderCrossAttentionLayer.h b/src/fastertransformer/layers/attention_layers/DecoderCrossAttentionLayer.h index 8e322089c..b92dba84b 100644 --- a/src/fastertransformer/layers/attention_layers/DecoderCrossAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/DecoderCrossAttentionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,8 +16,6 @@ #pragma once -#include "src/fastertransformer/kernels/decoder_masked_multihead_attention.h" -#include "src/fastertransformer/kernels/decoder_masked_multihead_attention_utils.h" #include "src/fastertransformer/layers/attention_layers/BaseAttentionLayer.h" namespace fastertransformer { @@ -40,6 +38,7 @@ class DecoderCrossAttentionLayer: public BaseAttentionLayer { size_t max_mem_seq_len_ = 0; void allocateBuffer() override; + void allocateBuffer(size_t batch_size, size_t max_mem_seq_len); void freeBuffer() override; bool isValidBatchSize(size_t batch_size); bool isValidSeqLen(size_t seq_len); @@ -51,9 +50,9 @@ class DecoderCrossAttentionLayer: public BaseAttentionLayer { using BaseAttentionLayer::cublas_wrapper_; using BaseAttentionLayer::allocator_; - T* q_buf_; - T* context_buf_; - T* mem_cache_buf_; + T* q_buf_ = nullptr; + T* context_buf_ = nullptr; + T* mem_cache_buf_ = nullptr; public: DecoderCrossAttentionLayer(size_t max_batch_size, diff --git a/src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.cc b/src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.cc index c8535e273..34d3b4569 100644 --- a/src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.cc +++ b/src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,22 +16,33 @@ #include "src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.h" #include "src/fastertransformer/kernels/decoder_masked_multihead_attention.h" -#include "src/fastertransformer/kernels/decoder_masked_multihead_attention_utils.h" #include "src/fastertransformer/utils/logger.h" namespace fastertransformer { +template +struct TypeConverter { + using Type = T; +}; + +template<> +struct TypeConverter { + using Type = uint16_t; +}; + template void fusedQKV_masked_attention_dispatch(const T* qkv_buf, const T* qkv_bias, const T* relative_attention_bias, T* key_cache, T* value_cache, + const int* cache_indir, T* context_buf, const bool* finished, const int* sequence_lengths, const int max_batch_size, const int inference_batch_size, + const int beam_width, const int head_num, const int size_per_head, const int rotary_embedding_dim, @@ -43,7 +54,7 @@ void fusedQKV_masked_attention_dispatch(const T* qkv_buf, const int relative_attention_bias_stride, cudaStream_t stream) { - using DataType = typename std::conditional::type; + using DataType = typename TypeConverter::Type; // Prepare the parameters. Masked_multihead_attention_params params; memset(¶ms, 0, sizeof(params)); @@ -71,13 +82,16 @@ void fusedQKV_masked_attention_dispatch(const T* qkv_buf, params.k_cache = reinterpret_cast(key_cache); params.v_cache = reinterpret_cast(value_cache); + params.cache_indir = cache_indir; params.batch_size = inference_batch_size; + params.beam_width = beam_width; params.seq_length = max_seq_len; params.length_per_sample = sequence_lengths; params.timestep = step - 1; params.num_heads = head_num; - params.rotary_embedding_dim = rotary_embedding_dim; params.hidden_size_per_head = size_per_head; + params.rotary_embedding_dim = rotary_embedding_dim; + // Note: keep norm factor (sqrt(K_dim)) when adopting megatron T5 structure (may adjust) params.inv_sqrt_dh = 1.F / (sqrtf((float)params.hidden_size_per_head) * q_scaling); params.input_lengths = input_lengths; @@ -101,11 +115,13 @@ template void fusedQKV_masked_attention_dispatch(const float* qkv_buf, const float* relative_attention_bias, float* key_cache, float* value_cache, + const int* cache_indir, float* context_buf, const bool* finished, const int* sequence_lengths, const int max_batch_size, const int inference_batch_size, + const int beam_width, const int head_num, const int size_per_head, const int rotary_embedding_dim, @@ -122,11 +138,13 @@ template void fusedQKV_masked_attention_dispatch(const half* qkv_buf, const half* relative_attention_bias, half* key_cache, half* value_cache, + const int* cache_indir, half* context_buf, const bool* finished, const int* sequence_lengths, const int max_batch_size, const int inference_batch_size, + const int beam_width, const int head_num, const int size_per_head, const int rotary_embedding_dim, @@ -150,10 +168,21 @@ void DecoderSelfAttentionLayer::allocateBuffer() } } +template +void DecoderSelfAttentionLayer::allocateBuffer(size_t batch_size) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + qkv_buf_ = + reinterpret_cast(allocator_->reMalloc(qkv_buf_, sizeof(T) * batch_size * 3 * local_hidden_units_, false)); + context_buf_ = + reinterpret_cast(allocator_->reMalloc(context_buf_, sizeof(T) * batch_size * local_hidden_units_, false)); + is_allocate_buffer_ = true; +} + template void DecoderSelfAttentionLayer::freeBuffer() { - if (is_allocate_buffer_ == true) { + if (is_allocate_buffer_) { allocator_->free(qkv_buf_); allocator_->free(context_buf_); is_allocate_buffer_ = false; @@ -377,6 +406,7 @@ void DecoderSelfAttentionLayer::forward(std::vector::forward(std::vectorsize() == 6 || input_tensors->size() == 7); + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + FT_CHECK(input_tensors->size() == 7 || input_tensors->size() == 8); FT_CHECK(output_tensors->size() == 3); FT_CHECK(output_tensors->at(1).shape.size() == 5 || output_tensors->at(1).shape.size() == 3); FT_CHECK(output_tensors->at(2).shape.size() == 4 || output_tensors->at(2).shape.size() == 3); - FT_CHECK(isValidBatchSize(input_tensors->at(0).shape[0])); - allocateBuffer(); + // FT_CHECK(isValidBatchSize(input_tensors->at(0).shape[0])); + allocateBuffer(input_tensors->at(0).shape[0]); const T* attention_input = reinterpret_cast(input_tensors->at(0).data); const bool* finished = reinterpret_cast(input_tensors->at(1).data); const int* sequence_lengths = reinterpret_cast(input_tensors->at(2).data); + const int* cache_indir = reinterpret_cast(input_tensors->at(6).data); const T* relative_attention_bias = - reinterpret_cast(input_tensors->size() == 7 ? input_tensors->at(6).data : nullptr); - const int relative_attention_bias_stride = input_tensors->size() == 7 ? input_tensors->at(6).shape[3] : 0; + reinterpret_cast(input_tensors->size() == 8 ? input_tensors->at(7).data : nullptr); + const int relative_attention_bias_stride = input_tensors->size() == 8 ? input_tensors->at(7).shape[3] : 0; T* attention_out = (T*)(output_tensors->at(0).data); T* key_cache = (T*)(output_tensors->at(1).data); T* value_cache = (T*)(output_tensors->at(2).data); const int batch_size = input_tensors->at(0).shape[0]; + const int beam_width = input_tensors->at(6).shape[1]; const int max_seq_len = output_tensors->at(1).shape[3]; #ifdef SPARSITY_ENABLED - const int m_padded = div_up(batch_size, 8); + const int m_padded = 8 * div_up(batch_size, 8); if (sparse_ && cublas_wrapper_->isUseSparse(1, 3 * local_hidden_units_, m_padded, d_model_)) { cublas_wrapper_->SpGemm(CUBLAS_OP_N, CUBLAS_OP_N, @@ -457,11 +490,13 @@ void DecoderSelfAttentionLayer::forward(std::vector::forward(std::vector; template class DecoderSelfAttentionLayer; +#ifdef ENABLE_BF16 +template class DecoderSelfAttentionLayer<__nv_bfloat16>; +#endif } // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.h b/src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.h index ad3b69bde..ab3cda929 100644 --- a/src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.h @@ -42,6 +42,7 @@ class DecoderSelfAttentionLayer: public BaseAttentionLayer { void allocateBuffer() override; void freeBuffer() override; bool isValidBatchSize(size_t batch_size); + void allocateBuffer(size_t batch_size); using BaseAttentionLayer::is_free_buffer_after_forward_; using BaseAttentionLayer::is_allocate_buffer_; @@ -49,8 +50,8 @@ class DecoderSelfAttentionLayer: public BaseAttentionLayer { using BaseAttentionLayer::allocator_; protected: - T* qkv_buf_; - T* context_buf_; + T* qkv_buf_ = nullptr; + T* context_buf_ = nullptr; using BaseAttentionLayer::stream_; using BaseAttentionLayer::sparse_; diff --git a/src/fastertransformer/layers/attention_layers/FusedAttentionLayer.cu b/src/fastertransformer/layers/attention_layers/FusedAttentionLayer.cu index 46b993e12..d72fcaee8 100644 --- a/src/fastertransformer/layers/attention_layers/FusedAttentionLayer.cu +++ b/src/fastertransformer/layers/attention_layers/FusedAttentionLayer.cu @@ -79,15 +79,16 @@ void FusedAttentionLayer::forward(std::vector* out FT_CHECK(isValidBatchSize(input_tensors->at(1).shape[0])); FT_CHECK(isValidSeqLen(input_tensors->at(1).shape[2])); - allocateBuffer(); + + const int request_batch_size = input_tensors->at(1).shape[0]; + const int request_seq_len = input_tensors->at(1).shape[2]; + allocateBuffer(request_batch_size, request_seq_len); T* attention_out = (T*)output_tensors->at(0).data; const T* from_tensor = (const T*)input_tensors->at(0).data; const T* attention_mask = (const T*)input_tensors->at(1).data; const int* padding_offset = (const int*)input_tensors->at(2).data; - const int request_batch_size = input_tensors->at(1).shape[0]; - const int request_seq_len = input_tensors->at(1).shape[2]; size_t m_tmp = input_tensors->at(0).shape[0]; if (m_tmp % 8 != 0) { m_tmp = (m_tmp / 8 + 1) * 8; @@ -234,8 +235,9 @@ FusedAttentionLayer::FusedAttentionLayer(size_t max_batch_size, q_scaling_(q_scaling), sparse_(sparse) { - if ((sm_ == kSM_70 || sm_ == kSM_86 || sm_ == kSM_80 || sm_ == kSM_75 || sm_ == kSM_72) && size_per_head_ == 64) + if ((sm_ == kSM_70 || sm_ == kSM_86 || sm_ == kSM_80 || sm_ == kSM_75 || sm_ == kSM_72) && size_per_head_ == 64) { dispatcher_fp16.reset(new FusedMHARunnerFP16v2(head_num_, size_per_head_, sm_, q_scaling_)); + } else { throw std::runtime_error(std::string("[FT][ERROR] FusedAttentionLayer not support \n")); } @@ -257,8 +259,9 @@ FusedAttentionLayer::FusedAttentionLayer(FusedAttentionLayer const& attent q_scaling_(attention_layer.q_scaling_), sparse_(attention_layer.sparse_) { - if ((sm_ == kSM_70 || sm_ == kSM_86 || sm_ == kSM_80 || sm_ == kSM_75 || sm_ == kSM_72) && size_per_head_ == 64) + if ((sm_ == kSM_70 || sm_ == kSM_86 || sm_ == kSM_80 || sm_ == kSM_75 || sm_ == kSM_72) && size_per_head_ == 64) { dispatcher_fp16.reset(new FusedMHARunnerFP16v2(head_num_, size_per_head_, sm_, q_scaling_)); + } else { throw std::runtime_error(std::string("[FT][ERROR] FusedAttentionLayer not support \n")); } @@ -289,42 +292,54 @@ void FusedAttentionLayer::allocateBuffer() } } +template +void FusedAttentionLayer::allocateBuffer(size_t batch_size, size_t seq_len) +{ + q_buf_ = (T*)allocator_->reMalloc(q_buf_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + k_buf_ = (T*)allocator_->reMalloc(k_buf_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + v_buf_ = (T*)allocator_->reMalloc(v_buf_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + qkv_buf_ = (T*)allocator_->reMalloc(qkv_buf_, sizeof(T) * 3 * batch_size * seq_len * hidden_units_, false); + qkv_buf_2_ = (T*)allocator_->reMalloc(qkv_buf_2_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + attn_workspace_ = (T*)allocator_->reMalloc(attn_workspace_, dispatcher_fp16->getWorkspaceSize(), false); + + batch_qkv_kernel_ptr_ = (T**)allocator_->reMalloc(batch_qkv_kernel_ptr_, sizeof(T*) * 12, false); + batch_qkv_input_ptr_ = batch_qkv_kernel_ptr_ + 4; + batch_qkv_buf_ptr_ = batch_qkv_input_ptr_ + 4; + is_allocate_buffer_ = true; +} + template void FusedAttentionLayer::freeBuffer() { - if (is_allocate_buffer_ == true) { + if (is_allocate_buffer_) { allocator_->free(q_buf_); allocator_->free(k_buf_); allocator_->free(v_buf_); allocator_->free(qkv_buf_); allocator_->free(qkv_buf_2_); allocator_->free(attn_workspace_); - allocator_->free(batch_qkv_kernel_ptr_); - is_allocate_buffer_ = false; sync_check_cuda_error(); + is_allocate_buffer_ = false; } } template bool FusedAttentionLayer::isValidBatchSize(size_t batch_size) { - if (max_batch_size_ == 0) { + if (max_batch_size_ < batch_size) { max_batch_size_ = batch_size; - return true; - } - else { - return batch_size <= max_batch_size_; } + return true; } template bool FusedAttentionLayer::isValidSeqLen(size_t seq_len) { - if (max_seq_len_ == 0) { + if (max_seq_len_ < seq_len) { max_seq_len_ = seq_len; } - return seq_len <= max_seq_len_ && seq_len <= 384; + return seq_len <= 384; } template class FusedAttentionLayer; diff --git a/src/fastertransformer/layers/attention_layers/FusedAttentionLayer.h b/src/fastertransformer/layers/attention_layers/FusedAttentionLayer.h index 4d71b12d5..685b021e1 100644 --- a/src/fastertransformer/layers/attention_layers/FusedAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/FusedAttentionLayer.h @@ -45,6 +45,7 @@ class FusedAttentionLayer: public BaseAttentionLayer { void freeBuffer() override; bool isValidBatchSize(size_t batch_size); bool isValidSeqLen(size_t seq_len); + void allocateBuffer(size_t batch_size, size_t seq_len); int sm_; float q_scaling_; @@ -57,20 +58,20 @@ class FusedAttentionLayer: public BaseAttentionLayer { using BaseAttentionLayer::allocator_; protected: - T* q_buf_; - T* k_buf_; - T* v_buf_; - T* q_buf_2_; - T* k_buf_2_; - T* v_buf_2_; - T* qk_buf_; - T* qkv_buf_; - T* qkv_buf_2_; - T* attn_workspace_; - - T** batch_qkv_kernel_ptr_; - T** batch_qkv_input_ptr_; - T** batch_qkv_buf_ptr_; + T* q_buf_ = nullptr; + T* k_buf_ = nullptr; + T* v_buf_ = nullptr; + T* q_buf_2_ = nullptr; + T* k_buf_2_ = nullptr; + T* v_buf_2_ = nullptr; + T* qk_buf_ = nullptr; + T* qkv_buf_ = nullptr; + T* qkv_buf_2_ = nullptr; + T* attn_workspace_ = nullptr; + + T** batch_qkv_kernel_ptr_ = nullptr; + T** batch_qkv_input_ptr_ = nullptr; + T** batch_qkv_buf_ptr_ = nullptr; public: FusedAttentionLayer(size_t max_batch_size, @@ -83,7 +84,7 @@ class FusedAttentionLayer: public BaseAttentionLayer { cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, - bool sparse=false); + bool sparse = false); FusedAttentionLayer(FusedAttentionLayer const& attention_layer); diff --git a/src/fastertransformer/layers/attention_layers/GptContextAttentionLayer.cc b/src/fastertransformer/layers/attention_layers/GptContextAttentionLayer.cc index 4a5ac5582..bada6408b 100644 --- a/src/fastertransformer/layers/attention_layers/GptContextAttentionLayer.cc +++ b/src/fastertransformer/layers/attention_layers/GptContextAttentionLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -39,9 +39,11 @@ void GptContextAttentionLayer::forward(std::vector FT_CHECK(output_tensors->size() == 3); FT_CHECK(output_tensors->at(1).shape.size() == 5); FT_CHECK(output_tensors->at(2).shape.size() == 4 || output_tensors->at(2).shape.size() == 3); - FT_CHECK(isValidBatchSize(input_tensors->at(1).shape[0])); - FT_CHECK(isValidSeqLen(input_tensors->at(1).shape[2])); - allocateBuffer(); + // FT_CHECK(isValidBatchSize(input_tensors->at(1).shape[0])); + // FT_CHECK(isValidSeqLen(input_tensors->at(1).shape[2])); + const int request_batch_size = input_tensors->at(1).shape[0]; + const int request_seq_len = input_tensors->at(1).shape[2]; + allocateBuffer(request_batch_size, request_seq_len); sync_check_cuda_error(); T* attention_out = (T*)output_tensors->at(0).data; @@ -49,12 +51,10 @@ void GptContextAttentionLayer::forward(std::vector const T* attention_mask = (const T*)input_tensors->at(1).data; const bool is_final = *((bool*)(input_tensors->at(2).data)); - const int request_batch_size = input_tensors->at(1).shape[0]; - const int request_seq_len = input_tensors->at(1).shape[2]; const int m = input_tensors->at(0).shape[0]; #ifdef SPARSITY_ENABLED - const int m_padded = div_up(m, 8); + const int m_padded = 8 * div_up(m, 8); if (sparse_ && cublas_wrapper_->isUseSparse(1, 3 * local_hidden_units_, m_padded, hidden_units_)) { cublas_wrapper_->SpGemm(CUBLAS_OP_N, CUBLAS_OP_N, @@ -64,19 +64,20 @@ void GptContextAttentionLayer::forward(std::vector attention_weights->query_weight.sp_kernel, attention_input, qkv_buf_); - } else { + } + else { #endif - cublas_wrapper_->Gemm(CUBLAS_OP_N, - CUBLAS_OP_N, - 3 * local_hidden_units_, // n - m, - hidden_units_, // k - attention_weights->query_weight.kernel, - 3 * local_hidden_units_, // n - attention_input, - hidden_units_, // k - qkv_buf_, - 3 * local_hidden_units_ /* n */); + cublas_wrapper_->Gemm(CUBLAS_OP_N, + CUBLAS_OP_N, + 3 * local_hidden_units_, // n + m, + hidden_units_, // k + attention_weights->query_weight.kernel, + 3 * local_hidden_units_, // n + attention_input, + hidden_units_, // k + qkv_buf_, + 3 * local_hidden_units_ /* n */); #ifdef SPARSITY_ENABLED } #endif @@ -111,7 +112,8 @@ void GptContextAttentionLayer::forward(std::vector sync_check_cuda_error(); if (is_final == false) { - if (is_qk_buf_float_ == true && std::is_same::value == true) { + const cudaDataType_t gemm_data_type = getCudaDataType(); + if (is_qk_buf_float_ == true && gemm_data_type != CUDA_R_32F) { cublas_wrapper_->stridedBatchedGemm(CUBLAS_OP_T, CUBLAS_OP_N, request_seq_len, @@ -119,11 +121,11 @@ void GptContextAttentionLayer::forward(std::vector size_per_head_, 1.0f, k_buf_2_, - CUDA_R_16F, + gemm_data_type, size_per_head_, request_seq_len * size_per_head_, q_buf_2_, - CUDA_R_16F, + gemm_data_type, size_per_head_, request_seq_len * size_per_head_, 0.0f, @@ -195,35 +197,37 @@ void GptContextAttentionLayer::forward(std::vector sync_check_cuda_error(); #ifdef SPARSITY_ENABLED - if (sparse_ && cublas_wrapper_->isUseSparse(1, hidden_units_, m_padded, local_hidden_units_)) { - cublas_wrapper_->SpGemm(CUBLAS_OP_N, - CUBLAS_OP_N, - hidden_units_, - m_padded, - local_hidden_units_, - attention_weights->attention_output_weight.sp_kernel, - qkv_buf_3_, - attention_out); - } else { + if (sparse_ && cublas_wrapper_->isUseSparse(1, hidden_units_, m_padded, local_hidden_units_)) { + cublas_wrapper_->SpGemm(CUBLAS_OP_N, + CUBLAS_OP_N, + hidden_units_, + m_padded, + local_hidden_units_, + attention_weights->attention_output_weight.sp_kernel, + qkv_buf_3_, + attention_out); + } + else { #endif - cublas_wrapper_->Gemm(CUBLAS_OP_N, - CUBLAS_OP_N, - hidden_units_, - m, - local_hidden_units_, - attention_weights->attention_output_weight.kernel, - hidden_units_, - qkv_buf_3_, - local_hidden_units_, - attention_out, - hidden_units_); + cublas_wrapper_->Gemm(CUBLAS_OP_N, + CUBLAS_OP_N, + hidden_units_, + m, + local_hidden_units_, + attention_weights->attention_output_weight.kernel, + hidden_units_, + qkv_buf_3_, + local_hidden_units_, + attention_out, + hidden_units_); #ifdef SPARSITY_ENABLED - } + } #endif } - if (is_free_buffer_after_forward_ == true) + if (is_free_buffer_after_forward_ == true) { freeBuffer(); + } sync_check_cuda_error(); } @@ -331,6 +335,7 @@ GptContextAttentionLayer::~GptContextAttentionLayer() template void GptContextAttentionLayer::allocateBuffer() { + FT_CHECK(false); if (is_allocate_buffer_ == false) { qkv_buf_ = (T*)allocator_->malloc(sizeof(T) * 3 * max_batch_size_ * max_seq_len_ * local_hidden_units_, true); q_buf_2_ = (T*)allocator_->malloc(sizeof(T) * max_batch_size_ * max_seq_len_ * local_hidden_units_, true); @@ -351,12 +356,35 @@ void GptContextAttentionLayer::allocateBuffer() } } +template +void GptContextAttentionLayer::allocateBuffer(size_t batch_size, size_t seq_len) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + qkv_buf_ = (T*)allocator_->reMalloc(qkv_buf_, sizeof(T) * 3 * batch_size * seq_len * local_hidden_units_, true); + q_buf_2_ = (T*)allocator_->reMalloc(q_buf_2_, sizeof(T) * batch_size * seq_len * local_hidden_units_, true); + k_buf_2_ = (T*)allocator_->reMalloc(k_buf_2_, sizeof(T) * batch_size * seq_len * local_hidden_units_, true); + v_buf_2_ = (T*)allocator_->reMalloc(v_buf_2_, sizeof(T) * batch_size * seq_len * local_hidden_units_, true); + + qk_buf_ = (T*)allocator_->reMalloc(qk_buf_, sizeof(T) * batch_size * local_head_num_ * seq_len * seq_len, true); + qkv_buf_2_ = (T*)allocator_->reMalloc(qkv_buf_2_, sizeof(T) * batch_size * seq_len * local_hidden_units_, true); + qkv_buf_3_ = (T*)allocator_->reMalloc(qkv_buf_3_, sizeof(T) * batch_size * seq_len * local_hidden_units_, true); + + if (is_qk_buf_float_ == true) { + qk_buf_float_ = (float*)allocator_->reMalloc( + qk_buf_float_, sizeof(float) * batch_size * local_head_num_ * seq_len * seq_len, true); + } + is_allocate_buffer_ = true; +} + template void GptContextAttentionLayer::freeBuffer() { - if (is_allocate_buffer_ == true) { + if (is_allocate_buffer_) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); allocator_->free(qkv_buf_); allocator_->free(q_buf_2_); + allocator_->free(k_buf_2_); + allocator_->free(v_buf_2_); allocator_->free(qk_buf_); allocator_->free(qkv_buf_2_); allocator_->free(qkv_buf_3_); @@ -364,7 +392,6 @@ void GptContextAttentionLayer::freeBuffer() if (is_qk_buf_float_ == true) { allocator_->free(qk_buf_float_); } - is_allocate_buffer_ = false; } } @@ -397,5 +424,8 @@ bool GptContextAttentionLayer::isValidSeqLen(size_t seq_len) template class GptContextAttentionLayer; template class GptContextAttentionLayer; +#ifdef ENABLE_BF16 +template class GptContextAttentionLayer<__nv_bfloat16>; +#endif -} // namespace fastertransformer \ No newline at end of file +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers/GptContextAttentionLayer.h b/src/fastertransformer/layers/attention_layers/GptContextAttentionLayer.h index f8fbca016..92e2175ef 100644 --- a/src/fastertransformer/layers/attention_layers/GptContextAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/GptContextAttentionLayer.h @@ -37,6 +37,7 @@ class GptContextAttentionLayer: public BaseAttentionLayer { const size_t rotary_embedding_dim_; void allocateBuffer() override; + void allocateBuffer(size_t batch_size, size_t seq_len); void freeBuffer() override; bool isValidBatchSize(size_t batch_size); bool isValidSeqLen(size_t seq_len); @@ -51,14 +52,14 @@ class GptContextAttentionLayer: public BaseAttentionLayer { protected: using BaseAttentionLayer::stream_; using BaseAttentionLayer::sparse_; - T* qkv_buf_; - T* q_buf_2_; - T* k_buf_2_; - T* v_buf_2_; - T* qk_buf_; - float* qk_buf_float_; - T* qkv_buf_2_; - T* qkv_buf_3_; + T* qkv_buf_ = nullptr; + T* q_buf_2_ = nullptr; + T* k_buf_2_ = nullptr; + T* v_buf_2_ = nullptr; + T* qk_buf_ = nullptr; + float* qk_buf_float_ = nullptr; + T* qkv_buf_2_ = nullptr; + T* qkv_buf_3_ = nullptr; public: GptContextAttentionLayer(size_t max_batch_size, diff --git a/src/fastertransformer/layers/attention_layers/LongformerAttentionLayer.h b/src/fastertransformer/layers/attention_layers/LongformerAttentionLayer.h index 86c8ed448..5e5dc3e3a 100644 --- a/src/fastertransformer/layers/attention_layers/LongformerAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/LongformerAttentionLayer.h @@ -22,7 +22,7 @@ namespace fastertransformer { template -class LongformerAttentionLayer : public BaseLayer { +class LongformerAttentionLayer: public BaseLayer { private: size_t head_num_; size_t size_per_head_; @@ -42,13 +42,20 @@ class LongformerAttentionLayer : public BaseLayer { void freeBuffer() override; public: - LongformerAttentionLayer(size_t head_num, size_t size_per_head, size_t local_attn_window_size, - size_t max_global_token_num, size_t max_batch_size, size_t max_seq_len, - float attn_scaler, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, - IAllocator* allocator, bool is_free_buffer_after_forward = false); + LongformerAttentionLayer(size_t head_num, + size_t size_per_head, + size_t local_attn_window_size, + size_t max_global_token_num, + size_t max_batch_size, + size_t max_seq_len, + float attn_scaler, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward = false); ~LongformerAttentionLayer(); void forward(std::vector* output_tensors, const std::vector* input_tensors); }; -} // namespace fastertransformer \ No newline at end of file +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/layers/attention_layers/TensorParallelDecoderCrossAttentionLayer.cc b/src/fastertransformer/layers/attention_layers/TensorParallelDecoderCrossAttentionLayer.cc new file mode 100644 index 000000000..fc704570d --- /dev/null +++ b/src/fastertransformer/layers/attention_layers/TensorParallelDecoderCrossAttentionLayer.cc @@ -0,0 +1,136 @@ +/* + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/layers/attention_layers/TensorParallelDecoderCrossAttentionLayer.h" + +namespace fastertransformer { + +template +TensorParallelDecoderCrossAttentionLayer::TensorParallelDecoderCrossAttentionLayer( + size_t max_batch_size, + size_t head_num, + size_t size_per_head, + size_t d_model, + float q_scaling, + NcclParam tensor_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): + DecoderCrossAttentionLayer(max_batch_size, + head_num / tensor_para.world_size_, + size_per_head, + d_model, + q_scaling, + stream, + cublas_wrapper, + allocator, + is_free_buffer_after_forward), + tensor_para_(tensor_para), + custom_all_reduce_comm_(custom_all_reduce_comm), + enable_custom_all_reduce_(enable_custom_all_reduce) +{ + FT_CHECK(head_num % tensor_para_.world_size_ == 0); +} + +template +TensorParallelDecoderCrossAttentionLayer::TensorParallelDecoderCrossAttentionLayer( + size_t max_batch_size, + size_t head_num, + size_t size_per_head, + NcclParam tensor_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): + TensorParallelDecoderCrossAttentionLayer(max_batch_size, + head_num, + size_per_head, + head_num * size_per_head, + 1.0f, + tensor_para, + stream, + cublas_wrapper, + allocator, + is_free_buffer_after_forward, + custom_all_reduce_comm, + enable_custom_all_reduce) +{ +} + +template +TensorParallelDecoderCrossAttentionLayer::TensorParallelDecoderCrossAttentionLayer( + TensorParallelDecoderCrossAttentionLayer const& attention_layer): + DecoderCrossAttentionLayer(attention_layer), + tensor_para_(attention_layer.tensor_para_), + custom_all_reduce_comm_(attention_layer.custom_all_reduce_comm_), + enable_custom_all_reduce_(attention_layer.enable_custom_all_reduce_) +{ +} + +template +void TensorParallelDecoderCrossAttentionLayer::forward(std::vector* output_tensors, + const std::vector* input_tensors, + const AttentionWeight* attention_weights) +{ + // input tensors: + // attention_input [batch_size, hidden_dimension], + // finished [batch_size], + // sequence_lengths [batch_size] + // input_lengths [batch_size] + // max_input_length [1] on cpu + // step [1] on cpu + + // output tensors: + // attention_output [batch_size, hidden_dimension], + // key_cache [batch, head_num, size_per_head // x, max_seq_len, x] + // value_cache [batch, head_num, max_seq_len, size_per_head] + + const size_t batch_size = output_tensors->at(0).shape[0]; + const size_t hidden_units = output_tensors->at(0).shape[1]; + + bool use_custom_all_reduce_kernel = false; + if (enable_custom_all_reduce_ && custom_all_reduce_comm_ != nullptr) { + use_custom_all_reduce_kernel = + custom_all_reduce_comm_->swapInternalBuffer(output_tensors, batch_size * hidden_units); + } + + DecoderCrossAttentionLayer::forward(output_tensors, input_tensors, attention_weights); + + T* attention_out = (T*)(output_tensors->at(0).data); + if (tensor_para_.world_size_ > 1) { + if (!use_custom_all_reduce_kernel) { + ftNcclAllReduceSum(attention_out, + attention_out, + batch_size * hidden_units, + tensor_para_, + DecoderCrossAttentionLayer::stream_); + } + else { + custom_all_reduce_comm_->customAllReduce(batch_size * hidden_units, DecoderCrossAttentionLayer::stream_); + } + sync_check_cuda_error(); + } +} + +template class TensorParallelDecoderCrossAttentionLayer; +template class TensorParallelDecoderCrossAttentionLayer; + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/layers/attention_layers/TensorParallelDecoderCrossAttentionLayer.h b/src/fastertransformer/layers/attention_layers/TensorParallelDecoderCrossAttentionLayer.h index c7d138a41..e7e2d2b68 100644 --- a/src/fastertransformer/layers/attention_layers/TensorParallelDecoderCrossAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/TensorParallelDecoderCrossAttentionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,6 +17,7 @@ #pragma once #include "src/fastertransformer/layers/attention_layers/DecoderCrossAttentionLayer.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" #include "src/fastertransformer/utils/nccl_utils.h" namespace fastertransformer { @@ -24,32 +25,35 @@ namespace fastertransformer { template class TensorParallelDecoderCrossAttentionLayer: public DecoderCrossAttentionLayer { private: - size_t tensor_para_size_; - ncclComm_t tensor_para_comm_; + NcclParam tensor_para_; + std::shared_ptr custom_all_reduce_comm_; + int enable_custom_all_reduce_; protected: public: TensorParallelDecoderCrossAttentionLayer(size_t max_batch_size, - size_t head_num, - size_t size_per_head, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, - cudaStream_t stream, - cublasMMWrapper* cublas_wrapper, - IAllocator* allocator, - bool is_free_buffer_after_forward); + size_t head_num, + size_t size_per_head, + NcclParam tensor_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + std::shared_ptr custom_all_reduce_comm_ = nullptr, + int enable_custom_all_reduce_ = 0); TensorParallelDecoderCrossAttentionLayer(size_t max_batch_size, - size_t head_num, - size_t size_per_head, - size_t d_model, - float q_scaling, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, - cudaStream_t stream, - cublasMMWrapper* cublas_wrapper, - IAllocator* allocator, - bool is_free_buffer_after_forward); + size_t head_num, + size_t size_per_head, + size_t d_model, + float q_scaling, + NcclParam tensor_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + std::shared_ptr custom_all_reduce_comm_ = nullptr, + int enable_custom_all_reduce_ = 0); TensorParallelDecoderCrossAttentionLayer(TensorParallelDecoderCrossAttentionLayer const& attention_layer); diff --git a/src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.cc b/src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.cc index aded010ec..e48bc4462 100644 --- a/src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.cc +++ b/src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -19,127 +19,139 @@ namespace fastertransformer { template -TensorParallelDecoderSelfAttentionLayer::TensorParallelDecoderSelfAttentionLayer(size_t max_batch_size, - size_t head_num, - size_t size_per_head, - size_t rotary_embedding_dim, - size_t d_model, - float q_scaling, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, - cudaStream_t stream, - cublasMMWrapper* cublas_wrapper, - IAllocator* allocator, - bool is_free_buffer_after_forward, - bool is_sparse, - int int8_mode): +TensorParallelDecoderSelfAttentionLayer::TensorParallelDecoderSelfAttentionLayer( + size_t max_batch_size, + size_t head_num, + size_t size_per_head, + size_t rotary_embedding_dim, + size_t d_model, + float q_scaling, + NcclParam tensor_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_sparse, + int int8_mode, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): DecoderSelfAttentionLayer(max_batch_size, head_num, size_per_head, - head_num / tensor_para_size, + head_num / tensor_para.world_size_, rotary_embedding_dim, d_model, - q_scaling, + q_scaling, // NOTE stream, cublas_wrapper, allocator, is_free_buffer_after_forward, is_sparse, int8_mode), - tensor_para_size_(tensor_para_size), - tensor_para_comm_(tensor_para_comm) + tensor_para_(tensor_para), + custom_all_reduce_comm_(custom_all_reduce_comm), + enable_custom_all_reduce_(enable_custom_all_reduce) { - FT_CHECK(head_num % tensor_para_size == 0); + FT_CHECK(head_num % tensor_para_.world_size_ == 0); } template -TensorParallelDecoderSelfAttentionLayer::TensorParallelDecoderSelfAttentionLayer(size_t max_batch_size, - size_t head_num, - size_t size_per_head, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, - cudaStream_t stream, - cublasMMWrapper* cublas_wrapper, - IAllocator* allocator, - bool is_free_buffer_after_forward, - bool is_sparse, - int int8_mode): +TensorParallelDecoderSelfAttentionLayer::TensorParallelDecoderSelfAttentionLayer( + size_t max_batch_size, + size_t head_num, + size_t size_per_head, + NcclParam tensor_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_sparse, + int int8_mode, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): TensorParallelDecoderSelfAttentionLayer(max_batch_size, head_num, size_per_head, 0, head_num * size_per_head, 1.0f, - tensor_para_size, - tensor_para_comm, + tensor_para, stream, cublas_wrapper, allocator, is_free_buffer_after_forward, is_sparse, - int8_mode) + int8_mode, + custom_all_reduce_comm, + enable_custom_all_reduce) { } template -TensorParallelDecoderSelfAttentionLayer::TensorParallelDecoderSelfAttentionLayer(size_t max_batch_size, - size_t head_num, - size_t size_per_head, - size_t d_model, - float q_scaling, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, - cudaStream_t stream, - cublasMMWrapper* cublas_wrapper, - IAllocator* allocator, - bool is_free_buffer_after_forward, - bool is_sparse, - int int8_mode): +TensorParallelDecoderSelfAttentionLayer::TensorParallelDecoderSelfAttentionLayer( + size_t max_batch_size, + size_t head_num, + size_t size_per_head, + size_t d_model, + float q_scaling, + NcclParam tensor_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_sparse, + int int8_mode, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): TensorParallelDecoderSelfAttentionLayer(max_batch_size, head_num, size_per_head, 0, d_model, q_scaling, - tensor_para_size, - tensor_para_comm, + tensor_para, stream, cublas_wrapper, allocator, is_free_buffer_after_forward, is_sparse, - int8_mode) + int8_mode, + custom_all_reduce_comm, + enable_custom_all_reduce) { } template -TensorParallelDecoderSelfAttentionLayer::TensorParallelDecoderSelfAttentionLayer(size_t max_batch_size, - size_t head_num, - size_t size_per_head, - size_t rotary_embedding_dim, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, - cudaStream_t stream, - cublasMMWrapper* cublas_wrapper, - IAllocator* allocator, - bool is_free_buffer_after_forward, - bool is_sparse, - int int8_mode): +TensorParallelDecoderSelfAttentionLayer::TensorParallelDecoderSelfAttentionLayer( + size_t max_batch_size, + size_t head_num, + size_t size_per_head, + size_t rotary_embedding_dim, + NcclParam tensor_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_sparse, + int int8_mode, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): TensorParallelDecoderSelfAttentionLayer(max_batch_size, head_num, size_per_head, rotary_embedding_dim, head_num * size_per_head, 1.0f, - tensor_para_size, - tensor_para_comm, + tensor_para, stream, cublas_wrapper, allocator, is_free_buffer_after_forward, is_sparse, - int8_mode) + int8_mode, + custom_all_reduce_comm, + enable_custom_all_reduce) { } @@ -147,8 +159,9 @@ template TensorParallelDecoderSelfAttentionLayer::TensorParallelDecoderSelfAttentionLayer( TensorParallelDecoderSelfAttentionLayer const& attention_layer): DecoderSelfAttentionLayer(attention_layer), - tensor_para_size_(attention_layer.tensor_para_size_), - tensor_para_comm_(attention_layer.tensor_para_comm_) + tensor_para_(attention_layer.tensor_para_), + custom_all_reduce_comm_(attention_layer.custom_all_reduce_comm_), + enable_custom_all_reduce_(attention_layer.enable_custom_all_reduce_) { } @@ -170,23 +183,37 @@ void TensorParallelDecoderSelfAttentionLayer::forward(std::vector::forward(output_tensors, input_tensors, attention_weights); - const size_t batch_size = output_tensors->at(0).shape[0]; const size_t hidden_units = output_tensors->at(0).shape[1]; + bool use_custom_all_reduce_kernel = false; + if (enable_custom_all_reduce_ && custom_all_reduce_comm_ != nullptr) { + use_custom_all_reduce_kernel = + custom_all_reduce_comm_->swapInternalBuffer(output_tensors, batch_size * hidden_units); + } + + DecoderSelfAttentionLayer::forward(output_tensors, input_tensors, attention_weights); + T* attention_out = (T*)(output_tensors->at(0).data); - if (tensor_para_size_ > 1) { - ftNcclAllReduceSum(attention_out, - attention_out, - batch_size * hidden_units, - tensor_para_comm_, - DecoderSelfAttentionLayer::stream_); + if (tensor_para_.world_size_ > 1) { + if (!use_custom_all_reduce_kernel) { + ftNcclAllReduceSum(attention_out, + attention_out, + batch_size * hidden_units, + tensor_para_, + DecoderSelfAttentionLayer::stream_); + } + else { + custom_all_reduce_comm_->customAllReduce(batch_size * hidden_units, DecoderSelfAttentionLayer::stream_); + } sync_check_cuda_error(); } } template class TensorParallelDecoderSelfAttentionLayer; template class TensorParallelDecoderSelfAttentionLayer; +#ifdef ENABLE_BF16 +template class TensorParallelDecoderSelfAttentionLayer<__nv_bfloat16>; +#endif } // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.h b/src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.h index e94765514..9bdc595a8 100644 --- a/src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,6 +17,7 @@ #pragma once #include "src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" #include "src/fastertransformer/utils/nccl_utils.h" namespace fastertransformer { @@ -24,8 +25,9 @@ namespace fastertransformer { template class TensorParallelDecoderSelfAttentionLayer: public DecoderSelfAttentionLayer { private: - size_t tensor_para_size_; - ncclComm_t tensor_para_comm_; + NcclParam tensor_para_; + std::shared_ptr custom_all_reduce_comm_; + int enable_custom_all_reduce_; protected: public: @@ -35,53 +37,57 @@ class TensorParallelDecoderSelfAttentionLayer: public DecoderSelfAttentionLayer< size_t rotary_embedding_dim, size_t d_model, float q_scaling, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, + NcclParam tensor_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, bool is_sparse = false, - int int8_mode = 0); + int int8_mode = 0, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce = 0); TensorParallelDecoderSelfAttentionLayer(size_t max_batch_size, size_t head_num, size_t size_per_head, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, + NcclParam tensor_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, bool is_sparse = false, - int int8_mode = 0); + int int8_mode = 0, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce = 0); TensorParallelDecoderSelfAttentionLayer(size_t max_batch_size, size_t head_num, size_t size_per_head, size_t d_model, float q_scaling, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, + NcclParam tensor_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, bool sparse = false, - int int8_mode = 0); + int int8_mode = 0, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce = 0); TensorParallelDecoderSelfAttentionLayer(size_t max_batch_size, size_t head_num, size_t size_per_head, size_t rotary_embedding_dim, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, + NcclParam tensor_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, bool sparse = false, - int int8_mode = 0); + int int8_mode = 0, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce = 0); TensorParallelDecoderSelfAttentionLayer(TensorParallelDecoderSelfAttentionLayer const& attention_layer); diff --git a/src/fastertransformer/layers/attention_layers/TensorParallelGptContextAttentionLayer.cc b/src/fastertransformer/layers/attention_layers/TensorParallelGptContextAttentionLayer.cc index 23b68a188..89507d0d2 100644 --- a/src/fastertransformer/layers/attention_layers/TensorParallelGptContextAttentionLayer.cc +++ b/src/fastertransformer/layers/attention_layers/TensorParallelGptContextAttentionLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -33,15 +33,25 @@ void TensorParallelGptContextAttentionLayer::forward(std::vector::forward(output_tensors, input_tensors, attention_weights); - const size_t m = output_tensors->at(0).shape[0]; const size_t hidden_units = output_tensors->at(0).shape[1]; + bool use_custom_all_reduce_kernel = false; + if (enable_custom_all_reduce_ && custom_all_reduce_comm_ != nullptr) { + use_custom_all_reduce_kernel = custom_all_reduce_comm_->swapInternalBuffer(output_tensors, m * hidden_units); + } + + GptContextAttentionLayer::forward(output_tensors, input_tensors, attention_weights); + T* attention_out = (T*)(output_tensors->at(0).data); - if (tensor_para_size_ > 1) { - ftNcclAllReduceSum( - attention_out, attention_out, m * hidden_units, tensor_para_comm_, GptContextAttentionLayer::stream_); + if (tensor_para_.world_size_ > 1) { + if (!use_custom_all_reduce_kernel) { + ftNcclAllReduceSum( + attention_out, attention_out, m * hidden_units, tensor_para_, GptContextAttentionLayer::stream_); + } + else { + custom_all_reduce_comm_->customAllReduce(m * hidden_units, GptContextAttentionLayer::stream_); + } sync_check_cuda_error(); } } @@ -52,30 +62,31 @@ TensorParallelGptContextAttentionLayer::TensorParallelGptContextAttentionLaye size_t max_seq_len, size_t head_num, size_t size_per_head, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, + NcclParam tensor_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, bool is_qk_buf_float, - bool sparse -): + bool sparse, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): GptContextAttentionLayer(max_batch_size, max_seq_len, head_num, size_per_head, - head_num / tensor_para_size, + head_num / tensor_para.world_size_, stream, cublas_wrapper, allocator, is_free_buffer_after_forward, is_qk_buf_float, sparse), - tensor_para_size_(tensor_para_size), - tensor_para_comm_(tensor_para_comm) + tensor_para_(tensor_para), + custom_all_reduce_comm_(custom_all_reduce_comm), + enable_custom_all_reduce_(enable_custom_all_reduce) { - FT_CHECK(head_num % tensor_para_size == 0); + FT_CHECK(head_num % tensor_para_.world_size_ == 0); } template @@ -85,20 +96,20 @@ TensorParallelGptContextAttentionLayer::TensorParallelGptContextAttentionLaye size_t head_num, size_t size_per_head, size_t rotary_embedding_dim, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, + NcclParam tensor_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, bool is_qk_buf_float, - bool sparse -): + bool sparse, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): GptContextAttentionLayer(max_batch_size, max_seq_len, head_num, size_per_head, - head_num / tensor_para_size, + head_num / tensor_para.world_size_, rotary_embedding_dim, stream, cublas_wrapper, @@ -106,8 +117,9 @@ TensorParallelGptContextAttentionLayer::TensorParallelGptContextAttentionLaye is_free_buffer_after_forward, is_qk_buf_float, sparse), - tensor_para_size_(tensor_para_size), - tensor_para_comm_(tensor_para_comm) + tensor_para_(tensor_para), + custom_all_reduce_comm_(custom_all_reduce_comm), + enable_custom_all_reduce_(enable_custom_all_reduce) { } @@ -115,12 +127,16 @@ template TensorParallelGptContextAttentionLayer::TensorParallelGptContextAttentionLayer( TensorParallelGptContextAttentionLayer const& attention_layer): GptContextAttentionLayer(attention_layer), - tensor_para_size_(attention_layer.tensor_para_size_), - tensor_para_comm_(attention_layer.tensor_para_comm_) + tensor_para_(attention_layer.tensor_para_), + custom_all_reduce_comm_(attention_layer.custom_all_reduce_comm_), + enable_custom_all_reduce_(attention_layer.enable_custom_all_reduce_) { } template class TensorParallelGptContextAttentionLayer; template class TensorParallelGptContextAttentionLayer; +#ifdef ENABLE_BF16 +template class TensorParallelGptContextAttentionLayer<__nv_bfloat16>; +#endif -} // namespace fastertransformer \ No newline at end of file +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers/TensorParallelGptContextAttentionLayer.h b/src/fastertransformer/layers/attention_layers/TensorParallelGptContextAttentionLayer.h index 80748ffaf..c71f7cbcc 100644 --- a/src/fastertransformer/layers/attention_layers/TensorParallelGptContextAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/TensorParallelGptContextAttentionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,6 +17,7 @@ #pragma once #include "src/fastertransformer/layers/attention_layers/GptContextAttentionLayer.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" #include "src/fastertransformer/utils/nccl_utils.h" namespace fastertransformer { @@ -24,36 +25,39 @@ namespace fastertransformer { template class TensorParallelGptContextAttentionLayer: public GptContextAttentionLayer { private: - size_t tensor_para_size_; - ncclComm_t tensor_para_comm_; + NcclParam tensor_para_; + std::shared_ptr custom_all_reduce_comm_; + int enable_custom_all_reduce_; public: TensorParallelGptContextAttentionLayer(size_t max_batch_size, size_t max_seq_len, size_t head_num, size_t size_per_head, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, + NcclParam tensor_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, bool is_qk_buf_float, - bool sparse = false); + bool sparse = false, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce = 0); TensorParallelGptContextAttentionLayer(size_t max_batch_size, size_t max_seq_len, size_t head_num, size_t size_per_head, size_t rotary_embedding_dim, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, + NcclParam tensor_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, bool is_qk_buf_float, - bool sparse = false); + bool sparse = false, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce = 0); TensorParallelGptContextAttentionLayer(TensorParallelGptContextAttentionLayer const& attention_layer); diff --git a/src/fastertransformer/layers/attention_layers/TensorParallelUnfusedAttentionLayer.cc b/src/fastertransformer/layers/attention_layers/TensorParallelUnfusedAttentionLayer.cc index 976b25321..9e0278c3c 100644 --- a/src/fastertransformer/layers/attention_layers/TensorParallelUnfusedAttentionLayer.cc +++ b/src/fastertransformer/layers/attention_layers/TensorParallelUnfusedAttentionLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -33,33 +33,46 @@ void TensorParallelUnfusedAttentionLayer::forward(std::vectorat(0).shape[0] * output_tensors->at(0).shape[1]; + + bool use_custom_all_reduce_kernel = false; + if (enable_custom_all_reduce_ && custom_all_reduce_comm_ != nullptr) { + use_custom_all_reduce_kernel = custom_all_reduce_comm_->swapInternalBuffer(output_tensors, size); + } + UnfusedAttentionLayer::forward(output_tensors, input_tensors, attention_weights); - const size_t size = output_tensors->at(0).shape[0] * output_tensors->at(0).shape[1]; T* attention_out = (T*)(output_tensors->at(0).data); - if (tensor_para_size_ > 1) { - ftNcclAllReduceSum(attention_out, attention_out, size, tensor_para_comm_, UnfusedAttentionLayer::stream_); + if (tensor_para_.world_size_ > 1) { + if (!use_custom_all_reduce_kernel) { + ftNcclAllReduceSum(attention_out, attention_out, size, tensor_para_, UnfusedAttentionLayer::stream_); + } + else { + custom_all_reduce_comm_->customAllReduce(size, UnfusedAttentionLayer::stream_); + } sync_check_cuda_error(); } } template -TensorParallelUnfusedAttentionLayer::TensorParallelUnfusedAttentionLayer(size_t max_batch_size, - size_t max_seq_len, - size_t head_num, - size_t size_per_head, - size_t d_model, - float q_scaling, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, - cudaStream_t stream, - cublasMMWrapper* cublas_wrapper, - IAllocator* allocator, - bool is_free_buffer_after_forward, - bool is_sparse): +TensorParallelUnfusedAttentionLayer::TensorParallelUnfusedAttentionLayer( + size_t max_batch_size, + size_t max_seq_len, + size_t head_num, + size_t size_per_head, + size_t d_model, + float q_scaling, + NcclParam tensor_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_sparse, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): UnfusedAttentionLayer(max_batch_size, max_seq_len, - head_num / tensor_para_size, + head_num / tensor_para.world_size_, size_per_head, d_model, q_scaling, @@ -68,18 +81,17 @@ TensorParallelUnfusedAttentionLayer::TensorParallelUnfusedAttentionLayer(size allocator, is_free_buffer_after_forward, is_sparse), - tensor_para_size_(tensor_para_size), - tensor_para_comm_(tensor_para_comm) + tensor_para_(tensor_para), + custom_all_reduce_comm_(custom_all_reduce_comm), + enable_custom_all_reduce_(enable_custom_all_reduce) { - FT_CHECK(head_num % tensor_para_size == 0); + FT_CHECK(head_num % tensor_para_.world_size_ == 0); } template TensorParallelUnfusedAttentionLayer::TensorParallelUnfusedAttentionLayer( TensorParallelUnfusedAttentionLayer const& attention_layer): - UnfusedAttentionLayer(attention_layer), - tensor_para_size_(attention_layer.tensor_para_size_), - tensor_para_comm_(attention_layer.tensor_para_comm_) + UnfusedAttentionLayer(attention_layer), tensor_para_(attention_layer.tensor_para_) { } diff --git a/src/fastertransformer/layers/attention_layers/TensorParallelUnfusedAttentionLayer.h b/src/fastertransformer/layers/attention_layers/TensorParallelUnfusedAttentionLayer.h index ba78bd83b..b0b6ee53d 100644 --- a/src/fastertransformer/layers/attention_layers/TensorParallelUnfusedAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/TensorParallelUnfusedAttentionLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,6 +17,7 @@ #pragma once #include "src/fastertransformer/layers/attention_layers/UnfusedAttentionLayer.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" #include "src/fastertransformer/utils/nccl_utils.h" namespace fastertransformer { @@ -24,8 +25,9 @@ namespace fastertransformer { template class TensorParallelUnfusedAttentionLayer: public UnfusedAttentionLayer { private: - size_t tensor_para_size_; - ncclComm_t tensor_para_comm_; + NcclParam tensor_para_; + std::shared_ptr custom_all_reduce_comm_; + int enable_custom_all_reduce_; public: TensorParallelUnfusedAttentionLayer(size_t max_batch_size, @@ -34,13 +36,14 @@ class TensorParallelUnfusedAttentionLayer: public UnfusedAttentionLayer { size_t size_per_head, size_t d_model, float q_scaling, - size_t tensor_para_size, - ncclComm_t tensor_para_comm, + NcclParam tensor_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, - bool is_sparse); + bool is_sparse, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce = 0); TensorParallelUnfusedAttentionLayer(TensorParallelUnfusedAttentionLayer const& attention_layer); diff --git a/src/fastertransformer/layers/attention_layers/UnfusedAttentionLayer.cc b/src/fastertransformer/layers/attention_layers/UnfusedAttentionLayer.cc index 3f96de8f0..1edd52f87 100644 --- a/src/fastertransformer/layers/attention_layers/UnfusedAttentionLayer.cc +++ b/src/fastertransformer/layers/attention_layers/UnfusedAttentionLayer.cc @@ -31,10 +31,14 @@ void UnfusedAttentionLayer::forward(std::vector* o // relative_attention_bias (optional) // If padding_offset.data is nullptr, then not remove padding + FT_LOG_DEBUG(__PRETTY_FUNCTION__); FT_CHECK(isValidBatchSize(input_tensors->at(1).shape[0])); FT_CHECK(isValidSeqLen(input_tensors->at(1).shape[2])); FT_CHECK(input_tensors->size() == 3 || input_tensors->size() == 4); - allocateBuffer(); + // allocateBuffer(); + const int request_batch_size = input_tensors->at(1).shape[0]; + const int request_seq_len = input_tensors->at(1).shape[2]; + allocateBuffer(request_batch_size, request_seq_len); T* attention_out = (T*)output_tensors->at(0).data; const T* from_tensor = (const T*)input_tensors->at(0).data; @@ -42,8 +46,8 @@ void UnfusedAttentionLayer::forward(std::vector* o const int* padding_offset = (const int*)input_tensors->at(2).data; const T* relative_attention_bias = input_tensors->size() == 4 ? (const T*)input_tensors->at(3).data : nullptr; - const int request_batch_size = input_tensors->at(1).shape[0]; - const int request_seq_len = input_tensors->at(1).shape[2]; + bool with_bias = attention_weights->query_weight.bias != nullptr ? true : false; + bool use_relative_position_bias = relative_attention_bias != nullptr ? true : false; const int m = input_tensors->at(0).shape[0]; int k = d_model_; @@ -145,7 +149,7 @@ void UnfusedAttentionLayer::forward(std::vector* o sync_check_cuda_error(); } else { - cudaMemsetAsync(q_buf_2_, 0, 3 * max_batch_size_ * max_seq_len_ * hidden_units_ * sizeof(T), stream_); + cudaMemsetAsync(q_buf_2_, 0, 3 * request_batch_size * request_seq_len * hidden_units_ * sizeof(T), stream_); sync_check_cuda_error(); invokeAddQKVBiasRebuildPadding(q_buf_, attention_weights->query_weight.bias, @@ -166,6 +170,8 @@ void UnfusedAttentionLayer::forward(std::vector* o sync_check_cuda_error(); } + float scalar = 1 / (sqrtf(size_per_head_ * 1.0f) * q_scaling_); + cublas_wrapper_->stridedBatchedGemm(CUBLAS_OP_T, CUBLAS_OP_N, request_seq_len, @@ -180,18 +186,17 @@ void UnfusedAttentionLayer::forward(std::vector* o qk_buf_, request_seq_len, request_seq_len * request_seq_len, - request_batch_size * head_num_); - - T scalar = 1 / (sqrtf(size_per_head_ * 1.0f) * q_scaling_); + request_batch_size * head_num_, + scalar); // TODO (fuse with softMax) - if (relative_attention_bias != nullptr) { + if (use_relative_position_bias) { invokeAddRelativeAttentionBias( qk_buf_, relative_attention_bias, request_batch_size, head_num_, request_seq_len, stream_); } invokeMaskedSoftMax( - qk_buf_, qk_buf_, attention_mask, request_batch_size, request_seq_len, head_num_, scalar, stream_); + qk_buf_, qk_buf_, attention_mask, request_batch_size, request_seq_len, head_num_, (T)1.0f, stream_); sync_check_cuda_error(); cublas_wrapper_->stridedBatchedGemm(CUBLAS_OP_N, @@ -258,8 +263,9 @@ void UnfusedAttentionLayer::forward(std::vector* o } #endif - if (is_free_buffer_after_forward_ == true) + if (is_free_buffer_after_forward_ == true) { freeBuffer(); + } sync_check_cuda_error(); } @@ -332,6 +338,7 @@ UnfusedAttentionLayer::UnfusedAttentionLayer(UnfusedAttentionLayer const& template UnfusedAttentionLayer::~UnfusedAttentionLayer() { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); cublas_wrapper_ = nullptr; freeBuffer(); } @@ -349,18 +356,36 @@ void UnfusedAttentionLayer::allocateBuffer() qk_buf_ = (T*)allocator_->malloc(sizeof(T) * max_batch_size_ * head_num_ * max_seq_len_ * max_seq_len_, false); qkv_buf_ = (T*)allocator_->malloc(sizeof(T) * max_batch_size_ * max_seq_len_ * hidden_units_, false); qkv_buf_2_ = (T*)allocator_->malloc(sizeof(T) * max_batch_size_ * max_seq_len_ * hidden_units_, false); - batch_qkv_kernel_ptr_ = (T**)allocator_->malloc(sizeof(T*) * 12, false); batch_qkv_input_ptr_ = batch_qkv_kernel_ptr_ + 4; batch_qkv_buf_ptr_ = batch_qkv_input_ptr_ + 4; - is_allocate_buffer_ = true; } } +template +void UnfusedAttentionLayer::allocateBuffer(size_t batch_size, size_t seq_len) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + q_buf_ = (T*)allocator_->reMalloc(q_buf_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + k_buf_ = (T*)allocator_->reMalloc(k_buf_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + v_buf_ = (T*)allocator_->reMalloc(v_buf_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + q_buf_2_ = (T*)allocator_->reMalloc(q_buf_2_, sizeof(T) * 3 * batch_size * seq_len * hidden_units_, false); + k_buf_2_ = q_buf_2_ + batch_size * seq_len * hidden_units_; + v_buf_2_ = k_buf_2_ + batch_size * seq_len * hidden_units_; + qk_buf_ = (T*)allocator_->reMalloc(qk_buf_, sizeof(T) * batch_size * head_num_ * seq_len * seq_len, false); + qkv_buf_ = (T*)allocator_->reMalloc(qkv_buf_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + qkv_buf_2_ = (T*)allocator_->reMalloc(qkv_buf_2_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + batch_qkv_kernel_ptr_ = (T**)allocator_->reMalloc(batch_qkv_kernel_ptr_, sizeof(T*) * 12, false); + batch_qkv_input_ptr_ = batch_qkv_kernel_ptr_ + 4; + batch_qkv_buf_ptr_ = batch_qkv_input_ptr_ + 4; + is_allocate_buffer_ = true; +} + template void UnfusedAttentionLayer::freeBuffer() { - if (is_allocate_buffer_ == true) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + if (is_allocate_buffer_) { allocator_->free(q_buf_); allocator_->free(k_buf_); allocator_->free(v_buf_); @@ -368,8 +393,8 @@ void UnfusedAttentionLayer::freeBuffer() allocator_->free(qk_buf_); allocator_->free(qkv_buf_); allocator_->free(qkv_buf_2_); - allocator_->free(batch_qkv_kernel_ptr_); + sync_check_cuda_error(); is_allocate_buffer_ = false; } } @@ -377,27 +402,19 @@ void UnfusedAttentionLayer::freeBuffer() template bool UnfusedAttentionLayer::isValidBatchSize(size_t batch_size) { - if (batch_size <= max_batch_size_) { - return true; - } - else { - freeBuffer(); - max_batch_size_ = batch_size * 1.2; - return true; + if (max_batch_size_ < batch_size) { + max_batch_size_ = batch_size; } + return true; } template bool UnfusedAttentionLayer::isValidSeqLen(size_t seq_len) { - if (seq_len <= max_seq_len_) { - return true; - } - else { - freeBuffer(); - max_seq_len_ = seq_len * 1.2; - return true; + if (max_seq_len_ < seq_len) { + max_seq_len_ = seq_len; } + return true; } template class UnfusedAttentionLayer; diff --git a/src/fastertransformer/layers/attention_layers/UnfusedAttentionLayer.h b/src/fastertransformer/layers/attention_layers/UnfusedAttentionLayer.h index cdb728d93..a6e1374d7 100644 --- a/src/fastertransformer/layers/attention_layers/UnfusedAttentionLayer.h +++ b/src/fastertransformer/layers/attention_layers/UnfusedAttentionLayer.h @@ -39,6 +39,7 @@ class UnfusedAttentionLayer: public BaseAttentionLayer { void freeBuffer() override; bool isValidBatchSize(size_t batch_size); bool isValidSeqLen(size_t seq_len); + void allocateBuffer(size_t batch_size, size_t seq_len); protected: using BaseAttentionLayer::stream_; @@ -47,19 +48,19 @@ class UnfusedAttentionLayer: public BaseAttentionLayer { using BaseAttentionLayer::cublas_wrapper_; using BaseAttentionLayer::allocator_; - T* q_buf_; - T* k_buf_; - T* v_buf_; - T* q_buf_2_; - T* k_buf_2_; - T* v_buf_2_; - T* qk_buf_; - T* qkv_buf_; - T* qkv_buf_2_; + T* q_buf_ = nullptr; + T* k_buf_ = nullptr; + T* v_buf_ = nullptr; + T* q_buf_2_ = nullptr; + T* k_buf_2_ = nullptr; + T* v_buf_2_ = nullptr; + T* qk_buf_ = nullptr; + T* qkv_buf_ = nullptr; + T* qkv_buf_2_ = nullptr; - T** batch_qkv_kernel_ptr_; - T** batch_qkv_input_ptr_; - T** batch_qkv_buf_ptr_; + T** batch_qkv_kernel_ptr_ = nullptr; + T** batch_qkv_input_ptr_ = nullptr; + T** batch_qkv_buf_ptr_ = nullptr; public: UnfusedAttentionLayer(size_t max_batch_size, diff --git a/src/fastertransformer/layers/attention_layers/WindowAttention.cc b/src/fastertransformer/layers/attention_layers/WindowAttention.cc new file mode 100644 index 000000000..d74d2769f --- /dev/null +++ b/src/fastertransformer/layers/attention_layers/WindowAttention.cc @@ -0,0 +1,391 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/layers/attention_layers/WindowAttention.h" + +namespace fastertransformer { + +template +int WindowAttention::trt_getS(const int actual_seqlen) +{ + int S = 384; + if (actual_seqlen <= 64) { + S = 64; + } + else if (actual_seqlen <= 128) { + S = 128; + } + else if (actual_seqlen <= 256) { + S = 256; + } + else if (actual_seqlen <= 384) { + S = 384; + } + return S; +} + +template +size_t WindowAttention::roundByteSize(const size_t size, const int factor) +{ + return (size + factor - 1) / factor * factor; +} + +template +size_t WindowAttention::getBufSize( + const int batch, const int num_head, const int window_num, const int window_len, const int dim) +{ + int sm; +#if (__CUDA_ARCH__ < 750) + sm = 70; +#else + sm = 75; +#endif + // in case we may use trt fused-multihead attention + if ((sm == 75 || sm == 80 || sm == 86) && std::is_same::value && window_len <= TRT_MAX_LEN) { + int S = trt_getS(window_len); + // transformed_attention_mask + size_t buf_size = roundByteSize(window_num * S * S * sizeof(T), 4) + + // transformed_relative_position_bias + roundByteSize(num_head * S * S * sizeof(T), 4) + + // qkv_buf_ + q_buf_ + k_buf_ + v_buf_ + 6 * batch * window_num * window_len * dim * sizeof(T) + + // qk_buf_ + 0; + return (buf_size + 31) / 32 * 32; + } + // we will not use trt fused-multihead attention + { + // qkv_buf_ + q_buf_ + k_buf_ + v_buf_ + size_t buf_size = 6 * batch * window_num * window_len * dim * sizeof(T) + + // qk_buf_ + batch * window_num * num_head * window_len * window_len * sizeof(T); + return (buf_size + 31) / 32 * 32; + } +} + +template +void WindowAttention::allocateBuffer() +{ + int num_head = num_head_; + if (!is_free_buffer_after_forward_) { + num_head = num_head * 8; + } + if (is_allocate_buffer_ == false) { + if (use_trt_) { + int S = trt_getS(window_len_); + trt_attention_mask_ = (half*)allocator_->malloc(roundByteSize(window_num_ * S * S * sizeof(T), 4), false); + trt_relative_position_bias_ = + (half*)allocator_->malloc(roundByteSize(num_head * S * S * sizeof(T), 4), false); + qkv_buf_ = + (T*)allocator_->malloc(3 * max_batch_ * window_num_ * window_len_ * embed_dim_ * sizeof(T), false); + q_buf_ = (T*)allocator_->malloc(3 * max_batch_ * window_num_ * window_len_ * embed_dim_ * sizeof(T), false); + k_buf_ = q_buf_ + max_batch_ * window_num_ * window_len_ * embed_dim_; + v_buf_ = k_buf_ + max_batch_ * window_num_ * window_len_ * embed_dim_; + qk_buf_ = nullptr; + } + else { + trt_attention_mask_ = nullptr; + trt_relative_position_bias_ = nullptr; + qkv_buf_ = + (T*)allocator_->malloc(3 * max_batch_ * window_num_ * window_len_ * embed_dim_ * sizeof(T), false); + q_buf_ = (T*)allocator_->malloc(3 * max_batch_ * window_num_ * window_len_ * embed_dim_ * sizeof(T), false); + k_buf_ = q_buf_ + max_batch_ * window_num_ * window_len_ * embed_dim_; + v_buf_ = k_buf_ + max_batch_ * window_num_ * window_len_ * embed_dim_; + qk_buf_ = (T*)allocator_->malloc( + 3 * max_batch_ * window_num_ * num_head * window_len_ * window_len_ * sizeof(T), false); + } + is_allocate_buffer_ = true; + } +} + +template +void WindowAttention::freeBuffer() +{ + if (is_allocate_buffer_ == true) { + if (use_trt_) { + allocator_->free(trt_attention_mask_); + allocator_->free(trt_relative_position_bias_); + allocator_->free(qkv_buf_); + allocator_->free(q_buf_); + } + else { + allocator_->free(qkv_buf_); + allocator_->free(q_buf_); + allocator_->free(qk_buf_); + } + is_allocate_buffer_ = false; + } +} + +template +WindowAttention::WindowAttention(int max_batch, + int window_size, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool qkv_bias, + float qk_scale): + BaseAttentionLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), + max_batch_(max_batch), + window_size_(window_size), + qkv_bias_(qkv_bias), + qk_scale_(qk_scale) +{ + window_len_ = window_size_ * window_size_; +} + +template +WindowAttention::~WindowAttention() +{ +} + +template +void WindowAttention::forward(std::vector* output_tensors, + const std::vector* input_tensors, + const AttentionWeight* attention_weights) +{ + // input_tensors: + // input [batch * window_num * window_len, dim] + // attention_mask [window_num, window_len, window_len] + // attention_relative_position_bias [num_head, window_len, window_len] + // additional_params [6] {batch, dim, input_resolution, num_head, shift_size, sm} + // output_tensors: + // output [batch * window_num * window_len, dim] + + T* output = (T*)output_tensors->at(0).data; + const T* input = (const T*)input_tensors->at(0).data; + const T* attention_mask = (const T*)input_tensors->at(1).data; + const T* attention_relative_pos_bias = (const T*)input_tensors->at(2).data; + const int* additional_params = (const int*)input_tensors->at(3).data; + const int batch = additional_params[0]; + const int dim = additional_params[1]; + const int input_resolution = additional_params[2]; + const int num_head = additional_params[3]; + const int shift_size = additional_params[4]; + const int sm = additional_params[5]; + + int size_per_head = dim / num_head; + int trt_S = 1024; + if ((sm == 75 || sm == 80 || sm == 86) && size_per_head == 32 && window_len_ <= TRT_MAX_LEN + && std::is_same::value) { + trt_S = trt_getS(window_len_); + use_trt_ = true; + } + num_head_ = num_head; + window_num_ = (input_resolution / window_size_) * (input_resolution / window_size_); + embed_dim_ = dim; + allocateBuffer(); + + float scale = 1.0f / sqrt(size_per_head); + if (fabs(qk_scale_ - 1.0f) > 0.0001) { + scale = qk_scale_; + } + + if (use_trt_) { + if (dispatcher_fp16_.get() && num_head == dispatcher_fp16_num_head_) {} + else { + dispatcher_fp16_.reset(new FusedMHARunnerFP16v2(num_head, size_per_head, sm, 1.0f)); + dispatcher_fp16_num_head_ = num_head; + } + } + + // NOTICE: We preprocess the attention_qkv_kernel and attention_qkv_bias for : + // 1. gemm+bias fusion in cublasLt 11.x and + // 2. fmha. + // So attention_qkv_kernel is [k, head*3*size], attention_qkv_bias is [head*3*size] + + int S; + if (use_trt_ && dispatcher_fp16_.get()) { + S = dispatcher_fp16_->getSFromMaxSeqLen(window_len_); + } + + if (use_trt_ && dispatcher_fp16_.get() && dispatcher_fp16_->isValid(S)) { +#if (CUDART_VERSION >= 11000) + cublas_wrapper_->Gemm(CUBLAS_OP_N, + CUBLAS_OP_N, + 3 * dim, + batch * window_num_ * window_len_, + dim, + attention_weights->query_weight.kernel, + 3 * dim, + input, + dim, + attention_weights->query_weight.bias, + q_buf_, + 3 * dim); +#else + cublas_wrapper_->Gemm(CUBLAS_OP_N, + CUBLAS_OP_N, + 3 * dim, + batch * window_num_ * window_len_, + dim, + attention_weights->query_weight.kernel, + 3 * dim, + input, + dim, + q_buf_, + 3 * dim); + + invokeAddBias((half*)q_buf_, + (const half*)(attention_weights->query_weight.bias), + batch * window_num_ * window_len_, + 3 * dim, + stream_); +#endif + + half* trt_attention_mask = nullptr; + if (shift_size != 0) { + invokeTransformMask(trt_attention_mask_, (const half*)attention_mask, window_num_, window_len_, stream_); + trt_attention_mask = trt_attention_mask_; + } + + invokeTransformMask( + trt_relative_position_bias_, (const half*)attention_relative_pos_bias, num_head, window_len_, stream_); + const int B = batch * window_num_; + dispatcher_fp16_->setup(S, B, window_num_); + dispatcher_fp16_->run( + q_buf_, trt_attention_mask, trt_relative_position_bias_, window_len_, nullptr, qkv_buf_, stream_); + cublas_wrapper_->Gemm(CUBLAS_OP_T, + CUBLAS_OP_N, + dim, + batch * window_num_ * window_len_, + dim, + attention_weights->attention_output_weight.kernel, + dim, + qkv_buf_, + dim, + q_buf_, + dim); + } + else { + + cublas_wrapper_->Gemm(CUBLAS_OP_N, + CUBLAS_OP_N, + 3 * dim, + batch * window_num_ * window_len_, + dim, + attention_weights->query_weight.kernel, + 3 * dim, + input, + dim, + qkv_buf_, + 3 * dim); + + invokeAddHead3SizeQKVBias(qkv_buf_, + attention_weights->query_weight.bias, + q_buf_, + k_buf_, + v_buf_, + batch, + window_num_, + window_len_, + num_head, + size_per_head, + stream_); + + cublas_wrapper_->stridedBatchedGemm(CUBLAS_OP_T, + CUBLAS_OP_N, + window_len_, + window_len_, + size_per_head, + k_buf_, + size_per_head, + window_len_ * size_per_head, + q_buf_, + size_per_head, + window_len_ * size_per_head, + qk_buf_, + window_len_, + window_len_ * window_len_, + batch * window_num_ * num_head); + + if (shift_size != 0) { + invokeMaskedSoftMaxWithRelPosBias(qk_buf_, + attention_mask, + attention_relative_pos_bias, + batch, + num_head, + window_num_, + window_len_, + scale, + stream_); + } + else { + const T* attn_mask_tmp = nullptr; + invokeMaskedSoftMaxWithRelPosBias(qk_buf_, + attn_mask_tmp, + attention_relative_pos_bias, + batch, + num_head, + window_num_, + window_len_, + scale, + stream_); + } + + cublas_wrapper_->stridedBatchedGemm(CUBLAS_OP_N, + CUBLAS_OP_N, + size_per_head, + window_len_, + window_len_, + v_buf_, + size_per_head, + size_per_head * window_len_, + qk_buf_, + window_len_, + window_len_ * window_len_, + qkv_buf_, + size_per_head, + size_per_head * window_len_, + batch * window_num_ * num_head); + + invokeTransposeQKV(v_buf_, qkv_buf_, batch * window_num_, window_len_, num_head, size_per_head, stream_); + + cublas_wrapper_->Gemm(CUBLAS_OP_T, + CUBLAS_OP_N, + dim, + batch * window_num_ * window_len_, + dim, + attention_weights->attention_output_weight.kernel, + dim, + v_buf_, + dim, + q_buf_, + dim); + } + + invokeReverseRoll(output, + q_buf_, + batch, + window_num_, + window_len_, + window_size_, + input_resolution, + input_resolution, + dim, + shift_size, + stream_); + + if (is_free_buffer_after_forward_) { + freeBuffer(); + } +} + +template class WindowAttention; +template class WindowAttention; + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/layers/attention_layers/WindowAttention.h b/src/fastertransformer/layers/attention_layers/WindowAttention.h new file mode 100644 index 000000000..13f066e84 --- /dev/null +++ b/src/fastertransformer/layers/attention_layers/WindowAttention.h @@ -0,0 +1,95 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "3rdparty/trt_fused_multihead_attention/qkvToContext.h" +#include "src/fastertransformer/kernels/activation_kernels.h" +#include "src/fastertransformer/kernels/reverse_roll_kernels.h" +#include "src/fastertransformer/kernels/transform_mask_kernels.h" +#include "src/fastertransformer/kernels/unfused_attention_kernels.h" +#include "src/fastertransformer/layers/BaseLayer.h" +#include "src/fastertransformer/layers/attention_layers/BaseAttentionLayer.h" +#include "src/fastertransformer/models/swin/SwinWeight.h" +#include "src/fastertransformer/utils/Tensor.h" +#include "src/fastertransformer/utils/cuda_utils.h" +#include +#include +#include + +#define TRT_MAX_LEN 384 + +namespace fastertransformer { +template +class WindowAttention: public BaseAttentionLayer { + +private: + int max_batch_ = 1; + int dim_ = 96; + int num_head_ = 2; + int window_size_ = 7; + int head_dim_ = 48; + int input_resolution_ = 56; + int window_len_ = 49; + int embed_dim_ = 96; + int window_num_ = 64; + int size_per_head_; + bool qkv_bias_ = true; + float qk_scale_ = 1.0f; + bool use_trt_ = false; + + void allocateBuffer() override; + void freeBuffer() override; + + int dispatcher_fp16_num_head_ = -1; + std::unique_ptr dispatcher_fp16_; + + using BaseAttentionLayer::stream_; + using BaseAttentionLayer::is_free_buffer_after_forward_; + using BaseAttentionLayer::is_allocate_buffer_; + using BaseAttentionLayer::cublas_wrapper_; + using BaseAttentionLayer::allocator_; + + T *buf_ = nullptr, *qkv_buf_ = nullptr; + T *q_buf_ = nullptr, *k_buf_ = nullptr, *v_buf_ = nullptr, *qk_buf_ = nullptr; + + half *trt_attention_mask_ = nullptr, *trt_relative_position_bias_ = nullptr; + +public: + static int trt_getS(const int actual_seqlen); + + static size_t roundByteSize(const size_t size, const int factor); + + static size_t + getBufSize(const int batch, const int num_head, const int window_num, const int window_len, const int dim); + + WindowAttention(int max_batch, + int window_size, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward = false, + bool qkv_bias = true, + float qk_scale = 1.0f); + + ~WindowAttention(); + + void forward(std::vector* output_tensors, + const std::vector* input_tensors, + const AttentionWeight* attention_weights); + +}; // class WindowAttention +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers_int8/AttentionINT8Weight.h b/src/fastertransformer/layers/attention_layers_int8/AttentionINT8Weight.h index 768128612..cef1f2477 100644 --- a/src/fastertransformer/layers/attention_layers_int8/AttentionINT8Weight.h +++ b/src/fastertransformer/layers/attention_layers_int8/AttentionINT8Weight.h @@ -22,7 +22,7 @@ namespace fastertransformer { template -struct AttentionINT8Weight : AttentionWeight { +struct AttentionINT8Weight: AttentionWeight { ScaleList* scale_list_ptr; }; diff --git a/src/fastertransformer/layers/attention_layers_int8/CMakeLists.txt b/src/fastertransformer/layers/attention_layers_int8/CMakeLists.txt index c3d96eb3d..03f6b240c 100644 --- a/src/fastertransformer/layers/attention_layers_int8/CMakeLists.txt +++ b/src/fastertransformer/layers/attention_layers_int8/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -24,3 +24,9 @@ set_property(TARGET FusedAttentionLayerINT8 PROPERTY POSITION_INDEPENDENT_CODE set_property(TARGET FusedAttentionLayerINT8 PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) target_link_libraries(FusedAttentionLayerINT8 PUBLIC -lcublasLt -lcublas -lcudart cublasMMWrapper cublasINT8MMWrapper trt_fused_multi_head_attention) +add_library(WindowAttentionINT8 STATIC WindowAttentionINT8.cu) +set_property(TARGET WindowAttentionINT8 PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET WindowAttentionINT8 PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(WindowAttentionINT8 PUBLIC -lcublasLt -lcublas -lcudart cublasINT8MMWrapper reverse_roll_kernels + trt_fused_multi_head_attention layout_transformer_int8_kernels transpose_int8_kernels unfused_attention_int8_kernels + layernorm_int8_kernels softmax_int8_kernels layernorm_kernels transform_mask_kernels) diff --git a/src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.cu b/src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.cu index 013c6cec1..527db49f5 100644 --- a/src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.cu +++ b/src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.cu @@ -14,290 +14,335 @@ * limitations under the License. */ -#include "src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.h" #include "src/fastertransformer/kernels/int8_utils.cuh" +#include "src/fastertransformer/kernels/layout_transformer_int8_kernels.h" +#include "src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.h" -namespace fastertransformer -{ - -//transfrom row-major to COL32 -//input matrix is (m, n) row-major -//output matrix is (m, n) COL32 -//n should be a mutiple of 32 -//grid((n+31)/32, (m+31)/32) -//block(8, 32) -__global__ -void rowMajorToCOL32_kernel(char4*dst, const char4* src, const int m, const int n) -{ - - int n_id = (blockIdx.x*blockDim.x + threadIdx.x) << 2; - int m_id = blockIdx.y*blockDim.y + threadIdx.y; - - bool check = ((m_id < m) && (n_id < n)); - if (check) - { - - // COL32_col = n_id >> 5 ; COL32_row = (m_id << 5) + (n_id & 31); - // COL32_idx = (COL32_col << 5) * m + COL32_row = (n_id & 0xffffffe0)*m + (m_id << 5) + (n_id & 31) - dst[((n_id & 0xffffffe0)*m + (m_id << 5) + (n_id & 31)) >> 2] = __ldg(src+((m_id*n+n_id) >> 2)); - } -} - -//transfrom row-major to COL32 -//input matrix is (m, n) row-major -//output matrix is (m, n) COL32 -//n should be a mutiple of 32 -//grid((n+31)/32, (m+31)/32) -//block(8, 32) -void invokeRowMajorToCOL32(int8_t* dst, const int8_t* src, const int m, const int n, cudaStream_t stream) -{ - assert(n%32 == 0); - rowMajorToCOL32_kernel<<>>((char4*)dst, (const char4*)src, m, n); -} +namespace fastertransformer { -// add bias and then transform from +// add bias and then transform from // 3 * ([valid_word_num, head*size] + CUBLASLT_ORDER_COL32) -> [valid_word_num, head, 3, size] + row-major // input is INT32 && per axis quantization for weight // output is INT8 && per tensor quantization // grid((head*size + 31)/32, (valid_word_num + 31)/32, 3) // block(8, 32) // size should be a multiple of 4 -//using char4 as output, int4 as input -template -__global__ -void trt_add_QKV_bias_COL32_int32IInt8O(char4* output, const int4* QKV, - const T* bias_Q, const T* bias_K, const T* bias_V, - const float *input_deQFactor_div127_ptr, - const float *q_weight_amax, - const float *k_weight_amax, - const float *v_weight_amax, - const float qkv_output_scale, const int valid_word_num, const int head_num, - const int size_per_head, const int head_num_x_size_per_head) { +// using char4 as output, int4 as input +template +__global__ void trt_add_QKV_bias_COL32_int32IInt8O(char4* output, + const int4* QKV, + const T* bias_Q, + const T* bias_K, + const T* bias_V, + const float* input_deQFactor_div127_ptr, + const float* q_weight_amax, + const float* k_weight_amax, + const float* v_weight_amax, + const float qkv_output_scale, + const int valid_word_num, + const int head_num, + const int size_per_head, + const int head_num_x_size_per_head) +{ const int qkv_id = blockIdx.z; const int seq_id = (blockIdx.y << 5) + threadIdx.y; const int threadIdx4 = threadIdx.x << 2; int hidden_id = (blockIdx.x << 5) + threadIdx4; const int size_id = hidden_id % size_per_head; const int head_id = hidden_id / size_per_head; - + const bool qual = (seq_id < valid_word_num) && (hidden_id < head_num_x_size_per_head); if (qual) { const float* weight_amax = qkv_id == 0 ? q_weight_amax : (qkv_id == 1 ? k_weight_amax : v_weight_amax); - const float input_deQFactor_div127 = __ldg(input_deQFactor_div127_ptr); - + const float input_deQFactor_div127 = __ldg(input_deQFactor_div127_ptr); + const T* bias_ptr = (qkv_id == 0) ? bias_Q : ((qkv_id == 1) ? bias_K : bias_V); - - const int input_id = (qkv_id * valid_word_num * head_num_x_size_per_head + ((hidden_id & 0xffffffe0)*valid_word_num + (seq_id << 5) + (hidden_id&31))) >> 2; - + + const int input_id = (qkv_id * valid_word_num * head_num_x_size_per_head + + ((hidden_id & 0xffffffe0) * valid_word_num + (seq_id << 5) + (hidden_id & 31))) + >> 2; + char4 tmp; - const int4 tmp_int4 = __ldg(QKV+input_id); - - tmp.x = float_to_int8_rn((static_cast(tmp_int4.x) * __ldg(weight_amax+hidden_id) * input_deQFactor_div127 + static_cast(__ldg(bias_ptr + hidden_id))) * qkv_output_scale); - + const int4 tmp_int4 = __ldg(QKV + input_id); + + tmp.x = + float_to_int8_rn((static_cast(tmp_int4.x) * __ldg(weight_amax + hidden_id) * input_deQFactor_div127 + + static_cast(__ldg(bias_ptr + hidden_id))) + * qkv_output_scale); + hidden_id += 1; - tmp.y = float_to_int8_rn((static_cast(tmp_int4.y) * __ldg(weight_amax+hidden_id) * input_deQFactor_div127 + static_cast(__ldg(bias_ptr + hidden_id))) * qkv_output_scale); - + tmp.y = + float_to_int8_rn((static_cast(tmp_int4.y) * __ldg(weight_amax + hidden_id) * input_deQFactor_div127 + + static_cast(__ldg(bias_ptr + hidden_id))) + * qkv_output_scale); + hidden_id += 1; - tmp.z = float_to_int8_rn((static_cast(tmp_int4.z) * __ldg(weight_amax+hidden_id) * input_deQFactor_div127 + static_cast(__ldg(bias_ptr + hidden_id))) * qkv_output_scale); - + tmp.z = + float_to_int8_rn((static_cast(tmp_int4.z) * __ldg(weight_amax + hidden_id) * input_deQFactor_div127 + + static_cast(__ldg(bias_ptr + hidden_id))) + * qkv_output_scale); + hidden_id += 1; - tmp.w = float_to_int8_rn((static_cast(tmp_int4.w) * __ldg(weight_amax+hidden_id) * input_deQFactor_div127 + static_cast(__ldg(bias_ptr + hidden_id))) * qkv_output_scale); + tmp.w = + float_to_int8_rn((static_cast(tmp_int4.w) * __ldg(weight_amax + hidden_id) * input_deQFactor_div127 + + static_cast(__ldg(bias_ptr + hidden_id))) + * qkv_output_scale); + + // const int output_id = (seq_id * 3 * head_num_x_size_per_head + head_id * 3 * size_per_head + qkv_id * + // size_per_head + size_id) >> 2; + const int output_id = + ((seq_id * head_num_x_size_per_head + head_id * size_per_head) * 3 + qkv_id * size_per_head + size_id) >> 2; - //const int output_id = (seq_id * 3 * head_num_x_size_per_head + head_id * 3 * size_per_head + qkv_id * size_per_head + size_id) >> 2; - const int output_id = ((seq_id * head_num_x_size_per_head + head_id * size_per_head) * 3 + qkv_id * size_per_head + size_id) >> 2; - output[output_id] = tmp; } } -template -void invokeTrtAddQkvBiasInt32Iint8O( - int8_t* output, - const int32_t* Q, - const T* bias_Q, - const T* bias_K, - const T* bias_V, - const size_t token_num, - const size_t head_num, - const size_t size_per_head, - const float *input_deQFactor_div127_ptr, - const float * q_weight_amax, - const float * k_weight_amax, - const float * v_weight_amax, - const float mScaleQkv, - const cudaStream_t stream) { - - int head_num_x_size_per_head = head_num*size_per_head; - dim3 grid((head_num_x_size_per_head + 31)/32, (token_num + 31)/32, 3); +template +void invokeTrtAddQkvBiasInt32Iint8O(int8_t* output, + const int32_t* Q, + const T* bias_Q, + const T* bias_K, + const T* bias_V, + const size_t token_num, + const size_t head_num, + const size_t size_per_head, + const float* input_deQFactor_div127_ptr, + const float* q_weight_amax, + const float* k_weight_amax, + const float* v_weight_amax, + const float mScaleQkv, + const cudaStream_t stream) +{ + + int head_num_x_size_per_head = head_num * size_per_head; + dim3 grid((head_num_x_size_per_head + 31) / 32, (token_num + 31) / 32, 3); dim3 block(8, 32); assert(size_per_head % 4 == 0); - trt_add_QKV_bias_COL32_int32IInt8O<<>>((char4*)output, (const int4*)Q, - bias_Q, bias_K, bias_V, + trt_add_QKV_bias_COL32_int32IInt8O<<>>((char4*)output, + (const int4*)Q, + bias_Q, + bias_K, + bias_V, input_deQFactor_div127_ptr, - q_weight_amax, + q_weight_amax, k_weight_amax, v_weight_amax, - 1.f/mScaleQkv, token_num, - head_num, size_per_head, head_num_x_size_per_head); + 1.f / mScaleQkv, + token_num, + head_num, + size_per_head, + head_num_x_size_per_head); } -// Add bias, and then transform from +// Add bias, and then transform from // 3 * ([valid_word_num, head*size] + CUBLASLT_ORDER_COL32) -> [valid_word_num, head, 3, size] + row-major // grid((head*size + 31)/32, (valid_word_num + 31)/32, 3) // block(8, 32) // size should be a multiple of 4 -template -__global__ -void trt_add_QKV_bias_COL32_int8IO(char4* output, const char4* QKV, - const T* bias_Q, const T* bias_K, const T* bias_V, - const float *q_input_deQFactor_ptr, const float *k_input_deQFactor_ptr, - const float *v_input_deQFactor_ptr, const float qkv_output_scale, - const int valid_word_num, const int head_num, const int size_per_head, - const int head_num_x_size_per_head) { +template +__global__ void trt_add_QKV_bias_COL32_int8IO(char4* output, + const char4* QKV, + const T* bias_Q, + const T* bias_K, + const T* bias_V, + const float* q_input_deQFactor_ptr, + const float* k_input_deQFactor_ptr, + const float* v_input_deQFactor_ptr, + const float qkv_output_scale, + const int valid_word_num, + const int head_num, + const int size_per_head, + const int head_num_x_size_per_head) +{ const int qkv_id = blockIdx.z; const int seq_id = (blockIdx.y << 5) + threadIdx.y; const int threadIdx4 = threadIdx.x << 2; const int hidden_id = (blockIdx.x << 5) + threadIdx4; const int size_id = hidden_id % size_per_head; const int head_id = hidden_id / size_per_head; - + const bool qual = (seq_id < valid_word_num) && (hidden_id < head_num_x_size_per_head); if (qual) { - const float *input_deQFactor_ptr = (qkv_id == 0) ? q_input_deQFactor_ptr : ((qkv_id == 1) ? k_input_deQFactor_ptr : v_input_deQFactor_ptr); + const float* input_deQFactor_ptr = + (qkv_id == 0) ? q_input_deQFactor_ptr : ((qkv_id == 1) ? k_input_deQFactor_ptr : v_input_deQFactor_ptr); const float input_deQFactor = __ldg(input_deQFactor_ptr); const T* bias_ptr = (qkv_id == 0) ? bias_Q : ((qkv_id == 1) ? bias_K : bias_V); - - const int input_id = (qkv_id * valid_word_num * head_num_x_size_per_head + ((hidden_id & 0xffffffe0)*valid_word_num + (seq_id << 5) + (hidden_id&31))) >> 2; - - char4 tmp = __ldg(QKV+input_id); - - tmp.x = float_to_int8_rn((static_cast(tmp.x) * input_deQFactor + static_cast(__ldg(bias_ptr + hidden_id))) * qkv_output_scale); - - tmp.y = float_to_int8_rn((static_cast(tmp.y) * input_deQFactor + static_cast(__ldg(bias_ptr + hidden_id + 1))) * qkv_output_scale); - - tmp.z = float_to_int8_rn((static_cast(tmp.z) * input_deQFactor + static_cast(__ldg(bias_ptr + hidden_id + 2))) * qkv_output_scale); - - tmp.w = float_to_int8_rn((static_cast(tmp.w) * input_deQFactor + static_cast(__ldg(bias_ptr + hidden_id + 3))) * qkv_output_scale); - - //const int output_id = (seq_id * 3 * head_num_x_size_per_head + head_id * 3 * size_per_head + qkv_id * size_per_head + size_id) >> 2; - const int output_id = ((seq_id * head_num_x_size_per_head + head_id * size_per_head) * 3 + qkv_id * size_per_head + size_id) >> 2; - + + const int input_id = (qkv_id * valid_word_num * head_num_x_size_per_head + + ((hidden_id & 0xffffffe0) * valid_word_num + (seq_id << 5) + (hidden_id & 31))) + >> 2; + + char4 tmp = __ldg(QKV + input_id); + + tmp.x = float_to_int8_rn( + (static_cast(tmp.x) * input_deQFactor + static_cast(__ldg(bias_ptr + hidden_id))) + * qkv_output_scale); + + tmp.y = float_to_int8_rn( + (static_cast(tmp.y) * input_deQFactor + static_cast(__ldg(bias_ptr + hidden_id + 1))) + * qkv_output_scale); + + tmp.z = float_to_int8_rn( + (static_cast(tmp.z) * input_deQFactor + static_cast(__ldg(bias_ptr + hidden_id + 2))) + * qkv_output_scale); + + tmp.w = float_to_int8_rn( + (static_cast(tmp.w) * input_deQFactor + static_cast(__ldg(bias_ptr + hidden_id + 3))) + * qkv_output_scale); + + // const int output_id = (seq_id * 3 * head_num_x_size_per_head + head_id * 3 * size_per_head + qkv_id * + // size_per_head + size_id) >> 2; + const int output_id = + ((seq_id * head_num_x_size_per_head + head_id * size_per_head) * 3 + qkv_id * size_per_head + size_id) >> 2; + output[output_id] = tmp; } } template -void invokeTrtAddQkvBiasInt8IO( - int8_t* output, - const int8_t* Q, - const T* bias_Q, - const T* bias_K, - const T* bias_V, - const size_t token_num, - const size_t head_num, - const size_t size_per_head, - const float *q_input_deQFactor_ptr, - const float *k_input_deQFactor_ptr, - const float *v_input_deQFactor_ptr, - const float mScaleQkv, - const cudaStream_t stream) { - - int head_num_x_size_per_head = head_num*size_per_head; - dim3 grid((head_num_x_size_per_head + 31)/32, (token_num + 31)/32, 3); +void invokeTrtAddQkvBiasInt8IO(int8_t* output, + const int8_t* Q, + const T* bias_Q, + const T* bias_K, + const T* bias_V, + const size_t token_num, + const size_t head_num, + const size_t size_per_head, + const float* q_input_deQFactor_ptr, + const float* k_input_deQFactor_ptr, + const float* v_input_deQFactor_ptr, + const float mScaleQkv, + const cudaStream_t stream) +{ + + int head_num_x_size_per_head = head_num * size_per_head; + dim3 grid((head_num_x_size_per_head + 31) / 32, (token_num + 31) / 32, 3); dim3 block(8, 32); assert(size_per_head % 4 == 0); - trt_add_QKV_bias_COL32_int8IO<<>>((char4*)output, (const char4*)Q, - bias_Q, bias_K, bias_V, - q_input_deQFactor_ptr, k_input_deQFactor_ptr, v_input_deQFactor_ptr, - 1.0f/mScaleQkv, token_num, - head_num, size_per_head, head_num_x_size_per_head); + trt_add_QKV_bias_COL32_int8IO<<>>((char4*)output, + (const char4*)Q, + bias_Q, + bias_K, + bias_V, + q_input_deQFactor_ptr, + k_input_deQFactor_ptr, + v_input_deQFactor_ptr, + 1.0f / mScaleQkv, + token_num, + head_num, + size_per_head, + head_num_x_size_per_head); } - -// Add bias, and then transform from +// Add bias, and then transform from // 3 * ([valid_word_num, head*size] + row-major) -> [valid_word_num, head, 3, size] + row-major // grid((head*size + 31)/32, (valid_word_num + 31)/32, 3) // block(8, 32) // size should be a multiple of 4 -template -__global__ -void trt_add_QKV_bias_ROW_int8IO(char4* output, const char4* QKV, - const T* bias_Q, const T* bias_K, const T* bias_V, - const float *q_input_deQFactor_ptr, const float *k_input_deQFactor_ptr, - const float *v_input_deQFactor_ptr, const float qkv_output_scale, - const int valid_word_num, const int head_num, const int size_per_head, - const int head_num_x_size_per_head) { +template +__global__ void trt_add_QKV_bias_ROW_int8IO(char4* output, + const char4* QKV, + const T* bias_Q, + const T* bias_K, + const T* bias_V, + const float* q_input_deQFactor_ptr, + const float* k_input_deQFactor_ptr, + const float* v_input_deQFactor_ptr, + const float qkv_output_scale, + const int valid_word_num, + const int head_num, + const int size_per_head, + const int head_num_x_size_per_head) +{ const int qkv_id = blockIdx.z; const int seq_id = (blockIdx.y << 5) + threadIdx.y; const int threadIdx4 = threadIdx.x << 2; const int hidden_id = (blockIdx.x << 5) + threadIdx4; const int size_id = hidden_id % size_per_head; const int head_id = hidden_id / size_per_head; - + const bool qual = (seq_id < valid_word_num) && (hidden_id < head_num_x_size_per_head); if (qual) { - const float *input_deQFactor_ptr = (qkv_id == 0) ? q_input_deQFactor_ptr : ((qkv_id == 1) ? k_input_deQFactor_ptr : v_input_deQFactor_ptr); + const float* input_deQFactor_ptr = + (qkv_id == 0) ? q_input_deQFactor_ptr : ((qkv_id == 1) ? k_input_deQFactor_ptr : v_input_deQFactor_ptr); const float input_deQFactor = __ldg(input_deQFactor_ptr); const T* bias_ptr = (qkv_id == 0) ? bias_Q : ((qkv_id == 1) ? bias_K : bias_V); - - const int input_id = (qkv_id * valid_word_num * head_num_x_size_per_head + seq_id * head_num_x_size_per_head + hidden_id) >> 2; - - char4 tmp = __ldg(QKV+input_id); - - tmp.x = float_to_int8_rn((static_cast(tmp.x) * input_deQFactor + static_cast(__ldg(bias_ptr + hidden_id))) * qkv_output_scale); - - tmp.y = float_to_int8_rn((static_cast(tmp.y) * input_deQFactor + static_cast(__ldg(bias_ptr + hidden_id + 1))) * qkv_output_scale); - - tmp.z = float_to_int8_rn((static_cast(tmp.z) * input_deQFactor + static_cast(__ldg(bias_ptr + hidden_id + 2))) * qkv_output_scale); - - tmp.w = float_to_int8_rn((static_cast(tmp.w) * input_deQFactor + static_cast(__ldg(bias_ptr + hidden_id + 3))) * qkv_output_scale); - - const int output_id = ((seq_id * head_num_x_size_per_head + head_id * size_per_head) * 3 + qkv_id * size_per_head + size_id) >> 2; - + + const int input_id = + (qkv_id * valid_word_num * head_num_x_size_per_head + seq_id * head_num_x_size_per_head + hidden_id) >> 2; + + char4 tmp = __ldg(QKV + input_id); + + tmp.x = float_to_int8_rn( + (static_cast(tmp.x) * input_deQFactor + static_cast(__ldg(bias_ptr + hidden_id))) + * qkv_output_scale); + + tmp.y = float_to_int8_rn( + (static_cast(tmp.y) * input_deQFactor + static_cast(__ldg(bias_ptr + hidden_id + 1))) + * qkv_output_scale); + + tmp.z = float_to_int8_rn( + (static_cast(tmp.z) * input_deQFactor + static_cast(__ldg(bias_ptr + hidden_id + 2))) + * qkv_output_scale); + + tmp.w = float_to_int8_rn( + (static_cast(tmp.w) * input_deQFactor + static_cast(__ldg(bias_ptr + hidden_id + 3))) + * qkv_output_scale); + + const int output_id = + ((seq_id * head_num_x_size_per_head + head_id * size_per_head) * 3 + qkv_id * size_per_head + size_id) >> 2; + output[output_id] = tmp; } } template -void invokeTrtAddQkvBiasInt8IORow( - int8_t* output, - const int8_t* Q, - const T* bias_Q, - const T* bias_K, - const T* bias_V, - const size_t token_num, - const size_t head_num, - const size_t size_per_head, - const float *q_input_deQFactor_ptr, - const float *k_input_deQFactor_ptr, - const float *v_input_deQFactor_ptr, - const float mScaleQkv, - const cudaStream_t stream) { - - int head_num_x_size_per_head = head_num*size_per_head; - dim3 grid((head_num_x_size_per_head + 31)/32, (token_num + 31)/32, 3); +void invokeTrtAddQkvBiasInt8IORow(int8_t* output, + const int8_t* Q, + const T* bias_Q, + const T* bias_K, + const T* bias_V, + const size_t token_num, + const size_t head_num, + const size_t size_per_head, + const float* q_input_deQFactor_ptr, + const float* k_input_deQFactor_ptr, + const float* v_input_deQFactor_ptr, + const float mScaleQkv, + const cudaStream_t stream) +{ + + int head_num_x_size_per_head = head_num * size_per_head; + dim3 grid((head_num_x_size_per_head + 31) / 32, (token_num + 31) / 32, 3); dim3 block(8, 32); assert(size_per_head % 4 == 0); - trt_add_QKV_bias_ROW_int8IO<<>>((char4*)output, (const char4*)Q, - bias_Q, bias_K, bias_V, - q_input_deQFactor_ptr, k_input_deQFactor_ptr, v_input_deQFactor_ptr, - 1.0f/mScaleQkv, token_num, - head_num, size_per_head, head_num_x_size_per_head); + trt_add_QKV_bias_ROW_int8IO<<>>((char4*)output, + (const char4*)Q, + bias_Q, + bias_K, + bias_V, + q_input_deQFactor_ptr, + k_input_deQFactor_ptr, + v_input_deQFactor_ptr, + 1.0f / mScaleQkv, + token_num, + head_num, + size_per_head, + head_num_x_size_per_head); } - -template -void FusedAttentionLayerINT8::forward(std::vector *output_tensors, - const std::vector *input_tensors, - const AttentionWeight *attention_weights) +template +void FusedAttentionLayerINT8::forward(std::vector* output_tensors, + const std::vector* input_tensors, + const AttentionWeight* attention_weights) { // input_tensors: [input (token_num, hidden_dimension), // attention_mask (batch, 1, seqlen, seqlen), @@ -305,10 +350,10 @@ void FusedAttentionLayerINT8::forward(std::vector // output_tensors: [output (token_num, hidden_dimension)] // If padding_offset.data is nullptr, then not remove padding - const ScaleList* scale_list = ((const AttentionINT8Weight *)attention_weights)->scale_list_ptr; + const ScaleList* scale_list = ((const AttentionINT8Weight*)attention_weights)->scale_list_ptr; cublasINT8MMWrapper* cublas_wrapper = (cublasINT8MMWrapper*)cublas_wrapper_; - // input_tensors: [input_query (token_num, hidden_dimension), + // input_tensors: [input_query (token_num, hidden_dimension), // attention_mask (batch, 1, seqlen, seqlen), // padding_offset (batch + 1 or batch * 2 + 1))] // If padding_offset.data is nullptr, then not remove padding @@ -337,129 +382,210 @@ void FusedAttentionLayerINT8::forward(std::vector const int fusedINT8QKV_type = cublas_wrapper->getFusedINT8QKVType(k, n, attention_weights); if (int8_mode_ == 1) { - //K_int_buf_ V_int_buf_ should point to correct buffer according to m + // K_int_buf_ V_int_buf_ should point to correct buffer according to m K_int_buf_ = (int*)Q_int_buf_ + m * head_num_ * size_per_head_; V_int_buf_ = (int*)K_int_buf_ + m * head_num_ * size_per_head_; if (fusedINT8QKV_type == 0) { - cublas_wrapper->Gemm(Q_int_buf_, 1, m, n, k, 0, 0, 0, - from_tensor, (int8_t*)(attention_weights->query_weight.kernel)); - cublas_wrapper->Gemm(K_int_buf_, 1, m, n, k, 0, 0, 0, - from_tensor, (int8_t*)(attention_weights->key_weight.kernel)); - cublas_wrapper->Gemm(V_int_buf_, 1, m, n, k, 0, 0, 0, - from_tensor, (int8_t*)(attention_weights->value_weight.kernel)); + cublas_wrapper->Gemm( + Q_int_buf_, 1, m, n, k, 0, 0, 0, from_tensor, (int8_t*)(attention_weights->query_weight.kernel)); + cublas_wrapper->Gemm( + K_int_buf_, 1, m, n, k, 0, 0, 0, from_tensor, (int8_t*)(attention_weights->key_weight.kernel)); + cublas_wrapper->Gemm( + V_int_buf_, 1, m, n, k, 0, 0, 0, from_tensor, (int8_t*)(attention_weights->value_weight.kernel)); } else { - int strideFactor = (fusedINT8QKV_type == 1) ? (sizeof(T)/sizeof(int8_t)) : 1; - cublas_wrapper->Gemm(Q_int_buf_, 3, m, n, k, 0, n*k*strideFactor, n*m, - from_tensor, (int8_t*)(attention_weights->query_weight.kernel)); + int strideFactor = (fusedINT8QKV_type == 1) ? (sizeof(T) / sizeof(int8_t)) : 1; + cublas_wrapper->Gemm(Q_int_buf_, + 3, + m, + n, + k, + 0, + n * k * strideFactor, + n * m, + from_tensor, + (int8_t*)(attention_weights->query_weight.kernel)); } - invokeTrtAddQkvBiasInt32Iint8O(qkv_buf_, Q_int_buf_, attention_weights->query_weight.bias, - attention_weights->key_weight.bias, attention_weights->value_weight.bias, - m, head_num_, size_per_head_, - &(scale_list->d_scale_list_[2]), + invokeTrtAddQkvBiasInt32Iint8O(qkv_buf_, + Q_int_buf_, + attention_weights->query_weight.bias, + attention_weights->key_weight.bias, + attention_weights->value_weight.bias, + m, + head_num_, + size_per_head_, + &(scale_list->d_scale_list_[2]), &(scale_list->d_scale_list_[scale_list->p2_offset_]), &(scale_list->d_scale_list_[scale_list->p2_offset_ + hidden_units_]), - &(scale_list->d_scale_list_[scale_list->p2_offset_ + 2*hidden_units_]), - scale_list->h_scale_list_[scale_list->p4_offset_]/127.0f, - stream_); + &(scale_list->d_scale_list_[scale_list->p2_offset_ + 2 * hidden_units_]), + scale_list->h_scale_list_[scale_list->p4_offset_] / 127.0f, + stream_); } else if (int8_mode_ == 2 || int8_mode_ == 3) { - //K_int_buf_ V_int_buf_ should point to correct buffer according to m + // K_int_buf_ V_int_buf_ should point to correct buffer according to m K_int_buf_ = (int*)((int8_t*)Q_int_buf_ + m * head_num_ * size_per_head_); V_int_buf_ = (int*)((int8_t*)K_int_buf_ + m * head_num_ * size_per_head_); - + #ifdef SPARSITY_ENABLED if (sparse_) { - cublas_wrapper->SpGemm(n, m_padded, k, - scale_list->h_scale_list_[scale_list->p3_offset_+0], + cublas_wrapper->SpGemm(n, + m_padded, + k, + scale_list->h_scale_list_[scale_list->p3_offset_ + 0], (int8_t*)(attention_weights->query_weight.sp_kernel), from_tensor, (int8_t*)Q_int_buf_); - cublas_wrapper->SpGemm(n, m_padded, k, - scale_list->h_scale_list_[scale_list->p3_offset_+1], + cublas_wrapper->SpGemm(n, + m_padded, + k, + scale_list->h_scale_list_[scale_list->p3_offset_ + 1], (int8_t*)(attention_weights->key_weight.sp_kernel), from_tensor, (int8_t*)K_int_buf_); - cublas_wrapper->SpGemm(n, m_padded, k, - scale_list->h_scale_list_[scale_list->p3_offset_+2], + cublas_wrapper->SpGemm(n, + m_padded, + k, + scale_list->h_scale_list_[scale_list->p3_offset_ + 2], (int8_t*)(attention_weights->value_weight.sp_kernel), from_tensor, (int8_t*)V_int_buf_); - } else { -#endif - if (fusedINT8QKV_type == 0) { - cublas_wrapper->Gemm((int8_t*)Q_int_buf_, 1, m, n, k, 0, 0, 0, - scale_list->h_scale_list_[scale_list->p3_offset_+0], - from_tensor, (int8_t*)(attention_weights->query_weight.kernel)); - cublas_wrapper->Gemm((int8_t*)K_int_buf_, 1, m, n, k, 0, 0, 0, - scale_list->h_scale_list_[scale_list->p3_offset_+1], - from_tensor, (int8_t*)(attention_weights->key_weight.kernel)); - cublas_wrapper->Gemm((int8_t*)V_int_buf_, 1, m, n, k, 0, 0, 0, - scale_list->h_scale_list_[scale_list->p3_offset_+2], - from_tensor, (int8_t*)(attention_weights->value_weight.kernel)); } else { - int strideFactor = (fusedINT8QKV_type == 1) ? (sizeof(T)/sizeof(int8_t)) : 1; - cublas_wrapper->Gemm((int8_t*)Q_int_buf_, 3, m, n, k, 0, n*k*strideFactor, n*m, - scale_list->h_scale_list_[scale_list->p3_offset_+0], - from_tensor, (int8_t*)(attention_weights->query_weight.kernel)); - } +#endif + if (fusedINT8QKV_type == 0) { + cublas_wrapper->Gemm((int8_t*)Q_int_buf_, + 1, + m, + n, + k, + 0, + 0, + 0, + scale_list->h_scale_list_[scale_list->p3_offset_ + 0], + from_tensor, + (int8_t*)(attention_weights->query_weight.kernel)); + cublas_wrapper->Gemm((int8_t*)K_int_buf_, + 1, + m, + n, + k, + 0, + 0, + 0, + scale_list->h_scale_list_[scale_list->p3_offset_ + 1], + from_tensor, + (int8_t*)(attention_weights->key_weight.kernel)); + cublas_wrapper->Gemm((int8_t*)V_int_buf_, + 1, + m, + n, + k, + 0, + 0, + 0, + scale_list->h_scale_list_[scale_list->p3_offset_ + 2], + from_tensor, + (int8_t*)(attention_weights->value_weight.kernel)); + } + else { + int strideFactor = (fusedINT8QKV_type == 1) ? (sizeof(T) / sizeof(int8_t)) : 1; + cublas_wrapper->Gemm((int8_t*)Q_int_buf_, + 3, + m, + n, + k, + 0, + n * k * strideFactor, + n * m, + scale_list->h_scale_list_[scale_list->p3_offset_ + 0], + from_tensor, + (int8_t*)(attention_weights->query_weight.kernel)); + } #ifdef SPARSITY_ENABLED } if (sparse_) { - invokeTrtAddQkvBiasInt8IORow(qkv_buf_, (int8_t*)Q_int_buf_, attention_weights->query_weight.bias, - attention_weights->key_weight.bias, attention_weights->value_weight.bias, - m, head_num_, size_per_head_, - &(scale_list->d_scale_list_[4+1]), &(scale_list->d_scale_list_[12+1]), - &(scale_list->d_scale_list_[20+1]), scale_list->h_scale_list_[scale_list->p4_offset_]/127.0f, stream_); - } else { + invokeTrtAddQkvBiasInt8IORow(qkv_buf_, + (int8_t*)Q_int_buf_, + attention_weights->query_weight.bias, + attention_weights->key_weight.bias, + attention_weights->value_weight.bias, + m, + head_num_, + size_per_head_, + &(scale_list->d_scale_list_[4 + 1]), + &(scale_list->d_scale_list_[12 + 1]), + &(scale_list->d_scale_list_[20 + 1]), + scale_list->h_scale_list_[scale_list->p4_offset_] / 127.0f, + stream_); + } + else { #endif - invokeTrtAddQkvBiasInt8IO(qkv_buf_, (int8_t*)Q_int_buf_, attention_weights->query_weight.bias, - attention_weights->key_weight.bias, attention_weights->value_weight.bias, m, head_num_, size_per_head_, - &(scale_list->d_scale_list_[4+1]), &(scale_list->d_scale_list_[12+1]), - &(scale_list->d_scale_list_[20+1]), scale_list->h_scale_list_[scale_list->p4_offset_]/127.0f, stream_); + invokeTrtAddQkvBiasInt8IO(qkv_buf_, + (int8_t*)Q_int_buf_, + attention_weights->query_weight.bias, + attention_weights->key_weight.bias, + attention_weights->value_weight.bias, + m, + head_num_, + size_per_head_, + &(scale_list->d_scale_list_[4 + 1]), + &(scale_list->d_scale_list_[12 + 1]), + &(scale_list->d_scale_list_[20 + 1]), + scale_list->h_scale_list_[scale_list->p4_offset_] / 127.0f, + stream_); #ifdef SPARSITY_ENABLED } #endif } - + int S = dispatcher_int8_->getSFromMaxSeqLen(request_seq_len); FT_CHECK(dispatcher_int8_->isValid(S)); const int B = input_tensors->at(2).shape[0] - 1; - //setScaleList should be executed before setup - dispatcher_int8_->setScaleList(scale_list->h_scale_list_[scale_list->p4_offset_]/127.0f, - scale_list->h_scale_list_[scale_list->p4_offset_ + 1]/127.0f, - scale_list->h_scale_list_[scale_list->p4_offset_ + 2]/127.0f); + // setScaleList should be executed before setup + dispatcher_int8_->setScaleList(scale_list->h_scale_list_[scale_list->p4_offset_] / 127.0f, + scale_list->h_scale_list_[scale_list->p4_offset_ + 1] / 127.0f, + scale_list->h_scale_list_[scale_list->p4_offset_ + 2] / 127.0f); dispatcher_int8_->setup(S, B); dispatcher_int8_->run(qkv_buf_, nullptr, (int*)input_tensors->at(2).data, attn_workspace_, qkv_buf_2_, stream_); sync_check_cuda_error(); - + #ifdef SPARSITY_ENABLED if (!sparse_) { #endif - //qkv_buf_2_ is [batch*seqlen, hidden_dim] row-major - invokeRowMajorToCOL32(qkv_buf_, qkv_buf_2_, m, hidden_units_, stream_); + // qkv_buf_2_ is [batch*seqlen, hidden_dim] row-major + invokeRowMajorToCOL32(qkv_buf_, qkv_buf_2_, m, hidden_units_, stream_); #ifdef SPARSITY_ENABLED } #endif if (int8_mode_ == 1) { - cublas_wrapper->Gemm(attention_out, 1, m, n, k, 0, 0, 0, - qkv_buf_, (int8_t*)(attention_weights->attention_output_weight.kernel)); + cublas_wrapper->Gemm( + attention_out, 1, m, n, k, 0, 0, 0, qkv_buf_, (int8_t*)(attention_weights->attention_output_weight.kernel)); } else if (int8_mode_ == 2 || int8_mode_ == 3) { #ifdef SPARSITY_ENABLED if (sparse_) { - cublas_wrapper->SpGemm(n, m_padded, k, - scale_list->h_scale_list_[scale_list->p3_offset_+5], + cublas_wrapper->SpGemm(n, + m_padded, + k, + scale_list->h_scale_list_[scale_list->p3_offset_ + 5], (int8_t*)(attention_weights->attention_output_weight.sp_kernel), qkv_buf_2_, (int8_t*)attention_out); - } else { + } + else { #endif - cublas_wrapper->Gemm((int8_t*)attention_out, 1, m, n, k, 0, 0, 0, - scale_list->h_scale_list_[scale_list->p3_offset_+5], - qkv_buf_, (int8_t*)(attention_weights->attention_output_weight.kernel)); + cublas_wrapper->Gemm((int8_t*)attention_out, + 1, + m, + n, + k, + 0, + 0, + 0, + scale_list->h_scale_list_[scale_list->p3_offset_ + 5], + qkv_buf_, + (int8_t*)(attention_weights->attention_output_weight.kernel)); #ifdef SPARSITY_ENABLED } #endif @@ -469,81 +595,88 @@ void FusedAttentionLayerINT8::forward(std::vector } } -template -FusedAttentionLayerINT8::FusedAttentionLayerINT8(size_t max_batch_size, size_t max_seq_len, - size_t head_num, size_t size_per_head, - int sm, - float q_scaling, - int int8_mode, - cudaStream_t stream, - cublasMMWrapper *cublas_wrapper, - IAllocator *allocator, - bool is_free_buffer_after_forward, - bool sparse): - BaseAttentionLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), - max_batch_size_(max_batch_size), - max_seq_len_(max_seq_len), - head_num_(head_num), - size_per_head_(size_per_head), - sm_(sm), - q_scaling_(q_scaling), - int8_mode_(int8_mode), - sparse_(sparse) { - if ((sm_ == kSM_86 || sm_ == kSM_80 || sm_ == kSM_75 || sm_ == kSM_72) && size_per_head_ == 64) +template +FusedAttentionLayerINT8::FusedAttentionLayerINT8(size_t max_batch_size, + size_t max_seq_len, + size_t head_num, + size_t size_per_head, + int sm, + float q_scaling, + int int8_mode, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool sparse): + BaseAttentionLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), + max_batch_size_(max_batch_size), + max_seq_len_(max_seq_len), + head_num_(head_num), + size_per_head_(size_per_head), + sm_(sm), + q_scaling_(q_scaling), + int8_mode_(int8_mode), + sparse_(sparse) +{ + if ((sm_ == kSM_86 || sm_ == kSM_80 || sm_ == kSM_75 || sm_ == kSM_72) && size_per_head_ == 64) { dispatcher_int8_.reset(new FusedMHARunnerInt8v2(head_num_, size_per_head_, sm_, q_scaling_)); - else{ - throw std::runtime_error( - std::string("[FT][ERROR] FusedAttentionLayerINT8 not support \n")); + } + else { + throw std::runtime_error(std::string("[FT][ERROR] FusedAttentionLayerINT8 not support \n")); } hidden_units_ = head_num_ * size_per_head_; } -template +template FusedAttentionLayerINT8::FusedAttentionLayerINT8(FusedAttentionLayerINT8 const& attention_layer): - BaseAttentionLayer(attention_layer.stream_, - attention_layer.cublas_wrapper_, - attention_layer.allocator_, - attention_layer.is_free_buffer_after_forward_), - max_batch_size_(attention_layer.max_batch_size_), - max_seq_len_(attention_layer.max_seq_len_), - head_num_(attention_layer.head_num_), - size_per_head_(attention_layer.size_per_head_), - hidden_units_(attention_layer.hidden_units_), - sm_(attention_layer.sm_), - q_scaling_(attention_layer.q_scaling_), - int8_mode_(attention_layer.int8_mode_), - sparse_(attention_layer.sparse_) { - if ((sm_ == kSM_86 || sm_ == kSM_80 || sm_ == kSM_75 || sm_ == kSM_72) && size_per_head_ == 64) + BaseAttentionLayer(attention_layer.stream_, + attention_layer.cublas_wrapper_, + attention_layer.allocator_, + attention_layer.is_free_buffer_after_forward_), + max_batch_size_(attention_layer.max_batch_size_), + max_seq_len_(attention_layer.max_seq_len_), + head_num_(attention_layer.head_num_), + size_per_head_(attention_layer.size_per_head_), + hidden_units_(attention_layer.hidden_units_), + sm_(attention_layer.sm_), + q_scaling_(attention_layer.q_scaling_), + int8_mode_(attention_layer.int8_mode_), + sparse_(attention_layer.sparse_) +{ + if ((sm_ == kSM_86 || sm_ == kSM_80 || sm_ == kSM_75 || sm_ == kSM_72) && size_per_head_ == 64) { dispatcher_int8_.reset(new FusedMHARunnerInt8v2(head_num_, size_per_head_, sm_, q_scaling_)); - else{ - throw std::runtime_error( - std::string("[FT][ERROR] FusedAttentionLayerINT8 not support \n")); + } + else { + throw std::runtime_error(std::string("[FT][ERROR] FusedAttentionLayerINT8 not support \n")); } } -template +template FusedAttentionLayerINT8::~FusedAttentionLayerINT8() { cublas_wrapper_ = nullptr; freeBuffer(); } -template +template void FusedAttentionLayerINT8::allocateBuffer() { if (is_allocate_buffer_ == false) { - Q_int_buf_ = (int32_t*)allocator_->malloc(sizeof(int32_t) * max_batch_size_ * max_seq_len_ * hidden_units_ * 3, false); + Q_int_buf_ = + (int32_t*)allocator_->malloc(sizeof(int32_t) * max_batch_size_ * max_seq_len_ * hidden_units_ * 3, false); K_int_buf_ = Q_int_buf_ + max_batch_size_ * max_seq_len_ * hidden_units_; V_int_buf_ = K_int_buf_ + max_batch_size_ * max_seq_len_ * hidden_units_; - qkv_buf_ = (int8_t*)allocator_->malloc((sizeof(int8_t) * 3 * max_batch_size_ * max_seq_len_ * hidden_units_ + 3)/4*4, false); - qkv_buf_2_ = (int8_t*)allocator_->malloc((sizeof(int8_t) * max_batch_size_ * max_seq_len_ * hidden_units_ + 3)/4*4, false); + qkv_buf_ = (int8_t*)allocator_->malloc( + (sizeof(int8_t) * 3 * max_batch_size_ * max_seq_len_ * hidden_units_ + 3) / 4 * 4, false); + qkv_buf_2_ = (int8_t*)allocator_->malloc( + (sizeof(int8_t) * max_batch_size_ * max_seq_len_ * hidden_units_ + 3) / 4 * 4, false); attn_workspace_ = (T*)allocator_->malloc(dispatcher_int8_->getWorkspaceSize(), false); is_allocate_buffer_ = true; } } -template +template void FusedAttentionLayerINT8::freeBuffer() { if (is_allocate_buffer_ == true) { @@ -557,18 +690,21 @@ void FusedAttentionLayerINT8::freeBuffer() } } -template -bool FusedAttentionLayerINT8::isValidBatchSize(size_t batch_size) { +template +bool FusedAttentionLayerINT8::isValidBatchSize(size_t batch_size) +{ if (max_batch_size_ == 0) { max_batch_size_ = batch_size; return true; - } else { + } + else { return batch_size <= max_batch_size_; } } -template -bool FusedAttentionLayerINT8::isValidSeqLen(size_t seq_len) { +template +bool FusedAttentionLayerINT8::isValidSeqLen(size_t seq_len) +{ if (max_seq_len_ == 0) { max_seq_len_ = seq_len; } @@ -578,4 +714,4 @@ bool FusedAttentionLayerINT8::isValidSeqLen(size_t seq_len) { template class FusedAttentionLayerINT8; template class FusedAttentionLayerINT8; -} // namespace fastertransformer +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.h b/src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.h index 84d67f371..accb33c82 100644 --- a/src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.h +++ b/src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.h @@ -80,7 +80,7 @@ class FusedAttentionLayerINT8: public BaseAttentionLayer { cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, - bool sparse=false); + bool sparse = false); FusedAttentionLayerINT8(FusedAttentionLayerINT8 const& attention_layer); diff --git a/src/fastertransformer/layers/attention_layers_int8/UnfusedAttentionLayerINT8.cc b/src/fastertransformer/layers/attention_layers_int8/UnfusedAttentionLayerINT8.cc index 6371b3853..9e2ef77c8 100644 --- a/src/fastertransformer/layers/attention_layers_int8/UnfusedAttentionLayerINT8.cc +++ b/src/fastertransformer/layers/attention_layers_int8/UnfusedAttentionLayerINT8.cc @@ -56,7 +56,7 @@ void UnfusedAttentionLayerINT8::forward(std::vector::forward(std::vectorkey_weight.bias, + attention_weights->value_weight.bias, request_batch_size, request_seq_len, head_num_, size_per_head_, - &(scale_list->d_scale_list_[scale_list->p2_offset_ + hidden_units_]), + &(scale_list->d_scale_list_[scale_list->p2_offset_ + 2 * hidden_units_]), &(scale_list->d_scale_list_[2]), &(scale_list->d_scale_list_[24 + 3]), cublas_wrapper->getUseOrderCol322R4R4(), @@ -405,11 +405,11 @@ void UnfusedAttentionLayerINT8::forward(std::vectorGemm(qk_int_buf_, batchCount, request_seq_len, - request_seq_len, + seq_len_padded, size_per_head_, size_per_head_ * request_seq_len, - size_per_head_ * request_seq_len, - request_seq_len * request_seq_len, + size_per_head_ * seq_len_padded, + request_seq_len * seq_len_padded, q_buf_, k_buf_); @@ -429,9 +429,9 @@ void UnfusedAttentionLayerINT8::forward(std::vector::forward(std::vector { // buffer handling size_t max_batch_size_ = 0; size_t max_seq_len_ = 0; - + // metadata size_t head_num_; size_t size_per_head_; @@ -52,8 +52,8 @@ class UnfusedAttentionLayerINT8: public BaseAttentionLayer { using BaseAttentionLayer::allocator_; protected: - int8_t* q_buf_, *k_buf_, *v_buf_, *qk_buf_, *dst_; - int32_t* Q_int_buf_, *V_int_buf_, *K_int_buf_, *qk_int_buf_, *transpose_dst_int_buf_, *sequence_id_map_; + int8_t *q_buf_, *k_buf_, *v_buf_, *qk_buf_, *dst_; + int32_t *Q_int_buf_, *V_int_buf_, *K_int_buf_, *qk_int_buf_, *transpose_dst_int_buf_, *sequence_id_map_; public: UnfusedAttentionLayerINT8(size_t max_batch_size, @@ -66,7 +66,7 @@ class UnfusedAttentionLayerINT8: public BaseAttentionLayer { cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, - bool sparse=false); + bool sparse = false); UnfusedAttentionLayerINT8(UnfusedAttentionLayerINT8 const& attention_layer); diff --git a/src/fastertransformer/layers/attention_layers_int8/WindowAttentionINT8.cu b/src/fastertransformer/layers/attention_layers_int8/WindowAttentionINT8.cu new file mode 100644 index 000000000..74037aaf8 --- /dev/null +++ b/src/fastertransformer/layers/attention_layers_int8/WindowAttentionINT8.cu @@ -0,0 +1,493 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/layers/attention_layers_int8/WindowAttentionINT8.h" + +namespace fastertransformer { + +// Add bias, and then transform from +// 3 * ([valid_word_num, head*size] + CUBLASLT_ORDER_COL32) -> [valid_word_num, head, 3, size] + row-major +// grid((head*size + 31)/32, (valid_word_num + 31)/32, 3) +// block(8, 32) +// size should be a multiple of 4 +template +__global__ void swin_trt_add_QKV_bias_COL32_int8IO(char4* output, + const char4* QKV, + const T* bias_Q, + const T* bias_K, + const T* bias_V, + const float* q_bias_QFactor_ptr, + const float* k_bias_QFactor_ptr, + const float* v_bias_QFactor_ptr, + const float qkv_deQFactor, + const int valid_word_num, + const int head_num, + const int size_per_head, + const int head_num_x_size_per_head) +{ + const int qkv_id = blockIdx.z; + const int seq_id = (blockIdx.y << 5) + threadIdx.y; + const int threadIdx4 = threadIdx.x << 2; + const int hidden_id = (blockIdx.x << 5) + threadIdx4; + const int size_id = hidden_id % size_per_head; + const int head_id = hidden_id / size_per_head; + const int col_id = qkv_id * head_num_x_size_per_head + hidden_id; + + const bool qual = (seq_id < valid_word_num) && (hidden_id < head_num_x_size_per_head); + if (qual) { + const float* bias_QFactor_ptr = + (qkv_id == 0) ? q_bias_QFactor_ptr : ((qkv_id == 1) ? k_bias_QFactor_ptr : v_bias_QFactor_ptr); + const float qkv_output_scale = __ldg(bias_QFactor_ptr); + + const T* bias_ptr = (qkv_id == 0) ? bias_Q : ((qkv_id == 1) ? bias_K : bias_V); + + const int input_id = ((col_id >> 5) << 5) * valid_word_num + (seq_id << 5) + (col_id & 31); + + char4 tmp = __ldg(QKV + (input_id >> 2)); + + tmp.x = float_to_int8_rn( + (static_cast(tmp.x) * qkv_deQFactor + static_cast(__ldg(bias_ptr + hidden_id))) + * qkv_output_scale); + + tmp.y = float_to_int8_rn( + (static_cast(tmp.y) * qkv_deQFactor + static_cast(__ldg(bias_ptr + hidden_id + 1))) + * qkv_output_scale); + + tmp.z = float_to_int8_rn( + (static_cast(tmp.z) * qkv_deQFactor + static_cast(__ldg(bias_ptr + hidden_id + 2))) + * qkv_output_scale); + + tmp.w = float_to_int8_rn( + (static_cast(tmp.w) * qkv_deQFactor + static_cast(__ldg(bias_ptr + hidden_id + 3))) + * qkv_output_scale); + + const int output_id = + ((seq_id * head_num_x_size_per_head + head_id * size_per_head) * 3 + qkv_id * size_per_head + size_id) >> 2; + + output[output_id] = tmp; + } +} + +template +void invokeSwinTrtAddQkvBiasInt8IO(int8_t* output, + const int8_t* Q, + const T* bias_Q, + const T* bias_K, + const T* bias_V, + const size_t token_num, + const size_t head_num, + const size_t size_per_head, + const float* q_bias_QFactor_ptr, + const float* k_bias_QFactor_ptr, + const float* v_bias_QFactor_ptr, + const float qkv_deQFactor, + const cudaStream_t stream) +{ + + int head_num_x_size_per_head = head_num * size_per_head; + dim3 grid((head_num_x_size_per_head + 31) / 32, (token_num + 31) / 32, 3); + dim3 block(8, 32); + + assert(size_per_head % 4 == 0); + + swin_trt_add_QKV_bias_COL32_int8IO<<>>((char4*)output, + (const char4*)Q, + bias_Q, + bias_K, + bias_V, + q_bias_QFactor_ptr, + k_bias_QFactor_ptr, + v_bias_QFactor_ptr, + qkv_deQFactor, + token_num, + head_num, + size_per_head, + head_num_x_size_per_head); +} + +template +int WindowAttentionINT8::trt_getS(const int actual_seqlen) +{ + int S = 384; + if (actual_seqlen <= 64) { + S = 64; + } + else if (actual_seqlen <= 128) { + S = 128; + } + else if (actual_seqlen <= 256) { + S = 256; + } + else if (actual_seqlen <= 384) { + S = 384; + } + return S; +} + +template +size_t WindowAttentionINT8::roundByteSize(const size_t size, const int factor) +{ + return (size + factor - 1) / factor * factor; +} + +template +void WindowAttentionINT8::allocateBuffer() +{ + int num_head = num_head_; + if (!is_free_buffer_after_forward_) { + num_head = num_head * 8; + } + if (is_allocate_buffer_ == false) { + if (use_trt_) { + int S = trt_getS(window_len_); + trt_attention_mask_ = (half*)allocator_->malloc(roundByteSize(window_num_ * S * S * sizeof(T), 4), false); + trt_relative_position_bias_ = + (half*)allocator_->malloc(roundByteSize(num_head * S * S * sizeof(T), 4), false); + Q_buf_ = (int8_t*)allocator_->malloc( + 3 * max_batch_ * patches_resolution_ * patches_resolution_ * embed_dim_ * sizeof(int8_t), false); + K_buf_ = Q_buf_ + max_batch_ * patches_resolution_ * patches_resolution_ * embed_dim_; + V_buf_ = K_buf_ + max_batch_ * patches_resolution_ * patches_resolution_ * embed_dim_; + q_buf_ = (int8_t*)allocator_->malloc( + 3 * max_batch_ * patches_resolution_ * patches_resolution_ * embed_dim_ * sizeof(int8_t), false); + k_buf_ = q_buf_ + max_batch_ * patches_resolution_ * patches_resolution_ * embed_dim_; + v_buf_ = k_buf_ + max_batch_ * patches_resolution_ * patches_resolution_ * embed_dim_; + dst_buf_ = (int8_t*)allocator_->malloc( + max_batch_ * patches_resolution_ * patches_resolution_ * embed_dim_ * sizeof(int8_t), false); + } + else { + int padded_winlen = (window_len_ + 31) / 32 * 32; + Q_buf_ = (int8_t*)allocator_->malloc( + 3 * max_batch_ * patches_resolution_ * patches_resolution_ * embed_dim_ * sizeof(int8_t), false); + K_buf_ = Q_buf_ + max_batch_ * patches_resolution_ * patches_resolution_ * embed_dim_; + V_buf_ = K_buf_ + max_batch_ * patches_resolution_ * patches_resolution_ * embed_dim_; + q_buf_ = (int8_t*)allocator_->malloc(max_batch_ * window_num_ * window_len_ * embed_dim_ * sizeof(int8_t), + false); + k_buf_ = (int8_t*)allocator_->malloc(max_batch_ * window_num_ * padded_winlen * embed_dim_ * sizeof(int8_t), + false); + v_buf_ = (int8_t*)allocator_->malloc(max_batch_ * window_num_ * padded_winlen * embed_dim_ * sizeof(int8_t), + false); + qk_buf_ = + (int8_t*)allocator_->malloc(max_batch_ * window_num_ * num_head * window_len_ * padded_winlen, false); + dst_buf_ = (int8_t*)allocator_->malloc(max_batch_ * window_num_ * window_len_ * embed_dim_ * sizeof(int8_t), + false); + } + is_allocate_buffer_ = true; + } +} + +template +void WindowAttentionINT8::freeBuffer() +{ + if (is_allocate_buffer_ == true) { + if (use_trt_) { + allocator_->free(trt_attention_mask_); + allocator_->free(trt_relative_position_bias_); + allocator_->free(Q_buf_); + allocator_->free(q_buf_); + allocator_->free(dst_buf_); + } + else { + allocator_->free(Q_buf_); + allocator_->free(q_buf_); + allocator_->free(k_buf_); + allocator_->free(v_buf_); + allocator_->free(dst_buf_); + } + is_allocate_buffer_ = false; + } +} + +template +WindowAttentionINT8::WindowAttentionINT8(int max_batch, + int window_size, + int patches_resolution, + int embed_dim, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool qkv_bias, + float qk_scale): + BaseAttentionLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), + patches_resolution_(patches_resolution), + embed_dim_(embed_dim), + max_batch_(max_batch), + window_size_(window_size), + qkv_bias_(qkv_bias), + qk_scale_(qk_scale) +{ + window_len_ = window_size_ * window_size_; +} + +template +WindowAttentionINT8::~WindowAttentionINT8() +{ +} + +template +void WindowAttentionINT8::forward(std::vector* output_tensors, + const std::vector* input_tensors, + const AttentionWeight* attention_weights) +{ + // input_tensors: + // input [batch * window_num * window_len, dim] + // attention_mask [window_num, window_len, window_len] + // attention_relative_position_bias [num_head, window_len, window_len] + // input_parameters [6] {batch, dim, input_resolution, num_head, shift_size, sm} + // output_tensors: + // output [batch * window_num * window_len, dim] + + cublasINT8MMWrapper* cublas_wrapper = (cublasINT8MMWrapper*)cublas_wrapper_; + int8_t* attention_out = (int8_t*)output_tensors->at(0).data; + const int8_t* from_tensor = (const int8_t*)input_tensors->at(0).data; + const T* attention_mask = (const T*)input_tensors->at(1).data; + const T* attention_relative_pos_bias = (const T*)input_tensors->at(2).data; + const int* input_parameters = (const int*)input_tensors->at(3).data; + const int batch = input_parameters[0]; + const int dim = input_parameters[1]; + const int input_resolution = input_parameters[2]; + const int num_head = input_parameters[3]; + const int shift_size = input_parameters[4]; + const int sm = input_parameters[5]; + + int use_ORDER_COL32_2R_4R4 = (sm >= 80 ? 1 : 0); + + int size_per_head = dim / num_head; + int trt_S = 1024; + if ((sm == 75 || sm == 80 || sm == 86) && size_per_head == 32 && window_len_ <= TRT_MAX_LEN + && std::is_same::value) { + trt_S = trt_getS(window_len_); + use_trt_ = true; + } + num_head_ = num_head; + patches_resolution_ = input_resolution; + window_num_ = (input_resolution / window_size_) * (input_resolution / window_size_); + embed_dim_ = dim; + allocateBuffer(); + + float scale = 1.0f / sqrt(size_per_head); + if (fabs(qk_scale_ - 1.0f) > 0.0001) { + scale = qk_scale_; + } + + if (use_trt_) { + if (dispatcher_int8_.get() && num_head == dispatcher_int8_num_head_) {} + else { + dispatcher_int8_.reset(new FusedMHARunnerInt8v2(num_head, size_per_head, sm, scale)); + dispatcher_int8_num_head_ = num_head; + } + } + + const ScaleList* scale_list = ((const AttentionINT8Weight*)attention_weights)->scale_list_ptr; + + cublas_wrapper->Gemm(Q_buf_, + 1, + batch * window_num_ * window_len_, + 3 * dim, + dim, + 0, + 0, + 0, + scale_list->h_scale_list_[scale_list->p3_offset_ + 0], + from_tensor, + (int8_t*)attention_weights->query_weight.kernel); + + int S; + if (use_trt_ && dispatcher_int8_.get()) { + S = trt_S; + } + if (use_trt_ && dispatcher_int8_.get() && dispatcher_int8_->isValid(S)) { + const T* bias_Q = attention_weights->query_weight.bias; + const T* bias_K = attention_weights->query_weight.bias + dim; + const T* bias_V = attention_weights->query_weight.bias + (dim << 1); + invokeSwinTrtAddQkvBiasInt8IO(q_buf_, + Q_buf_, + bias_Q, + bias_K, + bias_V, + batch * window_num_ * window_len_, + num_head, + size_per_head, + &(scale_list->d_scale_list_[16 + 3]), + &(scale_list->d_scale_list_[20 + 3]), + &(scale_list->d_scale_list_[24 + 3]), + scale_list->h_scale_list_[4 + 1], + stream_); + + half* trt_attention_mask = nullptr; + if (shift_size != 0) { + invokeTransformMask(trt_attention_mask_, (const half*)attention_mask, window_num_, window_len_, stream_); + trt_attention_mask = trt_attention_mask_; + } + + invokeTransformMask( + trt_relative_position_bias_, (const half*)attention_relative_pos_bias, num_head, window_len_, stream_); + + const int B = batch * window_num_; + // dispatcher_int8_->setScaleList(scale_list->h_scale_list_[scale_list->p4_offset_]/127.0f, + // scale_list->h_scale_list_[scale_list->p4_offset_ + 1]/127.0f, + // scale_list->h_scale_list_[scale_list->p4_offset_ + 2]/127.0f); + dispatcher_int8_->setScaleList(scale_list->h_scale_list_[scale_list->p4_offset_], + scale_list->h_scale_list_[scale_list->p4_offset_ + 1], + scale_list->h_scale_list_[scale_list->p4_offset_ + 2]); + dispatcher_int8_->setup(S, B, window_num_); + dispatcher_int8_->run( + q_buf_, trt_attention_mask, trt_relative_position_bias_, window_len_, nullptr, dst_buf_, stream_); + invokeRowMajorToCOL32(v_buf_, dst_buf_, batch * window_num_ * window_len_, dim, stream_); + + cublas_wrapper->Gemm(q_buf_, + 1, + batch * window_num_ * window_len_, + dim, + dim, + 0, + 0, + 0, + scale_list->h_scale_list_[scale_list->p3_offset_ + 1], + v_buf_, + (int8_t*)attention_weights->attention_output_weight.kernel); + } + else { + const T* bias_Q = attention_weights->query_weight.bias; + const T* bias_K = attention_weights->query_weight.bias + dim; + const T* bias_V = attention_weights->query_weight.bias + 2 * dim; + invokeAddQKBiasTransform(q_buf_, + k_buf_, + Q_buf_, + bias_Q, + K_buf_, + bias_K, + batch * window_num_, + window_len_, + num_head, + size_per_head, + &(scale_list->d_scale_list_[4 + 1]), + &(scale_list->d_scale_list_[4 + 1]), + &(scale_list->d_scale_list_[16 + 3]), + &(scale_list->d_scale_list_[20 + 3]), + use_ORDER_COL32_2R_4R4, + stream_); + + invokeAddVBiasTransform(v_buf_, + V_buf_, + bias_V, + batch * window_num_, + window_len_, + num_head, + size_per_head, + &(scale_list->d_scale_list_[4 + 1]), + &(scale_list->d_scale_list_[24 + 3]), + use_ORDER_COL32_2R_4R4, + stream_); + + int padded_winlen = (window_len_ + 31) / 32 * 32; + cublas_wrapper->Gemm(qk_buf_, + batch * window_num_ * num_head, + window_len_, + padded_winlen, + size_per_head, + window_len_ * size_per_head, + padded_winlen * size_per_head, + window_len_ * padded_winlen, + scale_list->h_scale_list_[scale_list->p3_offset_ + 4], + q_buf_, + k_buf_); + + if (shift_size != 0) { + invokeSoftmaxWithRelPosBiasCOL32(qk_buf_, + qk_buf_, + attention_mask, + attention_relative_pos_bias, + batch, + num_head, + window_num_, + window_len_, + scale, + &(scale_list->d_scale_list_[32 + 1]), + &(scale_list->d_scale_list_[28 + 3]), + stream_); + } + else { + const T* attn_mask_tmp = nullptr; + invokeSoftmaxWithRelPosBiasCOL32(qk_buf_, + qk_buf_, + attn_mask_tmp, + attention_relative_pos_bias, + batch, + num_head, + window_num_, + window_len_, + scale, + &(scale_list->d_scale_list_[32 + 1]), + &(scale_list->d_scale_list_[28 + 3]), + stream_); + } + + cublas_wrapper->Gemm(dst_buf_, + batch * window_num_ * num_head, + window_len_, + size_per_head, + padded_winlen, + window_len_ * padded_winlen, + size_per_head * padded_winlen, + window_len_ * size_per_head, + scale_list->h_scale_list_[scale_list->p3_offset_ + 5], + qk_buf_, + v_buf_); + + invokeTransposeCOL32(v_buf_, + dst_buf_, + batch * window_num_, + window_len_, + num_head, + size_per_head, + &(scale_list->d_scale_list_[36 + 1]), + &(scale_list->d_scale_list_[36 + 3]), + stream_); + + cublas_wrapper->Gemm(q_buf_, + 1, + batch * window_num_ * window_len_, + dim, + dim, + 0, + 0, + 0, + scale_list->h_scale_list_[scale_list->p3_offset_ + 1], + v_buf_, + (int8_t*)attention_weights->attention_output_weight.kernel); + } + + invokeReverseRollCol32(attention_out, + q_buf_, + batch, + window_num_, + window_len_, + window_size_, + input_resolution, + input_resolution, + dim, + shift_size, + stream_); + + if (is_free_buffer_after_forward_) { + freeBuffer(); + } +} + +template class WindowAttentionINT8; +template class WindowAttentionINT8; +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/layers/attention_layers_int8/WindowAttentionINT8.h b/src/fastertransformer/layers/attention_layers_int8/WindowAttentionINT8.h new file mode 100644 index 000000000..ffb291009 --- /dev/null +++ b/src/fastertransformer/layers/attention_layers_int8/WindowAttentionINT8.h @@ -0,0 +1,98 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "3rdparty/trt_fused_multihead_attention/qkvToContext.h" +#include "src/fastertransformer/kernels/layout_transformer_int8_kernels.h" +#include "src/fastertransformer/kernels/reverse_roll_kernels.h" +#include "src/fastertransformer/kernels/softmax_int8_kernels.h" +#include "src/fastertransformer/kernels/transform_mask_kernels.h" +#include "src/fastertransformer/kernels/transpose_int8_kernels.h" +#include "src/fastertransformer/kernels/unfused_attention_int8_kernels.h" +#include "src/fastertransformer/layers/attention_layers/BaseAttentionLayer.h" +#include "src/fastertransformer/models/swin_int8/SwinINT8Weight.h" +#include "src/fastertransformer/utils/Tensor.h" +#include "src/fastertransformer/utils/cublasINT8MMWrapper.h" +#include "src/fastertransformer/utils/cuda_utils.h" +#include +#include +#include + +#define TRT_MAX_LEN 384 + +namespace fastertransformer { + +template +class WindowAttentionINT8: public BaseAttentionLayer { +private: + int max_batch_ = 1; + int dim_ = 96; + int num_head_ = 2; + int window_size_ = 7; + int head_dim_ = 48; + int input_resolution_ = 56; + int window_len_ = 49; + int patches_resolution_ = 56; + int embed_dim_ = 96; + int window_num_ = 64; + int size_per_head_; + bool qkv_bias_ = true; + float qk_scale_ = 1.0f; + size_t max_buf_size_ = 0; + bool use_trt_ = false; + + void allocateBuffer() override; + void freeBuffer() override; + + int dispatcher_int8_num_head_ = -1; + std::unique_ptr dispatcher_int8_; + + using BaseAttentionLayer::stream_; + using BaseAttentionLayer::is_free_buffer_after_forward_; + using BaseAttentionLayer::is_allocate_buffer_; + using BaseAttentionLayer::cublas_wrapper_; + using BaseAttentionLayer::allocator_; + + int8_t *buf_ = nullptr, *Q_buf_ = nullptr, *K_buf_ = nullptr, *V_buf_ = nullptr; + int8_t *q_buf_ = nullptr, *k_buf_ = nullptr, *v_buf_ = nullptr, *qk_buf_ = nullptr, *dst_buf_ = nullptr; + + half *trt_attention_mask_ = nullptr, *trt_relative_position_bias_ = nullptr; + + static int trt_getS(const int actual_seqlen); + + static size_t roundByteSize(const size_t size, const int factor); + +public: + WindowAttentionINT8(int max_batch, + int window_size, + int patches_resolution, + int embed_dim, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward = false, + bool qkv_bias = true, + float qk_scale = 1.0f); + + ~WindowAttentionINT8(); + + void forward(std::vector* output_tensors, + const std::vector* input_tensors, + const AttentionWeight* attention_weights); + +}; // class WindowAttentionINT8 +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.cu b/src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.cu index ba180f56b..b6b844cc0 100644 --- a/src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.cu +++ b/src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -20,148 +20,58 @@ namespace fastertransformer { -template -__global__ void update_KV_batch_major_cache_kernel(const T* __restrict key_src_cache, - T* key_tgt_cache, - const T* __restrict value_src_cache, - T* value_tgt_cache, - const int* beam_ids, - const bool* finished, - const int beam_width, - const int size_per_head, - const size_t cache_size, - const int step, - const int max_seq_len, - const int ite) +__global__ void update_indir_cache_kernel(int* tgt_indir_cache, + const int* src_indir_cache, + const int* beam_ids, + const bool* finished, + int batch_dim, + int local_batch_size, + int beam_width, + int max_seq_len, + int step) { - int layer_id = blockIdx.z; - int head_id = blockIdx.y; - int bb_id = blockIdx.x; - int batch_id = bb_id / beam_width; - int beam_id = bb_id % beam_width; + int time_step = threadIdx.x + blockIdx.x * blockDim.x; + int bb_id = threadIdx.y + blockIdx.y * blockDim.y; + const int batch_id = bb_id / beam_width; + const int beam_id = bb_id % beam_width; - if (finished[batch_id * beam_width + beam_id]) + if (bb_id >= beam_width * local_batch_size || time_step >= min(step + 1, max_seq_len) || finished[bb_id]) { return; + } - const int hidden_dim = size_per_head * gridDim.y; - - int64_t src_offset = - layer_id * cache_size - + ((gridDim.x * ite + batch_id * beam_width + beam_ids[gridDim.x * ite + batch_id * beam_width + beam_id]) - * hidden_dim - + head_id * size_per_head) - * max_seq_len; - int64_t tgt_offset = - layer_id * cache_size - + ((gridDim.x * ite + batch_id * beam_width + beam_id) * hidden_dim + head_id * size_per_head) * max_seq_len; + const int src_beam = beam_ids[batch_id * beam_width + beam_id]; - // for better memory access always do 16 byte loads. - // [B, H, Dh/x, L, x] and [B, H, L, Dh/x, x] (i.e. [B, H, L, Dh]) - auto key_src_ptr = reinterpret_cast(key_src_cache + src_offset); - auto value_src_ptr = reinterpret_cast(value_src_cache + src_offset); - auto key_tgt_ptr = reinterpret_cast(key_tgt_cache + tgt_offset); - auto value_tgt_ptr = reinterpret_cast(value_tgt_cache + tgt_offset); - constexpr int x = (sizeof(T) == 4) ? 4 : 8; + const uint tgt_offset = batch_id * beam_width * max_seq_len + beam_id * max_seq_len + time_step; + const uint src_offset = batch_id * beam_width * max_seq_len + src_beam * max_seq_len + time_step; -// step starts from 1 -#if 0 - constexpr int WARP_SIZE = 32; - const int num_warps = blockDim.x / WARP_SIZE; - const int warp_id = threadIdx.x / WARP_SIZE; - const int lane_id = threadIdx.x % WARP_SIZE; - for (int dhx = warp_id; dhx < size_per_head/x; dhx += num_warps) - { - for (int tid = lane_id; tid < step; tid += WARP_SIZE) - { - key_tgt_ptr[dhx * max_seq_len + tid] = key_src_ptr[dhx * max_seq_len + tid]; - } - } -#else - // seems to be a bit faster - for (int tid = threadIdx.x; tid < max_seq_len * size_per_head / x; tid += blockDim.x) { - // could consider fast int division here - if (tid % max_seq_len < step) { - key_tgt_ptr[tid] = key_src_ptr[tid]; - } - } -#endif - - for (int tid = threadIdx.x; tid < step * size_per_head / x; tid += blockDim.x) { - value_tgt_ptr[tid] = value_src_ptr[tid]; - } + tgt_indir_cache[tgt_offset] = (time_step == step) ? beam_id : src_indir_cache[src_offset]; } -template -void update_KV_cache_kernelLauncher(T* key_cache_output, - T* value_cache_output, - const T* key_cache_input, - const T* value_cache_input, - const int* beam_ids, - const bool* finished, - const int max_batch_size, - const int local_batch_size, - const int beam_width, - const int head_num, - const int size_per_head, - const int step, - const int decoder_max_seq_len, - const int cache_size, - const int decoder_layers, - const int ite, - cudaStream_t stream) +void update_indir_cache_kernelLauncher(int* tgt_indir_cache, + const int* src_indir_cache, + const int* beam_ids, + const bool* finished, + int batch_dim, + int local_batch_size, + int beam_width, + int max_seq_len, + int step, + cudaStream_t stream) { - dim3 grid(local_batch_size * beam_width, head_num, decoder_layers); - constexpr int block_sz = 128; - - update_KV_batch_major_cache_kernel<<>>(key_cache_input, - key_cache_output, - value_cache_input, - value_cache_output, - beam_ids, - finished, - beam_width, - size_per_head, - (size_t)cache_size, - step, - decoder_max_seq_len, - ite); + const dim3 block(32); + // Update indirections steps [0, step], included + const dim3 grid((step + 1 + block.x - 1) / block.x, local_batch_size * beam_width); + update_indir_cache_kernel<<>>(tgt_indir_cache, + src_indir_cache, + beam_ids, + finished, + batch_dim, + local_batch_size, + beam_width, + max_seq_len, + step); } -template void update_KV_cache_kernelLauncher(float* key_cache_output, - float* value_cache_output, - const float* key_cache_input, - const float* value_cache_input, - const int* beam_ids, - const bool* finished, - const int max_batch_size, - const int local_batch_size, - const int beam_width, - const int head_num, - const int size_per_head, - const int step, - const int decoder_max_seq_len, - const int cache_size, - const int decoder_layers, - const int ite, - cudaStream_t stream); - -template void update_KV_cache_kernelLauncher(half* key_cache_output, - half* value_cache_output, - const half* key_cache_input, - const half* value_cache_input, - const int* beam_ids, - const bool* finished, - const int max_batch_size, - const int local_batch_size, - const int beam_width, - const int head_num, - const int size_per_head, - const int step, - const int decoder_max_seq_len, - const int cache_size, - const int decoder_layers, - const int ite, - cudaStream_t stream); template BaseBeamSearchLayer::BaseBeamSearchLayer(size_t max_batch_size, size_t head_num, @@ -179,50 +89,17 @@ BaseBeamSearchLayer::BaseBeamSearchLayer(size_t max_batch_size, IAllocator* allocator, bool is_free_buffer_after_forward): DynamicDecodeBaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward, nullptr), - max_batch_size_(max_batch_size), - head_num_(head_num), - size_per_head_(size_per_head), - beam_width_(beam_width), vocab_size_(vocab_size), - vocab_size_padded_(vocab_size_padded), - end_id_(end_id), - diversity_rate_(diversity_rate), - temperature_(temperature), - len_penalty_(len_penalty), - repetition_penalty_(repetition_penalty) -{ - hidden_units_ = head_num_ * size_per_head_; -} - -template -bool BaseBeamSearchLayer::isValidBatchSize(size_t batch_size) + vocab_size_padded_(vocab_size_padded) { - if (batch_size <= max_batch_size_) { - return true; - } - else { - freeBuffer(); - max_batch_size_ = batch_size * 1.2; - return true; - } } template BaseBeamSearchLayer::BaseBeamSearchLayer(BaseBeamSearchLayer const& beam_search_layer): DynamicDecodeBaseLayer(beam_search_layer), - max_batch_size_(beam_search_layer.max_batch_size_), - head_num_(beam_search_layer.head_num_), - size_per_head_(beam_search_layer.size_per_head_), - beam_width_(beam_search_layer.beam_width_), vocab_size_(beam_search_layer.vocab_size_), vocab_size_padded_(beam_search_layer.vocab_size_padded_), - end_id_(beam_search_layer.end_id_), - diversity_rate_(beam_search_layer.diversity_rate_), - hidden_units_(beam_search_layer.hidden_units_), - topk_softmax_workspace_size_(beam_search_layer.topk_softmax_workspace_size_), - temperature_(beam_search_layer.temperature_), - len_penalty_(beam_search_layer.len_penalty_), - repetition_penalty_(beam_search_layer.repetition_penalty_) + topk_softmax_workspace_size_(beam_search_layer.topk_softmax_workspace_size_) { } @@ -235,7 +112,7 @@ BaseBeamSearchLayer::~BaseBeamSearchLayer() template void BaseBeamSearchLayer::freeBuffer() { - if (is_allocate_buffer_ == true) { + if (is_allocate_buffer_) { allocator_->free(topk_softmax_workspace_); is_allocate_buffer_ = false; } @@ -245,109 +122,123 @@ template void BaseBeamSearchLayer::forward(std::vector* output_tensors, const std::vector* input_tensors) { // input_tensors: - // logits [local_batch_size, beam_width_, vocab_size_padded] + // logits [local_batch_size, beam_width, vocab_size_padded] // embedding_bias [vocab_size_padded] // step [1] on cpu - // src_key_cache [num_layer, batch_size * beam_width, head_num, size_per_head // x, max_seq_len, x] - // src_value_cache [num_layer, batch_size * beam_width, head_num, max_seq_len, size_per_head] + // src_cache_indirection [local_batch_size, beam_width, max_seq_len] // max_input_length [1] on cpu - // input_lengths [local_batch_size * beam_width_] + // input_lengths [local_batch_size * beam_width] // ite [1] on cpu // output_tensors: // output_ids [max_seq_len, batch_size, beam_width] // finished [local_batch_size * beam_width] - // cum_logits [local_batch_size * beam_width] + // cum_log_probs [local_batch_size * beam_width] // parent_ids [max_seq_len, batch_size * beam_width] // sequence_length [local_batch_size * beam_width] - // tgt_key_cache [num_layer, batch_size * beam_width, head_num, size_per_head // x, max_seq_len, x] - // tgt_value_cache [num_layer, batch_size * beam_width, head_num, max_seq_len, size_per_head] - - FT_CHECK(input_tensors->size() == 8); - FT_CHECK(output_tensors->size() == 7); - isValidBatchSize(input_tensors->at(0).shape[0]); - allocateBuffer(); + // tgt_cache_indirection [local_batch_size, beam_width, max_seq_len] + + std::unordered_map input_tensors_map{{"logits", input_tensors->at(0)}, + {"embedding_bias", input_tensors->at(1)}, + {"step", input_tensors->at(2)}, + {"src_cache_indirection", input_tensors->at(4)}, + {"max_input_length", input_tensors->at(5)}, + {"input_lengths", input_tensors->at(6)}, + {"ite", input_tensors->at(7)}}; + + std::unordered_map output_tensors_map{{"output_ids", output_tensors->at(0)}, + {"finished", output_tensors->at(1)}, + {"cum_log_probs", output_tensors->at(2)}, + {"parent_ids", output_tensors->at(3)}, + {"sequence_length", output_tensors->at(4)}, + {"tgt_cache_indirection", output_tensors->at(5)}}; + forward(&output_tensors_map, &input_tensors_map); +} - const int batch_size = output_tensors->at(0).shape[1]; - const int step = *((int*)input_tensors->at(2).data); - const int ite = *((int*)input_tensors->at(7).data); - const int local_batch_size = input_tensors->at(0).shape[0]; +template +void BaseBeamSearchLayer::forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors) +{ + // input_tensors: + // logits [local_batch_size, beam_width, vocab_size_padded] + // embedding_bias [vocab_size_padded] + // step [1] on cpu + // src_cache_indirection [local_batch_size, beam_width, max_seq_len] + // end_id [local_batch_size] + // max_input_length [1] on cpu + // input_lengths [local_batch_size * beam_width] + // ite [1] on cpu + // beam_search_diversity_rate [1] on cpu, optional + // temperature [1] on cpu, optional + // len_penalty [1] on cpu, optional + // repetition_penalty [1] on cpu, optional - if (input_tensors->at(1).data != nullptr || temperature_ != 1.0f || len_penalty_ != 1.0f - || repetition_penalty_ != 1.0f) { - invokeAddBiasApplyPenalties(step, - (T*)input_tensors->at(0).data, - (const int*)output_tensors->at(0).data + (step - 1) * batch_size * beam_width_ - + ite * local_batch_size * beam_width_, - ((const int*)output_tensors->at(0).data), - ((const int*)output_tensors->at(3).data), - (const int*)input_tensors->at(6).data, - (const T*)input_tensors->at(1).data, - ite, - *(int*)input_tensors->at(5).data, - local_batch_size, - batch_size, - beam_width_, - vocab_size_, - vocab_size_padded_, - end_id_, - temperature_, - len_penalty_, - repetition_penalty_, - stream_); - sync_check_cuda_error(); - } + // output_tensors: + // output_ids [max_seq_len, batch_size, beam_width] + // finished [local_batch_size * beam_width] + // cum_log_probs [local_batch_size * beam_width] + // parent_ids [max_seq_len, batch_size * beam_width] + // sequence_length [local_batch_size * beam_width] + // tgt_cache_indirection [local_batch_size, beam_width, max_seq_len] + // output_log_probs [local_batch_size * beam_width], optional + + FT_CHECK(input_tensors->size() >= 7); + FT_CHECK(output_tensors->size() >= 6); + const int batch_size = output_tensors->at("output_ids").shape[1]; + const int beam_width = output_tensors->at("output_ids").shape[2]; + allocateBuffer(batch_size, beam_width); + + const int step = *((int*)input_tensors->at("step").data); + const int ite = *((int*)input_tensors->at("ite").data); + const int local_batch_size = input_tensors->at("logits").shape[0]; + const int head_num = input_tensors->at("src_value_cache").shape[2]; + const int size_per_head = input_tensors->at("src_value_cache").shape[4]; + + const float temperature = + input_tensors->count("temperature") ? input_tensors->at("temperature").getVal() : 1.0f; + const float len_penalty = + input_tensors->count("len_penalty") ? input_tensors->at("len_penalty").getVal() : 1.0f; + const float repetition_penalty = + input_tensors->count("repetition_penalty") ? input_tensors->at("repetition_penalty").getVal() : 1.0f; + + invokeAddBiasApplyPenalties(step, + (T*)input_tensors->at("logits").data, + (const int*)output_tensors->at("output_ids").data + (step - 1) * batch_size * beam_width + + ite * local_batch_size * beam_width, + ((const int*)output_tensors->at("output_ids").data), + ((const int*)output_tensors->at("parent_ids").data), + (const int*)input_tensors->at("input_lengths").data, + (const T*)input_tensors->at("embedding_bias").data, + ite, + *(int*)input_tensors->at("max_input_length").data, + local_batch_size, + batch_size, + beam_width, + vocab_size_, + vocab_size_padded_, + (const int*)input_tensors->at("end_id").data, + temperature, + len_penalty, + repetition_penalty, + stream_); + sync_check_cuda_error(); invokeSoftMax(output_tensors, input_tensors); - if (beam_width_ > 1) { - const int max_seq_len = output_tensors->at(0).shape[0]; - const int decoder_layer = output_tensors->at(5).shape[0]; - const int decoder_max_seq_len = output_tensors->at(5).shape[4]; - FT_CHECK(max_seq_len == decoder_max_seq_len); - int cache_size = 1; - for (auto t = output_tensors->at(5).shape.begin() + 1; t != output_tensors->at(5).shape.end(); ++t) { - cache_size *= *t; - } - - if (output_tensors->at(5).type == DataType::TYPE_FP32) { - update_KV_cache_kernelLauncher((float*)output_tensors->at(5).data, - (float*)output_tensors->at(6).data, - (const float*)input_tensors->at(3).data, - (const float*)input_tensors->at(4).data, - ((int*)output_tensors->at(3).data) + step * batch_size * beam_width_, - (bool*)output_tensors->at(1).data, - batch_size, - local_batch_size, - beam_width_, - head_num_, - size_per_head_, - step, - decoder_max_seq_len, - cache_size, - decoder_layer, - ite, - stream_); - } - else if (output_tensors->at(5).type == DataType::TYPE_FP16) { - update_KV_cache_kernelLauncher((half*)output_tensors->at(5).data, - (half*)output_tensors->at(6).data, - (const half*)input_tensors->at(3).data, - (const half*)input_tensors->at(4).data, - ((int*)output_tensors->at(3).data) + step * batch_size * beam_width_, - (bool*)output_tensors->at(1).data, - batch_size, - local_batch_size, - beam_width_, - head_num_, - size_per_head_, - step, - decoder_max_seq_len, - cache_size, - decoder_layer, - ite, - stream_); - } + if (beam_width > 1) { + const int max_seq_len = output_tensors->at("output_ids").shape[0]; + + update_indir_cache_kernelLauncher((int*)output_tensors->at("tgt_cache_indirection").data, + reinterpret_cast(input_tensors->at("src_cache_indirection").data), + reinterpret_cast(output_tensors->at("parent_ids").data) + + step * beam_width * batch_size + ite * local_batch_size * beam_width, + reinterpret_cast(output_tensors->at("finished").data), + batch_size, + local_batch_size, + beam_width, + max_seq_len, + step, + stream_); } sync_check_cuda_error(); if (is_free_buffer_after_forward_) { diff --git a/src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.h b/src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.h index 8f833d38f..73d4065d6 100644 --- a/src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.h +++ b/src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -23,34 +23,22 @@ namespace fastertransformer { template class BaseBeamSearchLayer: public DynamicDecodeBaseLayer { private: - // calculated data - size_t hidden_units_; - - bool isValidBatchSize(size_t batch_size); void freeBuffer(); protected: - // buffer handling - size_t max_batch_size_ = 0; // meta data - size_t head_num_; - size_t size_per_head_; - size_t beam_width_; size_t vocab_size_; size_t vocab_size_padded_; - int end_id_; - float diversity_rate_; - - float temperature_; - float len_penalty_; - float repetition_penalty_; size_t topk_softmax_workspace_size_; - void* topk_softmax_workspace_; + void* topk_softmax_workspace_ = nullptr; virtual void allocateBuffer() = 0; + virtual void allocateBuffer(size_t batch_size, size_t beam_width) = 0; virtual void invokeSoftMax(std::vector* output_tensors, const std::vector* input_tensors) = 0; + virtual void invokeSoftMax(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors) = 0; public: BaseBeamSearchLayer(size_t max_batch_size, @@ -75,25 +63,18 @@ class BaseBeamSearchLayer: public DynamicDecodeBaseLayer { void forward(std::vector* output_tensors, const std::vector* input_tensors) override; + void forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors) override; }; -template -void update_KV_cache_kernelLauncher(T* key_cache_output, - T* value_cache_output, - const T* key_cache_input, - const T* value_cache_input, - const int* beam_ids, - const bool* finished, - const int max_batch_size, - const int local_batch_size, - const int beam_width, - const int head_num, - const int size_per_head, - const int step, - const int decoder_max_seq_len, - const int cache_size, - const int decoder_layers, - const int ite, - cudaStream_t stream); +void update_indir_cache_kernelLauncher(int* tgt_indir_cache, + const int* src_indir_cache, + const int* beam_ids, + const bool* finished, + int batch_dim, + int beam_width, + int max_seq_len, + int ite, + cudaStream_t stream); } // namespace fastertransformer diff --git a/src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.cu b/src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.cu index 6d56e7af9..bc0f5543a 100644 --- a/src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.cu +++ b/src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -20,8 +20,13 @@ namespace fastertransformer { template -__global__ void logProbAddCumLogProb( - float* log_probs, const T* logits, const float* cum_log_probs, const int end_id, const bool* finished, const int n) +__global__ void logProbAddCumLogProb(float* log_probs, + const T* logits, + const float* cum_log_probs, + const int* end_ids, + const bool* finished, + const int beam_width, + const int n) { int bid = blockIdx.x; bool finish = finished[bid]; @@ -33,7 +38,7 @@ __global__ void logProbAddCumLogProb( if (finish) { for (int tid = threadIdx.x; tid < n; tid += blockDim.x) { - log_probs[offset + tid] = (tid == end_id) ? cum_log_probs[bid] : -FLT_MAX; + log_probs[offset + tid] = (tid == end_ids[bid / beam_width]) ? cum_log_probs[bid] : -FLT_MAX; } } else { @@ -43,8 +48,9 @@ __global__ void logProbAddCumLogProb( } max_val = blockReduceMax(max_val); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_max_val = max_val; + } __syncthreads(); float sum_val = 0.0f; @@ -54,8 +60,9 @@ __global__ void logProbAddCumLogProb( } sum_val = blockReduceSum(sum_val); - if (threadIdx.x == 0) + if (threadIdx.x == 0) { s_sum_val = sum_val + 1e-6f; + } __syncthreads(); for (int tid = threadIdx.x; tid < n; tid += blockDim.x) { @@ -68,21 +75,24 @@ template void invokeLogProbAddCumLogProb(float* log_probs, const T* logits, const float* cum_log_probs, - const int end_id, + const int* end_ids, const bool* finished, const int m, + const int beam_width, const int n, cudaStream_t stream) { dim3 grid(m); dim3 block(min(n, 1024)); /*n is the vocab_size, e.g., 30000, 7000.... vocab_size is usually very big. */ - logProbAddCumLogProb<<>>(log_probs, logits, cum_log_probs, end_id, finished, n); + logProbAddCumLogProb<<>>( + log_probs, logits, cum_log_probs, end_ids, finished, beam_width, n); } template __global__ void updateStatesKernel(T* log_probs, T* cum_log_probs, + float* output_log_probs, bool* finished, int* parent_ids, int* sequence_length, @@ -91,7 +101,7 @@ __global__ void updateStatesKernel(T* log_probs, const int local_batch_size, const int beam_width, const int vocab_size, - const int end_id) + const int* end_ids) { for (int index = blockIdx.x * blockDim.x + threadIdx.x; index < local_batch_size * beam_width; index += blockDim.x * gridDim.x) { @@ -102,9 +112,14 @@ __global__ void updateStatesKernel(T* log_probs, int beam_id = (word_ids[index] / vocab_size) % beam_width; int word_id = word_ids[index] % vocab_size; + if (output_log_probs != nullptr) { + // get the cum_log_probs of previous run + output_log_probs[index] = log_probs[batch_id * beam_width * vocab_size + beam_id * vocab_size + word_id] + - cum_log_probs[batch_id * beam_width + beam_id]; + } cum_log_probs[index] = log_probs[batch_id * beam_width * vocab_size + beam_id * vocab_size + word_id]; sequence_length[index] = sequence_length[batch_id * beam_width + beam_id]; - finished[index] = word_id == end_id ? 1 : 0; + finished[index] = word_id == end_ids[batch_id] ? 1 : 0; parent_ids[index] = beam_id; word_ids[index] = word_id; output_ids[index] = word_id; @@ -113,6 +128,7 @@ __global__ void updateStatesKernel(T* log_probs, void invokeUpdateStates(float* log_probs, float* cum_log_probs, + float* output_log_probs, bool* finished, int* parent_ids, int* sequence_length, @@ -121,7 +137,7 @@ void invokeUpdateStates(float* log_probs, const int local_batch_size, const int beam_width, const int vocab_size, - const int end_id, + const int* end_ids, cudaStream_t stream) { dim3 grid((int)ceil(local_batch_size * beam_width * 1.0 / 256)); @@ -129,6 +145,7 @@ void invokeUpdateStates(float* log_probs, updateStatesKernel<<>>(log_probs, cum_log_probs, + output_log_probs, finished, parent_ids, sequence_length, @@ -137,46 +154,92 @@ void invokeUpdateStates(float* log_probs, local_batch_size, beam_width, vocab_size, - end_id); + end_ids); } template void BeamSearchLayer::invokeSoftMax(std::vector* output_tensors, const std::vector* input_tensors) { // input_tensors: - // logits [local_batch_size, beam_width_, vocab_size_padded] + // logits [local_batch_size, beam_width, vocab_size_padded] // embedding_bias [vocab_size_padded] // step [1] on cpu - // src_key_cache [num_layer, batch_size * beam_width, head_num, size_per_head // x, max_seq_len, x] - // src_value_cache [num_layer, batch_size * beam_width, head_num, max_seq_len, size_per_head] + // src_cache_indirection [local_batch_size, beam_width, max_seq_len] // max_input_length [1] on cpu - // input_lengths [local_batch_size * beam_width_] + // input_lengths [local_batch_size * beam_width] // ite [1] on cpu // output_tensors: // output_ids [max_seq_len, batch_size, beam_width] // finished [local_batch_size * beam_width] - // cum_logits [local_batch_size * beam_width] + // cum_log_probs [local_batch_size * beam_width] // parent_ids [max_seq_len, batch_size * beam_width] // sequence_length [local_batch_size * beam_width] - // tgt_key_cache [num_layer, batch_size * beam_width, head_num, size_per_head // x, max_seq_len, x] - // tgt_value_cache [num_layer, batch_size * beam_width, head_num, max_seq_len, size_per_head] + // tgt_cache_indirection [local_batch_size, beam_width, max_seq_len] - FT_CHECK(input_tensors->size() == 8); - FT_CHECK(output_tensors->size() == 7); + std::unordered_map input_tensors_map{{"logits", input_tensors->at(0)}, + {"embedding_bias", input_tensors->at(1)}, + {"step", input_tensors->at(2)}, + {"src_cache_indirection", input_tensors->at(3)}, + {"max_input_length", input_tensors->at(4)}, + {"input_lengths", input_tensors->at(5)}, + {"ite", input_tensors->at(6)}}; - const int batch_size = output_tensors->at(0).shape[1]; - const int step = *((int*)input_tensors->at(2).data); - const int ite = *((int*)input_tensors->at(7).data); - const int local_batch_size = input_tensors->at(0).shape[0]; + std::unordered_map output_tensors_map{{"output_ids", output_tensors->at(0)}, + {"finished", output_tensors->at(1)}, + {"cum_log_probs", output_tensors->at(2)}, + {"parent_ids", output_tensors->at(3)}, + {"sequence_length", output_tensors->at(4)}, + {"tgt_cache_indirection", output_tensors->at(5)}}; + invokeSoftMax(&output_tensors_map, &input_tensors_map); +} - const int id_offset = step * batch_size * beam_width_ + ite * local_batch_size * beam_width_; +template +void BeamSearchLayer::invokeSoftMax(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors) +{ + // input_tensors: + // logits [local_batch_size, beam_width, vocab_size_padded] + // embedding_bias [vocab_size_padded] + // step [1] on cpu + // src_cache_indirection [local_batch_size, beam_width, max_seq_len] + // max_input_length [1] on cpu + // input_lengths [local_batch_size * beam_width] + // ite [1] on cpu + // beam_search_diversity_rate [1] on cpu, optional + // temperature [1] on cpu, optional + // len_penalty [1] on cpu, optional + // repetition_penalty [1] on cpu, optional + + // output_tensors: + // output_ids [max_seq_len, batch_size, beam_width] + // finished [local_batch_size * beam_width] + // cum_log_probs [local_batch_size * beam_width] + // parent_ids [max_seq_len, batch_size * beam_width] + // sequence_length [local_batch_size * beam_width] + // tgt_cache_indirection [local_batch_size, beam_width, max_seq_len] + // output_log_probs [local_batch_size * beam_width], optional + + FT_CHECK(input_tensors->size() >= 7); + FT_CHECK(output_tensors->size() >= 6); + + const int batch_size = output_tensors->at("output_ids").shape[1]; + const int beam_width = output_tensors->at("output_ids").shape[2]; + const int step = *((int*)input_tensors->at("step").data); + const int ite = *((int*)input_tensors->at("ite").data); + const int local_batch_size = input_tensors->at("logits").shape[0]; + const float diversity_rate = input_tensors->count("beam_search_diversity_rate") ? + input_tensors->at("beam_search_diversity_rate").getVal() : + 0.0f; + + const int id_offset = step * batch_size * beam_width + ite * local_batch_size * beam_width; invokeLogProbAddCumLogProb(float_log_prob_buf_, - (T*)input_tensors->at(0).data, - (float*)output_tensors->at(2).data, - end_id_, - (bool*)output_tensors->at(1).data, - local_batch_size * beam_width_, + (T*)input_tensors->at("logits").data, + (float*)output_tensors->at("cum_log_probs").data, + (const int*)input_tensors->at("end_id").data, + (bool*)output_tensors->at("finished").data, + local_batch_size * beam_width, + beam_width, vocab_size_padded_, stream_); sync_check_cuda_error(); @@ -184,27 +247,30 @@ void BeamSearchLayer::invokeSoftMax(std::vector* output_tensors, cons invokeTopkBeamSearch(topk_softmax_workspace_, topk_softmax_workspace_size_, float_log_prob_buf_, - ((int*)output_tensors->at(0).data) + id_offset, - (bool*)output_tensors->at(1).data, + ((int*)output_tensors->at("output_ids").data) + id_offset, + (bool*)output_tensors->at("finished").data, local_batch_size, - beam_width_, + beam_width, vocab_size_padded_, - diversity_rate_, - end_id_, + diversity_rate, + (const int*)input_tensors->at("end_id").data, stream_); sync_check_cuda_error(); + float* output_log_probs = + output_tensors->count("output_log_probs") ? (float*)output_tensors->at("output_log_probs").data : nullptr; invokeUpdateStates(float_log_prob_buf_, - (float*)output_tensors->at(2).data, - (bool*)output_tensors->at(1).data, - ((int*)output_tensors->at(3).data) + id_offset, - (int*)output_tensors->at(4).data, - ((int*)output_tensors->at(0).data) + id_offset, - ((int*)output_tensors->at(0).data) + id_offset, + (float*)output_tensors->at("cum_log_probs").data, + output_log_probs, + (bool*)output_tensors->at("finished").data, + ((int*)output_tensors->at("parent_ids").data) + id_offset, + (int*)output_tensors->at("sequence_length").data, + ((int*)output_tensors->at("output_ids").data) + id_offset, + ((int*)output_tensors->at("output_ids").data) + id_offset, local_batch_size, - beam_width_, + beam_width, vocab_size_padded_, - end_id_, + (const int*)input_tensors->at("end_id").data, stream_); sync_check_cuda_error(); } @@ -212,23 +278,31 @@ void BeamSearchLayer::invokeSoftMax(std::vector* output_tensors, cons template void BeamSearchLayer::allocateBuffer() { - if (is_allocate_buffer_ == false) { - invokeTopkBeamSearch(nullptr, - topk_softmax_workspace_size_, - nullptr, - nullptr, - nullptr, - max_batch_size_, - beam_width_, - vocab_size_padded_, - 0.0f, - end_id_, - stream_); - topk_softmax_workspace_ = reinterpret_cast(allocator_->malloc( - topk_softmax_workspace_size_ + sizeof(float) * max_batch_size_ * beam_width_ * vocab_size_padded_, false)); - float_log_prob_buf_ = (float*)((char*)topk_softmax_workspace_ + topk_softmax_workspace_size_); - is_allocate_buffer_ = true; - } + FT_CHECK(false); +} + +template +void BeamSearchLayer::allocateBuffer(size_t batch_size, size_t beam_width) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + + invokeTopkBeamSearch(nullptr, + topk_softmax_workspace_size_, + nullptr, + nullptr, + nullptr, + batch_size, + beam_width, + vocab_size_padded_, + 0.0f, + nullptr, + stream_); + topk_softmax_workspace_ = reinterpret_cast(allocator_->reMalloc( + topk_softmax_workspace_, + topk_softmax_workspace_size_ + sizeof(float) * batch_size * beam_width * vocab_size_padded_, + false)); + float_log_prob_buf_ = (float*)((char*)topk_softmax_workspace_ + topk_softmax_workspace_size_); + is_allocate_buffer_ = true; } template diff --git a/src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.h b/src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.h index e1bf3b173..25d97861a 100644 --- a/src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.h +++ b/src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -26,29 +26,24 @@ template class BeamSearchLayer: public BaseBeamSearchLayer { private: // meta data - using BaseBeamSearchLayer::head_num_; - using BaseBeamSearchLayer::size_per_head_; - using BaseBeamSearchLayer::beam_width_; using BaseBeamSearchLayer::vocab_size_; using BaseBeamSearchLayer::vocab_size_padded_; - using BaseBeamSearchLayer::end_id_; - using BaseBeamSearchLayer::diversity_rate_; - - // buffer handling - using BaseBeamSearchLayer::max_batch_size_; using BaseBeamSearchLayer::topk_softmax_workspace_size_; using BaseBeamSearchLayer::topk_softmax_workspace_; void allocateBuffer() override; + void allocateBuffer(size_t batch_size, size_t beam_width) override; void invokeSoftMax(std::vector* output_tensors, const std::vector* input_tensors) override; + void invokeSoftMax(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors) override; using BaseBeamSearchLayer::stream_; using BaseBeamSearchLayer::is_allocate_buffer_; using BaseBeamSearchLayer::allocator_; - float* float_log_prob_buf_; + float* float_log_prob_buf_ = nullptr; protected: public: diff --git a/src/fastertransformer/layers/beam_search_layers/CMakeLists.txt b/src/fastertransformer/layers/beam_search_layers/CMakeLists.txt index 824067c9b..d644d35bf 100644 --- a/src/fastertransformer/layers/beam_search_layers/CMakeLists.txt +++ b/src/fastertransformer/layers/beam_search_layers/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.cu b/src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.cu index 3600e2d12..5e237f221 100644 --- a/src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.cu +++ b/src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -28,7 +28,7 @@ __global__ void update_kernel(bool* finished, int* word_ids, int* output_ids, const int vocab_size, - const int end_id, + const int* end_ids, const int local_batch_size, const int beam_width) { @@ -42,7 +42,7 @@ __global__ void update_kernel(bool* finished, int word_id = word_ids[index] % vocab_size; sequence_length[index] = sequence_length[batch_id * beam_width + beam_id]; - finished[index] = word_id == end_id ? 1 : 0; + finished[index] = word_id == end_ids[index / beam_width] ? 1 : 0; parent_ids[index] = beam_id; word_ids[index] = word_id; output_ids[index] = word_id; @@ -57,7 +57,7 @@ void invokeUpdate(bool* finished, const int local_batch_size, const int beam_width, const int vocab_size_padded, - const int end_id, + const int* end_ids, cudaStream_t stream) { dim3 grid((int)ceil(local_batch_size * beam_width * 1.0 / 256)); @@ -69,7 +69,7 @@ void invokeUpdate(bool* finished, word_ids, output_ids, vocab_size_padded, - end_id, + end_ids, local_batch_size, beam_width); } @@ -79,57 +79,104 @@ void OnlineBeamSearchLayer::invokeSoftMax(std::vector* output_tensors const std::vector* input_tensors) { // input_tensors: - // logits [local_batch_size, beam_width_, vocab_size_padded] + // logits [local_batch_size, beam_width, vocab_size_padded] // embedding_bias [vocab_size_padded] // step [1] on cpu - // src_key_cache [num_layer, batch_size * beam_width, head_num, size_per_head // x, max_seq_len, x] - // src_value_cache [num_layer, batch_size * beam_width, head_num, max_seq_len, size_per_head] + // src_cache_indirection [local_batch_size, beam_width, max_seq_len] // max_input_length [1] on cpu - // input_lengths [local_batch_size * beam_width_] + // input_lengths [local_batch_size * beam_width] // ite [1] on cpu // output_tensors: // output_ids [max_seq_len, batch_size, beam_width] // finished [local_batch_size * beam_width] - // cum_logits [local_batch_size * beam_width] + // cum_log_probs [local_batch_size * beam_width] // parent_ids [max_seq_len, batch_size * beam_width] // sequence_length [local_batch_size * beam_width] - // tgt_key_cache [num_layer, batch_size * beam_width, head_num, size_per_head // x, max_seq_len, x] - // tgt_value_cache [num_layer, batch_size * beam_width, head_num, max_seq_len, size_per_head] - - FT_CHECK(input_tensors->size() == 8); - FT_CHECK(output_tensors->size() == 7); + // tgt_cache_indirection [local_batch_size, beam_width, max_seq_len] + + std::unordered_map input_tensors_map{{"logits", input_tensors->at(0)}, + {"embedding_bias", input_tensors->at(1)}, + {"step", input_tensors->at(2)}, + {"src_cache_indirection", input_tensors->at(3)}, + {"max_input_length", input_tensors->at(4)}, + {"input_lengths", input_tensors->at(5)}, + {"ite", input_tensors->at(6)}}; + + std::unordered_map output_tensors_map{{"output_ids", output_tensors->at(0)}, + {"finished", output_tensors->at(1)}, + {"cum_log_probs", output_tensors->at(2)}, + {"parent_ids", output_tensors->at(3)}, + {"sequence_length", output_tensors->at(4)}, + {"tgt_cache_indirection", output_tensors->at(5)}}; + invokeSoftMax(&output_tensors_map, &input_tensors_map); +} - const int batch_size = output_tensors->at(0).shape[1]; - const int step = *((int*)input_tensors->at(2).data); - const int ite = *((int*)input_tensors->at(7).data); - const int local_batch_size = input_tensors->at(0).shape[0]; +template +void OnlineBeamSearchLayer::invokeSoftMax(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors) +{ + // input_tensors: + // logits [local_batch_size, beam_width, vocab_size_padded] + // embedding_bias [vocab_size_padded] + // step [1] on cpu + // src_cache_indirection [local_batch_size, beam_width, max_seq_len] + // max_input_length [1] on cpu + // input_lengths [local_batch_size * beam_width] + // ite [1] on cpu + // beam_search_diversity_rate [1] on cpu, optional + // temperature [1] on cpu, optional + // len_penalty [1] on cpu, optional + // repetition_penalty [1] on cpu, optional - const int id_offset = step * batch_size * beam_width_ + local_batch_size * ite * beam_width_; - invokeTopkSoftMax((const T*)input_tensors->at(0).data, + // output_tensors: + // output_ids [max_seq_len, batch_size, beam_width] + // finished [local_batch_size * beam_width] + // cum_log_probs [local_batch_size * beam_width] + // parent_ids [max_seq_len, batch_size * beam_width] + // sequence_length [local_batch_size * beam_width] + // tgt_cache_indirection [local_batch_size, beam_width, max_seq_len] + // output_log_probs [local_batch_size * beam_width] + + FT_CHECK(input_tensors->size() >= 7); + FT_CHECK(output_tensors->size() >= 6); + + const int batch_size = output_tensors->at("output_ids").shape[1]; + const int beam_width = output_tensors->at("output_ids").shape[2]; + const int step = *((int*)input_tensors->at("step").data); + const int ite = *((int*)input_tensors->at("ite").data); + const int local_batch_size = input_tensors->at("logits").shape[0]; + const float diversity_rate = input_tensors->count("beam_search_diversity_rate") ? + input_tensors->at("beam_search_diversity_rate").getVal() : + 0.0f; + float* output_log_probs = + output_tensors->count("output_log_probs") ? (float*)output_tensors->at("output_log_probs").data : nullptr; + const int id_offset = step * batch_size * beam_width + local_batch_size * ite * beam_width; + invokeTopkSoftMax((const T*)input_tensors->at("logits").data, (const T*)(nullptr), - (const bool*)output_tensors->at(1).data, - (float*)output_tensors->at(2).data, - ((int*)output_tensors->at(0).data) + id_offset, + (const bool*)output_tensors->at("finished").data, + (float*)output_tensors->at("cum_log_probs").data, + output_log_probs, + ((int*)output_tensors->at("output_ids").data) + id_offset, topk_softmax_workspace_, topk_softmax_workspace_size_, local_batch_size, - beam_width_, + beam_width, vocab_size_padded_, - end_id_, - diversity_rate_, + (const int*)input_tensors->at("end_id").data, + diversity_rate, stream_); sync_check_cuda_error(); - invokeUpdate((bool*)output_tensors->at(1).data, - ((int*)output_tensors->at(3).data) + id_offset, - (int*)output_tensors->at(4).data, - ((int*)output_tensors->at(0).data) + id_offset, - ((int*)output_tensors->at(0).data) + id_offset, + invokeUpdate((bool*)output_tensors->at("finished").data, + ((int*)output_tensors->at("parent_ids").data) + id_offset, + (int*)output_tensors->at("sequence_length").data, + ((int*)output_tensors->at("output_ids").data) + id_offset, + ((int*)output_tensors->at("output_ids").data) + id_offset, local_batch_size, - beam_width_, + beam_width, vocab_size_padded_, - end_id_, + (const int*)input_tensors->at("end_id").data, stream_); sync_check_cuda_error(); } @@ -137,15 +184,20 @@ void OnlineBeamSearchLayer::invokeSoftMax(std::vector* output_tensors template void OnlineBeamSearchLayer::allocateBuffer() { + FT_CHECK(false); +} + +template +void OnlineBeamSearchLayer::allocateBuffer(size_t batch_size, size_t beam_width) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); topk_softmax_workspace_size_ = - (size_t)(ceil(max_batch_size_ * beam_width_ * beam_width_ / 4.) * 4 * 2 - + ceil(max_batch_size_ * beam_width_ * SMALL_TOP_K_SOFTMAX_MAX_VOC_PARTS * (2 * MAX_K + 2) / 4.) * 4); + (size_t)(ceil(batch_size * beam_width * beam_width / 4.) * 4 * 2 + + ceil(batch_size * beam_width * SMALL_TOP_K_SOFTMAX_MAX_VOC_PARTS * (2 * MAX_K + 2) / 4.) * 4); - if (is_allocate_buffer_ == false) { - topk_softmax_workspace_ = - reinterpret_cast(allocator_->malloc(sizeof(float) * topk_softmax_workspace_size_, false)); - is_allocate_buffer_ = true; - } + topk_softmax_workspace_ = reinterpret_cast( + allocator_->reMalloc(topk_softmax_workspace_, sizeof(float) * topk_softmax_workspace_size_, false)); + is_allocate_buffer_ = true; } template diff --git a/src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.h b/src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.h index a2ac3706d..506c03f8b 100644 --- a/src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.h +++ b/src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -25,23 +25,18 @@ template class OnlineBeamSearchLayer: public BaseBeamSearchLayer { private: // meta data - using BaseBeamSearchLayer::head_num_; - using BaseBeamSearchLayer::size_per_head_; - using BaseBeamSearchLayer::beam_width_; using BaseBeamSearchLayer::vocab_size_; using BaseBeamSearchLayer::vocab_size_padded_; - using BaseBeamSearchLayer::end_id_; - using BaseBeamSearchLayer::diversity_rate_; - - // buffer handling - using BaseBeamSearchLayer::max_batch_size_; using BaseBeamSearchLayer::topk_softmax_workspace_size_; using BaseBeamSearchLayer::topk_softmax_workspace_; void allocateBuffer() override; + void allocateBuffer(size_t batch_size, size_t beam_width) override; void invokeSoftMax(std::vector* output_tensors, const std::vector* input_tensors) override; + void invokeSoftMax(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors) override; using BaseBeamSearchLayer::stream_; using BaseBeamSearchLayer::is_allocate_buffer_; diff --git a/src/fastertransformer/layers/sampling_layers/BaseSamplingLayer.cc b/src/fastertransformer/layers/sampling_layers/BaseSamplingLayer.cc index c1e6383b7..6f7df8849 100644 --- a/src/fastertransformer/layers/sampling_layers/BaseSamplingLayer.cc +++ b/src/fastertransformer/layers/sampling_layers/BaseSamplingLayer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -38,45 +38,16 @@ BaseSamplingLayer::BaseSamplingLayer(size_t max_batch_size, bool is_free_buffer_after_forward, cudaDeviceProp* cuda_device_prop): DynamicDecodeBaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward, cuda_device_prop), - max_batch_size_(max_batch_size), vocab_size_(vocab_size), - vocab_size_padded_(vocab_size_padded), - end_id_(end_id), - top_k_(top_k), - top_p_(top_p), - random_seed_(random_seed), - temperature_(temperature_), - len_penalty_(len_penalty_), - repetition_penalty_(repetition_penalty_) + vocab_size_padded_(vocab_size_padded) { } -template -bool BaseSamplingLayer::isValidBatchSize(size_t batch_size) -{ - if (batch_size <= max_batch_size_) { - return true; - } - else { - freeBuffer(); - max_batch_size_ = batch_size * 1.2; - return true; - } -} - template BaseSamplingLayer::BaseSamplingLayer(BaseSamplingLayer const& sampling_layer): DynamicDecodeBaseLayer(sampling_layer), - max_batch_size_(sampling_layer.max_batch_size_), vocab_size_(sampling_layer.vocab_size_), vocab_size_padded_(sampling_layer.vocab_size_padded_), - end_id_(sampling_layer.end_id_), - top_k_(sampling_layer.top_k_), - top_p_(sampling_layer.top_p_), - random_seed_(sampling_layer.random_seed_), - temperature_(sampling_layer.temperature_), - len_penalty_(sampling_layer.len_penalty_), - repetition_penalty_(sampling_layer.repetition_penalty_), sampling_workspace_size_(sampling_layer.sampling_workspace_size_) { } @@ -96,6 +67,7 @@ void BaseSamplingLayer::forward(std::vector* output_tensors, const st // max_input_length [1] on cpu // input_lengths [local_batch_size] // ite [1] on cpu + // random_seed [1] on cpu, optional // output_tensors: // output_ids [max_seq_len, batch_size] @@ -103,38 +75,86 @@ void BaseSamplingLayer::forward(std::vector* output_tensors, const st // sequence_length [local_batch_size] // cum_log_probs [local_batch_size], must be float* - FT_CHECK(input_tensors->size() == 6); - FT_CHECK(output_tensors->size() == 4); - isValidBatchSize(output_tensors->at(0).shape[1]); // use batch_size to check - allocateBuffer(); - - const int batch_size = output_tensors->at(0).shape[1]; - const int local_batch_size = input_tensors->at(0).shape[0]; - const int step = *((int*)input_tensors->at(2).data); - const int ite = *((int*)input_tensors->at(5).data); - - if (input_tensors->at(1).data != nullptr || temperature_ != 1.0f) { - invokeApplyTemperaturePenalty((T*)input_tensors->at(0).data, - (const T*)(input_tensors->at(1).data), - temperature_, - local_batch_size, - vocab_size_, - vocab_size_padded_, - stream_); - sync_check_cuda_error(); + FT_CHECK(false); // TODO deprecated, need to remove + std::unordered_map input_tensors_map{{"logits", input_tensors->at(0)}, + {"embedding_bias", input_tensors->at(1)}, + {"step", input_tensors->at(2)}, + {"max_input_length", input_tensors->at(3)}, + {"input_lengths", input_tensors->at(4)}, + {"ite", input_tensors->at(5)}}; + if (input_tensors->size() == 7) { + input_tensors_map.insert({"random_seed", input_tensors->at(6)}); } - if (step > 1 && repetition_penalty_ != 1.0f) { - invokeApplyRepetitionPenalty((T*)input_tensors->at(0).data, - repetition_penalty_, + std::unordered_map output_tensors_map{{"output_ids", output_tensors->at(0)}, + {"finished", output_tensors->at(1)}, + {"sequence_length", output_tensors->at(2)}, + {"cum_log_probs", output_tensors->at(3)}}; + forward(&output_tensors_map, &input_tensors_map); +} + +template +void BaseSamplingLayer::forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors) +{ + // input_tensors: + // logits [local_batch_size, vocab_size_padded] + // embedding_bias [vocab_size_padded] + // step [1] on cpu + // max_input_length [1] on cpu + // input_lengths [local_batch_size] + // ite [1] on cpu + // runtime_top_k [1] on cpu, optional. + // runtime_top_p [1] on cpu, optional + // temperature [1] on cpu, optional + // len_penalty [1] on cpu, optional + // repetition_penalty [1] on cpu, optional + // random_seed [1] on cpu, unsigned long long, optional + + // output_tensors: + // output_ids [max_seq_len, batch_size] + // finished [local_batch_size] + // sequence_length [local_batch_size] + // cum_log_probs [batch_size], must be float* + // The cumultative log probability of generated tokens. + // output_log_probs [local_batch_size], must be float* + // The log probs at the current step. + + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + FT_CHECK(input_tensors->size() >= 6); + FT_CHECK(output_tensors->size() >= 3); + const int batch_size = output_tensors->at("output_ids").shape[1]; + + const int local_batch_size = input_tensors->at("logits").shape[0]; + const int step = *((int*)input_tensors->at("step").data); + const int ite = *((int*)input_tensors->at("ite").data); + + float temperature = input_tensors->count("temperature") ? input_tensors->at("temperature").getVal() : 1.0f; + + if ((const T*)(input_tensors->at("embedding_bias").data) != nullptr || temperature != 1.0f) { + invokeApplyTemperaturePenalty((T*)input_tensors->at("logits").data, + (const T*)(input_tensors->at("embedding_bias").data), + temperature, + local_batch_size, + vocab_size_, + vocab_size_padded_, + stream_); + } + sync_check_cuda_error(); + + if (step > 1 + && (input_tensors->count("repetition_penalty") + && input_tensors->at("repetition_penalty").getVal() != 1.0f)) { + invokeApplyRepetitionPenalty((T*)input_tensors->at("logits").data, + input_tensors->at("repetition_penalty").getVal(), nullptr, - (int*)output_tensors->at(0).data, + (int*)output_tensors->at("output_ids").data, batch_size, local_batch_size, vocab_size_, vocab_size_padded_, - (int*)input_tensors->at(4).data, - *((int*)input_tensors->at(3).data), + (int*)input_tensors->at("input_lengths").data, + *((int*)input_tensors->at("max_input_length").data), step, ite, stream_); diff --git a/src/fastertransformer/layers/sampling_layers/BaseSamplingLayer.h b/src/fastertransformer/layers/sampling_layers/BaseSamplingLayer.h index 9fde64211..5224154d6 100644 --- a/src/fastertransformer/layers/sampling_layers/BaseSamplingLayer.h +++ b/src/fastertransformer/layers/sampling_layers/BaseSamplingLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -29,29 +29,23 @@ class BaseSamplingLayer: public DynamicDecodeBaseLayer { bool isValidBatchSize(size_t batch_size); protected: - // buffer handling - size_t max_batch_size_ = 0; - - // meta data size_t vocab_size_; size_t vocab_size_padded_; - int end_id_; - size_t top_k_; - float top_p_; - unsigned long long random_seed_; - float temperature_; - float len_penalty_; - float repetition_penalty_; size_t sampling_workspace_size_; - void* sampling_workspace_; - curandState_t* curandstate_buf_; + void* sampling_workspace_ = nullptr; + curandState_t* curandstate_buf_ = nullptr; virtual void runSampling(std::vector* output_tensors, const std::vector* input_tensors) = 0; + virtual void runSampling(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors) = 0; + virtual void freeBuffer() = 0; virtual void allocateBuffer() = 0; - virtual void invokeInitialize() = 0; + virtual void allocateBuffer(size_t batch_size, size_t top_k, float top_p) = 0; + virtual void + invokeInitialize(size_t batch_size, unsigned long long random_seed, curandState_t* curandstate_buf) = 0; public: BaseSamplingLayer(size_t max_batch_size, @@ -60,7 +54,7 @@ class BaseSamplingLayer: public DynamicDecodeBaseLayer { int end_id, size_t top_k, float top_p, - unsigned long long random_seed, + unsigned long long random_seed, // TODO(bhsueh) delete float temperature, float len_penalty, float repetition_penalty, @@ -76,6 +70,8 @@ class BaseSamplingLayer: public DynamicDecodeBaseLayer { void forward(std::vector* output_tensors, const std::vector* input_tensors) override; + void forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors) override; }; } // namespace fastertransformer diff --git a/src/fastertransformer/layers/sampling_layers/CMakeLists.txt b/src/fastertransformer/layers/sampling_layers/CMakeLists.txt index b4482e69d..88e42648a 100644 --- a/src/fastertransformer/layers/sampling_layers/CMakeLists.txt +++ b/src/fastertransformer/layers/sampling_layers/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.cu b/src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.cu index 545829181..b7d14a885 100644 --- a/src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.cu +++ b/src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -20,38 +20,45 @@ #include "src/fastertransformer/kernels/sampling_topk_kernels.h" #include "src/fastertransformer/kernels/sampling_topp_kernels.h" #include "src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.h" +#include "src/fastertransformer/utils/logger.h" namespace fastertransformer { template void TopKSamplingLayer::allocateBuffer() { - if (is_allocate_buffer_ == false) { - invokeTopKSampling(nullptr, - sampling_workspace_size_, - nullptr, - nullptr, - nullptr, - nullptr, - nullptr, - nullptr, - top_k_, - vocab_size_padded_, - end_id_, - stream_, - max_batch_size_); - sampling_workspace_ = allocator_->malloc(sampling_workspace_size_, false); - curandstate_buf_ = - reinterpret_cast(allocator_->malloc(sizeof(curandState_t) * max_batch_size_, false)); - invokeInitialize(); - is_allocate_buffer_ = true; - } + FT_CHECK(false); +} + +template +void TopKSamplingLayer::allocateBuffer(size_t batch_size, size_t top_k, float top_p) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + invokeTopKSampling(nullptr, + sampling_workspace_size_, + nullptr, + nullptr, + nullptr, + nullptr, + nullptr, + nullptr, + nullptr, + top_k, + vocab_size_padded_, + nullptr, + stream_, + batch_size); + sampling_workspace_ = allocator_->reMalloc(sampling_workspace_, sampling_workspace_size_, false); + curandstate_buf_ = reinterpret_cast( + allocator_->reMalloc(curandstate_buf_, sizeof(curandState_t) * batch_size, false)); + is_allocate_buffer_ = true; } template void TopKSamplingLayer::freeBuffer() { - if (is_allocate_buffer_ == true) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + if (is_allocate_buffer_) { allocator_->free(sampling_workspace_); allocator_->free(curandstate_buf_); is_allocate_buffer_ = false; @@ -59,9 +66,12 @@ void TopKSamplingLayer::freeBuffer() } template -void TopKSamplingLayer::invokeInitialize() +void TopKSamplingLayer::invokeInitialize(size_t batch_size, + unsigned long long random_seed, + curandState_t* curandstate_buf) { - invokeCurandInitialize(curandstate_buf_, max_batch_size_, random_seed_, stream_); + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + invokeCurandInitialize(curandstate_buf, batch_size, random_seed, stream_); sync_check_cuda_error(); } @@ -76,54 +86,121 @@ void TopKSamplingLayer::runSampling(std::vector* o // max_input_length [1] on cpu // input_lengths [local_batch_size] // ite [1] on cpu + // random_seed [1] on cpu, optional // output_tensors: // output_ids [max_seq_len, batch_size] // finished [local_batch_size] // sequence_length [local_batch_size] - // cum_log_probs [local_batch_size], must be float* + // cum_log_probs [batch_size], must be float* + // The cumultative log probability of generated tokens. + // output_log_probs [local_batch_size], must be float* + // The log probs at the current step. + FT_CHECK(false); // TODO deprecated, need to remove + std::unordered_map input_tensors_map{{"logits", input_tensors->at(0)}, + {"embedding_bias", input_tensors->at(1)}, + {"step", input_tensors->at(2)}, + {"max_input_length", input_tensors->at(3)}, + {"input_lengths", input_tensors->at(4)}, + {"ite", input_tensors->at(5)}}; + if (input_tensors->size() == 7) { + input_tensors_map.insert({"random_seed", input_tensors->at(6)}); + } + std::unordered_map output_tensors_map{{"output_ids", output_tensors->at(0)}, + {"finished", output_tensors->at(1)}, + {"sequence_length", output_tensors->at(2)}, + {"cum_log_probs", output_tensors->at(3)}, + {"output_log_probs", output_tensors->at(4)}}; + runSampling(&output_tensors_map, &input_tensors_map); +} - FT_CHECK(input_tensors->size() == 6); - FT_CHECK(output_tensors->size() == 4); +template +void TopKSamplingLayer::runSampling(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors) +{ + // input_tensors: + // logits [local_batch_size, vocab_size_padded] + // embedding_bias [vocab_size_padded] + // step [1] on cpu + // max_input_length [1] on cpu + // input_lengths [local_batch_size] + // ite [1] on cpu + // runtime_top_k [1] or [batch_size] on cpu, optional + // temperature [1] or [batch_size] on cpu, optional + // len_penalty [1] or [batch_size] on cpu, optional + // repetition_penalty [1] or [batch_size] on cpu, optional + // random_seed [1] or [batch_size] on cpu, optional - const int batch_size = output_tensors->at(0).shape[1]; - const int local_batch_size = input_tensors->at(0).shape[0]; - const int step = *((int*)input_tensors->at(2).data); - const int ite = *((int*)input_tensors->at(5).data); + // output_tensors: + // output_ids [max_seq_len, batch_size] + // finished [local_batch_size] + // sequence_length [local_batch_size] + // cum_log_probs [batch_size], must be float*, optional + // The cumultative log probability of generated tokens. + // output_log_probs [local_batch_size], must be float*, optional + // The log probs at the current step. + + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + FT_CHECK(input_tensors->size() >= 6); + FT_CHECK(output_tensors->size() >= 3); + + const int batch_size = output_tensors->at("output_ids").shape[1]; + const int local_batch_size = input_tensors->at("logits").shape[0]; + const int step = *((int*)input_tensors->at("step").data); + const int ite = *((int*)input_tensors->at("ite").data); + + const int runtime_top_k = input_tensors->at("runtime_top_k").shape[0] == 1 ? + input_tensors->at("runtime_top_k").getVal(0) : + input_tensors->at("runtime_top_k").getVal(ite * local_batch_size); + allocateBuffer(batch_size, runtime_top_k, 0.0f); + if (input_tensors->count("random_seed")) { + unsigned long long int random_seed = + input_tensors->at("random_seed").shape[0] == 1 ? + (unsigned long long int)input_tensors->at("random_seed").getVal(0) : + (unsigned long long int)input_tensors->at("random_seed").getVal(ite * local_batch_size); + invokeInitialize(local_batch_size, random_seed, curandstate_buf_ + ite * local_batch_size); + } - invokeAddBiasEndMask((T*)(input_tensors->at(0).data), + invokeAddBiasEndMask((T*)(input_tensors->at("logits").data), (T*)(nullptr), - end_id_, - (bool*)output_tensors->at(1).data, + (const int*)input_tensors->at("end_id").data, + (bool*)output_tensors->at("finished").data, local_batch_size, vocab_size_padded_, stream_); sync_check_cuda_error(); - if (output_tensors->at(3).data != nullptr) { - invokeAddBiasSoftMax((T*)(input_tensors->at(0).data), + float* cum_log_probs = + output_tensors->count("cum_log_probs") ? output_tensors->at("cum_log_probs").getPtr() : nullptr; + float* output_log_probs = + output_tensors->count("output_log_probs") ? output_tensors->at("output_log_probs").getPtr() : nullptr; + + if (cum_log_probs != nullptr || output_log_probs != nullptr) { + invokeAddBiasSoftMax((T*)(input_tensors->at("logits").data), (T*)(nullptr), - end_id_, - (bool*)output_tensors->at(1).data, + (const int*)input_tensors->at("end_id").data, + (bool*)output_tensors->at("finished").data, local_batch_size, vocab_size_padded_, vocab_size_, stream_); } - invokeTopKSampling(sampling_workspace_, - sampling_workspace_size_, - (T*)(input_tensors->at(0).data), - ((int*)output_tensors->at(0).data) + step * batch_size + ite * local_batch_size, - (int*)output_tensors->at(2).data, - (bool*)output_tensors->at(1).data, - (float*)output_tensors->at(3).data, - curandstate_buf_ + ite * local_batch_size, - top_k_, - vocab_size_padded_, - end_id_, - stream_, - local_batch_size); + invokeTopKSampling( + sampling_workspace_, + sampling_workspace_size_, + input_tensors->at("logits").getPtr(), + output_tensors->at("output_ids").getPtrWithOffset(step * batch_size + ite * local_batch_size), + output_tensors->at("sequence_length").getPtr(), + output_tensors->at("finished").getPtr(), + cum_log_probs, + output_log_probs, + curandstate_buf_ + ite * local_batch_size, + runtime_top_k, + vocab_size_padded_, + (const int*)input_tensors->at("end_id").data, + stream_, + local_batch_size); sync_check_cuda_error(); } @@ -146,8 +223,8 @@ TopKSamplingLayer::TopKSamplingLayer(size_t max_batch_size, vocab_size_padded, end_id, top_k, - random_seed, 0.0f, + random_seed, temperature, len_penalty, repetition_penalty, @@ -174,4 +251,4 @@ TopKSamplingLayer::~TopKSamplingLayer() template class TopKSamplingLayer; template class TopKSamplingLayer; -} // namespace fastertransformer \ No newline at end of file +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.h b/src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.h index a19f873a3..7983be0b8 100644 --- a/src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.h +++ b/src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -26,25 +26,21 @@ class TopKSamplingLayer: public BaseSamplingLayer { private: void runSampling(std::vector* output_tensors, const std::vector* input_tensors) override; + void runSampling(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors) override; void freeBuffer() override; void allocateBuffer() override; - void invokeInitialize() override; + void allocateBuffer(size_t batch_size, size_t top_k, float top_p) override; + void invokeInitialize(size_t batch_size, unsigned long long random_seed, curandState_t* curandstate_buf) override; + bool isValidTopK(size_t runtime_top_k); using BaseSamplingLayer::vocab_size_; using BaseSamplingLayer::vocab_size_padded_; - using BaseSamplingLayer::end_id_; - using BaseSamplingLayer::top_k_; - using BaseSamplingLayer::temperature_; - using BaseSamplingLayer::len_penalty_; - using BaseSamplingLayer::repetition_penalty_; using BaseSamplingLayer::sampling_workspace_size_; using BaseSamplingLayer::sampling_workspace_; using BaseSamplingLayer::curandstate_buf_; - using BaseSamplingLayer::random_seed_; - - using BaseSamplingLayer::max_batch_size_; using BaseSamplingLayer::stream_; using BaseSamplingLayer::allocator_; diff --git a/src/fastertransformer/layers/sampling_layers/TopKTopPSamplingLayer.cu b/src/fastertransformer/layers/sampling_layers/TopKTopPSamplingLayer.cu index 3691a4251..3413db103 100644 --- a/src/fastertransformer/layers/sampling_layers/TopKTopPSamplingLayer.cu +++ b/src/fastertransformer/layers/sampling_layers/TopKTopPSamplingLayer.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -18,39 +18,47 @@ #include #include "src/fastertransformer/kernels/sampling_topk_kernels.h" +#include "src/fastertransformer/kernels/sampling_topp_kernels.h" #include "src/fastertransformer/layers/sampling_layers/TopKTopPSamplingLayer.h" +#include "src/fastertransformer/utils/logger.h" namespace fastertransformer { template void TopKTopPSamplingLayer::allocateBuffer() { - if (is_allocate_buffer_ == false) { - invokeTopKTopPSampling(nullptr, - sampling_workspace_size_, - nullptr, - (T*)nullptr, - nullptr, - nullptr, - nullptr, - max_batch_size_, - top_k_, - (T)top_p_, - vocab_size_padded_, - end_id_, - stream_); - sampling_workspace_ = allocator_->malloc(sampling_workspace_size_, true); - curandstate_buf_ = - reinterpret_cast(allocator_->malloc(sizeof(curandState_t) * max_batch_size_, true)); - invokeInitialize(); - is_allocate_buffer_ = true; - } + FT_CHECK(false); +} + +template +void TopKTopPSamplingLayer::allocateBuffer(size_t batch_size, size_t top_k, float top_p) +{ + invokeTopKTopPSampling(nullptr, // workspace + sampling_workspace_size_, + nullptr, // output_ids + (T*)nullptr, // logits + nullptr, // sequence_length + nullptr, // finished_buf + nullptr, // cum_log_probs + nullptr, // output_log_probs + nullptr, // curandstate + batch_size, + top_k, + (T)top_p, + vocab_size_padded_, + nullptr, + stream_); + sampling_workspace_ = allocator_->reMalloc(sampling_workspace_, sampling_workspace_size_, true); + curandstate_buf_ = reinterpret_cast( + allocator_->reMalloc(curandstate_buf_, sizeof(curandState_t) * batch_size, false)); + is_allocate_buffer_ = true; } template void TopKTopPSamplingLayer::freeBuffer() { - if (is_allocate_buffer_ == true) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + if (is_allocate_buffer_) { allocator_->free(sampling_workspace_); allocator_->free(curandstate_buf_); is_allocate_buffer_ = false; @@ -58,9 +66,12 @@ void TopKTopPSamplingLayer::freeBuffer() } template -void TopKTopPSamplingLayer::invokeInitialize() +void TopKTopPSamplingLayer::invokeInitialize(size_t batch_size, + unsigned long long random_seed, + curandState_t* curandstate_buf) { - invokeCurandInitialize(curandstate_buf_, max_batch_size_, random_seed_, stream_); + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + invokeCurandInitialize(curandstate_buf, batch_size, random_seed, stream_); sync_check_cuda_error(); } @@ -75,43 +86,123 @@ void TopKTopPSamplingLayer::runSampling(std::vector input_tensors_map{{"logits", input_tensors->at(0)}, + {"embedding_bias", input_tensors->at(1)}, + {"step", input_tensors->at(2)}, + {"max_input_length", input_tensors->at(3)}, + {"input_lengths", input_tensors->at(4)}, + {"ite", input_tensors->at(5)}}; + if (input_tensors->size() == 7) { + input_tensors_map.insert({"random_seed", input_tensors->at(6)}); + } + + std::unordered_map output_tensors_map{{"output_ids", output_tensors->at(0)}, + {"finished", output_tensors->at(1)}, + {"sequence_length", output_tensors->at(2)}, + {"output_log_probs", output_tensors->at(3)}}; + runSampling(&output_tensors_map, &input_tensors_map); +} + +template +void TopKTopPSamplingLayer::runSampling(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors) +{ + // input_tensors: + // logits [local_batch_size, vocab_size_padded] + // embedding_bias [vocab_size_padded] + // step [1] on cpu + // max_input_length [1] on cpu + // input_lengths [local_batch_size] + // ite [1] on cpu + // runtime_top_k [1] or [batch_size] on cpu, optional + // runtime_top_p [1] or [batch_size] on cpu, optional + // temperature [1] or [batch_size] on cpu, optional + // len_penalty [1] or [batch_size] on cpu, optional + // repetition_penalty [1] or [batch_size] on cpu, optional + // random_seed [1] or [batch_size] on cpu, optional // output_tensors: // output_ids [max_seq_len, batch_size] // finished [local_batch_size] // sequence_length [local_batch_size] - // cum_log_probs [local_batch_size], must be float* + // cum_log_probs [batch_size], must be float*, optional + // The cumultative log probability of generated tokens. + // output_log_probs [local_batch_size], must be float*, optional + // The log probabitilies at the current step. + + FT_CHECK(input_tensors->size() >= 6); + FT_CHECK(output_tensors->size() >= 3); + + const int batch_size = output_tensors->at("output_ids").shape[1]; + const int local_batch_size = input_tensors->at("logits").shape[0]; + const int step = *((int*)input_tensors->at("step").data); + const int ite = *((int*)input_tensors->at("ite").data); - FT_CHECK(input_tensors->size() == 6); - FT_CHECK(output_tensors->size() == 4); + const int runtime_top_k = input_tensors->at("runtime_top_k").shape[0] == 1 ? + input_tensors->at("runtime_top_k").getVal(0) : + input_tensors->at("runtime_top_k").getVal(ite * local_batch_size); - const int batch_size = output_tensors->at(0).shape[1]; - const int local_batch_size = input_tensors->at(0).shape[0]; - const int step = *((int*)input_tensors->at(2).data); - const int ite = *((int*)input_tensors->at(5).data); + const float runtime_top_p = input_tensors->at("runtime_top_p").shape[0] == 1 ? + input_tensors->at("runtime_top_p").getVal(0) : + input_tensors->at("runtime_top_p").getVal(ite * local_batch_size); + allocateBuffer(batch_size, runtime_top_k, runtime_top_p); + if (input_tensors->find("random_seed") != input_tensors->end()) { + unsigned long long int random_seed = + input_tensors->at("random_seed").shape[0] == 1 ? + (unsigned long long int)input_tensors->at("random_seed").getVal(0) : + (unsigned long long int)input_tensors->at("random_seed").getVal(ite * local_batch_size); + invokeInitialize(local_batch_size, random_seed, curandstate_buf_ + ite * local_batch_size); + } - invokeAddBiasEndMask((T*)(input_tensors->at(0).data), + invokeAddBiasEndMask((T*)(input_tensors->at("logits").data), (T*)(nullptr), - end_id_, - (bool*)output_tensors->at(1).data, + (const int*)input_tensors->at("end_id").data, + (bool*)output_tensors->at("finished").data, local_batch_size, vocab_size_padded_, stream_); sync_check_cuda_error(); - // TODO(bhsueh) support return the cum_log_probs + float* cum_log_probs = + output_tensors->count("cum_log_probs") ? output_tensors->at("cum_log_probs").getPtr() : nullptr; + float* output_log_probs = + output_tensors->count("output_log_probs") ? output_tensors->at("output_log_probs").getPtr() : nullptr; + + // Modified(jaedeokk): to make consistent with the top-k sampling. + if (cum_log_probs != nullptr || output_log_probs != nullptr) { + invokeAddBiasSoftMax((T*)(input_tensors->at("logits").data), // logits = softmax(logits) + (T*)(nullptr), + (const int*)input_tensors->at("end_id").data, + (bool*)output_tensors->at("finished").data, + local_batch_size, + vocab_size_padded_, + vocab_size_, + stream_); + } + invokeTopKTopPSampling(sampling_workspace_, sampling_workspace_size_, - ((int*)output_tensors->at(0).data) + step * batch_size + ite * local_batch_size, - (T*)(input_tensors->at(0).data), - (int*)output_tensors->at(2).data, - (bool*)output_tensors->at(1).data, + ((int*)output_tensors->at("output_ids").data) + step * batch_size + ite * local_batch_size, + (T*)(input_tensors->at("logits").data), + (int*)output_tensors->at("sequence_length").data, + (bool*)output_tensors->at("finished").data, + cum_log_probs, + output_log_probs, curandstate_buf_ + ite * local_batch_size, local_batch_size, - top_k_, - (T)top_p_, + runtime_top_k, + (T)runtime_top_p, vocab_size_padded_, - end_id_, + (const int*)input_tensors->at("end_id").data, stream_); sync_check_cuda_error(); } diff --git a/src/fastertransformer/layers/sampling_layers/TopKTopPSamplingLayer.h b/src/fastertransformer/layers/sampling_layers/TopKTopPSamplingLayer.h index 597409cae..afffe015d 100644 --- a/src/fastertransformer/layers/sampling_layers/TopKTopPSamplingLayer.h +++ b/src/fastertransformer/layers/sampling_layers/TopKTopPSamplingLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -26,26 +26,21 @@ class TopKTopPSamplingLayer: public BaseSamplingLayer { private: void runSampling(std::vector* output_tensors, const std::vector* input_tensors) override; + void runSampling(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors) override; void allocateBuffer() override; + void allocateBuffer(size_t batch_size, size_t top_k, float top_p) override; void freeBuffer() override; - void invokeInitialize() override; + void invokeInitialize(size_t batch_size, unsigned long long random_seed, curandState_t* curandstate_buf) override; + bool isValidTopK(size_t runtime_top_k); using BaseSamplingLayer::vocab_size_; using BaseSamplingLayer::vocab_size_padded_; - using BaseSamplingLayer::end_id_; - using BaseSamplingLayer::top_k_; - using BaseSamplingLayer::top_p_; - using BaseSamplingLayer::temperature_; - using BaseSamplingLayer::len_penalty_; - using BaseSamplingLayer::repetition_penalty_; using BaseSamplingLayer::sampling_workspace_size_; using BaseSamplingLayer::sampling_workspace_; using BaseSamplingLayer::curandstate_buf_; - using BaseSamplingLayer::random_seed_; - - using BaseSamplingLayer::max_batch_size_; using BaseSamplingLayer::stream_; using BaseSamplingLayer::allocator_; @@ -54,19 +49,19 @@ class TopKTopPSamplingLayer: public BaseSamplingLayer { protected: public: TopKTopPSamplingLayer(size_t max_batch_size, - size_t vocab_size, - size_t vocab_size_padded, - int end_id, - int top_k, - float top_p, - unsigned long long random_seed, - float temperature, - float len_penalty, - float repetition_penalty, - cudaStream_t stream, - cublasMMWrapper* cublas_wrapper, - IAllocator* allocator, - bool is_free_buffer_after_forward); + size_t vocab_size, + size_t vocab_size_padded, + int end_id, + int top_k, + float top_p, + unsigned long long random_seed, + float temperature, + float len_penalty, + float repetition_penalty, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward); TopKTopPSamplingLayer(TopKTopPSamplingLayer const& topk_topp_sampling_layer); diff --git a/src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.cu b/src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.cu index e93ad1dff..caf178d89 100644 --- a/src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.cu +++ b/src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -21,48 +21,57 @@ #include "src/fastertransformer/kernels/sampling_topk_kernels.h" #include "src/fastertransformer/kernels/sampling_topp_kernels.h" #include "src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.h" +#include "src/fastertransformer/utils/logger.h" namespace fastertransformer { template void TopPSamplingLayer::allocateBuffer() { - if (is_allocate_buffer_ == false) { - invokeTopPSampling(nullptr, - sampling_workspace_size_, - cub_temp_storage_size_, - nullptr, - nullptr, - nullptr, - nullptr, - topp_id_vals_buf_, - topp_offset_buf_, - begin_topp_offset_buf_, - curandstate_buf_, - max_batch_size_, - vocab_size_padded_, - end_id_, - top_p_, - stream_, - cuda_device_prop_); - - sampling_workspace_ = allocator_->malloc(sampling_workspace_size_, true); - curandstate_buf_ = - reinterpret_cast(allocator_->malloc(sizeof(curandState_t) * max_batch_size_, true)); - - topp_id_vals_buf_ = - reinterpret_cast(allocator_->malloc(sizeof(int) * max_batch_size_ * vocab_size_padded_, false)); - topp_offset_buf_ = reinterpret_cast(allocator_->malloc(sizeof(int) * (max_batch_size_ + 1), false)); - begin_topp_offset_buf_ = reinterpret_cast(allocator_->malloc(sizeof(int) * (max_batch_size_ + 1), false)); - - invokeInitialize(); - is_allocate_buffer_ = true; - } + FT_CHECK(false); +} + +template +void TopPSamplingLayer::allocateBuffer(size_t batch_size, size_t top_k, float top_p) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + invokeTopPSampling(nullptr, // workspace + sampling_workspace_size_, + cub_temp_storage_size_, + nullptr, // output_ids + nullptr, // sequence_length + nullptr, // finished_buffer + nullptr, // cum_log_probs + nullptr, // output_log_probs + nullptr, // log_probs + topp_id_vals_buf_, + topp_offset_buf_, + begin_topp_offset_buf_, + curandstate_buf_, + batch_size, + vocab_size_padded_, + nullptr, + top_p, + stream_, + cuda_device_prop_); + + sampling_workspace_ = allocator_->reMalloc(sampling_workspace_, sampling_workspace_size_, true); + curandstate_buf_ = reinterpret_cast( + allocator_->reMalloc(curandstate_buf_, sizeof(curandState_t) * batch_size, true)); + + topp_id_vals_buf_ = reinterpret_cast( + allocator_->reMalloc(topp_id_vals_buf_, sizeof(int) * batch_size * vocab_size_padded_, false)); + topp_offset_buf_ = + reinterpret_cast(allocator_->reMalloc(topp_offset_buf_, sizeof(int) * (batch_size + 1), false)); + begin_topp_offset_buf_ = + reinterpret_cast(allocator_->reMalloc(begin_topp_offset_buf_, sizeof(int) * (batch_size + 1), false)); + is_allocate_buffer_ = true; } template void TopPSamplingLayer::freeBuffer() { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); if (is_allocate_buffer_ == true) { allocator_->free(sampling_workspace_); allocator_->free(curandstate_buf_); @@ -74,12 +83,12 @@ void TopPSamplingLayer::freeBuffer() } template -void TopPSamplingLayer::invokeInitialize() +void TopPSamplingLayer::invokeInitialize(size_t batch_size, + unsigned long long random_seed, + curandState_t* curandstate_buf) { - invokeCurandInitialize(curandstate_buf_, max_batch_size_, random_seed_, stream_); - sync_check_cuda_error(); - invokeTopPInitialize( - topp_id_vals_buf_, topp_offset_buf_, begin_topp_offset_buf_, max_batch_size_, vocab_size_padded_, stream_); + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + invokeCurandInitialize(curandstate_buf, batch_size, random_seed, stream_); sync_check_cuda_error(); } @@ -94,47 +103,118 @@ void TopPSamplingLayer::runSampling(std::vector* o // max_input_length [1] on cpu // input_lengths [local_batch_size] // ite [1] on cpu + // random_seed [1] on cpu + + // output_tensors: + // output_ids [max_seq_len, batch_size] + // finished [local_batch_size] + // sequence_length [local_batch_size] + // cum_log_probs [batch_size], must be float* + // The cumultative log probability of generated tokens. + // output_log_probs [local_batch_size], must be float* + // The log probs at the current step. + + FT_CHECK(false); // TODO deprecated, need to remove + std::unordered_map input_tensors_map{{"logits", input_tensors->at(0)}, + {"embedding_bias", input_tensors->at(1)}, + {"step", input_tensors->at(2)}, + {"max_input_length", input_tensors->at(3)}, + {"input_lengths", input_tensors->at(4)}, + {"ite", input_tensors->at(5)}}; + if (input_tensors->size() == 7) { + input_tensors_map.insert({"random_seed", input_tensors->at(6)}); + } + + std::unordered_map output_tensors_map{{"output_ids", output_tensors->at(0)}, + {"finished", output_tensors->at(1)}, + {"sequence_length", output_tensors->at(2)}, + {"cum_log_probs", output_tensors->at(3)}, + {"output_log_probs", output_tensors->at(4)}}; + runSampling(&output_tensors_map, &input_tensors_map); +} + +template +void TopPSamplingLayer::runSampling(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors) +{ + // input_tensors: + // logits [local_batch_size, vocab_size_padded] + // embedding_bias [vocab_size_padded] + // step [1] on cpu + // max_input_length [1] on cpu + // input_lengths [local_batch_size] + // ite [1] on cpu + // runtime_top_p [1] or [batch_size] on cpu, optional + // temperature [1] or [batch_size] on cpu, optional + // len_penalty [1] or [batch_size] on cpu, optional + // repetition_penalty [1] or [batch_size] on cpu, optional + // random_seed [1] or [batch_size] on cpu, optional // output_tensors: // output_ids [max_seq_len, batch_size] // finished [local_batch_size] // sequence_length [local_batch_size] - // cum_log_probs [local_batch_size], must be float* + // cum_log_probs [batch_size], must be float*, optional + // The cumultative log probability of generated tokens. + // output_log_probs [local_batch_size], must be float*, optional + // The log probs at the current step. + + FT_CHECK(input_tensors->size() >= 6); + FT_CHECK(output_tensors->size() >= 3); - FT_CHECK(input_tensors->size() == 6); - FT_CHECK(output_tensors->size() == 4); + const int batch_size = output_tensors->at("output_ids").shape[1]; + const int local_batch_size = input_tensors->at("logits").shape[0]; + const int step = *((int*)input_tensors->at("step").data); + const int ite = *((int*)input_tensors->at("ite").data); - const int batch_size = output_tensors->at(0).shape[1]; - const int local_batch_size = input_tensors->at(0).shape[0]; - const int step = *((int*)input_tensors->at(2).data); - const int ite = *((int*)input_tensors->at(5).data); + const float runtime_top_p = input_tensors->at("runtime_top_p").shape[0] == 1 ? + input_tensors->at("runtime_top_p").getVal(0) : + input_tensors->at("runtime_top_p").getVal(ite * local_batch_size); + allocateBuffer(batch_size, 0, runtime_top_p); + + invokeTopPInitialize( + topp_id_vals_buf_, topp_offset_buf_, begin_topp_offset_buf_, local_batch_size, vocab_size_padded_, stream_); + sync_check_cuda_error(); + + if (input_tensors->find("random_seed") != input_tensors->end()) { + unsigned long long int random_seed = + input_tensors->at("random_seed").shape[0] == 1 ? + (unsigned long long int)input_tensors->at("random_seed").getVal(0) : + (unsigned long long int)input_tensors->at("random_seed").getVal(ite * local_batch_size); + invokeInitialize(local_batch_size, random_seed, curandstate_buf_ + ite * local_batch_size); + } - invokeAddBiasSoftMax((T*)(input_tensors->at(0).data), + invokeAddBiasSoftMax((T*)(input_tensors->at("logits").data), (T*)(nullptr), - end_id_, - (bool*)output_tensors->at(1).data, + (const int*)input_tensors->at("end_id").data, + (bool*)output_tensors->at("finished").data, local_batch_size, vocab_size_padded_, vocab_size_, stream_); sync_check_cuda_error(); - // TODO(bhsueh) support return the cum_log_probs + float* cum_log_probs = + output_tensors->count("cum_log_probs") ? output_tensors->at("cum_log_probs").getPtr() : nullptr; + float* output_log_probs = + output_tensors->count("output_log_probs") ? output_tensors->at("output_log_probs").getPtr() : nullptr; invokeTopPSampling(sampling_workspace_, sampling_workspace_size_, cub_temp_storage_size_, - ((int*)output_tensors->at(0).data) + step * batch_size + ite * local_batch_size, - (int*)output_tensors->at(2).data, - (bool*)output_tensors->at(1).data, - (T*)(input_tensors->at(0).data), + ((int*)output_tensors->at("output_ids").data) + step * batch_size + ite * local_batch_size, + (int*)output_tensors->at("sequence_length").data, + (bool*)output_tensors->at("finished").data, + cum_log_probs, + output_log_probs, + (T*)(input_tensors->at("logits").data), topp_id_vals_buf_, topp_offset_buf_, begin_topp_offset_buf_, curandstate_buf_ + ite * local_batch_size, local_batch_size, vocab_size_padded_, - end_id_, - top_p_, + (const int*)input_tensors->at("end_id").data, + runtime_top_p, stream_, cuda_device_prop_); sync_check_cuda_error(); @@ -188,4 +268,4 @@ TopPSamplingLayer::~TopPSamplingLayer() template class TopPSamplingLayer; template class TopPSamplingLayer; -} // namespace fastertransformer \ No newline at end of file +} // namespace fastertransformer diff --git a/src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.h b/src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.h index cbb1bd4c3..2895d39fb 100644 --- a/src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.h +++ b/src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -26,10 +26,13 @@ class TopPSamplingLayer: public BaseSamplingLayer { private: void runSampling(std::vector* output_tensors, const std::vector* input_tensors) override; + void runSampling(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors) override; void allocateBuffer() override; + void allocateBuffer(size_t batch_size, size_t top_k, float top_p) override; void freeBuffer() override; - void invokeInitialize() override; + void invokeInitialize(size_t batch_size, unsigned long long random_seed, curandState_t* curandstate_buf) override; int* topp_id_vals_buf_; int* topp_offset_buf_; @@ -38,18 +41,10 @@ class TopPSamplingLayer: public BaseSamplingLayer { using BaseSamplingLayer::vocab_size_; using BaseSamplingLayer::vocab_size_padded_; - using BaseSamplingLayer::end_id_; - using BaseSamplingLayer::top_p_; - using BaseSamplingLayer::temperature_; - using BaseSamplingLayer::len_penalty_; - using BaseSamplingLayer::repetition_penalty_; using BaseSamplingLayer::sampling_workspace_size_; using BaseSamplingLayer::sampling_workspace_; using BaseSamplingLayer::curandstate_buf_; - using BaseSamplingLayer::random_seed_; - - using BaseSamplingLayer::max_batch_size_; using BaseSamplingLayer::stream_; using BaseSamplingLayer::allocator_; diff --git a/src/fastertransformer/layers/xlnet_attention_layers/CMakeLists.txt b/src/fastertransformer/layers/xlnet_attention_layers/CMakeLists.txt index 144b1ca37..4131d60e2 100644 --- a/src/fastertransformer/layers/xlnet_attention_layers/CMakeLists.txt +++ b/src/fastertransformer/layers/xlnet_attention_layers/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/CMakeLists.txt b/src/fastertransformer/models/CMakeLists.txt index ce5d52d10..af33e764c 100644 --- a/src/fastertransformer/models/CMakeLists.txt +++ b/src/fastertransformer/models/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -17,11 +17,12 @@ add_subdirectory(bert_int8) add_subdirectory(decoder) add_subdirectory(longformer) add_subdirectory(decoding) -add_subdirectory(gpt) add_subdirectory(xlnet) -if(BUILD_GPT) - add_subdirectory(t5) - add_subdirectory(gptj) - add_subdirectory(multi_gpu_gpt) -endif() +add_subdirectory(t5) +add_subdirectory(gptj) +add_subdirectory(multi_gpu_gpt) +add_subdirectory(swin) +add_subdirectory(swin_int8) +add_subdirectory(vit) +add_subdirectory(vit_int8) \ No newline at end of file diff --git a/src/fastertransformer/models/bert/Bert.cc b/src/fastertransformer/models/bert/Bert.cc index adcabdbe4..ac727df8f 100644 --- a/src/fastertransformer/models/bert/Bert.cc +++ b/src/fastertransformer/models/bert/Bert.cc @@ -144,6 +144,7 @@ Bert::~Bert() template void Bert::allocateBuffer() { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); if (is_allocate_buffer_ == false) { token_num_ = (size_t*)allocator_->malloc(sizeof(size_t) * 1, false); padding_offset_ = (int*)allocator_->malloc(sizeof(int) * max_batch_size_ * max_seq_len_, false); @@ -172,27 +173,53 @@ void Bert::allocateBuffer() } template -void Bert::freeBuffer() +void Bert::allocateBuffer(size_t batch_size, size_t seq_len) { - if (is_allocate_buffer_ == true) { - allocator_->free(token_num_); - allocator_->free(padding_offset_); - allocator_->free(trt_mha_padding_offset_); - - allocator_->free(attention_mask_); - allocator_->free(bert_in_buffer_); - allocator_->free(attn_out_buf_); - allocator_->free(bert_out_buffer_); + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + token_num_ = (size_t*)allocator_->reMalloc(token_num_, sizeof(size_t) * 1, false); + padding_offset_ = (int*)allocator_->reMalloc(padding_offset_, sizeof(int) * batch_size * seq_len, false); + trt_mha_padding_offset_ = + (int*)allocator_->reMalloc(trt_mha_padding_offset_, sizeof(int) * (2 * batch_size + 1), false); + + attention_mask_ = (T*)allocator_->reMalloc(attention_mask_, sizeof(T) * batch_size * seq_len * seq_len, false); + + bert_in_buffer_ = + (T*)allocator_->reMalloc(bert_in_buffer_, sizeof(T) * batch_size * seq_len * head_num_ * size_per_head_, false); + attn_out_buf_ = (T*)allocator_->reMalloc(attn_out_buf_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + bert_out_buffer_ = (T*)allocator_->reMalloc( + bert_out_buffer_, sizeof(T) * batch_size * seq_len * head_num_ * size_per_head_, false); + + if (layernorm_type_ == LayerNormType::post_layernorm) { + normed_from_tensor_ = nullptr; + normed_attn_out_buf_ = nullptr; + } + else { + normed_from_tensor_ = + (T*)allocator_->reMalloc(normed_from_tensor_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + normed_attn_out_buf_ = + (T*)allocator_->reMalloc(normed_attn_out_buf_, sizeof(T) * batch_size * seq_len * hidden_units_, false); + } +} - if (layernorm_type_ == LayerNormType::post_layernorm) { - normed_from_tensor_ = nullptr; - normed_attn_out_buf_ = nullptr; - } - else { - allocator_->free(normed_from_tensor_); - allocator_->free(normed_attn_out_buf_); - } - is_allocate_buffer_ = false; +template +void Bert::freeBuffer() +{ + allocator_->free(token_num_); + allocator_->free(padding_offset_); + allocator_->free(trt_mha_padding_offset_); + + allocator_->free(attention_mask_); + allocator_->free(bert_in_buffer_); + allocator_->free(attn_out_buf_); + allocator_->free(bert_out_buffer_); + + if (layernorm_type_ == LayerNormType::post_layernorm) { + normed_from_tensor_ = nullptr; + normed_attn_out_buf_ = nullptr; + } + else { + allocator_->free(normed_from_tensor_); + allocator_->free(normed_attn_out_buf_); } } @@ -215,7 +242,7 @@ void Bert::forward(std::vector* output_tensors, FT_CHECK(request_batch_size == input_tensors->at(1).shape[0]); FT_CHECK(input_tensors->at(0).shape.size() == 3); FT_CHECK(input_tensors->at(1).shape.size() == 1); - allocateBuffer(); + allocateBuffer(request_batch_size, request_seq_len); const int* sequence_lengths = reinterpret_cast(input_tensors->at(1).data); @@ -446,25 +473,19 @@ void Bert::forward(std::vector* output_tensors, template bool Bert::isValidBatchSize(size_t batch_size) { - if (max_batch_size_ == 0) { + if (max_batch_size_ < batch_size) { max_batch_size_ = batch_size; - return true; - } - else { - return batch_size <= max_batch_size_; } + return true; } template bool Bert::isValidSeqLen(size_t seq_len) { - if (max_seq_len_ == 0) { + if (max_seq_len_ < seq_len) { max_seq_len_ = seq_len; - return true; - } - else { - return seq_len <= max_seq_len_; } + return true; } template class Bert; diff --git a/src/fastertransformer/models/bert/Bert.h b/src/fastertransformer/models/bert/Bert.h index b03c52031..f18edaff7 100644 --- a/src/fastertransformer/models/bert/Bert.h +++ b/src/fastertransformer/models/bert/Bert.h @@ -59,18 +59,20 @@ class Bert: public BaseLayer { const ActivationType activation_type_; const LayerNormType layernorm_type_; + void allocateBuffer(size_t batch_size, size_t seq_len); + protected: // model params - size_t* token_num_; - int* padding_offset_; - int* trt_mha_padding_offset_; - T* attention_mask_; - T* bert_in_buffer_; - T* attn_out_buf_; - T* bert_out_buffer_; - - T* normed_from_tensor_; - T* normed_attn_out_buf_; + size_t* token_num_ = nullptr; + int* padding_offset_ = nullptr; + int* trt_mha_padding_offset_ = nullptr; + T* attention_mask_ = nullptr; + T* bert_in_buffer_ = nullptr; + T* attn_out_buf_ = nullptr; + T* bert_out_buffer_ = nullptr; + + T* normed_from_tensor_ = nullptr; + T* normed_attn_out_buf_ = nullptr; public: Bert(size_t max_batch_size, diff --git a/src/fastertransformer/models/bert/BertLayerWeight.h b/src/fastertransformer/models/bert/BertLayerWeight.h index 0eaafa5d6..9c05c2223 100644 --- a/src/fastertransformer/models/bert/BertLayerWeight.h +++ b/src/fastertransformer/models/bert/BertLayerWeight.h @@ -17,10 +17,10 @@ #pragma once #include "src/fastertransformer/kernels/layernorm_kernels.h" -#include "src/fastertransformer/layers/attention_layers/AttentionWeight.h" #include "src/fastertransformer/layers/FfnWeight.h" -#include "src/fastertransformer/utils/memory_utils.h" +#include "src/fastertransformer/layers/attention_layers/AttentionWeight.h" #include "src/fastertransformer/utils/cublasMMWrapper.h" +#include "src/fastertransformer/utils/memory_utils.h" namespace fastertransformer { @@ -28,8 +28,7 @@ template struct BertLayerWeight { BertLayerWeight() = default; - BertLayerWeight(const int hidden_units, const int inter_size): - hidden_units_(hidden_units), inter_size_(inter_size) + BertLayerWeight(const int hidden_units, const int inter_size): hidden_units_(hidden_units), inter_size_(inter_size) { deviceMalloc(&weights_ptr[0], hidden_units_ * hidden_units_); deviceMalloc(&weights_ptr[1], hidden_units_); @@ -54,7 +53,7 @@ struct BertLayerWeight { ~BertLayerWeight() { if (is_maintain_buffer == true) { - for(int i = 0; i < 16; i++){ + for (int i = 0; i < 16; i++) { deviceFree(weights_ptr[i]); } @@ -77,7 +76,7 @@ struct BertLayerWeight { is_maintain_buffer = false; } if (is_maintain_sp_buffer == true) { - for(int i = 0; i < 6; i++){ + for (int i = 0; i < 6; i++) { deviceFree(sp_weights_ptr[i]); } attention_weights.query_weight.sp_kernel = nullptr; @@ -178,30 +177,14 @@ struct BertLayerWeight { deviceMalloc(&sp_weights_ptr[3], hidden_dim * hidden_dim); deviceMalloc(&sp_weights_ptr[4], hidden_dim * inter_size); deviceMalloc(&sp_weights_ptr[5], inter_size * hidden_dim); - cublas_wrapper.compressMatrix(attention_weights.query_weight.kernel, - sp_weights_ptr[0], - hidden_dim, - hidden_dim); - cublas_wrapper.compressMatrix(attention_weights.key_weight.kernel, - sp_weights_ptr[1], - hidden_dim, - hidden_dim); - cublas_wrapper.compressMatrix(attention_weights.value_weight.kernel, - sp_weights_ptr[2], - hidden_dim, - hidden_dim); - cublas_wrapper.compressMatrix(attention_weights.attention_output_weight.kernel, - sp_weights_ptr[3], - hidden_dim, - hidden_dim); - cublas_wrapper.compressMatrix(ffn_weights.intermediate_weight.kernel, - sp_weights_ptr[4], - inter_size, - hidden_dim); - cublas_wrapper.compressMatrix(ffn_weights.output_weight.kernel, - sp_weights_ptr[5], - hidden_dim, - inter_size); + cublas_wrapper.compressMatrix(attention_weights.query_weight.kernel, sp_weights_ptr[0], hidden_dim, hidden_dim); + cublas_wrapper.compressMatrix(attention_weights.key_weight.kernel, sp_weights_ptr[1], hidden_dim, hidden_dim); + cublas_wrapper.compressMatrix(attention_weights.value_weight.kernel, sp_weights_ptr[2], hidden_dim, hidden_dim); + cublas_wrapper.compressMatrix( + attention_weights.attention_output_weight.kernel, sp_weights_ptr[3], hidden_dim, hidden_dim); + cublas_wrapper.compressMatrix( + ffn_weights.intermediate_weight.kernel, sp_weights_ptr[4], inter_size, hidden_dim); + cublas_wrapper.compressMatrix(ffn_weights.output_weight.kernel, sp_weights_ptr[5], hidden_dim, inter_size); attention_weights.query_weight.sp_kernel = sp_weights_ptr[0]; attention_weights.key_weight.sp_kernel = sp_weights_ptr[1]; attention_weights.value_weight.sp_kernel = sp_weights_ptr[2]; diff --git a/src/fastertransformer/models/bert/CMakeLists.txt b/src/fastertransformer/models/bert/CMakeLists.txt index c64452c24..57611b5fd 100644 --- a/src/fastertransformer/models/bert/CMakeLists.txt +++ b/src/fastertransformer/models/bert/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/bert/bert_gemm.cc b/src/fastertransformer/models/bert/bert_gemm.cc index c20a06870..a2f4a9f0a 100644 --- a/src/fastertransformer/models/bert/bert_gemm.cc +++ b/src/fastertransformer/models/bert/bert_gemm.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -23,7 +23,7 @@ namespace ft = fastertransformer; int main(int argc, char* argv[]) { if (argc != 7) { - printf("[ERROR] bert_gemm batch_size seq_len head_number size_per_head is_fp16 int8_mode \n"); + printf("[ERROR] bert_gemm batch_size seq_len head_number size_per_head data_type int8_mode \n"); printf("e.g. ./bin/bert_gemm 1 32 12 64 0 0\n"); return 0; } @@ -32,7 +32,7 @@ int main(int argc, char* argv[]) const int seq_len = atoi(argv[2]); const int head_num = atoi(argv[3]); const int size_per_head = atoi(argv[4]); - const int is_fp16 = atoi(argv[5]); + const ft::CublasDataType data_type = static_cast(atoi(argv[5])); // 0 FP32, 1 FP16, 2 BF 16 const int int8_mode = atoi(argv[6]); const int inter_size = 4 * head_num * size_per_head; @@ -41,13 +41,13 @@ int main(int argc, char* argv[]) printf(" batch_size: %d \n", batch_size); printf(" head_num: %d \n", head_num); printf(" size_per_head: %d \n", size_per_head); - printf(" is_fp16: %d \n", is_fp16); + printf(" data_type: %d \n", data_type); printf(" int8_mode: %d \n", int8_mode); std::cout << std::endl; void* gemm_test_buf; - size_t buf_size_in_byte = ft::calGemmTestBufSizeInByte( - batch_size, seq_len, head_num, size_per_head, inter_size, 0, int8_mode, is_fp16); + size_t buf_size_in_byte = + ft::calGemmTestBufSizeInByte(batch_size, seq_len, head_num, size_per_head, inter_size, 0, int8_mode, data_type); size_t total, free; ft::check_cuda_error(cudaMemGetInfo(&free, &total)); if (free < buf_size_in_byte + 10 * 1024 * 1024) { @@ -65,14 +65,20 @@ int main(int argc, char* argv[]) if (int8_mode != 0) { ft::generate_encoder_igemm_config(batch_size, seq_len, head_num, size_per_head, gemm_test_buf, false); } - else if (is_fp16 == 0) { + else if (data_type == ft::FLOAT_DATATYPE) { ft::generate_encoder_gemm_config(batch_size, seq_len, head_num, size_per_head, gemm_test_buf, false); } - else if (is_fp16 == 1) { + else if (data_type == ft::HALF_DATATYPE) { ft::generate_encoder_gemm_config(batch_size, seq_len, head_num, size_per_head, gemm_test_buf, false); } +#ifdef ENABLE_BF16 + else if (data_type == ft::BFLOAT16_DATATYPE) { + ft::generate_encoder_gemm_config<__nv_bfloat16>( + batch_size, seq_len, head_num, size_per_head, gemm_test_buf, false); + } +#endif else { - printf("[ERROR] is_fp16 should be 0 (use float) or 1 (use half). \n"); + printf("[ERROR] data type only supports fp32(0), fp16(1), bf16(2). \n"); return -1; } diff --git a/src/fastertransformer/models/bert_int8/BertINT8.cc b/src/fastertransformer/models/bert_int8/BertINT8.cc index 36d825334..7c6347bcf 100644 --- a/src/fastertransformer/models/bert_int8/BertINT8.cc +++ b/src/fastertransformer/models/bert_int8/BertINT8.cc @@ -51,20 +51,16 @@ BertINT8::BertINT8(size_t max_batch_size, attention_type_(attention_type), sparse_(sparse) { - if (int8_mode_ != 1 && int8_mode_ != 2 && int8_mode_ != 3) - { - throw std::runtime_error( - std::string("[FT][ERROR] int8_mode_ not support \n")); + if (int8_mode_ != 1 && int8_mode_ != 2 && int8_mode_ != 3) { + throw std::runtime_error(std::string("[FT][ERROR] int8_mode_ not support \n")); } if (sparse_ && int8_mode_ == 1) { - throw std::runtime_error( - std::string("[FT][ERROR] int8_mode 1 does not support sparsity \n")); + throw std::runtime_error(std::string("[FT][ERROR] int8_mode 1 does not support sparsity \n")); + } + if (int8_mode_ == 1 && max_seq_len_ > 384 && (max_seq_len_ % 32 != 0)) { + throw std::runtime_error(std::string( + "[FT][ERROR] max_seq_len_ should be a multiple of 32 when int8_mode == 1 && max_seq_len_ > 384\n")); } - if (int8_mode_ == 1 && max_seq_len_ > 384 && (max_seq_len_ % 32 != 0)) - { - throw std::runtime_error( - std::string("[FT][ERROR] max_seq_len_ should be a multiple of 32 when int8_mode == 1 && max_seq_len_ > 384\n")); - } bert_layer_ = new BertLayerINT8(max_batch_size_, max_seq_len_, head_num_, @@ -277,14 +273,9 @@ void BertINT8::forward(std::vector* output_tensors, std::vector{request_batch_size, 1, request_seq_len, request_seq_len}, attention_mask_}, *padding_offset_tensor_ptr, - Tensor{MEMORY_CPU, - TYPE_INT32, - std::vector{1}, - layer_idx_ptr}, - Tensor{MEMORY_CPU, - TYPE_INT32, - std::vector{1}, - num_layer_ptr},}; + Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, layer_idx_ptr}, + Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, num_layer_ptr}, + }; bert_layer_->forward(&tmp_output_tensors, &tmp_input_tensors, &bert_layer_weights->at(i)); } diff --git a/src/fastertransformer/models/bert_int8/BertINT8.h b/src/fastertransformer/models/bert_int8/BertINT8.h index 40a04e15f..2bdd73376 100644 --- a/src/fastertransformer/models/bert_int8/BertINT8.h +++ b/src/fastertransformer/models/bert_int8/BertINT8.h @@ -77,7 +77,7 @@ class BertINT8 { IAllocator* allocator, bool is_free_buffer_after_forward, AttentionType attention_type, - bool sparse=false); + bool sparse = false); BertINT8(BertINT8 const& bert_layer); diff --git a/src/fastertransformer/models/bert_int8/BertLayerINT8.cc b/src/fastertransformer/models/bert_int8/BertLayerINT8.cc index da3663610..b831cdf04 100644 --- a/src/fastertransformer/models/bert_int8/BertLayerINT8.cc +++ b/src/fastertransformer/models/bert_int8/BertLayerINT8.cc @@ -21,7 +21,7 @@ namespace fastertransformer { template void BertLayerINT8::initialize() { - if ((attention_type_ == AttentionType::FUSED_MHA || attention_type_ == AttentionType::FUSED_PADDED_MHA) + if ((attention_type_ == AttentionType::FUSED_MHA || attention_type_ == AttentionType::FUSED_PADDED_MHA) && max_seq_len_ <= 384) { attention_layer_ = new FusedAttentionLayerINT8(max_batch_size_, max_seq_len_, @@ -91,7 +91,8 @@ BertLayerINT8::BertLayerINT8(size_t max_batch_size, hidden_units_(head_num_ * size_per_head), attention_type_(attention_type), int8_mode_(int8_mode), - sparse_(sparse) { + sparse_(sparse) +{ initialize(); } @@ -111,7 +112,8 @@ BertLayerINT8::BertLayerINT8(BertLayerINT8 const& bert_layer): hidden_units_(bert_layer.hidden_units_), attention_type_(bert_layer.attention_type_), int8_mode_(bert_layer.int8_mode_), - sparse_(bert_layer.sparse_) { + sparse_(bert_layer.sparse_) +{ initialize(); } @@ -127,20 +129,20 @@ template void BertLayerINT8::allocateBuffer() { if (is_allocate_buffer_ == false) { - attn_out_buf_ = - reinterpret_cast(allocator_->malloc(sizeof(int32_t) * max_batch_size_ * max_seq_len_ * hidden_units_, false)); - - int8_buf_ = - reinterpret_cast(allocator_->malloc(sizeof(int8_t) * max_batch_size_ * max_seq_len_ * hidden_units_, false)); - - layer_norm_tmp_buf_ = - reinterpret_cast(allocator_->malloc(sizeof(T) * max_batch_size_ * max_seq_len_ * hidden_units_, false)); - - transformer_out_tmp_DataType_ = - reinterpret_cast(allocator_->malloc(sizeof(T) * max_batch_size_ * max_seq_len_ * hidden_units_, false)); - - //re-use transformer_out_tmp_DataType_ as col32_from_tensor_ - col32_from_tensor_ = transformer_out_tmp_DataType_; + attn_out_buf_ = reinterpret_cast( + allocator_->malloc(sizeof(int32_t) * max_batch_size_ * max_seq_len_ * hidden_units_, false)); + + int8_buf_ = reinterpret_cast( + allocator_->malloc(sizeof(int8_t) * max_batch_size_ * max_seq_len_ * hidden_units_, false)); + + layer_norm_tmp_buf_ = + reinterpret_cast(allocator_->malloc(sizeof(T) * max_batch_size_ * max_seq_len_ * hidden_units_, false)); + + transformer_out_tmp_DataType_ = + reinterpret_cast(allocator_->malloc(sizeof(T) * max_batch_size_ * max_seq_len_ * hidden_units_, false)); + + // re-use transformer_out_tmp_DataType_ as col32_from_tensor_ + col32_from_tensor_ = transformer_out_tmp_DataType_; is_allocate_buffer_ = true; } } @@ -157,10 +159,10 @@ void BertLayerINT8::freeBuffer() } } -//for layer_idx == 0, the data_type of input should be T, we need to quantize the input; -//for layer_idx == 0, the layout of input should be row-major, we need to transform the input; -//for layer_idx != 0, the data_type of input should be int8 for int8_mode=2/3, and T for int8_mode=1 (we need to quantize for int8_mode=1); -//for layer_idx != 0, the layout of input should be COL32. +// for layer_idx == 0, the data_type of input should be T, we need to quantize the input; +// for layer_idx == 0, the layout of input should be row-major, we need to transform the input; +// for layer_idx != 0, the data_type of input should be int8 for int8_mode=2/3, and T for int8_mode=1 (we need to +// quantize for int8_mode=1); for layer_idx != 0, the layout of input should be COL32. template void BertLayerINT8::forward(std::vector* output_tensors, @@ -169,7 +171,7 @@ void BertLayerINT8::forward(std::vector* output_tensors, { const BertLayerINT8Weight* bert_layer_int8_weight = (const BertLayerINT8Weight*)bert_layer_weight; const ScaleList* scale_list = &(bert_layer_int8_weight->scale_list_); - + // input_tensors: [input_query (token_num, hidden_dimension), // attention_mask (batch, 1, seqlen, seqlen), // padding_offset (token_num), @@ -198,173 +200,202 @@ void BertLayerINT8::forward(std::vector* output_tensors, std::vector attn_output_tensors{ Tensor{MEMORY_GPU, getTensorType(), std::vector{m, n}, attn_out_buf_}, }; - + if (int8_mode_ == 1) { - + if (layer_idx == 0) { invokeTransposeMatrixColMajorToCOL32(col32_from_tensor_, from_tensor, n, m, stream_); from_tensor = col32_from_tensor_; } - invokeQuantization(int8_buf_, from_tensor, m*n, &(scale_list->d_scale_list_[3]), stream_); - std::vector int8_input_tensors{ - Tensor{MEMORY_GPU, - TYPE_INT8, - std::vector{m, n}, - int8_buf_}, - input_tensors->at(1), - input_tensors->at(2)}; - attention_layer_->forward(&attn_output_tensors, &int8_input_tensors, &bert_layer_int8_weight->attention_weights); - //int32 I ; DataType O - - invokeAddBiasResidualLayerNormCol32(layer_norm_tmp_buf_, attn_out_buf_, from_tensor, - bert_layer_int8_weight->attention_weights.attention_output_weight.bias, - bert_layer_int8_weight->attn_layernorm_weights.gamma, - bert_layer_int8_weight->attn_layernorm_weights.beta, - m, n, stream_, &(scale_list->d_scale_list_[scale_list->p2_offset_ + 3*hidden_units_]), + invokeQuantization(int8_buf_, from_tensor, m * n, &(scale_list->d_scale_list_[3]), stream_); + std::vector int8_input_tensors{Tensor{MEMORY_GPU, TYPE_INT8, std::vector{m, n}, int8_buf_}, + input_tensors->at(1), + input_tensors->at(2)}; + attention_layer_->forward( + &attn_output_tensors, &int8_input_tensors, &bert_layer_int8_weight->attention_weights); + // int32 I ; DataType O + + invokeAddBiasResidualLayerNormCol32(layer_norm_tmp_buf_, + attn_out_buf_, + from_tensor, + bert_layer_int8_weight->attention_weights.attention_output_weight.bias, + bert_layer_int8_weight->attn_layernorm_weights.gamma, + bert_layer_int8_weight->attn_layernorm_weights.beta, + m, + n, + stream_, + &(scale_list->d_scale_list_[scale_list->p2_offset_ + 3 * hidden_units_]), &(scale_list->d_scale_list_[36])); - invokeQuantization(int8_buf_, layer_norm_tmp_buf_, m*n, &(scale_list->d_scale_list_[44 + 3]), stream_); - std::vector ffn_input_tensors{ - Tensor{MEMORY_GPU, - TYPE_INT8, - std::vector{m, n}, - int8_buf_}}; - //reuse attn_output_tensors as ffn_output_tensors + invokeQuantization(int8_buf_, layer_norm_tmp_buf_, m * n, &(scale_list->d_scale_list_[44 + 3]), stream_); + std::vector ffn_input_tensors{Tensor{MEMORY_GPU, TYPE_INT8, std::vector{m, n}, int8_buf_}}; + // reuse attn_output_tensors as ffn_output_tensors ffn_layer_->forward(&attn_output_tensors, &ffn_input_tensors, &bert_layer_int8_weight->ffn_weights); if (layer_idx != num_layer - 1) { - //int32 I ; DataType O - invokeAddBiasResidualLayerNormCol32(out_tensor, attn_out_buf_, layer_norm_tmp_buf_, - bert_layer_int8_weight->ffn_weights.output_weight.bias, - bert_layer_int8_weight->ffn_layernorm_weights.gamma, - bert_layer_int8_weight->ffn_layernorm_weights.beta, - m, n, stream_, - &(scale_list->d_scale_list_[scale_list->p2_offset_ + 8*hidden_units_]), - &(scale_list->d_scale_list_[52])); + // int32 I ; DataType O + invokeAddBiasResidualLayerNormCol32( + out_tensor, + attn_out_buf_, + layer_norm_tmp_buf_, + bert_layer_int8_weight->ffn_weights.output_weight.bias, + bert_layer_int8_weight->ffn_layernorm_weights.gamma, + bert_layer_int8_weight->ffn_layernorm_weights.beta, + m, + n, + stream_, + &(scale_list->d_scale_list_[scale_list->p2_offset_ + 8 * hidden_units_]), + &(scale_list->d_scale_list_[52])); } else { - //int32 I ; DataType O - invokeAddBiasResidualLayerNormCol32(transformer_out_tmp_DataType_, attn_out_buf_, layer_norm_tmp_buf_, - bert_layer_int8_weight->ffn_weights.output_weight.bias, - bert_layer_int8_weight->ffn_layernorm_weights.gamma, - bert_layer_int8_weight->ffn_layernorm_weights.beta, - m, n, stream_, - &(scale_list->d_scale_list_[scale_list->p2_offset_ + 8*hidden_units_]), - &(scale_list->d_scale_list_[52])); - + // int32 I ; DataType O + invokeAddBiasResidualLayerNormCol32( + transformer_out_tmp_DataType_, + attn_out_buf_, + layer_norm_tmp_buf_, + bert_layer_int8_weight->ffn_weights.output_weight.bias, + bert_layer_int8_weight->ffn_layernorm_weights.gamma, + bert_layer_int8_weight->ffn_layernorm_weights.beta, + m, + n, + stream_, + &(scale_list->d_scale_list_[scale_list->p2_offset_ + 8 * hidden_units_]), + &(scale_list->d_scale_list_[52])); + invokeTransposeMatrixCOL32ToColMajor(out_tensor, transformer_out_tmp_DataType_, m, n, stream_); } - } + } else if (int8_mode_ == 2 || int8_mode_ == 3) { - + if (layer_idx == 0) { #ifdef SPARSITY_ENABLED if (sparse_) { invokeQuantization(int8_buf_, from_tensor, m * n, &(scale_list->d_scale_list_[3]), stream_); - } else { + } + else { #endif - invokeTransposeMatrixColMajorToCOL32Quantize(int8_buf_, from_tensor, n, m, &(scale_list->d_scale_list_[3]), stream_); + invokeTransposeMatrixColMajorToCOL32Quantize( + int8_buf_, from_tensor, n, m, &(scale_list->d_scale_list_[3]), stream_); #ifdef SPARSITY_ENABLED } #endif - std::vector int8_input_tensors{ - Tensor{MEMORY_GPU, - TYPE_INT8, - std::vector{m, n}, - int8_buf_}, - input_tensors->at(1), - input_tensors->at(2)}; - attention_layer_->forward(&attn_output_tensors, &int8_input_tensors, &bert_layer_int8_weight->attention_weights); + std::vector int8_input_tensors{Tensor{MEMORY_GPU, TYPE_INT8, std::vector{m, n}, int8_buf_}, + input_tensors->at(1), + input_tensors->at(2)}; + attention_layer_->forward( + &attn_output_tensors, &int8_input_tensors, &bert_layer_int8_weight->attention_weights); } else { attention_layer_->forward(&attn_output_tensors, input_tensors, &bert_layer_int8_weight->attention_weights); } - - const int8_t *residual = layer_idx == 0 ? int8_buf_ : (const int8_t*)from_tensor; - //int8 IO + + const int8_t* residual = layer_idx == 0 ? int8_buf_ : (const int8_t*)from_tensor; + // int8 IO #ifdef SPARSITY_ENABLED if (sparse_) { - invokeAddBiasResidualLayerNormRow((int8_t*)layer_norm_tmp_buf_, (const int8_t*)attn_out_buf_, - residual, + invokeAddBiasResidualLayerNormRow((int8_t*)layer_norm_tmp_buf_, + (const int8_t*)attn_out_buf_, + residual, bert_layer_int8_weight->attention_weights.attention_output_weight.bias, - bert_layer_int8_weight->attn_layernorm_weights.gamma, + bert_layer_int8_weight->attn_layernorm_weights.gamma, bert_layer_int8_weight->attn_layernorm_weights.beta, - m, n, stream_, &(scale_list->d_scale_list_[40 + 1]), - &(scale_list->d_scale_list_[0 + 1]), + m, + n, + stream_, + &(scale_list->d_scale_list_[40 + 1]), + &(scale_list->d_scale_list_[0 + 1]), &(scale_list->d_scale_list_[44 + 3])); - } else { + } + else { #endif - invokeAddBiasResidualLayerNormCol32((int8_t*)layer_norm_tmp_buf_, (const int8_t*)attn_out_buf_, - residual, - bert_layer_int8_weight->attention_weights.attention_output_weight.bias, - bert_layer_int8_weight->attn_layernorm_weights.gamma, - bert_layer_int8_weight->attn_layernorm_weights.beta, - m, n, stream_, &(scale_list->d_scale_list_[40 + 1]), - &(scale_list->d_scale_list_[0 + 1]), - &(scale_list->d_scale_list_[44 + 3])); + invokeAddBiasResidualLayerNormCol32((int8_t*)layer_norm_tmp_buf_, + (const int8_t*)attn_out_buf_, + residual, + bert_layer_int8_weight->attention_weights.attention_output_weight.bias, + bert_layer_int8_weight->attn_layernorm_weights.gamma, + bert_layer_int8_weight->attn_layernorm_weights.beta, + m, + n, + stream_, + &(scale_list->d_scale_list_[40 + 1]), + &(scale_list->d_scale_list_[0 + 1]), + &(scale_list->d_scale_list_[44 + 3])); #ifdef SPARSITY_ENABLED } #endif std::vector ffn_input_tensors{ - Tensor{MEMORY_GPU, - TYPE_INT8, - std::vector{m, n}, - layer_norm_tmp_buf_}}; - //reuse attn_output_tensors as ffn_output_tensors + Tensor{MEMORY_GPU, TYPE_INT8, std::vector{m, n}, layer_norm_tmp_buf_}}; + // reuse attn_output_tensors as ffn_output_tensors ffn_layer_->forward(&attn_output_tensors, &ffn_input_tensors, &bert_layer_int8_weight->ffn_weights); - if (layer_idx != num_layer - 1) - { - //int8 IO + if (layer_idx != num_layer - 1) { + // int8 IO #ifdef SPARSITY_ENABLED if (sparse_) { - invokeAddBiasResidualLayerNormRow((int8_t*)out_tensor, (int8_t*)attn_out_buf_, (int8_t*)layer_norm_tmp_buf_, + invokeAddBiasResidualLayerNormRow((int8_t*)out_tensor, + (int8_t*)attn_out_buf_, + (int8_t*)layer_norm_tmp_buf_, + bert_layer_int8_weight->ffn_weights.output_weight.bias, + bert_layer_int8_weight->ffn_layernorm_weights.gamma, + bert_layer_int8_weight->ffn_layernorm_weights.beta, + m, + n, + stream_, + &(scale_list->d_scale_list_[56 + 1]), + &(scale_list->d_scale_list_[44 + 1]), + &(scale_list->d_scale_list_[60 + 3])); + } + else { +#endif + invokeAddBiasResidualLayerNormCol32((int8_t*)out_tensor, + (int8_t*)attn_out_buf_, + (int8_t*)layer_norm_tmp_buf_, bert_layer_int8_weight->ffn_weights.output_weight.bias, bert_layer_int8_weight->ffn_layernorm_weights.gamma, - bert_layer_int8_weight->ffn_layernorm_weights.beta, - m, n, stream_, - &(scale_list->d_scale_list_[56 + 1]), - &(scale_list->d_scale_list_[44 + 1]), + bert_layer_int8_weight->ffn_layernorm_weights.beta, + m, + n, + stream_, + &(scale_list->d_scale_list_[56 + 1]), + &(scale_list->d_scale_list_[44 + 1]), &(scale_list->d_scale_list_[60 + 3])); - } else { -#endif - invokeAddBiasResidualLayerNormCol32((int8_t*)out_tensor, (int8_t*)attn_out_buf_, (int8_t*)layer_norm_tmp_buf_, - bert_layer_int8_weight->ffn_weights.output_weight.bias, - bert_layer_int8_weight->ffn_layernorm_weights.gamma, - bert_layer_int8_weight->ffn_layernorm_weights.beta, - m, n, stream_, - &(scale_list->d_scale_list_[56 + 1]), - &(scale_list->d_scale_list_[44 + 1]), - &(scale_list->d_scale_list_[60 + 3])); #ifdef SPARSITY_ENABLED } #endif } - else - { + else { #ifdef SPARSITY_ENABLED if (sparse_) { - invokeAddBiasResidualLayerNormRow(out_tensor, (int8_t*)attn_out_buf_, (int8_t*)layer_norm_tmp_buf_, + invokeAddBiasResidualLayerNormRow(out_tensor, + (int8_t*)attn_out_buf_, + (int8_t*)layer_norm_tmp_buf_, bert_layer_int8_weight->ffn_weights.output_weight.bias, bert_layer_int8_weight->ffn_layernorm_weights.gamma, - bert_layer_int8_weight->ffn_layernorm_weights.beta, - m, n, stream_, - &(scale_list->d_scale_list_[56 + 1]), + bert_layer_int8_weight->ffn_layernorm_weights.beta, + m, + n, + stream_, + &(scale_list->d_scale_list_[56 + 1]), &(scale_list->d_scale_list_[44 + 1])); - } else { + } + else { #endif - //int8 I ; DataType O - invokeAddBiasResidualLayerNormCol32(transformer_out_tmp_DataType_, (int8_t*)attn_out_buf_, (int8_t*)layer_norm_tmp_buf_, - bert_layer_int8_weight->ffn_weights.output_weight.bias, - bert_layer_int8_weight->ffn_layernorm_weights.gamma, - bert_layer_int8_weight->ffn_layernorm_weights.beta, - m, n, stream_, - &(scale_list->d_scale_list_[56 + 1]), - &(scale_list->d_scale_list_[44 + 1])); - - invokeTransposeMatrixCOL32ToColMajor(out_tensor, transformer_out_tmp_DataType_, m, n, stream_); + // int8 I ; DataType O + invokeAddBiasResidualLayerNormCol32(transformer_out_tmp_DataType_, + (int8_t*)attn_out_buf_, + (int8_t*)layer_norm_tmp_buf_, + bert_layer_int8_weight->ffn_weights.output_weight.bias, + bert_layer_int8_weight->ffn_layernorm_weights.gamma, + bert_layer_int8_weight->ffn_layernorm_weights.beta, + m, + n, + stream_, + &(scale_list->d_scale_list_[56 + 1]), + &(scale_list->d_scale_list_[44 + 1])); + + invokeTransposeMatrixCOL32ToColMajor(out_tensor, transformer_out_tmp_DataType_, m, n, stream_); #ifdef SPARSITY_ENABLED } #endif } - } + } sync_check_cuda_error(); if (is_free_buffer_after_forward_ == true) { diff --git a/src/fastertransformer/models/bert_int8/BertLayerINT8.h b/src/fastertransformer/models/bert_int8/BertLayerINT8.h index 31983104d..ed90f13b7 100644 --- a/src/fastertransformer/models/bert_int8/BertLayerINT8.h +++ b/src/fastertransformer/models/bert_int8/BertLayerINT8.h @@ -18,16 +18,16 @@ #include -#include "src/fastertransformer/models/bert_int8/BertLayerINT8Weight.h" #include "src/fastertransformer/kernels/layernorm_int8_kernels.h" #include "src/fastertransformer/kernels/layout_transformer_int8_kernels.h" #include "src/fastertransformer/kernels/quantization_int8_kernels.h" #include "src/fastertransformer/layers/FfnLayerINT8.h" #include "src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.h" #include "src/fastertransformer/layers/attention_layers_int8/UnfusedAttentionLayerINT8.h" +#include "src/fastertransformer/models/bert_int8/BertLayerINT8Weight.h" +#include "src/fastertransformer/utils/ScaleList.h" #include "src/fastertransformer/utils/Tensor.h" #include "src/fastertransformer/utils/allocator.h" -#include "src/fastertransformer/utils/ScaleList.h" namespace fastertransformer { @@ -80,7 +80,7 @@ class BertLayerINT8: public BaseLayer { IAllocator* allocator, bool is_free_buffer_after_forward, AttentionType attention_type = AttentionType::UNFUSED_PADDED_MHA, - bool sparse=false); + bool sparse = false); BertLayerINT8(BertLayerINT8 const& bert_layer); diff --git a/src/fastertransformer/models/bert_int8/BertLayerINT8Weight.h b/src/fastertransformer/models/bert_int8/BertLayerINT8Weight.h index 41622dbe4..aeef861a0 100644 --- a/src/fastertransformer/models/bert_int8/BertLayerINT8Weight.h +++ b/src/fastertransformer/models/bert_int8/BertLayerINT8Weight.h @@ -16,23 +16,23 @@ #pragma once -#include "src/fastertransformer/models/bert/BertLayerWeight.h" #include "src/fastertransformer/layers/FfnINT8Weight.h" #include "src/fastertransformer/layers/attention_layers_int8/AttentionINT8Weight.h" +#include "src/fastertransformer/models/bert/BertLayerWeight.h" #include "src/fastertransformer/utils/memory_utils.h" namespace fastertransformer { template -struct BertLayerINT8Weight : BertLayerWeight { +struct BertLayerINT8Weight: BertLayerWeight { BertLayerINT8Weight() = default; BertLayerINT8Weight(const int hidden_units, const int inter_size): - hidden_units_(hidden_units), - inter_size_(inter_size) { - - deviceMalloc(&weights_ptr[0], hidden_units_ * hidden_units_ * 3); // fuse kernel of qkv - deviceMalloc(&weights_ptr[1], hidden_units_ * 3); // fuse bias of qkv + hidden_units_(hidden_units), inter_size_(inter_size) + { + + deviceMalloc(&weights_ptr[0], hidden_units_ * hidden_units_ * 3); // fuse kernel of qkv + deviceMalloc(&weights_ptr[1], hidden_units_ * 3); // fuse bias of qkv deviceMalloc(&weights_ptr[2], hidden_units_ * hidden_units_); deviceMalloc(&weights_ptr[3], hidden_units_); deviceMalloc(&weights_ptr[4], hidden_units_); @@ -42,24 +42,24 @@ struct BertLayerINT8Weight : BertLayerWeight { deviceMalloc(&weights_ptr[8], inter_size_ * hidden_units_); deviceMalloc(&weights_ptr[9], hidden_units_); deviceMalloc(&weights_ptr[10], hidden_units_); - deviceMalloc(&weights_ptr[11], hidden_units_); - - scale_list_.size_ = ACTIVATION_AMAX_NUM + 9*hidden_units + INT8O_GEMM_NUM + TRT_AMAX_NUM + SCALE_RESERVE_NUM; - scale_list_.p3_offset_ = ACTIVATION_AMAX_NUM + 9*hidden_units; - scale_list_.p4_offset_ = ACTIVATION_AMAX_NUM + 9*hidden_units + INT8O_GEMM_NUM; - deviceMalloc(&scale_list_ptr[0], scale_list_.size_); + deviceMalloc(&weights_ptr[11], hidden_units_); + + scale_list_.size_ = ACTIVATION_AMAX_NUM + 9 * hidden_units + INT8O_GEMM_NUM + TRT_AMAX_NUM + SCALE_RESERVE_NUM; + scale_list_.p3_offset_ = ACTIVATION_AMAX_NUM + 9 * hidden_units; + scale_list_.p4_offset_ = ACTIVATION_AMAX_NUM + 9 * hidden_units + INT8O_GEMM_NUM; + deviceMalloc(&scale_list_ptr[0], scale_list_.size_); scale_list_ptr[1] = (float*)malloc(sizeof(float) * scale_list_.size_); - + setWeightPtr(); - } - ~BertLayerINT8Weight() { + ~BertLayerINT8Weight() + { if (is_maintain_buffer == true) { - for(int i = 0; i < 12; i++){ + for (int i = 0; i < 12; i++) { deviceFree(weights_ptr[i]); } - + deviceFree(scale_list_ptr[0]); free(scale_list_ptr[1]); @@ -84,7 +84,7 @@ struct BertLayerINT8Weight : BertLayerWeight { is_maintain_buffer = false; } if (is_maintain_sp_buffer == true) { - for(int i = 0; i < 6; i++){ + for (int i = 0; i < 6; i++) { deviceFree(sp_weights_ptr[i]); } attention_weights.query_weight.sp_kernel = nullptr; @@ -97,8 +97,9 @@ struct BertLayerINT8Weight : BertLayerWeight { } } - BertLayerINT8Weight(const BertLayerINT8Weight& other): hidden_units_(other.hidden_units_), inter_size_(other.inter_size_) - { + BertLayerINT8Weight(const BertLayerINT8Weight& other): + hidden_units_(other.hidden_units_), inter_size_(other.inter_size_) + { deviceMalloc(&weights_ptr[0], hidden_units_ * hidden_units_ * 3); cudaD2Dcpy(weights_ptr[0], other.weights_ptr[0], hidden_units_ * hidden_units_ * 3); deviceMalloc(&weights_ptr[1], hidden_units_ * 3); @@ -131,14 +132,14 @@ struct BertLayerINT8Weight : BertLayerWeight { cudaD2Dcpy(scale_list_ptr[0], other.scale_list_ptr[0], scale_list_.size_); scale_list_ptr[1] = (float*)malloc(sizeof(float) * scale_list_.size_); memcpy(scale_list_ptr[1], other.scale_list_ptr[1], sizeof(float) * scale_list_.size_); - + setWeightPtr(); } BertLayerINT8Weight& operator=(const BertLayerINT8Weight& other) { - - //to be confirmed， free buffer before = + + // to be confirmed， free buffer before = /* if (is_maintain_buffer) { for(int i = 0; i < 16; i++) { @@ -148,7 +149,7 @@ struct BertLayerINT8Weight : BertLayerWeight { free(scale_list_.h_scale_list_); } */ - + hidden_units_ = other.hidden_units_; inter_size_ = other.inter_size_; deviceMalloc(&weights_ptr[0], hidden_units_ * hidden_units_ * 3); @@ -175,7 +176,7 @@ struct BertLayerINT8Weight : BertLayerWeight { cudaD2Dcpy(weights_ptr[10], other.weights_ptr[10], hidden_units_); deviceMalloc(&weights_ptr[11], hidden_units_); cudaD2Dcpy(weights_ptr[11], other.weights_ptr[11], hidden_units_); - + scale_list_.size_ = other.scale_list_.size_; scale_list_.p3_offset_ = other.scale_list_.p3_offset_; scale_list_.p4_offset_ = other.scale_list_.p4_offset_; @@ -183,7 +184,7 @@ struct BertLayerINT8Weight : BertLayerWeight { cudaD2Dcpy(scale_list_ptr[0], other.scale_list_ptr[0], scale_list_.size_); scale_list_ptr[1] = (float*)malloc(sizeof(float) * scale_list_.size_); memcpy(scale_list_ptr[1], other.scale_list_ptr[1], sizeof(float) * scale_list_.size_); - + setWeightPtr(); } @@ -194,7 +195,6 @@ struct BertLayerINT8Weight : BertLayerWeight { ScaleList scale_list_; private: - void setWeightPtr() { attention_weights.query_weight.kernel = weights_ptr[0]; @@ -226,7 +226,7 @@ struct BertLayerINT8Weight : BertLayerWeight { int inter_size_; bool is_maintain_buffer = false; T* weights_ptr[12]; - float *scale_list_ptr[2]; + float* scale_list_ptr[2]; T* sp_weights_ptr[6]; bool is_maintain_sp_buffer = false; }; diff --git a/src/fastertransformer/models/bert_int8/CMakeLists.txt b/src/fastertransformer/models/bert_int8/CMakeLists.txt index dffebbddb..47568e619 100644 --- a/src/fastertransformer/models/bert_int8/CMakeLists.txt +++ b/src/fastertransformer/models/bert_int8/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/decoder/CMakeLists.txt b/src/fastertransformer/models/decoder/CMakeLists.txt index 5bfc05197..95a4d5b2c 100644 --- a/src/fastertransformer/models/decoder/CMakeLists.txt +++ b/src/fastertransformer/models/decoder/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/decoder/Decoder.cc b/src/fastertransformer/models/decoder/Decoder.cc index 7756317ab..2826de178 100644 --- a/src/fastertransformer/models/decoder/Decoder.cc +++ b/src/fastertransformer/models/decoder/Decoder.cc @@ -68,18 +68,32 @@ void Decoder::allocateBuffer() } } +template +void Decoder::allocateBuffer(size_t batch_size) +{ + decoder_normed_input_ = + reinterpret_cast(decoder_normed_input_, allocator_->malloc(sizeof(T) * batch_size * hidden_units_, false)); + self_attn_output_ = + reinterpret_cast(self_attn_output_, allocator_->malloc(sizeof(T) * batch_size * hidden_units_, false)); + normed_self_attn_output_ = reinterpret_cast(normed_self_attn_output_, + allocator_->malloc(sizeof(T) * batch_size * hidden_units_, false)); + cross_attn_output_ = + reinterpret_cast(cross_attn_output_, allocator_->malloc(sizeof(T) * batch_size * hidden_units_, false)); + normed_cross_attn_output_ = reinterpret_cast(normed_cross_attn_output_, + allocator_->malloc(sizeof(T) * batch_size * hidden_units_, false)); + decoder_layer_output_ = + reinterpret_cast(decoder_layer_output_, allocator_->malloc(sizeof(T) * batch_size * hidden_units_, false)); +} + template void Decoder::freeBuffer() { - if (is_allocate_buffer_ == true) { - allocator_->free(decoder_normed_input_); - allocator_->free(self_attn_output_); - allocator_->free(normed_self_attn_output_); - allocator_->free(cross_attn_output_); - allocator_->free(normed_cross_attn_output_); - allocator_->free(decoder_layer_output_); - is_allocate_buffer_ = false; - } + allocator_->free(decoder_normed_input_); + allocator_->free(self_attn_output_); + allocator_->free(normed_self_attn_output_); + allocator_->free(cross_attn_output_); + allocator_->free(normed_cross_attn_output_); + allocator_->free(decoder_layer_output_); } template @@ -131,6 +145,7 @@ Decoder::Decoder(Decoder const& decoder): template Decoder::~Decoder() { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); delete self_attention_layer_; delete cross_attention_layer_; delete ffn_layer_; @@ -149,6 +164,9 @@ void Decoder::forward(std::vector* output_tensors, // finished [batch_size], // step [1] on cpu // sequence_lengths [batch_size] + // cache_indirection [local_batch_size / beam_width, beam_width, max_seq_len] + // Here, local_batch_size contains the beam_width, so local_batch_size / beam_width + // is real local_batch_size. // output tensors: // decoder_output [batch_size, hidden_dimension], @@ -157,10 +175,10 @@ void Decoder::forward(std::vector* output_tensors, // key_mem_cache [num_layer, batch_size, mem_max_seq_len, hidden_dimension], // value_mem_cache [num_layer, batch_size, mem_max_seq_len, hidden_dimension] - FT_CHECK(input_tensors->size() == 6); + FT_CHECK(input_tensors->size() == 7); FT_CHECK(output_tensors->size() == 5); isValidBatchSize(input_tensors->at(0).shape[0]); - allocateBuffer(); + allocateBuffer(input_tensors->at(0).shape[0]); const size_t batch_size = (size_t)input_tensors->at(0).shape[0]; const size_t mem_max_seq_len = (size_t)input_tensors->at(1).shape[1]; @@ -196,7 +214,8 @@ void Decoder::forward(std::vector* output_tensors, input_tensors->at(5), Tensor{MEMORY_GPU, TYPE_INT32, {batch_size}, nullptr}, Tensor{MEMORY_CPU, TYPE_INT32, {1}, &tmp_0}, - input_tensors->at(4)}; + input_tensors->at(4), + input_tensors->at(6)}; std::vector self_attention_output_tensors{ Tensor{MEMORY_GPU, data_type, {batch_size, hidden_units_}, self_attn_output_}, Tensor{MEMORY_GPU, diff --git a/src/fastertransformer/models/decoder/Decoder.h b/src/fastertransformer/models/decoder/Decoder.h index e5c007f89..1f806d642 100644 --- a/src/fastertransformer/models/decoder/Decoder.h +++ b/src/fastertransformer/models/decoder/Decoder.h @@ -21,9 +21,9 @@ #include "src/fastertransformer/kernels/add_residual_kernels.h" #include "src/fastertransformer/kernels/layernorm_kernels.h" #include "src/fastertransformer/layers/BaseLayer.h" +#include "src/fastertransformer/layers/FfnLayer.h" #include "src/fastertransformer/layers/attention_layers/DecoderCrossAttentionLayer.h" #include "src/fastertransformer/layers/attention_layers/DecoderSelfAttentionLayer.h" -#include "src/fastertransformer/layers/FfnLayer.h" #include "src/fastertransformer/models/decoder/DecoderLayerWeight.h" #include "src/fastertransformer/utils/Tensor.h" #include "src/fastertransformer/utils/allocator.h" @@ -48,18 +48,19 @@ class Decoder: public BaseLayer { FfnLayer* ffn_layer_; void allocateBuffer() override; + void allocateBuffer(size_t batch_size); void freeBuffer() override; bool isValidBatchSize(size_t batch_size); void initialize(); protected: - T* decoder_normed_input_; - T* self_attn_output_; - T* normed_self_attn_output_; - T* cross_attn_output_; - T* normed_cross_attn_output_; - T* decoder_layer_output_; + T* decoder_normed_input_ = nullptr; + T* self_attn_output_ = nullptr; + T* normed_self_attn_output_ = nullptr; + T* cross_attn_output_ = nullptr; + T* normed_cross_attn_output_ = nullptr; + T* decoder_layer_output_ = nullptr; public: Decoder(size_t max_batch_size, diff --git a/src/fastertransformer/models/decoder/DecoderLayerWeight.h b/src/fastertransformer/models/decoder/DecoderLayerWeight.h index cdc8e6516..51dc2342d 100644 --- a/src/fastertransformer/models/decoder/DecoderLayerWeight.h +++ b/src/fastertransformer/models/decoder/DecoderLayerWeight.h @@ -17,8 +17,8 @@ #pragma once #include "src/fastertransformer/kernels/layernorm_kernels.h" -#include "src/fastertransformer/layers/attention_layers/AttentionWeight.h" #include "src/fastertransformer/layers/FfnWeight.h" +#include "src/fastertransformer/layers/attention_layers/AttentionWeight.h" #include "src/fastertransformer/utils/memory_utils.h" namespace fastertransformer { @@ -106,7 +106,7 @@ struct DecoderLayerWeight { hidden_units_ = other.hidden_units_; inter_size_ = other.inter_size_; mem_hidden_units_ = other.mem_hidden_units_; - + mallocWeights(); cudaD2Dcpy(weights_ptr[0], other.weights_ptr[0], hidden_units_); cudaD2Dcpy(weights_ptr[1], other.weights_ptr[1], hidden_units_); @@ -170,7 +170,6 @@ struct DecoderLayerWeight { ffn_weights.intermediate_weight.bias = weights_ptr[19]; ffn_weights.output_weight.kernel = weights_ptr[20]; ffn_weights.output_weight.bias = weights_ptr[21]; - } void mallocWeights() diff --git a/src/fastertransformer/models/decoding/CMakeLists.txt b/src/fastertransformer/models/decoding/CMakeLists.txt index b0c044703..001ef48ff 100644 --- a/src/fastertransformer/models/decoding/CMakeLists.txt +++ b/src/fastertransformer/models/decoding/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -18,8 +18,7 @@ add_library(Decoding STATIC Decoding.cc) set_property(TARGET Decoding PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET Decoding PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) target_link_libraries(Decoding PUBLIC -lcublas -lcudart -lcurand Decoder decoding_kernels - OnlineBeamSearchLayer BeamSearchLayer TopKSamplingLayer TopPSamplingLayer - TopKTopPSamplingLayer) + BeamSearchLayer DynamicDecodeLayer) add_executable(decoding_gemm decoding_gemm.cc) target_link_libraries(decoding_gemm PUBLIC -lcublas -lcublasLt -lcudart decoding_gemm_func memory_utils) diff --git a/src/fastertransformer/models/decoding/Decoding.cc b/src/fastertransformer/models/decoding/Decoding.cc index 033956f85..cf7cd79cd 100644 --- a/src/fastertransformer/models/decoding/Decoding.cc +++ b/src/fastertransformer/models/decoding/Decoding.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -15,12 +15,12 @@ * limitations under the License. */ +#include +#include + +#include "src/fastertransformer/kernels/beam_search_topk_kernels.h" +#include "src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.h" #include "src/fastertransformer/models/decoding/Decoding.h" -#include "src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.h" -#include "src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.h" -#include "src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.h" -#include "src/fastertransformer/layers/sampling_layers/TopKTopPSamplingLayer.h" -#include "src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.h" namespace fastertransformer { @@ -37,105 +37,21 @@ void Decoding::initialize() allocator_, is_free_buffer_after_forward_); - if (beam_width_ > 1) { - if (beam_width_ < 16) { - dynamic_decode_ = new OnlineBeamSearchLayer(max_batch_size_, - head_num_, - size_per_head_, - beam_width_, - vocab_size_, - vocab_size_padded_, - end_id_, - beam_search_diversity_rate_, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - is_free_buffer_after_forward_); - } - else { - dynamic_decode_ = new BeamSearchLayer(max_batch_size_, - head_num_, - size_per_head_, - beam_width_, - vocab_size_, - vocab_size_padded_, - end_id_, - beam_search_diversity_rate_, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - is_free_buffer_after_forward_); - } - } - else if (top_p_ == 0 && top_k_ != 0) { - // we sugguest set the is_free_buffer_after_forward_ of sampling to false - // since we need to initialize some buffers if we allocate buffer - // every time. - dynamic_decode_ = new TopKSamplingLayer(max_batch_size_, - vocab_size_, - vocab_size_padded_, - end_id_, - top_k_, - 0, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - false); - } - else if (top_k_ == 0 && top_p_ != 0.0f) { - // we sugguest set the is_free_buffer_after_forward_ of sampling to false - // since we need to initialize some buffers if we allocate buffer - // every time. - dynamic_decode_ = new TopPSamplingLayer(max_batch_size_, - vocab_size_, - vocab_size_padded_, - end_id_, - top_p_, - 0, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - false, - cuda_device_prop_); - } - else { - // we sugguest set the is_free_buffer_after_forward_ of sampling to false - // since we need to initialize some buffers if we allocate buffer - // every time. - dynamic_decode_ = new TopKTopPSamplingLayer(max_batch_size_, - vocab_size_, - vocab_size_padded_, - end_id_, - top_k_, - top_p_, - 0, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - false); - } + dynamic_decode_layer_ = new DynamicDecodeLayer(vocab_size_, + vocab_size_padded_, + end_id_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + cuda_device_prop_); } template void Decoding::allocateBuffer() { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); if (is_allocate_buffer_ == false) { - const size_t batchxbeam = max_batch_size_ * beam_width_; const size_t self_cache_size = num_layer_ * batchxbeam * max_seq_len_ * hidden_units_; const size_t mem_cache_size = num_layer_ * batchxbeam * mem_max_seq_len_ * hidden_units_; @@ -155,14 +71,17 @@ void Decoding::allocateBuffer() finished_buf_ = (bool*)(allocator_->malloc(sizeof(bool) * batchxbeam, false)); h_finished_buf_ = new bool[batchxbeam]; - key_caches_[0] = (T*)(allocator_->malloc(sizeof(T) * self_cache_size, false)); - value_caches_[0] = (T*)(allocator_->malloc(sizeof(T) * self_cache_size, false)); + start_ids_buf_ = (int*)(allocator_->malloc(sizeof(int) * max_batch_size_, false)); + end_ids_buf_ = (int*)(allocator_->malloc(sizeof(int) * max_batch_size_, false)); + + key_cache_ = (T*)(allocator_->malloc(sizeof(T) * self_cache_size, false)); + value_cache_ = (T*)(allocator_->malloc(sizeof(T) * self_cache_size, false)); if (beam_width_ > 1) { - key_caches_[1] = (T*)(allocator_->malloc(sizeof(T) * self_cache_size, false)); - value_caches_[1] = (T*)(allocator_->malloc(sizeof(T) * self_cache_size, false)); + cache_indirections_[0] = (int*)(allocator_->malloc(sizeof(int) * batchxbeam * max_seq_len_ * 2, true)); + cache_indirections_[1] = cache_indirections_[0] + batchxbeam * max_seq_len_; } - key_mem_caches_ = (T*)(allocator_->malloc(sizeof(T) * mem_cache_size, false)); - value_mem_caches_ = (T*)(allocator_->malloc(sizeof(T) * mem_cache_size, false)); + key_mem_cache_ = (T*)(allocator_->malloc(sizeof(T) * mem_cache_size, false)); + value_mem_cache_ = (T*)(allocator_->malloc(sizeof(T) * mem_cache_size, false)); padded_pos_embedding_bias_ = (T*)(allocator_->malloc(sizeof(T) * vocab_size_padded_, false)); output_ids_buf_ = (int*)(allocator_->malloc(sizeof(int) * batchxbeam * max_seq_len_, false)); @@ -175,6 +94,7 @@ void Decoding::allocateBuffer() template void Decoding::freeBuffer() { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); if (is_allocate_buffer_ == true) { if (vocab_size_ != vocab_size_padded_) { padded_embedding_kernel_ptr_ = nullptr; @@ -182,6 +102,8 @@ void Decoding::freeBuffer() allocator_->free(padded_embedding_kernel_); allocator_->free(padded_embedding_bias_); } + allocator_->free(start_ids_buf_); + allocator_->free(end_ids_buf_); allocator_->free(decoder_input_buf_); allocator_->free(decoder_output_buf_); @@ -191,14 +113,13 @@ void Decoding::freeBuffer() allocator_->free(finished_buf_); delete[] h_finished_buf_; - allocator_->free(key_caches_[0]); - allocator_->free(value_caches_[0]); - if (beam_width_ > 1) { - allocator_->free(key_caches_[1]); - allocator_->free(value_caches_[1]); + allocator_->free(key_cache_); + allocator_->free(value_cache_); + if (cache_indirections_[0] != nullptr) { + allocator_->free(cache_indirections_[0]); } - allocator_->free(key_mem_caches_); - allocator_->free(value_mem_caches_); + allocator_->free(key_mem_cache_); + allocator_->free(value_mem_cache_); allocator_->free(padded_pos_embedding_bias_); @@ -326,8 +247,9 @@ Decoding::Decoding(Decoding const& decoding): template Decoding::~Decoding() { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); delete decoder_; - delete dynamic_decode_; + delete dynamic_decode_layer_; freeBuffer(); } @@ -336,6 +258,7 @@ void Decoding::forward(std::vector* output_tensors, const std::vector* input_tensors, const DecodingWeight* decoding_weights) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); // input_tensors: // encoder_output [batch_size * beam, mem_max_seq_len, memory_hidden_dimension] // encoder_sequence_length [batch_size * beam] @@ -361,11 +284,18 @@ void Decoding::forward(std::vector* output_tensors, const DataType data_type = getTensorType(); const size_t mem_max_seq_len = input_tensors->at(0).shape[1]; + deviceFill(start_ids_buf_, batch_size, start_id_); + deviceFill(end_ids_buf_, batch_size, end_id_); + + if (beam_width_ > 1) { + cudaMemsetAsync(cache_indirections_[0], 0, 2 * sizeof(int) * batch_size * beam_width_ * max_seq_len_, stream_); + } + invokeDecodingInitialize(finished_buf_, (int*)output_tensors->at(2).data, output_ids_buf_, cum_log_probs_, - start_id_, + start_ids_buf_, batch_size, beam_width_, max_input_length, @@ -398,6 +328,10 @@ void Decoding::forward(std::vector* output_tensors, num_layer_, batch_size * beam_width_, head_num_, (size_t)(max_seq_len_), size_per_head_}; for (int step = 1; step <= (int)max_seq_len_; step++) { + const int ite = 0; + const int local_batch_size = batch_size; + const int id_offset = ite * local_batch_size * beam_width_; + cudaD2Hcpy(h_finished_buf_, finished_buf_, batch_size * beam_width_); uint sum = 0; for (uint i = 0; i < batch_size * beam_width_; i++) { @@ -407,8 +341,8 @@ void Decoding::forward(std::vector* output_tensors, break; } - const int src_cache_id = beam_width_ > 1 ? (step - 1) & 0x1 : 0; - const int tgt_cache_id = 1 - src_cache_id; + const int src_indir_idx = (step - 1) % 2; + const int tgt_indir_idx = 1 - src_indir_idx; invokeEmbeddingLookupPosEncoding(decoder_input_buf_, decoding_weights->pre_decoder_embedding_table, @@ -431,20 +365,24 @@ void Decoding::forward(std::vector* output_tensors, input_tensors->at(1), Tensor{MEMORY_GPU, TYPE_BOOL, {batch_size * beam_width_}, finished_buf_}, Tensor{MEMORY_CPU, TYPE_INT32, {1}, &step}, - output_tensors->at(2)}; + output_tensors->at(2), + Tensor{MEMORY_GPU, + TYPE_INT32, + {(size_t)local_batch_size, beam_width_, max_seq_len_}, + beam_width_ > 1 ? cache_indirections_[src_indir_idx] + id_offset * max_seq_len_ : nullptr}}; std::vector decoder_output_tensors{ Tensor{MEMORY_GPU, data_type, {batch_size * beam_width_, hidden_units_}, decoder_output_buf_}, - Tensor{MEMORY_GPU, data_type, self_k_cache_size, key_caches_[src_cache_id]}, - Tensor{MEMORY_GPU, data_type, self_v_cache_size, value_caches_[src_cache_id]}, + Tensor{MEMORY_GPU, data_type, self_k_cache_size, key_cache_}, + Tensor{MEMORY_GPU, data_type, self_v_cache_size, value_cache_}, Tensor{MEMORY_GPU, data_type, {num_layer_, batch_size * beam_width_, mem_max_seq_len, hidden_units_}, - key_mem_caches_}, + key_mem_cache_}, Tensor{MEMORY_GPU, data_type, {num_layer_, batch_size * beam_width_, mem_max_seq_len, hidden_units_}, - value_mem_caches_}}; + value_mem_cache_}}; decoder_->forward(&decoder_output_tensors, &decoder_input_tensors, &decoding_weights->decoder_layer_weights); invokeGeneralLayerNorm(normed_decoder_output_buf_, @@ -468,50 +406,62 @@ void Decoding::forward(std::vector* output_tensors, logits_buf_, vocab_size_padded_ /* n */); - std::vector* dynamic_decode_input_tensors; - std::vector* dynamic_decode_output_tensors; const int tmp_ite = 0; - if (beam_width_ > 1) { - dynamic_decode_input_tensors = new std::vector{ - Tensor{MEMORY_GPU, data_type, {batch_size, beam_width_, vocab_size_padded_}, logits_buf_}, - Tensor{MEMORY_GPU, data_type, {vocab_size_padded_}, padded_embedding_bias_ptr_}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &step}, - Tensor{MEMORY_GPU, data_type, self_k_cache_size, key_caches_[src_cache_id]}, - Tensor{MEMORY_GPU, data_type, self_v_cache_size, value_caches_[src_cache_id]}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &max_input_length}, - Tensor{MEMORY_GPU, TYPE_INT32, {batch_size, beam_width_}, nullptr}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &tmp_ite}}; - - dynamic_decode_output_tensors = new std::vector{ - Tensor{MEMORY_GPU, TYPE_INT32, {max_seq_len_, batch_size, beam_width_}, output_ids_buf_}, - Tensor{MEMORY_GPU, TYPE_BOOL, {batch_size * beam_width_}, finished_buf_}, - Tensor{MEMORY_GPU, TYPE_FP32, {batch_size * beam_width_}, cum_log_probs_}, - Tensor{MEMORY_GPU, TYPE_INT32, {max_seq_len_, batch_size, beam_width_}, parent_ids_buf_}, - output_tensors->at(2), - Tensor{MEMORY_GPU, data_type, self_k_cache_size, key_caches_[tgt_cache_id]}, - Tensor{MEMORY_GPU, data_type, self_v_cache_size, value_caches_[tgt_cache_id]}}; - } - else { - - dynamic_decode_input_tensors = new std::vector{ - Tensor{MEMORY_GPU, data_type, {batch_size, beam_width_, vocab_size_padded_}, logits_buf_}, - Tensor{MEMORY_GPU, data_type, {vocab_size_padded_}, padded_embedding_bias_ptr_}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &step}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &max_input_length}, - Tensor{MEMORY_GPU, TYPE_INT32, {batch_size, beam_width_}, nullptr}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &tmp_ite}}; - - dynamic_decode_output_tensors = new std::vector{ - Tensor{MEMORY_GPU, TYPE_INT32, {max_seq_len_, batch_size, beam_width_}, output_ids_buf_}, - Tensor{MEMORY_GPU, TYPE_BOOL, {batch_size * beam_width_}, finished_buf_}, - output_tensors->at(2), - Tensor{MEMORY_GPU, TYPE_FP32, {max_seq_len_, batch_size, beam_width_}, nullptr}}; - } - - dynamic_decode_->forward(dynamic_decode_output_tensors, dynamic_decode_input_tensors); - - delete dynamic_decode_input_tensors; - delete dynamic_decode_output_tensors; + const int tmp_local_batch_size = batch_size; + const bool has_diff_runtime_args = false; + const int runtime_top_k = (int)top_k_; + const float runtime_top_p = (float)top_p_; + const unsigned long long int random_seed = 0; + const bool is_initialize_random_table = step == 1; + + std::unordered_map dynamic_decode_input_tensors{ + {"logits", Tensor{MEMORY_GPU, data_type, {batch_size, beam_width_, vocab_size_padded_}, logits_buf_}}, + {"embedding_bias", Tensor{MEMORY_GPU, data_type, {vocab_size_padded_}, padded_embedding_bias_ptr_}}, + {"end_id", Tensor{MEMORY_GPU, TYPE_INT32, {batch_size}, end_ids_buf_}}, + {"step", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &step}}, + {"max_input_length", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &max_input_length}}, + {"input_lengths", Tensor{MEMORY_GPU, TYPE_INT32, {batch_size, beam_width_}, nullptr}}, + {"ite", Tensor{MEMORY_CPU, TYPE_UINT32, {1}, &tmp_ite}}, + {"has_diff_runtime_args", Tensor{MEMORY_CPU, TYPE_BOOL, {1}, &has_diff_runtime_args}}, + {"src_key_cache", Tensor{MEMORY_GPU, data_type, self_k_cache_size, key_cache_}}, + {"src_value_cache", Tensor{MEMORY_GPU, data_type, self_v_cache_size, value_cache_}}, + {"src_cache_indirection", + Tensor{ + MEMORY_GPU, TYPE_INT32, {batch_size, beam_width_, max_seq_len_}, cache_indirections_[src_indir_idx]}}, + {"local_batch_size", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &tmp_local_batch_size}}, + {"random_seed", Tensor{MEMORY_CPU, TYPE_UINT64, {1}, &random_seed}}, + {"beam_search_diversity_rate", Tensor{MEMORY_CPU, TYPE_FP32, {1}, &beam_search_diversity_rate_}}, + {"temperature", Tensor{MEMORY_CPU, TYPE_FP32, {1}, &temperature_}}, + {"len_penalty", Tensor{MEMORY_CPU, TYPE_FP32, {1}, &len_penalty_}}, + {"repetition_penalty", Tensor{MEMORY_CPU, TYPE_FP32, {1}, &repetition_penalty_}}, + {"runtime_top_k", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &runtime_top_k}}, + {"runtime_top_p", Tensor{MEMORY_CPU, TYPE_FP32, {1}, &runtime_top_p}}, + {"is_initialize_random_table", Tensor{MEMORY_CPU, TYPE_BOOL, {1}, &is_initialize_random_table}}}; + + // TODO(bhsueh) Need to modify the forward function to use unordered_map + // for (auto t = input_tensors->begin(); t != input_tensors->end(); ++t) { + // dynamic_decode_input_tensors.insert(*t); + // } + + // common outputs + std::unordered_map dynamic_decode_output_tensors{ + {"output_ids", Tensor{MEMORY_GPU, TYPE_INT32, {max_seq_len_, batch_size, beam_width_}, output_ids_buf_}}, + {"finished", Tensor{MEMORY_GPU, TYPE_BOOL, {batch_size * beam_width_}, finished_buf_}}, + {"cum_log_probs", Tensor{MEMORY_GPU, TYPE_FP32, {batch_size * beam_width_}, cum_log_probs_}}, + {"parent_ids", Tensor{MEMORY_GPU, TYPE_INT32, {max_seq_len_, batch_size, beam_width_}, parent_ids_buf_}}, + {"sequence_length", output_tensors->at(2)}, + {"tgt_key_cache", Tensor{MEMORY_GPU, data_type, self_k_cache_size, key_cache_}}, + {"tgt_value_cache", Tensor{MEMORY_GPU, data_type, self_v_cache_size, value_cache_}}, + {"tgt_cache_indirection", + Tensor{ + MEMORY_GPU, TYPE_INT32, {batch_size, beam_width_, max_seq_len_}, cache_indirections_[tgt_indir_idx]}}}; + + // TODO(bhsueh) Need to modify the forward function to use unordered_map + // for (auto t = output_tensors->begin(); t != output_tensors->end(); ++t) { + // dynamic_decode_output_tensors.insert(*t); + // } + + dynamic_decode_layer_->forward(&dynamic_decode_output_tensors, &dynamic_decode_input_tensors); } // minus the sequence length of unfinished sentence by 1 since we start from 1. @@ -531,7 +481,7 @@ void Decoding::forward(std::vector* output_tensors, beam_width_, output_ids_buf_ + batch_size * beam_width_, parent_ids_buf_ + batch_size * beam_width_, - end_id_, + end_ids_buf_, stream_); } else { diff --git a/src/fastertransformer/models/decoding/Decoding.h b/src/fastertransformer/models/decoding/Decoding.h index cc839a7a3..73a2945ad 100644 --- a/src/fastertransformer/models/decoding/Decoding.h +++ b/src/fastertransformer/models/decoding/Decoding.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -20,7 +20,7 @@ #include #include "src/fastertransformer/kernels/decoding_kernels.h" -#include "src/fastertransformer/layers/DynamicDecodeBaseLayer.h" +#include "src/fastertransformer/layers/DynamicDecodeLayer.h" #include "src/fastertransformer/models/decoder/Decoder.h" #include "src/fastertransformer/models/decoding/DecodingWeight.h" @@ -55,8 +55,7 @@ class Decoding: public BaseLayer { size_t vocab_size_padded_; Decoder* decoder_; - DynamicDecodeBaseLayer* dynamic_decode_; - + DynamicDecodeLayer* dynamic_decode_layer_; void allocateBuffer() override; void freeBuffer() override; @@ -67,28 +66,32 @@ class Decoding: public BaseLayer { void initialize(); protected: - T* padded_embedding_kernel_; - T* padded_embedding_bias_; - const T* padded_embedding_kernel_ptr_; - const T* padded_embedding_bias_ptr_; - - T* decoder_input_buf_; - T* decoder_output_buf_; - T* normed_decoder_output_buf_; - T* logits_buf_; - float* cum_log_probs_; - bool* finished_buf_; - bool* h_finished_buf_; - - T* key_caches_[2]; // ping-pong buffer - T* value_caches_[2]; // ping-pong buffer - T* key_mem_caches_; - T* value_mem_caches_; - - T* padded_pos_embedding_bias_; - - int* output_ids_buf_; - int* parent_ids_buf_; + T* padded_embedding_kernel_ = nullptr; + T* padded_embedding_bias_ = nullptr; + const T* padded_embedding_kernel_ptr_ = nullptr; + const T* padded_embedding_bias_ptr_ = nullptr; + + T* decoder_input_buf_ = nullptr; + T* decoder_output_buf_ = nullptr; + T* normed_decoder_output_buf_ = nullptr; + T* logits_buf_ = nullptr; + float* cum_log_probs_ = nullptr; + bool* finished_buf_ = nullptr; + bool* h_finished_buf_ = nullptr; + + int* start_ids_buf_; + int* end_ids_buf_; + + T* key_cache_ = nullptr; + T* value_cache_ = nullptr; + T* key_mem_cache_ = nullptr; + T* value_mem_cache_ = nullptr; + int* cache_indirections_[2] = {nullptr, nullptr}; + + T* padded_pos_embedding_bias_ = nullptr; + + int* output_ids_buf_ = nullptr; + int* parent_ids_buf_ = nullptr; public: Decoding(size_t max_batch_size, diff --git a/src/fastertransformer/models/decoding/DecodingWeight.h b/src/fastertransformer/models/decoding/DecodingWeight.h index 4a148db94..0cce2bd69 100644 --- a/src/fastertransformer/models/decoding/DecodingWeight.h +++ b/src/fastertransformer/models/decoding/DecodingWeight.h @@ -26,8 +26,12 @@ template struct DecodingWeight { DecodingWeight() = default; - DecodingWeight( - const int hidden_units, const int inter_size, const int vocab_size, const int num_layer, const int max_seq_len, const int mem_hidden_units): + DecodingWeight(const int hidden_units, + const int inter_size, + const int vocab_size, + const int num_layer, + const int max_seq_len, + const int mem_hidden_units): hidden_units_(hidden_units), inter_size_(inter_size), vocab_size_(vocab_size), diff --git a/src/fastertransformer/models/decoding/decoding_gemm.cc b/src/fastertransformer/models/decoding/decoding_gemm.cc index ceeb66c6e..e5f60d3f4 100644 --- a/src/fastertransformer/models/decoding/decoding_gemm.cc +++ b/src/fastertransformer/models/decoding/decoding_gemm.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -23,7 +23,7 @@ int main(int argc, char* argv[]) { if (argc != 10 && argc != 11) { printf( - "[ERROR] decoding_gemm batch_size beam_width head_num size_per_head inter_size vocab_size max_mem_seq_len memory_hidden_units is_fp16 \n"); + "[ERROR] decoding_gemm batch_size beam_width head_num size_per_head inter_size vocab_size max_mem_seq_len memory_hidden_units data_type \n"); printf("e.g. ./bin/decoding_gemm 32 4 8 64 2048 30000 32 512 0\n"); return 0; } @@ -36,7 +36,7 @@ int main(int argc, char* argv[]) const int vocab_size = atoi(argv[6]); const int max_mem_seq_len = atoi(argv[7]); const int memory_hidden_units = atoi(argv[8]); - const int is_fp16 = atoi(argv[9]); + const ft::CublasDataType data_type = static_cast(atoi(argv[9])); // 0 FP32, 1 FP16, 2 BF 16 const bool is_append = argc == 11 ? ((bool)atoi(argv[10])) : false; printf("[INFO] arguments: \n"); @@ -48,7 +48,7 @@ int main(int argc, char* argv[]) printf(" vocab_size: %d \n", vocab_size); printf(" max_mem_seq_len: %d \n", max_mem_seq_len); printf(" memory_hidden_units: %d \n", memory_hidden_units); - printf(" is_fp16: %d \n", is_fp16); + printf(" data_type: %d \n", data_type); std::cout << std::endl; void* gemm_test_buf; @@ -60,7 +60,7 @@ int main(int argc, char* argv[]) inter_size, memory_hidden_units, vocab_size, - is_fp16); + data_type); size_t total, free; ft::check_cuda_error(cudaMemGetInfo(&free, &total)); @@ -76,7 +76,7 @@ int main(int argc, char* argv[]) ft::deviceMalloc(reinterpret_cast(&gemm_test_buf), buf_size_in_byte, false); } - if (is_fp16 == 0) { + if (data_type == ft::FLOAT_DATATYPE) { ft::generate_decoding_gemm_config(batch_size, beam_width, max_mem_seq_len, @@ -88,7 +88,7 @@ int main(int argc, char* argv[]) gemm_test_buf, is_append); } - else if (is_fp16 == 1) { + else if (data_type == ft::HALF_DATATYPE) { ft::generate_decoding_gemm_config(batch_size, beam_width, max_mem_seq_len, @@ -100,8 +100,22 @@ int main(int argc, char* argv[]) gemm_test_buf, is_append); } +#ifdef ENABLE_BF16 + else if (data_type == ft::BFLOAT16_DATATYPE) { + ft::generate_decoding_gemm_config<__nv_bfloat16>(batch_size, + beam_width, + max_mem_seq_len, + head_num, + size_per_head, + inter_size, + vocab_size, + memory_hidden_units, + gemm_test_buf, + is_append); + } +#endif else { - printf("[ERROR] is_fp16 should be 0 (use float) or 1 (use half). \n"); + printf("[ERROR] data type only supports fp32(0), fp16(1), bf16(2). \n"); return -1; } diff --git a/src/fastertransformer/models/gptj/CMakeLists.txt b/src/fastertransformer/models/gptj/CMakeLists.txt index 79675071c..d7d9d3e3e 100644 --- a/src/fastertransformer/models/gptj/CMakeLists.txt +++ b/src/fastertransformer/models/gptj/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -54,10 +54,7 @@ target_link_libraries(GptJ PUBLIC -lcudart GptJContextDecoder decoding_kernels gpt_kernels - OnlineBeamSearchLayer - BeamSearchLayer - TopKSamplingLayer - TopPSamplingLayer - TopKTopPSamplingLayer + DynamicDecodeLayer + BaseBeamSearchLayer bert_preprocess_kernels GptJWeight) diff --git a/src/fastertransformer/models/gptj/GptJ.cc b/src/fastertransformer/models/gptj/GptJ.cc index dc99cf8f1..0829e0dff 100644 --- a/src/fastertransformer/models/gptj/GptJ.cc +++ b/src/fastertransformer/models/gptj/GptJ.cc @@ -1,6 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. - * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -19,198 +18,127 @@ #include "src/fastertransformer/kernels/bert_preprocess_kernels.h" #include "src/fastertransformer/kernels/decoding_kernels.h" #include "src/fastertransformer/kernels/gpt_kernels.h" -#include "src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.h" -#include "src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.h" -#include "src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.h" -#include "src/fastertransformer/layers/sampling_layers/TopKTopPSamplingLayer.h" -#include "src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.h" +#include "src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.h" +#include namespace fastertransformer { template void GptJ::initialize() { - gpt_context_decoder_ = new GptJContextDecoder(max_batch_size_ * beam_width_, - max_input_len_, + gpt_context_decoder_ = new GptJContextDecoder(0, + 0, head_num_, size_per_head_, inter_size_, num_layer_, rotary_embedding_dim_, - tensor_para_size_, - tensor_para_rank_, - tensor_para_comm_, - pipeline_para_size_, - pipeline_para_rank_, - pipeline_para_comm_, + tensor_para_, + pipeline_para_, stream_, cublas_wrapper_, allocator_, is_free_buffer_after_forward_, - is_context_qk_buf_float_); + is_context_qk_buf_float_, + custom_all_reduce_comm_, + enable_custom_all_reduce_); - gpt_decoder_ = new GptJDecoder(max_batch_size_ * beam_width_, + gpt_decoder_ = new GptJDecoder(0, head_num_, size_per_head_, inter_size_, num_layer_, rotary_embedding_dim_, - tensor_para_size_, - tensor_para_rank_, - tensor_para_comm_, - pipeline_para_size_, - pipeline_para_rank_, - pipeline_para_comm_, + tensor_para_, + pipeline_para_, stream_, cublas_wrapper_, allocator_, - is_free_buffer_after_forward_); - - if (beam_width_ > 1) { - if (beam_width_ < 16) { - dynamic_decode_ = new OnlineBeamSearchLayer(max_batch_size_, - local_head_num_, - size_per_head_, - beam_width_, - vocab_size_, - vocab_size_padded_, - end_id_, - beam_search_diversity_rate_, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - is_free_buffer_after_forward_); - } - else { - dynamic_decode_ = new BeamSearchLayer(max_batch_size_, - local_head_num_, - size_per_head_, - beam_width_, - vocab_size_, - vocab_size_padded_, - end_id_, - beam_search_diversity_rate_, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - is_free_buffer_after_forward_); - } - } - else if (top_p_ == 0 && top_k_ != 0) { - // we sugguest set the is_free_buffer_after_forward_ of sampling to false - // since we need to initialize some buffers if we allocate buffer - // every time. - dynamic_decode_ = new TopKSamplingLayer(max_batch_size_, - vocab_size_, - vocab_size_padded_, - end_id_, - top_k_, - random_seed_, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - false); - } - else if (top_k_ == 0 && top_p_ != 0.0f) { - // we sugguest set the is_free_buffer_after_forward_ of sampling to false - // since we need to initialize some buffers if we allocate buffer - // every time. - dynamic_decode_ = new TopPSamplingLayer(max_batch_size_, - vocab_size_, - vocab_size_padded_, - end_id_, - top_p_, - random_seed_, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - false, - cuda_device_prop_); - } - else { - // we sugguest set the is_free_buffer_after_forward_ of sampling to false - // since we need to initialize some buffers if we allocate buffer - // every time. - dynamic_decode_ = new TopKTopPSamplingLayer(max_batch_size_, - vocab_size_, - vocab_size_padded_, - end_id_, - top_k_, - top_p_, - random_seed_, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - false); - } + is_free_buffer_after_forward_, + custom_all_reduce_comm_, + enable_custom_all_reduce_); + + dynamic_decode_layer_ = new DynamicDecodeLayer(vocab_size_, + vocab_size_padded_, + 0, // end_id, deprecated + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + cuda_device_prop_); } template void GptJ::allocateBuffer() { - if (is_allocate_buffer_ == false) { - - const size_t batchxbeam = max_batch_size_ * beam_width_; - const size_t self_cache_size = - (num_layer_ / pipeline_para_size_) * batchxbeam * max_seq_len_ * hidden_units_ / tensor_para_size_; - - if (vocab_size_ != vocab_size_padded_) { - padded_embedding_kernel_ = (T*)(allocator_->malloc(sizeof(T) * hidden_units_ * vocab_size_padded_, true)); - padded_embedding_kernel_ptr_ = padded_embedding_kernel_; - - padded_embedding_bias_ = (T*)(allocator_->malloc(sizeof(T) * vocab_size_padded_, true)); - padded_embedding_bias_ptr_ = padded_embedding_bias_; - } - - input_attention_mask_ = (T*)(allocator_->malloc(sizeof(T) * batchxbeam * max_seq_len_ * max_seq_len_, false)); - decoder_input_buf_ = (T*)(allocator_->malloc(sizeof(T) * batchxbeam * hidden_units_, false)); - decoder_output_buf_ = (T*)(allocator_->malloc(sizeof(T) * batchxbeam * hidden_units_, false)); - normed_decoder_output_buf_ = (T*)(allocator_->malloc(sizeof(T) * batchxbeam * hidden_units_, false)); - - logits_buf_ = (float*)(allocator_->malloc(sizeof(float) * batchxbeam * vocab_size_padded_, false)); - nccl_logits_buf_ = (float*)(allocator_->malloc(sizeof(float) * batchxbeam * vocab_size_padded_, false)); - cum_log_probs_ = (float*)(allocator_->malloc(sizeof(float) * batchxbeam, false)); - finished_buf_ = (bool*)(allocator_->malloc(sizeof(bool) * batchxbeam, false)); - h_finished_buf_ = new bool[batchxbeam]; - - key_caches_[0] = (T*)(allocator_->malloc(sizeof(T) * self_cache_size, false)); - value_caches_[0] = (T*)(allocator_->malloc(sizeof(T) * self_cache_size, false)); - if (beam_width_ > 1) { - key_caches_[1] = (T*)(allocator_->malloc(sizeof(T) * self_cache_size, false)); - value_caches_[1] = (T*)(allocator_->malloc(sizeof(T) * self_cache_size, false)); - } + FT_CHECK(false); +} - output_ids_buf_ = (int*)(allocator_->malloc(sizeof(int) * batchxbeam * max_seq_len_, true)); - parent_ids_buf_ = (int*)(allocator_->malloc(sizeof(int) * batchxbeam * max_seq_len_, true)); - input_length_buf_ = (int*)(allocator_->malloc(sizeof(int) * batchxbeam, false)); +template +void GptJ::allocateBuffer(size_t batch_size, size_t beam_width, size_t max_seq_len, size_t max_input_len) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + const size_t batchxbeam = batch_size * beam_width; + const size_t self_cache_size = + (num_layer_ / pipeline_para_.world_size_) * batchxbeam * max_seq_len * hidden_units_ / tensor_para_.world_size_; + + if (vocab_size_ != vocab_size_padded_) { + padded_embedding_kernel_ = + (T*)(allocator_->reMalloc(padded_embedding_kernel_, sizeof(T) * hidden_units_ * vocab_size_padded_, true)); + padded_embedding_kernel_ptr_ = padded_embedding_kernel_; + + padded_embedding_bias_ = + (T*)(allocator_->reMalloc(padded_embedding_bias_, sizeof(T) * vocab_size_padded_, true)); + padded_embedding_bias_ptr_ = padded_embedding_bias_; + } - context_decoder_input_buf_ = - (T*)(allocator_->malloc(sizeof(T) * batchxbeam * max_input_len_ * hidden_units_, false)); - context_decoder_output_buf_ = - (T*)(allocator_->malloc(sizeof(T) * batchxbeam * max_input_len_ * hidden_units_, false)); - is_allocate_buffer_ = true; + input_attention_mask_ = + (T*)(allocator_->reMalloc(input_attention_mask_, sizeof(T) * batchxbeam * max_seq_len * max_seq_len, false)); + decoder_input_buf_ = (T*)(allocator_->reMalloc(decoder_input_buf_, sizeof(T) * batchxbeam * hidden_units_, false)); + decoder_output_buf_ = + (T*)(allocator_->reMalloc(decoder_output_buf_, sizeof(T) * batchxbeam * hidden_units_, false)); + normed_decoder_output_buf_ = + (T*)(allocator_->reMalloc(normed_decoder_output_buf_, sizeof(T) * batchxbeam * hidden_units_, false)); + logits_buf_ = (float*)(allocator_->reMalloc(logits_buf_, sizeof(float) * batchxbeam * vocab_size_padded_, false)); + nccl_logits_buf_ = + (float*)(allocator_->reMalloc(nccl_logits_buf_, sizeof(float) * batchxbeam * vocab_size_padded_, false)); + cum_log_probs_ = (float*)(allocator_->reMalloc(cum_log_probs_, sizeof(float) * batchxbeam, false)); + finished_buf_ = (bool*)(allocator_->reMalloc(finished_buf_, sizeof(bool) * batchxbeam, false)); + h_finished_buf_ = new bool[batchxbeam]; + + key_cache_ = (T*)(allocator_->reMalloc(key_cache_, sizeof(T) * self_cache_size * 2, true)); + value_cache_ = key_cache_ + self_cache_size; + if (beam_width > 1) { + cache_indirections_[0] = + (int*)(allocator_->reMalloc(cache_indirections_[0], sizeof(int) * batchxbeam * max_seq_len * 2, true)); + cache_indirections_[1] = cache_indirections_[0] + batchxbeam * max_seq_len; } + + tiled_input_ids_buf_ = + (int*)(allocator_->reMalloc(tiled_input_ids_buf_, sizeof(int) * batchxbeam * max_input_len, true)); + tiled_input_lengths_buf_ = (int*)(allocator_->reMalloc(tiled_input_lengths_buf_, sizeof(int) * batchxbeam, true)); + + transposed_output_ids_buf_ = + (int*)(allocator_->reMalloc(transposed_output_ids_buf_, sizeof(int) * batchxbeam * max_seq_len, true)); + output_ids_buf_ = (int*)(allocator_->reMalloc(output_ids_buf_, sizeof(int) * batchxbeam * max_seq_len, true)); + parent_ids_buf_ = (int*)(allocator_->reMalloc(parent_ids_buf_, sizeof(int) * batchxbeam * max_seq_len, true)); + + start_ids_buf_ = (int*)(allocator_->reMalloc(start_ids_buf_, sizeof(int) * batch_size, false)); + end_ids_buf_ = (int*)(allocator_->reMalloc(end_ids_buf_, sizeof(int) * batch_size, false)); + + context_decoder_input_buf_ = (T*)(allocator_->reMalloc( + context_decoder_input_buf_, sizeof(T) * batchxbeam * max_input_len * hidden_units_, false)); + context_decoder_output_buf_ = (T*)(allocator_->reMalloc( + context_decoder_output_buf_, sizeof(T) * batchxbeam * max_input_len * hidden_units_, false)); + output_log_probs_buf_ = + (float*)(allocator_->reMalloc(output_log_probs_buf_, sizeof(float) * batchxbeam * max_seq_len, false)); + is_allocate_buffer_ = true; } template void GptJ::freeBuffer() { - if (is_allocate_buffer_ == true) { + if (is_allocate_buffer_) { if (vocab_size_ != vocab_size_padded_) { padded_embedding_kernel_ptr_ = nullptr; padded_embedding_bias_ptr_ = nullptr; @@ -228,61 +156,28 @@ void GptJ::freeBuffer() allocator_->free(finished_buf_); delete[] h_finished_buf_; - allocator_->free(key_caches_[0]); - allocator_->free(value_caches_[0]); - if (beam_width_ > 1) { - allocator_->free(key_caches_[1]); - allocator_->free(value_caches_[1]); + allocator_->free(key_cache_); + if (cache_indirections_[0] != nullptr) { + allocator_->free(cache_indirections_[0]); } + allocator_->free(tiled_input_ids_buf_); + allocator_->free(tiled_input_lengths_buf_); + + allocator_->free(transposed_output_ids_buf_); allocator_->free(output_ids_buf_); allocator_->free(parent_ids_buf_); + allocator_->free(start_ids_buf_); + allocator_->free(end_ids_buf_); + allocator_->free(context_decoder_input_buf_); allocator_->free(context_decoder_output_buf_); + allocator_->free(output_log_probs_buf_); is_allocate_buffer_ = false; } } -template -bool GptJ::isValidBatchSize(size_t batch_size) -{ - if (batch_size <= max_batch_size_) { - return true; - } - else { - freeBuffer(); - max_batch_size_ = batch_size * 1.2; - return true; - } -} - -template -bool GptJ::isValidSeqLen(size_t seq_len) -{ - if (seq_len + 1 <= max_seq_len_) { - return true; - } - else { - freeBuffer(); - max_seq_len_ = (seq_len + 1) * 1.2; - return true; - } -} - -template -bool GptJ::isValidInputSeqLen(size_t seq_len) -{ - if (seq_len <= max_input_len_) { - return true; - } - else { - freeBuffer(); - max_input_len_ = seq_len * 1.2; - return true; - } -} - template GptJ::GptJ(size_t max_batch_size, size_t max_seq_len, @@ -307,12 +202,10 @@ GptJ::GptJ(size_t max_batch_size, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, - cudaDeviceProp* cuda_device_prop): + cudaDeviceProp* cuda_device_prop, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward, cuda_device_prop), - max_batch_size_(max_batch_size), - max_seq_len_(max_seq_len + 1), - max_input_len_(max_input_len), - beam_width_(beam_width), head_num_(head_num), size_per_head_(size_per_head), inter_size_(inter_size), @@ -321,27 +214,19 @@ GptJ::GptJ(size_t max_batch_size, rotary_embedding_dim_(rotary_embedding_dim), start_id_(start_id), end_id_(end_id), - beam_search_diversity_rate_(beam_search_diversity_rate), - hidden_units_(head_num_ * size_per_head), - top_k_(top_k), - top_p_(top_p), - random_seed_(random_seed), - temperature_(temperature), - len_penalty_(len_penalty), - repetition_penalty_(repetition_penalty), - tensor_para_size_(1), - tensor_para_rank_(0), - tensor_para_comm_(nullptr), - local_head_num_(head_num_ / tensor_para_size_), - pipeline_para_size_(1), - pipeline_para_rank_(0), - pipeline_para_comm_(nullptr) + hidden_units_(head_num * size_per_head), + local_head_num_(head_num / 1) { - vocab_size_padded_ = ((size_t)ceil(vocab_size_ / 1. / tensor_para_size_) * tensor_para_size_); + tensor_para_.world_size_ = 1; + tensor_para_.rank_ = 0; + pipeline_para_.world_size_ = 1; + pipeline_para_.rank_ = 0; + + int local_vacab_size = ceil(vocab_size_ / 1.f / tensor_para_.world_size_); if (std::is_same::value) { - vocab_size_padded_ = ((size_t)ceil(vocab_size_padded_ / 8.) * 8); + local_vacab_size = ceil(local_vacab_size / 8.f) * 8; } - + vocab_size_padded_ = (size_t)local_vacab_size * tensor_para_.world_size_; initialize(); } @@ -365,22 +250,16 @@ GptJ::GptJ(size_t max_batch_size, float temperature, float len_penalty, float repetition_penalty, - size_t tensor_para_size, - size_t tensor_para_rank, - ncclComm_t tensor_para_comm, - size_t pipeline_para_size, - size_t pipeline_para_rank, - ncclComm_t pipeline_para_comm, + NcclParam tensor_para, + NcclParam pipeline_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, - cudaDeviceProp* cuda_device_prop): + cudaDeviceProp* cuda_device_prop, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward, cuda_device_prop), - max_batch_size_(max_batch_size), - max_seq_len_(max_seq_len + 1), - max_input_len_(max_input_len), - beam_width_(beam_width), head_num_(head_num), size_per_head_(size_per_head), inter_size_(inter_size), @@ -389,37 +268,24 @@ GptJ::GptJ(size_t max_batch_size, rotary_embedding_dim_(rotary_embedding_dim), start_id_(start_id), end_id_(end_id), - beam_search_diversity_rate_(beam_search_diversity_rate), - hidden_units_(head_num_ * size_per_head), - top_k_(top_k), - top_p_(top_p), - random_seed_(random_seed), - temperature_(temperature), - len_penalty_(len_penalty), - repetition_penalty_(repetition_penalty), - tensor_para_size_(tensor_para_size), - tensor_para_rank_(tensor_para_rank), - tensor_para_comm_(tensor_para_comm), - local_head_num_(head_num_ / tensor_para_size_), - pipeline_para_size_(pipeline_para_size), - pipeline_para_rank_(pipeline_para_rank), - pipeline_para_comm_(pipeline_para_comm) + hidden_units_(head_num * size_per_head), + tensor_para_(tensor_para), + pipeline_para_(pipeline_para), + local_head_num_(head_num / tensor_para.world_size_), + custom_all_reduce_comm_(custom_all_reduce_comm), + enable_custom_all_reduce_(enable_custom_all_reduce) { - vocab_size_padded_ = ((size_t)ceil(vocab_size_ / 1. / tensor_para_size_) * tensor_para_size_); + int local_vacab_size = ceil(vocab_size_ / 1.f / tensor_para_.world_size_); if (std::is_same::value) { - vocab_size_padded_ = ((size_t)ceil(vocab_size_padded_ / 8.) * 8); + local_vacab_size = ceil(local_vacab_size / 8.f) * 8; } - + vocab_size_padded_ = (size_t)local_vacab_size * tensor_para_.world_size_; initialize(); } template GptJ::GptJ(GptJ const& gpt): BaseLayer(gpt), - max_batch_size_(gpt.max_batch_size_), - max_seq_len_(gpt.max_seq_len_), - max_input_len_(gpt.max_input_len_), - beam_width_(gpt.beam_width_), head_num_(gpt.head_num_), size_per_head_(gpt.size_per_head_), inter_size_(gpt.inter_size_), @@ -428,22 +294,13 @@ GptJ::GptJ(GptJ const& gpt): rotary_embedding_dim_(gpt.rotary_embedding_dim_), start_id_(gpt.start_id_), end_id_(gpt.end_id_), - beam_search_diversity_rate_(gpt.beam_search_diversity_rate_), hidden_units_(gpt.hidden_units_), - top_k_(gpt.top_k_), - top_p_(gpt.top_p_), - random_seed_(gpt.random_seed_), - temperature_(gpt.temperature_), - len_penalty_(gpt.len_penalty_), - repetition_penalty_(gpt.repetition_penalty_), - tensor_para_size_(gpt.tensor_para_size_), - tensor_para_rank_(gpt.tensor_para_rank_), - tensor_para_comm_(gpt.tensor_para_comm_), + tensor_para_(gpt.tensor_para_), + pipeline_para_(gpt.pipeline_para_), local_head_num_(gpt.local_head_num_), - pipeline_para_size_(gpt.pipeline_para_size_), - pipeline_para_rank_(gpt.pipeline_para_rank_), - pipeline_para_comm_(gpt.pipeline_para_comm_), - vocab_size_padded_(gpt.vocab_size_padded_) + vocab_size_padded_(gpt.vocab_size_padded_), + custom_all_reduce_comm_(gpt.custom_all_reduce_comm_), + enable_custom_all_reduce_(gpt.enable_custom_all_reduce_) { initialize(); } @@ -452,7 +309,8 @@ template GptJ::~GptJ() { delete gpt_decoder_; - delete dynamic_decode_; + delete dynamic_decode_layer_; + delete gpt_context_decoder_; freeBuffer(); } @@ -460,18 +318,40 @@ template void GptJ::forward(std::vector* output_tensors, const std::vector* input_tensors, const GptJWeight* gpt_weights) +{ + FT_CHECK(false); +} + +template +void GptJ::forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors, + const GptJWeight* gpt_weights) { // input_tensors: - // input_ids [batch_size * beam, max_input_length] - // input_lengths [batch_size * beam] - // max_output_seq_len [1] on cpu + // input_ids [batch_size, max_input_length] + // input_lengths [batch_size] + // max_output_seq_len [1] or [batch_size] on cpu + // start_id [batch_size] on cpu, optional + // end_id [batch_size] on cpu, optional + // stop_words_list [batch_size, 2, stop_words_length], optional + // bad_words_list [2, bad_words_length] or [batch_size, 2, bad_words_length], optional + // runtime_top_k [1] or [batch_size] on cpu, optional + // runtime_top_p [1] or [batch_size] on cpu, optional + // beam_search_diversity_rate [1] or [batch_size] on cpu, optional + // temperature [1] or [batch_size] on cpu, optional + // len_penalty [1] or [batch_size] on cpu, optional + // repetition_penalty [1] or [batch_size] on cpu, optional + // random_seed [1] or [batch_size] on cpu, optional + // prefix_soft_prompt_lengths [batch_size], optional + // prefix_soft_prompt_embedding [batch_size, max_prefix_soft_prompt_length, hidden_units], float, optional // output_tensors: - // output_ids [batch_size, beam, max_output_seq_len] - // parent_ids [max_output_seq_len, batch_size, beam] - // sequence_length [batch_size * beam] - // output_cum_log_probs [request_output_seq_len, batch_size, beam], must be float*. - // It leads to additional computing cost. If we don't need this result, please put nullptr + // output_ids [batch_size, beam_width, max_output_seq_len] + // sequence_length [batch_size, beam_width] + // output_log_probs [batch_size, beam_width, request_output_seq_len], must be float*. + // optional. It leads to additional computing cost. If we don't need this result, don't put it. + // cum_log_probs [batch_size, beam], optional, must be float*. + // optional. It leads to additional computing cost. If we don't need this result, don't put it. // Step is from max_input_length ~ max_output_seq_len, // When step = k, we put output ids and caches at step k, and the sequence_length would be k - 1 before @@ -479,61 +359,169 @@ void GptJ::forward(std::vector* output_tensors, // When there is no input_ids, put the start token at step 0 of output_ids_buf_. After forward, only copy // the step 1 ~ max_output_seq_len of output_ids_buf_ to output_tensors->at(0).data - FT_CHECK(input_tensors->size() == 3); - FT_CHECK(output_tensors->size() == 4); - isValidSeqLen(output_tensors->at(0).shape[2]); - isValidBatchSize(output_tensors->at(0).shape[0]); - isValidInputSeqLen(input_tensors->at(0).shape[1]); - allocateBuffer(); + FT_CHECK_WITH_INFO(input_tensors->size() >= 3, "input_tensors->size() >= 3"); + FT_CHECK_WITH_INFO(output_tensors->size() >= 2, "output_tensors->size() >= 2"); + FT_CHECK(input_tensors->at("input_ids").shape.size() == 2); + FT_CHECK(input_tensors->at("input_lengths").shape.size() == 1); + FT_CHECK(input_tensors->at("max_output_seq_len").shape.size() == 1 + || input_tensors->at("max_output_seq_len").shape.size() == 2); + FT_CHECK(output_tensors->at("output_ids").shape.size() == 3); + FT_CHECK(output_tensors->at("sequence_length").shape.size() == 2); + FT_CHECK_WITH_INFO(input_tensors->at("input_ids").shape[0] == output_tensors->at("output_ids").shape[0], + "input_tensors->at(\"input_ids\").shape[0] == output_tensors->at(\"output_ids\").shape[0]"); + + const size_t batch_size = output_tensors->at("output_ids").shape[0]; + const size_t beam_width = output_tensors->at("output_ids").shape[1]; + int max_input_length = input_tensors->at("input_ids").shape[1]; + const size_t max_prefix_soft_prompt_length = input_tensors->count("prefix_soft_prompt_embedding") ? + input_tensors->at("prefix_soft_prompt_embedding").shape[1] : + 0; + const size_t max_output_seq_len = *std::max_element(input_tensors->at("max_output_seq_len").getPtr(), + input_tensors->at("max_output_seq_len").getPtr() + + input_tensors->at("max_output_seq_len").shape[0]) + + (max_input_length == 0 ? 1 : 0) // additional 1 to put start token + + max_prefix_soft_prompt_length; + const size_t max_seq_len = max_output_seq_len; + allocateBuffer(batch_size, beam_width, max_seq_len, max_input_length + max_prefix_soft_prompt_length); sync_check_cuda_error(); + bool has_diff_runtime_args = hasDiffRuntimeArgs(input_tensors); - int max_input_length = input_tensors->at(0).shape[1]; - const int* input_length_ptr = (const int*)(input_tensors->at(1).data); - const size_t max_output_seq_len = - (*((int*)input_tensors->at(2).data)) + (max_input_length == 0 ? 1 : 0); // additional 1 to put start token - FT_CHECK(max_output_seq_len <= max_seq_len_); + const bool has_per_item_requested_length = input_tensors->at("max_output_seq_len").shape.size() > 1; - const size_t batch_size = output_tensors->at(0).shape[0]; - int* sequence_lengths = (int*)(output_tensors->at(2).data); + int* sequence_lengths = (int*)(output_tensors->at("sequence_length").data); const DataType data_type = getTensorType(); - const std::vector self_k_cache_size = {num_layer_ / pipeline_para_size_, - batch_size * beam_width_, - local_head_num_, - size_per_head_ / (16 / sizeof(T)), - max_output_seq_len, - 16 / sizeof(T)}; - const std::vector self_v_cache_size = {num_layer_ / pipeline_para_size_, - batch_size * beam_width_, - local_head_num_, - max_output_seq_len, - size_per_head_}; - float* output_cum_log_probs = (float*)(output_tensors->at(3).data); + handleOptArg(input_tensors, "start_id", start_ids_buf_, start_id_, batch_size); + handleOptArg(input_tensors, "end_id", end_ids_buf_, end_id_, batch_size); + + const std::vector self_k_cache_shape = {num_layer_ / pipeline_para_.world_size_, + batch_size * beam_width, + local_head_num_, + size_per_head_ / (16 / sizeof(T)), + max_output_seq_len, + 16 / sizeof(T)}; + const std::vector self_v_cache_shape = {num_layer_ / pipeline_para_.world_size_, + batch_size * beam_width, + local_head_num_, + max_output_seq_len, + size_per_head_}; // initialize the output ids and parent ids - cudaMemsetAsync(output_ids_buf_, 0, sizeof(int) * batch_size * beam_width_ * max_seq_len_, stream_); - cudaMemsetAsync(parent_ids_buf_, 0, sizeof(int) * batch_size * beam_width_ * max_seq_len_, stream_); + cudaMemsetAsync(output_ids_buf_, 0, sizeof(int) * batch_size * beam_width * max_seq_len, stream_); + cudaMemsetAsync(parent_ids_buf_, 0, sizeof(int) * batch_size * beam_width * max_seq_len, stream_); + if (beam_width > 1) { + cudaMemsetAsync(cache_indirections_[0], 0, 2 * sizeof(int) * batch_size * beam_width * max_seq_len, stream_); + } sync_check_cuda_error(); // handle first step - if (max_input_length == 0) { + if (input_tensors->count("prefix_soft_prompt_embedding") || max_input_length >= 1) { + invokeTileGptInputs(tiled_input_ids_buf_, + tiled_input_lengths_buf_, + (int*)input_tensors->at("input_ids").data, + (const int*)(input_tensors->at("input_lengths").data), + batch_size, + beam_width, + max_input_length, + stream_); + sync_check_cuda_error(); + + if (input_tensors->count("prefix_soft_prompt_embedding")) { + inputIdsEmbeddingLookupPosEncodingSoftPromptParam param; + param.from_tensor = context_decoder_input_buf_; + param.output_ids = output_ids_buf_; + param.input_lengths = tiled_input_lengths_buf_; + param.embedding_table = gpt_weights->pre_decoder_embedding_table; + param.pos_table = gpt_weights->position_encoding_table; + param.prefix_soft_prompt_embedding = input_tensors->at("prefix_soft_prompt_embedding").getPtr(); + param.prefix_soft_prompt_lengths = input_tensors->at("prefix_soft_prompt_lengths").getPtr(); + param.input_ids = tiled_input_ids_buf_; + param.start_step = 1; + param.max_input_length = max_input_length; + param.max_prefix_soft_prompt_length = max_prefix_soft_prompt_length; + param.batch_size = batch_size; + param.beam_width = beam_width; + param.hidden_units = hidden_units_; + param.stream = stream_; + + invokeInputIdsEmbeddingLookupPosEncodingSoftPrompt(param); + sync_check_cuda_error(); + max_input_length += max_prefix_soft_prompt_length; // view soft_prompt as input + } + else { + invokeInputIdsEmbeddingLookupPosEncoding(context_decoder_input_buf_, + output_ids_buf_, + gpt_weights->pre_decoder_embedding_table, + gpt_weights->position_encoding_table, + tiled_input_ids_buf_, + 1, + max_input_length, + max_input_length, + batch_size * beam_width, + hidden_units_, + stream_); + sync_check_cuda_error(); + } + + invokeBuildDecoderAttentionMask( + input_attention_mask_, tiled_input_lengths_buf_, batch_size * beam_width, max_input_length, stream_); + sync_check_cuda_error(); + + std::unordered_map decoder_input_tensors{ + {"decoder_input", + Tensor{MEMORY_GPU, + data_type, + {batch_size * beam_width, (size_t)max_input_length, hidden_units_}, + context_decoder_input_buf_}}, + {"attention_mask", + Tensor{MEMORY_GPU, + data_type, + {batch_size * beam_width, 1, (size_t)max_input_length, (size_t)max_input_length}, + input_attention_mask_}}, + {"input_lengths", Tensor{MEMORY_GPU, TYPE_INT32, {batch_size * beam_width}, tiled_input_lengths_buf_}}}; + + std::unordered_map decoder_output_tensors{ + {"decoder_output", + Tensor{MEMORY_GPU, + data_type, + {batch_size * beam_width, (size_t)max_input_length, hidden_units_}, + context_decoder_output_buf_}}, + {"key_cache", Tensor{MEMORY_GPU, data_type, self_k_cache_shape, key_cache_}}, + {"value_cache", Tensor{MEMORY_GPU, data_type, self_v_cache_shape, value_cache_}}, + {"last_token_hidden_units", + Tensor{MEMORY_GPU, data_type, {batch_size * beam_width, hidden_units_}, decoder_output_buf_}}}; + + gpt_context_decoder_->forward( + &decoder_output_tensors, &decoder_input_tensors, &gpt_weights->decoder_layer_weights); + + invokeDecodingInitialize(finished_buf_, + sequence_lengths, + nullptr, + cum_log_probs_, + start_ids_buf_, + batch_size, + beam_width, + max_input_length - 1, + stream_); + sync_check_cuda_error(); + } + else if (max_input_length == 0) { max_input_length++; invokeDecodingInitialize(finished_buf_, sequence_lengths, output_ids_buf_, cum_log_probs_, - start_id_, + start_ids_buf_, batch_size, - beam_width_, + beam_width, max_input_length - 1, stream_); - std::vector h_input_lengths(batch_size * beam_width_, 1); - cudaMemcpyAsync(input_length_buf_, + std::vector h_input_lengths(batch_size * beam_width, 1); + cudaMemcpyAsync(tiled_input_lengths_buf_, h_input_lengths.data(), - sizeof(int) * batch_size * beam_width_, + sizeof(int) * batch_size * beam_width, cudaMemcpyHostToDevice, stream_); - input_length_ptr = input_length_buf_; sync_check_cuda_error(); } else if (max_input_length == 1) { @@ -541,71 +529,28 @@ void GptJ::forward(std::vector* output_tensors, sequence_lengths, nullptr, cum_log_probs_, - start_id_, + start_ids_buf_, batch_size, - beam_width_, + beam_width, max_input_length - 1, stream_); sync_check_cuda_error(); + invokeTileGptInputs(tiled_input_ids_buf_, + tiled_input_lengths_buf_, + (int*)input_tensors->at("input_ids").data, + (const int*)(input_tensors->at("input_lengths").data), + batch_size, + beam_width, + max_input_length, + stream_); + sync_check_cuda_error(); cudaMemcpyAsync(output_ids_buf_, - (int*)input_tensors->at(0).data, - sizeof(int) * batch_size * beam_width_, + tiled_input_ids_buf_, + sizeof(int) * batch_size * beam_width, cudaMemcpyDeviceToDevice, stream_); } - else if (max_input_length > 1) { - invokeBuildDecoderAttentionMask( - input_attention_mask_, input_length_ptr, batch_size * beam_width_, max_input_length, stream_); - sync_check_cuda_error(); - - invokeInputIdsEmbeddingLookupPosEncoding(context_decoder_input_buf_, - output_ids_buf_, - gpt_weights->pre_decoder_embedding_table, - gpt_weights->position_encoding_table, - (int*)input_tensors->at(0).data, - 1, - max_input_length, - max_input_length, - batch_size * beam_width_, - hidden_units_, - stream_); - - std::vector decoder_input_tensors{ - Tensor{MEMORY_GPU, - data_type, - {batch_size * beam_width_, (size_t)max_input_length, hidden_units_}, - context_decoder_input_buf_}, - Tensor{MEMORY_GPU, - data_type, - {batch_size * beam_width_, 1, (size_t)max_input_length, (size_t)max_input_length}, - input_attention_mask_}, - Tensor{MEMORY_GPU, TYPE_INT32, {batch_size * beam_width_}, input_length_ptr}}; - - const int src_cache_id = beam_width_ > 1 ? (max_input_length - 1) & 0x1 : 0; - std::vector decoder_output_tensors{ - Tensor{MEMORY_GPU, - data_type, - {batch_size * beam_width_, (size_t)max_input_length, hidden_units_}, - context_decoder_output_buf_}, - Tensor{MEMORY_GPU, data_type, self_k_cache_size, key_caches_[src_cache_id]}, - Tensor{MEMORY_GPU, data_type, self_v_cache_size, value_caches_[src_cache_id]}, - Tensor{MEMORY_GPU, data_type, {batch_size * beam_width_, hidden_units_}, decoder_output_buf_}}; - - gpt_context_decoder_->forward( - &decoder_output_tensors, &decoder_input_tensors, &gpt_weights->decoder_layer_weights); - - invokeDecodingInitialize(finished_buf_, - sequence_lengths, - nullptr, - cum_log_probs_, - start_id_, - batch_size, - beam_width_, - max_input_length - 1, - stream_); - sync_check_cuda_error(); - } if (vocab_size_ == vocab_size_padded_) { padded_embedding_kernel_ptr_ = gpt_weights->post_decoder_embedding.kernel; @@ -626,75 +571,88 @@ void GptJ::forward(std::vector* output_tensors, } for (int step = max_input_length; step < (int)max_output_seq_len; step++) { - const int src_cache_id = beam_width_ > 1 ? (step - 1) & 0x1 : 0; - const int tgt_cache_id = 1 - src_cache_id; + const int src_indir_idx = (step - max_input_length) % 2; + const int tgt_indir_idx = 1 - src_indir_idx; - const size_t local_batch_size = getLocalBatchSize(batch_size, 1, pipeline_para_size_); + const size_t local_batch_size = getLocalBatchSize(batch_size, 1, pipeline_para_.world_size_); FT_CHECK(batch_size % local_batch_size == 0); const size_t iteration_num = batch_size / local_batch_size; for (uint ite = 0; ite < iteration_num; ++ite) { - const int id_offset = ite * local_batch_size * beam_width_; + const int id_offset = ite * local_batch_size * beam_width; const int hidden_units_offset = id_offset * hidden_units_; const int vocab_size_units_offset = id_offset * vocab_size_padded_; if (!(max_input_length > 1 && step == max_input_length)) { - if (pipeline_para_rank_ == 0) { + if (pipeline_para_.rank_ == 0) { invokeEmbeddingLookupPosEncoding(decoder_input_buf_ + hidden_units_offset, gpt_weights->pre_decoder_embedding_table, gpt_weights->position_encoding_table, output_ids_buf_ + id_offset, - input_length_ptr + id_offset, - local_batch_size * beam_width_, + tiled_input_lengths_buf_ + id_offset, + local_batch_size * beam_width, hidden_units_, (T)(1.0f), step - 1, max_input_length, - batch_size * beam_width_, + batch_size * beam_width, 0, stream_); sync_check_cuda_error(); } - - std::vector decoder_input_tensors{ - Tensor{MEMORY_GPU, - data_type, - {local_batch_size * beam_width_, hidden_units_}, - decoder_input_buf_ + hidden_units_offset}, - Tensor{MEMORY_GPU, TYPE_BOOL, {local_batch_size * beam_width_}, finished_buf_ + id_offset}, - Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size * beam_width_}, sequence_lengths + id_offset}, - Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size * beam_width_}, input_length_ptr + id_offset}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &max_input_length}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &step}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &ite}}; - std::vector decoder_output_tensors{ - Tensor{MEMORY_GPU, - data_type, - {local_batch_size * beam_width_, hidden_units_}, - decoder_output_buf_ + hidden_units_offset}, - Tensor{MEMORY_GPU, data_type, self_k_cache_size, key_caches_[src_cache_id]}, - Tensor{MEMORY_GPU, data_type, self_v_cache_size, value_caches_[src_cache_id]}}; + std::unordered_map decoder_input_tensors{ + {"decoder_input", + Tensor{MEMORY_GPU, + data_type, + {local_batch_size * beam_width, hidden_units_}, + decoder_input_buf_ + hidden_units_offset}}, + {"finished", + Tensor{MEMORY_GPU, TYPE_BOOL, {local_batch_size * beam_width}, finished_buf_ + id_offset}}, + {"sequence_lengths", + Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size * beam_width}, sequence_lengths + id_offset}}, + {"input_lengths", + Tensor{MEMORY_GPU, + TYPE_INT32, + {local_batch_size * beam_width}, + tiled_input_lengths_buf_ + id_offset}}, + {"max_input_length", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &max_input_length}}, + {"step", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &step}}, + {"ite", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &ite}}, + {"cache_indirection", + Tensor{MEMORY_GPU, + TYPE_INT32, + {local_batch_size, beam_width, max_output_seq_len}, + beam_width > 1 ? cache_indirections_[src_indir_idx] + id_offset * max_output_seq_len : + nullptr}}}; + std::unordered_map decoder_output_tensors{ + {"decoder_output", + Tensor{MEMORY_GPU, + data_type, + {local_batch_size * beam_width, hidden_units_}, + decoder_output_buf_ + hidden_units_offset}}, + {"key_cache", Tensor{MEMORY_GPU, data_type, self_k_cache_shape, key_cache_}}, + {"value_cache", Tensor{MEMORY_GPU, data_type, self_v_cache_shape, value_cache_}}}; gpt_decoder_->forward( &decoder_output_tensors, &decoder_input_tensors, &gpt_weights->decoder_layer_weights); } - if (pipeline_para_rank_ == pipeline_para_size_ - 1) { + if (pipeline_para_.rank_ == pipeline_para_.world_size_ - 1) { invokeGeneralLayerNorm(normed_decoder_output_buf_ + hidden_units_offset, decoder_output_buf_ + hidden_units_offset, gpt_weights->post_decoder_layernorm.gamma, gpt_weights->post_decoder_layernorm.beta, - local_batch_size * beam_width_, + local_batch_size * beam_width, hidden_units_, stream_); sync_check_cuda_error(); - if (tensor_para_size_ == 1) { + if (tensor_para_.world_size_ == 1) { float alpha = 1.0f; float beta = 0.0f; cublas_wrapper_->Gemm(CUBLAS_OP_T, CUBLAS_OP_N, vocab_size_padded_, // n - local_batch_size * beam_width_, + local_batch_size * beam_width, hidden_units_, // k &alpha, padded_embedding_kernel_ptr_, @@ -711,18 +669,18 @@ void GptJ::forward(std::vector* output_tensors, cublasGemmAlgo_t(-1)); } else { - FT_CHECK(vocab_size_padded_ % tensor_para_size_ == 0); - const int local_vocab_size = vocab_size_padded_ / tensor_para_size_; + FT_CHECK(vocab_size_padded_ % tensor_para_.world_size_ == 0); + const int local_vocab_size = vocab_size_padded_ / tensor_para_.world_size_; float alpha = 1.0f; float beta = 0.0f; cublas_wrapper_->Gemm(CUBLAS_OP_T, CUBLAS_OP_N, local_vocab_size, // n - local_batch_size * beam_width_, + local_batch_size * beam_width, hidden_units_, // k &alpha, padded_embedding_kernel_ptr_ - + tensor_para_rank_ * local_vocab_size * hidden_units_, + + tensor_para_.rank_ * local_vocab_size * hidden_units_, sizeof(T) == 2 ? CUDA_R_16F : CUDA_R_32F, hidden_units_, // k normed_decoder_output_buf_ + hidden_units_offset, @@ -730,110 +688,121 @@ void GptJ::forward(std::vector* output_tensors, hidden_units_, // k &beta, nccl_logits_buf_ + vocab_size_units_offset - + tensor_para_rank_ * local_batch_size * beam_width_ * local_vocab_size, + + tensor_para_.rank_ * local_batch_size * beam_width * local_vocab_size, CUDA_R_32F, local_vocab_size, /* n */ CUDA_R_32F, cublasGemmAlgo_t(-1)); ftNcclAllGather(nccl_logits_buf_ + vocab_size_units_offset, nccl_logits_buf_ + vocab_size_units_offset, - local_batch_size * beam_width_ * local_vocab_size, - tensor_para_rank_, - tensor_para_comm_, + local_batch_size * beam_width * local_vocab_size, + tensor_para_.rank_, + tensor_para_, stream_); check_cuda_error(cudaStreamSynchronize(stream_)); invokeTransposeAxis01(logits_buf_ + vocab_size_units_offset, nccl_logits_buf_ + vocab_size_units_offset, - tensor_para_size_, - local_batch_size * beam_width_, + tensor_para_.world_size_, + local_batch_size * beam_width, local_vocab_size, stream_); } invokeAddBias(logits_buf_ + vocab_size_units_offset, padded_embedding_bias_ptr_, - local_batch_size * beam_width_, + local_batch_size * beam_width, vocab_size_padded_, stream_); - std::vector* dynamic_decode_input_tensors; - std::vector* dynamic_decode_output_tensors; - if (beam_width_ > 1) { - dynamic_decode_input_tensors = new std::vector{ - Tensor{MEMORY_GPU, - data_type, - {local_batch_size, beam_width_, vocab_size_padded_}, - logits_buf_ + vocab_size_units_offset}, - Tensor{MEMORY_GPU, data_type, {vocab_size_padded_}, nullptr}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &step}, - Tensor{MEMORY_GPU, data_type, self_k_cache_size, key_caches_[src_cache_id]}, - Tensor{MEMORY_GPU, data_type, self_v_cache_size, value_caches_[src_cache_id]}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &max_input_length}, - Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size, beam_width_}, input_length_ptr + id_offset}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &ite}}; - - dynamic_decode_output_tensors = new std::vector{ - Tensor{MEMORY_GPU, TYPE_INT32, {max_output_seq_len, batch_size, beam_width_}, output_ids_buf_}, - Tensor{MEMORY_GPU, TYPE_BOOL, {local_batch_size * beam_width_}, finished_buf_ + id_offset}, - Tensor{MEMORY_GPU, TYPE_FP32, {local_batch_size * beam_width_}, cum_log_probs_ + id_offset}, - Tensor{MEMORY_GPU, TYPE_INT32, {max_output_seq_len, batch_size, beam_width_}, parent_ids_buf_}, - Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size * beam_width_}, sequence_lengths + id_offset}, - Tensor{MEMORY_GPU, data_type, self_k_cache_size, key_caches_[tgt_cache_id]}, - Tensor{MEMORY_GPU, data_type, self_v_cache_size, value_caches_[tgt_cache_id]}}; + int tmp_local_batch_size = local_batch_size; + bool is_initialize_random_table = step == max_input_length; + std::unordered_map dynamic_decode_input_tensors{ + {"logits", + Tensor{MEMORY_GPU, TYPE_FP32, {batch_size, beam_width, vocab_size_padded_}, logits_buf_}}, + {"embedding_bias", Tensor{MEMORY_GPU, data_type, {vocab_size_padded_}, nullptr}}, + {"step", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &step}}, + {"max_input_length", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &max_input_length}}, + {"input_lengths", + Tensor{MEMORY_GPU, TYPE_INT32, {batch_size, beam_width}, tiled_input_lengths_buf_}}, + {"ite", Tensor{MEMORY_CPU, TYPE_UINT32, {1}, &ite}}, + {"has_diff_runtime_args", Tensor{MEMORY_CPU, TYPE_BOOL, {1}, &has_diff_runtime_args}}, + {"src_key_cache", Tensor{MEMORY_GPU, data_type, self_k_cache_shape, key_cache_}}, + {"src_value_cache", Tensor{MEMORY_GPU, data_type, self_v_cache_shape, value_cache_}}, + {"src_cache_indirection", + Tensor{MEMORY_GPU, + TYPE_INT32, + {local_batch_size, beam_width, max_output_seq_len}, + cache_indirections_[src_indir_idx] + id_offset * max_output_seq_len}}, + {"local_batch_size", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &tmp_local_batch_size}}, + {"end_id", Tensor{MEMORY_GPU, TYPE_INT32, {batch_size}, end_ids_buf_}}, + {"is_initialize_random_table", Tensor{MEMORY_CPU, TYPE_BOOL, {1}, &is_initialize_random_table}}}; + + for (auto t = input_tensors->begin(); t != input_tensors->end(); ++t) { + if (dynamic_decode_input_tensors.find(t->first) == dynamic_decode_input_tensors.end()) { + dynamic_decode_input_tensors.insert(*t); + } } - else { - dynamic_decode_input_tensors = new std::vector{ - Tensor{MEMORY_GPU, - data_type, - {local_batch_size, vocab_size_padded_}, - logits_buf_ + vocab_size_units_offset}, - Tensor{MEMORY_GPU, data_type, {vocab_size_padded_}, nullptr}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &step}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &max_input_length}, - Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size}, input_length_ptr + id_offset}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &ite}}; - - dynamic_decode_output_tensors = new std::vector{ - Tensor{MEMORY_GPU, - TYPE_INT32, - {max_output_seq_len, batch_size}, - output_ids_buf_}, // note that we need to put whole output_ids here - Tensor{MEMORY_GPU, TYPE_BOOL, {local_batch_size}, finished_buf_ + id_offset}, - Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size}, sequence_lengths + id_offset}, - Tensor{MEMORY_GPU, - TYPE_FP32, - {local_batch_size}, - output_cum_log_probs == nullptr ? - nullptr : - output_cum_log_probs + (step - max_input_length) * batch_size * beam_width_ - + id_offset}}; + + // common outputs + std::unordered_map dynamic_decode_output_tensors{ + {"output_ids", + Tensor{MEMORY_GPU, TYPE_INT32, {max_seq_len, batch_size, beam_width}, output_ids_buf_}}, + {"finished", Tensor{MEMORY_GPU, TYPE_BOOL, {batch_size * beam_width}, finished_buf_}}, + // cum_log_probs is necessary for beam search, while it is optional for sampling. + {"cum_log_probs", + Tensor{MEMORY_GPU, + TYPE_FP32, + {batch_size * beam_width}, + ((beam_width > 1) || (output_tensors->count("cum_log_probs") > 0)) ? cum_log_probs_ : + nullptr}}, + {"output_log_probs", + Tensor{MEMORY_GPU, + TYPE_FP32, + {max_seq_len, batch_size, beam_width}, + output_tensors->count("output_log_probs") > 0 + && output_tensors->at("output_log_probs").data != nullptr ? + output_log_probs_buf_ : + nullptr}}, + {"parent_ids", + Tensor{MEMORY_GPU, TYPE_INT32, {max_seq_len, batch_size, beam_width}, parent_ids_buf_}}, + {"sequence_length", Tensor{MEMORY_GPU, TYPE_INT32, {batch_size * beam_width}, sequence_lengths}}, + {"tgt_cache_indirection", + Tensor{MEMORY_GPU, + TYPE_INT32, + {local_batch_size, beam_width, max_output_seq_len}, + cache_indirections_[tgt_indir_idx] + id_offset * max_output_seq_len}}}; + + for (auto t = output_tensors->begin(); t != output_tensors->end(); ++t) { + // Handle exceptions. + if (t->first == "cum_log_probs" || t->first == "output_log_probs") { + continue; + } + dynamic_decode_output_tensors.insert(*t); } - dynamic_decode_->forward(dynamic_decode_output_tensors, dynamic_decode_input_tensors); - delete dynamic_decode_input_tensors; - delete dynamic_decode_output_tensors; + dynamic_decode_layer_->forward(&dynamic_decode_output_tensors, &dynamic_decode_input_tensors); } } - if (pipeline_para_size_ > 1) { + if (pipeline_para_.world_size_ > 1) { NCCLCHECK(ncclGroupStart()); - ftNcclBroadCast(output_ids_buf_ + step * batch_size * beam_width_, - batch_size * beam_width_, - pipeline_para_size_ - 1, - pipeline_para_comm_, + ftNcclBroadCast(output_ids_buf_ + step * batch_size * beam_width, + batch_size * beam_width, + pipeline_para_.world_size_ - 1, + pipeline_para_, stream_); ftNcclBroadCast( - sequence_lengths, batch_size * beam_width_, pipeline_para_size_ - 1, pipeline_para_comm_, stream_); + sequence_lengths, batch_size * beam_width, pipeline_para_.world_size_ - 1, pipeline_para_, stream_); ftNcclBroadCast( - finished_buf_, batch_size * beam_width_, pipeline_para_size_ - 1, pipeline_para_comm_, stream_); + finished_buf_, batch_size * beam_width, pipeline_para_.world_size_ - 1, pipeline_para_, stream_); - if (beam_width_ > 1) { - ftNcclBroadCast(parent_ids_buf_ + step * batch_size * beam_width_, - batch_size * beam_width_, - pipeline_para_size_ - 1, - pipeline_para_comm_, + if (beam_width > 1) { + ftNcclBroadCast(cache_indirections_[tgt_indir_idx], + batch_size * beam_width * max_output_seq_len, + pipeline_para_.world_size_ - 1, + pipeline_para_, stream_); } NCCLCHECK(ncclGroupEnd()); @@ -841,133 +810,187 @@ void GptJ::forward(std::vector* output_tensors, sync_check_cuda_error(); } - if (pipeline_para_rank_ != pipeline_para_size_ - 1 && beam_width_ > 1) { - // update kv cache of other pipeline_para_rank since they don't - // enter the beam search - update_KV_cache_kernelLauncher(key_caches_[tgt_cache_id], - value_caches_[tgt_cache_id], - key_caches_[src_cache_id], - value_caches_[src_cache_id], - parent_ids_buf_ + step * batch_size * beam_width_, - finished_buf_, - batch_size, - batch_size, - beam_width_, - local_head_num_, - size_per_head_, - step, - max_output_seq_len, - batch_size * beam_width_ * local_head_num_ * size_per_head_ - * max_output_seq_len, - num_layer_ / pipeline_para_size_, - 0, - stream_); - sync_check_cuda_error(); - } - - cudaD2Hcpy(h_finished_buf_, finished_buf_, batch_size * beam_width_); + cudaD2Hcpy(h_finished_buf_, finished_buf_, batch_size * beam_width); uint sum = 0; - for (uint i = 0; i < batch_size * beam_width_; i++) { + for (uint i = 0; i < batch_size * beam_width; i++) { + if (has_per_item_requested_length) { + h_finished_buf_[i] |= + step >= reinterpret_cast(input_tensors->at("max_output_seq_len").data)[i / beam_width]; + } sum += (int)h_finished_buf_[i]; } - if (sum == batch_size * beam_width_) { + if (has_per_item_requested_length) { + cudaH2Dcpy(finished_buf_, h_finished_buf_, batch_size * beam_width); + } + if (sum == batch_size * beam_width) { break; } } - if (input_tensors->at(0).shape[1] == 0) { - if (beam_width_ > 1) { - // For beam search, do gather_tree - // take output_parent_ids as inter buffer - invokeGatherTree((int*)output_tensors->at(1).data, - (int*)output_tensors->at(2).data, - max_output_seq_len - 1, - batch_size, - beam_width_, - output_ids_buf_ + batch_size * beam_width_, - parent_ids_buf_ + batch_size * beam_width_, - end_id_, - stream_); - - invokeTransposeAxis01((int*)output_tensors->at(0).data, - (int*)output_tensors->at(1).data, - max_output_seq_len - 1, - batch_size * beam_width_, - 1, - stream_); + if (pipeline_para_.rank_ == pipeline_para_.world_size_ - 1) { + if (input_tensors->at("input_ids").shape[1] == 0) { + if (beam_width > 1) { + // For beam search, do gather_tree + // take output_parent_ids as inter buffer + invokeGatherTree(transposed_output_ids_buf_, + sequence_lengths, + max_output_seq_len, + batch_size, + beam_width, + output_ids_buf_ + batch_size * beam_width, + parent_ids_buf_ + batch_size * beam_width, + end_ids_buf_, + stream_); - cudaD2Dcpy((int*)output_tensors->at(1).data, - parent_ids_buf_ + batch_size * beam_width_, - batch_size * beam_width_ * (max_output_seq_len - 1)); + // transpose and take output_parent_ids as inter buffer + invokeTransposeAxis01((int*)output_tensors->at("output_ids").data, + transposed_output_ids_buf_, + max_output_seq_len - 1, + batch_size * beam_width, + 1, + stream_); + } + else { + // For sampling, only copy the results to output_tensor + invokeTransposeAxis01((int*)output_tensors->at("output_ids").data, + output_ids_buf_ + batch_size * beam_width, + max_output_seq_len - 1, + batch_size * beam_width, + 1, + stream_); + } } else { - // For sampling, only copy the results to output_tensor - invokeTransposeAxis01((int*)output_tensors->at(0).data, - output_ids_buf_ + batch_size * beam_width_, - max_output_seq_len - 1, - batch_size * beam_width_, + // add sequence_length 1 here because the sequence_length of time step t is t - 1 + invokePlusScalar(sequence_lengths, 1, batch_size * beam_width, stream_); + + // For sampling, it is equivalent to all parent ids are 0. + gatherTreeParam param; + param.beams = transposed_output_ids_buf_; + param.max_sequence_lengths = sequence_lengths; + param.max_time = max_output_seq_len; + param.batch_size = batch_size; + param.beam_width = beam_width; + param.step_ids = output_ids_buf_; + param.parent_ids = beam_width == 1 ? nullptr : parent_ids_buf_; + param.end_tokens = end_ids_buf_; + param.max_input_length = max_input_length; + param.prefix_soft_prompt_lengths = input_tensors->count("prefix_soft_prompt_lengths") ? + input_tensors->at("prefix_soft_prompt_lengths").getPtr() : + nullptr; + param.input_lengths = tiled_input_lengths_buf_; + param.max_prefix_soft_prompt_length = max_prefix_soft_prompt_length; + param.stream = stream_; + param.output_ids = (int*)output_tensors->at("output_ids").data; + invokeGatherTree(param); + sync_check_cuda_error(); + } + if ((output_tensors->count("output_log_probs") > 0 && output_tensors->at("output_log_probs").data != nullptr)) { + invokeTransposeAxis01(output_tensors->at("output_log_probs").getPtr(), + output_log_probs_buf_, + input_tensors->at("max_output_seq_len").getVal() - max_input_length, + batch_size * beam_width, 1, stream_); } + // Return the cumulative log probability if requested. + if (output_tensors->count("cum_log_probs") > 0) { + Tensor cum_log_probs = output_tensors->at("cum_log_probs"); + FT_CHECK_WITH_INFO(cum_log_probs.size() == batch_size * beam_width, + "The shape of cum_log_probs does not match with batch_size x beam_width."); + cudaD2Dcpy(cum_log_probs.getPtr(), cum_log_probs_, batch_size * beam_width); + } } - else { - if (beam_width_ > 1) { - // For beam search, do gather_tree - // take output_parent_ids as inter buffer - invokeGatherTree((int*)output_tensors->at(1).data, - (int*)output_tensors->at(2).data, - max_output_seq_len, - batch_size, - beam_width_, - output_ids_buf_, - parent_ids_buf_, - -1, - stream_); - - invokeTransposeAxis01((int*)output_tensors->at(0).data, - (int*)output_tensors->at(1).data, - max_output_seq_len, - batch_size * beam_width_, - 1, - stream_); - cudaD2Dcpy( - (int*)output_tensors->at(1).data, parent_ids_buf_, batch_size * beam_width_ * max_output_seq_len); + if (pipeline_para_.world_size_ > 1) { + NCCLCHECK(ncclGroupStart()); + if (pipeline_para_.rank_ == pipeline_para_.world_size_ - 1) { + ftNcclSend(output_tensors->at("output_ids").getPtr(), + batch_size * beam_width * max_output_seq_len, + 0, + pipeline_para_, + stream_); + + ftNcclSend(output_tensors->at("sequence_length").getPtr(), + batch_size * beam_width, + 0, + pipeline_para_, + stream_); + + if (output_tensors->count("cum_log_probs") > 0 && output_tensors->at("cum_log_probs").data != nullptr) { + ftNcclSend(output_tensors->at("cum_log_probs").getPtr(), + batch_size * beam_width, + 0, + pipeline_para_, + stream_); + } + + if (output_tensors->count("output_log_probs") > 0 + && output_tensors->at("output_log_probs").data != nullptr) { + ftNcclSend(output_tensors->at("output_log_probs").getPtr(), + batch_size * beam_width * input_tensors->at("max_output_seq_len").getVal(), + 0, + pipeline_para_, + stream_); + } } - else { - // For sampling, only copy the results to output_tensor - invokeTransposeAxis01((int*)output_tensors->at(0).data, - output_ids_buf_, - max_output_seq_len, - batch_size * beam_width_, - 1, - stream_); + else if (pipeline_para_.rank_ == 0) { + ftNcclRecv(output_tensors->at("output_ids").getPtr(), + batch_size * beam_width * max_output_seq_len, + pipeline_para_.world_size_ - 1, + pipeline_para_, + stream_); + + ftNcclRecv(output_tensors->at("sequence_length").getPtr(), + batch_size * beam_width, + pipeline_para_.world_size_ - 1, + pipeline_para_, + stream_); + + if (output_tensors->count("cum_log_probs") > 0 && output_tensors->at("cum_log_probs").data != nullptr) { + ftNcclRecv(output_tensors->at("cum_log_probs").getPtr(), + batch_size * beam_width, + pipeline_para_.world_size_ - 1, + pipeline_para_, + stream_); + } + + if (output_tensors->count("output_log_probs") > 0 + && output_tensors->at("output_log_probs").data != nullptr) { + ftNcclRecv(output_tensors->at("output_log_probs").getPtr(), + batch_size * beam_width * input_tensors->at("max_output_seq_len").getVal(), + pipeline_para_.world_size_ - 1, + pipeline_para_, + stream_); + } } + NCCLCHECK(ncclGroupEnd()); + check_cuda_error(cudaStreamSynchronize(stream_)); } } template size_t GptJ::getPipelineParallelRank() { - return pipeline_para_rank_; + return pipeline_para_.rank_; } template size_t GptJ::getPipelineParallelSize() { - return pipeline_para_size_; + return pipeline_para_.world_size_; } template size_t GptJ::getTensorParallelRank() { - return tensor_para_rank_; + return tensor_para_.rank_; } template size_t GptJ::getTensorParallelSize() { - return tensor_para_size_; + return tensor_para_.world_size_; } template diff --git a/src/fastertransformer/models/gptj/GptJ.h b/src/fastertransformer/models/gptj/GptJ.h index d8ee3ee53..0b8c0eb9f 100644 --- a/src/fastertransformer/models/gptj/GptJ.h +++ b/src/fastertransformer/models/gptj/GptJ.h @@ -1,6 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. - * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -20,22 +19,18 @@ #include #include -#include "src/fastertransformer/layers/DynamicDecodeBaseLayer.h" +#include "src/fastertransformer/layers/DynamicDecodeLayer.h" #include "src/fastertransformer/models/gptj/GptJContextDecoder.h" #include "src/fastertransformer/models/gptj/GptJDecoder.h" #include "src/fastertransformer/models/gptj/GptJWeight.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" namespace fastertransformer { template class GptJ: public BaseLayer { private: - // buffer handling - size_t max_batch_size_ = 0; - size_t max_seq_len_ = 0; - size_t max_input_len_ = 0; // meta data - size_t beam_width_; size_t head_num_; size_t size_per_head_; size_t inter_size_; @@ -45,37 +40,25 @@ class GptJ: public BaseLayer { int start_id_; int end_id_; - float beam_search_diversity_rate_; size_t hidden_units_; - size_t top_k_; - float top_p_; - unsigned long long random_seed_; - - float temperature_; - float len_penalty_; - float repetition_penalty_; - - size_t tensor_para_size_; - size_t tensor_para_rank_; - ncclComm_t tensor_para_comm_; size_t local_head_num_; - size_t pipeline_para_size_; - size_t pipeline_para_rank_; - ncclComm_t pipeline_para_comm_; + NcclParam tensor_para_; + NcclParam pipeline_para_; + + std::shared_ptr custom_all_reduce_comm_; + int enable_custom_all_reduce_; size_t vocab_size_padded_; const bool is_context_qk_buf_float_ = true; GptJDecoder* gpt_decoder_; - DynamicDecodeBaseLayer* dynamic_decode_; GptJContextDecoder* gpt_context_decoder_; + DynamicDecodeLayer* dynamic_decode_layer_; void allocateBuffer() override; + void allocateBuffer(size_t batch_size, size_t beam_width, size_t max_seq_len, size_t max_input_len); void freeBuffer() override; - bool isValidBatchSize(size_t batch_size); - bool isValidSeqLen(size_t seq_len); - bool isValidInputSeqLen(size_t seq_len); void initialize(); @@ -91,7 +74,6 @@ class GptJ: public BaseLayer { T* decoder_output_buf_; T* normed_decoder_output_buf_; - //T* logits_buf_; float* logits_buf_; float* nccl_logits_buf_; float* cum_log_probs_; @@ -99,86 +81,90 @@ class GptJ: public BaseLayer { bool* finished_buf_; bool* h_finished_buf_; - T* key_caches_[2]; // ping-pong buffer - T* value_caches_[2]; // ping-pong buffer + T* key_cache_; + T* value_cache_; + int* cache_indirections_[2] = {nullptr, nullptr}; + int* tiled_input_ids_buf_; + int* tiled_input_lengths_buf_; + int* transposed_output_ids_buf_; int* output_ids_buf_; int* parent_ids_buf_; - int* input_length_buf_; + int* start_ids_buf_; + int* end_ids_buf_; T* context_decoder_input_buf_; T* context_decoder_output_buf_; + float* output_log_probs_buf_; public: - GptJ( - size_t max_batch_size, - size_t max_seq_len, - size_t max_input_len, - size_t beam_width, - size_t head_num, - size_t size_per_head, - size_t inter_size, - size_t num_layer, - size_t vocab_size, - size_t rotary_embedding_dim, - int start_id, - int end_id, - float beam_search_diversity_rate, - size_t top_k, - float top_p, - unsigned long long random_seed, - float temperature, - float len_penalty, - float repetition_penalty, - cudaStream_t stream, - cublasMMWrapper* cublas_wrapper, - IAllocator* allocator, - bool is_free_buffer_after_forward, - cudaDeviceProp* cuda_device_prop - ); - - GptJ( - size_t max_batch_size, - size_t max_seq_len, - size_t max_input_len, - size_t beam_width, - size_t head_num, - size_t size_per_head, - size_t inter_size, - size_t num_layer, - size_t vocab_size, - size_t rotary_embedding_dim, - int start_id, - int end_id, - float beam_search_diversity_rate, - size_t top_k, - float top_p, - unsigned long long random_seed, - float temperature, - float len_penalty, - float repetition_penalty, - size_t tensor_para_size, - size_t tensor_para_rank, - ncclComm_t tensor_para_comm, - size_t pipeline_para_size, - size_t pipeline_para_rank, - ncclComm_t pipeline_para_comm, - cudaStream_t stream, - cublasMMWrapper* cublas_wrapper, - IAllocator* allocator, - bool is_free_buffer_after_forward, - cudaDeviceProp* cuda_device_prop = nullptr - ); + GptJ(size_t max_batch_size, + size_t max_seq_len, + size_t max_input_len, + size_t beam_width, + size_t head_num, + size_t size_per_head, + size_t inter_size, + size_t num_layer, + size_t vocab_size, + size_t rotary_embedding_dim, + int start_id, + int end_id, + float beam_search_diversity_rate, + size_t top_k, + float top_p, + unsigned long long random_seed, + float temperature, + float len_penalty, + float repetition_penalty, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + cudaDeviceProp* cuda_device_prop, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce = 0); + + GptJ(size_t max_batch_size, + size_t max_seq_len, + size_t max_input_len, + size_t beam_width, + size_t head_num, + size_t size_per_head, + size_t inter_size, + size_t num_layer, + size_t vocab_size, + size_t rotary_embedding_dim, + int start_id, + int end_id, + float beam_search_diversity_rate, + size_t top_k, + float top_p, + unsigned long long random_seed, + float temperature, + float len_penalty, + float repetition_penalty, + NcclParam tensor_para, + NcclParam pipeline_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + cudaDeviceProp* cuda_device_prop = nullptr, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce = 0); GptJ(GptJ const& GptJ); ~GptJ(); - void forward( - std::vector* output_tensors, - const std::vector* input_tensors, - const GptJWeight* gpt_weights - ); + void forward(std::vector* output_tensors, + const std::vector* input_tensors, + const GptJWeight* gpt_weights); + + void forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors, + const GptJWeight* gpt_weights); size_t getPipelineParallelRank(); size_t getPipelineParallelSize(); diff --git a/src/fastertransformer/models/gptj/GptJContextDecoder.cc b/src/fastertransformer/models/gptj/GptJContextDecoder.cc index 401feb1ff..b5e226861 100644 --- a/src/fastertransformer/models/gptj/GptJContextDecoder.cc +++ b/src/fastertransformer/models/gptj/GptJContextDecoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,40 +17,43 @@ #include "src/fastertransformer/models/gptj/GptJContextDecoder.h" #include "src/fastertransformer/kernels/gpt_kernels.h" -#include "src/fastertransformer/layers/attention_layers/TensorParallelGptContextAttentionLayer.h" #include "src/fastertransformer/layers/TensorParallelGeluFfnLayer.h" +#include "src/fastertransformer/layers/attention_layers/TensorParallelGptContextAttentionLayer.h" namespace fastertransformer { template void GptJContextDecoder::initialize() { - self_attention_layer_ = new TensorParallelGptContextAttentionLayer( - max_batch_size_, - max_seq_len_, - head_num_, - size_per_head_, - rotary_embedding_dim_, - tensor_para_size_, - tensor_para_comm_, - stream_, - cublas_wrapper_, - allocator_, - is_free_buffer_after_forward_, - is_qk_buf_float_); - - ffn_layer_ = new TensorParallelGeluFfnLayer( - max_batch_size_, - max_seq_len_, - head_num_, - size_per_head_, - inter_size_, - tensor_para_size_, - tensor_para_comm_, - stream_, - cublas_wrapper_, - allocator_, - is_free_buffer_after_forward_); + self_attention_layer_ = new TensorParallelGptContextAttentionLayer(max_batch_size_, + max_seq_len_, + head_num_, + size_per_head_, + rotary_embedding_dim_, + tensor_para_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + is_qk_buf_float_, + false, + custom_all_reduce_comm_, + enable_custom_all_reduce_); + + ffn_layer_ = new TensorParallelGeluFfnLayer(max_batch_size_, + max_seq_len_, + head_num_, + size_per_head_, + inter_size_, + tensor_para_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + false, + 0, + custom_all_reduce_comm_, + enable_custom_all_reduce_); } template @@ -110,53 +113,49 @@ bool GptJContextDecoder::isValidSeqLen(size_t seq_len) template bool GptJContextDecoder::isValidLayerParallelId(uint l) { - int local_num_layer = (int)(ceil(num_layer_ * 1.0f / layer_para_size_)); - return l < num_layer_ && (l >= local_num_layer * layer_para_rank_) - && (l < local_num_layer * (layer_para_rank_ + 1)); + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l >= local_num_layer * pipeline_para_.rank_) + && (l < local_num_layer * (pipeline_para_.rank_ + 1)); } template bool GptJContextDecoder::isFirstLayerParallelId(uint l) { - int local_num_layer = (int)(ceil(num_layer_ * 1.0f / layer_para_size_)); - return l < num_layer_ && (l == local_num_layer * layer_para_rank_); + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l == local_num_layer * pipeline_para_.rank_); } template bool GptJContextDecoder::isLastLayerParallelId(uint l) { - int local_num_layer = (int)(ceil(num_layer_ * 1.0f / layer_para_size_)); - return l < num_layer_ && (l == local_num_layer * (layer_para_rank_ + 1) - 1); + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l == local_num_layer * (pipeline_para_.rank_ + 1) - 1); } template int GptJContextDecoder::getFirstLayerParallelId() { - int local_num_layer = (int)(ceil(num_layer_ * 1.0f / layer_para_size_)); - return local_num_layer * layer_para_rank_; + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return local_num_layer * pipeline_para_.rank_; } template -GptJContextDecoder::GptJContextDecoder( - size_t max_batch_size, - size_t max_seq_len, - size_t head_num, - size_t size_per_head, - size_t inter_size, - size_t num_layer, - size_t rotary_embedding_dim, - size_t tensor_para_size, - size_t tensor_para_rank, - ncclComm_t tensor_para_comm, - size_t layer_para_size, - size_t layer_para_rank, - ncclComm_t layer_para_comm, - cudaStream_t stream, - cublasMMWrapper* cublas_wrapper, - IAllocator* allocator, - bool is_free_buffer_after_forward, - bool is_qk_buf_float -): +GptJContextDecoder::GptJContextDecoder(size_t max_batch_size, + size_t max_seq_len, + size_t head_num, + size_t size_per_head, + size_t inter_size, + size_t num_layer, + size_t rotary_embedding_dim, + NcclParam tensor_para, + NcclParam pipeline_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_qk_buf_float, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), max_batch_size_(max_batch_size), max_seq_len_(max_seq_len), @@ -166,13 +165,11 @@ GptJContextDecoder::GptJContextDecoder( num_layer_(num_layer), rotary_embedding_dim_(rotary_embedding_dim), hidden_units_(head_num * size_per_head), - tensor_para_size_(tensor_para_size), - tensor_para_rank_(tensor_para_rank), - tensor_para_comm_(tensor_para_comm), - layer_para_size_(layer_para_size), - layer_para_rank_(layer_para_rank), - layer_para_comm_(layer_para_comm), - is_qk_buf_float_(is_qk_buf_float) + tensor_para_(tensor_para), + pipeline_para_(pipeline_para), + is_qk_buf_float_(is_qk_buf_float), + custom_all_reduce_comm_(custom_all_reduce_comm), + enable_custom_all_reduce_(enable_custom_all_reduce) { initialize(); } @@ -188,13 +185,11 @@ GptJContextDecoder::GptJContextDecoder(GptJContextDecoder const& decoder): num_layer_(decoder.num_layer_), rotary_embedding_dim_(decoder.rotary_embedding_dim_), hidden_units_(decoder.hidden_units_), - tensor_para_size_(decoder.tensor_para_size_), - tensor_para_rank_(decoder.tensor_para_rank_), - tensor_para_comm_(decoder.tensor_para_comm_), - layer_para_size_(decoder.layer_para_size_), - layer_para_rank_(decoder.layer_para_rank_), - layer_para_comm_(decoder.layer_para_comm_), - is_qk_buf_float_(decoder.is_qk_buf_float_) + tensor_para_(decoder.tensor_para_), + pipeline_para_(decoder.pipeline_para_), + is_qk_buf_float_(decoder.is_qk_buf_float_), + custom_all_reduce_comm_(decoder.custom_all_reduce_comm_), + enable_custom_all_reduce_(decoder.enable_custom_all_reduce_) { initialize(); } @@ -209,8 +204,24 @@ GptJContextDecoder::~GptJContextDecoder() template void GptJContextDecoder::forward(std::vector* output_tensors, - const std::vector* input_tensors, - const std::vector>* gpt_decoder_layer_weight) + const std::vector* input_tensors, + const std::vector>* gpt_decoder_layer_weight) +{ + std::unordered_map input_tensors_map{{"decoder_input", input_tensors->at(0)}, + {"attention_mask", input_tensors->at(1)}, + {"input_lengths", input_tensors->at(2)}}; + std::unordered_map output_tensors_map{{"decoder_output", output_tensors->at(0)}, + {"key_cache", output_tensors->at(1)}, + {"value_cache", output_tensors->at(2)}, + {"last_token_hidden_units", output_tensors->at(3)}}; + + forward(&output_tensors_map, &input_tensors_map, gpt_decoder_layer_weight); +} + +template +void GptJContextDecoder::forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors, + const std::vector>* gpt_decoder_layer_weight) { // input tensors: // decoder_input [batch_size, seq_len, hidden_dimension], @@ -229,24 +240,24 @@ void GptJContextDecoder::forward(std::vector* output_tensors, FT_CHECK(input_tensors->size() == 3); FT_CHECK(output_tensors->size() == 4); - isValidBatchSize(input_tensors->at(0).shape[0]); - isValidSeqLen(input_tensors->at(0).shape[1]); + isValidBatchSize(input_tensors->at("decoder_input").shape[0]); + isValidSeqLen(input_tensors->at("decoder_input").shape[1]); allocateBuffer(); - const int batch_size = input_tensors->at(0).shape[0]; - const int seq_len = input_tensors->at(0).shape[1]; + const int batch_size = input_tensors->at("decoder_input").shape[0]; + const int seq_len = input_tensors->at("decoder_input").shape[1]; const DataType data_type = getTensorType(); - T* decoder_input = (T*) input_tensors->at(0).data; - T* decoder_output = (T*) output_tensors->at(0).data; - const T * attention_mask = (const T*) input_tensors->at(1).data; + T* decoder_input = (T*)input_tensors->at("decoder_input").data; + T* decoder_output = (T*)output_tensors->at("decoder_output").data; + const T* attention_mask = (const T*)input_tensors->at("attention_mask").data; - const int local_batch_size = getLocalBatchSize(batch_size, seq_len, layer_para_size_); + const int local_batch_size = getLocalBatchSize(batch_size, seq_len, pipeline_para_.world_size_); FT_CHECK(batch_size % local_batch_size == 0); const int iteration_num = batch_size / local_batch_size; - Tensor & k_cache = output_tensors->at(1); - Tensor & v_cache = output_tensors->at(2); + Tensor& k_cache = output_tensors->at("key_cache"); + Tensor& v_cache = output_tensors->at("value_cache"); std::vector self_k_cache_size; self_k_cache_size.push_back(local_batch_size); for (auto t = k_cache.shape.begin() + 2; t != k_cache.shape.end(); ++t) { @@ -260,31 +271,25 @@ void GptJContextDecoder::forward(std::vector* output_tensors, for (int ite = 0; ite < iteration_num; ite++) { for (int l = 0; l < num_layer_; l++) { - if (isValidLayerParallelId(l) == false) - continue; + if (isValidLayerParallelId(l) == false) { + continue; + } const bool is_final = false; // TODO(bhsueh) remove this flag - T* layer_input = ( - (l == 0) ? decoder_input : decoder_layer_output_ - ) + ite * local_batch_size * seq_len * hidden_units_; - T* layer_output = ( - (l == num_layer_ - 1) ? decoder_output : decoder_layer_output_ - ) + ite * local_batch_size * seq_len * hidden_units_; - - if (isFirstLayerParallelId(l) && layer_para_rank_ != 0 && layer_para_size_ > 1) { - int data_size = local_batch_size * seq_len * hidden_units_ / tensor_para_size_; - ftNcclRecv(layer_input + data_size * tensor_para_rank_, - data_size, - layer_para_rank_ - 1, - layer_para_comm_, - stream_); - if (tensor_para_size_ > 1) { - ftNcclAllGather(layer_input, - layer_input, - data_size, - tensor_para_rank_, - tensor_para_comm_, - stream_); + T* layer_input = + ((l == 0) ? decoder_input : decoder_layer_output_) + ite * local_batch_size * seq_len * hidden_units_; + T* layer_output = ((l == num_layer_ - 1) ? decoder_output : decoder_layer_output_) + + ite * local_batch_size * seq_len * hidden_units_; + + if (isFirstLayerParallelId(l) && pipeline_para_.rank_ != 0 && pipeline_para_.world_size_ > 1) { + int data_size = local_batch_size * seq_len * hidden_units_ / tensor_para_.world_size_; + ftNcclRecv(layer_input + data_size * tensor_para_.rank_, + data_size, + pipeline_para_.rank_ - 1, + pipeline_para_, + stream_); + if (tensor_para_.world_size_ > 1) { + ftNcclAllGather(layer_input, layer_input, data_size, tensor_para_.rank_, tensor_para_, stream_); } } @@ -298,14 +303,15 @@ void GptJContextDecoder::forward(std::vector* output_tensors, sync_check_cuda_error(); std::vector self_attention_input_tensors{ - Tensor{MEMORY_GPU, data_type, - {local_batch_size * seq_len, hidden_units_}, + Tensor{MEMORY_GPU, + data_type, + {(size_t)(local_batch_size * seq_len), (size_t)hidden_units_}, decoder_normed_input_}, - Tensor{MEMORY_GPU, data_type, - {local_batch_size, 1, seq_len, seq_len}, + Tensor{MEMORY_GPU, + data_type, + {(size_t)local_batch_size, (size_t)1, (size_t)seq_len, (size_t)seq_len}, attention_mask + local_batch_size * ite * seq_len * seq_len}, - Tensor{MEMORY_CPU, TYPE_BOOL, {1}, &is_final} - }; + Tensor{MEMORY_CPU, TYPE_BOOL, {(size_t)1}, &is_final}}; size_t cache_offset = l - getFirstLayerParallelId(); for (auto t = k_cache.shape.begin() + 1; t != k_cache.shape.end(); ++t) { @@ -318,53 +324,45 @@ void GptJContextDecoder::forward(std::vector* output_tensors, cache_offset += ite_cache_offset; std::vector self_attention_output_tensors{ - Tensor{MEMORY_GPU, data_type, - {local_batch_size * seq_len, hidden_units_}, + Tensor{MEMORY_GPU, + data_type, + {(size_t)(local_batch_size * seq_len), (size_t)hidden_units_}, self_attn_output_}, - Tensor{MEMORY_GPU, data_type, - self_k_cache_size, - ((const T*)k_cache.data) + cache_offset}, - Tensor{MEMORY_GPU, data_type, - self_v_cache_size, - ((const T*)v_cache.data) + cache_offset} - }; + Tensor{MEMORY_GPU, data_type, self_k_cache_size, ((const T*)k_cache.data) + cache_offset}, + Tensor{MEMORY_GPU, data_type, self_v_cache_size, ((const T*)v_cache.data) + cache_offset}}; self_attention_layer_->forward(&self_attention_output_tensors, - &self_attention_input_tensors, - &gpt_decoder_layer_weight->at(l).self_attention_weights); + &self_attention_input_tensors, + &gpt_decoder_layer_weight->at(l).self_attention_weights); if (is_final == false) { std::vector ffn_input_tensors{ - Tensor{MEMORY_GPU, data_type, - {local_batch_size * seq_len, hidden_units_}, - decoder_normed_input_} - }; - std::vector ffn_output_tensors{ - Tensor{MEMORY_GPU, data_type, - {local_batch_size * seq_len, hidden_units_}, - ffn_output_} - }; + Tensor{MEMORY_GPU, + data_type, + {(size_t)(local_batch_size * seq_len), (size_t)hidden_units_}, + decoder_normed_input_}}; + std::vector ffn_output_tensors{Tensor{ + MEMORY_GPU, data_type, {(size_t)(local_batch_size * seq_len), (size_t)hidden_units_}, ffn_output_}}; ffn_layer_->forward( - &ffn_output_tensors, &ffn_input_tensors, - &gpt_decoder_layer_weight->at(l).ffn_weights); - - invokeAddBiasAttentionFfnResidual( - layer_output, - ffn_output_, - self_attn_output_, - layer_input, - gpt_decoder_layer_weight->at(l).ffn_weights.output_weight.bias, - local_batch_size * seq_len, - hidden_units_, - stream_); + &ffn_output_tensors, &ffn_input_tensors, &gpt_decoder_layer_weight->at(l).ffn_weights); + + invokeAddBiasAttentionFfnResidual(layer_output, + ffn_output_, + self_attn_output_, + layer_input, + gpt_decoder_layer_weight->at(l).ffn_weights.output_weight.bias, + local_batch_size * seq_len, + hidden_units_, + stream_); sync_check_cuda_error(); - if (isLastLayerParallelId(l) && layer_para_rank_ != layer_para_size_ - 1 && layer_para_size_ > 1) { - int data_size = local_batch_size * seq_len * hidden_units_ / tensor_para_size_; - ftNcclSend(layer_output + data_size * tensor_para_rank_, + if (isLastLayerParallelId(l) && pipeline_para_.rank_ != pipeline_para_.world_size_ - 1 + && pipeline_para_.world_size_ > 1) { + int data_size = local_batch_size * seq_len * hidden_units_ / tensor_para_.world_size_; + ftNcclSend(layer_output + data_size * tensor_para_.rank_, data_size, - layer_para_rank_ + 1, - layer_para_comm_, + pipeline_para_.rank_ + 1, + pipeline_para_, stream_); } } @@ -372,9 +370,9 @@ void GptJContextDecoder::forward(std::vector* output_tensors, } // TODO(bhsueh) We could optimize this point by only computing the last token for the last layer - invokeLookupHiddenStateOfLastToken((T*)output_tensors->at(3).data, - (T*)output_tensors->at(0).data, - (int*)input_tensors->at(2).data, + invokeLookupHiddenStateOfLastToken((T*)output_tensors->at("last_token_hidden_units").data, + (T*)output_tensors->at("decoder_output").data, + (int*)input_tensors->at("input_lengths").data, seq_len, batch_size, hidden_units_, diff --git a/src/fastertransformer/models/gptj/GptJContextDecoder.h b/src/fastertransformer/models/gptj/GptJContextDecoder.h index 7ff1b8f96..61a825792 100644 --- a/src/fastertransformer/models/gptj/GptJContextDecoder.h +++ b/src/fastertransformer/models/gptj/GptJContextDecoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -27,6 +27,7 @@ #include "src/fastertransformer/utils/Tensor.h" #include "src/fastertransformer/utils/allocator.h" #include "src/fastertransformer/utils/cublasMMWrapper.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" #include "src/fastertransformer/utils/nccl_utils.h" namespace fastertransformer { @@ -48,12 +49,11 @@ class GptJContextDecoder: public BaseLayer { // calculated data size_t hidden_units_; - size_t tensor_para_size_; - size_t tensor_para_rank_; - ncclComm_t tensor_para_comm_; - size_t layer_para_size_; - size_t layer_para_rank_; - ncclComm_t layer_para_comm_; + NcclParam tensor_para_; + NcclParam pipeline_para_; + + std::shared_ptr custom_all_reduce_comm_; + int enable_custom_all_reduce_; bool is_qk_buf_float_; @@ -80,41 +80,22 @@ class GptJContextDecoder: public BaseLayer { T* decoder_layer_output_; public: - GptJContextDecoder( - size_t max_batch_size, - size_t max_seq_len, - size_t head_num, - size_t size_per_head, - size_t inter_size, - size_t num_layer, - size_t rotary_embedding_dim, - size_t tensor_para_size, - size_t tensor_para_rank, - ncclComm_t tensor_para_comm, - size_t layer_para_size, - size_t layer_para_rank, - ncclComm_t layer_para_comm, - cudaStream_t stream, - cublasMMWrapper* cublas_wrapper, - IAllocator* allocator, - bool is_free_buffer_after_forward, - bool is_qk_buf_float - ); - - GptJContextDecoder( - size_t max_batch_size, - size_t max_seq_len, - size_t head_num, - size_t size_per_head, - size_t inter_size, - size_t num_layer, - size_t rotary_embedding_dim, - cudaStream_t stream, - cublasMMWrapper* cublas_wrapper, - IAllocator* allocator, - bool is_free_buffer_after_forward, - bool is_qk_buf_float - ); + GptJContextDecoder(size_t max_batch_size, + size_t max_seq_len, + size_t head_num, + size_t size_per_head, + size_t inter_size, + size_t num_layer, + size_t rotary_embedding_dim, + NcclParam tensor_para, + NcclParam pipeline_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool is_qk_buf_float, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce_ = 0); GptJContextDecoder(GptJContextDecoder const& decoder); @@ -123,6 +104,10 @@ class GptJContextDecoder: public BaseLayer { void forward(std::vector* output_tensors, const std::vector* input_tensors, const std::vector>* decoder_layer_weights); + + void forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors, + const std::vector>* gpt_decoder_layer_weight); }; } // namespace fastertransformer diff --git a/src/fastertransformer/models/gptj/GptJDecoder.cc b/src/fastertransformer/models/gptj/GptJDecoder.cc index 9de0b4318..268d664dd 100644 --- a/src/fastertransformer/models/gptj/GptJDecoder.cc +++ b/src/fastertransformer/models/gptj/GptJDecoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -15,39 +15,42 @@ */ #include "src/fastertransformer/models/gptj/GptJDecoder.h" - -#include "src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.h" #include "src/fastertransformer/layers/TensorParallelGeluFfnLayer.h" +#include "src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.h" namespace fastertransformer { template void GptJDecoder::initialize() { - self_attention_layer_ = new TensorParallelDecoderSelfAttentionLayer( - max_batch_size_, - head_num_, - size_per_head_, - rotary_embedding_dim_, - tensor_para_size_, - tensor_para_comm_, - stream_, - cublas_wrapper_, - allocator_, - is_free_buffer_after_forward_); - - ffn_layer_ = new TensorParallelGeluFfnLayer( - max_batch_size_, - 1, - head_num_, - size_per_head_, - inter_size_, - tensor_para_size_, - tensor_para_comm_, - stream_, - cublas_wrapper_, - allocator_, - is_free_buffer_after_forward_); + self_attention_layer_ = new TensorParallelDecoderSelfAttentionLayer(max_batch_size_, + head_num_, + size_per_head_, + rotary_embedding_dim_, + tensor_para_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + false, + 0, + custom_all_reduce_comm_, + enable_custom_all_reduce_); + + ffn_layer_ = new TensorParallelGeluFfnLayer(max_batch_size_, + 1, + head_num_, + size_per_head_, + inter_size_, + tensor_para_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + false, + 0, + custom_all_reduce_comm_, + enable_custom_all_reduce_); allocateBuffer(); } @@ -59,8 +62,7 @@ void GptJDecoder::allocateBuffer() reinterpret_cast(allocator_->malloc(sizeof(T) * max_batch_size_ * hidden_units_, false)); self_attn_output_ = reinterpret_cast(allocator_->malloc(sizeof(T) * max_batch_size_ * hidden_units_, false)); - ffn_output_ = - reinterpret_cast(allocator_->malloc(sizeof(T) * max_batch_size_ * hidden_units_, false)); + ffn_output_ = reinterpret_cast(allocator_->malloc(sizeof(T) * max_batch_size_ * hidden_units_, false)); decoder_layer_output_ = reinterpret_cast(allocator_->malloc(sizeof(T) * max_batch_size_ * hidden_units_, false)); is_allocate_buffer_ = true; @@ -95,51 +97,47 @@ bool GptJDecoder::isValidBatchSize(size_t batch_size) template bool GptJDecoder::isValidLayerParallelId(uint l) { - int local_num_layer = (int)(ceil(num_layer_ * 1.0f / layer_para_size_)); - return l < num_layer_ && (l >= local_num_layer * layer_para_rank_) - && (l < local_num_layer * (layer_para_rank_ + 1)); + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l >= local_num_layer * pipeline_para_.rank_) + && (l < local_num_layer * (pipeline_para_.rank_ + 1)); } template bool GptJDecoder::isFirstLayerParallelId(uint l) { - int local_num_layer = (int)(ceil(num_layer_ * 1.0f / layer_para_size_)); - return l < num_layer_ && (l == local_num_layer * layer_para_rank_); + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l == local_num_layer * pipeline_para_.rank_); } template bool GptJDecoder::isLastLayerParallelId(uint l) { - int local_num_layer = (int)(ceil(num_layer_ * 1.0f / layer_para_size_)); - return l < num_layer_ && (l == local_num_layer * (layer_para_rank_ + 1) - 1); + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l == local_num_layer * (pipeline_para_.rank_ + 1) - 1); } template int GptJDecoder::getFirstLayerParallelId() { - int local_num_layer = (int)(ceil(num_layer_ * 1.0f / layer_para_size_)); - return local_num_layer * layer_para_rank_; + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return local_num_layer * pipeline_para_.rank_; } template -GptJDecoder::GptJDecoder( - size_t max_batch_size, - size_t head_num, - size_t size_per_head, - size_t inter_size, - size_t num_layer, - size_t rotary_embedding_dim, - size_t tensor_para_size, - size_t tensor_para_rank, - ncclComm_t tensor_para_comm, - size_t layer_para_size, - size_t layer_para_rank, - ncclComm_t layer_para_comm, - cudaStream_t stream, - cublasMMWrapper* cublas_wrapper, - IAllocator* allocator, - bool is_free_buffer_after_forward -): +GptJDecoder::GptJDecoder(size_t max_batch_size, + size_t head_num, + size_t size_per_head, + size_t inter_size, + size_t num_layer, + size_t rotary_embedding_dim, + NcclParam tensor_para, + NcclParam pipeline_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), max_batch_size_(max_batch_size), head_num_(head_num), @@ -148,12 +146,10 @@ GptJDecoder::GptJDecoder( num_layer_(num_layer), rotary_embedding_dim_(rotary_embedding_dim), hidden_units_(head_num_ * size_per_head), - tensor_para_size_(tensor_para_size), - tensor_para_rank_(tensor_para_rank), - tensor_para_comm_(tensor_para_comm), - layer_para_size_(layer_para_size), - layer_para_rank_(layer_para_rank), - layer_para_comm_(layer_para_comm) + tensor_para_(tensor_para), + pipeline_para_(pipeline_para), + custom_all_reduce_comm_(custom_all_reduce_comm), + enable_custom_all_reduce_(enable_custom_all_reduce) { initialize(); } @@ -168,12 +164,10 @@ GptJDecoder::GptJDecoder(GptJDecoder const& decoder): num_layer_(decoder.num_layer_), rotary_embedding_dim_(decoder.rotary_embedding_dim_), hidden_units_(decoder.hidden_units_), - tensor_para_size_(decoder.tensor_para_size_), - tensor_para_rank_(decoder.tensor_para_rank_), - tensor_para_comm_(decoder.tensor_para_comm_), - layer_para_size_(decoder.layer_para_size_), - layer_para_rank_(decoder.layer_para_rank_), - layer_para_comm_(decoder.layer_para_comm_) + tensor_para_(decoder.tensor_para_), + pipeline_para_(decoder.pipeline_para_), + custom_all_reduce_comm_(decoder.custom_all_reduce_comm_), + enable_custom_all_reduce_(decoder.enable_custom_all_reduce_) { initialize(); } @@ -188,8 +182,28 @@ GptJDecoder::~GptJDecoder() template void GptJDecoder::forward(std::vector* output_tensors, - const std::vector* input_tensors, - const std::vector>* gpt_decoder_layer_weight) + const std::vector* input_tensors, + const std::vector>* gpt_decoder_layer_weight) +{ + std::unordered_map input_tensors_map{{"decoder_input", input_tensors->at(0)}, + {"finished", input_tensors->at(1)}, + {"sequence_lengths", input_tensors->at(2)}, + {"input_lengths", input_tensors->at(3)}, + {"max_input_length", input_tensors->at(4)}, + {"step", input_tensors->at(5)}, + {"ite", input_tensors->at(6)}}; + std::unordered_map output_tensors_map{ + {"decoder_output", output_tensors->at(0)}, + {"key_cache", output_tensors->at(1)}, + {"value_cache", output_tensors->at(2)}, + }; + + forward(&output_tensors_map, &input_tensors_map, gpt_decoder_layer_weight); +} +template +void GptJDecoder::forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors, + const std::vector>* gpt_decoder_layer_weight) { // input tensors: // decoder_input [local_batch_size, hidden_dimension], @@ -199,27 +213,29 @@ void GptJDecoder::forward(std::vector* output_tensors, // max_input_length [1] on cpu // step [1] on cpu // ite [1] on cpu + // cache_indirection [local_batch_size / beam_width, beam_width, max_seq_len] + // Here, local_batch_size contains the beam_width, so local_batch_size / beam_width + // is real local_batch_size. // output tensors: // decoder_output [local_batch_size, hidden_dimension], // key_cache [num_layer, batch_size, head_num, size_per_head // x, max_seq_len, x] // value_cache [num_layer, batch_size, head_num, max_seq_len, size_per_head] - - FT_CHECK(input_tensors->size() == 7); + FT_CHECK(input_tensors->size() == 8); FT_CHECK(output_tensors->size() == 3); - isValidBatchSize(input_tensors->at(0).shape[0]); + isValidBatchSize(input_tensors->at("decoder_input").shape[0]); allocateBuffer(); const DataType data_type = getTensorType(); - const size_t local_batch_size = input_tensors->at(0).shape[0]; - const int ite = *((int*)(input_tensors->at(6).data)); + const size_t local_batch_size = input_tensors->at("decoder_input").shape[0]; + const int ite = *((int*)(input_tensors->at("ite").data)); - T* decoder_input = (T*) input_tensors->at(0).data; - T* decoder_output = (T*) output_tensors->at(0).data; + T* decoder_input = (T*)input_tensors->at("decoder_input").data; + T* decoder_output = (T*)output_tensors->at("decoder_output").data; - Tensor & k_cache = output_tensors->at(1); - Tensor & v_cache = output_tensors->at(2); + Tensor& k_cache = output_tensors->at("key_cache"); + Tensor& v_cache = output_tensors->at("value_cache"); std::vector self_k_cache_size; self_k_cache_size.push_back(local_batch_size); for (auto t = k_cache.shape.begin() + 2; t != k_cache.shape.end(); ++t) { @@ -238,23 +254,18 @@ void GptJDecoder::forward(std::vector* output_tensors, T* layer_input = (l == 0) ? decoder_input : decoder_layer_output_; T* layer_output = (l == num_layer_ - 1) ? decoder_output : decoder_layer_output_; - if (isFirstLayerParallelId(l) == true && layer_para_rank_ != 0 && layer_para_size_ > 1) { - int data_size = local_batch_size * hidden_units_ / tensor_para_size_; - // ftNcclRecv(layer_input, local_batch_size * hidden_units_, layer_para_rank_ - 1, layer_para_comm_, + if (isFirstLayerParallelId(l) == true && pipeline_para_.rank_ != 0 && pipeline_para_.world_size_ > 1) { + int data_size = local_batch_size * hidden_units_ / tensor_para_.world_size_; + // ftNcclRecv(layer_input, local_batch_size * hidden_units_, pipeline_para_.rank_ - 1, pipeline_para_, // stream_); - ftNcclRecv(layer_input + data_size * tensor_para_rank_, + ftNcclRecv(layer_input + data_size * tensor_para_.rank_, data_size, - layer_para_rank_ - 1, - layer_para_comm_, + pipeline_para_.rank_ - 1, + pipeline_para_, stream_); - if (tensor_para_size_ > 1) { - ftNcclAllGather(layer_input, - layer_input, - data_size, - tensor_para_rank_, - tensor_para_comm_, - stream_); + if (tensor_para_.world_size_ > 1) { + ftNcclAllGather(layer_input, layer_input, data_size, tensor_para_.rank_, tensor_para_, stream_); } } @@ -268,15 +279,13 @@ void GptJDecoder::forward(std::vector* output_tensors, sync_check_cuda_error(); std::vector self_attention_input_tensors{ - Tensor{MEMORY_GPU, data_type, - {local_batch_size, hidden_units_}, - decoder_normed_input_}, - input_tensors->at(1), - input_tensors->at(2), - input_tensors->at(3), - input_tensors->at(4), - input_tensors->at(5) - }; + Tensor{MEMORY_GPU, data_type, {local_batch_size, hidden_units_}, decoder_normed_input_}, + input_tensors->at("finished"), + input_tensors->at("sequence_lengths"), + input_tensors->at("input_lengths"), + input_tensors->at("max_input_length"), + input_tensors->at("step"), + input_tensors->at("cache_indirection")}; size_t cache_offset = l - getFirstLayerParallelId(); for (auto t = k_cache.shape.begin() + 1; t != k_cache.shape.end(); ++t) { @@ -289,55 +298,40 @@ void GptJDecoder::forward(std::vector* output_tensors, cache_offset += ite_cache_offset; std::vector self_attention_output_tensors{ - Tensor{MEMORY_GPU, data_type, - {local_batch_size, hidden_units_}, - self_attn_output_}, - Tensor{MEMORY_GPU, data_type, - self_k_cache_size, - ((const T*)k_cache.data) + cache_offset}, - Tensor{MEMORY_GPU, data_type, - self_v_cache_size, - ((const T*)v_cache.data) + cache_offset} - }; + Tensor{MEMORY_GPU, data_type, {local_batch_size, hidden_units_}, self_attn_output_}, + Tensor{MEMORY_GPU, data_type, self_k_cache_size, ((const T*)k_cache.data) + cache_offset}, + Tensor{MEMORY_GPU, data_type, self_v_cache_size, ((const T*)v_cache.data) + cache_offset}}; self_attention_layer_->forward(&self_attention_output_tensors, &self_attention_input_tensors, &gpt_decoder_layer_weight->at(l).self_attention_weights); std::vector ffn_input_tensors{ - Tensor{MEMORY_GPU, data_type, - {local_batch_size, hidden_units_}, - decoder_normed_input_} - }; + Tensor{MEMORY_GPU, data_type, {local_batch_size, hidden_units_}, decoder_normed_input_}}; std::vector ffn_output_tensors{ - Tensor{MEMORY_GPU, data_type, - {local_batch_size, hidden_units_}, - ffn_output_} - }; - ffn_layer_->forward( - &ffn_output_tensors, &ffn_input_tensors, - &gpt_decoder_layer_weight->at(l).ffn_weights); - - invokeAddBiasAttentionFfnResidual( - layer_output, - ffn_output_, - self_attn_output_, - layer_input, - gpt_decoder_layer_weight->at(l).ffn_weights.output_weight.bias, - local_batch_size, - hidden_units_, - stream_); + Tensor{MEMORY_GPU, data_type, {local_batch_size, hidden_units_}, ffn_output_}}; + ffn_layer_->forward(&ffn_output_tensors, &ffn_input_tensors, &gpt_decoder_layer_weight->at(l).ffn_weights); + + invokeAddBiasAttentionFfnResidual(layer_output, + ffn_output_, + self_attn_output_, + layer_input, + gpt_decoder_layer_weight->at(l).ffn_weights.output_weight.bias, + local_batch_size, + hidden_units_, + stream_); sync_check_cuda_error(); - if (isLastLayerParallelId(l) == true && layer_para_rank_ != layer_para_size_ - 1 && layer_para_size_ > 1) { - int data_size = local_batch_size * hidden_units_ / tensor_para_size_; - // ftNcclSend(layer_output, local_batch_size * hidden_units_, layer_para_rank_ + 1, layer_para_comm_, + if (isLastLayerParallelId(l) == true && pipeline_para_.rank_ != pipeline_para_.world_size_ - 1 + && pipeline_para_.world_size_ > 1) { + int data_size = local_batch_size * hidden_units_ / tensor_para_.world_size_; + // ftNcclSend(layer_output, local_batch_size * hidden_units_, pipeline_para_.rank_ + 1, pipeline_para_, // stream_); - ftNcclSend(layer_output + data_size * tensor_para_rank_, + ftNcclSend(layer_output + data_size * tensor_para_.rank_, data_size, - layer_para_rank_ + 1, - layer_para_comm_, + pipeline_para_.rank_ + 1, + pipeline_para_, stream_); } } diff --git a/src/fastertransformer/models/gptj/GptJDecoder.h b/src/fastertransformer/models/gptj/GptJDecoder.h index d85076ee5..01c551606 100644 --- a/src/fastertransformer/models/gptj/GptJDecoder.h +++ b/src/fastertransformer/models/gptj/GptJDecoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -27,6 +27,7 @@ #include "src/fastertransformer/utils/Tensor.h" #include "src/fastertransformer/utils/allocator.h" #include "src/fastertransformer/utils/cublasMMWrapper.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" #include "src/fastertransformer/utils/nccl_utils.h" namespace fastertransformer { @@ -54,12 +55,11 @@ class GptJDecoder: public BaseLayer { size_t rotary_embedding_dim_; size_t hidden_units_; - size_t tensor_para_size_; - size_t tensor_para_rank_; - ncclComm_t tensor_para_comm_; - size_t layer_para_size_; - size_t layer_para_rank_; - ncclComm_t layer_para_comm_; + NcclParam tensor_para_; + NcclParam pipeline_para_; + + std::shared_ptr custom_all_reduce_comm_; + int enable_custom_all_reduce_; T* decoder_normed_input_; T* self_attn_output_; @@ -70,32 +70,32 @@ class GptJDecoder: public BaseLayer { FfnLayer* ffn_layer_; public: - GptJDecoder( - size_t max_batch_size, - size_t head_num, - size_t size_per_head, - size_t inter_size, - size_t num_layer, - size_t rotary_embedding_dim, - size_t tensor_para_size, - size_t tensor_para_rank, - ncclComm_t tensor_para_comm, - size_t layer_para_size, - size_t layer_para_rank_, - ncclComm_t layer_para_comm, - cudaStream_t stream, - cublasMMWrapper* cublas_wrapper, - IAllocator* allocator, - bool is_free_buffer_after_forward - ); + GptJDecoder(size_t max_batch_size, + size_t head_num, + size_t size_per_head, + size_t inter_size, + size_t num_layer, + size_t rotary_embedding_dim, + NcclParam tensor_para, + NcclParam pipeline_para, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce_ = 0); GptJDecoder(GptJDecoder const& decoder); virtual ~GptJDecoder(); + virtual void forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors, + const std::vector>* decoder_layer_weights); + virtual void forward(std::vector* output_tensors, - const std::vector* input_tensors, - const std::vector>* decoder_layer_weights); + const std::vector* input_tensors, + const std::vector>* decoder_layer_weights); }; } // namespace fastertransformer diff --git a/src/fastertransformer/models/gptj/GptJDecoderLayerWeight.cc b/src/fastertransformer/models/gptj/GptJDecoderLayerWeight.cc index 7694a1d46..cb3a3aad7 100644 --- a/src/fastertransformer/models/gptj/GptJDecoderLayerWeight.cc +++ b/src/fastertransformer/models/gptj/GptJDecoderLayerWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -20,12 +20,10 @@ namespace fastertransformer { template -GptJDecoderLayerWeight::GptJDecoderLayerWeight( - const int hidden_units, - const int inter_size, - const int tensor_para_size, - const int tensor_para_rank -): +GptJDecoderLayerWeight::GptJDecoderLayerWeight(const int hidden_units, + const int inter_size, + const int tensor_para_size, + const int tensor_para_rank): hidden_units_(hidden_units), inter_size_(inter_size), tensor_para_size_(tensor_para_size), @@ -58,9 +56,7 @@ GptJDecoderLayerWeight::~GptJDecoderLayerWeight() } template -GptJDecoderLayerWeight::GptJDecoderLayerWeight( - const GptJDecoderLayerWeight& other -): +GptJDecoderLayerWeight::GptJDecoderLayerWeight(const GptJDecoderLayerWeight& other): hidden_units_(other.hidden_units_), inter_size_(other.inter_size_), tensor_para_size_(other.tensor_para_size_), @@ -68,34 +64,16 @@ GptJDecoderLayerWeight::GptJDecoderLayerWeight( { mallocWeights(); - cudaD2Dcpy(weights_ptr[0], other.weights_ptr[0], - hidden_units_ - ); - cudaD2Dcpy(weights_ptr[1], other.weights_ptr[1], - hidden_units_ - ); - cudaD2Dcpy(weights_ptr[2], other.weights_ptr[2], - hidden_units_ * 3 * hidden_units_ / tensor_para_size_ - ); - cudaD2Dcpy(weights_ptr[3], other.weights_ptr[3], - 3 * hidden_units_ / tensor_para_size_ - ); - cudaD2Dcpy(weights_ptr[4], other.weights_ptr[4], - hidden_units_ / tensor_para_size_ * hidden_units_ - ); - - cudaD2Dcpy(weights_ptr[5], other.weights_ptr[5], - hidden_units_ * inter_size_ / tensor_para_size_ - ); - cudaD2Dcpy(weights_ptr[6], other.weights_ptr[6], - inter_size_ / tensor_para_size_ - ); - cudaD2Dcpy(weights_ptr[7], other.weights_ptr[7], - inter_size_ / tensor_para_size_ * hidden_units_ - ); - cudaD2Dcpy(weights_ptr[8], other.weights_ptr[8], - hidden_units_ - ); + cudaD2Dcpy(weights_ptr[0], other.weights_ptr[0], hidden_units_); + cudaD2Dcpy(weights_ptr[1], other.weights_ptr[1], hidden_units_); + cudaD2Dcpy(weights_ptr[2], other.weights_ptr[2], hidden_units_ * 3 * hidden_units_ / tensor_para_size_); + cudaD2Dcpy(weights_ptr[3], other.weights_ptr[3], 3 * hidden_units_ / tensor_para_size_); + cudaD2Dcpy(weights_ptr[4], other.weights_ptr[4], hidden_units_ / tensor_para_size_ * hidden_units_); + + cudaD2Dcpy(weights_ptr[5], other.weights_ptr[5], hidden_units_ * inter_size_ / tensor_para_size_); + cudaD2Dcpy(weights_ptr[6], other.weights_ptr[6], inter_size_ / tensor_para_size_); + cudaD2Dcpy(weights_ptr[7], other.weights_ptr[7], inter_size_ / tensor_para_size_ * hidden_units_); + cudaD2Dcpy(weights_ptr[8], other.weights_ptr[8], hidden_units_); setWeightPtr(); } @@ -110,91 +88,54 @@ GptJDecoderLayerWeight& GptJDecoderLayerWeight::operator=(const GptJDecode mallocWeights(); - cudaD2Dcpy(weights_ptr[0], other.weights_ptr[0], - hidden_units_ - ); - cudaD2Dcpy(weights_ptr[1], other.weights_ptr[1], - hidden_units_ - ); - cudaD2Dcpy(weights_ptr[2], other.weights_ptr[2], - hidden_units_ * 3 * hidden_units_ / tensor_para_size_ - ); - cudaD2Dcpy(weights_ptr[3], other.weights_ptr[3], - 3 * hidden_units_ / tensor_para_size_ - ); - cudaD2Dcpy(weights_ptr[4], other.weights_ptr[4], - hidden_units_ / tensor_para_size_ * hidden_units_ - ); - - cudaD2Dcpy(weights_ptr[5], other.weights_ptr[5], - hidden_units_ * inter_size_ / tensor_para_size_ - ); - cudaD2Dcpy(weights_ptr[6], other.weights_ptr[6], - inter_size_ / tensor_para_size_ - ); - cudaD2Dcpy(weights_ptr[7], other.weights_ptr[7], - inter_size_ / tensor_para_size_ * hidden_units_ - ); - cudaD2Dcpy(weights_ptr[8], other.weights_ptr[8], - hidden_units_ - ); + cudaD2Dcpy(weights_ptr[0], other.weights_ptr[0], hidden_units_); + cudaD2Dcpy(weights_ptr[1], other.weights_ptr[1], hidden_units_); + cudaD2Dcpy(weights_ptr[2], other.weights_ptr[2], hidden_units_ * 3 * hidden_units_ / tensor_para_size_); + cudaD2Dcpy(weights_ptr[3], other.weights_ptr[3], 3 * hidden_units_ / tensor_para_size_); + cudaD2Dcpy(weights_ptr[4], other.weights_ptr[4], hidden_units_ / tensor_para_size_ * hidden_units_); + + cudaD2Dcpy(weights_ptr[5], other.weights_ptr[5], hidden_units_ * inter_size_ / tensor_para_size_); + cudaD2Dcpy(weights_ptr[6], other.weights_ptr[6], inter_size_ / tensor_para_size_); + cudaD2Dcpy(weights_ptr[7], other.weights_ptr[7], inter_size_ / tensor_para_size_ * hidden_units_); + cudaD2Dcpy(weights_ptr[8], other.weights_ptr[8], hidden_units_); setWeightPtr(); return *this; } template -void GptJDecoderLayerWeight::loadModel(std::string dir_path) +void GptJDecoderLayerWeight::loadModel(std::string dir_path, FtCudaDataType model_file_type) { FT_CHECK(is_maintain_buffer == true); const std::string rank_spec = std::to_string(tensor_para_rank_); - loadWeightFromBin( - weights_ptr[0], - {hidden_units_}, - dir_path + ".input_layernorm.bias.bin" - ); - loadWeightFromBin( - weights_ptr[1], - {hidden_units_}, - dir_path + ".input_layernorm.weight.bin" - ); - loadWeightFromBin( - weights_ptr[2], - {hidden_units_, 3 * hidden_units_ / tensor_para_size_}, - dir_path + ".attention.query_key_value.weight." + rank_spec + ".bin" - ); + loadWeightFromBin(weights_ptr[0], {hidden_units_}, dir_path + ".input_layernorm.bias.bin", model_file_type); + loadWeightFromBin(weights_ptr[1], {hidden_units_}, dir_path + ".input_layernorm.weight.bin", model_file_type); + loadWeightFromBin(weights_ptr[2], + {hidden_units_, 3 * hidden_units_ / tensor_para_size_}, + dir_path + ".attention.query_key_value.weight." + rank_spec + ".bin", + model_file_type); // GPT-J does not have bias for QKV - cudaMemset( - weights_ptr[3], 0, sizeof(T) * 3 * hidden_units_ / tensor_para_size_ - ); - loadWeightFromBin( - weights_ptr[4], - {hidden_units_ / tensor_para_size_, hidden_units_}, - dir_path + ".attention.dense.weight." + rank_spec + ".bin" - ); - - loadWeightFromBin( - weights_ptr[5], - {hidden_units_, inter_size_ / tensor_para_size_}, - dir_path + ".mlp.dense_h_to_4h.weight." + rank_spec + ".bin" - ); - loadWeightFromBin( - weights_ptr[6], - {inter_size_ / tensor_para_size_}, - dir_path + ".mlp.dense_h_to_4h.bias." + rank_spec + ".bin" - ); - loadWeightFromBin( - weights_ptr[7], - {inter_size_ / tensor_para_size_, hidden_units_}, - dir_path + ".mlp.dense_4h_to_h.weight." + rank_spec + ".bin" - ); - loadWeightFromBin( - weights_ptr[8], - {hidden_units_}, - dir_path + ".mlp.dense_4h_to_h.bias.bin" - ); + cudaMemset(weights_ptr[3], 0, sizeof(T) * 3 * hidden_units_ / tensor_para_size_); + loadWeightFromBin(weights_ptr[4], + {hidden_units_ / tensor_para_size_, hidden_units_}, + dir_path + ".attention.dense.weight." + rank_spec + ".bin", + model_file_type); + + loadWeightFromBin(weights_ptr[5], + {hidden_units_, inter_size_ / tensor_para_size_}, + dir_path + ".mlp.dense_h_to_4h.weight." + rank_spec + ".bin", + model_file_type); + loadWeightFromBin(weights_ptr[6], + {inter_size_ / tensor_para_size_}, + dir_path + ".mlp.dense_h_to_4h.bias." + rank_spec + ".bin", + model_file_type); + loadWeightFromBin(weights_ptr[7], + {inter_size_ / tensor_para_size_, hidden_units_}, + dir_path + ".mlp.dense_4h_to_h.weight." + rank_spec + ".bin", + model_file_type); + loadWeightFromBin(weights_ptr[8], {hidden_units_}, dir_path + ".mlp.dense_4h_to_h.bias.bin", model_file_type); } template @@ -217,34 +158,16 @@ void GptJDecoderLayerWeight::setWeightPtr() template void GptJDecoderLayerWeight::mallocWeights() { - deviceMalloc(&weights_ptr[0], - hidden_units_ - ); - deviceMalloc(&weights_ptr[1], - hidden_units_ - ); - deviceMalloc(&weights_ptr[2], - hidden_units_ * 3 * hidden_units_ / tensor_para_size_ - ); - deviceMalloc(&weights_ptr[3], - 3 * hidden_units_ / tensor_para_size_ - ); - deviceMalloc(&weights_ptr[4], - hidden_units_ / tensor_para_size_ * hidden_units_ - ); - - deviceMalloc(&weights_ptr[5], - hidden_units_ * inter_size_ / tensor_para_size_ - ); - deviceMalloc(&weights_ptr[6], - inter_size_ / tensor_para_size_ - ); - deviceMalloc(&weights_ptr[7], - inter_size_ / tensor_para_size_ * hidden_units_ - ); - deviceMalloc(&weights_ptr[8], - hidden_units_ - ); + deviceMalloc(&weights_ptr[0], hidden_units_); + deviceMalloc(&weights_ptr[1], hidden_units_); + deviceMalloc(&weights_ptr[2], hidden_units_ * 3 * hidden_units_ / tensor_para_size_); + deviceMalloc(&weights_ptr[3], 3 * hidden_units_ / tensor_para_size_); + deviceMalloc(&weights_ptr[4], hidden_units_ / tensor_para_size_ * hidden_units_); + + deviceMalloc(&weights_ptr[5], hidden_units_ * inter_size_ / tensor_para_size_); + deviceMalloc(&weights_ptr[6], inter_size_ / tensor_para_size_); + deviceMalloc(&weights_ptr[7], inter_size_ / tensor_para_size_ * hidden_units_); + deviceMalloc(&weights_ptr[8], hidden_units_); } template struct GptJDecoderLayerWeight; diff --git a/src/fastertransformer/models/gptj/GptJDecoderLayerWeight.h b/src/fastertransformer/models/gptj/GptJDecoderLayerWeight.h index 96f2f0159..e20d2bdaa 100644 --- a/src/fastertransformer/models/gptj/GptJDecoderLayerWeight.h +++ b/src/fastertransformer/models/gptj/GptJDecoderLayerWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -21,6 +21,7 @@ #include "src/fastertransformer/kernels/layernorm_kernels.h" #include "src/fastertransformer/layers/FfnWeight.h" #include "src/fastertransformer/layers/attention_layers/AttentionWeight.h" +#include "src/fastertransformer/utils/cuda_utils.h" namespace fastertransformer { @@ -28,17 +29,15 @@ template struct GptJDecoderLayerWeight { public: GptJDecoderLayerWeight() = delete; - GptJDecoderLayerWeight( - const int hidden_units, - const int inter_size, - const int tensor_para_size = 1, - const int tensor_para_rank = 0 - ); + GptJDecoderLayerWeight(const int hidden_units, + const int inter_size, + const int tensor_para_size = 1, + const int tensor_para_rank = 0); ~GptJDecoderLayerWeight(); GptJDecoderLayerWeight(const GptJDecoderLayerWeight& other); GptJDecoderLayerWeight& operator=(const GptJDecoderLayerWeight& other); - void loadModel(std::string dir_path); + void loadModel(std::string dir_path, FtCudaDataType model_file_type); LayerNormWeight pre_layernorm_weights; AttentionWeight self_attention_weights; diff --git a/src/fastertransformer/models/gptj/GptJWeight.cc b/src/fastertransformer/models/gptj/GptJWeight.cc index 265d4d467..241bbf5a4 100644 --- a/src/fastertransformer/models/gptj/GptJWeight.cc +++ b/src/fastertransformer/models/gptj/GptJWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -19,17 +19,15 @@ namespace fastertransformer { template -GptJWeight::GptJWeight( - const int hidden_units, - const int inter_size, - const int vocab_size, - const int num_layer, - const int max_seq_len, - const int tensor_para_size, - const int tensor_para_rank, - const int layer_para_size, - const int layer_para_rank -): +GptJWeight::GptJWeight(const int hidden_units, + const int inter_size, + const int vocab_size, + const int num_layer, + const int max_seq_len, + const int tensor_para_size, + const int tensor_para_rank, + const int layer_para_size, + const int layer_para_rank): hidden_units_(hidden_units), inter_size_(inter_size), vocab_size_(vocab_size), @@ -43,18 +41,12 @@ GptJWeight::GptJWeight( for (int l = 0; l < num_layer_; l++) { if (isValidLayerParallelId(l)) { decoder_layer_weights.push_back( - GptJDecoderLayerWeight( - hidden_units_, inter_size_, - tensor_para_size_, tensor_para_rank_ - ) - ); + GptJDecoderLayerWeight(hidden_units_, inter_size_, tensor_para_size_, tensor_para_rank_)); } else { // Layer-parallelism: allocate empty layer because // this rank does not compute it: - decoder_layer_weights.push_back( - GptJDecoderLayerWeight(0, 0) - ); + decoder_layer_weights.push_back(GptJDecoderLayerWeight(0, 0)); } } @@ -157,16 +149,21 @@ void GptJWeight::mallocWeights() template void GptJWeight::loadModel(std::string dir_path) { + // FtCudaDataType model_file_type = getModelFileType(dir_path + "/config.ini"); + FtCudaDataType model_file_type = FtCudaDataType::FP32; // only support FP32 now FT_CHECK(is_maintain_buffer == true); - loadWeightFromBin(weights_ptr[0], {vocab_size_ * hidden_units_}, dir_path + "/model.wte.bin"); - loadWeightFromBin(weights_ptr[1], {hidden_units_}, dir_path + "/model.final_layernorm.bias.bin"); - loadWeightFromBin(weights_ptr[2], {hidden_units_}, dir_path + "/model.final_layernorm.weight.bin"); - loadWeightFromBin(weights_ptr[3], {vocab_size_ * hidden_units_}, dir_path + "/model.lm_head.weight.bin"); - loadWeightFromBin(weights_ptr[4], {vocab_size_}, dir_path + "/model.lm_head.bias.bin"); + loadWeightFromBin(weights_ptr[0], {vocab_size_ * hidden_units_}, dir_path + "/model.wte.bin", model_file_type); + loadWeightFromBin( + weights_ptr[1], {hidden_units_}, dir_path + "/model.final_layernorm.bias.bin", model_file_type); + loadWeightFromBin( + weights_ptr[2], {hidden_units_}, dir_path + "/model.final_layernorm.weight.bin", model_file_type); + loadWeightFromBin( + weights_ptr[3], {vocab_size_ * hidden_units_}, dir_path + "/model.lm_head.weight.bin", model_file_type); + loadWeightFromBin(weights_ptr[4], {vocab_size_}, dir_path + "/model.lm_head.bias.bin", model_file_type); for (int l = 0; l < num_layer_; l++) { - decoder_layer_weights[l].loadModel(dir_path + "/model.layers." + std::to_string(l)); + decoder_layer_weights[l].loadModel(dir_path + "/model.layers." + std::to_string(l), model_file_type); } } diff --git a/src/fastertransformer/models/gptj/GptJWeight.h b/src/fastertransformer/models/gptj/GptJWeight.h index b74bacbe3..04d9ca760 100644 --- a/src/fastertransformer/models/gptj/GptJWeight.h +++ b/src/fastertransformer/models/gptj/GptJWeight.h @@ -26,17 +26,15 @@ template struct GptJWeight { GptJWeight() = default; - GptJWeight( - const int hidden_units, - const int inter_size, - const int vocab_size, - const int num_layer, - const int max_seq_len, - const int tensor_para_size = 1, - const int tensor_para_rank = 0, - const int layer_para_size = 1, - const int layer_para_rank = 0 - ); + GptJWeight(const int hidden_units, + const int inter_size, + const int vocab_size, + const int num_layer, + const int max_seq_len, + const int tensor_para_size = 1, + const int tensor_para_rank = 0, + const int layer_para_size = 1, + const int layer_para_rank = 0); ~GptJWeight(); GptJWeight(const GptJWeight& other); @@ -46,7 +44,7 @@ struct GptJWeight { std::vector> decoder_layer_weights; const T* pre_decoder_embedding_table = nullptr; - // GPT-J does not use embedding table, but we leave the ptr such that + // GPT-J does not use embedding table, but we leave the ptr such that // GptJ::forward and Gpt::forward become identical const T* position_encoding_table = nullptr; diff --git a/src/fastertransformer/models/longformer/CMakeLists.txt b/src/fastertransformer/models/longformer/CMakeLists.txt index 3ba90c5ff..46c3c8d62 100644 --- a/src/fastertransformer/models/longformer/CMakeLists.txt +++ b/src/fastertransformer/models/longformer/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/longformer/LongformerEncoder.h b/src/fastertransformer/models/longformer/LongformerEncoder.h index 655f98112..bb70c7875 100644 --- a/src/fastertransformer/models/longformer/LongformerEncoder.h +++ b/src/fastertransformer/models/longformer/LongformerEncoder.h @@ -21,8 +21,8 @@ #include "src/fastertransformer/kernels/layernorm_kernels.h" #include "src/fastertransformer/kernels/longformer_kernels.h" #include "src/fastertransformer/layers/DenseWeight.h" -#include "src/fastertransformer/layers/attention_layers/LongformerAttentionLayer.h" #include "src/fastertransformer/layers/FfnLayer.h" +#include "src/fastertransformer/layers/attention_layers/LongformerAttentionLayer.h" namespace fastertransformer { diff --git a/src/fastertransformer/models/multi_gpu_gpt/CMakeLists.txt b/src/fastertransformer/models/multi_gpu_gpt/CMakeLists.txt index 839560832..10b9e0b80 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/CMakeLists.txt +++ b/src/fastertransformer/models/multi_gpu_gpt/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -42,8 +42,7 @@ add_library(ParallelGpt STATIC ParallelGpt.cc) set_property(TARGET ParallelGpt PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET ParallelGpt PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) target_link_libraries(ParallelGpt PUBLIC -lcudart ParallelGptDecoder ParallelGptContextDecoder decoding_kernels gpt_kernels - OnlineBeamSearchLayer BeamSearchLayer TopKSamplingLayer TopPSamplingLayer - TopKTopPSamplingLayer bert_preprocess_kernels ParallelGptWeight) + DynamicDecodeLayer BaseBeamSearchLayer bert_preprocess_kernels ParallelGptWeight custom_ar_comm logprob_kernels) add_executable(gpt_gemm gpt_gemm.cc) target_link_libraries(gpt_gemm PUBLIC -lcudart gpt_gemm_func memory_utils) diff --git a/src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.cc b/src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.cc index 05f8abeea..17f909945 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.cc +++ b/src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -19,196 +19,140 @@ #include "src/fastertransformer/kernels/bert_preprocess_kernels.h" #include "src/fastertransformer/kernels/decoding_kernels.h" #include "src/fastertransformer/kernels/gpt_kernels.h" -#include "src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.h" -#include "src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.h" -#include "src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.h" -#include "src/fastertransformer/layers/sampling_layers/TopKTopPSamplingLayer.h" -#include "src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.h" +#include "src/fastertransformer/kernels/logprob_kernels.h" +#include "src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.h" +#include "src/fastertransformer/utils/logger.h" namespace fastertransformer { template void ParallelGpt::initialize() { - gpt_context_decoder_ = new ParallelGptContextDecoder(max_batch_size_ * beam_width_, - max_input_len_, + gpt_context_decoder_ = new ParallelGptContextDecoder(0, + 0, head_num_, size_per_head_, inter_size_, num_layer_, - tensor_para_size_, - tensor_para_rank_, - tensor_para_comm_, - pipeline_para_size_, - pipeline_para_rank_, - pipeline_para_comm_, + tensor_para_, + pipeline_para_, stream_, cublas_wrapper_, allocator_, is_free_buffer_after_forward_, is_context_qk_buf_float_, - sparse_); + sparse_, + custom_all_reduce_comm_, + enable_custom_all_reduce_); - gpt_decoder_ = new ParallelGptDecoder(max_batch_size_ * beam_width_, + gpt_decoder_ = new ParallelGptDecoder(0, head_num_, size_per_head_, inter_size_, num_layer_, - tensor_para_size_, - tensor_para_rank_, - tensor_para_comm_, - pipeline_para_size_, - pipeline_para_rank_, - pipeline_para_comm_, + tensor_para_, + pipeline_para_, stream_, cublas_wrapper_, allocator_, is_free_buffer_after_forward_, sparse_, - int8_mode_); - - if (beam_width_ > 1) { - if (beam_width_ < 16) { - dynamic_decode_ = new OnlineBeamSearchLayer(max_batch_size_, - local_head_num_, - size_per_head_, - beam_width_, - vocab_size_, - vocab_size_padded_, - end_id_, - beam_search_diversity_rate_, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - is_free_buffer_after_forward_); - } - else { - dynamic_decode_ = new BeamSearchLayer(max_batch_size_, - local_head_num_, - size_per_head_, - beam_width_, - vocab_size_, - vocab_size_padded_, - end_id_, - beam_search_diversity_rate_, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - is_free_buffer_after_forward_); - } - } - else if (top_p_ == 0 && top_k_ != 0) { - // we sugguest set the is_free_buffer_after_forward_ of sampling to false - // since we need to initialize some buffers if we allocate buffer - // every time. - dynamic_decode_ = new TopKSamplingLayer(max_batch_size_, - vocab_size_, - vocab_size_padded_, - end_id_, - top_k_, - random_seed_, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - false); - } - else if (top_k_ == 0 && top_p_ != 0.0f) { - // we sugguest set the is_free_buffer_after_forward_ of sampling to false - // since we need to initialize some buffers if we allocate buffer - // every time. - dynamic_decode_ = new TopPSamplingLayer(max_batch_size_, - vocab_size_, - vocab_size_padded_, - end_id_, - top_p_, - random_seed_, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - false, - cuda_device_prop_); - } - else { - // we sugguest set the is_free_buffer_after_forward_ of sampling to false - // since we need to initialize some buffers if we allocate buffer - // every time. - dynamic_decode_ = new TopKTopPSamplingLayer(max_batch_size_, - vocab_size_, - vocab_size_padded_, - end_id_, - top_k_, - top_p_, - random_seed_, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - false); - } + int8_mode_, + custom_all_reduce_comm_, + enable_custom_all_reduce_); + + dynamic_decode_layer_ = new DynamicDecodeLayer(vocab_size_, + vocab_size_padded_, + 0, // end_id, deprecated + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + cuda_device_prop_); } template void ParallelGpt::allocateBuffer() { - if (is_allocate_buffer_ == false) { - - const size_t batchxbeam = max_batch_size_ * beam_width_; - const size_t self_cache_size = - (num_layer_ / pipeline_para_size_) * batchxbeam * max_seq_len_ * hidden_units_ / tensor_para_size_; - - if (vocab_size_ != vocab_size_padded_) { - padded_embedding_kernel_ = (T*)(allocator_->malloc(sizeof(T) * hidden_units_ * vocab_size_padded_, true)); - padded_embedding_kernel_ptr_ = padded_embedding_kernel_; - } + FT_CHECK(false); +} - input_attention_mask_ = (T*)(allocator_->malloc(sizeof(T) * batchxbeam * max_seq_len_ * max_seq_len_, false)); - decoder_input_buf_ = (T*)(allocator_->malloc(sizeof(T) * batchxbeam * hidden_units_, false)); - decoder_output_buf_ = (T*)(allocator_->malloc(sizeof(T) * batchxbeam * hidden_units_, false)); - normed_decoder_output_buf_ = (T*)(allocator_->malloc(sizeof(T) * batchxbeam * hidden_units_, false)); - logits_buf_ = (float*)(allocator_->malloc(sizeof(float) * batchxbeam * vocab_size_padded_, false)); - nccl_logits_buf_ = (float*)(allocator_->malloc(sizeof(float) * batchxbeam * vocab_size_padded_, false)); - cum_log_probs_ = (float*)(allocator_->malloc(sizeof(float) * batchxbeam, false)); - finished_buf_ = (bool*)(allocator_->malloc(sizeof(bool) * batchxbeam, false)); - h_finished_buf_ = new bool[batchxbeam]; - - key_caches_[0] = (T*)(allocator_->malloc(sizeof(T) * self_cache_size, true)); - value_caches_[0] = (T*)(allocator_->malloc(sizeof(T) * self_cache_size, true)); - if (beam_width_ > 1) { - key_caches_[1] = (T*)(allocator_->malloc(sizeof(T) * self_cache_size, true)); - value_caches_[1] = (T*)(allocator_->malloc(sizeof(T) * self_cache_size, true)); - } +template +void ParallelGpt::allocateBuffer(size_t batch_size, + size_t beam_width, + size_t max_seq_len, + size_t max_input_len, + bool is_return_context_cum_log_probs) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + const size_t batchxbeam = batch_size * beam_width; + const size_t self_cache_size = + (num_layer_ / pipeline_para_.world_size_) * batchxbeam * max_seq_len * hidden_units_ / tensor_para_.world_size_; + + if (vocab_size_ != vocab_size_padded_) { + padded_embedding_kernel_ = + (T*)(allocator_->reMalloc(padded_embedding_kernel_, sizeof(T) * hidden_units_ * vocab_size_padded_, true)); + padded_embedding_kernel_ptr_ = padded_embedding_kernel_; + } - padded_pos_embedding_bias_ = (T*)(allocator_->malloc(sizeof(T) * vocab_size_padded_, false)); - output_ids_buf_ = (int*)(allocator_->malloc(sizeof(int) * batchxbeam * max_seq_len_, true)); - parent_ids_buf_ = (int*)(allocator_->malloc(sizeof(int) * batchxbeam * max_seq_len_, true)); - input_length_buf_ = (int*)(allocator_->malloc(sizeof(int) * batchxbeam, false)); + input_attention_mask_ = + (T*)(allocator_->reMalloc(input_attention_mask_, sizeof(T) * batchxbeam * max_seq_len * max_seq_len, false)); + decoder_input_buf_ = (T*)(allocator_->reMalloc(decoder_input_buf_, sizeof(T) * batchxbeam * hidden_units_, false)); + decoder_output_buf_ = + (T*)(allocator_->reMalloc(decoder_output_buf_, sizeof(T) * batchxbeam * hidden_units_, false)); + normed_decoder_output_buf_ = + (T*)(allocator_->reMalloc(normed_decoder_output_buf_, sizeof(T) * batchxbeam * hidden_units_, false)); + logits_buf_ = (float*)(allocator_->reMalloc(logits_buf_, sizeof(float) * batchxbeam * vocab_size_padded_, false)); + nccl_logits_buf_ = + (float*)(allocator_->reMalloc(nccl_logits_buf_, sizeof(float) * batchxbeam * vocab_size_padded_, false)); + cum_log_probs_ = (float*)(allocator_->reMalloc(cum_log_probs_, sizeof(float) * batchxbeam, false)); + finished_buf_ = (bool*)(allocator_->reMalloc(finished_buf_, sizeof(bool) * batchxbeam, false)); + h_finished_buf_ = new bool[batchxbeam]; + + key_cache_ = (T*)(allocator_->reMalloc(key_cache_, sizeof(T) * self_cache_size * 2, true)); + value_cache_ = key_cache_ + self_cache_size; + if (beam_width > 1) { + cache_indirections_[0] = + (int*)(allocator_->reMalloc(cache_indirections_[0], sizeof(int) * batchxbeam * max_seq_len * 2, true)); + cache_indirections_[1] = cache_indirections_[0] + batchxbeam * max_seq_len; + } - context_decoder_input_buf_ = - (T*)(allocator_->malloc(sizeof(T) * batchxbeam * max_input_len_ * hidden_units_, false)); - context_decoder_output_buf_ = - (T*)(allocator_->malloc(sizeof(T) * batchxbeam * max_input_len_ * hidden_units_, false)); - is_allocate_buffer_ = true; + tiled_input_ids_buf_ = + (int*)(allocator_->reMalloc(tiled_input_ids_buf_, sizeof(int) * batchxbeam * max_input_len, true)); + tiled_input_lengths_buf_ = (int*)(allocator_->reMalloc(tiled_input_lengths_buf_, sizeof(int) * batchxbeam, true)); + + start_ids_buf_ = (int*)(allocator_->reMalloc(start_ids_buf_, sizeof(int) * batch_size, false)); + end_ids_buf_ = (int*)(allocator_->reMalloc(end_ids_buf_, sizeof(int) * batch_size, false)); + + transposed_output_ids_buf_ = + (int*)(allocator_->reMalloc(transposed_output_ids_buf_, sizeof(int) * batchxbeam * max_seq_len, true)); + output_ids_buf_ = (int*)(allocator_->reMalloc(output_ids_buf_, sizeof(int) * batchxbeam * max_seq_len, true)); + parent_ids_buf_ = (int*)(allocator_->reMalloc(parent_ids_buf_, sizeof(int) * batchxbeam * max_seq_len, true)); + + context_decoder_input_buf_ = (T*)(allocator_->reMalloc( + context_decoder_input_buf_, sizeof(T) * batchxbeam * max_input_len * hidden_units_, false)); + context_decoder_output_buf_ = (T*)(allocator_->reMalloc( + context_decoder_output_buf_, sizeof(T) * batchxbeam * max_input_len * hidden_units_, false)); + output_log_probs_buf_ = + (float*)(allocator_->reMalloc(output_log_probs_buf_, sizeof(float) * batchxbeam * max_seq_len, false)); + + if (is_return_context_cum_log_probs) { + lp_normed_decoder_output_buf_ = (T*)allocator_->reMalloc( + lp_normed_decoder_output_buf_, sizeof(T) * batchxbeam * max_input_len * hidden_units_); + lp_logits_buf_ = (float*)allocator_->reMalloc(lp_logits_buf_, + sizeof(float) * batchxbeam * max_input_len * vocab_size_padded_); + lp_nccl_logits_buf_ = (float*)allocator_->reMalloc( + lp_nccl_logits_buf_, sizeof(float) * batchxbeam * max_input_len * vocab_size_padded_); + lp_logprob_buf_ = (float*)allocator_->reMalloc(lp_logprob_buf_, sizeof(float) * batchxbeam * max_input_len); } + + is_allocate_buffer_ = true; } template void ParallelGpt::freeBuffer() { - if (is_allocate_buffer_ == true) { + if (is_allocate_buffer_) { if (vocab_size_ != vocab_size_padded_) { padded_embedding_kernel_ptr_ = nullptr; allocator_->free(padded_embedding_kernel_); @@ -224,63 +168,31 @@ void ParallelGpt::freeBuffer() allocator_->free(finished_buf_); delete[] h_finished_buf_; - allocator_->free(key_caches_[0]); - allocator_->free(value_caches_[0]); - if (beam_width_ > 1) { - allocator_->free(key_caches_[1]); - allocator_->free(value_caches_[1]); + allocator_->free(key_cache_); + if (cache_indirections_[0] != nullptr) { + allocator_->free(cache_indirections_[0]); } - allocator_->free(padded_pos_embedding_bias_); + allocator_->free(tiled_input_ids_buf_); + allocator_->free(tiled_input_lengths_buf_); + allocator_->free(transposed_output_ids_buf_); allocator_->free(output_ids_buf_); allocator_->free(parent_ids_buf_); + allocator_->free(start_ids_buf_); + allocator_->free(end_ids_buf_); + allocator_->free(context_decoder_input_buf_); allocator_->free(context_decoder_output_buf_); - is_allocate_buffer_ = false; - } -} + allocator_->free(output_log_probs_buf_); -template -bool ParallelGpt::isValidBatchSize(size_t batch_size) -{ - if (batch_size <= max_batch_size_) { - return true; - } - else { - freeBuffer(); - max_batch_size_ = batch_size * 1.2; - return true; - } -} - -template -bool ParallelGpt::isValidSeqLen(size_t seq_len) -{ - if (seq_len + 1 <= max_seq_len_) { - return true; - } - else { - // Since the max_seq_len_ is related to the position embedding table, - // we cannot dynamic adjust it. - // return false; - freeBuffer(); - max_seq_len_ = (seq_len + 1) * 1.2; - return true; - } -} + allocator_->free(lp_normed_decoder_output_buf_); + allocator_->free(lp_logits_buf_); + allocator_->free(lp_nccl_logits_buf_); + allocator_->free(lp_logprob_buf_); -template -bool ParallelGpt::isValidInputSeqLen(size_t seq_len) -{ - if (seq_len <= max_input_len_) { - return true; - } - else { - freeBuffer(); - max_input_len_ = seq_len * 1.2; - return true; + is_allocate_buffer_ = false; } } @@ -303,24 +215,18 @@ ParallelGpt::ParallelGpt(size_t max_batch_size, float temperature, float len_penalty, float repetition_penalty, - size_t tensor_para_size, - size_t tensor_para_rank, - ncclComm_t tensor_para_comm, - size_t pipeline_para_size, - size_t pipeline_para_rank, - ncclComm_t pipeline_para_comm, + NcclParam tensor_para, + NcclParam pipeline_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, cudaDeviceProp* cuda_device_prop, bool sparse, - int int8_mode): + int int8_mode, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward, cuda_device_prop, sparse), - max_batch_size_(max_batch_size), - max_seq_len_(max_seq_len + 1), - max_input_len_(max_input_len), - beam_width_(beam_width), head_num_(head_num), size_per_head_(size_per_head), inter_size_(inter_size), @@ -336,30 +242,24 @@ ParallelGpt::ParallelGpt(size_t max_batch_size, temperature_(temperature), len_penalty_(len_penalty), repetition_penalty_(repetition_penalty), - tensor_para_size_(tensor_para_size), - tensor_para_rank_(tensor_para_rank), - tensor_para_comm_(tensor_para_comm), - local_head_num_(head_num_ / tensor_para_size_), - pipeline_para_size_(pipeline_para_size), - pipeline_para_rank_(pipeline_para_rank), - pipeline_para_comm_(pipeline_para_comm), - int8_mode_(int8_mode) + tensor_para_(tensor_para), + pipeline_para_(pipeline_para), + local_head_num_(head_num / tensor_para.world_size_), + int8_mode_(int8_mode), + custom_all_reduce_comm_(custom_all_reduce_comm), + enable_custom_all_reduce_(enable_custom_all_reduce) { - vocab_size_padded_ = ((size_t)ceil(vocab_size_ / 1. / tensor_para_size_) * tensor_para_size_); + int local_vacab_size = ceil(vocab_size_ / 1.f / tensor_para_.world_size_); if (std::is_same::value) { - vocab_size_padded_ = ((size_t)ceil(vocab_size_padded_ / 8.) * 8); + local_vacab_size = ceil(local_vacab_size / 8.f) * 8; } - + vocab_size_padded_ = (size_t)local_vacab_size * tensor_para_.world_size_; initialize(); } template ParallelGpt::ParallelGpt(ParallelGpt const& gpt): BaseLayer(gpt), - max_batch_size_(gpt.max_batch_size_), - max_seq_len_(gpt.max_seq_len_), - max_input_len_(gpt.max_input_len_), - beam_width_(gpt.beam_width_), head_num_(gpt.head_num_), size_per_head_(gpt.size_per_head_), inter_size_(gpt.inter_size_), @@ -375,15 +275,13 @@ ParallelGpt::ParallelGpt(ParallelGpt const& gpt): temperature_(gpt.temperature_), len_penalty_(gpt.len_penalty_), repetition_penalty_(gpt.repetition_penalty_), - tensor_para_size_(gpt.tensor_para_size_), - tensor_para_rank_(gpt.tensor_para_rank_), - tensor_para_comm_(gpt.tensor_para_comm_), + tensor_para_(gpt.tensor_para_), + pipeline_para_(gpt.pipeline_para_), local_head_num_(gpt.local_head_num_), - pipeline_para_size_(gpt.pipeline_para_size_), - pipeline_para_rank_(gpt.pipeline_para_rank_), - pipeline_para_comm_(gpt.pipeline_para_comm_), vocab_size_padded_(gpt.vocab_size_padded_), - int8_mode_(gpt.int8_mode_) + int8_mode_(gpt.int8_mode_), + custom_all_reduce_comm_(gpt.custom_all_reduce_comm_), + enable_custom_all_reduce_(gpt.enable_custom_all_reduce_) { initialize(); } @@ -392,26 +290,141 @@ template ParallelGpt::~ParallelGpt() { delete gpt_decoder_; - delete dynamic_decode_; + delete gpt_context_decoder_; + delete dynamic_decode_layer_; freeBuffer(); } +template +void ParallelGpt::computeContextCumLogProbs(float* cum_log_probs, + const T* context_decoder_outputs, + const int* input_ids, + const int* input_lengths, + const size_t batch_size, + const size_t beam_width, + const size_t max_input_length, + const ParallelGptWeight* gpt_weights) +{ + // Compute the log probabilties of prompt inputs. + // + // cum_log_probs [batch_size, beam_width] + // context_decoder_outputs [batch_size * beam_width, max_input_length, hidden_units] + // input_ids [batch_size * beam_width, max_input_length]; input ids. + // input_lengths [batch_size, beam_width]; input lengths. + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + + const size_t batchxbeam = batch_size * beam_width; + const size_t n_hidden_states = batchxbeam * max_input_length; + + if (pipeline_para_.rank_ == pipeline_para_.world_size_ - 1) { + // normed decoder output [batch_size * beam_width, max_input_length, hidden_units_] + invokeGeneralLayerNorm(lp_normed_decoder_output_buf_, + context_decoder_outputs, + gpt_weights->post_decoder_layernorm.gamma, + gpt_weights->post_decoder_layernorm.beta, + n_hidden_states, + hidden_units_, + stream_); + sync_check_cuda_error(); + if (tensor_para_.world_size_ == 1) { + float alpha = 1.0f; + float beta = 0.0f; + cublas_wrapper_->Gemm(CUBLAS_OP_T, + CUBLAS_OP_N, + vocab_size_padded_, // n + n_hidden_states, + hidden_units_, // k + &alpha, + padded_embedding_kernel_ptr_, + sizeof(T) == 2 ? CUDA_R_16F : CUDA_R_32F, + hidden_units_, // k + lp_normed_decoder_output_buf_, + sizeof(T) == 2 ? CUDA_R_16F : CUDA_R_32F, + hidden_units_, // k + &beta, + lp_logits_buf_, + CUDA_R_32F, + vocab_size_padded_, /* n */ + CUDA_R_32F, + cublasGemmAlgo_t(-1)); + sync_check_cuda_error(); + } + else { + FT_CHECK(vocab_size_padded_ % tensor_para_.world_size_ == 0); + const int local_vocab_size = vocab_size_padded_ / tensor_para_.world_size_; + float alpha = 1.0f; + float beta = 0.0f; + cublas_wrapper_->Gemm(CUBLAS_OP_T, + CUBLAS_OP_N, + local_vocab_size, // n + n_hidden_states, + hidden_units_, // k + &alpha, + padded_embedding_kernel_ptr_ + tensor_para_.rank_ * local_vocab_size * hidden_units_, + sizeof(T) == 2 ? CUDA_R_16F : CUDA_R_32F, + hidden_units_, // k + lp_normed_decoder_output_buf_, + sizeof(T) == 2 ? CUDA_R_16F : CUDA_R_32F, + hidden_units_, // k + &beta, + lp_nccl_logits_buf_ + tensor_para_.rank_ * n_hidden_states * local_vocab_size, + CUDA_R_32F, + local_vocab_size, /* n */ + CUDA_R_32F, + cublasGemmAlgo_t(-1)); + sync_check_cuda_error(); + ftNcclAllGather(lp_nccl_logits_buf_, + lp_nccl_logits_buf_, + n_hidden_states * local_vocab_size, + tensor_para_.rank_, + tensor_para_, + stream_); + check_cuda_error(cudaStreamSynchronize(stream_)); + sync_check_cuda_error(); + + invokeTransposeAxis01(lp_logits_buf_, + lp_nccl_logits_buf_, + tensor_para_.world_size_, + n_hidden_states, + local_vocab_size, + stream_); + sync_check_cuda_error(); + } + } + + invokeLogProbFromLogits(cum_log_probs, + lp_logits_buf_, + input_ids, + input_lengths, + max_input_length, + batchxbeam, + vocab_size_, + vocab_size_padded_, + lp_logprob_buf_, + sizeof(float) * batchxbeam * max_input_length, + stream_, + true); + sync_check_cuda_error(); +} + template void ParallelGpt::forward(std::vector* output_tensors, const std::vector* input_tensors, const ParallelGptWeight* gpt_weights) { // input_tensors: - // input_ids [batch_size * beam, max_input_length] - // input_lengths [batch_size * beam] + // input_ids [batch_size, max_input_length] + // input_lengths [batch_size] // max_output_seq_len [1] on cpu // output_tensors: // output_ids [batch_size, beam, max_output_seq_len] // parent_ids [max_output_seq_len, batch_size, beam] // sequence_length [batch_size, beam] - // output_cum_log_probs [request_output_seq_len, batch_size, beam], must be float*. + // output_log_probs [batch_size, beam, request_output_seq_len], must be float*. // It leads to additional computing cost. If we don't need this result, please put nullptr + // cum_log_probs [batch_size, beam], must be float*, optional + // The cumulative log probability of generated sequences. It leads additional computing cost. // Step is from max_input_length ~ max_output_seq_len, // When step = k, we put output ids and caches at step k, and the sequence_length would be k - 1 before @@ -419,126 +432,215 @@ void ParallelGpt::forward(std::vector* output_tensors, // When there is no input_ids, put the start token at step 0 of output_ids_buf_. After forward, only copy // the step 1 ~ max_output_seq_len of output_ids_buf_ to output_tensors->at(0).data - FT_CHECK(input_tensors->size() == 3); - FT_CHECK(output_tensors->size() == 4); - FT_CHECK(input_tensors->at(0).shape.size() == 2); - FT_CHECK(input_tensors->at(1).shape.size() == 1); - FT_CHECK(input_tensors->at(2).shape.size() == 1); - FT_CHECK(output_tensors->at(0).shape.size() == 3); - FT_CHECK(output_tensors->at(1).shape.size() == 3); - FT_CHECK(output_tensors->at(2).shape.size() == 2); - - isValidSeqLen(output_tensors->at(0).shape[2]); - isValidBatchSize(output_tensors->at(0).shape[0]); - isValidInputSeqLen(input_tensors->at(0).shape[1]); - allocateBuffer(); - sync_check_cuda_error(); + std::unordered_map input_tensors_map{{"input_ids", input_tensors->at(0)}, + {"input_lengths", input_tensors->at(1)}, + {"max_output_seq_len", input_tensors->at(2)}}; + input_tensors_map.insert({"random_seed", {MEMORY_CPU, TYPE_INT32, {1}, &random_seed_}}); + input_tensors_map.insert({"runtime_top_k", {MEMORY_CPU, TYPE_INT32, {1}, &top_k_}}); + input_tensors_map.insert({"runtime_top_p", {MEMORY_CPU, TYPE_FP32, {1}, &top_p_}}); + + std::unordered_map output_tensors_map{{"output_ids", output_tensors->at(0)}, + {"parent_ids", output_tensors->at(1)}, + {"sequence_length", output_tensors->at(2)}, + {"output_log_probs", output_tensors->at(3)}}; + if (output_tensors->size() > 3) { + output_tensors_map.insert({"cum_log_probs", output_tensors->at(4)}); + } + forward(&output_tensors_map, &input_tensors_map, gpt_weights); +} + +template +void ParallelGpt::forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors, + const ParallelGptWeight* gpt_weights) +{ + // input_tensors: + // input_ids [batch_size, max_input_length] + // input_lengths [batch_size] + // max_output_seq_len [1] on cpu + // stop_words_list [batch_size, 2, stop_words_length], optional + // start_id [batch_size] on cpu, optional + // end_id [batch_size] on cpu, optional + // runtime_top_k [1] or [batch_size] on cpu, optional + // runtime_top_p [1] or [batch_size] on cpu, optional + // beam_search_diversity_rate [1] or [batch_size] on cpu, optional + // temperature [1] or [batch_size] on cpu, optional + // len_penalty [1] or [batch_size] on cpu, optional + // repetition_penalty [1] or [batch_size] on cpu, optional + // random_seed [1] or [batch_size] on cpu, optional + // prefix_soft_prompt_lengths [batch_size], optional + // prefix_soft_prompt_embedding [batch_size, max_prefix_soft_prompt_length, hidden_units], float, optional + // is_return_context_cum_log_probs [1] on cpu, bool, optional - int max_input_length = input_tensors->at(0).shape[1]; - const int* input_length_ptr = (const int*)(input_tensors->at(1).data); - const size_t max_output_seq_len = - (*((int*)input_tensors->at(2).data)) + (max_input_length == 0 ? 1 : 0); // additional 1 to put start token - FT_CHECK(max_output_seq_len <= max_seq_len_); + // output_tensors: + // output_ids [batch_size, beam_width, max_output_seq_len] + // parent_ids [max_output_seq_len, batch_size, beam_width] + // sequence_length [batch_size, beam_width] + // output_log_probs [batch_size, beam_width, request_output_seq_len], must be float*. + // optional. It leads to additional computing cost. If we don't need this result, don't put it. + // cum_log_probs [batch_size, beam_width], must be float*. optional. + // The cumulative log probability of generated sequences. It may lead to additional computing cost. - const size_t batch_size = output_tensors->at(0).shape[0]; - int* sequence_lengths = (int*)(output_tensors->at(2).data); - const DataType data_type = getTensorType(); + // Step is from max_input_length ~ max_output_seq_len, + // When step = k, we put output ids and caches at step k, and the sequence_length would be k - 1 before + // complete this step. + // When there is no input_ids, put the start token at step 0 of output_ids_buf_. After forward, only copy + // the step 1 ~ max_output_seq_len of output_ids_buf_ to output_tensors->at(0).data - const std::vector self_k_cache_size = {num_layer_ / pipeline_para_size_, - batch_size * beam_width_, - local_head_num_, - size_per_head_ / (16 / sizeof(T)), - max_output_seq_len, - 16 / sizeof(T)}; - const std::vector self_v_cache_size = {num_layer_ / pipeline_para_size_, - batch_size * beam_width_, - local_head_num_, - max_output_seq_len, - size_per_head_}; + FT_CHECK_WITH_INFO(input_tensors->size() >= 3, "input_tensors->size() >= 3"); + FT_CHECK_WITH_INFO(output_tensors->size() >= 3, "output_tensors->size() >= 3"); + FT_CHECK(input_tensors->at("input_ids").shape.size() == 2); + FT_CHECK(input_tensors->at("input_lengths").shape.size() == 1); + FT_CHECK(input_tensors->at("max_output_seq_len").shape.size() == 1); + FT_CHECK(output_tensors->at("output_ids").shape.size() == 3); + FT_CHECK(output_tensors->at("parent_ids").shape.size() == 3); + FT_CHECK(output_tensors->at("sequence_length").shape.size() == 2); + FT_CHECK_WITH_INFO(input_tensors->at("input_ids").shape[0] == output_tensors->at("output_ids").shape[0], + "input_tensors->at(\"input_ids\").shape[0] == output_tensors->at(\"output_ids\").shape[0]"); + + // Used when inputs do not contain random_seed + const size_t batch_size = output_tensors->at("output_ids").shape[0]; + const size_t beam_width = output_tensors->at("output_ids").shape[1]; + FT_CHECK_WITH_INFO(output_tensors->count("cum_log_probs") == 0 + || output_tensors->at("cum_log_probs").size() == batch_size * beam_width, + "The shape of cum_log_probs should match with batch_size x beam_width if provided."); + int max_input_length = input_tensors->at("input_ids").shape[1]; + const size_t max_prefix_soft_prompt_length = input_tensors->count("prefix_soft_prompt_embedding") ? + input_tensors->at("prefix_soft_prompt_embedding").shape[1] : + 0; + const size_t max_output_seq_len = (*((int*)input_tensors->at("max_output_seq_len").data)) + + (max_input_length == 0 ? 1 : 0) // additional 1 to put start token + + max_prefix_soft_prompt_length; + const size_t max_seq_len = max_output_seq_len; + const bool is_return_context_cum_log_probs = input_tensors->count("is_return_context_cum_log_probs") > 0 + && input_tensors->at("is_return_context_cum_log_probs").getVal(); + if (is_return_context_cum_log_probs) { + FT_CHECK_WITH_INFO(output_tensors->count("cum_log_probs") + && output_tensors->at("cum_log_probs").data != nullptr, + "`cum_log_probs` must be provided in `output_tensors` in order to enable " + "the cumulative log probability computation of input contexts."); + } - float* output_cum_log_probs = (float*)(output_tensors->at(3).data); + allocateBuffer(batch_size, + beam_width, + max_seq_len, + max_input_length + max_prefix_soft_prompt_length, + is_return_context_cum_log_probs); + sync_check_cuda_error(); + bool has_diff_runtime_args = hasDiffRuntimeArgs(input_tensors); + int* sequence_lengths = (int*)(output_tensors->at("sequence_length").data); + const DataType data_type = getTensorType(); + const cudaDataType_t gemm_data_type = getCudaDataType(); + + const std::vector self_k_cache_shape = {num_layer_ / pipeline_para_.world_size_, + batch_size * beam_width, + local_head_num_, + size_per_head_ / (16 / sizeof(T)), + max_output_seq_len, + 16 / sizeof(T)}; + const std::vector self_v_cache_shape = {num_layer_ / pipeline_para_.world_size_, + batch_size * beam_width, + local_head_num_, + max_output_seq_len, + size_per_head_}; + + handleOptArg(input_tensors, "start_id", start_ids_buf_, start_id_, batch_size); + handleOptArg(input_tensors, "end_id", end_ids_buf_, end_id_, batch_size); + + // TODO(bhsueh) Initilaize them in one kernel // initialize the output ids and parent ids - cudaMemsetAsync(output_ids_buf_, 0, sizeof(int) * batch_size * beam_width_ * max_seq_len_, stream_); - cudaMemsetAsync(parent_ids_buf_, 0, sizeof(int) * batch_size * beam_width_ * max_seq_len_, stream_); + cudaMemsetAsync(output_ids_buf_, 0, sizeof(int) * batch_size * beam_width * max_seq_len, stream_); + cudaMemsetAsync(parent_ids_buf_, 0, sizeof(int) * batch_size * beam_width * max_seq_len, stream_); + if (beam_width > 1) { + cudaMemsetAsync(cache_indirections_[0], 0, 2 * sizeof(int) * batch_size * beam_width * max_seq_len, stream_); + } sync_check_cuda_error(); - // handle first step - if (max_input_length == 0) { - max_input_length++; - invokeDecodingInitialize(finished_buf_, - sequence_lengths, - output_ids_buf_, - cum_log_probs_, - start_id_, - batch_size, - beam_width_, - max_input_length - 1, - stream_); - std::vector h_input_lengths(batch_size * beam_width_, 1); - cudaMemcpyAsync(input_length_buf_, - h_input_lengths.data(), - sizeof(int) * batch_size * beam_width_, - cudaMemcpyHostToDevice, + if (vocab_size_ == vocab_size_padded_) { + padded_embedding_kernel_ptr_ = gpt_weights->post_decoder_embedding.kernel; + } + else { + cudaMemcpyAsync(padded_embedding_kernel_, + gpt_weights->post_decoder_embedding.kernel, + sizeof(T) * vocab_size_ * hidden_units_, + cudaMemcpyDeviceToDevice, stream_); - input_length_ptr = input_length_buf_; sync_check_cuda_error(); } - else if (max_input_length == 1) { - invokeDecodingInitialize(finished_buf_, - sequence_lengths, - nullptr, - cum_log_probs_, - start_id_, - batch_size, - beam_width_, - max_input_length - 1, - stream_); + + // handle first step + if (input_tensors->count("prefix_soft_prompt_embedding") || max_input_length >= 1) { + invokeTileGptInputs(tiled_input_ids_buf_, + tiled_input_lengths_buf_, + (int*)input_tensors->at("input_ids").data, + (const int*)(input_tensors->at("input_lengths").data), + batch_size, + beam_width, + max_input_length, + stream_); sync_check_cuda_error(); - cudaMemcpyAsync(output_ids_buf_, - (int*)input_tensors->at(0).data, - sizeof(int) * batch_size * beam_width_, - cudaMemcpyDeviceToDevice, - stream_); - } - else if (max_input_length > 1) { + if (input_tensors->count("prefix_soft_prompt_embedding")) { + inputIdsEmbeddingLookupPosEncodingSoftPromptParam param; + param.from_tensor = context_decoder_input_buf_; + param.output_ids = output_ids_buf_; + param.input_lengths = tiled_input_lengths_buf_; + param.embedding_table = gpt_weights->pre_decoder_embedding_table; + param.pos_table = gpt_weights->position_encoding_table; + param.prefix_soft_prompt_embedding = input_tensors->at("prefix_soft_prompt_embedding").getPtr(); + param.prefix_soft_prompt_lengths = input_tensors->at("prefix_soft_prompt_lengths").getPtr(); + param.input_ids = tiled_input_ids_buf_; + param.start_step = 1; + param.max_input_length = max_input_length; + param.max_prefix_soft_prompt_length = max_prefix_soft_prompt_length; + param.batch_size = batch_size; + param.beam_width = beam_width; + param.hidden_units = hidden_units_; + param.stream = stream_; + + invokeInputIdsEmbeddingLookupPosEncodingSoftPrompt(param); + sync_check_cuda_error(); + max_input_length += max_prefix_soft_prompt_length; // view soft_prompt as input + } + else { + invokeInputIdsEmbeddingLookupPosEncoding(context_decoder_input_buf_, + output_ids_buf_, + gpt_weights->pre_decoder_embedding_table, + gpt_weights->position_encoding_table, + tiled_input_ids_buf_, + 1, + max_input_length, + max_input_length, + batch_size * beam_width, + hidden_units_, + stream_); + sync_check_cuda_error(); + } + invokeBuildDecoderAttentionMask( - input_attention_mask_, input_length_ptr, batch_size * beam_width_, max_input_length, stream_); + input_attention_mask_, tiled_input_lengths_buf_, batch_size * beam_width, max_input_length, stream_); sync_check_cuda_error(); - invokeInputIdsEmbeddingLookupPosEncoding(context_decoder_input_buf_, - output_ids_buf_, - gpt_weights->pre_decoder_embedding_table, - gpt_weights->position_encoding_table, - (int*)input_tensors->at(0).data, - 1, - max_input_length, - max_input_length, - batch_size * beam_width_, - hidden_units_, - stream_); - std::vector decoder_input_tensors{ Tensor{MEMORY_GPU, data_type, - {batch_size * beam_width_, (size_t)max_input_length, hidden_units_}, + {batch_size * beam_width, (size_t)max_input_length, hidden_units_}, context_decoder_input_buf_}, Tensor{MEMORY_GPU, data_type, - {batch_size * beam_width_, 1, (size_t)max_input_length, (size_t)max_input_length}, + {batch_size * beam_width, 1, (size_t)max_input_length, (size_t)max_input_length}, input_attention_mask_}, - Tensor{MEMORY_GPU, TYPE_INT32, {batch_size * beam_width_}, input_length_ptr}}; + Tensor{MEMORY_GPU, TYPE_INT32, {batch_size * beam_width}, tiled_input_lengths_buf_}}; - const int src_cache_id = beam_width_ > 1 ? (max_input_length - 1) & 0x1 : 0; std::vector decoder_output_tensors{ Tensor{MEMORY_GPU, data_type, - {batch_size * beam_width_, (size_t)max_input_length, hidden_units_}, + {batch_size * beam_width, (size_t)max_input_length, hidden_units_}, context_decoder_output_buf_}, - Tensor{MEMORY_GPU, data_type, self_k_cache_size, key_caches_[src_cache_id]}, - Tensor{MEMORY_GPU, data_type, self_v_cache_size, value_caches_[src_cache_id]}, - Tensor{MEMORY_GPU, data_type, {batch_size * beam_width_, hidden_units_}, decoder_output_buf_}}; + Tensor{MEMORY_GPU, data_type, self_k_cache_shape, key_cache_}, + Tensor{MEMORY_GPU, data_type, self_v_cache_shape, value_cache_}, + Tensor{MEMORY_GPU, data_type, {batch_size * beam_width, hidden_units_}, decoder_output_buf_}}; gpt_context_decoder_->forward( &decoder_output_tensors, &decoder_input_tensors, &gpt_weights->decoder_layer_weights); @@ -547,52 +649,97 @@ void ParallelGpt::forward(std::vector* output_tensors, sequence_lengths, nullptr, cum_log_probs_, - start_id_, + start_ids_buf_, batch_size, - beam_width_, + beam_width, max_input_length - 1, stream_); + + if (is_return_context_cum_log_probs) { + computeContextCumLogProbs(cum_log_probs_, + context_decoder_output_buf_, + tiled_input_ids_buf_, + tiled_input_lengths_buf_, + batch_size, + beam_width, + (size_t)max_input_length, + gpt_weights); + } sync_check_cuda_error(); } - - if (vocab_size_ == vocab_size_padded_) { - padded_embedding_kernel_ptr_ = gpt_weights->post_decoder_embedding.kernel; + else if (max_input_length == 0) { + max_input_length++; + invokeDecodingInitialize(finished_buf_, + sequence_lengths, + output_ids_buf_, + cum_log_probs_, + start_ids_buf_, + batch_size, + beam_width, + max_input_length - 1, + stream_); + std::vector h_input_lengths(batch_size * beam_width, 1); + cudaMemcpyAsync(tiled_input_lengths_buf_, + h_input_lengths.data(), + sizeof(int) * batch_size * beam_width, + cudaMemcpyHostToDevice, + stream_); + sync_check_cuda_error(); } - else { - cudaMemcpyAsync(padded_embedding_kernel_, - gpt_weights->post_decoder_embedding.kernel, - sizeof(T) * vocab_size_ * hidden_units_, + else if (max_input_length == 1) { + invokeDecodingInitialize(finished_buf_, + sequence_lengths, + nullptr, + cum_log_probs_, + start_ids_buf_, + batch_size, + beam_width, + max_input_length - 1, + stream_); + sync_check_cuda_error(); + invokeTileGptInputs(tiled_input_ids_buf_, + tiled_input_lengths_buf_, + (int*)input_tensors->at("input_ids").data, + (const int*)(input_tensors->at("input_lengths").data), + batch_size, + beam_width, + max_input_length, + stream_); + sync_check_cuda_error(); + + cudaMemcpyAsync(output_ids_buf_, + tiled_input_ids_buf_, + sizeof(int) * batch_size * beam_width, cudaMemcpyDeviceToDevice, stream_); - sync_check_cuda_error(); } for (int step = max_input_length; step < (int)max_output_seq_len; step++) { - const int src_cache_id = beam_width_ > 1 ? (step - 1) & 0x1 : 0; - const int tgt_cache_id = 1 - src_cache_id; + const int src_indir_idx = (step - max_input_length) % 2; + const int tgt_indir_idx = 1 - src_indir_idx; - const size_t local_batch_size = getLocalBatchSize(batch_size, 1, pipeline_para_size_); + const size_t local_batch_size = getLocalBatchSize(batch_size, 1, pipeline_para_.world_size_); FT_CHECK(batch_size % local_batch_size == 0); const size_t iteration_num = batch_size / local_batch_size; for (uint ite = 0; ite < iteration_num; ++ite) { - const int id_offset = ite * local_batch_size * beam_width_; + const int id_offset = ite * local_batch_size * beam_width; const int hidden_units_offset = id_offset * hidden_units_; const int vocab_size_units_offset = id_offset * vocab_size_padded_; if (!(max_input_length > 1 && step == max_input_length)) { - if (pipeline_para_rank_ == 0) { + if (pipeline_para_.rank_ == 0) { invokeEmbeddingLookupPosEncoding(decoder_input_buf_ + hidden_units_offset, gpt_weights->pre_decoder_embedding_table, gpt_weights->position_encoding_table, output_ids_buf_ + id_offset, - input_length_ptr + id_offset, - local_batch_size * beam_width_, + tiled_input_lengths_buf_ + id_offset, + local_batch_size * beam_width, hidden_units_, (T)(1.0f), step - 1, max_input_length, - batch_size * beam_width_, + batch_size * beam_width, 0, stream_); sync_check_cuda_error(); @@ -601,49 +748,56 @@ void ParallelGpt::forward(std::vector* output_tensors, std::vector decoder_input_tensors{ Tensor{MEMORY_GPU, data_type, - {local_batch_size * beam_width_, hidden_units_}, + {local_batch_size * beam_width, hidden_units_}, decoder_input_buf_ + hidden_units_offset}, - Tensor{MEMORY_GPU, TYPE_BOOL, {local_batch_size * beam_width_}, finished_buf_ + id_offset}, - Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size * beam_width_}, sequence_lengths + id_offset}, - Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size * beam_width_}, input_length_ptr + id_offset}, + Tensor{MEMORY_GPU, TYPE_BOOL, {local_batch_size * beam_width}, finished_buf_ + id_offset}, + Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size * beam_width}, sequence_lengths + id_offset}, + Tensor{ + MEMORY_GPU, TYPE_INT32, {local_batch_size * beam_width}, tiled_input_lengths_buf_ + id_offset}, Tensor{MEMORY_CPU, TYPE_INT32, {1}, &max_input_length}, Tensor{MEMORY_CPU, TYPE_INT32, {1}, &step}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &ite}}; + Tensor{MEMORY_CPU, TYPE_INT32, {1}, &ite}, + Tensor{MEMORY_GPU, + TYPE_INT32, + {local_batch_size, beam_width, max_output_seq_len}, + beam_width > 1 ? cache_indirections_[src_indir_idx] + id_offset * max_output_seq_len : + nullptr}}; + std::vector decoder_output_tensors{ Tensor{MEMORY_GPU, data_type, - {local_batch_size * beam_width_, hidden_units_}, + {local_batch_size * beam_width, hidden_units_}, decoder_output_buf_ + hidden_units_offset}, - Tensor{MEMORY_GPU, data_type, self_k_cache_size, key_caches_[src_cache_id]}, - Tensor{MEMORY_GPU, data_type, self_v_cache_size, value_caches_[src_cache_id]}}; + Tensor{MEMORY_GPU, data_type, self_k_cache_shape, key_cache_}, + Tensor{MEMORY_GPU, data_type, self_v_cache_shape, value_cache_}}; gpt_decoder_->forward( &decoder_output_tensors, &decoder_input_tensors, &gpt_weights->decoder_layer_weights); } - if (pipeline_para_rank_ == pipeline_para_size_ - 1) { + if (pipeline_para_.rank_ == pipeline_para_.world_size_ - 1) { invokeGeneralLayerNorm(normed_decoder_output_buf_ + hidden_units_offset, decoder_output_buf_ + hidden_units_offset, gpt_weights->post_decoder_layernorm.gamma, gpt_weights->post_decoder_layernorm.beta, - local_batch_size * beam_width_, + local_batch_size * beam_width, hidden_units_, stream_); sync_check_cuda_error(); - if (tensor_para_size_ == 1) { + if (tensor_para_.world_size_ == 1) { float alpha = 1.0f; float beta = 0.0f; cublas_wrapper_->Gemm(CUBLAS_OP_T, CUBLAS_OP_N, vocab_size_padded_, // n - local_batch_size * beam_width_, + local_batch_size * beam_width, hidden_units_, // k &alpha, padded_embedding_kernel_ptr_, - sizeof(T) == 2 ? CUDA_R_16F : CUDA_R_32F, + gemm_data_type, hidden_units_, // k normed_decoder_output_buf_ + hidden_units_offset, - sizeof(T) == 2 ? CUDA_R_16F : CUDA_R_32F, + gemm_data_type, hidden_units_, // k &beta, logits_buf_ + vocab_size_units_offset, @@ -653,123 +807,134 @@ void ParallelGpt::forward(std::vector* output_tensors, cublasGemmAlgo_t(-1)); } else { - FT_CHECK(vocab_size_padded_ % tensor_para_size_ == 0); - const int local_vocab_size = vocab_size_padded_ / tensor_para_size_; + FT_CHECK(vocab_size_padded_ % tensor_para_.world_size_ == 0); + const int local_vocab_size = vocab_size_padded_ / tensor_para_.world_size_; float alpha = 1.0f; float beta = 0.0f; cublas_wrapper_->Gemm(CUBLAS_OP_T, CUBLAS_OP_N, local_vocab_size, // n - local_batch_size * beam_width_, + local_batch_size * beam_width, hidden_units_, // k &alpha, padded_embedding_kernel_ptr_ - + tensor_para_rank_ * local_vocab_size * hidden_units_, - sizeof(T) == 2 ? CUDA_R_16F : CUDA_R_32F, + + tensor_para_.rank_ * local_vocab_size * hidden_units_, + gemm_data_type, hidden_units_, // k normed_decoder_output_buf_ + hidden_units_offset, - sizeof(T) == 2 ? CUDA_R_16F : CUDA_R_32F, + gemm_data_type, hidden_units_, // k &beta, nccl_logits_buf_ + vocab_size_units_offset - + tensor_para_rank_ * local_batch_size * beam_width_ * local_vocab_size, + + tensor_para_.rank_ * local_batch_size * beam_width * local_vocab_size, CUDA_R_32F, local_vocab_size, /* n */ CUDA_R_32F, cublasGemmAlgo_t(-1)); ftNcclAllGather(nccl_logits_buf_ + vocab_size_units_offset, nccl_logits_buf_ + vocab_size_units_offset, - local_batch_size * beam_width_ * local_vocab_size, - tensor_para_rank_, - tensor_para_comm_, + local_batch_size * beam_width * local_vocab_size, + tensor_para_.rank_, + tensor_para_, stream_); check_cuda_error(cudaStreamSynchronize(stream_)); invokeTransposeAxis01(logits_buf_ + vocab_size_units_offset, nccl_logits_buf_ + vocab_size_units_offset, - tensor_para_size_, - local_batch_size * beam_width_, + tensor_para_.world_size_, + local_batch_size * beam_width, local_vocab_size, stream_); } - std::vector* dynamic_decode_input_tensors; - std::vector* dynamic_decode_output_tensors; - if (beam_width_ > 1) { - dynamic_decode_input_tensors = new std::vector{ - Tensor{MEMORY_GPU, - TYPE_FP32, - {local_batch_size, beam_width_, vocab_size_padded_}, - logits_buf_ + vocab_size_units_offset}, - Tensor{MEMORY_GPU, data_type, {vocab_size_padded_}, nullptr}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &step}, - Tensor{MEMORY_GPU, data_type, self_k_cache_size, key_caches_[src_cache_id]}, - Tensor{MEMORY_GPU, data_type, self_v_cache_size, value_caches_[src_cache_id]}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &max_input_length}, - Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size, beam_width_}, input_length_ptr + id_offset}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &ite}}; - - dynamic_decode_output_tensors = new std::vector{ - Tensor{MEMORY_GPU, TYPE_INT32, {max_output_seq_len, batch_size, beam_width_}, output_ids_buf_}, - Tensor{MEMORY_GPU, TYPE_BOOL, {local_batch_size * beam_width_}, finished_buf_ + id_offset}, - Tensor{MEMORY_GPU, TYPE_FP32, {local_batch_size * beam_width_}, cum_log_probs_ + id_offset}, - Tensor{MEMORY_GPU, TYPE_INT32, {max_output_seq_len, batch_size, beam_width_}, parent_ids_buf_}, - Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size * beam_width_}, sequence_lengths + id_offset}, - Tensor{MEMORY_GPU, data_type, self_k_cache_size, key_caches_[tgt_cache_id]}, - Tensor{MEMORY_GPU, data_type, self_v_cache_size, value_caches_[tgt_cache_id]}}; + int tmp_local_batch_size = local_batch_size; + bool is_initialize_random_table = step == max_input_length; + std::unordered_map dynamic_decode_input_tensors{ + {"logits", + Tensor{MEMORY_GPU, TYPE_FP32, {batch_size, beam_width, vocab_size_padded_}, logits_buf_}}, + {"embedding_bias", Tensor{MEMORY_GPU, data_type, {vocab_size_padded_}, nullptr}}, + {"step", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &step}}, + {"max_input_length", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &max_input_length}}, + {"end_id", Tensor{MEMORY_GPU, TYPE_INT32, {batch_size}, end_ids_buf_}}, + {"input_lengths", + Tensor{MEMORY_GPU, TYPE_INT32, {batch_size, beam_width}, tiled_input_lengths_buf_}}, + {"ite", Tensor{MEMORY_CPU, TYPE_UINT32, {1}, &ite}}, + {"has_diff_runtime_args", Tensor{MEMORY_CPU, TYPE_BOOL, {1}, &has_diff_runtime_args}}, + {"src_key_cache", Tensor{MEMORY_GPU, data_type, self_k_cache_shape, key_cache_}}, + {"src_value_cache", Tensor{MEMORY_GPU, data_type, self_v_cache_shape, value_cache_}}, + {"src_cache_indirection", + Tensor{MEMORY_GPU, + TYPE_INT32, + {local_batch_size, beam_width, max_output_seq_len}, + cache_indirections_[src_indir_idx] + id_offset * max_output_seq_len}}, + {"local_batch_size", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &tmp_local_batch_size}}, + {"is_initialize_random_table", Tensor{MEMORY_CPU, TYPE_BOOL, {1}, &is_initialize_random_table}}}; + + for (auto t = input_tensors->begin(); t != input_tensors->end(); ++t) { + if (dynamic_decode_input_tensors.find(t->first) == dynamic_decode_input_tensors.end()) { + dynamic_decode_input_tensors.insert(*t); + } } - else { - dynamic_decode_input_tensors = new std::vector{ - Tensor{MEMORY_GPU, - TYPE_FP32, - {local_batch_size, vocab_size_padded_}, - logits_buf_ + vocab_size_units_offset}, - Tensor{MEMORY_GPU, data_type, {vocab_size_padded_}, nullptr}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &step}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &max_input_length}, - Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size}, input_length_ptr + id_offset}, - Tensor{MEMORY_GPU, TYPE_INT32, {1}, &ite}}; - - dynamic_decode_output_tensors = new std::vector{ - Tensor{MEMORY_GPU, - TYPE_INT32, - {max_output_seq_len, batch_size}, - output_ids_buf_}, // note that we need to put whole output_ids here - Tensor{MEMORY_GPU, TYPE_BOOL, {local_batch_size}, finished_buf_ + id_offset}, - Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size}, sequence_lengths + id_offset}, - Tensor{MEMORY_GPU, - TYPE_FP32, - {local_batch_size}, - output_cum_log_probs == nullptr ? - nullptr : - output_cum_log_probs + (step - max_input_length) * batch_size * beam_width_ - + id_offset}}; + + // common outputs + std::unordered_map dynamic_decode_output_tensors{ + {"output_ids", + Tensor{MEMORY_GPU, TYPE_INT32, {max_seq_len, batch_size, beam_width}, output_ids_buf_}}, + {"finished", Tensor{MEMORY_GPU, TYPE_BOOL, {batch_size * beam_width}, finished_buf_}}, + // cum_log_probs is necessary for beam search, while it is optional for sampling. + {"cum_log_probs", + Tensor{MEMORY_GPU, + TYPE_FP32, + {batch_size * beam_width}, + ((beam_width > 1) || (output_tensors->count("cum_log_probs") > 0)) ? cum_log_probs_ : + nullptr}}, + {"output_log_probs", + Tensor{MEMORY_GPU, + TYPE_FP32, + {max_seq_len, batch_size, beam_width}, + output_tensors->count("output_log_probs") > 0 + && output_tensors->at("output_log_probs").data != nullptr ? + output_log_probs_buf_ : + nullptr}}, + {"parent_ids", + Tensor{MEMORY_GPU, TYPE_INT32, {max_seq_len, batch_size, beam_width}, parent_ids_buf_}}, + {"sequence_length", Tensor{MEMORY_GPU, TYPE_INT32, {batch_size * beam_width}, sequence_lengths}}, + {"tgt_cache_indirection", + Tensor{MEMORY_GPU, + TYPE_INT32, + {local_batch_size, beam_width, max_output_seq_len}, + cache_indirections_[tgt_indir_idx] + id_offset * max_output_seq_len}}}; + for (auto t = output_tensors->begin(); t != output_tensors->end(); ++t) { + // Handle exceptions. + if (t->first == "cum_log_probs" || t->first == "output_log_probs") { + continue; + } + dynamic_decode_output_tensors.insert(*t); } - dynamic_decode_->forward(dynamic_decode_output_tensors, dynamic_decode_input_tensors); - delete dynamic_decode_input_tensors; - delete dynamic_decode_output_tensors; + dynamic_decode_layer_->forward(&dynamic_decode_output_tensors, &dynamic_decode_input_tensors); } } - if (pipeline_para_size_ > 1) { + if (pipeline_para_.world_size_ > 1) { NCCLCHECK(ncclGroupStart()); - ftNcclBroadCast(output_ids_buf_ + step * batch_size * beam_width_, - batch_size * beam_width_, - pipeline_para_size_ - 1, - pipeline_para_comm_, + ftNcclBroadCast(output_ids_buf_ + step * batch_size * beam_width, + batch_size * beam_width, + pipeline_para_.world_size_ - 1, + pipeline_para_, stream_); ftNcclBroadCast( - sequence_lengths, batch_size * beam_width_, pipeline_para_size_ - 1, pipeline_para_comm_, stream_); + sequence_lengths, batch_size * beam_width, pipeline_para_.world_size_ - 1, pipeline_para_, stream_); ftNcclBroadCast( - finished_buf_, batch_size * beam_width_, pipeline_para_size_ - 1, pipeline_para_comm_, stream_); + finished_buf_, batch_size * beam_width, pipeline_para_.world_size_ - 1, pipeline_para_, stream_); - if (beam_width_ > 1) { - ftNcclBroadCast(parent_ids_buf_ + step * batch_size * beam_width_, - batch_size * beam_width_, - pipeline_para_size_ - 1, - pipeline_para_comm_, + if (beam_width > 1) { + + ftNcclBroadCast(cache_indirections_[tgt_indir_idx], + batch_size * beam_width * max_output_seq_len, + pipeline_para_.world_size_ - 1, + pipeline_para_, stream_); } NCCLCHECK(ncclGroupEnd()); @@ -777,133 +942,184 @@ void ParallelGpt::forward(std::vector* output_tensors, sync_check_cuda_error(); } - if (pipeline_para_rank_ != pipeline_para_size_ - 1 && beam_width_ > 1) { - // update kv cache of other pipeline_para_rank since they don't - // enter the beam search - update_KV_cache_kernelLauncher(key_caches_[tgt_cache_id], - value_caches_[tgt_cache_id], - key_caches_[src_cache_id], - value_caches_[src_cache_id], - parent_ids_buf_ + step * batch_size * beam_width_, - finished_buf_, - batch_size, - batch_size, - beam_width_, - local_head_num_, - size_per_head_, - step, - max_output_seq_len, - batch_size * beam_width_ * local_head_num_ * size_per_head_ - * max_output_seq_len, - num_layer_ / pipeline_para_size_, - 0, - stream_); - sync_check_cuda_error(); - } - - cudaD2Hcpy(h_finished_buf_, finished_buf_, batch_size * beam_width_); + cudaD2Hcpy(h_finished_buf_, finished_buf_, batch_size * beam_width); uint sum = 0; - for (uint i = 0; i < batch_size * beam_width_; i++) { + for (uint i = 0; i < batch_size * beam_width; i++) { sum += (int)h_finished_buf_[i]; } - if (sum == batch_size * beam_width_) { + if (sum == batch_size * beam_width) { break; } } - if (input_tensors->at(0).shape[1] == 0) { - if (beam_width_ > 1) { - // For beam search, do gather_tree - invokeGatherTree((int*)output_tensors->at(1).data, - (int*)output_tensors->at(2).data, - max_output_seq_len - 1, - batch_size, - beam_width_, - output_ids_buf_ + batch_size * beam_width_, - parent_ids_buf_ + batch_size * beam_width_, - end_id_, - stream_); - - // transpose and take output_parent_ids as inter buffer - invokeTransposeAxis01((int*)output_tensors->at(0).data, - (int*)output_tensors->at(1).data, - max_output_seq_len - 1, - batch_size * beam_width_, - 1, - stream_); + if (pipeline_para_.rank_ == pipeline_para_.world_size_ - 1) { + if (input_tensors->at("input_ids").shape[1] == 0) { + if (beam_width > 1) { + // For beam search, do gather_tree + invokeGatherTree(transposed_output_ids_buf_, + sequence_lengths, + max_output_seq_len, + batch_size, + beam_width, + output_ids_buf_ + batch_size * beam_width, + parent_ids_buf_ + batch_size * beam_width, + end_ids_buf_, + stream_); - cudaD2Dcpy((int*)output_tensors->at(1).data, - parent_ids_buf_ + batch_size * beam_width_, - batch_size * beam_width_ * (max_output_seq_len - 1)); + // transpose and take output_parent_ids as inter buffer + invokeTransposeAxis01((int*)output_tensors->at("output_ids").data, + transposed_output_ids_buf_, + max_output_seq_len - 1, + batch_size * beam_width, + 1, + stream_); + + cudaD2Dcpy((int*)output_tensors->at("parent_ids").data, + parent_ids_buf_ + batch_size * beam_width, + batch_size * beam_width * (max_output_seq_len - 1)); + } + else { + // For sampling, only transpose the results to output_tensor + invokeTransposeAxis01((int*)output_tensors->at("output_ids").data, + output_ids_buf_ + batch_size * beam_width, + max_output_seq_len - 1, + batch_size * beam_width, + 1, + stream_); + } } else { - // For sampling, only transpose the results to output_tensor - invokeTransposeAxis01((int*)output_tensors->at(0).data, - output_ids_buf_ + batch_size * beam_width_, - max_output_seq_len - 1, - batch_size * beam_width_, + // add sequence_length 1 here because the sequence_length of time step t is t - 1 + invokePlusScalar(sequence_lengths, 1, batch_size * beam_width, stream_); + + // For sampling, it is equivalent to all parent ids are 0. + gatherTreeParam param; + param.beams = transposed_output_ids_buf_; + param.max_sequence_lengths = sequence_lengths; + param.max_time = max_output_seq_len; + param.batch_size = batch_size; + param.beam_width = beam_width; + param.step_ids = output_ids_buf_; + param.parent_ids = beam_width == 1 ? nullptr : parent_ids_buf_; + param.end_tokens = end_ids_buf_; + param.max_input_length = max_input_length; + param.prefix_soft_prompt_lengths = input_tensors->count("prefix_soft_prompt_lengths") ? + input_tensors->at("prefix_soft_prompt_lengths").getPtr() : + nullptr; + param.input_lengths = tiled_input_lengths_buf_; + param.max_prefix_soft_prompt_length = max_prefix_soft_prompt_length; + param.stream = stream_; + param.output_ids = (int*)output_tensors->at("output_ids").data; + invokeGatherTree(param); + sync_check_cuda_error(); + } + + if (output_tensors->count("output_log_probs")) { + invokeTransposeAxis01(output_tensors->at("output_log_probs").getPtr(), + output_log_probs_buf_, + input_tensors->at("max_output_seq_len").getVal() - max_input_length, + batch_size * beam_width, 1, stream_); } + // Return the cumulative log probability if requested. + if (output_tensors->count("cum_log_probs") > 0 && output_tensors->at("cum_log_probs").data != nullptr) { + Tensor cum_log_probs = output_tensors->at("cum_log_probs"); + FT_CHECK_WITH_INFO(cum_log_probs.size() == batch_size * beam_width, + "The shape of cum_log_probs does not match with batch_size x beam_width."); + cudaD2Dcpy(cum_log_probs.getPtr(), cum_log_probs_, batch_size * beam_width); + } } - else { - if (beam_width_ > 1) { - // For beam search, do gather_tree - invokeGatherTree((int*)output_tensors->at(1).data, - (int*)output_tensors->at(2).data, - max_output_seq_len, - batch_size, - beam_width_, - output_ids_buf_, - parent_ids_buf_, - -1, - stream_); - - // transpose and take output_parent_ids as inter buffer - invokeTransposeAxis01((int*)output_tensors->at(0).data, - (int*)output_tensors->at(1).data, - max_output_seq_len, - batch_size * beam_width_, - 1, - stream_); - cudaD2Dcpy( - (int*)output_tensors->at(1).data, parent_ids_buf_, batch_size * beam_width_ * max_output_seq_len); + if (pipeline_para_.world_size_ > 1) { + NCCLCHECK(ncclGroupStart()); + if (pipeline_para_.rank_ == pipeline_para_.world_size_ - 1) { + ftNcclSend(output_tensors->at("output_ids").getPtr(), + batch_size * beam_width * max_output_seq_len, + 0, + pipeline_para_, + stream_); + + ftNcclSend(output_tensors->at("sequence_length").getPtr(), + batch_size * beam_width, + 0, + pipeline_para_, + stream_); + + if (output_tensors->count("cum_log_probs") > 0 && output_tensors->at("cum_log_probs").data != nullptr) { + ftNcclSend(output_tensors->at("cum_log_probs").getPtr(), + batch_size * beam_width, + 0, + pipeline_para_, + stream_); + } + + if (output_tensors->count("output_log_probs") > 0 + && output_tensors->at("output_log_probs").data != nullptr) { + ftNcclSend(output_tensors->at("output_log_probs").getPtr(), + batch_size * beam_width * input_tensors->at("max_output_seq_len").getVal(), + 0, + pipeline_para_, + stream_); + } } - else { - // For sampling, only transpose the results to output_tensor - invokeTransposeAxis01((int*)output_tensors->at(0).data, - output_ids_buf_, - max_output_seq_len, - batch_size * beam_width_, - 1, - stream_); + else if (pipeline_para_.rank_ == 0) { + ftNcclRecv(output_tensors->at("output_ids").getPtr(), + batch_size * beam_width * max_output_seq_len, + pipeline_para_.world_size_ - 1, + pipeline_para_, + stream_); + + ftNcclRecv(output_tensors->at("sequence_length").getPtr(), + batch_size * beam_width, + pipeline_para_.world_size_ - 1, + pipeline_para_, + stream_); + + if (output_tensors->count("cum_log_probs") > 0 && output_tensors->at("cum_log_probs").data != nullptr) { + ftNcclRecv(output_tensors->at("cum_log_probs").getPtr(), + batch_size * beam_width, + pipeline_para_.world_size_ - 1, + pipeline_para_, + stream_); + } + + if (output_tensors->count("output_log_probs") > 0 + && output_tensors->at("output_log_probs").data != nullptr) { + ftNcclRecv(output_tensors->at("output_log_probs").getPtr(), + batch_size * beam_width * input_tensors->at("max_output_seq_len").getVal(), + pipeline_para_.world_size_ - 1, + pipeline_para_, + stream_); + } } + NCCLCHECK(ncclGroupEnd()); + check_cuda_error(cudaStreamSynchronize(stream_)); } } template size_t ParallelGpt::getPipelineParallelRank() { - return pipeline_para_rank_; + return pipeline_para_.rank_; } template size_t ParallelGpt::getPipelineParallelSize() { - return pipeline_para_size_; + return pipeline_para_.world_size_; } template size_t ParallelGpt::getTensorParallelRank() { - return tensor_para_rank_; + return tensor_para_.rank_; } template size_t ParallelGpt::getTensorParallelSize() { - return tensor_para_size_; + return tensor_para_.world_size_; } template @@ -914,5 +1130,8 @@ bool* ParallelGpt::getFinishBuffer() template class ParallelGpt; template class ParallelGpt; +#ifdef ENABLE_BF16 +template class ParallelGpt<__nv_bfloat16>; +#endif } // namespace fastertransformer diff --git a/src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.h b/src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.h index f3dd59555..6533f45b6 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.h +++ b/src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -20,23 +20,18 @@ #include #include -#include "src/fastertransformer/layers/DynamicDecodeBaseLayer.h" +#include "src/fastertransformer/layers/DynamicDecodeLayer.h" #include "src/fastertransformer/models/multi_gpu_gpt/ParallelGptContextDecoder.h" #include "src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoder.h" #include "src/fastertransformer/models/multi_gpu_gpt/ParallelGptWeight.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" namespace fastertransformer { template class ParallelGpt: public BaseLayer { private: - // buffer handling - size_t max_batch_size_ = 0; - size_t max_seq_len_ = 0; - size_t max_input_len_ = 0; - // meta data - size_t beam_width_; size_t head_num_; size_t size_per_head_; size_t inter_size_; @@ -48,6 +43,7 @@ class ParallelGpt: public BaseLayer { float beam_search_diversity_rate_; size_t hidden_units_; + // TODO(bhsueh) remove these member because they are runtime parameters size_t top_k_; float top_p_; unsigned long long random_seed_; @@ -56,30 +52,40 @@ class ParallelGpt: public BaseLayer { float len_penalty_; float repetition_penalty_; - size_t tensor_para_size_; - size_t tensor_para_rank_; - ncclComm_t tensor_para_comm_; size_t local_head_num_; - size_t pipeline_para_size_; - size_t pipeline_para_rank_; - ncclComm_t pipeline_para_comm_; + NcclParam tensor_para_; + NcclParam pipeline_para_; + + std::shared_ptr custom_all_reduce_comm_; + int enable_custom_all_reduce_; const bool is_context_qk_buf_float_ = true; size_t vocab_size_padded_; const int int8_mode_ = 0; ParallelGptDecoder* gpt_decoder_; - DynamicDecodeBaseLayer* dynamic_decode_; ParallelGptContextDecoder* gpt_context_decoder_; + DynamicDecodeLayer* dynamic_decode_layer_; void allocateBuffer() override; + void allocateBuffer(size_t batch_size, + size_t beam_width, + size_t max_seq_len, + size_t max_input_len, + bool is_return_context_cum_log_probs); void freeBuffer() override; - bool isValidBatchSize(size_t batch_size); - bool isValidSeqLen(size_t seq_len); - bool isValidInputSeqLen(size_t seq_len); void initialize(); + void computeContextCumLogProbs(float* cum_log_probs, + const T* context_decoder_outputs, + const int* input_ids, + const int* input_lengths, + const size_t batch_size, + const size_t beam_width, + const size_t max_input_length, + const ParallelGptWeight* gpt_weights); + protected: T* padded_embedding_kernel_; const T* padded_embedding_kernel_ptr_; @@ -95,17 +101,29 @@ class ParallelGpt: public BaseLayer { bool* finished_buf_; bool* h_finished_buf_; - T* key_caches_[2]; // ping-pong buffer - T* value_caches_[2]; // ping-pong buffer + T* key_cache_; + T* value_cache_; + int* cache_indirections_[2] = {nullptr, nullptr}; + + int* start_ids_buf_; + int* end_ids_buf_; - T* padded_pos_embedding_bias_; + int* tiled_input_ids_buf_; + int* tiled_input_lengths_buf_; + int* transposed_output_ids_buf_; int* output_ids_buf_; int* parent_ids_buf_; - int* input_length_buf_; T* context_decoder_input_buf_; T* context_decoder_output_buf_; + float* output_log_probs_buf_; + + // buffers dedicated to log prob computation + T* lp_normed_decoder_output_buf_ = nullptr; + float* lp_logits_buf_ = nullptr; + float* lp_nccl_logits_buf_ = nullptr; + float* lp_logprob_buf_ = nullptr; public: ParallelGpt(size_t max_batch_size, @@ -126,19 +144,17 @@ class ParallelGpt: public BaseLayer { float temperature, float len_penalty, float repetition_penalty, - size_t tensor_para_size, - size_t tensor_para_rank, - ncclComm_t tensor_para_comm, - size_t pipeline_para_size, - size_t pipeline_para_rank, - ncclComm_t pipeline_para_comm, + NcclParam tensor_para, + NcclParam pipeline_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, cudaDeviceProp* cuda_device_prop = nullptr, bool sparse = false, - int int8_mode = 0); + int int8_mode = 0, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce = 0); ParallelGpt(ParallelGpt const& gpt); @@ -148,6 +164,10 @@ class ParallelGpt: public BaseLayer { const std::vector* input_tensors, const ParallelGptWeight* gpt_weights); + void forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors, + const ParallelGptWeight* gpt_weights); + size_t getPipelineParallelRank(); size_t getPipelineParallelSize(); size_t getTensorParallelRank(); diff --git a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptContextDecoder.cc b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptContextDecoder.cc index 93bbfe9cb..0af476996 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptContextDecoder.cc +++ b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptContextDecoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -22,36 +22,41 @@ namespace fastertransformer { template void ParallelGptContextDecoder::initialize() { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); self_attention_layer_ = new TensorParallelGptContextAttentionLayer(max_batch_size_, max_seq_len_, head_num_, size_per_head_, - tensor_para_size_, - tensor_para_comm_, + tensor_para_, stream_, cublas_wrapper_, allocator_, is_free_buffer_after_forward_, is_qk_buf_float_, - sparse_); + sparse_, + custom_all_reduce_comm_, + enable_custom_all_reduce_); ffn_layer_ = new TensorParallelGeluFfnLayer(max_batch_size_, max_seq_len_, head_num_, size_per_head_, inter_size_, - tensor_para_size_, - tensor_para_comm_, + tensor_para_, stream_, cublas_wrapper_, allocator_, is_free_buffer_after_forward_, - sparse_); + sparse_, + 0, + custom_all_reduce_comm_, + enable_custom_all_reduce_); } template void ParallelGptContextDecoder::allocateBuffer() { + FT_CHECK(false); if (is_allocate_buffer_ == false) { decoder_normed_input_ = reinterpret_cast(allocator_->malloc(sizeof(T) * max_batch_size_ * max_seq_len_ * hidden_units_, false)); @@ -64,10 +69,25 @@ void ParallelGptContextDecoder::allocateBuffer() } } +template +void ParallelGptContextDecoder::allocateBuffer(size_t batch_size, size_t seq_len) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + decoder_normed_input_ = reinterpret_cast( + allocator_->reMalloc(decoder_normed_input_, sizeof(T) * batch_size * seq_len * hidden_units_, false)); + self_attn_output_ = reinterpret_cast( + allocator_->reMalloc(self_attn_output_, sizeof(T) * max_batch_size_ * max_seq_len_ * hidden_units_, false)); + normed_self_attn_output_ = decoder_normed_input_; // reuse the buffer + decoder_layer_output_ = reinterpret_cast( + allocator_->reMalloc(decoder_layer_output_, sizeof(T) * batch_size * seq_len * hidden_units_, false)); + is_allocate_buffer_ = true; +} + template void ParallelGptContextDecoder::freeBuffer() { - if (is_allocate_buffer_ == true) { + if (is_allocate_buffer_) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); allocator_->free(decoder_normed_input_); allocator_->free(self_attn_output_); allocator_->free(decoder_layer_output_); @@ -104,30 +124,30 @@ bool ParallelGptContextDecoder::isValidSeqLen(size_t seq_len) template bool ParallelGptContextDecoder::isValidLayerParallelId(uint l) { - int local_num_layer = (int)(ceil(num_layer_ * 1.0f / layer_para_size_)); - return l < num_layer_ && (l >= local_num_layer * layer_para_rank_) - && (l < local_num_layer * (layer_para_rank_ + 1)); + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l >= local_num_layer * pipeline_para_.rank_) + && (l < local_num_layer * (pipeline_para_.rank_ + 1)); } template bool ParallelGptContextDecoder::isFirstLayerParallelId(uint l) { - int local_num_layer = (int)(ceil(num_layer_ * 1.0f / layer_para_size_)); - return l < num_layer_ && (l == local_num_layer * layer_para_rank_); + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l == local_num_layer * pipeline_para_.rank_); } template bool ParallelGptContextDecoder::isLastLayerParallelId(uint l) { - int local_num_layer = (int)(ceil(num_layer_ * 1.0f / layer_para_size_)); - return l < num_layer_ && (l == local_num_layer * (layer_para_rank_ + 1) - 1); + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l == local_num_layer * (pipeline_para_.rank_ + 1) - 1); } template int ParallelGptContextDecoder::getFirstLayerParallelId() { - int local_num_layer = (int)(ceil(num_layer_ * 1.0f / layer_para_size_)); - return local_num_layer * layer_para_rank_; + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return local_num_layer * pipeline_para_.rank_; } template @@ -137,18 +157,16 @@ ParallelGptContextDecoder::ParallelGptContextDecoder(size_t max_batch_size, size_t size_per_head, size_t inter_size, size_t num_layer, - size_t tensor_para_size, - size_t tensor_para_rank, - ncclComm_t tensor_para_comm, - size_t layer_para_size, - size_t layer_para_rank, - ncclComm_t layer_para_comm, + NcclParam tensor_para, + NcclParam pipeline_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, bool is_qk_buf_float, - bool sparse): + bool sparse, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward, nullptr, sparse), max_batch_size_(max_batch_size), max_seq_len_(max_seq_len), @@ -157,13 +175,11 @@ ParallelGptContextDecoder::ParallelGptContextDecoder(size_t max_batch_size, inter_size_(inter_size), num_layer_(num_layer), hidden_units_(head_num_ * size_per_head), - tensor_para_size_(tensor_para_size), - tensor_para_rank_(tensor_para_rank), - tensor_para_comm_(tensor_para_comm), - layer_para_size_(layer_para_size), - layer_para_rank_(layer_para_rank), - layer_para_comm_(layer_para_comm), - is_qk_buf_float_(is_qk_buf_float) + tensor_para_(tensor_para), + pipeline_para_(pipeline_para), + is_qk_buf_float_(is_qk_buf_float), + custom_all_reduce_comm_(custom_all_reduce_comm), + enable_custom_all_reduce_(enable_custom_all_reduce) { initialize(); } @@ -178,13 +194,11 @@ ParallelGptContextDecoder::ParallelGptContextDecoder(ParallelGptContextDecode inter_size_(decoder.inter_size_), num_layer_(decoder.num_layer_), hidden_units_(decoder.hidden_units_), - tensor_para_size_(decoder.tensor_para_size_), - tensor_para_rank_(decoder.tensor_para_rank_), - tensor_para_comm_(decoder.tensor_para_comm_), - layer_para_size_(decoder.layer_para_size_), - layer_para_rank_(decoder.layer_para_rank_), - layer_para_comm_(decoder.layer_para_comm_), - is_qk_buf_float_(decoder.is_qk_buf_float_) + tensor_para_(decoder.tensor_para_), + pipeline_para_(decoder.pipeline_para_), + is_qk_buf_float_(decoder.is_qk_buf_float_), + custom_all_reduce_comm_(decoder.custom_all_reduce_comm_), + enable_custom_all_reduce_(decoder.enable_custom_all_reduce_) { initialize(); } @@ -218,17 +232,19 @@ void ParallelGptContextDecoder::forward( // For example, the shape of decoder_input becomes [ite, batch_size, seq_len, hidden_dimension] during // computing. + FT_LOG_DEBUG(__PRETTY_FUNCTION__); FT_CHECK(input_tensors->size() == 3); FT_CHECK(output_tensors->size() == 4); isValidBatchSize(input_tensors->at(0).shape[0]); isValidSeqLen(input_tensors->at(0).shape[1]); - allocateBuffer(); + // allocateBuffer(); + allocateBuffer(max_batch_size_, max_seq_len_); const size_t batch_size = (size_t)input_tensors->at(0).shape[0]; const size_t seq_len = (size_t)input_tensors->at(0).shape[1]; const DataType data_type = getTensorType(); - const size_t local_batch_size = getLocalBatchSize(batch_size, seq_len, layer_para_size_); + const size_t local_batch_size = getLocalBatchSize(batch_size, seq_len, pipeline_para_.world_size_); FT_CHECK(batch_size % local_batch_size == 0); const size_t iteration_num = batch_size / local_batch_size; @@ -245,8 +261,9 @@ void ParallelGptContextDecoder::forward( for (uint ite = 0; ite < iteration_num; ite++) { for (uint l = 0; l < num_layer_; l++) { - if (isValidLayerParallelId(l) == false) + if (isValidLayerParallelId(l) == false) { continue; + } // const bool is_final = l == (num_layer_ - 1); const bool is_final = false; // TODO(bhsueh) remove this flag @@ -258,16 +275,15 @@ void ParallelGptContextDecoder::forward( (T*)(output_tensors->at(0).data) + (int)(ite * local_batch_size * seq_len * hidden_units_) : decoder_layer_output_; - if (isFirstLayerParallelId(l) && layer_para_rank_ != 0) { - const int data_size = local_batch_size * seq_len * hidden_units_ / tensor_para_size_; - ftNcclRecv(decoder_input + data_size * tensor_para_rank_, + if (isFirstLayerParallelId(l) && pipeline_para_.rank_ != 0) { + const int data_size = local_batch_size * seq_len * hidden_units_ / tensor_para_.world_size_; + ftNcclRecv(decoder_input + data_size * tensor_para_.rank_, data_size, - layer_para_rank_ - 1, - layer_para_comm_, + pipeline_para_.rank_ - 1, + pipeline_para_, stream_); - if (tensor_para_size_ > 1) { - ftNcclAllGather( - decoder_input, decoder_input, data_size, tensor_para_rank_, tensor_para_comm_, stream_); + if (tensor_para_.world_size_ > 1) { + ftNcclAllGather(decoder_input, decoder_input, data_size, tensor_para_.rank_, tensor_para_, stream_); } } @@ -336,12 +352,12 @@ void ParallelGptContextDecoder::forward( stream_); sync_check_cuda_error(); - if (isLastLayerParallelId(l) == true && layer_para_rank_ != layer_para_size_ - 1) { - const int data_size = local_batch_size * seq_len * hidden_units_ / tensor_para_size_; - ftNcclSend(decoder_output + data_size * tensor_para_rank_, + if (isLastLayerParallelId(l) == true && pipeline_para_.rank_ != pipeline_para_.world_size_ - 1) { + const int data_size = local_batch_size * seq_len * hidden_units_ / tensor_para_.world_size_; + ftNcclSend(decoder_output + data_size * tensor_para_.rank_, data_size, - layer_para_rank_ + 1, - layer_para_comm_, + pipeline_para_.rank_ + 1, + pipeline_para_, stream_); } } @@ -364,5 +380,8 @@ void ParallelGptContextDecoder::forward( template class ParallelGptContextDecoder; template class ParallelGptContextDecoder; +#ifdef ENABLE_BF16 +template class ParallelGptContextDecoder<__nv_bfloat16>; +#endif -} // namespace fastertransformer \ No newline at end of file +} // namespace fastertransformer diff --git a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptContextDecoder.h b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptContextDecoder.h index 002fd2512..d53c5b374 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptContextDecoder.h +++ b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptContextDecoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -27,6 +27,7 @@ #include "src/fastertransformer/utils/Tensor.h" #include "src/fastertransformer/utils/allocator.h" #include "src/fastertransformer/utils/cublasMMWrapper.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" namespace fastertransformer { @@ -46,12 +47,11 @@ class ParallelGptContextDecoder: public BaseLayer { // calculated data size_t hidden_units_; - size_t tensor_para_size_; - size_t tensor_para_rank_; - ncclComm_t tensor_para_comm_; - size_t layer_para_size_; - size_t layer_para_rank_; - ncclComm_t layer_para_comm_; + NcclParam tensor_para_; + NcclParam pipeline_para_; + + std::shared_ptr custom_all_reduce_comm_; + int enable_custom_all_reduce_; bool is_qk_buf_float_; @@ -59,6 +59,7 @@ class ParallelGptContextDecoder: public BaseLayer { FfnLayer* ffn_layer_; void allocateBuffer() override; + void allocateBuffer(size_t batch_size, size_t seq_len); void freeBuffer() override; bool isValidBatchSize(size_t batch_size); bool isValidSeqLen(size_t seq_len); @@ -68,10 +69,10 @@ class ParallelGptContextDecoder: public BaseLayer { bool isLastLayerParallelId(uint l); int getFirstLayerParallelId(); - T* decoder_normed_input_; - T* self_attn_output_; - T* normed_self_attn_output_; - T* decoder_layer_output_; + T* decoder_normed_input_ = nullptr; + T* self_attn_output_ = nullptr; + T* normed_self_attn_output_ = nullptr; + T* decoder_layer_output_ = nullptr; protected: public: @@ -81,18 +82,16 @@ class ParallelGptContextDecoder: public BaseLayer { size_t size_per_head, size_t inter_size, size_t num_layer, - size_t tensor_para_size, - size_t tensor_para_rank, - ncclComm_t tensor_para_comm, - size_t layer_para_size, - size_t layer_para_rank, - ncclComm_t layer_para_comm, + NcclParam tensor_para, + NcclParam pipeline_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, bool is_qk_buf_float, - bool sparse = false); + bool sparse = false, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce_ = 0); ParallelGptContextDecoder(ParallelGptContextDecoder const& decoder); diff --git a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoder.cc b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoder.cc index 07f9913ff..4822a4c1d 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoder.cc +++ b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -21,32 +21,34 @@ namespace fastertransformer { template void ParallelGptDecoder::initialize() { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); self_attention_layer_ = new TensorParallelDecoderSelfAttentionLayer(max_batch_size_, head_num_, size_per_head_, - tensor_para_size_, - tensor_para_comm_, + tensor_para_, stream_, cublas_wrapper_, allocator_, is_free_buffer_after_forward_, sparse_, - int8_mode_); + int8_mode_, + custom_all_reduce_comm_, + enable_custom_all_reduce_); ffn_layer_ = new TensorParallelGeluFfnLayer(max_batch_size_, 1, head_num_, size_per_head_, inter_size_, - tensor_para_size_, - tensor_para_comm_, + tensor_para_, stream_, cublas_wrapper_, allocator_, is_free_buffer_after_forward_, sparse_, - int8_mode_); - allocateBuffer(); + int8_mode_, + custom_all_reduce_comm_, + enable_custom_all_reduce_); } template @@ -55,18 +57,16 @@ ParallelGptDecoder::ParallelGptDecoder(size_t max_batch_size, size_t size_per_head, size_t inter_size, size_t num_layer, - size_t tensor_para_size, - size_t tensor_para_rank, - ncclComm_t tensor_para_comm, - size_t layer_para_size, - size_t layer_para_rank, - ncclComm_t layer_para_comm, + NcclParam tensor_para, + NcclParam pipeline_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, bool sparse, - int int8_mode): + int int8_mode, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward, nullptr, sparse), max_batch_size_(max_batch_size), head_num_(head_num), @@ -74,13 +74,11 @@ ParallelGptDecoder::ParallelGptDecoder(size_t max_batch_size, inter_size_(inter_size), num_layer_(num_layer), hidden_units_(head_num_ * size_per_head_), - tensor_para_size_(tensor_para_size), - tensor_para_rank_(tensor_para_rank), - tensor_para_comm_(tensor_para_comm), - layer_para_size_(layer_para_size), - layer_para_rank_(layer_para_rank), - layer_para_comm_(layer_para_comm), - int8_mode_(int8_mode) + tensor_para_(tensor_para), + pipeline_para_(pipeline_para), + int8_mode_(int8_mode), + custom_all_reduce_comm_(custom_all_reduce_comm), + enable_custom_all_reduce_(enable_custom_all_reduce) { initialize(); } @@ -99,13 +97,11 @@ ParallelGptDecoder::ParallelGptDecoder(ParallelGptDecoder const& decoder): inter_size_(decoder.inter_size_), num_layer_(decoder.num_layer_), hidden_units_(decoder.hidden_units_), - tensor_para_size_(decoder.tensor_para_size_), - tensor_para_rank_(decoder.tensor_para_rank_), - tensor_para_comm_(decoder.tensor_para_comm_), - layer_para_size_(decoder.layer_para_size_), - layer_para_rank_(decoder.layer_para_rank_), - layer_para_comm_(decoder.layer_para_comm_), - int8_mode_(decoder.int8_mode_) + tensor_para_(decoder.tensor_para_), + pipeline_para_(decoder.pipeline_para_), + int8_mode_(decoder.int8_mode_), + custom_all_reduce_comm_(decoder.custom_all_reduce_comm_), + enable_custom_all_reduce_(decoder.enable_custom_all_reduce_) { initialize(); } @@ -113,6 +109,7 @@ ParallelGptDecoder::ParallelGptDecoder(ParallelGptDecoder const& decoder): template void ParallelGptDecoder::allocateBuffer() { + FT_CHECK(false); if (is_allocate_buffer_ == false) { decoder_layer_output_ = reinterpret_cast(allocator_->malloc(sizeof(T) * max_batch_size_ * hidden_units_, false)); @@ -126,10 +123,26 @@ void ParallelGptDecoder::allocateBuffer() } } +template +void ParallelGptDecoder::allocateBuffer(size_t batch_size) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + decoder_layer_output_ = reinterpret_cast( + allocator_->reMalloc(decoder_layer_output_, sizeof(T) * batch_size * hidden_units_, false)); + decoder_normed_input_ = reinterpret_cast( + allocator_->reMalloc(decoder_normed_input_, sizeof(T) * batch_size * hidden_units_, false)); + self_attn_output_ = + reinterpret_cast(allocator_->reMalloc(self_attn_output_, sizeof(T) * batch_size * hidden_units_, false)); + normed_self_attn_output_ = reinterpret_cast( + allocator_->reMalloc(normed_self_attn_output_, sizeof(T) * batch_size * hidden_units_, false)); + is_allocate_buffer_ = true; +} + template void ParallelGptDecoder::freeBuffer() { - if (is_allocate_buffer_ == true) { + if (is_allocate_buffer_) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); allocator_->free(decoder_layer_output_); allocator_->free(decoder_normed_input_); allocator_->free(self_attn_output_); @@ -154,30 +167,30 @@ bool ParallelGptDecoder::isValidBatchSize(size_t batch_size) template bool ParallelGptDecoder::isValidLayerParallelId(uint l) { - int local_num_layer = (int)(ceil(num_layer_ * 1.0f / layer_para_size_)); - return l < num_layer_ && (l >= local_num_layer * layer_para_rank_) - && (l < local_num_layer * (layer_para_rank_ + 1)); + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l >= local_num_layer * pipeline_para_.rank_) + && (l < local_num_layer * (pipeline_para_.rank_ + 1)); } template bool ParallelGptDecoder::isFirstLayerParallelId(uint l) { - int local_num_layer = (int)(ceil(num_layer_ * 1.0f / layer_para_size_)); - return l < num_layer_ && (l == local_num_layer * layer_para_rank_); + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l == local_num_layer * pipeline_para_.rank_); } template bool ParallelGptDecoder::isLastLayerParallelId(uint l) { - int local_num_layer = (int)(ceil(num_layer_ * 1.0f / layer_para_size_)); - return l < num_layer_ && (l == local_num_layer * (layer_para_rank_ + 1) - 1); + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return l < num_layer_ && (l == local_num_layer * (pipeline_para_.rank_ + 1) - 1); } template int ParallelGptDecoder::getFirstLayerParallelId() { - int local_num_layer = (int)(ceil(num_layer_ * 1.0f / layer_para_size_)); - return local_num_layer * layer_para_rank_; + int local_num_layer = (int)(ceil(num_layer_ * 1.0f / pipeline_para_.world_size_)); + return local_num_layer * pipeline_para_.rank_; } template @@ -201,19 +214,22 @@ void ParallelGptDecoder::forward(std::vector* output_tensors, // max_input_length [1] on cpu // step [1] on cpu // ite [1] on cpu + // cache_indirection [local_batch_size / beam_width, beam_width, max_seq_len] + // Here, local_batch_size contains the beam_width, so local_batch_size / beam_width + // is real local_batch_size. // output tensors: // decoder_output [local_batch_size, hidden_dimension], // key_cache [num_layer, batch_size, head_num, size_per_head // x, max_seq_len, x] // value_cache [num_layer, batch_size, head_num, max_seq_len, size_per_head] - FT_CHECK(input_tensors->size() == 7); + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + FT_CHECK(input_tensors->size() == 8); FT_CHECK(output_tensors->size() == 3); - isValidBatchSize(input_tensors->at(0).shape[0]); - allocateBuffer(); + const size_t local_batch_size = input_tensors->at(0).shape[0]; + allocateBuffer(local_batch_size); const DataType data_type = getTensorType(); - const size_t local_batch_size = input_tensors->at(0).shape[0]; const int ite = *((int*)(input_tensors->at(6).data)); std::vector self_k_cache_size; @@ -234,21 +250,21 @@ void ParallelGptDecoder::forward(std::vector* output_tensors, T* decoder_input = (T*)((l == 0) ? input_tensors->at(0).data : decoder_layer_output_); T* decoder_output = (T*)((l == num_layer_ - 1) ? output_tensors->at(0).data : decoder_layer_output_); - if (isFirstLayerParallelId(l) == true && layer_para_rank_ != 0 && layer_para_size_ > 1) { - // ftNcclRecv(decoder_input, local_batch_size * hidden_units_, layer_para_rank_ - 1, layer_para_comm_, + if (isFirstLayerParallelId(l) == true && pipeline_para_.rank_ != 0 && pipeline_para_.world_size_ > 1) { + // ftNcclRecv(decoder_input, local_batch_size * hidden_units_, pipeline_para_.rank_ - 1, pipeline_para_, // stream_); - ftNcclRecv(decoder_input + local_batch_size * hidden_units_ / tensor_para_size_ * tensor_para_rank_, - local_batch_size * hidden_units_ / tensor_para_size_, - layer_para_rank_ - 1, - layer_para_comm_, + ftNcclRecv(decoder_input + local_batch_size * hidden_units_ / tensor_para_.world_size_ * tensor_para_.rank_, + local_batch_size * hidden_units_ / tensor_para_.world_size_, + pipeline_para_.rank_ - 1, + pipeline_para_, stream_); - if (tensor_para_size_ > 1) { + if (tensor_para_.world_size_ > 1) { ftNcclAllGather(decoder_input, decoder_input, - local_batch_size * hidden_units_ / tensor_para_size_, - tensor_para_rank_, - tensor_para_comm_, + local_batch_size * hidden_units_ / tensor_para_.world_size_, + tensor_para_.rank_, + tensor_para_, stream_); } } @@ -278,7 +294,8 @@ void ParallelGptDecoder::forward(std::vector* output_tensors, input_tensors->at(2), input_tensors->at(3), input_tensors->at(4), - input_tensors->at(5)}; + input_tensors->at(5), + input_tensors->at(7)}; std::vector self_attention_output_tensors{ Tensor{MEMORY_GPU, data_type, {local_batch_size, hidden_units_}, self_attn_output_}, @@ -299,6 +316,7 @@ void ParallelGptDecoder::forward(std::vector* output_tensors, local_batch_size, hidden_units_, stream_); + sync_check_cuda_error(); std::vector ffn_input_tensors{ @@ -314,14 +332,14 @@ void ParallelGptDecoder::forward(std::vector* output_tensors, stream_); sync_check_cuda_error(); - if (isLastLayerParallelId(l) == true && layer_para_rank_ != layer_para_size_ - 1 && layer_para_size_ > 1) { - // ftNcclSend(decoder_output, local_batch_size * hidden_units_, layer_para_rank_ + 1, layer_para_comm_, - // stream_); + if (isLastLayerParallelId(l) == true && pipeline_para_.rank_ != pipeline_para_.world_size_ - 1 + && pipeline_para_.world_size_ > 1) { - ftNcclSend(decoder_output + local_batch_size * hidden_units_ / tensor_para_size_ * tensor_para_rank_, - local_batch_size * hidden_units_ / tensor_para_size_, - layer_para_rank_ + 1, - layer_para_comm_, + ftNcclSend(decoder_output + + local_batch_size * hidden_units_ / tensor_para_.world_size_ * tensor_para_.rank_, + local_batch_size * hidden_units_ / tensor_para_.world_size_, + pipeline_para_.rank_ + 1, + pipeline_para_, stream_); } } @@ -333,5 +351,8 @@ void ParallelGptDecoder::forward(std::vector* output_tensors, template class ParallelGptDecoder; template class ParallelGptDecoder; +#ifdef ENABLE_BF16 +template class ParallelGptDecoder<__nv_bfloat16>; +#endif } // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoder.h b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoder.h index 9866dffa5..43b665cfb 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoder.h +++ b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -25,6 +25,7 @@ #include "src/fastertransformer/utils/Tensor.h" #include "src/fastertransformer/utils/allocator.h" #include "src/fastertransformer/utils/cublasMMWrapper.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" #include "src/fastertransformer/utils/nccl_utils.h" namespace fastertransformer { @@ -44,24 +45,24 @@ class ParallelGptDecoder: public BaseLayer { // calculated data size_t hidden_units_; - size_t tensor_para_size_; - size_t tensor_para_rank_; - ncclComm_t tensor_para_comm_; - size_t layer_para_size_; - size_t layer_para_rank_; - ncclComm_t layer_para_comm_; + NcclParam tensor_para_; + NcclParam pipeline_para_; + + std::shared_ptr custom_all_reduce_comm_; + int enable_custom_all_reduce_; // buffers - T* decoder_normed_input_; - T* self_attn_output_; - T* normed_self_attn_output_; - T* decoder_layer_output_; + T* decoder_normed_input_ = nullptr; + T* self_attn_output_ = nullptr; + T* normed_self_attn_output_ = nullptr; + T* decoder_layer_output_ = nullptr; BaseAttentionLayer* self_attention_layer_; FfnLayer* ffn_layer_; void initialize(); void allocateBuffer() override; + void allocateBuffer(size_t batch_size); void freeBuffer() override; bool isValidBatchSize(size_t batch_size); bool isValidLayerParallelId(uint l); @@ -76,18 +77,16 @@ class ParallelGptDecoder: public BaseLayer { size_t size_per_head, size_t inter_size, size_t num_layer, - size_t tensor_para_size, - size_t tensor_para_rank, - ncclComm_t tensor_para_comm, - size_t layer_para_size, - size_t layer_para_rank_, - ncclComm_t layer_para_comm, + NcclParam tensor_para, + NcclParam pipeline_para, cudaStream_t stream, cublasMMWrapper* cublas_wrapper, IAllocator* allocator, bool is_free_buffer_after_forward, bool sparse = false, - int int8_mode = 0); + int int8_mode = 0, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce_ = 0); ParallelGptDecoder(ParallelGptDecoder const& decoder); diff --git a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoderLayerWeight.cc b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoderLayerWeight.cc index 905c78071..5c20fa91f 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoderLayerWeight.cc +++ b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoderLayerWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -164,35 +164,45 @@ ParallelGptDecoderLayerWeight::operator=(const ParallelGptDecoderLayerWeight& } template -void ParallelGptDecoderLayerWeight::loadModel(std::string dir_path) +void ParallelGptDecoderLayerWeight::loadModel(std::string dir_path, FtCudaDataType model_file_type) { FT_CHECK(is_maintain_buffer == true); - loadWeightFromBin(weights_ptr[0], {(int)hidden_units_}, dir_path + ".input_layernorm.bias.bin"); - loadWeightFromBin(weights_ptr[1], {(int)hidden_units_}, dir_path + ".input_layernorm.weight.bin"); + loadWeightFromBin(weights_ptr[0], {(int)hidden_units_}, dir_path + ".input_layernorm.bias.bin", model_file_type); + loadWeightFromBin( + weights_ptr[1], {(int)hidden_units_}, dir_path + ".input_layernorm.weight.bin", model_file_type); loadWeightFromBin(weights_ptr[2], {(int)hidden_units_, (int)(3 * hidden_units_ / tensor_para_size_)}, - dir_path + ".attention.query_key_value.weight." + std::to_string(tensor_para_rank_) + ".bin"); + dir_path + ".attention.query_key_value.weight." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); loadWeightFromBin(weights_ptr[3], {3, (int)(hidden_units_ / tensor_para_size_)}, - dir_path + ".attention.query_key_value.bias." + std::to_string(tensor_para_rank_) + ".bin"); + dir_path + ".attention.query_key_value.bias." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); loadWeightFromBin(weights_ptr[4], {(int)(hidden_units_ / tensor_para_size_), (int)hidden_units_}, - dir_path + ".attention.dense.weight." + std::to_string(tensor_para_rank_) + ".bin"); - loadWeightFromBin(weights_ptr[5], {(int)hidden_units_}, dir_path + ".attention.dense.bias.bin"); - loadWeightFromBin(weights_ptr[6], {(int)hidden_units_}, dir_path + ".post_attention_layernorm.bias.bin"); - loadWeightFromBin(weights_ptr[7], {(int)hidden_units_}, dir_path + ".post_attention_layernorm.weight.bin"); + dir_path + ".attention.dense.weight." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); + loadWeightFromBin(weights_ptr[5], {(int)hidden_units_}, dir_path + ".attention.dense.bias.bin", model_file_type); + loadWeightFromBin( + weights_ptr[6], {(int)hidden_units_}, dir_path + ".post_attention_layernorm.bias.bin", model_file_type); + loadWeightFromBin( + weights_ptr[7], {(int)hidden_units_}, dir_path + ".post_attention_layernorm.weight.bin", model_file_type); loadWeightFromBin(weights_ptr[8], {(int)hidden_units_, (int)(inter_size_ / tensor_para_size_)}, - dir_path + ".mlp.dense_h_to_4h.weight." + std::to_string(tensor_para_rank_) + ".bin"); + dir_path + ".mlp.dense_h_to_4h.weight." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); loadWeightFromBin(weights_ptr[9], {(int)(inter_size_ / tensor_para_size_)}, - dir_path + ".mlp.dense_h_to_4h.bias." + std::to_string(tensor_para_rank_) + ".bin"); + dir_path + ".mlp.dense_h_to_4h.bias." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); loadWeightFromBin(weights_ptr[10], {(int)(inter_size_ / tensor_para_size_), (int)hidden_units_}, - dir_path + ".mlp.dense_4h_to_h.weight." + std::to_string(tensor_para_rank_) + ".bin"); - loadWeightFromBin(weights_ptr[11], {(int)hidden_units_}, dir_path + ".mlp.dense_4h_to_h.bias.bin"); + dir_path + ".mlp.dense_4h_to_h.weight." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); + loadWeightFromBin( + weights_ptr[11], {(int)hidden_units_}, dir_path + ".mlp.dense_4h_to_h.bias.bin", model_file_type); if (int8_mode_ != 0) { transposeCalibrateQuantizeWeight(); @@ -324,5 +334,8 @@ void ParallelGptDecoderLayerWeight::transposeCalibrateQuantizeWeight() template struct ParallelGptDecoderLayerWeight; template struct ParallelGptDecoderLayerWeight; +#ifdef ENABLE_BF16 +template struct ParallelGptDecoderLayerWeight<__nv_bfloat16>; +#endif } // namespace fastertransformer diff --git a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoderLayerWeight.h b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoderLayerWeight.h index 889d7f84a..7927819db 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoderLayerWeight.h +++ b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptDecoderLayerWeight.h @@ -39,7 +39,7 @@ struct ParallelGptDecoderLayerWeight { ~ParallelGptDecoderLayerWeight(); ParallelGptDecoderLayerWeight(const ParallelGptDecoderLayerWeight& other); ParallelGptDecoderLayerWeight& operator=(const ParallelGptDecoderLayerWeight& other); - void loadModel(std::string dir_path); + void loadModel(std::string dir_path, FtCudaDataType model_file_type); #ifdef SPARSITY_ENABLED void compress_weights(cublasMMWrapper& cublas_wrapper, int hidden_dim); #endif diff --git a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptWeight.cc b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptWeight.cc index dbe75cb86..489b07a66 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/ParallelGptWeight.cc +++ b/src/fastertransformer/models/multi_gpu_gpt/ParallelGptWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -157,17 +157,19 @@ void ParallelGptWeight::mallocWeights() template void ParallelGptWeight::loadModel(std::string dir_path) { + FtCudaDataType model_file_type = getModelFileType(dir_path + "/config.ini", "gpt"); FT_CHECK(is_maintain_buffer == true); - - loadWeightFromBin(weights_ptr[0], {max_seq_len_, hidden_units_}, dir_path + "/model.wpe.bin"); - loadWeightFromBin(weights_ptr[1], {vocab_size_ * hidden_units_}, dir_path + "/model.wte.bin"); - loadWeightFromBin(weights_ptr[2], {hidden_units_}, dir_path + "/model.final_layernorm.bias.bin"); - loadWeightFromBin(weights_ptr[3], {hidden_units_}, dir_path + "/model.final_layernorm.weight.bin"); - loadWeightFromBin(weights_ptr[4], {vocab_size_ * hidden_units_}, dir_path + "/model.wte.bin"); + loadWeightFromBin(weights_ptr[0], {max_seq_len_, hidden_units_}, dir_path + "/model.wpe.bin", model_file_type); + loadWeightFromBin(weights_ptr[1], {vocab_size_ * hidden_units_}, dir_path + "/model.wte.bin", model_file_type); + loadWeightFromBin( + weights_ptr[2], {hidden_units_}, dir_path + "/model.final_layernorm.bias.bin", model_file_type); + loadWeightFromBin( + weights_ptr[3], {hidden_units_}, dir_path + "/model.final_layernorm.weight.bin", model_file_type); + loadWeightFromBin(weights_ptr[4], {vocab_size_ * hidden_units_}, dir_path + "/model.wte.bin", model_file_type); for (int l = 0; l < num_layer_; l++) { if (isValidLayerParallelId(l)) { - decoder_layer_weights[l]->loadModel(dir_path + "/model.layers." + std::to_string(l)); + decoder_layer_weights[l]->loadModel(dir_path + "/model.layers." + std::to_string(l), model_file_type); } } } @@ -205,5 +207,8 @@ void ParallelGptWeight::compress_weights(cublasMMWrapper& cublas_wrapper) template struct ParallelGptWeight; template struct ParallelGptWeight; +#ifdef ENABLE_BF16 +template struct ParallelGptWeight<__nv_bfloat16>; +#endif } // namespace fastertransformer diff --git a/src/fastertransformer/models/multi_gpu_gpt/gpt_gemm.cc b/src/fastertransformer/models/multi_gpu_gpt/gpt_gemm.cc index 322d619fa..7e4590e33 100644 --- a/src/fastertransformer/models/multi_gpu_gpt/gpt_gemm.cc +++ b/src/fastertransformer/models/multi_gpu_gpt/gpt_gemm.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -23,8 +23,8 @@ int main(int argc, char* argv[]) { if (argc != 9 && argc != 10) { printf( - "[ERROR] gpt_gemm batch_size beam_width max_input_len head_number size_per_head inter_size vocab_size is_fp16 tensor_para_size\n"); - printf("e.g. ./bin/gpt_gemm 8 4 32 96 128 49152 51200 8 1\n"); + "[ERROR] gpt_gemm batch_size beam_width max_input_len head_number size_per_head inter_size vocab_size data_type tensor_para_size\n"); + printf("e.g. ./bin/gpt_gemm 8 4 32 96 128 49152 51200 1 8\n"); return 0; } @@ -35,9 +35,13 @@ int main(int argc, char* argv[]) const int size_per_head = atoi(argv[5]); const int inter_size = atoi(argv[6]); const int vocab_size = atoi(argv[7]); - const int is_fp16 = atoi(argv[8]); + const ft::CublasDataType data_type = static_cast(atoi(argv[8])); // 0 FP32, 1 FP16, 2 BF 16 const int tensor_para_size = argc <= 9 ? 1 : atoi(argv[9]); - const int is_fp16_compute_type = argc <= 10 ? 0 : atoi(argv[10]); + int is_fp16_compute_type = argc <= 10 ? 0 : atoi(argv[10]); + if (data_type == ft::BFLOAT16_DATATYPE && is_fp16_compute_type != 0) { + printf("[ERROR] BFLOAT16_DATATYPE does not support is_fp16_compute_type = True\n"); + return 0; + } printf("[INFO] arguments: \n"); printf(" batch_size: %d \n", batch_size); @@ -47,7 +51,7 @@ int main(int argc, char* argv[]) printf(" size_per_head: %d \n", size_per_head); printf(" inter_size: %d \n", inter_size); printf(" vocab_size: %d \n", vocab_size); - printf(" is_fp16: %d \n", is_fp16); + printf(" data_type: %d \n", data_type); printf(" tensor_para_size: %d \n", tensor_para_size); std::cout << std::endl; @@ -60,7 +64,7 @@ int main(int argc, char* argv[]) inter_size, vocab_size, tensor_para_size, - is_fp16); + data_type); size_t total, free; ft::check_cuda_error(cudaMemGetInfo(&free, &total)); if (free < buf_size_in_byte + 10 * 1024 * 1024) { @@ -75,7 +79,7 @@ int main(int argc, char* argv[]) ft::deviceMalloc(reinterpret_cast(&gemm_test_buf), buf_size_in_byte, false); } - if (is_fp16 == 0) { + if (data_type == ft::FLOAT_DATATYPE) { ft::generate_gpt_gemm_config(batch_size, beam_width, max_input_len, @@ -87,7 +91,7 @@ int main(int argc, char* argv[]) gemm_test_buf, false); } - else if (is_fp16 == 1) { + else if (data_type == ft::HALF_DATATYPE) { ft::generate_gpt_gemm_config(batch_size, beam_width, max_input_len, @@ -99,8 +103,22 @@ int main(int argc, char* argv[]) gemm_test_buf, false); } +#ifdef ENABLE_BF16 + else if (data_type == ft::BFLOAT16_DATATYPE) { + ft::generate_gpt_gemm_config<__nv_bfloat16>(batch_size, + beam_width, + max_input_len, + head_num, + size_per_head, + inter_size, + vocab_size, + tensor_para_size, + gemm_test_buf, + false); + } +#endif else { - printf("[ERROR] is_fp16 should be 0 (use float) or 1 (use half). \n"); + printf("[ERROR] data type only supports fp32(0), fp16(1), bf16(2). \n"); return -1; } diff --git a/src/fastertransformer/models/swin/CMakeLists.txt b/src/fastertransformer/models/swin/CMakeLists.txt new file mode 100644 index 000000000..bba6bd4d8 --- /dev/null +++ b/src/fastertransformer/models/swin/CMakeLists.txt @@ -0,0 +1,34 @@ +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +cmake_minimum_required(VERSION 3.8) + +add_library(SwinBlock STATIC SwinBlock.cc) +set_property(TARGET SwinBlock PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET SwinBlock PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(SwinBlock PUBLIC -lcublasLt -lcublas -lcudart WindowAttention + activation_kernels add_residual_kernels layernorm_kernels) + +add_library(SwinBasicLayer STATIC SwinBasicLayer.cc) +set_property(TARGET SwinBasicLayer PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET SwinBasicLayer PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(SwinBasicLayer PUBLIC -lcublasLt -lcublas -lcudart SwinBlock) + +add_library(Swin STATIC Swin.cc) +set_property(TARGET Swin PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET Swin PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(Swin PUBLIC -lcudart SwinBasicLayer memory_utils) + +add_executable(swin_gemm swin_gemm.cc) +target_link_libraries(swin_gemm PUBLIC -lcublas -lcublasLt -lcudart swin_igemm_func swin_gemm_func memory_utils) \ No newline at end of file diff --git a/src/fastertransformer/models/swin/Swin.cc b/src/fastertransformer/models/swin/Swin.cc new file mode 100644 index 000000000..c12564c84 --- /dev/null +++ b/src/fastertransformer/models/swin/Swin.cc @@ -0,0 +1,273 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/swin/Swin.h" + +namespace fastertransformer { + +template +size_t +SwinTransformer::getBufSize(const int batch, const int patches_resolution, const int layer_num, const int embed_dim) +{ + int final_len = patches_resolution; + for (int i = 0; i < layer_num - 1; i++) { + final_len /= 2; + } + final_len = batch * final_len * final_len; + // for x_patch_embed_ + size_t buf_size = batch * embed_dim * patches_resolution * patches_resolution * sizeof(T) + + // for 2 x basic_layer_output + 2 * batch * patches_resolution * patches_resolution * embed_dim / 2 * sizeof(T) + + // for avg pool ones + (final_len + 3) / 4 * 4 * sizeof(T); + return (buf_size + 31) / 32 * 32; +} + +template +SwinTransformer::SwinTransformer(int max_batch, + int img_size, + int patch_size, + int in_chans, + int embed_dim, + int window_size, + int* depths, + int* num_heads, + bool ape, + bool patch_norm, + int layer_num, + float mlp_ratio, + cudnnHandle_t cudnn_handle, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool qkv_bias, + float qk_scale): + max_batch_(max_batch), + img_size_(img_size), + patch_size_(patch_size), + in_chans_(in_chans), + embed_dim_(embed_dim), + window_size_(window_size), + depths_(depths), + num_heads_(num_heads), + ape_(ape), + patch_norm_(patch_norm), + layer_num_(layer_num), + mlp_ratio_(mlp_ratio), + cudnn_handle_(cudnn_handle), + stream_(stream), + cublas_wrapper_(cublas_wrapper), + allocator_(allocator), + is_free_buffer_after_forward_(is_free_buffer_after_forward), + qkv_bias_(qkv_bias), + qk_scale_(qk_scale) +{ + + patches_resolution_ = img_size / patch_size; + max_buf_size_ = getBufSize(max_batch_, patches_resolution_, layer_num_, embed_dim_); + + basic_layer_ = new SwinTransformerBasicLayer(max_batch_, + window_size_, + mlp_ratio_, + stream, + cublas_wrapper, + allocator, + is_free_buffer_after_forward, + qkv_bias_, + qk_scale_); +} + +template +SwinTransformer::~SwinTransformer() +{ + freeBuffer(); + if (basic_layer_ != nullptr) { + delete basic_layer_; + basic_layer_ = nullptr; + } +} + +template +void SwinTransformer::allocateBuffer() +{ + if (is_allocate_buffer_ == false) { + + buf_ = reinterpret_cast(allocator_->malloc(max_buf_size_, false)); + x_patch_embed_ = buf_; + + basic_layer_output_ = x_patch_embed_ + max_batch_ * embed_dim_ * patches_resolution_ * patches_resolution_; + + avg_pool_ones_ = + basic_layer_output_ + 2 * max_batch_ * patches_resolution_ * patches_resolution_ * embed_dim_ / 2; + + int final_len = patches_resolution_; + for (int i = 0; i < layer_num_ - 1; i++) { + final_len /= 2; + } + final_len = max_batch_ * final_len * final_len; + deviceFill(avg_pool_ones_, (final_len + 3) / 4 * 4, T(1.0f)); + + is_allocate_buffer_ = true; + } +} + +template +void SwinTransformer::freeBuffer() +{ + if (is_allocate_buffer_ == true) { + if (allocator_ == NULL) { + printf("[ERROR][SwinTransformer][freeBuffer] allocator_ is NULL!\n"); + exit(-1); + } + allocator_->free(buf_); + allocator_ = nullptr; + buf_ = nullptr; + is_allocate_buffer_ = false; + } +} + +template +void SwinTransformer::patchEmbed(T* output, + const T* input, + const T* kernel, + const T* bias, + const T* gamma, + const T* beta, + const int batch, + const int img_size, + const int patch_size, + const int patches_resolution, + const int in_chans, + const int embed_dim, + const bool patch_norm) +{ + conv2d( + output, input, kernel, batch, img_size, img_size, in_chans, embed_dim, patch_size, patch_size, cudnn_handle_); + + if (patch_norm) { + invokeAddBiasLayernorm( + output, bias, gamma, beta, batch * patches_resolution * patches_resolution, embed_dim, stream_); + } + else { + invokeAddBias(output, bias, batch * patches_resolution * patches_resolution, embed_dim, stream_); + } +} + +template +void SwinTransformer::forward(std::vector* output_tensors, + const std::vector* input_tensors, + SwinTransformerWeight& swin_weights) +{ + // input_tensors: + // input_images [batch, in_channels, input_resolution, input_resolution] + // sm [1] + // output_tensors: + // output_embedding [batch, final_len] + + T* output = (T*)output_tensors->at(0).data; + const T* input = (const T*)input_tensors->at(0).data; + const size_t batch = input_tensors->at(0).shape[0]; + const int sm = *(const int*)input_tensors->at(1).data; + allocateBuffer(); + patchEmbed(x_patch_embed_, + input, + swin_weights.patchEmbed_linear_weights.kernel, + swin_weights.patchEmbed_linear_weights.bias, + swin_weights.patchEmbed_norm_weights.gamma, + swin_weights.patchEmbed_norm_weights.beta, + batch, + img_size_, + patch_size_, + patches_resolution_, + in_chans_, + embed_dim_, + patch_norm_); + + size_t basic_layer_dim = embed_dim_; + size_t basic_layer_input_resolution = patches_resolution_; + int basic_layer_output_size = batch * patches_resolution_ * patches_resolution_ * embed_dim_ / 2; + size_t m = batch * patches_resolution_ * patches_resolution_; + size_t n = embed_dim_; + DataType data_type = getTensorType(); + + bool do_patch_merge = true; + if (layer_num_ == 1) { + do_patch_merge = false; + } + + for (int i = 0; i < layer_num_; i++) { + if (i == layer_num_ - 1) { + do_patch_merge = false; + } + + std::vector tmp_output_tensors{Tensor{ + MEMORY_GPU, + data_type, + std::vector{batch, basic_layer_input_resolution, basic_layer_input_resolution, basic_layer_dim}, + basic_layer_output_ + (i % 2) * basic_layer_output_size}}; + int additional_params[4] = {depths_[i], num_heads_[i], do_patch_merge ? 1 : 0, sm}; + std::vector tmp_input_tensors{ + Tensor{ + MEMORY_GPU, + data_type, + std::vector{batch, basic_layer_input_resolution, basic_layer_input_resolution, basic_layer_dim}, + i == 0 ? x_patch_embed_ : basic_layer_output_ + ((i - 1) % 2) * basic_layer_output_size}, + Tensor{MEMORY_CPU, TYPE_INT8, std::vector{4}, additional_params}}; + basic_layer_->forward(&tmp_output_tensors, &tmp_input_tensors, swin_weights.basic_layer_weight_list[i]); + + if (i != layer_num_ - 1) { + basic_layer_dim *= 2; + basic_layer_input_resolution /= 2; + } + } + + invokeGeneralLayerNorm(basic_layer_output_ + (layer_num_ % 2) * basic_layer_output_size, + basic_layer_output_ + ((layer_num_ - 1) % 2) * basic_layer_output_size, + swin_weights.norm_weights.gamma, + swin_weights.norm_weights.beta, + batch * basic_layer_input_resolution * basic_layer_input_resolution, + basic_layer_dim, + stream_); + + // avg pool + int final_len = basic_layer_input_resolution * basic_layer_input_resolution; + cublas_wrapper_->stridedBatchedGemm(CUBLAS_OP_N, + CUBLAS_OP_N, + basic_layer_dim, + 1, + final_len, + basic_layer_output_ + (layer_num_ % 2) * basic_layer_output_size, + basic_layer_dim, + basic_layer_dim * final_len, + avg_pool_ones_, + final_len, + 1 * final_len, + output, + basic_layer_dim, + basic_layer_dim * 1, + batch, + 1.0f / final_len); + + if (is_free_buffer_after_forward_) { + freeBuffer(); + } +} + +template class SwinTransformer; +template class SwinTransformer; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/swin/Swin.h b/src/fastertransformer/models/swin/Swin.h new file mode 100644 index 000000000..d1221b28e --- /dev/null +++ b/src/fastertransformer/models/swin/Swin.h @@ -0,0 +1,110 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "SwinBasicLayer.h" +#include "src/fastertransformer/utils/allocator.h" +#include "src/fastertransformer/utils/conv2d.h" +#include "src/fastertransformer/utils/memory_utils.h" + +namespace fastertransformer { +template +class SwinTransformer { + +private: + int max_batch_ = 1; + int img_size_ = 224; + int patch_size_ = 4; + int in_chans_ = 3; + int embed_dim_ = 96; + int window_size_ = 7; + int* depths_; + int* num_heads_; + bool ape_ = false; + bool patch_norm_ = true; + float mlp_ratio_ = 4.0f; + bool qkv_bias_ = true; + int patches_resolution_ = 56; + int layer_num_ = 4; + int qk_scale_ = 1.0f; + size_t max_buf_size_ = 0; + IAllocator* allocator_ = nullptr; + cudnnHandle_t cudnn_handle_; + cudaStream_t stream_; + cublasMMWrapper* cublas_wrapper_; + bool is_free_buffer_after_forward_; + bool is_allocate_buffer_ = false; + + T* buf_ = nullptr; + T* x_patch_embed_ = nullptr; + T* basic_layer_output_ = nullptr; + // for avgPool_ones + T* avg_pool_ones_ = nullptr; + + SwinTransformerBasicLayer* basic_layer_ = nullptr; + +public: + static size_t getBufSize(const int batch, const int patches_resolution, const int layer_num, const int embed_dim); + + void allocateBuffer(); + + SwinTransformer(int max_batch, + int img_size, + int patch_size, + int in_chans, + int embed_dim, + int window_size, + int* depths, + int* num_heads, + bool ape, + bool patch_norm, + int layer_num, + float mlp_ratio, + cudnnHandle_t cudnn_handle, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool qkv_bias = true, + float qk_scale = 1.0f); + + void freeBuffer(); + + ~SwinTransformer(); + + // input is [B, C_in, H, W] + // output is [B, H, W, C_out] + void patchEmbed(T* output, + const T* input, + const T* kernel, + const T* bias, + const T* gamma, + const T* beta, + const int batch, + const int img_size, + const int patch_size, + const int patches_resolution, + const int in_chans, + const int embed_dim, + const bool patch_norm); + + void forward(std::vector* output_tensors, + const std::vector* input_tensors, + SwinTransformerWeight& swin_weights); + +}; // class SwinTransformer +} // namespace fastertransformer diff --git a/src/fastertransformer/models/swin/SwinBasicLayer.cc b/src/fastertransformer/models/swin/SwinBasicLayer.cc new file mode 100644 index 000000000..433281ce4 --- /dev/null +++ b/src/fastertransformer/models/swin/SwinBasicLayer.cc @@ -0,0 +1,203 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "SwinBasicLayer.h" + +namespace fastertransformer { + +template +void SwinTransformerBasicLayer::allocateBuffer() +{ + if (is_allocate_buffer_ == false) { + block_output_ = (T*)allocator_->malloc( + 2 * max_batch_ * patches_resolution_ * patches_resolution_ * embed_dim_ * sizeof(T), false); + + is_allocate_buffer_ = true; + } +} + +template +void SwinTransformerBasicLayer::freeBuffer() +{ + if (is_allocate_buffer_ == true) { + allocator_->free(block_output_); + is_allocate_buffer_ = false; + } +} + +template +SwinTransformerBasicLayer::SwinTransformerBasicLayer(int max_batch, + int window_size, + float mlp_ratio, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool qkv_bias, + float qk_scale): + BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), + max_batch_(max_batch), + window_size_(window_size), + mlp_ratio_(mlp_ratio), + qkv_bias_(qkv_bias), + qk_scale_(qk_scale) +{ + block_ = new SwinTransformerBlock(max_batch_, + window_size_, + mlp_ratio_, + stream, + cublas_wrapper, + allocator, + is_free_buffer_after_forward, + qkv_bias_, + qk_scale_); +} + +template +SwinTransformerBasicLayer::~SwinTransformerBasicLayer() +{ + // unBindBuffer(); + if (block_ != nullptr) { + delete block_; + block_ = nullptr; + } +} + +template +void SwinTransformerBasicLayer::patchMerge(T* output, + T* merge_layernorm_buf, + const T* input, + const T* gamma, + const T* beta, + const T* weight, + int batch, + int input_resolution, + int dim) +{ + invokeMergeLayernorm( + merge_layernorm_buf, input, gamma, beta, batch, input_resolution, input_resolution, dim, stream_); + + cublas_wrapper_->Gemm(CUBLAS_OP_T, + CUBLAS_OP_N, + 2 * dim, + batch * input_resolution * input_resolution / 4, + 4 * dim, + weight, + 4 * dim, + merge_layernorm_buf, + 4 * dim, + output, + 2 * dim); +} + +template +void SwinTransformerBasicLayer::forward(std::vector* output_tensors, + std::vector* input_tensors, + SwinTransformerBasicLayerWeight& swin_basic_layer_weights) +{ + // input_tensors: + // input [batch, input_resolution, input_resolution, dim] + // input_paramters [4] {basic_layer_depth, number_of_head, do_patch_merge, sm} + // output_tensors: + // output [batch, output_resolution, output_resolution, output_dim] + + T* from_tensor = (T*)input_tensors->at(0).data; + T* output_tensor = (T*)(output_tensors->at(0).data); + size_t batch = input_tensors->at(0).shape[0]; + size_t input_resolution = input_tensors->at(0).shape[1]; + assert(input_resolution == input_tensors->at(0).shape[2]); + size_t dim = input_tensors->at(0).shape[3]; + int* input_paramters = (int*)input_tensors->at(1).data; + const int depth = input_paramters[0]; + const int num_head = input_paramters[1]; + bool do_patch_merge = (input_paramters[2] == 1) ? true : false; + const int sm = input_paramters[3]; + + patches_resolution_ = input_resolution; + embed_dim_ = dim; + allocateBuffer(); + + int block_output_size = batch * input_resolution * input_resolution * dim; + size_t m = batch * input_resolution * input_resolution; + size_t n = dim; + size_t window_num = (input_resolution / window_size_) * (input_resolution / window_size_); + size_t window_len = window_size_ * window_size_; + int shift_size = 0; + DataType data_type = getTensorType(); + + if (do_patch_merge) { + for (int i = 0; i < depth; i++) { + std::vector tmp_output_tensors{ + Tensor{MEMORY_GPU, + data_type, + std::vector{batch, input_resolution, input_resolution, dim}, + block_output_ + (i % 2) * block_output_size}}; + shift_size = (i % 2 == 0) ? 0 : (window_size_ / 2); + int additional_parameters[3] = {num_head, shift_size, sm}; + std::vector tmp_input_tensors{ + Tensor{MEMORY_GPU, + data_type, + std::vector{batch, input_resolution, input_resolution, dim}, + i == 0 ? from_tensor : block_output_ + ((i - 1) % 2) * block_output_size}, + Tensor{MEMORY_GPU, + TYPE_FP16, + std::vector{window_num, window_len, window_len}, + swin_basic_layer_weights.attn_mask}, + Tensor{MEMORY_CPU, TYPE_INT8, std::vector{3}, additional_parameters}}; + block_->forward(&tmp_output_tensors, &tmp_input_tensors, swin_basic_layer_weights.block_weight_list[i]); + } + + patchMerge(output_tensor, + block_output_ + (depth % 2) * block_output_size, + block_output_ + ((depth - 1) % 2) * block_output_size, + swin_basic_layer_weights.merge_layernorm_weights.gamma, + swin_basic_layer_weights.merge_layernorm_weights.beta, + swin_basic_layer_weights.merge_linear_weights.kernel, + batch, + input_resolution, + dim); + } + else { + for (int i = 0; i < depth; i++) { + std::vector tmp_output_tensors{ + Tensor{MEMORY_GPU, + data_type, + std::vector{batch, input_resolution, input_resolution, dim}, + i == depth - 1 ? output_tensor : block_output_ + (i % 2) * block_output_size}}; + shift_size = (i % 2 == 0) ? 0 : (window_size_ / 2); + int additional_parameters[3] = {num_head, shift_size, sm}; + std::vector tmp_input_tensors{ + Tensor{MEMORY_GPU, + data_type, + std::vector{batch, input_resolution, input_resolution, dim}, + i == 0 ? from_tensor : block_output_ + ((i - 1) % 2) * block_output_size}, + Tensor{MEMORY_GPU, + TYPE_FP16, + std::vector{window_num, window_len, window_len}, + swin_basic_layer_weights.attn_mask}, + Tensor{MEMORY_CPU, TYPE_INT8, std::vector{3}, additional_parameters}}; + block_->forward(&tmp_output_tensors, &tmp_input_tensors, swin_basic_layer_weights.block_weight_list[i]); + } + } + + if (is_free_buffer_after_forward_) { + freeBuffer(); + } +} + +template class SwinTransformerBasicLayer; +template class SwinTransformerBasicLayer; +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/models/swin/SwinBasicLayer.h b/src/fastertransformer/models/swin/SwinBasicLayer.h new file mode 100644 index 000000000..b523f5499 --- /dev/null +++ b/src/fastertransformer/models/swin/SwinBasicLayer.h @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "SwinBlock.h" + +namespace fastertransformer { +template +class SwinTransformerBasicLayer: public BaseLayer { + +private: + int max_batch_ = 1; + int patches_resolution_ = 64; + int embed_dim_ = 96; + int window_size_ = 7; + float mlp_ratio_ = 4.0f; + bool qkv_bias_ = true; + float qk_scale_ = 1.0f; + + T* buf_ = nullptr; + T *block_output_ = nullptr, *merge_layernorm_buf_ = nullptr; + SwinTransformerBlock* block_ = nullptr; + +public: + static size_t getBufSize(const int batch, const int input_resolution, const int dim) + { + size_t buf_size = 2 * batch * input_resolution * input_resolution * dim * sizeof(T); + return (buf_size + 31) / 32 * 32; + } + + // dim & input_resolution will be used to malloc the max buf size + SwinTransformerBasicLayer(int max_batch, + int window_size, + float mlp_ratio, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool qkv_bias, + float qk_scale); + + void allocateBuffer(); + + void freeBuffer(); + + ~SwinTransformerBasicLayer(); + + // input is [B, H, W, C] + // merge_layernorm_buf is [B, H/2, W/2, 4*C] + // output is [B, H/2, W/2, 2*C] + void patchMerge(T* output, + T* merge_layernorm_buf, + const T* input, + const T* gamma, + const T* beta, + const T* weight, + int batch, + int input_resolution, + int dim); + + void forward(std::vector* output_tensors, + std::vector* input_tensors, + SwinTransformerBasicLayerWeight& swin_basic_layer_weights); + +}; // class SwinTransformerBasicLayer +} // namespace fastertransformer diff --git a/src/fastertransformer/models/swin/SwinBlock.cc b/src/fastertransformer/models/swin/SwinBlock.cc new file mode 100644 index 000000000..34998e4c4 --- /dev/null +++ b/src/fastertransformer/models/swin/SwinBlock.cc @@ -0,0 +1,200 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "SwinBlock.h" + +namespace fastertransformer { + +template +void SwinTransformerBlock::allocateBuffer() +{ + if (is_allocate_buffer_ == false) { + attention_output_ = + (T*)allocator_->malloc(max_batch_ * window_num_ * window_len_ * embed_dim_ * sizeof(T), false); + normed_attn_out_buf_ = + (T*)allocator_->malloc(max_batch_ * window_num_ * window_len_ * embed_dim_ * sizeof(T), false); + mlp_buf_ = (T*)allocator_->malloc( + max_batch_ * window_num_ * window_len_ * int(embed_dim_ * mlp_ratio_) * sizeof(T), false); + + normed_shifted_input_ = mlp_buf_; + is_allocate_buffer_ = true; + } +} + +template +void SwinTransformerBlock::freeBuffer() +{ + if (is_allocate_buffer_ == true) { + allocator_->free(attention_output_); + allocator_->free(normed_attn_out_buf_); + allocator_->free(mlp_buf_); + is_allocate_buffer_ = false; + } +} + +template +SwinTransformerBlock::SwinTransformerBlock(int max_batch, + int window_size, + float mlp_ratio, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool qkv_bias, + float qk_scale): + BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), + max_batch_(max_batch), + window_size_(window_size), + mlp_ratio_(mlp_ratio), + qkv_bias_(qkv_bias), + qk_scale_(qk_scale) +{ + window_len_ = window_size_ * window_size_; + atten_ = new WindowAttention(max_batch_, + window_size_, + stream, + cublas_wrapper, + allocator, + is_free_buffer_after_forward, + qkv_bias_, + qk_scale_); +} + +template +SwinTransformerBlock::~SwinTransformerBlock() +{ + if (atten_ != nullptr) { + delete atten_; + atten_ = nullptr; + } +} + +template +void SwinTransformerBlock::forward(std::vector* output_tensors, + const std::vector* input_tensors, + SwinTransformerBlockWeight& swin_block_weights) +{ + // input_tensors: + // input [batch, input_resolution, input_resolution, dim] + // attention_mask [window_num, window_len, window_len] + // input_parameters [3] {number_of_head, shift_size, sm} + // output_tensors: + // output [batch, input_resolution, input_resolution, dim] + + T* input = (T*)input_tensors->at(0).data; + T* output = (T*)(output_tensors->at(0).data); + const int batch = input_tensors->at(0).shape[0]; + const int input_resolution = input_tensors->at(0).shape[1]; + assert(input_resolution == input_tensors->at(0).shape[2]); + const int dim = input_tensors->at(0).shape[3]; + const int* input_parameters = (const int*)input_tensors->at(2).data; + const int num_head = input_parameters[0]; + int shift_size = input_parameters[1]; + const int sm = input_parameters[2]; + + shift_size = (input_resolution <= window_size_) ? 0 : shift_size; + int window_num = (input_resolution / window_size_) * (input_resolution / window_size_); + window_num_ = window_num; + embed_dim_ = dim; + int mlp_dim = int(mlp_ratio_ * dim); + allocateBuffer(); + + invokeLayernormShiftPartition(normed_shifted_input_, + input, + swin_block_weights.attn_layernorm_weights.gamma, + swin_block_weights.attn_layernorm_weights.beta, + batch, + input_resolution, + input_resolution, + dim, + shift_size, + window_size_, + stream_); + + const size_t m = batch * input_resolution * input_resolution; + const size_t n = dim; + DataType data_type = getTensorType(); + int additional_parameters[6] = {batch, dim, input_resolution, num_head, shift_size, sm}; + std::vector attn_output_tensors{ + Tensor{MEMORY_GPU, data_type, std::vector{m, n}, attention_output_}}; + std::vector attn_input_tensors{ + Tensor{MEMORY_GPU, data_type, std::vector{m, n}, normed_shifted_input_}, + input_tensors->at(1), + Tensor{MEMORY_GPU, + TYPE_FP16, + std::vector{(size_t)num_head, (size_t)window_len_, (size_t)window_len_}, + swin_block_weights.attention_relative_pos_bias}, + Tensor{MEMORY_CPU, TYPE_INT8, std::vector{6}, additional_parameters}}; + + atten_->forward(&attn_output_tensors, &attn_input_tensors, &swin_block_weights.attention_weights); + + invokeGeneralAddBiasResidualPreLayerNorm(attention_output_, + normed_attn_out_buf_, + input, + swin_block_weights.ffn_layernorm_weights.gamma, + swin_block_weights.ffn_layernorm_weights.beta, + swin_block_weights.attention_weights.attention_output_weight.bias, + batch * input_resolution * input_resolution, + dim, + stream_); + + // MLP + cublas_wrapper_->Gemm(CUBLAS_OP_T, + CUBLAS_OP_N, + mlp_dim, + batch * input_resolution * input_resolution, + dim, + swin_block_weights.ffn_weights.intermediate_weight.kernel, + dim, + normed_attn_out_buf_, + dim, + mlp_buf_, + mlp_dim); + + invokeAddBiasGelu(mlp_buf_, + swin_block_weights.ffn_weights.intermediate_weight.bias, + batch * input_resolution * input_resolution, + mlp_dim, + stream_); + + cublas_wrapper_->Gemm(CUBLAS_OP_T, + CUBLAS_OP_N, + dim, + batch * input_resolution * input_resolution, + mlp_dim, + swin_block_weights.ffn_weights.output_weight.kernel, + mlp_dim, + mlp_buf_, + mlp_dim, + output, + dim); + + invokeAddBiasResidual(output, + attention_output_, + swin_block_weights.ffn_weights.output_weight.bias, + batch * input_resolution * input_resolution, + dim, + stream_); + + if (is_free_buffer_after_forward_) { + freeBuffer(); + } +} + +template class SwinTransformerBlock; +template class SwinTransformerBlock; + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/models/swin/SwinBlock.h b/src/fastertransformer/models/swin/SwinBlock.h new file mode 100644 index 000000000..4344e1a6f --- /dev/null +++ b/src/fastertransformer/models/swin/SwinBlock.h @@ -0,0 +1,83 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/kernels/activation_kernels.h" +#include "src/fastertransformer/kernels/add_residual_kernels.h" +#include "src/fastertransformer/kernels/layernorm_kernels.h" +#include "src/fastertransformer/layers/attention_layers/WindowAttention.h" + +namespace fastertransformer { + +template +class SwinTransformerBlock: public BaseLayer { +private: + int max_batch_ = 1; + int window_size_ = 7; + int window_len_ = 49; + int window_num_ = 64; + int embed_dim_ = 96; + float mlp_ratio_ = 4.0f; + bool qkv_bias_ = true; + float qk_scale_ = 1.0f; + + T* buf_ = nullptr; + + T *mlp_buf_ = nullptr, *normed_attn_out_buf_ = nullptr, *attention_output_ = nullptr, + *normed_shifted_input_ = nullptr; + + WindowAttention* atten_ = nullptr; + +public: + static size_t getBufSize(const int batch, + const int input_resolution, + const int mlp_dim, + const int window_num, + const int window_len, + const int dim) + { + // normed_shifted_partition_input || mlp_buf_ + size_t buf_size = batch * input_resolution * input_resolution * mlp_dim * sizeof(T) + + // attention_output_ + batch * window_num * window_len * dim * sizeof(T) + + // skip_buf_ + batch * input_resolution * input_resolution * dim * sizeof(T); + return (buf_size + 31) / 32 * 32; + } + + void allocateBuffer(); + + void freeBuffer(); + + SwinTransformerBlock(int max_batch, + int window_size, + float mlp_ratio, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool qkv_bias, + float qk_scale = 1.0f); + + ~SwinTransformerBlock(); + + void forward(std::vector* output_tensors, + const std::vector* input_tensors, + SwinTransformerBlockWeight& swin_block_weights); + +}; // class SwinTransformerBlock +} // namespace fastertransformer diff --git a/src/fastertransformer/models/swin/SwinWeight.h b/src/fastertransformer/models/swin/SwinWeight.h new file mode 100644 index 000000000..68ff690b1 --- /dev/null +++ b/src/fastertransformer/models/swin/SwinWeight.h @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once +#include "src/fastertransformer/kernels/layernorm_kernels.h" +#include "src/fastertransformer/layers/FfnWeight.h" +#include "src/fastertransformer/layers/attention_layers/AttentionWeight.h" +#include + +namespace fastertransformer { + +template +class SwinTransformerBlockWeight { +public: + AttentionWeight attention_weights; + FfnWeight ffn_weights; + LayerNormWeight attn_layernorm_weights; + LayerNormWeight ffn_layernorm_weights; + const T* attention_relative_pos_bias = nullptr; +}; // SwinTransformerBlockWeight + +template +class SwinTransformerBasicLayerWeight { +public: + LayerNormWeight merge_layernorm_weights; + DenseWeight merge_linear_weights; + const T* attn_mask = nullptr; + std::vector> block_weight_list; +}; // SwinTransformerBasicLayerWeight + +template +class SwinTransformerWeight { +public: + DenseWeight patchEmbed_linear_weights; + LayerNormWeight patchEmbed_norm_weights; + LayerNormWeight norm_weights; + std::vector> basic_layer_weight_list; +}; // class SwinTransformerWeight + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/models/swin/swin_gemm.cc b/src/fastertransformer/models/swin/swin_gemm.cc new file mode 100644 index 000000000..1620ab840 --- /dev/null +++ b/src/fastertransformer/models/swin/swin_gemm.cc @@ -0,0 +1,107 @@ +/* + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/utils/gemm_test/swin_gemm_func.h" +#include "src/fastertransformer/utils/gemm_test/swin_igemm_func.h" +#include "src/fastertransformer/utils/memory_utils.h" + +namespace ft = fastertransformer; + +int main(int argc, char* argv[]) +{ + if (argc != 8) { + printf( + "[ERROR] swin_gemm batch_img image_width window_width head_num(of the first block) size_per_head data_type is_int8\n"); + printf("e.g. ./bin/swin_gemm 32 224 7 3 32 0 1\n"); + return 0; + } + + const int batch_img = atoi(argv[1]); + const int image_width = atoi(argv[2]); + const int window_width = atoi(argv[3]); + const int head_num = atoi(argv[4]); + const int size_per_head = atoi(argv[5]); + const ft::CublasDataType data_type = static_cast(atoi(argv[6])); // 0 FP32, 1 FP16, 2 BF 16 + const int is_int8 = atoi(argv[7]); + + printf("[INFO] arguments: \n"); + printf(" batch_img: %d \n", batch_img); + printf(" image_width: %d \n", image_width); + printf(" window_width: %d \n", window_width); + printf(" head_num: %d \n", head_num); + printf(" size_per_head: %d \n", size_per_head); + printf(" data_type: %d \n", data_type); + printf(" is_int8: %d \n", is_int8); + std::cout << std::endl; + + const int patch_width = 4; + const int batch_size = + batch_img * (image_width / (patch_width * window_width)) * (image_width / (patch_width * window_width)); + const int seq_len = window_width * window_width; + const int inter_size = 4 * head_num * size_per_head; + + void* gemm_test_buf; + size_t buf_size_in_byte = ft::calGemmTestBufSizeInByte( + batch_size, seq_len, head_num, size_per_head, inter_size, 0, 1, ft::FLOAT_DATATYPE); + int batch_tmp = batch_size; + int head_num_tmp = head_num; + for (int i = 1; i < 4; i++) { + batch_tmp /= 4; + head_num_tmp *= 2; + size_t buf_size_tmp = ft::calGemmTestBufSizeInByte( + batch_tmp, seq_len, head_num_tmp, size_per_head, 4 * head_num_tmp * size_per_head, 0, is_int8, data_type); + if (buf_size_tmp > buf_size_in_byte) { + buf_size_in_byte = buf_size_tmp; + } + } + size_t total, free; + ft::check_cuda_error(cudaMemGetInfo(&free, &total)); + + if (free < buf_size_in_byte + 10 * 1024 * 1024) { + printf("[ERROR] There is no enough device memory for gemm test!\n" + " %ld Bytes is needed, but only %ld Bytes is free.\n", + buf_size_in_byte, + free); + gemm_test_buf = NULL; + return -1; + } + else { + ft::deviceMalloc(reinterpret_cast(&gemm_test_buf), buf_size_in_byte, true); + } + + if (is_int8 != 0) { + ft::generate_swin_igemm_config(batch_size, seq_len, head_num, size_per_head, gemm_test_buf, false); + } + else if (data_type == ft::FLOAT_DATATYPE) { + ft::generate_swin_gemm_config(batch_size, seq_len, head_num, size_per_head, gemm_test_buf, false); + } + else if (data_type == ft::HALF_DATATYPE) { + ft::generate_swin_gemm_config(batch_size, seq_len, head_num, size_per_head, gemm_test_buf, false); + } +#ifdef ENABLE_BF16 + else if (data_type == ft::BFLOAT16_DATATYPE) { + ft::generate_swin_gemm_config<__nv_bfloat16>( + batch_size, seq_len, head_num, size_per_head, gemm_test_buf, false); + } +#endif + else { + printf("[ERROR] data type only supports fp32(0), fp16(1), bf16(2). \n"); + return -1; + } + + ft::check_cuda_error(cudaFree(gemm_test_buf)); + return 0; +} diff --git a/src/fastertransformer/models/swin_int8/CMakeLists.txt b/src/fastertransformer/models/swin_int8/CMakeLists.txt new file mode 100644 index 000000000..9847d449d --- /dev/null +++ b/src/fastertransformer/models/swin_int8/CMakeLists.txt @@ -0,0 +1,31 @@ +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +cmake_minimum_required(VERSION 3.8) + +add_library(SwinBlockINT8 STATIC SwinBlockINT8.cc) +set_property(TARGET SwinBlockINT8 PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET SwinBlockINT8 PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(SwinBlockINT8 PUBLIC -lcublasLt -lcublas -lcudart + WindowAttentionINT8 activation_int8_kernels add_residual_kernels) + +add_library(SwinBasicLayerINT8 STATIC SwinBasicLayerINT8.cc) +set_property(TARGET SwinBasicLayerINT8 PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET SwinBasicLayerINT8 PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(SwinBasicLayerINT8 PUBLIC -lcublasLt -lcublas -lcudart SwinBlockINT8 dequantize_kernels) + +add_library(SwinINT8 STATIC SwinINT8.cc) +set_property(TARGET SwinINT8 PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET SwinINT8 PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(SwinINT8 PUBLIC -lcudart SwinBasicLayerINT8 activation_kernels memory_utils) diff --git a/src/fastertransformer/models/swin_int8/SwinBasicLayerINT8.cc b/src/fastertransformer/models/swin_int8/SwinBasicLayerINT8.cc new file mode 100644 index 000000000..84288ef45 --- /dev/null +++ b/src/fastertransformer/models/swin_int8/SwinBasicLayerINT8.cc @@ -0,0 +1,261 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/swin_int8/SwinBasicLayerINT8.h" + +namespace fastertransformer { + +template +void SwinTransformerINT8BasicLayer::allocateBuffer() +{ + if (is_allocate_buffer_ == false) { + block_output_ = (T*)allocator_->malloc( + 2 * max_batch_ * patches_resolution_ * patches_resolution_ * embed_dim_ * sizeof(T), false); + + gemm_out_buf_ = (int8_t*)allocator_->malloc( + max_batch_ * patches_resolution_ * patches_resolution_ * embed_dim_ / 2 * sizeof(int32_t), false); + + is_allocate_buffer_ = true; + } +} + +template +void SwinTransformerINT8BasicLayer::freeBuffer() +{ + if (is_allocate_buffer_ == true) { + allocator_->free(block_output_); + allocator_->free(gemm_out_buf_); + is_allocate_buffer_ = false; + } +} + +// input is [B, H, W, C] +// merge_layernorm_buf is [B, H/2, W/2, 4*C] +// output is [B, H/2, W/2, 2*C] +template +void SwinTransformerINT8BasicLayer::patchMerge(T* output, + int8_t* gemm_out_buf, + int8_t* merge_layernorm_buf, + const T* input, + const T* gamma, + const T* beta, + const int8_t* weight, + int batch, + const ScaleList* scalePtr, + int input_resolution, + int dim, + int sm) +{ + cublasINT8MMWrapper* cublas_wrapper = (cublasINT8MMWrapper*)cublas_wrapper_; + invokeMergeLayerNormCol32(merge_layernorm_buf, + input, + gamma, + beta, + batch, + &(scalePtr->d_scale_list_[60 + 3]), + input_resolution, + input_resolution, + dim, + stream_); + + if (int8_mode == 1) { + cublas_wrapper->Gemm(gemm_out_buf, + 1, + batch * input_resolution * input_resolution / 4, + 2 * dim, + 4 * dim, + 0, + 0, + 0, + scalePtr->h_scale_list_[scalePtr->p3_offset_ + 6], + merge_layernorm_buf, + weight); + + invokeDequantization(output, + gemm_out_buf, + batch * input_resolution * input_resolution * dim / 2, + &(scalePtr->d_scale_list_[64 + 1]), + stream_); + } + else { + cublas_wrapper->Gemm((int32_t*)gemm_out_buf, + 1, + batch * input_resolution * input_resolution / 4, + 2 * dim, + 4 * dim, + 0, + 0, + 0, + merge_layernorm_buf, + weight); + + invokeDequantization_INT32(output, + (int32_t*)gemm_out_buf, + batch * input_resolution * input_resolution * dim / 2, + stream_, + &(scalePtr->d_scale_list_[60 + 3]), + &(scalePtr->d_scale_list_[scalePtr->p2_offset_ + 4])); + } +} + +template +SwinTransformerINT8BasicLayer::SwinTransformerINT8BasicLayer(int int8_mode, + int max_batch, + int window_size, + int patches_resolution, + int embed_dim, + float mlp_ratio, + bool qkv_bias, + float qk_scale, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward): + BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), + int8_mode(int8_mode), + max_batch_(max_batch), + patches_resolution_(patches_resolution), + embed_dim_(embed_dim), + window_size_(window_size), + mlp_ratio_(mlp_ratio), + qkv_bias_(qkv_bias), + qk_scale_(qk_scale) +{ + block_ = new SwinTransformerINT8Block(int8_mode, + max_batch_, + window_size_, + patches_resolution_, + embed_dim_, + mlp_ratio_, + qkv_bias_, + stream, + cublas_wrapper, + allocator, + is_free_buffer_after_forward, + qk_scale_); +} + +template +SwinTransformerINT8BasicLayer::~SwinTransformerINT8BasicLayer() +{ + if (block_ != nullptr) { + delete block_; + block_ = nullptr; + } +} + +template +void SwinTransformerINT8BasicLayer::forward(std::vector* output_tensors, + std::vector* input_tensors, + SwinTransformerINT8BasicLayerWeight& swin_basic_layer_weights) +{ + // input_tensors: + // input [batch, input_resolution, input_resolution, dim] + // input_paramters [4] {basic_layer_depth, number_of_head, do_patch_merge, sm} + // output_tensors: + // output [batch, output_resolution, output_resolution, output_dim] + + T* from_tensor = (T*)input_tensors->at(0).data; + T* out_tensor = (T*)(output_tensors->at(0).data); + size_t batch = input_tensors->at(0).shape[0]; + size_t input_resolution = input_tensors->at(0).shape[1]; + assert(input_resolution == input_tensors->at(0).shape[2]); + size_t dim = input_tensors->at(0).shape[3]; + int* input_paramters = (int*)input_tensors->at(1).data; + const int depth = input_paramters[0]; + const int num_head = input_paramters[1]; + bool do_patch_merge = (input_paramters[2] == 1) ? true : false; + const int sm = input_paramters[3]; + allocateBuffer(); + + int block_output_size = batch * input_resolution * input_resolution * dim; + size_t m = batch * input_resolution * input_resolution; + size_t n = dim; + size_t window_num = (input_resolution / window_size_) * (input_resolution / window_size_); + size_t window_len = window_size_ * window_size_; + int shift_size = 0; + DataType data_type = getTensorType(); + + if (do_patch_merge) { + for (int i = 0; i < depth; i++) { + std::vector tmp_output_tensors{ + Tensor{MEMORY_GPU, + data_type, + std::vector{batch, input_resolution, input_resolution, dim}, + block_output_ + (i % 2) * block_output_size}}; + shift_size = (i % 2 == 0) ? 0 : (window_size_ / 2); + int additional_parameters[3] = {num_head, shift_size, sm}; + std::vector tmp_input_tensors{ + Tensor{MEMORY_GPU, + data_type, + std::vector{batch, input_resolution, input_resolution, dim}, + i == 0 ? from_tensor : block_output_ + ((i - 1) % 2) * block_output_size}, + Tensor{MEMORY_GPU, + TYPE_FP16, + std::vector{window_num, window_len, window_len}, + swin_basic_layer_weights.attn_mask}, + Tensor{MEMORY_CPU, TYPE_INT8, std::vector{3}, additional_parameters}}; + block_->forward(&tmp_output_tensors, &tmp_input_tensors, swin_basic_layer_weights.block_weight_list[i]); + } + + const ScaleList* scalePtr = &(swin_basic_layer_weights.block_weight_list[0].scalelist); + // gemm_out_buf_ = (int8_t*)(buf_ + 2 * batch * input_resolution * input_resolution * dim); + patchMerge(out_tensor, + gemm_out_buf_, + (int8_t*)(block_output_ + (depth % 2) * block_output_size), + block_output_ + ((depth - 1) % 2) * block_output_size, + swin_basic_layer_weights.merge_layernorm_weights.gamma, + swin_basic_layer_weights.merge_layernorm_weights.beta, + (int8_t*)swin_basic_layer_weights.merge_linear_weights.kernel, + batch, + scalePtr, + input_resolution, + dim, + sm); + } + else { + for (int i = 0; i < depth; i++) { + std::vector tmp_output_tensors{ + Tensor{MEMORY_GPU, + data_type, + std::vector{batch, input_resolution, input_resolution, dim}, + i == depth - 1 ? out_tensor : block_output_ + (i % 2) * block_output_size}}; + shift_size = (i % 2 == 0) ? 0 : (window_size_ / 2); + int additional_parameters[3] = {num_head, shift_size, sm}; + std::vector tmp_input_tensors{ + Tensor{MEMORY_GPU, + data_type, + std::vector{batch, input_resolution, input_resolution, dim}, + i == 0 ? from_tensor : block_output_ + ((i - 1) % 2) * block_output_size}, + Tensor{MEMORY_GPU, + TYPE_FP16, + std::vector{window_num, window_len, window_len}, + swin_basic_layer_weights.attn_mask}, + Tensor{MEMORY_CPU, TYPE_INT8, std::vector{3}, additional_parameters}}; + + block_->forward(&tmp_output_tensors, &tmp_input_tensors, swin_basic_layer_weights.block_weight_list[i]); + } + } + + if (is_free_buffer_after_forward_) { + freeBuffer(); + } +} + +template class SwinTransformerINT8BasicLayer; +template class SwinTransformerINT8BasicLayer; + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/models/swin_int8/SwinBasicLayerINT8.h b/src/fastertransformer/models/swin_int8/SwinBasicLayerINT8.h new file mode 100644 index 000000000..fc6c197ae --- /dev/null +++ b/src/fastertransformer/models/swin_int8/SwinBasicLayerINT8.h @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/models/swin_int8/SwinBlockINT8.h" + +namespace fastertransformer { +template +class SwinTransformerINT8BasicLayer: public BaseLayer { +private: + int int8_mode = 0; + int max_batch_ = 1; + int patches_resolution_ = 64; + int embed_dim_ = 96; + int window_size_ = 7; + float mlp_ratio_ = 4.0f; + bool qkv_bias_ = true; + float qk_scale_ = 1.0f; + const size_t max_buf_size_ = 0; + + // T* buf_ = nullptr; + T* block_output_ = nullptr; + int8_t* gemm_out_buf_ = nullptr; + SwinTransformerINT8Block* block_ = nullptr; + + void allocateBuffer(); + + void freeBuffer(); + + // input is [B, H, W, C] + // merge_layernorm_buf is [B, H/2, W/2, 4*C] + // output is [B, H/2, W/2, 2*C] + void patchMerge(T* output, + int8_t* gemm_out_buf, + int8_t* merge_layernorm_buf, + const T* input, + const T* gamma, + const T* beta, + const int8_t* weight, + int batch, + const ScaleList* scalePtr, + int input_resolution, + int dim, + int sm); + +public: + // dim & input_resolution will be used to malloc the max buf size + SwinTransformerINT8BasicLayer(int int8_mode, + int max_batch, + int window_size, + int patches_resolution, + int embed_dim, + float mlp_ratio, + bool qkv_bias, + float qk_scale, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward); + + ~SwinTransformerINT8BasicLayer(); + + void forward(std::vector* output_tensors, + std::vector* input_tensors, + SwinTransformerINT8BasicLayerWeight& swin_basic_layer_weights); + +}; // class SwinTransformerINT8BasicLayer +} // namespace fastertransformer diff --git a/src/fastertransformer/models/swin_int8/SwinBlockINT8.cc b/src/fastertransformer/models/swin_int8/SwinBlockINT8.cc new file mode 100644 index 000000000..1914a2e52 --- /dev/null +++ b/src/fastertransformer/models/swin_int8/SwinBlockINT8.cc @@ -0,0 +1,244 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/swin_int8/SwinBlockINT8.h" + +namespace fastertransformer { + +template +void SwinTransformerINT8Block::allocateBuffer() +{ + if (is_allocate_buffer_ == false) { + attention_output_ = (int8_t*)allocator_->malloc( + max_batch_ * patches_resolution_ * patches_resolution_ * embed_dim_ * sizeof(int8_t), false); + skip_buf_ = (int8_t*)allocator_->malloc( + max_batch_ * patches_resolution_ * patches_resolution_ * embed_dim_ * sizeof(int8_t), false); + mlp_buf_ = (int8_t*)allocator_->malloc(max_batch_ * patches_resolution_ * patches_resolution_ + * int(embed_dim_ * mlp_ratio_) * sizeof(int8_t), + false); + mlp_output_ = (int8_t*)allocator_->malloc( + max_batch_ * patches_resolution_ * patches_resolution_ * embed_dim_ * sizeof(int32_t), false); + + normed_shifted_input_ = mlp_buf_; + is_allocate_buffer_ = true; + } +} + +template +void SwinTransformerINT8Block::freeBuffer() +{ + if (is_allocate_buffer_ == true) { + allocator_->free(attention_output_); + allocator_->free(skip_buf_); + allocator_->free(mlp_buf_); + allocator_->free(mlp_output_); + is_allocate_buffer_ = false; + } +} + +template +SwinTransformerINT8Block::SwinTransformerINT8Block(int int8_mode, + int max_batch, + int window_size, + int patches_resolution, + int embed_dim, + float mlp_ratio, + bool qkv_bias, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + float qk_scale): + BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), + int8_mode(int8_mode), + max_batch_(max_batch), + window_size_(window_size), + patches_resolution_(patches_resolution), + embed_dim_(embed_dim), + mlp_ratio_(mlp_ratio), + qkv_bias_(qkv_bias), + qk_scale_(qk_scale) +{ + window_len_ = window_size_ * window_size_; + atten_ = new WindowAttentionINT8(max_batch_, + window_size_, + patches_resolution, + embed_dim, + stream, + cublas_wrapper, + allocator, + is_free_buffer_after_forward, + qkv_bias_, + qk_scale_); +} + +template +SwinTransformerINT8Block::~SwinTransformerINT8Block() +{ + if (atten_ != nullptr) { + delete atten_; + atten_ = nullptr; + } +} + +template +void SwinTransformerINT8Block::forward(std::vector* output_tensors, + const std::vector* input_tensors, + SwinTransformerINT8BlockWeight& swin_block_weights) +{ + // input_tensors: + // input [batch, input_resolution, input_resolution, dim] + // attention_mask [window_num, window_len, window_len] + // input_paramters [3] {number_of_head, shift_size, sm} + // output_tensors: + // output [batch, input_resolution, input_resolution, dim] + + cublasINT8MMWrapper* cublas_wrapper = (cublasINT8MMWrapper*)cublas_wrapper_; + T* from_tensor = (T*)input_tensors->at(0).data; + T* out_tensor = (T*)(output_tensors->at(0).data); + const int batch = input_tensors->at(0).shape[0]; + const int input_resolution = input_tensors->at(0).shape[1]; + const int dim = input_tensors->at(0).shape[3]; + const int* input_parameters = (const int*)input_tensors->at(2).data; + const int num_head = input_parameters[0]; + int shift_size = input_parameters[1]; + const int sm = input_parameters[2]; + + shift_size = (input_resolution <= window_size_) ? 0 : shift_size; + size_t window_num = (input_resolution / window_size_) * (input_resolution / window_size_); + int mlp_dim = int(mlp_ratio_ * dim); + allocateBuffer(); + + const size_t m = batch * input_resolution * input_resolution; + const size_t n = dim; + + // end of checking buf size + const ScaleList* scalePtr = &(swin_block_weights.scalelist); + + invokeLayernormShiftPartitionCol32(normed_shifted_input_, + from_tensor, + swin_block_weights.attn_layernorm_weights.gamma, + swin_block_weights.attn_layernorm_weights.beta, + batch, + input_resolution, + input_resolution, + dim, + &(scalePtr->d_scale_list_[0 + 3]), + shift_size, + window_size_, + stream_); + sync_check_cuda_error(); + + int additional_parameters[6] = {batch, dim, input_resolution, num_head, shift_size, sm}; + std::vector attn_output_tensors{ + Tensor{MEMORY_GPU, TYPE_INT8, std: vector{m, n}, attention_output_}}; + std::vector int8_input_tensors{ + Tensor{MEMORY_GPU, TYPE_INT8, std::vector{m, n}, normed_shifted_input_}, + input_tensors->at(1), + Tensor{MEMORY_GPU, + TYPE_FP16, + std::vector{(size_t)num_head, (size_t)window_len_, (size_t)window_len_}, + swin_block_weights.attention_relative_pos_bias}, + Tensor{MEMORY_CPU, TYPE_INT8, std::vector{6}, additional_parameters}}; + + swin_block_weights.attention_weights.scale_list_ptr = &(swin_block_weights.scalelist); + atten_->forward(&attn_output_tensors, &int8_input_tensors, &swin_block_weights.attention_weights); + sync_check_cuda_error(); + invokeAddBiasResidualLayerNormCol32_noRes((int8_t*)attention_output_, + (int8_t*)attention_output_, + from_tensor, + swin_block_weights.attention_weights.attention_output_weight.bias, + swin_block_weights.ffn_layernorm_weights.gamma, + swin_block_weights.ffn_layernorm_weights.beta, + m, + dim, + stream_, + &(scalePtr->d_scale_list_[12 + 1]), + &(scalePtr->d_scale_list_[36 + 3])); + // } + + cublas_wrapper->Gemm((int8_t*)mlp_buf_, + 1, + m, + mlp_dim, + dim, + 0, + 0, + 0, + scalePtr->h_scale_list_[scalePtr->p3_offset_ + 2], + (int8_t*)attention_output_, + (int8_t*)swin_block_weights.ffn_weights.intermediate_weight.kernel); + + invokeAddBiasGeluCol32_v2(mlp_buf_, + swin_block_weights.ffn_weights.intermediate_weight.bias, + m, + mlp_dim, + stream_, + &(scalePtr->d_scale_list_[40 + 1]), + &(scalePtr->d_scale_list_[44 + 3])); + + if (int8_mode == 1) { + cublas_wrapper->Gemm((int8_t*)mlp_output_, + 1, + m, + dim, + mlp_dim, + 0, + 0, + 0, + scalePtr->h_scale_list_[scalePtr->p3_offset_ + 3], + (int8_t*)mlp_buf_, + (int8_t*)swin_block_weights.ffn_weights.output_weight.kernel); + invokeAddBiasResidualCol32(out_tensor, + (int8_t*)mlp_output_, + from_tensor, + swin_block_weights.ffn_weights.output_weight.bias, + m, + dim, + stream_, + &(scalePtr->d_scale_list_[48 + 1])); + } + else { + cublas_wrapper->Gemm((int*)mlp_output_, + 1, + m, + dim, + mlp_dim, + 0, + 0, + 0, + (int8_t*)mlp_buf_, + (int8_t*)swin_block_weights.ffn_weights.output_weight.kernel); + invokeAddBiasResidualCol32(out_tensor, + (int*)mlp_output_, + from_tensor, + swin_block_weights.ffn_weights.output_weight.bias, + m, + dim, + stream_, + &scalePtr->d_scale_list_[scalePtr->p2_offset_ + 3], + &scalePtr->d_scale_list_[44 + 0]); + } + + if (is_free_buffer_after_forward_) { + freeBuffer(); + } +} + +template class SwinTransformerINT8Block; +template class SwinTransformerINT8Block; + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/models/swin_int8/SwinBlockINT8.h b/src/fastertransformer/models/swin_int8/SwinBlockINT8.h new file mode 100644 index 000000000..f4e477025 --- /dev/null +++ b/src/fastertransformer/models/swin_int8/SwinBlockINT8.h @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/kernels/activation_int8_kernels.h" +#include "src/fastertransformer/kernels/add_residual_kernels.h" +#include "src/fastertransformer/kernels/dequantize_kernels.h" +#include "src/fastertransformer/kernels/layernorm_int8_kernels.h" +#include "src/fastertransformer/layers/FfnINT8Weight.h" +#include "src/fastertransformer/layers/attention_layers_int8/WindowAttentionINT8.h" + +namespace fastertransformer { +template +class SwinTransformerINT8Block: public BaseLayer { +private: + int int8_mode = 0; + int max_batch_ = 1; + int window_size_ = 7; + int window_len_ = 49; + int patches_resolution_ = 56; + int embed_dim_ = 96; + float mlp_ratio_ = 4.0f; + bool qkv_bias_ = true; + float qk_scale_ = 1.0f; + size_t max_buf_size_ = 0; + + int8_t* buf_ = nullptr; + + int8_t *mlp_buf_ = nullptr, *skip_buf_ = nullptr, *attention_output_ = nullptr, *normed_shifted_input_ = nullptr; + int8_t *mlp_output_ = nullptr, *input_int8 = nullptr; + WindowAttentionINT8* atten_ = nullptr; + + void allocateBuffer(); + + void freeBuffer(); + +public: + SwinTransformerINT8Block(int int8_mode, + int max_batch, + int window_size, + int patches_resolution, + int embed_dim, + float mlp_ratio, + bool qkv_bias, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + float qk_scale = 1.0f); + + ~SwinTransformerINT8Block(); + + void forward(std::vector* output_tensors, + const std::vector* input_tensors, + SwinTransformerINT8BlockWeight& swin_block_weights); + +}; // class SwinTransformerINT8Block +} // namespace fastertransformer diff --git a/src/fastertransformer/models/swin_int8/SwinINT8.cc b/src/fastertransformer/models/swin_int8/SwinINT8.cc new file mode 100644 index 000000000..056996ede --- /dev/null +++ b/src/fastertransformer/models/swin_int8/SwinINT8.cc @@ -0,0 +1,288 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "SwinINT8.h" + +namespace fastertransformer { + +template +size_t SwinTransformerINT8::getBufSize(const int batch, + const int patches_resolution, + const int layer_num, + const int embed_dim) +{ + int final_len = patches_resolution; + for (int i = 0; i < layer_num - 1; i++) { + final_len /= 2; + } + final_len = batch * final_len * final_len; + // for x_patch_embed_ + size_t buf_size = batch * embed_dim * patches_resolution * patches_resolution * sizeof(T) + + // for buffer which holds COL32 data + batch * embed_dim * patches_resolution * patches_resolution * sizeof(T) + + // for 2 x basic_layer_output + 2 * batch * patches_resolution * patches_resolution * embed_dim / 2 * sizeof(T) + + // for avg pool ones + (final_len + 3) / 4 * 4 * sizeof(T); + + return (buf_size + 31) / 32 * 32; +} + +template +void SwinTransformerINT8::allocateBuffer() +{ + if (is_allocate_buffer_ == false) { + buf_ = (T*)(allocator_->malloc(max_buf_size_, false)); + + x_patch_embed_ = buf_; + + buffer_COL32 = x_patch_embed_ + max_batch_ * embed_dim_ * patches_resolution_ * patches_resolution_; + + basic_layer_output_ = buffer_COL32 + max_batch_ * embed_dim_ * patches_resolution_ * patches_resolution_; + + avg_pool_ones_ = + basic_layer_output_ + 2 * max_batch_ * patches_resolution_ * patches_resolution_ * embed_dim_ / 2; + + int final_len = patches_resolution_; + for (int i = 0; i < layer_num_ - 1; i++) { + final_len /= 2; + } + final_len = max_batch_ * final_len * final_len; + deviceFill(avg_pool_ones_, (final_len + 3) / 4 * 4, T(1.0f)); + + is_allocate_buffer_ = true; + } +} + +template +void SwinTransformerINT8::freeBuffer() +{ + if (is_allocate_buffer_ == true) { + allocator_->free(buf_); + is_allocate_buffer_ = false; + } +} + +// input is [B, C_in, H, W] +// output is [B, H, W, C_out] +template +void SwinTransformerINT8::patchEmbed(T* output, + const T* input, + const T* kernel, + const T* bias, + const T* gamma, + const T* beta, + const int batch, + const int img_size, + const int patch_size, + const int patches_resolution, + const int in_chans, + const int embed_dim, + const bool patch_norm) +{ + conv2d( + output, input, kernel, batch, img_size, img_size, in_chans, embed_dim, patch_size, patch_size, cudnn_handle_); + + if (patch_norm) { + invokeAddBiasLayernorm( + output, bias, gamma, beta, batch * patches_resolution * patches_resolution, embed_dim, stream_); + } + else { + invokeAddBias(output, bias, batch * patches_resolution * patches_resolution, embed_dim, stream_); + } +} + +template +SwinTransformerINT8::SwinTransformerINT8(int int8_mode, + int max_batch, + int img_size, + int patch_size, + int in_chans, + int embed_dim, + int window_size, + int* depths, + int* num_heads, + bool ape, + bool patch_norm, + int layer_num, + float mlp_ratio, + cudnnHandle_t cudnn_handle, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool qkv_bias, + float qk_scale): + int8_mode(int8_mode), + max_batch_(max_batch), + img_size_(img_size), + patch_size_(patch_size), + in_chans_(in_chans), + embed_dim_(embed_dim), + window_size_(window_size), + depths_(depths), + num_heads_(num_heads), + ape_(ape), + patch_norm_(patch_norm), + layer_num_(layer_num), + mlp_ratio_(mlp_ratio), + cudnn_handle_(cudnn_handle), + stream_(stream), + cublas_wrapper_(cublas_wrapper), + allocator_(allocator), + is_free_buffer_after_forward_(is_free_buffer_after_forward), + qkv_bias_(qkv_bias), + qk_scale_(qk_scale) +{ + + patches_resolution_ = img_size / patch_size; + max_buf_size_ = getBufSize(max_batch_, patches_resolution_, layer_num_, embed_dim_); + + basic_layer_ = new SwinTransformerINT8BasicLayer(int8_mode, + max_batch_, + window_size_, + patches_resolution_, + embed_dim_, + mlp_ratio_, + qkv_bias_, + qk_scale_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_); +} + +template +SwinTransformerINT8::~SwinTransformerINT8() +{ + if (basic_layer_ != nullptr) { + delete basic_layer_; + basic_layer_ = nullptr; + } +} + +template +void SwinTransformerINT8::forward(std::vector* output_tensors, + const std::vector* input_tensors, + SwinTransformerINT8Weight& swin_weights) +{ + // input_tensors: + // input_images [batch, in_channels, input_resolution, input_resolution] + // sm [1] + // output_tensors: + // output_embedding [batch, final_len] + + T* from_tensor = (T*)input_tensors->at(0).data; + T* output = (T*)(output_tensors->at(0).data); + const size_t batch = input_tensors->at(0).shape[0]; + const int sm = *(const int*)input_tensors->at(1).data; + allocateBuffer(); + patchEmbed(x_patch_embed_, + from_tensor, + swin_weights.patchEmbed_linear_weights.kernel, + swin_weights.patchEmbed_linear_weights.bias, + swin_weights.patchEmbed_norm_weights.gamma, + swin_weights.patchEmbed_norm_weights.beta, + batch, + img_size_, + patch_size_, + patches_resolution_, + in_chans_, + embed_dim_, + patch_norm_); + + size_t basic_layer_dim = embed_dim_; + size_t basic_layer_input_resolution = patches_resolution_; + int basic_layer_output_size = batch * patches_resolution_ * patches_resolution_ * embed_dim_ / 2; + size_t m = batch * patches_resolution_ * patches_resolution_; + size_t n = embed_dim_; + DataType data_type = getTensorType(); + + bool do_patch_merge = true; + if (layer_num_ == 1) { + do_patch_merge = false; + } + + invokeTransposeMatrixColMajorToCOL32( + buffer_COL32, x_patch_embed_, embed_dim_, batch * patches_resolution_ * patches_resolution_, stream_); + + for (int i = 0; i < layer_num_; i++) { + if (i == layer_num_ - 1) { + do_patch_merge = false; + } + + std::vector tmp_output_tensors{Tensor{ + MEMORY_GPU, + data_type, + std::vector{batch, basic_layer_input_resolution, basic_layer_input_resolution, basic_layer_dim}, + basic_layer_output_ + (i % 2) * basic_layer_output_size}}; + int additional_parameters[4] = {depths_[i], num_heads_[i], do_patch_merge ? 1 : 0, sm}; + std::vector tmp_input_tensors{ + Tensor{ + MEMORY_GPU, + data_type, + std::vector{batch, basic_layer_input_resolution, basic_layer_input_resolution, basic_layer_dim}, + i == 0 ? buffer_COL32 : basic_layer_output_ + ((i - 1) % 2) * basic_layer_output_size}, + Tensor{MEMORY_CPU, TYPE_INT8, std::vector{4}, additional_parameters}}; + basic_layer_->forward(&tmp_output_tensors, &tmp_input_tensors, swin_weights.basic_layer_weight_list[i]); + + if (i != layer_num_ - 1) { + basic_layer_dim *= 2; + basic_layer_input_resolution /= 2; + } + } + + invokeTransposeMatrixCOL32ToColMajor(buffer_COL32, + basic_layer_output_ + ((layer_num_ - 1) % 2) * basic_layer_output_size, + batch * basic_layer_input_resolution * basic_layer_input_resolution, + basic_layer_dim, + stream_); + invokeGeneralLayerNorm(basic_layer_output_ + (layer_num_ % 2) * basic_layer_output_size, + buffer_COL32, + swin_weights.norm_weights.gamma, + swin_weights.norm_weights.beta, + batch * basic_layer_input_resolution * basic_layer_input_resolution, + basic_layer_dim, + stream_); + + // avg pool + int final_len = basic_layer_input_resolution * basic_layer_input_resolution; + cublas_wrapper_->stridedBatchedGemm(CUBLAS_OP_N, + CUBLAS_OP_N, + basic_layer_dim, + 1, + final_len, + basic_layer_output_ + (layer_num_ % 2) * basic_layer_output_size, + basic_layer_dim, + basic_layer_dim * final_len, + avg_pool_ones_, + final_len, + 1 * final_len, + output, + basic_layer_dim, + basic_layer_dim * 1, + batch, + 1.0f / final_len); + + if (is_free_buffer_after_forward_ == true) { + freeBuffer(); + } +} + +template class SwinTransformerINT8; +template class SwinTransformerINT8; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/swin_int8/SwinINT8.h b/src/fastertransformer/models/swin_int8/SwinINT8.h new file mode 100644 index 000000000..de0c52a55 --- /dev/null +++ b/src/fastertransformer/models/swin_int8/SwinINT8.h @@ -0,0 +1,116 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/kernels/activation_kernels.h" +#include "src/fastertransformer/models/swin_int8/SwinBasicLayerINT8.h" +#include "src/fastertransformer/utils/allocator.h" +#include "src/fastertransformer/utils/conv2d.h" +#include "src/fastertransformer/utils/memory_utils.h" + +namespace fastertransformer { +template +class SwinTransformerINT8 { +private: + int int8_mode = 0; + int max_batch_ = 1; + int img_size_ = 224; + int patch_size_ = 4; + int in_chans_ = 3; + int embed_dim_ = 96; + int window_size_ = 7; + int* depths_; + int* num_heads_; + bool ape_ = false; + bool patch_norm_ = true; + float mlp_ratio_ = 4.0f; + bool qkv_bias_ = true; + int patches_resolution_ = 56; + int layer_num_ = 4; + int qk_scale_ = 1.0f; + size_t max_buf_size_ = 0; + size_t max_basic_layer_buf_size_ = 0; + size_t max_block_buf_size_ = 0; + size_t max_window_attention_buf_size_ = 0; + IAllocator* allocator_ = nullptr; + cudnnHandle_t cudnn_handle_; + cudaStream_t stream_; + cublasMMWrapper* cublas_wrapper_; + bool is_free_buffer_after_forward_; + bool is_allocate_buffer_ = false; + + T* buf_ = nullptr; + T* x_patch_embed_ = nullptr; + T* basic_layer_output_ = nullptr; + // for avgPool_ones + T* avg_pool_ones_ = nullptr; + T* buffer_COL32 = nullptr; + + SwinTransformerINT8BasicLayer* basic_layer_ = nullptr; + + static size_t getBufSize(const int batch, const int patches_resolution, const int layer_num, const int embed_dim); + + void allocateBuffer(); + + void freeBuffer(); + + // input is [B, C_in, H, W] + // output is [B, H, W, C_out] + void patchEmbed(T* output, + const T* input, + const T* kernel, + const T* bias, + const T* gamma, + const T* beta, + const int batch, + const int img_size, + const int patch_size, + const int patches_resolution, + const int in_chans, + const int embed_dim, + const bool patch_norm); + +public: + SwinTransformerINT8(int int8_mode, + int max_batch, + int img_size, + int patch_size, + int in_chans, + int embed_dim, + int window_size, + int* depths, + int* num_heads, + bool ape, + bool patch_norm, + int layer_num, + float mlp_ratio, + cudnnHandle_t cudnn_handle, + cudaStream_t stream, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + bool qkv_bias = true, + float qk_scale = 1.0f); + + ~SwinTransformerINT8(); + + void forward(std::vector* output_tensors, + const std::vector* input_tensors, + SwinTransformerINT8Weight& swin_weights); + +}; // class SwinTransformerINT8 +} // namespace fastertransformer diff --git a/src/fastertransformer/models/swin_int8/SwinINT8Weight.h b/src/fastertransformer/models/swin_int8/SwinINT8Weight.h new file mode 100644 index 000000000..4429c7fe6 --- /dev/null +++ b/src/fastertransformer/models/swin_int8/SwinINT8Weight.h @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once +#include "src/fastertransformer/kernels/layernorm_kernels.h" +#include "src/fastertransformer/layers/FfnINT8Weight.h" +#include "src/fastertransformer/layers/attention_layers_int8/AttentionINT8Weight.h" +#include +#include +#include +using namespace std; + +namespace fastertransformer { + +template +class SwinTransformerINT8BlockWeight { +public: + AttentionINT8Weight attention_weights; + FfnINT8Weight ffn_weights; + LayerNormWeight attn_layernorm_weights; + LayerNormWeight ffn_layernorm_weights; + const T* attention_relative_pos_bias = nullptr; + ScaleList scalelist; +}; // SwinTransformerINT8BlockWeight + +template +class SwinTransformerINT8BasicLayerWeight { +public: + LayerNormWeight merge_layernorm_weights; + DenseWeight merge_linear_weights; + const T* attn_mask = nullptr; + vector> block_weight_list; +}; // SwinTransformerINT8BasicLayerWeight + +template +class SwinTransformerINT8Weight { +public: + DenseWeight patchEmbed_linear_weights; + LayerNormWeight patchEmbed_norm_weights; + LayerNormWeight norm_weights; + vector> basic_layer_weight_list; +}; // class SwinTransformerINT8Weight + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/models/t5/CMakeLists.txt b/src/fastertransformer/models/t5/CMakeLists.txt index e156f81d7..9f3455d3f 100644 --- a/src/fastertransformer/models/t5/CMakeLists.txt +++ b/src/fastertransformer/models/t5/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -25,16 +25,15 @@ add_library(T5Decoding STATIC T5Decoding.cc T5DecodingWeight.cc) set_property(TARGET T5Decoding PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET T5Decoding PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) target_link_libraries(T5Decoding PUBLIC -lcudart cublasMMWrapper T5Decoder bert_preprocess_kernels - decoding_kernels OnlineBeamSearchLayer BeamSearchLayer - TopKSamplingLayer TopPSamplingLayer TopKTopPSamplingLayer - gpt_kernels) + decoding_kernels DynamicDecodeLayer BaseBeamSearchLayer + beam_search_topk_kernels gpt_kernels) add_library(T5Encoder STATIC T5Encoder.cc T5EncoderWeight.cc T5EncoderLayerWeight.cc) set_property(TARGET T5Encoder PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET T5Encoder PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) target_link_libraries(T5Encoder PUBLIC -lcudart bert_preprocess_kernels cublasMMWrapper - TensorParallelUnfusedAttentionLayer FusedAttentionLayer TensorParallelReluFfnLayer TensorParallelGeluFfnLayer layernorm_kernels - add_residual_kernels nccl_utils) + TensorParallelUnfusedAttentionLayer FusedAttentionLayer TensorParallelReluFfnLayer + TensorParallelGeluFfnLayer layernorm_kernels add_residual_kernels nccl_utils) add_executable(t5_gemm t5_gemm.cc) target_link_libraries(t5_gemm PUBLIC -lcudart t5_gemm_func memory_utils) \ No newline at end of file diff --git a/src/fastertransformer/models/t5/T5Decoder.cc b/src/fastertransformer/models/t5/T5Decoder.cc index 2faefe590..73c22310c 100644 --- a/src/fastertransformer/models/t5/T5Decoder.cc +++ b/src/fastertransformer/models/t5/T5Decoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -21,44 +21,67 @@ namespace fastertransformer { template void T5Decoder::initialize() { - self_attention_layer_ = new TensorParallelDecoderSelfAttentionLayer( - max_batch_size_, - head_num_, - size_per_head_, - d_model_, - (1.0f / sqrtf((float)size_per_head_)), // make the scaling to be 1 - tensor_para_.world_size_, - tensor_para_.nccl_comm_, - stream_, - cublas_wrapper_, - allocator_, - is_free_buffer_after_forward_); - - cross_attention_layer_ = new TensorParallelDecoderCrossAttentionLayer( - max_batch_size_, - head_num_, - size_per_head_, - d_model_, - (1.0f / sqrtf((float)size_per_head_)), // make the scaling to be 1 - tensor_para_.world_size_, - tensor_para_.nccl_comm_, - stream_, - cublas_wrapper_, - allocator_, - is_free_buffer_after_forward_); - - ffn_layer_ = new TensorParallelReluFfnLayer(max_batch_size_, - 1, - 1, - d_model_, - inter_size_, - tensor_para_.world_size_, - tensor_para_.nccl_comm_, - stream_, - cublas_wrapper_, - allocator_, - is_free_buffer_after_forward_, - false); + self_attention_layer_ = + new TensorParallelDecoderSelfAttentionLayer(max_batch_size_, + head_num_, + size_per_head_, + d_model_, + q_scaling_, // adjust according to checkpoint structure + tensor_para_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + false, + 0, + custom_all_reduce_comm_, + enable_custom_all_reduce_); + // (1.0f/ sqrtf((float)size_per_head_)) + cross_attention_layer_ = + new TensorParallelDecoderCrossAttentionLayer(max_batch_size_, + head_num_, + size_per_head_, + d_model_, + q_scaling_, // adjust according to checkpoint structure + tensor_para_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + custom_all_reduce_comm_, + enable_custom_all_reduce_); + + if (activation_type_ == ActivationType::Gelu) { + ffn_layer_ = new TensorParallelGeluFfnLayer(max_batch_size_, + 1, + 1, + d_model_, + inter_size_, + tensor_para_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + false, + 0, + custom_all_reduce_comm_, + enable_custom_all_reduce_); + } + else { + ffn_layer_ = new TensorParallelReluFfnLayer(max_batch_size_, + 1, + 1, + d_model_, + inter_size_, + tensor_para_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + false, + custom_all_reduce_comm_, + enable_custom_all_reduce_); + } } template @@ -77,6 +100,25 @@ void T5Decoder::allocateBuffer() } } +template +void T5Decoder::allocateBuffer(size_t batch_size) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + decoder_normed_input_ = + reinterpret_cast(allocator_->reMalloc(decoder_normed_input_, sizeof(T) * batch_size * d_model_, false)); + self_attn_output_ = + reinterpret_cast(allocator_->reMalloc(self_attn_output_, sizeof(T) * batch_size * d_model_, false)); + normed_self_attn_output_ = + reinterpret_cast(allocator_->reMalloc(normed_self_attn_output_, sizeof(T) * batch_size * d_model_, false)); + cross_attn_output_ = + reinterpret_cast(allocator_->reMalloc(cross_attn_output_, sizeof(T) * batch_size * d_model_, false)); + normed_cross_attn_output_ = + reinterpret_cast(allocator_->reMalloc(normed_cross_attn_output_, sizeof(T) * batch_size * d_model_, false)); + decoder_layer_output_ = + reinterpret_cast(allocator_->reMalloc(decoder_layer_output_, sizeof(T) * batch_size * d_model_, false)); + is_allocate_buffer_ = true; +} + template void T5Decoder::freeBuffer() { @@ -116,7 +158,11 @@ T5Decoder::T5Decoder(size_t max_batch_size, IAllocator* allocator, bool is_free_buffer_after_forward, NcclParam tensor_para, - NcclParam pipeline_para): + NcclParam pipeline_para, + ActivationType activation_type, + float q_scaling, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), max_batch_size_(max_batch_size), head_num_(head_num), @@ -126,7 +172,11 @@ T5Decoder::T5Decoder(size_t max_batch_size, num_layer_(num_layer), hidden_units_(head_num_ * size_per_head), tensor_para_(tensor_para), - pipeline_para_(pipeline_para) + pipeline_para_(pipeline_para), + activation_type_(activation_type), + q_scaling_(q_scaling), + custom_all_reduce_comm_(custom_all_reduce_comm), + enable_custom_all_reduce_(enable_custom_all_reduce) { initialize(); } @@ -142,7 +192,11 @@ T5Decoder::T5Decoder(T5Decoder const& decoder): num_layer_(decoder.num_layer_), hidden_units_(decoder.hidden_units_), tensor_para_(decoder.tensor_para_), - pipeline_para_(decoder.pipeline_para_) + pipeline_para_(decoder.pipeline_para_), + activation_type_(decoder.activation_type_), + q_scaling_(decoder.q_scaling_), + custom_all_reduce_comm_(decoder.custom_all_reduce_comm_), + enable_custom_all_reduce_(decoder.enable_custom_all_reduce_) { initialize(); } @@ -156,6 +210,15 @@ T5Decoder::~T5Decoder() freeBuffer(); } +template +void T5Decoder::setStream(cudaStream_t stream) +{ + self_attention_layer_->setStream(stream); + cross_attention_layer_->setStream(stream); + ffn_layer_->setStream(stream); + BaseLayer::setStream(stream); +} + template bool T5Decoder::isValidLayerParallelId(uint l) { @@ -199,6 +262,9 @@ void T5Decoder::forward(std::vector* output_tensors, // sequence_lengths [local_batch_size] // relative_attention_bias [1, head_num, step, step] or [1, head_num, max_seq_len, max_seq_len] // ite [1] on cpu + // cache_indirection [local_batch_size / beam_width, beam_width, max_seq_len] + // Here, local_batch_size contains the beam_width, so local_batch_size / beam_width + // is real local_batch_size. // output tensors: // decoder_output [local_batch_size, d_model_], @@ -207,12 +273,12 @@ void T5Decoder::forward(std::vector* output_tensors, // key_mem_cache [num_layer / pipeline_para_.world_size_, batch_size, mem_max_seq_len, hidden_dimension], // value_mem_cache [num_layer / pipeline_para_.world_size_, batch_size, mem_max_seq_len, hidden_dimension] - FT_CHECK(input_tensors->size() == 8); + FT_CHECK(input_tensors->size() == 9); FT_CHECK(output_tensors->size() == 5); isValidBatchSize(input_tensors->at(0).shape[0]); - allocateBuffer(); - const size_t local_batch_size = input_tensors->at(0).shape[0]; + allocateBuffer(local_batch_size); + const size_t mem_max_seq_len = (size_t)input_tensors->at(1).shape[1]; const uint ite = *((uint*)(input_tensors->at(7).data)); const DataType data_type = getTensorType(); @@ -241,19 +307,19 @@ void T5Decoder::forward(std::vector* output_tensors, if (isFirstLayerParallelId(l) == true && pipeline_para_.rank_ != 0 && pipeline_para_.world_size_ > 1) { // ftNcclRecv(decoder_input, local_batch_size * d_model_, pipeline_para_.rank_ - 1, - // pipeline_para_.nccl_comm_, stream_); + // pipeline_para_, stream_); ftNcclRecv(decoder_input + local_batch_size * d_model_ / tensor_para_.world_size_ * tensor_para_.rank_, local_batch_size * d_model_ / tensor_para_.world_size_, pipeline_para_.rank_ - 1, - pipeline_para_.nccl_comm_, + pipeline_para_, stream_); if (tensor_para_.world_size_ > 1) { ftNcclAllGather(decoder_input, decoder_input, (int)local_batch_size * d_model_ / tensor_para_.world_size_, tensor_para_.rank_, - tensor_para_.nccl_comm_, + tensor_para_, stream_); } } @@ -281,6 +347,7 @@ void T5Decoder::forward(std::vector* output_tensors, invokeGeneralT5LayerNorm(decoder_normed_input_, decoder_input, decoder_layer_weight->at(l)->pre_layernorm_weights.gamma, + decoder_layer_weight->at(l)->pre_layernorm_weights.beta, local_batch_size, d_model_, stream_); @@ -294,6 +361,7 @@ void T5Decoder::forward(std::vector* output_tensors, Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size}, (T*)nullptr}, Tensor{MEMORY_CPU, TYPE_INT32, {1}, &tmp_0}, input_tensors->at(4), + input_tensors->at(8), input_tensors->at(6)}; std::vector self_attention_output_tensors{ Tensor{MEMORY_GPU, data_type, {local_batch_size, d_model_}, self_attn_output_}, @@ -301,15 +369,18 @@ void T5Decoder::forward(std::vector* output_tensors, Tensor{MEMORY_GPU, data_type, self_v_cache_shape, ((const T*)output_tensors->at(2).data) + cache_offset}}; self_attention_layer_->forward(&self_attention_output_tensors, &self_attention_input_tensors, - &decoder_layer_weight->at(l)->self_attention_weights); - - invokeGeneralAddResidualT5PreLayerNorm(self_attn_output_, - normed_self_attn_output_, - decoder_input, - decoder_layer_weight->at(l)->self_attn_layernorm_weights.gamma, - local_batch_size, - d_model_, - stream_); + &decoder_layer_weight->at(l)->self_attention_weights); // NOTEs + + invokeGeneralAddBiasResidualT5PreLayerNorm( + self_attn_output_, + normed_self_attn_output_, + decoder_input, + decoder_layer_weight->at(l)->self_attn_layernorm_weights.gamma, + decoder_layer_weight->at(l)->self_attn_layernorm_weights.beta, + decoder_layer_weight->at(l)->self_attention_weights.attention_output_weight.bias, + local_batch_size, + d_model_, + stream_); sync_check_cuda_error(); std::vector cross_attention_input_tensors{ @@ -326,13 +397,16 @@ void T5Decoder::forward(std::vector* output_tensors, &cross_attention_input_tensors, &decoder_layer_weight->at(l)->cross_attention_weights); - invokeGeneralAddResidualT5PreLayerNorm(cross_attn_output_, - normed_cross_attn_output_, - self_attn_output_, - decoder_layer_weight->at(l)->cross_attn_layernorm_weights.gamma, - local_batch_size, - d_model_, - stream_); + invokeGeneralAddBiasResidualT5PreLayerNorm( + cross_attn_output_, + normed_cross_attn_output_, + self_attn_output_, + decoder_layer_weight->at(l)->cross_attn_layernorm_weights.gamma, + decoder_layer_weight->at(l)->cross_attn_layernorm_weights.beta, + decoder_layer_weight->at(l)->cross_attention_weights.attention_output_weight.bias, + local_batch_size, + d_model_, + stream_); sync_check_cuda_error(); std::vector ffn_input_tensors{ @@ -341,18 +415,23 @@ void T5Decoder::forward(std::vector* output_tensors, Tensor{MEMORY_GPU, data_type, {local_batch_size, d_model_}, decoder_output}}; ffn_layer_->forward(&ffn_output_tensors, &ffn_input_tensors, &decoder_layer_weight->at(l)->ffn_weights); - invokeT5AddResidual(decoder_output, cross_attn_output_, local_batch_size, d_model_, stream_); + invokeT5AddBiasResidual(decoder_output, + cross_attn_output_, + decoder_layer_weight->at(l)->ffn_weights.output_weight.bias, + local_batch_size, + d_model_, + stream_); sync_check_cuda_error(); if (isLastLayerParallelId(l) == true && pipeline_para_.rank_ != pipeline_para_.world_size_ - 1 && pipeline_para_.world_size_ > 1) { // ftNcclSend(decoder_output, local_batch_size * d_model_, pipeline_para_.rank_ + 1, - // pipeline_para_.nccl_comm_, stream_); + // pipeline_para_, stream_); ftNcclSend(decoder_output + local_batch_size * d_model_ / tensor_para_.world_size_ * tensor_para_.rank_, local_batch_size * d_model_ / tensor_para_.world_size_, pipeline_para_.rank_ + 1, - pipeline_para_.nccl_comm_, + pipeline_para_, stream_); } } diff --git a/src/fastertransformer/models/t5/T5Decoder.h b/src/fastertransformer/models/t5/T5Decoder.h index 9582e7ba6..f86612cd1 100644 --- a/src/fastertransformer/models/t5/T5Decoder.h +++ b/src/fastertransformer/models/t5/T5Decoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -21,6 +21,7 @@ #include "src/fastertransformer/kernels/add_residual_kernels.h" #include "src/fastertransformer/kernels/layernorm_kernels.h" #include "src/fastertransformer/layers/BaseLayer.h" +#include "src/fastertransformer/layers/TensorParallelGeluFfnLayer.h" #include "src/fastertransformer/layers/TensorParallelReluFfnLayer.h" #include "src/fastertransformer/layers/attention_layers/TensorParallelDecoderCrossAttentionLayer.h" #include "src/fastertransformer/layers/attention_layers/TensorParallelDecoderSelfAttentionLayer.h" @@ -28,6 +29,7 @@ #include "src/fastertransformer/utils/Tensor.h" #include "src/fastertransformer/utils/allocator.h" #include "src/fastertransformer/utils/cublasMMWrapper.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" namespace fastertransformer { @@ -43,6 +45,8 @@ class T5Decoder: public BaseLayer { const size_t d_model_; const size_t num_layer_; const size_t hidden_units_; + const ActivationType activation_type_; + float q_scaling_; BaseAttentionLayer* self_attention_layer_; BaseAttentionLayer* cross_attention_layer_; @@ -51,24 +55,28 @@ class T5Decoder: public BaseLayer { void allocateBuffer() override; void freeBuffer() override; bool isValidBatchSize(size_t batch_size); + void allocateBuffer(size_t batch_size); void initialize(); NcclParam tensor_para_; NcclParam pipeline_para_; + std::shared_ptr custom_all_reduce_comm_; + int enable_custom_all_reduce_; + bool isValidLayerParallelId(uint l); bool isFirstLayerParallelId(uint l); bool isLastLayerParallelId(uint l); int getFirstLayerParallelId(); protected: - T* decoder_normed_input_; - T* self_attn_output_; - T* normed_self_attn_output_; - T* cross_attn_output_; - T* normed_cross_attn_output_; - T* decoder_layer_output_; + T* decoder_normed_input_ = nullptr; + T* self_attn_output_ = nullptr; + T* normed_self_attn_output_ = nullptr; + T* cross_attn_output_ = nullptr; + T* normed_cross_attn_output_ = nullptr; + T* decoder_layer_output_ = nullptr; public: T5Decoder(size_t max_batch_size, @@ -82,7 +90,11 @@ class T5Decoder: public BaseLayer { IAllocator* allocator, bool is_free_buffer_after_forward, NcclParam tensor_para, - NcclParam pipeline_para); + NcclParam pipeline_para, + ActivationType activation_type, + float q_scaling = 1.0f, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce = 0); T5Decoder(T5Decoder const& decoder); @@ -91,6 +103,7 @@ class T5Decoder: public BaseLayer { void forward(std::vector* output_tensors, const std::vector* input_tensors, const std::vector*>* decoder_layer_weights); + void setStream(cudaStream_t stream) override; }; } // namespace fastertransformer diff --git a/src/fastertransformer/models/t5/T5DecoderLayerWeight.cc b/src/fastertransformer/models/t5/T5DecoderLayerWeight.cc index e5d371bdc..85125ba1a 100644 --- a/src/fastertransformer/models/t5/T5DecoderLayerWeight.cc +++ b/src/fastertransformer/models/t5/T5DecoderLayerWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -15,6 +15,7 @@ */ #include "src/fastertransformer/models/t5/T5DecoderLayerWeight.h" +#include "src/fastertransformer/utils/cuda_utils.h" #include "src/fastertransformer/utils/logger.h" #include "src/fastertransformer/utils/memory_utils.h" @@ -27,14 +28,17 @@ T5DecoderLayerWeight::T5DecoderLayerWeight(const size_t head_num, const size_t inter_size, const size_t mem_d_model, const size_t tensor_para_size, - const size_t tensor_para_rank): + const size_t tensor_para_rank, + const bool t5_with_bias): head_num_(head_num), size_per_head_(size_per_head), d_model_(d_model), inter_size_(inter_size), mem_d_model_(mem_d_model), tensor_para_size_(tensor_para_size), - tensor_para_rank_(tensor_para_rank) + tensor_para_rank_(tensor_para_rank), + t5_with_bias_(t5_with_bias), + real_weights_num_(t5_with_bias ? 22 : 11) { FT_LOG_DEBUG("T5DecoderLayerWeight " + std::string(__func__) + " start"); @@ -62,6 +66,20 @@ void T5DecoderLayerWeight::initialize() weights_size[9] = d_model_ * (inter_size_ / tensor_para_size_); weights_size[10] = (inter_size_ / tensor_para_size_) * d_model_; + if (t5_with_bias_) { + weights_size[11] = d_model_; + weights_size[12] = 3 * (head_num_ / tensor_para_size_) * size_per_head_; + weights_size[13] = d_model_; + weights_size[14] = d_model_; + weights_size[15] = (head_num_ / tensor_para_size_) * size_per_head_; + weights_size[16] = (head_num_ / tensor_para_size_) * size_per_head_; + weights_size[17] = (head_num_ / tensor_para_size_) * size_per_head_; + weights_size[18] = d_model_; + weights_size[19] = d_model_; + weights_size[20] = (inter_size_ / tensor_para_size_); + weights_size[21] = d_model_; + } + FT_LOG_DEBUG("T5DecoderLayerWeight " + std::string(__func__) + " end"); } @@ -88,6 +106,22 @@ T5DecoderLayerWeight::~T5DecoderLayerWeight() ffn_weights.intermediate_weight.kernel = nullptr; ffn_weights.output_weight.kernel = nullptr; + + if (t5_with_bias_) { + pre_layernorm_weights.beta = nullptr; + self_attention_weights.query_weight.bias = nullptr; + self_attention_weights.attention_output_weight.bias = nullptr; + self_attn_layernorm_weights.beta = nullptr; + + cross_attention_weights.query_weight.bias = nullptr; + cross_attention_weights.key_weight.bias = nullptr; + cross_attention_weights.value_weight.bias = nullptr; + cross_attention_weights.attention_output_weight.bias = nullptr; + cross_attn_layernorm_weights.beta = nullptr; + + ffn_weights.intermediate_weight.bias = nullptr; + ffn_weights.output_weight.bias = nullptr; + } is_maintain_buffer = false; } @@ -102,12 +136,14 @@ T5DecoderLayerWeight::T5DecoderLayerWeight(const T5DecoderLayerWeight& other) inter_size_(other.inter_size_), mem_d_model_(other.mem_d_model_), tensor_para_size_(other.tensor_para_size_), - tensor_para_rank_(other.tensor_para_rank_) + tensor_para_rank_(other.tensor_para_rank_), + t5_with_bias_(other.t5_with_bias_), + real_weights_num_(other.real_weights_num_) { initialize(); mallocWeights(); - for (int i = 0; i < weights_num_; i++) { + for (int i = 0; i < real_weights_num_; i++) { cudaD2Dcpy(weights_ptr[i], other.weights_ptr[i], weights_size[i]); } setWeightPtr(); @@ -123,10 +159,12 @@ T5DecoderLayerWeight& T5DecoderLayerWeight::operator=(const T5DecoderLayer mem_d_model_ = other.mem_d_model_; tensor_para_size_ = other.tensor_para_size_; tensor_para_rank_ = other.tensor_para_rank_; + t5_with_bias_ = other.t5_with_bias_; + real_weights_num_ = other.real_weights_num_; initialize(); mallocWeights(); - for (int i = 0; i < weights_num_; i++) { + for (int i = 0; i < real_weights_num_; i++) { cudaD2Dcpy(weights_ptr[i], other.weights_ptr[i], weights_size[i]); } setWeightPtr(); @@ -150,54 +188,122 @@ void T5DecoderLayerWeight::setWeightPtr() ffn_weights.intermediate_weight.kernel = weights_ptr[9]; ffn_weights.output_weight.kernel = weights_ptr[10]; + + if (t5_with_bias_) { + pre_layernorm_weights.beta = weights_ptr[11]; + self_attention_weights.query_weight.bias = weights_ptr[12]; + self_attention_weights.attention_output_weight.bias = weights_ptr[13]; + self_attn_layernorm_weights.beta = weights_ptr[14]; + + cross_attention_weights.query_weight.bias = weights_ptr[15]; + cross_attention_weights.key_weight.bias = weights_ptr[16]; + cross_attention_weights.value_weight.bias = weights_ptr[17]; + cross_attention_weights.attention_output_weight.bias = weights_ptr[18]; + cross_attn_layernorm_weights.beta = weights_ptr[19]; + + ffn_weights.intermediate_weight.bias = weights_ptr[20]; + ffn_weights.output_weight.bias = weights_ptr[21]; + } } template void T5DecoderLayerWeight::mallocWeights() { - for (int i = 0; i < weights_num_; i++) { + for (int i = 0; i < real_weights_num_; i++) { deviceMalloc(&weights_ptr[i], weights_size[i]); } is_maintain_buffer = true; } template -void T5DecoderLayerWeight::loadModel(std::string dir_path) +void T5DecoderLayerWeight::loadModel(std::string dir_path, FtCudaDataType model_file_type) { FT_LOG_DEBUG("T5DecoderLayerWeight " + std::string(__func__) + " start"); FT_CHECK(is_maintain_buffer == true); - loadWeightFromBin(weights_ptr[0], {weights_size[0]}, dir_path + "layer.0.layer_norm.weight.bin"); + loadWeightFromBin( + weights_ptr[0], {(int)weights_size[0]}, dir_path + "layer.0.layer_norm.weight.bin", model_file_type); loadWeightFromBin(weights_ptr[1], - {weights_size[1]}, - dir_path + "layer.0.SelfAttention.qkv.weight." + std::to_string(tensor_para_rank_) + ".bin"); + {(int)weights_size[1]}, + dir_path + "layer.0.SelfAttention.qkv.weight." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); loadWeightFromBin(weights_ptr[2], - {weights_size[2]}, - dir_path + "layer.0.SelfAttention.o.weight." + std::to_string(tensor_para_rank_) + ".bin"); - loadWeightFromBin(weights_ptr[3], {weights_size[3]}, dir_path + "layer.1.layer_norm.weight.bin"); + {(int)weights_size[2]}, + dir_path + "layer.0.SelfAttention.o.weight." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); + loadWeightFromBin( + weights_ptr[3], {(int)weights_size[3]}, dir_path + "layer.1.layer_norm.weight.bin", model_file_type); loadWeightFromBin(weights_ptr[4], - {weights_size[4]}, - dir_path + "layer.1.EncDecAttention.q.weight." + std::to_string(tensor_para_rank_) + ".bin"); + {(int)weights_size[4]}, + dir_path + "layer.1.EncDecAttention.q.weight." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); loadWeightFromBin(weights_ptr[5], - {weights_size[5]}, - dir_path + "layer.1.EncDecAttention.k.weight." + std::to_string(tensor_para_rank_) + ".bin"); + {(int)weights_size[5]}, + dir_path + "layer.1.EncDecAttention.k.weight." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); loadWeightFromBin(weights_ptr[6], - {weights_size[6]}, - dir_path + "layer.1.EncDecAttention.v.weight." + std::to_string(tensor_para_rank_) + ".bin"); + {(int)weights_size[6]}, + dir_path + "layer.1.EncDecAttention.v.weight." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); loadWeightFromBin(weights_ptr[7], - {weights_size[7]}, - dir_path + "layer.1.EncDecAttention.o.weight." + std::to_string(tensor_para_rank_) + ".bin"); - loadWeightFromBin(weights_ptr[8], {weights_size[8]}, dir_path + "layer.2.layer_norm.weight.bin"); + {(int)weights_size[7]}, + dir_path + "layer.1.EncDecAttention.o.weight." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); + loadWeightFromBin( + weights_ptr[8], {(int)weights_size[8]}, dir_path + "layer.2.layer_norm.weight.bin", model_file_type); loadWeightFromBin(weights_ptr[9], - {weights_size[9]}, - dir_path + "layer.2.DenseReluDense.wi.weight." + std::to_string(tensor_para_rank_) + ".bin"); + {(int)weights_size[9]}, + dir_path + "layer.2.DenseReluDense.wi.weight." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); loadWeightFromBin(weights_ptr[10], - {weights_size[10]}, - dir_path + "layer.2.DenseReluDense.wo.weight." + std::to_string(tensor_para_rank_) + ".bin"); + {(int)weights_size[10]}, + dir_path + "layer.2.DenseReluDense.wo.weight." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); + + if (t5_with_bias_) { + loadWeightFromBin( + weights_ptr[11], {(int)weights_size[11]}, dir_path + "layer.0.layer_norm.bias.bin", model_file_type); + loadWeightFromBin(weights_ptr[12], + {(int)weights_size[12]}, + dir_path + "layer.0.SelfAttention.qkv.bias." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); + loadWeightFromBin( + weights_ptr[13], {(int)weights_size[13]}, dir_path + "layer.0.SelfAttention.o.bias.bin", model_file_type); + loadWeightFromBin( + weights_ptr[14], {(int)weights_size[14]}, dir_path + "layer.1.layer_norm.bias.bin", model_file_type); + loadWeightFromBin(weights_ptr[15], + {(int)weights_size[15]}, + dir_path + "layer.1.EncDecAttention.q.bias." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); + loadWeightFromBin(weights_ptr[16], + {(int)weights_size[16]}, + dir_path + "layer.1.EncDecAttention.k.bias." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); + loadWeightFromBin(weights_ptr[17], + {(int)weights_size[17]}, + dir_path + "layer.1.EncDecAttention.v.bias." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); + loadWeightFromBin( + weights_ptr[18], {(int)weights_size[18]}, dir_path + "layer.1.EncDecAttention.o.bias.bin", model_file_type); + loadWeightFromBin( + weights_ptr[19], {(int)weights_size[19]}, dir_path + "layer.2.layer_norm.bias.bin", model_file_type); + loadWeightFromBin(weights_ptr[20], + {(int)weights_size[20]}, + dir_path + "layer.2.DenseReluDense.wi.bias." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); + loadWeightFromBin( + weights_ptr[21], {(int)weights_size[21]}, dir_path + "layer.2.DenseReluDense.wo.bias.bin", model_file_type); + } FT_LOG_DEBUG("T5DecoderLayerWeight " + std::string(__func__) + " end"); } +template +void T5DecoderLayerWeight::setT5WithBias(bool t5_with_bias_para) +{ + t5_with_bias_ = t5_with_bias_para; +} + template struct T5DecoderLayerWeight; template struct T5DecoderLayerWeight; diff --git a/src/fastertransformer/models/t5/T5DecoderLayerWeight.h b/src/fastertransformer/models/t5/T5DecoderLayerWeight.h index 1b32915b5..2dc0cda96 100644 --- a/src/fastertransformer/models/t5/T5DecoderLayerWeight.h +++ b/src/fastertransformer/models/t5/T5DecoderLayerWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -19,6 +19,7 @@ #include "src/fastertransformer/kernels/layernorm_kernels.h" #include "src/fastertransformer/layers/FfnWeight.h" #include "src/fastertransformer/layers/attention_layers/AttentionWeight.h" +#include "src/fastertransformer/utils/cuda_utils.h" #include namespace fastertransformer { @@ -33,7 +34,8 @@ struct T5DecoderLayerWeight { const size_t inter_size, const size_t mem_d_model, const size_t tensor_para_size, - const size_t tensor_para_rank); + const size_t tensor_para_rank, + const bool t5_with_bias); ~T5DecoderLayerWeight(); T5DecoderLayerWeight(const T5DecoderLayerWeight& other); T5DecoderLayerWeight& operator=(const T5DecoderLayerWeight& other); @@ -44,8 +46,11 @@ struct T5DecoderLayerWeight { AttentionWeight cross_attention_weights; LayerNormWeight cross_attn_layernorm_weights; FfnWeight ffn_weights; + bool t5_with_bias_; - void loadModel(std::string dir_path); + void loadModel(std::string dir_path, FtCudaDataType model_file_type); + + void setT5WithBias(bool t5_with_bias_para); private: void setWeightPtr(); @@ -61,7 +66,9 @@ struct T5DecoderLayerWeight { size_t tensor_para_rank_; bool is_maintain_buffer = false; - const static int weights_num_ = 11; + int real_weights_num_; + + const static int weights_num_ = 22; T* weights_ptr[weights_num_]; size_t weights_size[weights_num_]; }; diff --git a/src/fastertransformer/models/t5/T5Decoding.cc b/src/fastertransformer/models/t5/T5Decoding.cc index 98cf2543f..c1ef9e721 100644 --- a/src/fastertransformer/models/t5/T5Decoding.cc +++ b/src/fastertransformer/models/t5/T5Decoding.cc @@ -1,6 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. - * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,21 +15,17 @@ */ #include "src/fastertransformer/models/t5/T5Decoding.h" +#include "src/fastertransformer/kernels/beam_search_topk_kernels.h" #include "src/fastertransformer/kernels/bert_preprocess_kernels.h" #include "src/fastertransformer/kernels/gpt_kernels.h" #include "src/fastertransformer/layers/beam_search_layers/BaseBeamSearchLayer.h" -#include "src/fastertransformer/layers/beam_search_layers/BeamSearchLayer.h" -#include "src/fastertransformer/layers/beam_search_layers/OnlineBeamSearchLayer.h" -#include "src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.h" -#include "src/fastertransformer/layers/sampling_layers/TopKTopPSamplingLayer.h" -#include "src/fastertransformer/layers/sampling_layers/TopPSamplingLayer.h" namespace fastertransformer { template void T5Decoding::initialize() { - decoder_ = new T5Decoder(max_batch_size_ * beam_width_, + decoder_ = new T5Decoder(0, // max_batch_size_ * beam_width_, head_num_, size_per_head_, inter_size_, @@ -41,162 +36,104 @@ void T5Decoding::initialize() allocator_, is_free_buffer_after_forward_, tensor_para_, - pipeline_para_); - - if (beam_width_ > 1) { - if (beam_width_ < 16) { - dynamic_decode_ = new OnlineBeamSearchLayer(max_batch_size_, - head_num_ / tensor_para_.world_size_, - size_per_head_, - beam_width_, - vocab_size_, - vocab_size_padded_, - end_id_, - beam_search_diversity_rate_, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - is_free_buffer_after_forward_); - } - else { - dynamic_decode_ = new BeamSearchLayer(max_batch_size_, - head_num_ / tensor_para_.world_size_, - size_per_head_, - beam_width_, - vocab_size_, - vocab_size_padded_, - end_id_, - beam_search_diversity_rate_, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - is_free_buffer_after_forward_); - } - } - else if (top_p_ == 0 && top_k_ != 0) { - // we sugguest set the is_free_buffer_after_forward_ of sampling to false - // since we need to initialize some buffers if we allocate buffer - // every time. - dynamic_decode_ = new TopKSamplingLayer(max_batch_size_, - vocab_size_, - vocab_size_padded_, - end_id_, - top_k_, - 0, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - false); - } - else if (top_k_ == 0 && top_p_ != 0.0f) { - // we sugguest set the is_free_buffer_after_forward_ of sampling to false - // since we need to initialize some buffers if we allocate buffer - // every time. - dynamic_decode_ = new TopPSamplingLayer(max_batch_size_, - vocab_size_, - vocab_size_padded_, - end_id_, - top_p_, - 0, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - false, - cuda_device_prop_); - } - else { - // we sugguest set the is_free_buffer_after_forward_ of sampling to false - // since we need to initialize some buffers if we allocate buffer - // every time. - dynamic_decode_ = new TopKTopPSamplingLayer(max_batch_size_, - vocab_size_, - vocab_size_padded_, - end_id_, - top_k_, - top_p_, - 0, - temperature_, - len_penalty_, - repetition_penalty_, - stream_, - cublas_wrapper_, - allocator_, - false); - } + pipeline_para_, + activation_type_, + q_scaling_, + custom_all_reduce_comm_, + enable_custom_all_reduce_); + + dynamic_decode_layer_ = new DynamicDecodeLayer(vocab_size_, + vocab_size_padded_, + 0, // end_id, deprecated + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + cuda_device_prop_); } template void T5Decoding::allocateBuffer() { - if (is_allocate_buffer_ == false) { - - const size_t batchxbeam = max_batch_size_ * beam_width_; - const size_t self_cache_size = (num_layer_ / pipeline_para_.world_size_) * batchxbeam * max_seq_len_ - * (hidden_units_ / tensor_para_.world_size_); - const size_t mem_cache_size = (num_layer_ / pipeline_para_.world_size_) * batchxbeam * mem_max_seq_len_ - * (hidden_units_ / tensor_para_.world_size_); - - // Assume the dimension of encoder output is d_model_ too. - if (beam_width_ > 1) { - tiled_encoder_output_ = (T*)(allocator_->malloc(sizeof(T) * batchxbeam * mem_max_seq_len_ * d_model_)); - tiled_encoder_sequence_length_ = (int*)(allocator_->malloc(sizeof(int) * batchxbeam)); - } - - if (vocab_size_ != vocab_size_padded_) { - padded_embedding_kernel_ = (T*)(allocator_->malloc(sizeof(T) * d_model_ * vocab_size_padded_, true)); - padded_embedding_kernel_ptr_ = padded_embedding_kernel_; - } - relative_attention_bias_ = (T*)(allocator_->malloc(sizeof(T) * head_num_ * max_seq_len_ * max_seq_len_, false)); - - decoder_input_buf_ = (T*)(allocator_->malloc(sizeof(T) * batchxbeam * d_model_, false)); - decoder_output_buf_ = (T*)(allocator_->malloc(sizeof(T) * batchxbeam * d_model_, false)); - normed_decoder_output_buf_ = (T*)(allocator_->malloc(sizeof(T) * batchxbeam * d_model_, false)); - logits_buf_ = (T*)(allocator_->malloc(sizeof(T) * batchxbeam * vocab_size_padded_, false)); - nccl_logits_buf_ = (T*)(allocator_->malloc(sizeof(T) * batchxbeam * vocab_size_padded_, false)); - cum_log_probs_ = (float*)(allocator_->malloc(sizeof(float) * batchxbeam, false)); - finished_buf_ = (bool*)(allocator_->malloc(sizeof(bool) * batchxbeam, false)); - h_finished_buf_ = new bool[batchxbeam]; - - key_caches_[0] = (T*)(allocator_->malloc(sizeof(T) * self_cache_size, false)); - value_caches_[0] = (T*)(allocator_->malloc(sizeof(T) * self_cache_size, false)); - if (beam_width_ > 1) { - key_caches_[1] = (T*)(allocator_->malloc(sizeof(T) * self_cache_size, false)); - value_caches_[1] = (T*)(allocator_->malloc(sizeof(T) * self_cache_size, false)); - } - key_mem_caches_ = (T*)(allocator_->malloc(sizeof(T) * mem_cache_size, false)); - value_mem_caches_ = (T*)(allocator_->malloc(sizeof(T) * mem_cache_size, false)); - - output_ids_buf_ = (int*)(allocator_->malloc(sizeof(int) * batchxbeam * max_seq_len_, false)); - parent_ids_buf_ = (int*)(allocator_->malloc(sizeof(int) * batchxbeam * max_seq_len_, false)); + FT_CHECK(false); +} - is_allocate_buffer_ = true; +template +void T5Decoding::allocateBuffer( + size_t batch_size, size_t beam_width, size_t max_seq_len, size_t max_mem_seq_len, size_t encoder_d_model) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + // Note: To put the start_ids, we use max_seq_len + 1 for ouptut_ids_buf_ + // And to consistent to the output_ids_buf_, some related buffers are also + // use max_seq_len + 1, but not max_seq_len. + // This only affects the buffer size, not affect the performance. + + const size_t batchxbeam = batch_size * beam_width; + const size_t self_cache_size = (num_layer_ / pipeline_para_.world_size_) * batchxbeam * (max_seq_len + 1) + * (hidden_units_ / tensor_para_.world_size_); + const size_t mem_cache_size = (num_layer_ / pipeline_para_.world_size_) * batchxbeam * max_mem_seq_len + * (hidden_units_ / tensor_para_.world_size_); + + if (vocab_size_ != vocab_size_padded_) { + padded_embedding_kernel_ = + (T*)(allocator_->reMalloc(padded_embedding_kernel_, sizeof(T) * d_model_ * vocab_size_padded_, true)); + padded_embedding_kernel_ptr_ = padded_embedding_kernel_; + + padded_post_decoder_embedding_bias_ = + (T*)(allocator_->reMalloc(padded_post_decoder_embedding_bias_, sizeof(T) * vocab_size_padded_, true)); + padded_post_decoder_embedding_bias_ptr_ = padded_post_decoder_embedding_bias_; + } + relative_attention_bias_ = (T*)(allocator_->reMalloc( + relative_attention_bias_, sizeof(T) * head_num_ * (max_seq_len + 1) * (max_seq_len + 1), false)); + + decoder_input_buf_ = (T*)(allocator_->reMalloc(decoder_input_buf_, sizeof(T) * batchxbeam * d_model_, false)); + decoder_output_buf_ = (T*)(allocator_->reMalloc(decoder_output_buf_, sizeof(T) * batchxbeam * d_model_, false)); + normed_decoder_output_buf_ = + (T*)(allocator_->reMalloc(normed_decoder_output_buf_, sizeof(T) * batchxbeam * d_model_, false)); + logits_buf_ = (T*)(allocator_->reMalloc(logits_buf_, sizeof(T) * batchxbeam * vocab_size_padded_, false)); + nccl_logits_buf_ = (T*)(allocator_->reMalloc(nccl_logits_buf_, sizeof(T) * batchxbeam * vocab_size_padded_, false)); + cum_log_probs_ = (float*)(allocator_->reMalloc(cum_log_probs_, sizeof(float) * batchxbeam, false)); + finished_buf_ = (bool*)(allocator_->reMalloc(finished_buf_, sizeof(bool) * batchxbeam, false)); + h_finished_buf_ = (bool*)realloc(h_finished_buf_, sizeof(bool) * batchxbeam); + + key_cache_ = (T*)(allocator_->reMalloc(key_cache_, sizeof(T) * (2 * self_cache_size + 2 * mem_cache_size), false)); + value_cache_ = key_cache_ + self_cache_size; + key_mem_cache_ = value_cache_ + self_cache_size; + value_mem_cache_ = key_mem_cache_ + mem_cache_size; + if (beam_width > 1) { + cache_indirections_[0] = (int*)(allocator_->reMalloc( + cache_indirections_[0], sizeof(int) * batchxbeam * (max_seq_len + 1) * 2, true)); + cache_indirections_[1] = cache_indirections_[0] + batchxbeam * (max_seq_len + 1); } + tiled_encoder_output_ = (T*)(allocator_->reMalloc( + tiled_encoder_output_, sizeof(T) * batchxbeam * max_mem_seq_len * encoder_d_model, false)); + tiled_encoder_sequence_length_ = + (int*)(allocator_->reMalloc(tiled_encoder_sequence_length_, sizeof(int) * batchxbeam, false)); + + start_ids_buf_ = (int*)(allocator_->reMalloc(start_ids_buf_, sizeof(int) * batch_size, false)); + end_ids_buf_ = (int*)(allocator_->reMalloc(end_ids_buf_, sizeof(int) * batch_size, false)); + + output_ids_buf_ = + (int*)(allocator_->reMalloc(output_ids_buf_, sizeof(int) * batchxbeam * (max_seq_len + 1), false)); + parent_ids_buf_ = + (int*)(allocator_->reMalloc(parent_ids_buf_, sizeof(int) * batchxbeam * (max_seq_len + 1), false)); + output_ids_transpose_buf_ = + (int*)(allocator_->reMalloc(output_ids_transpose_buf_, sizeof(int) * batchxbeam * max_seq_len, false)); + output_log_probs_buf_ = + (float*)(allocator_->reMalloc(output_log_probs_buf_, sizeof(float) * batchxbeam * max_seq_len, false)); + is_allocate_buffer_ = true; } template void T5Decoding::freeBuffer() { - if (is_allocate_buffer_ == true) { + if (is_allocate_buffer_) { if (vocab_size_ != vocab_size_padded_) { padded_embedding_kernel_ptr_ = nullptr; allocator_->free(padded_embedding_kernel_); - } - if (beam_width_ > 1) { - allocator_->free(tiled_encoder_output_); - allocator_->free(tiled_encoder_sequence_length_); + padded_post_decoder_embedding_bias_ptr_ = nullptr; + allocator_->free(padded_post_decoder_embedding_bias_); } allocator_->free(relative_attention_bias_); @@ -208,61 +145,30 @@ void T5Decoding::freeBuffer() allocator_->free(nccl_logits_buf_); allocator_->free(cum_log_probs_); allocator_->free(finished_buf_); - delete[] h_finished_buf_; + free(h_finished_buf_); - allocator_->free(key_caches_[0]); - allocator_->free(value_caches_[0]); - if (beam_width_ > 1) { - allocator_->free(key_caches_[1]); - allocator_->free(value_caches_[1]); + allocator_->free(key_cache_); + if (cache_indirections_[0] != nullptr) { + allocator_->free(cache_indirections_[0]); } - allocator_->free(key_mem_caches_); - allocator_->free(value_mem_caches_); + + allocator_->free(start_ids_buf_); + allocator_->free(end_ids_buf_); allocator_->free(output_ids_buf_); allocator_->free(parent_ids_buf_); - + allocator_->free(output_ids_transpose_buf_); + allocator_->free(output_log_probs_buf_); is_allocate_buffer_ = false; } } template -bool T5Decoding::isValidBatchSize(size_t batch_size) +void T5Decoding::setStream(cudaStream_t stream) { - if (batch_size <= max_batch_size_) { - return true; - } - else { - freeBuffer(); - max_batch_size_ = batch_size * 1.2; - return true; - } -} - -template -bool T5Decoding::isValidSeqLen(size_t seq_len) -{ - if ((seq_len + 1) <= max_seq_len_) { - return true; - } - else { - freeBuffer(); - max_seq_len_ = (seq_len + 1) * 1.2; - return true; - } -} - -template -bool T5Decoding::isValidMemSeqLen(size_t seq_len) -{ - if (seq_len <= mem_max_seq_len_) { - return true; - } - else { - freeBuffer(); - mem_max_seq_len_ = seq_len * 1.2; - return true; - } + decoder_->setStream(stream); + dynamic_decode_layer_->setStream(stream); + BaseLayer::setStream(stream); } template @@ -278,6 +184,7 @@ T5Decoding::T5Decoding(size_t max_batch_size, size_t vocab_size, size_t num_bucket, size_t max_distance, + float q_scaling, int start_id, int end_id, float beam_search_diversity_rate, @@ -292,12 +199,11 @@ T5Decoding::T5Decoding(size_t max_batch_size, bool is_free_buffer_after_forward, cudaDeviceProp* cuda_device_prop, NcclParam tensor_para, - NcclParam pipeline_para): + NcclParam pipeline_para, + ActivationType activation_type, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward, cuda_device_prop), - max_batch_size_(max_batch_size), - max_seq_len_(max_seq_len + 1), // allocater additional one to put the start token - mem_max_seq_len_(mem_max_seq_len), - beam_width_(beam_width), head_num_(head_num), size_per_head_(size_per_head), inter_size_(inter_size), @@ -306,6 +212,7 @@ T5Decoding::T5Decoding(size_t max_batch_size, vocab_size_(vocab_size), num_bucket_(num_bucket), max_distance_(max_distance), + q_scaling_(q_scaling), start_id_(start_id), end_id_(end_id), beam_search_diversity_rate_(beam_search_diversity_rate), @@ -316,23 +223,22 @@ T5Decoding::T5Decoding(size_t max_batch_size, len_penalty_(len_penalty), repetition_penalty_(repetition_penalty), tensor_para_(tensor_para), - pipeline_para_(pipeline_para) + pipeline_para_(pipeline_para), + activation_type_(activation_type), + custom_all_reduce_comm_(custom_all_reduce_comm), + enable_custom_all_reduce_(enable_custom_all_reduce) { - vocab_size_padded_ = ((size_t)ceil(vocab_size_ / 1. / tensor_para_.world_size_) * tensor_para_.world_size_); + int local_vacab_size = ceil(vocab_size_ / 1.f / tensor_para_.world_size_); if (std::is_same::value) { - vocab_size_padded_ = ((size_t)ceil(vocab_size_padded_ / 8.) * 8); + local_vacab_size = ceil(local_vacab_size / 8.f) * 8; } - + vocab_size_padded_ = (size_t)local_vacab_size * tensor_para_.world_size_; initialize(); } template T5Decoding::T5Decoding(T5Decoding const& decoding): BaseLayer(decoding), - max_batch_size_(decoding.max_batch_size_), - max_seq_len_(decoding.max_seq_len_), - mem_max_seq_len_(decoding.mem_max_seq_len_), - beam_width_(decoding.beam_width_), head_num_(decoding.head_num_), size_per_head_(decoding.size_per_head_), inter_size_(decoding.inter_size_), @@ -341,6 +247,7 @@ T5Decoding::T5Decoding(T5Decoding const& decoding): vocab_size_(decoding.vocab_size_), num_bucket_(decoding.num_bucket_), max_distance_(decoding.max_distance_), + q_scaling_(decoding.q_scaling_), start_id_(decoding.start_id_), end_id_(decoding.end_id_), beam_search_diversity_rate_(decoding.beam_search_diversity_rate_), @@ -352,7 +259,10 @@ T5Decoding::T5Decoding(T5Decoding const& decoding): repetition_penalty_(decoding.repetition_penalty_), vocab_size_padded_(decoding.vocab_size_padded_), tensor_para_(decoding.tensor_para_), - pipeline_para_(decoding.pipeline_para_) + pipeline_para_(decoding.pipeline_para_), + activation_type_(decoding.activation_type_), + custom_all_reduce_comm_(decoding.custom_all_reduce_comm_), + enable_custom_all_reduce_(decoding.enable_custom_all_reduce_) { initialize(); } @@ -361,7 +271,7 @@ template T5Decoding::~T5Decoding() { delete decoder_; - delete dynamic_decode_; + delete dynamic_decode_layer_; freeBuffer(); } @@ -376,39 +286,141 @@ void T5Decoding::forward(std::vector* output_tensors, // output_tensors: // output_ids [batch_size, beam, max_seq_len] - // parent_ids [batch_size, beam, max_seq_len] // sequence_length [batch_size, beam], record the number of generated token, except the start token // Step is from 1 ~ max_seq_len, // When step = k, we put output ids and caches at step k, and the sequence_length would be k - 1 before // complete this step. - FT_CHECK(input_tensors->size() == 2); - FT_CHECK(output_tensors->size() == 3); - FT_CHECK(input_tensors->at(0).shape.size() == 3); - isValidSeqLen(output_tensors->at(0).shape[2]); - isValidBatchSize(output_tensors->at(0).shape[0]); - isValidMemSeqLen(input_tensors->at(0).shape[1]); - allocateBuffer(); + std::unordered_map input_tensors_map{{"encoder_output", input_tensors->at(0)}, + {"encoder_sequence_length", input_tensors->at(1)}}; + + std::unordered_map output_tensors_map{{"output_ids", output_tensors->at(0)}, + {"sequence_length", output_tensors->at(1)}}; + forward(&output_tensors_map, &input_tensors_map, decoding_weights); +} + +template +bool T5Decoding::hasDiffRuntimeArgs(const std::unordered_map* input_tensors) +{ + // runtime_top_k [1] or [batch_size] on cpu, optional. + // runtime_top_p [1] or [batch_size] on cpu, optional + // beam_search_diversity_rate [1] or [batch_size] on cpu, optional + // temperature [1] or [batch_size] on cpu, optional + // len_penalty [1] or [batch_size] on cpu, optional + // repetition_penalty [1] or [batch_size] on cpu, optional + // random_seed [1] or [batch_size] on cpu, optional + + std::vector check_list = {"runtime_top_k", + "runtime_top_p", + "beam_search_diversity_rate", + "temperature", + "len_penalty", + "repetition_penalty", + "random_seed"}; + + for (int i = 0; i < check_list.size(); i++) { + if (input_tensors->count(check_list[i])) { + auto tensor = input_tensors->at(check_list[i]); + if (tensor.shape.size() > 1) { + FT_CHECK(tensor.shape[1] == 1); + for (int i = 1; i < tensor.shape[0]; i++) { + const void* data = tensor.data; + switch (tensor.type) { + case TYPE_FP32: + if (((const float*)data)[0] != ((const float*)data)[i]) { + return true; + } + break; + case TYPE_INT32: + if (((const int*)data)[0] != ((const int*)data)[i]) { + return true; + } + break; + case TYPE_UINT32: + if (((const uint*)data)[0] != ((const uint*)data)[i]) { + return true; + } + break; + case TYPE_UINT64: + if (((const unsigned long long int*)data)[0] != ((const unsigned long long int*)data)[i]) { + return true; + } + break; + default: + FT_CHECK(false); + break; + } + } + } + } + } + return false; +} + +template +void T5Decoding::forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors, + const T5DecodingWeight* decoding_weights) +{ + // input_tensors: + // encoder_output [batch_size, mem_max_seq_len, memory_hidden_dimension] + // encoder_sequence_length [batch_size] + // stop_words_list [batch_size, 2, stop_words_length], optional + // start_id [batch_size] on cpu, optional + // end_id [batch_size] on cpu, optional + // runtime_top_k [1] or [batch_size] on cpu, optional. + // runtime_top_p [1] or [batch_size] on cpu, optional + // beam_search_diversity_rate [1] or [batch_size] on cpu, optional + // temperature [1] or [batch_size] on cpu, optional + // len_penalty [1] or [batch_size] on cpu, optional + // repetition_penalty [1] or [batch_size] on cpu, optional + // random_seed [1] or [batch_size] on cpu, optional + + // output_tensors: + // output_ids [batch_size, beam, max_seq_len] + // sequence_length [batch_size, beam], record the number of generated token, except the start token + // output_log_probs [batch_size, beam, max_seq_len], optional, must be float*. + // cum_log_probs [batch_size, beam], optional, must be float*. + + // Step is from 1 ~ max_seq_len, + // When step = k, we put output ids and caches at step k, and the sequence_length would be k - 1 before + // complete this step. + + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + FT_CHECK(input_tensors->size() >= 2); + FT_CHECK(output_tensors->size() >= 2); + FT_CHECK(input_tensors->at("encoder_output").shape.size() == 3); + const size_t batch_size = output_tensors->at("output_ids").shape[0]; + const size_t beam_width = output_tensors->at("output_ids").shape[1]; + const size_t max_seq_len = output_tensors->at("output_ids").shape[2]; + const size_t mem_max_seq_len = input_tensors->at("encoder_output").shape[1]; + allocateBuffer(batch_size, beam_width, max_seq_len, mem_max_seq_len, input_tensors->at("encoder_output").shape[2]); + + bool has_diff_runtime_args = hasDiffRuntimeArgs(input_tensors); - FT_CHECK(input_tensors->at(0).shape[2] == d_model_); + handleOptArg(input_tensors, "start_id", start_ids_buf_, start_id_, batch_size); + handleOptArg(input_tensors, "end_id", end_ids_buf_, end_id_, batch_size); - const size_t batch_size = output_tensors->at(0).shape[0]; - const int max_input_length = 0; + FT_CHECK(input_tensors->at("encoder_output").shape[2] == d_model_); + + const int max_input_length = 1; const DataType data_type = getTensorType(); - const size_t mem_max_seq_len = input_tensors->at(0).shape[1]; - int* sequence_lengths = (int*)output_tensors->at(2).data; + int* sequence_lengths = (int*)output_tensors->at("sequence_length").data; - cudaMemset((int*)output_tensors->at(0).data, 0, sizeof(int) * batch_size * beam_width_ * (max_seq_len_ - 1)); - cudaMemset((int*)output_tensors->at(1).data, 0, sizeof(int) * batch_size * beam_width_ * (max_seq_len_ - 1)); + cudaMemset((int*)output_tensors->at("output_ids").data, 0, sizeof(int) * batch_size * beam_width * max_seq_len); + if (beam_width > 1) { + cudaMemsetAsync( + cache_indirections_[0], 0, 2 * sizeof(int) * batch_size * beam_width * (max_seq_len + 1), stream_); + } - if (beam_width_ > 1) { + if (beam_width > 1) { invokeTileEncoderResults(tiled_encoder_output_, tiled_encoder_sequence_length_, - (const T*)(input_tensors->at(0).data), - (const int*)(input_tensors->at(1).data), + (const T*)(input_tensors->at("encoder_output").data), + (const int*)(input_tensors->at("encoder_sequence_length").data), batch_size, - beam_width_, + beam_width, mem_max_seq_len, d_model_, stream_); @@ -417,32 +429,35 @@ void T5Decoding::forward(std::vector* output_tensors, encoder_sequence_length_ptr_ = tiled_encoder_sequence_length_; } else { - encoder_output_ptr_ = (const T*)(input_tensors->at(0).data); - encoder_sequence_length_ptr_ = (const int*)(input_tensors->at(1).data); + encoder_output_ptr_ = (const T*)(input_tensors->at("encoder_output").data); + encoder_sequence_length_ptr_ = (const int*)(input_tensors->at("encoder_sequence_length").data); } invokeDecodingInitialize(finished_buf_, sequence_lengths, output_ids_buf_, cum_log_probs_, - start_id_, + start_ids_buf_, batch_size, - beam_width_, - max_input_length, + beam_width, + max_input_length - 1, stream_); sync_check_cuda_error(); + invokeBuildRelativeAttentionBias(relative_attention_bias_, - decoding_weights->relative_attention_bias, + decoding_weights->absolute_or_relative_position_embedding, head_num_, - max_seq_len_, + (max_seq_len + 1), num_bucket_, false, max_distance_, + decoding_weights->position_embedding_type, stream_); sync_check_cuda_error(); if (vocab_size_ == vocab_size_padded_) { padded_embedding_kernel_ptr_ = decoding_weights->post_decoder_embedding.kernel; + padded_post_decoder_embedding_bias_ptr_ = decoding_weights->post_decoder_embedding.bias; } else { invokePaddingEmbeddingKernel(padded_embedding_kernel_, @@ -452,59 +467,53 @@ void T5Decoding::forward(std::vector* output_tensors, vocab_size_padded_, stream_); sync_check_cuda_error(); + FT_CHECK(decoding_weights->post_decoder_embedding.bias != nullptr); + cudaD2Dcpy(padded_post_decoder_embedding_bias_, decoding_weights->post_decoder_embedding.bias, vocab_size_); } const std::vector self_k_cache_shape = {num_layer_ / pipeline_para_.world_size_, - batch_size * beam_width_, + batch_size * beam_width, head_num_ / tensor_para_.world_size_, size_per_head_ / (16 / sizeof(T)), - max_seq_len_, + max_seq_len + 1, 16 / sizeof(T)}; const std::vector self_v_cache_shape = {num_layer_ / pipeline_para_.world_size_, - batch_size * beam_width_, + batch_size * beam_width, head_num_ / tensor_para_.world_size_, - (size_t)(max_seq_len_), + (size_t)(max_seq_len + 1), size_per_head_}; const std::vector mem_cache_shape = {num_layer_ / pipeline_para_.world_size_, - batch_size * beam_width_, + batch_size * beam_width, mem_max_seq_len, head_num_ / tensor_para_.world_size_ * size_per_head_}; - for (int step = 1; step <= (int)max_seq_len_; step++) { - // cudaD2Hcpy(h_finished_buf_, finished_buf_, batch_size * beam_width_); - // uint sum = 0; - // for (uint i = 0; i < batch_size * beam_width_; i++) { - // sum += (int)h_finished_buf_[i]; - // } - // if (sum == batch_size * beam_width_) { - // break; - // } - - const int src_cache_id = beam_width_ > 1 ? (step - 1) & 0x1 : 0; - const int tgt_cache_id = 1 - src_cache_id; - - const size_t local_batch_size = getLocalBatchSize(batch_size, 1, pipeline_para_.world_size_); - // const size_t local_batch_size = batch_size / 2; - FT_CHECK(batch_size % local_batch_size == 0); - const size_t iteration_num = batch_size / local_batch_size; + const size_t local_batch_size = getLocalBatchSize(batch_size, 1, pipeline_para_.world_size_); + FT_CHECK(batch_size % local_batch_size == 0); + const size_t iteration_num = batch_size / local_batch_size; + for (int step = max_input_length; step <= (int)max_seq_len; step++) { + const int src_indir_idx = beam_width > 1 ? (step - 1) & 0x1 : 0; + const int tgt_indir_idx = 1 - src_indir_idx; for (uint ite = 0; ite < iteration_num; ++ite) { - const int id_offset = ite * local_batch_size * beam_width_; + const int id_offset = ite * local_batch_size * beam_width; const int d_model_offset = id_offset * d_model_; const int vocab_size_units_offset = id_offset * vocab_size_padded_; if (pipeline_para_.rank_ == 0) { invokeEmbeddingLookupPosEncoding(decoder_input_buf_ + d_model_offset, decoding_weights->pre_decoder_embedding_table, - (T*)nullptr, + decoding_weights->position_embedding_type + == PositionEmbeddingType::relative ? + (T*)nullptr : + decoding_weights->absolute_or_relative_position_embedding, output_ids_buf_ + id_offset, nullptr, - local_batch_size * beam_width_, + local_batch_size * beam_width, d_model_, (T)1.0f, step - 1, 0, - batch_size * beam_width_, + batch_size * beam_width, 0, stream_); sync_check_cuda_error(); @@ -513,37 +522,53 @@ void T5Decoding::forward(std::vector* output_tensors, std::vector decoder_input_tensors{ Tensor{MEMORY_GPU, data_type, - {local_batch_size * beam_width_, d_model_}, + {local_batch_size * beam_width, d_model_}, decoder_input_buf_ + d_model_offset}, Tensor{MEMORY_GPU, data_type, - {local_batch_size * beam_width_, input_tensors->at(0).shape[1], input_tensors->at(0).shape[2]}, - encoder_output_ptr_ + id_offset * input_tensors->at(0).shape[1] * input_tensors->at(0).shape[2]}, + {local_batch_size * beam_width, + input_tensors->at("encoder_output").shape[1], + input_tensors->at("encoder_output").shape[2]}, + encoder_output_ptr_ + + id_offset * input_tensors->at("encoder_output").shape[1] + * input_tensors->at("encoder_output").shape[2]}, Tensor{ - MEMORY_GPU, TYPE_INT32, {local_batch_size * beam_width_}, encoder_sequence_length_ptr_ + id_offset}, - Tensor{MEMORY_GPU, TYPE_BOOL, {local_batch_size * beam_width_}, finished_buf_ + id_offset}, + MEMORY_GPU, TYPE_INT32, {local_batch_size * beam_width}, encoder_sequence_length_ptr_ + id_offset}, + Tensor{MEMORY_GPU, TYPE_BOOL, {local_batch_size * beam_width}, finished_buf_ + id_offset}, Tensor{MEMORY_CPU, TYPE_INT32, {1}, &step}, - Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size * beam_width_}, sequence_lengths + id_offset}, - Tensor{MEMORY_GPU, data_type, {1, head_num_, max_seq_len_, max_seq_len_}, relative_attention_bias_}, - Tensor{MEMORY_CPU, TYPE_UINT32, {1}, &ite}}; + Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size * beam_width}, sequence_lengths + id_offset}, + Tensor{MEMORY_GPU, + data_type, + {1, head_num_, max_seq_len + 1, max_seq_len + 1}, + decoding_weights->position_embedding_type == PositionEmbeddingType::relative ? + relative_attention_bias_ : + nullptr}, + Tensor{MEMORY_CPU, TYPE_UINT32, {1}, &ite}, + Tensor{MEMORY_GPU, + TYPE_INT32, + {local_batch_size, beam_width, max_seq_len + 1}, + beam_width > 1 ? cache_indirections_[src_indir_idx] + id_offset * (max_seq_len + 1) : nullptr}}; std::vector decoder_output_tensors{ Tensor{MEMORY_GPU, data_type, - {local_batch_size * beam_width_, d_model_}, + {local_batch_size * beam_width, d_model_}, decoder_output_buf_ + d_model_offset}, - Tensor{MEMORY_GPU, data_type, self_k_cache_shape, key_caches_[src_cache_id]}, - Tensor{MEMORY_GPU, data_type, self_v_cache_shape, value_caches_[src_cache_id]}, - Tensor{MEMORY_GPU, data_type, mem_cache_shape, key_mem_caches_}, - Tensor{MEMORY_GPU, data_type, mem_cache_shape, value_mem_caches_}}; + Tensor{MEMORY_GPU, data_type, self_k_cache_shape, key_cache_}, + Tensor{MEMORY_GPU, data_type, self_v_cache_shape, value_cache_}, + Tensor{MEMORY_GPU, data_type, mem_cache_shape, key_mem_cache_}, + Tensor{MEMORY_GPU, data_type, mem_cache_shape, value_mem_cache_}}; decoder_->forward( &decoder_output_tensors, &decoder_input_tensors, &decoding_weights->decoder_layer_weights); + bool t5_with_bias = decoding_weights->t5_with_bias; + if (pipeline_para_.rank_ == pipeline_para_.world_size_ - 1) { invokeGeneralT5LayerNorm(normed_decoder_output_buf_ + d_model_offset, decoder_output_buf_ + d_model_offset, decoding_weights->post_decoder_layernorm.gamma, - local_batch_size * beam_width_, + decoding_weights->post_decoder_layernorm.beta, + local_batch_size * beam_width, d_model_, stream_); sync_check_cuda_error(); @@ -552,7 +577,7 @@ void T5Decoding::forward(std::vector* output_tensors, cublas_wrapper_->Gemm(CUBLAS_OP_T, CUBLAS_OP_N, vocab_size_padded_, // n - local_batch_size * beam_width_, + local_batch_size * beam_width, d_model_, // k padded_embedding_kernel_ptr_, d_model_, // k @@ -560,7 +585,7 @@ void T5Decoding::forward(std::vector* output_tensors, d_model_, // k logits_buf_ + vocab_size_units_offset, vocab_size_padded_ /* n */, - 1.0f / sqrt(d_model_), + t5_with_bias ? 1.0f : 1.0f / sqrt(d_model_), 0.0f); } else { @@ -568,7 +593,7 @@ void T5Decoding::forward(std::vector* output_tensors, cublas_wrapper_->Gemm(CUBLAS_OP_T, CUBLAS_OP_N, local_vocab_size, // n - local_batch_size * beam_width_, + local_batch_size * beam_width, d_model_, // k padded_embedding_kernel_ptr_ + tensor_para_.rank_ * local_vocab_size * d_model_, @@ -576,102 +601,121 @@ void T5Decoding::forward(std::vector* output_tensors, normed_decoder_output_buf_ + d_model_offset, d_model_, // k nccl_logits_buf_ + vocab_size_units_offset - + tensor_para_.rank_ * local_batch_size * beam_width_ * local_vocab_size, + + tensor_para_.rank_ * local_batch_size * beam_width * local_vocab_size, local_vocab_size /* n */, - 1.0f / sqrt(d_model_), + t5_with_bias ? 1.0f : 1.0f / sqrt(d_model_), 0.0f); ftNcclAllGather(nccl_logits_buf_ + vocab_size_units_offset, nccl_logits_buf_ + vocab_size_units_offset, - local_batch_size * beam_width_ * local_vocab_size, + local_batch_size * beam_width * local_vocab_size, tensor_para_.rank_, - tensor_para_.nccl_comm_, + tensor_para_, stream_); check_cuda_error(cudaStreamSynchronize(stream_)); invokeTransposeAxis01(logits_buf_ + vocab_size_units_offset, nccl_logits_buf_ + vocab_size_units_offset, tensor_para_.world_size_, - local_batch_size * beam_width_, + local_batch_size * beam_width, local_vocab_size, stream_); } - std::vector* dynamic_decode_input_tensors; - std::vector* dynamic_decode_output_tensors; - - if (beam_width_ > 1) { - dynamic_decode_input_tensors = new std::vector{ - Tensor{MEMORY_GPU, - data_type, - {local_batch_size, beam_width_, vocab_size_padded_}, - logits_buf_ + vocab_size_units_offset}, - Tensor{MEMORY_GPU, data_type, {vocab_size_padded_}, nullptr}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &step}, - Tensor{MEMORY_GPU, data_type, self_k_cache_shape, key_caches_[src_cache_id]}, - Tensor{MEMORY_GPU, data_type, self_v_cache_shape, value_caches_[src_cache_id]}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &max_input_length}, - Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size, beam_width_}, nullptr}, - Tensor{MEMORY_CPU, TYPE_UINT32, {1}, &ite}}; - - dynamic_decode_output_tensors = new std::vector{ - Tensor{MEMORY_GPU, TYPE_INT32, {max_seq_len_, batch_size, beam_width_}, output_ids_buf_}, - Tensor{MEMORY_GPU, TYPE_BOOL, {local_batch_size * beam_width_}, finished_buf_ + id_offset}, - Tensor{MEMORY_GPU, TYPE_FP32, {local_batch_size * beam_width_}, cum_log_probs_ + id_offset}, - Tensor{MEMORY_GPU, TYPE_INT32, {max_seq_len_, batch_size, beam_width_}, parent_ids_buf_}, - Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size * beam_width_}, sequence_lengths + id_offset}, - Tensor{MEMORY_GPU, data_type, self_k_cache_shape, key_caches_[tgt_cache_id]}, - Tensor{MEMORY_GPU, data_type, self_v_cache_shape, value_caches_[tgt_cache_id]}}; + if (t5_with_bias) { + invokeAddBias(logits_buf_ + vocab_size_units_offset, + padded_post_decoder_embedding_bias_ptr_, + local_batch_size * beam_width, + vocab_size_padded_, + stream_); } - else { - dynamic_decode_input_tensors = new std::vector{ - Tensor{MEMORY_GPU, - data_type, - {local_batch_size, beam_width_, vocab_size_padded_}, - logits_buf_ + vocab_size_units_offset}, - Tensor{MEMORY_GPU, data_type, {vocab_size_padded_}, nullptr}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &step}, - Tensor{MEMORY_CPU, TYPE_INT32, {1}, &max_input_length}, - Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size, beam_width_}, nullptr}, - Tensor{MEMORY_CPU, TYPE_UINT32, {1}, &ite}}; - - dynamic_decode_output_tensors = new std::vector{ - Tensor{MEMORY_GPU, TYPE_INT32, {max_seq_len_, batch_size, beam_width_}, output_ids_buf_}, - Tensor{MEMORY_GPU, TYPE_BOOL, {local_batch_size * beam_width_}, finished_buf_ + id_offset}, - Tensor{MEMORY_GPU, TYPE_INT32, {local_batch_size * beam_width_}, sequence_lengths + id_offset}, - Tensor{MEMORY_GPU, TYPE_FP32, {max_seq_len_, batch_size, beam_width_}, nullptr}}; + + int tmp_local_batch_size = local_batch_size; + bool is_initialize_random_table = step == 1; + std::unordered_map dynamic_decode_input_tensors{ + {"logits", + Tensor{MEMORY_GPU, data_type, {batch_size, beam_width, vocab_size_padded_}, logits_buf_}}, + {"embedding_bias", Tensor{MEMORY_GPU, data_type, {vocab_size_padded_}, nullptr}}, + {"step", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &step}}, + {"max_input_length", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &max_input_length}}, + {"input_lengths", Tensor{MEMORY_GPU, TYPE_INT32, {batch_size, beam_width}, nullptr}}, + {"ite", Tensor{MEMORY_CPU, TYPE_UINT32, {1}, &ite}}, + {"end_id", Tensor{MEMORY_GPU, TYPE_INT32, {batch_size}, end_ids_buf_}}, + {"has_diff_runtime_args", Tensor{MEMORY_CPU, TYPE_BOOL, {1}, &has_diff_runtime_args}}, + {"src_key_cache", Tensor{MEMORY_GPU, data_type, self_k_cache_shape, key_cache_}}, + {"src_value_cache", Tensor{MEMORY_GPU, data_type, self_v_cache_shape, value_cache_}}, + {"src_cache_indirection", + Tensor{MEMORY_GPU, + TYPE_INT32, + {local_batch_size, beam_width, (max_seq_len + 1)}, + cache_indirections_[src_indir_idx] + id_offset * (max_seq_len + 1)}}, + {"local_batch_size", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &tmp_local_batch_size}}, + {"is_initialize_random_table", Tensor{MEMORY_CPU, TYPE_BOOL, {1}, &is_initialize_random_table}}}; + + for (auto t = input_tensors->begin(); t != input_tensors->end(); ++t) { + if (dynamic_decode_input_tensors.find(t->first) == dynamic_decode_input_tensors.end()) { + dynamic_decode_input_tensors.insert(*t); + } } - dynamic_decode_->forward(dynamic_decode_output_tensors, dynamic_decode_input_tensors); + // common outputs + std::unordered_map dynamic_decode_output_tensors{ + {"output_ids", + Tensor{MEMORY_GPU, TYPE_INT32, {(max_seq_len + 1), batch_size, beam_width}, output_ids_buf_}}, + {"finished", Tensor{MEMORY_GPU, TYPE_BOOL, {batch_size * beam_width}, finished_buf_}}, + // cum_log_probs is necessary for beam search, while it is optional for sampling. + {"cum_log_probs", + Tensor{MEMORY_GPU, + TYPE_FP32, + {batch_size * beam_width}, + ((beam_width > 1) || (output_tensors->count("cum_log_probs") > 0)) ? cum_log_probs_ : + nullptr}}, + {"output_log_probs", + Tensor{MEMORY_GPU, + TYPE_FP32, + {(max_seq_len + 1), batch_size, beam_width}, + output_tensors->count("output_log_probs") > 0 + && output_tensors->at("output_log_probs").data != nullptr ? + output_log_probs_buf_ : + nullptr}}, + {"parent_ids", + Tensor{MEMORY_GPU, TYPE_INT32, {(max_seq_len + 1), batch_size, beam_width}, parent_ids_buf_}}, + {"sequence_length", Tensor{MEMORY_GPU, TYPE_INT32, {batch_size * beam_width}, sequence_lengths}}, + {"tgt_cache_indirection", + Tensor{MEMORY_GPU, + TYPE_INT32, + {local_batch_size, beam_width, (max_seq_len + 1)}, + cache_indirections_[tgt_indir_idx] + id_offset * (max_seq_len + 1)}}}; + + for (auto t = output_tensors->begin(); t != output_tensors->end(); ++t) { + // Handle exceptions. + if (t->first == "cum_log_probs" || t->first == "output_log_probs") { + continue; + } + dynamic_decode_output_tensors.insert(*t); + } - delete dynamic_decode_input_tensors; - delete dynamic_decode_output_tensors; + dynamic_decode_layer_->forward(&dynamic_decode_output_tensors, &dynamic_decode_input_tensors); } } if (pipeline_para_.world_size_ > 1) { NCCLCHECK(ncclGroupStart()); - ftNcclBroadCast(output_ids_buf_ + step * batch_size * beam_width_, - batch_size * beam_width_, + ftNcclBroadCast(output_ids_buf_ + step * batch_size * beam_width, + batch_size * beam_width, pipeline_para_.world_size_ - 1, - pipeline_para_.nccl_comm_, + pipeline_para_, stream_); - ftNcclBroadCast(sequence_lengths, - batch_size * beam_width_, - pipeline_para_.world_size_ - 1, - pipeline_para_.nccl_comm_, - stream_); + ftNcclBroadCast( + sequence_lengths, batch_size * beam_width, pipeline_para_.world_size_ - 1, pipeline_para_, stream_); - ftNcclBroadCast(finished_buf_, - batch_size * beam_width_, - pipeline_para_.world_size_ - 1, - pipeline_para_.nccl_comm_, - stream_); + ftNcclBroadCast( + finished_buf_, batch_size * beam_width, pipeline_para_.world_size_ - 1, pipeline_para_, stream_); - if (beam_width_ > 1) { - ftNcclBroadCast(parent_ids_buf_ + step * batch_size * beam_width_, - batch_size * beam_width_, + if (beam_width > 1) { + ftNcclBroadCast(cache_indirections_[tgt_indir_idx], + batch_size * beam_width * (max_seq_len + 1), pipeline_para_.world_size_ - 1, - pipeline_para_.nccl_comm_, + pipeline_para_, stream_); } NCCLCHECK(ncclGroupEnd()); @@ -679,79 +723,136 @@ void T5Decoding::forward(std::vector* output_tensors, sync_check_cuda_error(); } - if (pipeline_para_.rank_ != pipeline_para_.world_size_ - 1 && beam_width_ > 1) { - // update kv cache of other pipeline_para_rank since they don't - // enter the beam search - update_KV_cache_kernelLauncher(key_caches_[tgt_cache_id], - value_caches_[tgt_cache_id], - key_caches_[src_cache_id], - value_caches_[src_cache_id], - parent_ids_buf_ + step * batch_size * beam_width_, - finished_buf_, - batch_size, - batch_size, - beam_width_, - head_num_ / tensor_para_.world_size_, - size_per_head_, - step, - max_seq_len_, - batch_size * beam_width_ * head_num_ / tensor_para_.world_size_ - * size_per_head_ * max_seq_len_, - num_layer_ / pipeline_para_.world_size_, - 0, - stream_); - sync_check_cuda_error(); - } - - cudaD2Hcpy(h_finished_buf_, finished_buf_, batch_size * beam_width_); + cudaD2Hcpy(h_finished_buf_, finished_buf_, batch_size * beam_width); uint sum = 0; - for (uint i = 0; i < batch_size * beam_width_; i++) { + for (uint i = 0; i < batch_size * beam_width; i++) { sum += (int)h_finished_buf_[i]; } - if (sum == batch_size * beam_width_) { + if (sum == batch_size * beam_width) { break; } } - // minus the sequence length of unfinished sentence by 1 since we start from 1. - invokeMinusUnfinishedSeqlen(sequence_lengths, finished_buf_, batch_size * beam_width_, stream_); - - if (beam_width_ > 1) { - // For beam search, do gather_tree - invokeGatherTree((int*)output_tensors->at(1).data, - (int*)output_tensors->at(2).data, - max_seq_len_ - 1, - batch_size, - beam_width_, - output_ids_buf_ + batch_size * beam_width_, - parent_ids_buf_ + batch_size * beam_width_, - end_id_, - stream_); - - // transpose and take output_parent_ids as inter buffer - invokeTransposeAxis01((int*)output_tensors->at(0).data, - (int*)output_tensors->at(1).data, - max_seq_len_ - 1, - batch_size * beam_width_, - 1, - stream_); - - cudaD2Dcpy((int*)output_tensors->at(1).data, - parent_ids_buf_ + batch_size * beam_width_, - batch_size * beam_width_ * (max_seq_len_ - 1)); + if (pipeline_para_.rank_ == pipeline_para_.world_size_ - 1) { + if (beam_width > 1) { + // For beam search, do gather_tree + invokeGatherTree(output_ids_transpose_buf_, + (int*)output_tensors->at("sequence_length").data, + max_seq_len, + batch_size, + beam_width, + output_ids_buf_ + batch_size * beam_width, + parent_ids_buf_ + batch_size * beam_width, + end_ids_buf_, + stream_); + + // transpose and take output_parent_ids as inter buffer + invokeTransposeAxis01((int*)output_tensors->at("output_ids").data, + output_ids_transpose_buf_, + max_seq_len, + batch_size * beam_width, + 1, + stream_); + } + else { + // For sampling, only transpose the results to output_tensor + invokeTransposeAxis01((int*)output_tensors->at("output_ids").data, + output_ids_buf_ + batch_size * beam_width, + max_seq_len, + batch_size * beam_width, + 1, + stream_); + } + if (output_tensors->find("output_log_probs") != output_tensors->end()) { + invokeTransposeAxis01(output_tensors->at("output_log_probs").getPtr(), + output_log_probs_buf_, + max_seq_len, + batch_size * beam_width, + 1, + stream_); + } + + // Return the cumulative log probability if requested. + if (output_tensors->count("cum_log_probs") > 0) { + Tensor cum_log_probs = output_tensors->at("cum_log_probs"); + FT_CHECK_WITH_INFO(cum_log_probs.size() == batch_size * beam_width, + "The shape of cum_log_probs does not match with batch_size x beam_width."); + cudaD2Dcpy(cum_log_probs.getPtr(), cum_log_probs_, batch_size * beam_width); + } } - else { - // For sampling, only transpose the results to output_tensor - invokeTransposeAxis01((int*)output_tensors->at(0).data, - output_ids_buf_ + batch_size * beam_width_, - max_seq_len_ - 1, - batch_size * beam_width_, - 1, - stream_); + + if (pipeline_para_.world_size_ > 1) { + NCCLCHECK(ncclGroupStart()); + if (pipeline_para_.rank_ == pipeline_para_.world_size_ - 1) { + ftNcclSend(output_tensors->at("output_ids").getPtr(), + batch_size * beam_width * max_seq_len, + 0, + pipeline_para_, + stream_); + + ftNcclSend(output_tensors->at("sequence_length").getPtr(), + batch_size * beam_width, + 0, + pipeline_para_, + stream_); + + if (output_tensors->count("cum_log_probs") > 0 && output_tensors->at("cum_log_probs").data != nullptr) { + ftNcclSend(output_tensors->at("cum_log_probs").getPtr(), + batch_size * beam_width, + 0, + pipeline_para_, + stream_); + } + + if (output_tensors->count("output_log_probs") > 0 + && output_tensors->at("output_log_probs").data != nullptr) { + ftNcclSend(output_tensors->at("output_log_probs").getPtr(), + batch_size * beam_width * max_seq_len, + 0, + pipeline_para_, + stream_); + } + } + else if (pipeline_para_.rank_ == 0) { + ftNcclRecv(output_tensors->at("output_ids").getPtr(), + batch_size * beam_width * max_seq_len, + pipeline_para_.world_size_ - 1, + pipeline_para_, + stream_); + + ftNcclRecv(output_tensors->at("sequence_length").getPtr(), + batch_size * beam_width, + pipeline_para_.world_size_ - 1, + pipeline_para_, + stream_); + + if (output_tensors->count("cum_log_probs") > 0 && output_tensors->at("cum_log_probs").data != nullptr) { + ftNcclRecv(output_tensors->at("cum_log_probs").getPtr(), + batch_size * beam_width, + pipeline_para_.world_size_ - 1, + pipeline_para_, + stream_); + } + + if (output_tensors->count("output_log_probs") > 0 + && output_tensors->at("output_log_probs").data != nullptr) { + ftNcclRecv(output_tensors->at("output_log_probs").getPtr(), + batch_size * beam_width * max_seq_len, + pipeline_para_.world_size_ - 1, + pipeline_para_, + stream_); + } + } + NCCLCHECK(ncclGroupEnd()); + check_cuda_error(cudaStreamSynchronize(stream_)); + } + + if (is_free_buffer_after_forward_) { + freeBuffer(); } } template class T5Decoding; template class T5Decoding; -} // namespace fastertransformer \ No newline at end of file +} // namespace fastertransformer diff --git a/src/fastertransformer/models/t5/T5Decoding.h b/src/fastertransformer/models/t5/T5Decoding.h index 7a99a9112..99ebc22b8 100644 --- a/src/fastertransformer/models/t5/T5Decoding.h +++ b/src/fastertransformer/models/t5/T5Decoding.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -20,21 +20,17 @@ #include #include "src/fastertransformer/kernels/decoding_kernels.h" -#include "src/fastertransformer/layers/DynamicDecodeBaseLayer.h" +#include "src/fastertransformer/layers/DynamicDecodeLayer.h" #include "src/fastertransformer/models/t5/T5Decoder.h" #include "src/fastertransformer/models/t5/T5DecodingWeight.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" namespace fastertransformer { template class T5Decoding: public BaseLayer { private: - // buffer handling - size_t max_batch_size_ = 0; - size_t max_seq_len_ = 0; - size_t mem_max_seq_len_ = 0; // meta data - const size_t beam_width_; const size_t head_num_; const size_t size_per_head_; const size_t inter_size_; @@ -43,9 +39,13 @@ class T5Decoding: public BaseLayer { const size_t vocab_size_; const size_t num_bucket_; const size_t max_distance_; + const ActivationType activation_type_; + float q_scaling_; const int start_id_; const int end_id_; + + // TODO(bhsueh) remove const float beam_search_diversity_rate_; const size_t hidden_units_; const size_t top_k_; @@ -58,46 +58,57 @@ class T5Decoding: public BaseLayer { size_t vocab_size_padded_; T5Decoder* decoder_; - DynamicDecodeBaseLayer* dynamic_decode_; + DynamicDecodeLayer* dynamic_decode_layer_; void allocateBuffer() override; void freeBuffer() override; - bool isValidBatchSize(size_t batch_size); - bool isValidSeqLen(size_t seq_len); - bool isValidMemSeqLen(size_t seq_len); + void allocateBuffer( + size_t batch_size, size_t beam_width, size_t max_seq_len, size_t max_mem_seq_len, size_t encoder_d_model); void initialize(); + bool hasDiffRuntimeArgs(const std::unordered_map* input_tensors); NcclParam tensor_para_; NcclParam pipeline_para_; -protected: - T* padded_embedding_kernel_; - const T* padded_embedding_kernel_ptr_; - T* relative_attention_bias_; - - T* decoder_input_buf_; - T* decoder_output_buf_; - T* normed_decoder_output_buf_; - T* logits_buf_; - T* nccl_logits_buf_; - float* cum_log_probs_; - bool* finished_buf_; - bool* h_finished_buf_; - - T* key_caches_[2]; // ping-pong buffer - T* value_caches_[2]; // ping-pong buffer - T* key_mem_caches_; - T* value_mem_caches_; - - int* output_ids_buf_; - int* parent_ids_buf_; + std::shared_ptr custom_all_reduce_comm_; + int enable_custom_all_reduce_; - T* tiled_encoder_output_; - int* tiled_encoder_sequence_length_; - - const T* encoder_output_ptr_; - const int* encoder_sequence_length_ptr_; +protected: + T* padded_embedding_kernel_ = nullptr; + const T* padded_embedding_kernel_ptr_ = nullptr; + T* padded_post_decoder_embedding_bias_ = nullptr; + const T* padded_post_decoder_embedding_bias_ptr_ = nullptr; + T* relative_attention_bias_ = nullptr; + + T* decoder_input_buf_ = nullptr; + T* decoder_output_buf_ = nullptr; + T* normed_decoder_output_buf_ = nullptr; + T* logits_buf_ = nullptr; + T* nccl_logits_buf_ = nullptr; + float* cum_log_probs_ = nullptr; + bool* finished_buf_ = nullptr; + bool* h_finished_buf_ = nullptr; + + int* start_ids_buf_ = nullptr; + int* end_ids_buf_ = nullptr; + + T* key_cache_ = nullptr; + T* value_cache_ = nullptr; + T* key_mem_cache_ = nullptr; + T* value_mem_cache_ = nullptr; + int* cache_indirections_[2] = {nullptr, nullptr}; + + int* output_ids_buf_ = nullptr; + int* parent_ids_buf_ = nullptr; + int* output_ids_transpose_buf_ = nullptr; + float* output_log_probs_buf_ = nullptr; + + T* tiled_encoder_output_ = nullptr; + int* tiled_encoder_sequence_length_ = nullptr; + + const T* encoder_output_ptr_ = nullptr; + const int* encoder_sequence_length_ptr_ = nullptr; public: T5Decoding(size_t max_batch_size, @@ -112,6 +123,7 @@ class T5Decoding: public BaseLayer { size_t vocab_size, size_t num_bucket, size_t max_distance, + float q_scaling, int start_id, int end_id, float beam_search_diversity_rate, @@ -126,7 +138,10 @@ class T5Decoding: public BaseLayer { bool is_free_buffer_after_forward, cudaDeviceProp* cuda_device_prop, NcclParam tensor_para, - NcclParam pipeline_para); + NcclParam pipeline_para, + ActivationType activation_type = ActivationType::Relu, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce = 0); T5Decoding(T5Decoding const& T5Decoding); @@ -136,10 +151,11 @@ class T5Decoding: public BaseLayer { const std::vector* input_tensors, const T5DecodingWeight* Decoding_weights); - inline size_t getMaxSeqLen() - { - return max_seq_len_ - 1; - } + void forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors, + const T5DecodingWeight* Decoding_weights); + + void setStream(cudaStream_t stream) override; }; } // namespace fastertransformer diff --git a/src/fastertransformer/models/t5/T5DecodingWeight.cc b/src/fastertransformer/models/t5/T5DecodingWeight.cc index e7bde7072..1749583b7 100644 --- a/src/fastertransformer/models/t5/T5DecodingWeight.cc +++ b/src/fastertransformer/models/t5/T5DecodingWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -27,11 +27,13 @@ T5DecodingWeight::T5DecodingWeight(const size_t head_num, const size_t vocab_size, const size_t num_layer, const size_t mem_d_model, - const size_t num_bucket, + const size_t num_bucket_or_max_seq_len, const size_t tensor_para_size, const size_t tensor_para_rank, const size_t pipeline_para_size, - const size_t pipeline_para_rank): + const size_t pipeline_para_rank, + const bool t5_with_bias_para, + const PositionEmbeddingType pe_type): head_num_(head_num), size_per_head_(size_per_head), d_model_(d_model), @@ -39,11 +41,14 @@ T5DecodingWeight::T5DecodingWeight(const size_t head_num, vocab_size_(vocab_size), num_layer_(num_layer), mem_d_model_(mem_d_model), - num_bucket_(num_bucket), + num_bucket_or_max_seq_len_(num_bucket_or_max_seq_len), tensor_para_size_(tensor_para_size), tensor_para_rank_(tensor_para_rank), pipeline_para_size_(pipeline_para_size), - pipeline_para_rank_(pipeline_para_rank) + pipeline_para_rank_(pipeline_para_rank), + t5_with_bias(t5_with_bias_para), + position_embedding_type(pe_type), + real_weights_num_(t5_with_bias ? 6 : 4) { FT_LOG_DEBUG("T5DecodingWeight " + std::string(__func__) + " start"); initialize(); @@ -59,7 +64,8 @@ T5DecodingWeight::T5DecodingWeight(const size_t head_num, inter_size_, mem_d_model_, tensor_para_size_, - tensor_para_rank_)); + tensor_para_rank_, + t5_with_bias)); } else { decoder_layer_weights.push_back(new T5DecoderLayerWeight()); @@ -73,9 +79,16 @@ void T5DecodingWeight::initialize() { FT_LOG_DEBUG("T5DecodingWeight " + std::string(__func__) + " start"); weights_size[0] = d_model_ * vocab_size_; - weights_size[1] = (head_num_ / tensor_para_size_) * num_bucket_; + if (position_embedding_type == PositionEmbeddingType::absolute) { + weights_size[1] = num_bucket_or_max_seq_len_ * d_model_; + } + else { + weights_size[1] = (head_num_ / tensor_para_size_) * num_bucket_or_max_seq_len_; + } weights_size[2] = d_model_; weights_size[3] = d_model_ * vocab_size_; + weights_size[4] = d_model_; + weights_size[5] = vocab_size_; FT_LOG_DEBUG("T5DecodingWeight " + std::string(__func__) + " end"); } @@ -85,14 +98,16 @@ T5DecodingWeight::~T5DecodingWeight() FT_LOG_DEBUG("T5DecodingWeight " + std::string(__func__) + " start"); if (is_maintain_buffer == true) { decoder_layer_weights.clear(); - for (int i = 0; i < weights_num_; i++) { + for (int i = 0; i < real_weights_num_; i++) { deviceFree(weights_ptr[i]); } pre_decoder_embedding_table = nullptr; - relative_attention_bias = nullptr; + absolute_or_relative_position_embedding = nullptr; post_decoder_layernorm.gamma = nullptr; post_decoder_embedding.kernel = nullptr; + post_decoder_embedding.bias = nullptr; + post_decoder_layernorm.beta = nullptr; is_maintain_buffer = false; } FT_LOG_DEBUG("T5DecodingWeight " + std::string(__func__) + " end"); @@ -107,16 +122,19 @@ T5DecodingWeight::T5DecodingWeight(const T5DecodingWeight& other): vocab_size_(other.vocab_size_), num_layer_(other.num_layer_), mem_d_model_(other.mem_d_model_), - num_bucket_(other.num_bucket_), + num_bucket_or_max_seq_len_(other.num_bucket_or_max_seq_len_), tensor_para_size_(other.tensor_para_size_), tensor_para_rank_(other.tensor_para_rank_), pipeline_para_size_(other.pipeline_para_size_), - pipeline_para_rank_(other.pipeline_para_rank_) + pipeline_para_rank_(other.pipeline_para_rank_), + t5_with_bias(other.t5_with_bias), + position_embedding_type(other.position_embedding_type), + real_weights_num_(other.real_weights_num_) { FT_LOG_DEBUG("T5DecodingWeight " + std::string(__func__) + " start"); initialize(); mallocWeights(); - for (int i = 0; i < weights_num_; i++) { + for (int i = 0; i < real_weights_num_; i++) { cudaD2Dcpy(weights_ptr[i], other.weights_ptr[i], weights_size[i]); } setWeightPtr(); @@ -138,16 +156,19 @@ T5DecodingWeight& T5DecodingWeight::operator=(const T5DecodingWeight& othe vocab_size_ = other.vocab_size_; num_layer_ = other.num_layer_; mem_d_model_ = other.mem_d_model_; - num_bucket_ = other.num_bucket_; + num_bucket_or_max_seq_len_ = other.num_bucket_or_max_seq_len_; tensor_para_size_ = other.tensor_para_size_; tensor_para_rank_ = other.tensor_para_rank_; pipeline_para_size_ = other.pipeline_para_size_; pipeline_para_rank_ = other.pipeline_para_rank_; + t5_with_bias = other.t5_with_bias; + position_embedding_type = other.position_embedding_type; + real_weights_num_ = other.real_weights_num_; FT_LOG_DEBUG("T5DecodingWeight " + std::string(__func__) + " start"); initialize(); mallocWeights(); - for (int i = 0; i < weights_num_; i++) { + for (int i = 0; i < real_weights_num_; i++) { cudaD2Dcpy(weights_ptr[i], other.weights_ptr[i], weights_size[i]); } setWeightPtr(); @@ -164,7 +185,7 @@ template void T5DecodingWeight::mallocWeights() { FT_LOG_DEBUG("T5DecodingWeight " + std::string(__func__) + " start"); - for (int i = 0; i < weights_num_; i++) { + for (int i = 0; i < real_weights_num_; i++) { deviceMalloc(&weights_ptr[i], weights_size[i]); } is_maintain_buffer = true; @@ -175,9 +196,13 @@ template void T5DecodingWeight::setWeightPtr() { pre_decoder_embedding_table = weights_ptr[0]; - relative_attention_bias = weights_ptr[1]; + absolute_or_relative_position_embedding = weights_ptr[1]; post_decoder_layernorm.gamma = weights_ptr[2]; post_decoder_embedding.kernel = weights_ptr[3]; + if (t5_with_bias) { + post_decoder_layernorm.beta = weights_ptr[4]; + post_decoder_embedding.bias = weights_ptr[5]; + } } template @@ -185,18 +210,32 @@ void T5DecodingWeight::loadModel(std::string dir_path) { FT_LOG_DEBUG("T5DecodingWeight " + std::string(__func__) + " start"); FT_CHECK(is_maintain_buffer == true); + FtCudaDataType model_file_type = getModelFileType(dir_path + "/config.ini", "decoder"); + + loadWeightFromBin(weights_ptr[0], {(int)weights_size[0]}, dir_path + "/shared.weight_T.bin", model_file_type); + if (position_embedding_type == PositionEmbeddingType::absolute) { + loadWeightFromBin(weights_ptr[1], {(int)weights_size[1]}, dir_path + "/shared.ape.bin", model_file_type); + } + else { + loadWeightFromBin(weights_ptr[1], + {(int)weights_size[1]}, + dir_path + "/decoder.block.0.layer.0.SelfAttention.relative_attention_bias.weight." + + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); + } + loadWeightFromBin( + weights_ptr[2], {(int)weights_size[2]}, dir_path + "/decoder.final_layer_norm.weight.bin", model_file_type); + loadWeightFromBin(weights_ptr[3], {(int)weights_size[3]}, dir_path + "/shared.weight_T.bin", model_file_type); - loadWeightFromBin(weights_ptr[0], {weights_size[0]}, dir_path + "/shared.weight_T.bin"); - loadWeightFromBin(weights_ptr[1], - {weights_size[1]}, - dir_path + "/decoder.block.0.layer.0.SelfAttention.relative_attention_bias.weight." - + std::to_string(tensor_para_rank_) + ".bin"); - loadWeightFromBin(weights_ptr[2], {weights_size[2]}, dir_path + "/decoder.final_layer_norm.weight.bin"); - loadWeightFromBin(weights_ptr[3], {weights_size[3]}, dir_path + "/shared.weight_T.bin"); + if (t5_with_bias) { + loadWeightFromBin(weights_ptr[4], {weights_size[4]}, dir_path + "/decoder.final_layer_norm.bias.bin"); + loadWeightFromBin(weights_ptr[5], {weights_size[5]}, dir_path + "/shared.bias.bin"); + } for (int l = 0; l < num_layer_; l++) { if (isValidLayerParallelId(l)) { - decoder_layer_weights[l]->loadModel(dir_path + "/decoder.block." + std::to_string(l) + "."); + decoder_layer_weights[l]->loadModel(dir_path + "/decoder.block." + std::to_string(l) + ".", + model_file_type); } } FT_LOG_DEBUG("T5DecodingWeight " + std::string(__func__) + " end"); @@ -223,6 +262,16 @@ void T5DecodingWeight::resizeLayer(const int num_layer) FT_LOG_DEBUG("T5DecodingWeight " + std::string(__func__) + " end"); } +template +void T5DecodingWeight::setT5StructureDiff(bool t5_with_bias_para, PositionEmbeddingType position_embedding_type_para) +{ + t5_with_bias = t5_with_bias_para; + position_embedding_type = position_embedding_type_para; + for (int i = 0; i < num_layer_; i++) { + decoder_layer_weights[i]->setT5WithBias(t5_with_bias_para); + } +} + template struct T5DecodingWeight; template struct T5DecodingWeight; diff --git a/src/fastertransformer/models/t5/T5DecodingWeight.h b/src/fastertransformer/models/t5/T5DecodingWeight.h index b708f7a10..4d237031e 100644 --- a/src/fastertransformer/models/t5/T5DecodingWeight.h +++ b/src/fastertransformer/models/t5/T5DecodingWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,8 +16,10 @@ #pragma once +#include "src/fastertransformer/kernels/gen_relative_pos_bias.h" #include "src/fastertransformer/kernels/layernorm_kernels.h" #include "src/fastertransformer/models/t5/T5DecoderLayerWeight.h" +#include "src/fastertransformer/utils/cuda_utils.h" #include "src/fastertransformer/utils/memory_utils.h" namespace fastertransformer { @@ -33,24 +35,31 @@ struct T5DecodingWeight { const size_t vocab_size, const size_t num_layer, const size_t mem_d_model, - const size_t num_bucket, + const size_t num_bucket_or_max_seq_len, const size_t tensor_para_size, const size_t tensor_para_rank, const size_t pipeline_para_size, - const size_t pipeline_para_rank); + const size_t pipeline_para_rank, + const bool t5_with_bias_para = false, + const PositionEmbeddingType position_embedding_type_para = PositionEmbeddingType::relative); ~T5DecodingWeight(); T5DecodingWeight(const T5DecodingWeight& other); T5DecodingWeight& operator=(const T5DecodingWeight& other); std::vector*> decoder_layer_weights; const T* pre_decoder_embedding_table = nullptr; - const T* relative_attention_bias = nullptr; + const T* absolute_or_relative_position_embedding = nullptr; LayerNormWeight post_decoder_layernorm; DenseWeight post_decoder_embedding; + bool t5_with_bias = false; + // 0 = relative_position_embedding, 1 = absolute_position_embedding + PositionEmbeddingType position_embedding_type = PositionEmbeddingType::relative; void loadModel(std::string dir_path); void resizeLayer(const int num_layer); + void setT5StructureDiff(bool t5_with_bias_para, PositionEmbeddingType position_embedding_type_para); + private: void setWeightPtr(); void mallocWeights(); @@ -64,14 +73,18 @@ struct T5DecodingWeight { size_t vocab_size_; size_t num_layer_; size_t mem_d_model_; - size_t num_bucket_; + // refer to num_buckt if using relative position embedding + // refer to max_seq_len if using absoulte position embedding + size_t num_bucket_or_max_seq_len_; size_t tensor_para_size_; size_t tensor_para_rank_; size_t pipeline_para_size_; size_t pipeline_para_rank_; bool is_maintain_buffer = false; - const static int weights_num_ = 4; + int real_weights_num_; + + const static int weights_num_ = 6; T* weights_ptr[weights_num_]; size_t weights_size[weights_num_]; }; diff --git a/src/fastertransformer/models/t5/T5Encoder.cc b/src/fastertransformer/models/t5/T5Encoder.cc index 5d63bddf6..698e3d686 100644 --- a/src/fastertransformer/models/t5/T5Encoder.cc +++ b/src/fastertransformer/models/t5/T5Encoder.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -40,19 +40,21 @@ void T5Encoder::initialize() // sparse_); } else if (attention_type_ == AttentionType::UNFUSED_MHA || attention_type_ == AttentionType::UNFUSED_PADDED_MHA) { - attention_layer_ = new TensorParallelUnfusedAttentionLayer(max_batch_size_, - max_seq_len_, - head_num_, - size_per_head_, - d_model_, - q_scaling_ * (1.0 / sqrtf(size_per_head_ * 1.0f)), - tensor_para_.world_size_, - tensor_para_.nccl_comm_, - stream_, - cublas_wrapper_, - allocator_, - is_free_buffer_after_forward_, - sparse_); + attention_layer_ = + new TensorParallelUnfusedAttentionLayer(max_batch_size_, + max_seq_len_, + head_num_, + size_per_head_, + d_model_, + q_scaling_, // adjust according to checkpoint structure + tensor_para_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + sparse_, + custom_all_reduce_comm_, + enable_custom_all_reduce_); } else { throw std::runtime_error(std::string("[FT][ERROR] Invalid attention type \n")); @@ -64,13 +66,15 @@ void T5Encoder::initialize() 1, d_model_, inter_size_, - tensor_para_.world_size_, - tensor_para_.nccl_comm_, + tensor_para_, stream_, cublas_wrapper_, allocator_, is_free_buffer_after_forward_, - sparse_); + sparse_, + 0, + custom_all_reduce_comm_, + enable_custom_all_reduce_); } else if (activation_type_ == ActivationType::Relu) { ffn_layer_ = new TensorParallelReluFfnLayer(max_batch_size_, @@ -78,13 +82,14 @@ void T5Encoder::initialize() 1, d_model_, inter_size_, - tensor_para_.world_size_, - tensor_para_.nccl_comm_, + tensor_para_, stream_, cublas_wrapper_, allocator_, is_free_buffer_after_forward_, - sparse_); + sparse_, + custom_all_reduce_comm_, + enable_custom_all_reduce_); } } @@ -96,7 +101,7 @@ T5Encoder::T5Encoder(size_t max_batch_size, size_t inter_size, size_t d_model, size_t num_layer, - size_t num_bucket, + size_t num_bucket_or_max_seq_len, size_t max_distance, int sm, float q_scaling, @@ -109,7 +114,9 @@ T5Encoder::T5Encoder(size_t max_batch_size, ActivationType activation_type, LayerNormType layernorm_type, NcclParam tensor_para, - NcclParam pipeline_para): + NcclParam pipeline_para, + std::shared_ptr custom_all_reduce_comm, + int enable_custom_all_reduce): BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), max_batch_size_(max_batch_size), max_seq_len_(max_seq_len), @@ -119,7 +126,7 @@ T5Encoder::T5Encoder(size_t max_batch_size, d_model_(d_model), hidden_units_(head_num_ * size_per_head_), num_layer_(num_layer), - num_bucket_(num_bucket), + num_bucket_or_max_seq_len_(num_bucket_or_max_seq_len), max_distance_(max_distance), sm_(sm), q_scaling_(q_scaling), @@ -128,7 +135,9 @@ T5Encoder::T5Encoder(size_t max_batch_size, activation_type_(activation_type), layernorm_type_(layernorm_type), tensor_para_(tensor_para), - pipeline_para_(pipeline_para) + pipeline_para_(pipeline_para), + custom_all_reduce_comm_(custom_all_reduce_comm), + enable_custom_all_reduce_(enable_custom_all_reduce) { initialize(); } @@ -144,7 +153,7 @@ T5Encoder::T5Encoder(T5Encoder const& t5_encoder): d_model_(t5_encoder.d_model_), hidden_units_(t5_encoder.hidden_units_), num_layer_(t5_encoder.num_layer_), - num_bucket_(t5_encoder.num_bucket_), + num_bucket_or_max_seq_len_(t5_encoder.num_bucket_or_max_seq_len_), max_distance_(t5_encoder.max_distance_), sm_(t5_encoder.sm_), q_scaling_(t5_encoder.q_scaling_), @@ -153,7 +162,9 @@ T5Encoder::T5Encoder(T5Encoder const& t5_encoder): activation_type_(t5_encoder.activation_type_), layernorm_type_(t5_encoder.layernorm_type_), tensor_para_(t5_encoder.tensor_para_), - pipeline_para_(t5_encoder.pipeline_para_) + pipeline_para_(t5_encoder.pipeline_para_), + custom_all_reduce_comm_(t5_encoder.custom_all_reduce_comm_), + enable_custom_all_reduce_(t5_encoder.enable_custom_all_reduce_) { initialize(); } @@ -161,11 +172,20 @@ T5Encoder::T5Encoder(T5Encoder const& t5_encoder): template T5Encoder::~T5Encoder() { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); delete attention_layer_; delete ffn_layer_; freeBuffer(); } +template +void T5Encoder::setStream(cudaStream_t stream) +{ + attention_layer_->setStream(stream); + ffn_layer_->setStream(stream); + BaseLayer::setStream(stream); +} + template void T5Encoder::allocateBuffer() { @@ -194,10 +214,44 @@ void T5Encoder::allocateBuffer() } } +template +void T5Encoder::allocateBuffer(size_t batch_size, size_t seq_len) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + token_num_ = (size_t*)allocator_->reMalloc(token_num_, sizeof(size_t) * 1, false); + padding_offset_ = (int*)allocator_->reMalloc(padding_offset_, sizeof(int) * batch_size * seq_len, false); + trt_mha_padding_offset_ = + (int*)allocator_->reMalloc(trt_mha_padding_offset_, sizeof(int) * (2 * batch_size + 1), false); + + attention_mask_ = (T*)allocator_->reMalloc(attention_mask_, sizeof(T) * batch_size * seq_len * seq_len, false); + relative_attention_bias_ = + (T*)allocator_->reMalloc(relative_attention_bias_, sizeof(T) * head_num_ * seq_len * seq_len, false); + + t5_encoder_emb_buf_ = + (T*)allocator_->reMalloc(t5_encoder_emb_buf_, sizeof(T) * batch_size * seq_len * d_model_, false); + t5_encoder_in_buffer_ = + (T*)allocator_->reMalloc(t5_encoder_in_buffer_, sizeof(T) * batch_size * seq_len * d_model_, false); + attn_out_buf_ = (T*)allocator_->reMalloc(attn_out_buf_, sizeof(T) * batch_size * seq_len * d_model_, false); + t5_encoder_out_buffer_ = + (T*)allocator_->reMalloc(t5_encoder_out_buffer_, sizeof(T) * batch_size * seq_len * d_model_, false); + + if (layernorm_type_ == LayerNormType::post_layernorm) { + normed_from_tensor_ = nullptr; + normed_attn_out_buf_ = nullptr; + } + else { + normed_from_tensor_ = + (T*)allocator_->reMalloc(normed_from_tensor_, sizeof(T) * batch_size * seq_len * d_model_, false); + normed_attn_out_buf_ = + (T*)allocator_->reMalloc(normed_attn_out_buf_, sizeof(T) * batch_size * seq_len * d_model_, false); + } + is_allocate_buffer_ = true; +} + template void T5Encoder::freeBuffer() { - if (is_allocate_buffer_ == true) { + if (is_allocate_buffer_) { allocator_->free(token_num_); allocator_->free(padding_offset_); allocator_->free(trt_mha_padding_offset_); @@ -259,30 +313,53 @@ void T5Encoder::forward(std::vector* output_tensors, // input_ids [batch, seqlen] // sequence_length [batch] // output tensors: - // output hidden state [batch, seqlen, d_model_] + // output_hidden_state [batch, seqlen, d_model_] + + std::unordered_map input_tensors_map{{"input_ids", input_tensors->at(0)}, + {"sequence_length", input_tensors->at(1)}}; - const size_t request_batch_size = input_tensors->at(0).shape[0]; - const size_t request_seq_len = input_tensors->at(0).shape[1]; + std::unordered_map output_tensors_map{{"output_hidden_state", output_tensors->at(0)}}; + forward(&output_tensors_map, &input_tensors_map, t5_encoder_weights); +} + +template +void T5Encoder::forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors, + const T5EncoderWeight* t5_encoder_weights) +{ + // input_tensors: + // input_ids [batch, seqlen] + // sequence_length [batch] + // output tensors: + // output_hidden_state [batch, seqlen, d_model_] + + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + const size_t request_batch_size = input_tensors->at("input_ids").shape[0]; + const size_t request_seq_len = input_tensors->at("input_ids").shape[1]; FT_CHECK(input_tensors->size() == 2); - FT_CHECK(isValidBatchSize(request_batch_size)); - FT_CHECK(isValidSeqLen(request_seq_len)); - FT_CHECK(request_batch_size == input_tensors->at(1).shape[0]); - FT_CHECK(input_tensors->at(0).shape.size() == 2); - FT_CHECK(input_tensors->at(1).shape.size() == 1); - allocateBuffer(); + FT_CHECK(request_batch_size == input_tensors->at("sequence_length").shape[0]); + FT_CHECK(input_tensors->at("input_ids").shape.size() == 2); + FT_CHECK(input_tensors->at("sequence_length").shape.size() == 1); + allocateBuffer(request_batch_size, request_seq_len); + + // T5 Structure Difference + bool t5_with_bias = t5_encoder_weights->t5_with_bias; + PositionEmbeddingType position_embedding_type = t5_encoder_weights->position_embedding_type; invokeBuildRelativeAttentionBias(relative_attention_bias_, - t5_encoder_weights->relative_attention_bias, + t5_encoder_weights->absolute_or_relative_position_embedding, head_num_, request_seq_len, - num_bucket_, + num_bucket_or_max_seq_len_, true, max_distance_, + position_embedding_type, stream_); - if (attention_type_ == AttentionType::UNFUSED_MHA || attention_type_ == AttentionType::FUSED_MHA) { // prevent undefined behavior of the padding parts - cudaMemset((T*)output_tensors->at(0).data, 0, sizeof(T) * request_batch_size * request_seq_len * d_model_); + cudaMemset(output_tensors->at("output_hidden_state").getPtr(), + 0, + sizeof(T) * request_batch_size * request_seq_len * d_model_); } const size_t local_batch_size = getLocalBatchSize(request_batch_size, request_seq_len, pipeline_para_.world_size_); const size_t iteration_num = request_batch_size / local_batch_size; @@ -290,21 +367,39 @@ void T5Encoder::forward(std::vector* output_tensors, size_t id_offset = ite * local_batch_size; size_t d_model_offset = id_offset * request_seq_len * d_model_; - const int* sequence_lengths = reinterpret_cast(input_tensors->at(1).data) + id_offset; + const int* sequence_lengths = input_tensors->at("sequence_length").getPtr() + id_offset; + + if (position_embedding_type == PositionEmbeddingType::absolute) { + invokeInputIdsEmbeddingLookupPosEncoding(t5_encoder_emb_buf_, + nullptr, + t5_encoder_weights->embedding_table, + t5_encoder_weights->absolute_or_relative_position_embedding, + input_tensors->at("input_ids").getPtr() + + id_offset * request_seq_len, + 1, + request_seq_len, + request_seq_len, + local_batch_size, + hidden_units_, + stream_); + } + else { + invokeEmbeddingLookupPosEncoding(t5_encoder_emb_buf_, + t5_encoder_weights->embedding_table, + (const T*)nullptr, + input_tensors->at("input_ids").getPtr() + id_offset * request_seq_len, + nullptr, + local_batch_size * request_seq_len, + d_model_, + (T)1.0f, + 0, + 0, + local_batch_size * request_seq_len, + 0, + stream_); + } - invokeEmbeddingLookupPosEncoding(t5_encoder_emb_buf_, - t5_encoder_weights->embedding_table, - (T*)nullptr, - (int*)(input_tensors->at(0).data) + id_offset * request_seq_len, - nullptr, - local_batch_size * request_seq_len, - d_model_, - (T)1.0f, - 0, - 0, - local_batch_size * request_seq_len, - 0, - stream_); + sync_check_cuda_error(); size_t h_token_num; T* t5_encoder_input_ptr; @@ -344,46 +439,46 @@ void T5Encoder::forward(std::vector* output_tensors, sync_check_cuda_error(); h_token_num = local_batch_size * request_seq_len; - t5_encoder_input_ptr = (T*)input_tensors->at(0).data + d_model_offset; - t5_encoder_output_ptr = (T*)output_tensors->at(0).data + d_model_offset; + t5_encoder_input_ptr = t5_encoder_emb_buf_; + t5_encoder_output_ptr = output_tensors->at("output_hidden_state").getPtr() + d_model_offset; padding_offset_tensor_ptr = new Tensor(MEMORY_GPU, TYPE_INT32, std::vector{0}, nullptr); break; } case AttentionType::FUSED_MHA: { FT_CHECK(false); // not support FUSED_MHA now - invokeGetPaddingOffset(&h_token_num, - token_num_, - padding_offset_, - sequence_lengths, - local_batch_size, - request_seq_len, - stream_); - - if (pipeline_para_.rank_ == 0) { - invokeRemovePadding( - t5_encoder_in_buffer_, t5_encoder_emb_buf_, padding_offset_, h_token_num, d_model_, stream_); - sync_check_cuda_error(); - } - sync_check_cuda_error(); - t5_encoder_input_ptr = t5_encoder_in_buffer_; - t5_encoder_output_ptr = t5_encoder_out_buffer_; - - invokeGetTrtPaddingOffset(trt_mha_padding_offset_, sequence_lengths, local_batch_size, stream_); - - padding_offset_tensor_ptr = new Tensor( - MEMORY_GPU, TYPE_INT32, std::vector{local_batch_size + 1}, trt_mha_padding_offset_); - break; + // invokeGetPaddingOffset(&h_token_num, + // token_num_, + // padding_offset_, + // sequence_lengths, + // local_batch_size, + // request_seq_len, + // stream_); + + // if (pipeline_para_.rank_ == 0) { + // invokeRemovePadding( + // t5_encoder_in_buffer_, t5_encoder_emb_buf_, padding_offset_, h_token_num, d_model_, stream_); + // sync_check_cuda_error(); + // } + // sync_check_cuda_error(); + // t5_encoder_input_ptr = t5_encoder_in_buffer_; + // t5_encoder_output_ptr = t5_encoder_out_buffer_; + + // invokeGetTrtPaddingOffset(trt_mha_padding_offset_, sequence_lengths, local_batch_size, stream_); + + // padding_offset_tensor_ptr = new Tensor( + // MEMORY_GPU, TYPE_INT32, std::vector{local_batch_size + 1}, trt_mha_padding_offset_); + // break; } case AttentionType::FUSED_PADDED_MHA: { FT_CHECK(false); // not support FUSED_MHA now - h_token_num = local_batch_size * request_seq_len; - invokeGetTrtPaddingOffset( - trt_mha_padding_offset_, sequence_lengths, local_batch_size, request_seq_len, stream_); - padding_offset_tensor_ptr = new Tensor( - MEMORY_GPU, TYPE_INT32, std::vector{local_batch_size * 2 + 1}, trt_mha_padding_offset_); - t5_encoder_input_ptr = (T*)input_tensors->at(0).data + d_model_offset; - t5_encoder_output_ptr = (T*)output_tensors->at(0).data + d_model_offset; - break; + // h_token_num = local_batch_size * request_seq_len; + // invokeGetTrtPaddingOffset( + // trt_mha_padding_offset_, sequence_lengths, local_batch_size, request_seq_len, stream_); + // padding_offset_tensor_ptr = new Tensor( + // MEMORY_GPU, TYPE_INT32, std::vector{local_batch_size * 2 + 1}, trt_mha_padding_offset_); + // t5_encoder_input_ptr = t5_encoder_emb_buf_ + d_model_offset; + // t5_encoder_output_ptr = output_tensors->at("output_hidden_state").getPtr() + d_model_offset; + // break; } default: { throw std::runtime_error(std::string("[FT][ERROR] Invalid attention type \n")); @@ -391,6 +486,7 @@ void T5Encoder::forward(std::vector* output_tensors, } DataType data_type = getTensorType(); + for (uint i = 0; i < num_layer_; i++) { if (!isValidLayerParallelId(i)) { continue; @@ -403,18 +499,17 @@ void T5Encoder::forward(std::vector* output_tensors, ftNcclRecv(from_tensor + data_size * tensor_para_.rank_, data_size, pipeline_para_.rank_ - 1, - pipeline_para_.nccl_comm_, + pipeline_para_, stream_); if (tensor_para_.world_size_ > 1) { - ftNcclAllGather( - from_tensor, from_tensor, data_size, tensor_para_.rank_, tensor_para_.nccl_comm_, stream_); + ftNcclAllGather(from_tensor, from_tensor, data_size, tensor_para_.rank_, tensor_para_, stream_); } } - if (layernorm_type_ == LayerNormType::pre_layernorm) { invokeGeneralT5LayerNorm(normed_from_tensor_, from_tensor, t5_encoder_weights->t5_encoder_layer_weights[i]->attn_layernorm_weights.gamma, + t5_encoder_weights->t5_encoder_layer_weights[i]->attn_layernorm_weights.beta, h_token_num, d_model_, stream_); @@ -434,7 +529,9 @@ void T5Encoder::forward(std::vector* output_tensors, Tensor{MEMORY_GPU, data_type, std::vector{1, head_num_, request_seq_len, request_seq_len}, - relative_attention_bias_}}; + t5_encoder_weights->position_embedding_type == PositionEmbeddingType::relative ? + relative_attention_bias_ : + nullptr}}; std::vector attn_output_tensors{ Tensor{MEMORY_GPU, data_type, std::vector{h_token_num, d_model_}, attn_out_buf_}}; @@ -444,21 +541,25 @@ void T5Encoder::forward(std::vector* output_tensors, } if (layernorm_type_ == LayerNormType::post_layernorm) { - invokeGeneralAddResidualT5PreLayerNorm( + invokeGeneralAddBiasResidualT5PreLayerNorm( attn_out_buf_, attn_out_buf_, from_tensor, t5_encoder_weights->t5_encoder_layer_weights[i]->attn_layernorm_weights.gamma, + t5_encoder_weights->t5_encoder_layer_weights[i]->attn_layernorm_weights.beta, + t5_encoder_weights->t5_encoder_layer_weights[i]->attention_weights.attention_output_weight.bias, h_token_num, d_model_, stream_); } else if (layernorm_type_ == LayerNormType::pre_layernorm) { - invokeGeneralAddResidualT5PreLayerNorm( + invokeGeneralAddBiasResidualT5PreLayerNorm( attn_out_buf_, normed_attn_out_buf_, from_tensor, t5_encoder_weights->t5_encoder_layer_weights[i]->ffn_layernorm_weights.gamma, + t5_encoder_weights->t5_encoder_layer_weights[i]->ffn_layernorm_weights.beta, + t5_encoder_weights->t5_encoder_layer_weights[i]->attention_weights.attention_output_weight.bias, h_token_num, d_model_, stream_); @@ -479,17 +580,24 @@ void T5Encoder::forward(std::vector* output_tensors, } if (layernorm_type_ == LayerNormType::post_layernorm) { - invokeGeneralAddResidualT5PreLayerNorm( + invokeGeneralAddBiasResidualT5PreLayerNorm( out_tensor, out_tensor, attn_out_buf_, t5_encoder_weights->t5_encoder_layer_weights[i]->ffn_layernorm_weights.gamma, + t5_encoder_weights->t5_encoder_layer_weights[i]->ffn_layernorm_weights.beta, + t5_encoder_weights->t5_encoder_layer_weights[i]->ffn_weights.output_weight.bias, h_token_num, d_model_, stream_); } else if (layernorm_type_ == LayerNormType::pre_layernorm) { - invokeT5AddResidual(out_tensor, attn_out_buf_, h_token_num, d_model_, stream_); + invokeT5AddBiasResidual(out_tensor, + attn_out_buf_, + t5_encoder_weights->t5_encoder_layer_weights[i]->ffn_weights.output_weight.bias, + h_token_num, + d_model_, + stream_); } sync_check_cuda_error(); @@ -498,7 +606,7 @@ void T5Encoder::forward(std::vector* output_tensors, ftNcclSend(out_tensor + data_size * tensor_para_.rank_, data_size, pipeline_para_.rank_ + 1, - pipeline_para_.nccl_comm_, + pipeline_para_, stream_); } } @@ -508,6 +616,7 @@ void T5Encoder::forward(std::vector* output_tensors, invokeGeneralT5LayerNorm(t5_encoder_output_ptr, t5_encoder_output_ptr, t5_encoder_weights->post_transformer_layernorm_weights.gamma, + t5_encoder_weights->post_transformer_layernorm_weights.beta, h_token_num, d_model_, stream_); @@ -517,7 +626,7 @@ void T5Encoder::forward(std::vector* output_tensors, switch (attention_type_) { case AttentionType::UNFUSED_MHA: { if (pipeline_para_.rank_ == pipeline_para_.world_size_ - 1) { - invokeRebuildPadding((T*)output_tensors->at(0).data + d_model_offset, + invokeRebuildPadding(output_tensors->at("output_hidden_state").getPtr() + d_model_offset, t5_encoder_out_buffer_, padding_offset_, h_token_num, @@ -531,7 +640,7 @@ void T5Encoder::forward(std::vector* output_tensors, } case AttentionType::FUSED_MHA: { if (pipeline_para_.rank_ == pipeline_para_.world_size_ - 1) { - invokeRebuildPadding((T*)output_tensors->at(0).data + d_model_offset, + invokeRebuildPadding(output_tensors->at("output_hidden_state").getPtr() + d_model_offset, t5_encoder_out_buffer_, padding_offset_, h_token_num, @@ -549,63 +658,36 @@ void T5Encoder::forward(std::vector* output_tensors, } } - if (is_free_buffer_after_forward_ == true) { - freeBuffer(); - } - sync_check_cuda_error(); - delete padding_offset_tensor_ptr; } + if (is_free_buffer_after_forward_ == true) { + freeBuffer(); + } + sync_check_cuda_error(); if (pipeline_para_.world_size_ > 1) { NCCLCHECK(ncclGroupStart()); const int data_size = request_batch_size * request_seq_len * d_model_ / tensor_para_.world_size_; - ftNcclBroadCast((T*)output_tensors->at(0).data + data_size * tensor_para_.rank_, + ftNcclBroadCast(output_tensors->at("output_hidden_state").getPtr() + data_size * tensor_para_.rank_, data_size, pipeline_para_.world_size_ - 1, - pipeline_para_.nccl_comm_, + pipeline_para_, stream_); NCCLCHECK(ncclGroupEnd()); check_cuda_error(cudaStreamSynchronize(stream_)); sync_check_cuda_error(); if (tensor_para_.world_size_ > 1) { - ftNcclAllGather((T*)output_tensors->at(0).data, - (T*)output_tensors->at(0).data, + ftNcclAllGather(output_tensors->at("output_hidden_state").getPtr(), + output_tensors->at("output_hidden_state").getPtr(), data_size, tensor_para_.rank_, - tensor_para_.nccl_comm_, + tensor_para_, stream_); } } } -template -bool T5Encoder::isValidBatchSize(size_t batch_size) -{ - if (batch_size <= max_batch_size_) { - return true; - } - else { - freeBuffer(); - max_batch_size_ = batch_size * 1.2; - return true; - } -} - -template -bool T5Encoder::isValidSeqLen(size_t seq_len) -{ - if (seq_len <= max_seq_len_) { - return true; - } - else { - freeBuffer(); - max_seq_len_ = seq_len * 1.2; - return true; - } -} - template class T5Encoder; template class T5Encoder; diff --git a/src/fastertransformer/models/t5/T5Encoder.h b/src/fastertransformer/models/t5/T5Encoder.h index 00ea8ad53..44039761a 100644 --- a/src/fastertransformer/models/t5/T5Encoder.h +++ b/src/fastertransformer/models/t5/T5Encoder.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,15 +16,18 @@ #pragma once +#include #include #include "src/fastertransformer/kernels/bert_preprocess_kernels.h" +#include "src/fastertransformer/kernels/gpt_kernels.h" #include "src/fastertransformer/kernels/layernorm_kernels.h" #include "src/fastertransformer/layers/TensorParallelGeluFfnLayer.h" #include "src/fastertransformer/layers/TensorParallelReluFfnLayer.h" // #include "src/fastertransformer/layers/attention_layers/FusedAttentionLayer.h" #include "src/fastertransformer/layers/attention_layers/TensorParallelUnfusedAttentionLayer.h" #include "src/fastertransformer/models/t5/T5EncoderWeight.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" namespace fastertransformer { @@ -42,7 +45,7 @@ class T5Encoder: public BaseLayer { const size_t hidden_units_; const size_t d_model_; const size_t num_layer_; - const size_t num_bucket_; + const size_t num_bucket_or_max_seq_len_; const size_t max_distance_; int sm_; float q_scaling_; @@ -54,10 +57,9 @@ class T5Encoder: public BaseLayer { bool is_allocate_buffer_ = false; - void allocateBuffer(); - void freeBuffer(); - bool isValidBatchSize(size_t batch_size); - bool isValidSeqLen(size_t seq_len); + void allocateBuffer() override; + void allocateBuffer(size_t batch_size, size_t seq_len); + void freeBuffer() override; void initialize(); bool isValidLayerParallelId(uint l); bool isFirstLayerParallelId(uint l); @@ -70,20 +72,23 @@ class T5Encoder: public BaseLayer { const NcclParam tensor_para_; const NcclParam pipeline_para_; + std::shared_ptr custom_all_reduce_comm_; + int enable_custom_all_reduce_; + protected: // model params - size_t* token_num_; - int* padding_offset_; - int* trt_mha_padding_offset_; - T* attention_mask_; - T* relative_attention_bias_; - T* t5_encoder_emb_buf_; - T* t5_encoder_in_buffer_; - T* attn_out_buf_; - T* t5_encoder_out_buffer_; - - T* normed_from_tensor_; - T* normed_attn_out_buf_; + size_t* token_num_ = nullptr; + int* padding_offset_ = nullptr; + int* trt_mha_padding_offset_ = nullptr; + T* attention_mask_ = nullptr; + T* relative_attention_bias_ = nullptr; + T* t5_encoder_emb_buf_ = nullptr; + T* t5_encoder_in_buffer_ = nullptr; + T* attn_out_buf_ = nullptr; + T* t5_encoder_out_buffer_ = nullptr; + + T* normed_from_tensor_ = nullptr; + T* normed_attn_out_buf_ = nullptr; public: T5Encoder(size_t max_batch_size, @@ -93,7 +98,7 @@ class T5Encoder: public BaseLayer { size_t inter_size, size_t d_model, size_t num_layer, - size_t num_bucket, + size_t num_bucket_or_max_seq_len, size_t max_distance, int sm, float q_scaling, @@ -106,7 +111,9 @@ class T5Encoder: public BaseLayer { ActivationType activation_type, LayerNormType layernorm_type, NcclParam tensor_para, - NcclParam pipeline_para); + NcclParam pipeline_para, + std::shared_ptr custom_all_reduce_comm = nullptr, + int enable_custom_all_reduce = 0); T5Encoder(T5Encoder const& t5_layer); @@ -116,10 +123,15 @@ class T5Encoder: public BaseLayer { const std::vector* input_tensors, const T5EncoderWeight* t5_weights); + void forward(std::unordered_map* output_tensors, + const std::unordered_map* input_tensors, + const T5EncoderWeight* t5_weights); + inline size_t getDModel() { return d_model_; } + void setStream(cudaStream_t stream) override; }; } // namespace fastertransformer diff --git a/src/fastertransformer/models/t5/T5EncoderLayerWeight.cc b/src/fastertransformer/models/t5/T5EncoderLayerWeight.cc index a29c62502..750b353cf 100644 --- a/src/fastertransformer/models/t5/T5EncoderLayerWeight.cc +++ b/src/fastertransformer/models/t5/T5EncoderLayerWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -14,8 +14,6 @@ * limitations under the License. */ -#pragma once - #include "src/fastertransformer/models/t5/T5EncoderLayerWeight.h" #include "src/fastertransformer/utils/logger.h" #include "src/fastertransformer/utils/memory_utils.h" @@ -28,13 +26,16 @@ T5EncoderLayerWeight::T5EncoderLayerWeight(const size_t head_num, const size_t d_model, const size_t inter_size, const size_t tensor_para_size, - const size_t tensor_para_rank): + const size_t tensor_para_rank, + const bool t5_with_bias): head_num_(head_num), size_per_head_(size_per_head), d_model_(d_model), inter_size_(inter_size), tensor_para_size_(tensor_para_size), - tensor_para_rank_(tensor_para_rank) + tensor_para_rank_(tensor_para_rank), + t5_with_bias_(t5_with_bias), + real_weights_num_(t5_with_bias ? 16 : 8) { FT_LOG_DEBUG("T5EncoderLayerWeight " + std::string(__func__) + " start"); initialize(); @@ -55,6 +56,17 @@ void T5EncoderLayerWeight::initialize() weights_size[5] = d_model_ * (inter_size_ / tensor_para_size_); weights_size[6] = (inter_size_ / tensor_para_size_) * d_model_; weights_size[7] = d_model_; + if (t5_with_bias_) { + weights_size[8] = (head_num_ / tensor_para_size_) * size_per_head_; + weights_size[9] = (head_num_ / tensor_para_size_) * size_per_head_; + weights_size[10] = (head_num_ / tensor_para_size_) * size_per_head_; + weights_size[11] = d_model_; + weights_size[12] = d_model_; + weights_size[13] = (inter_size_ / tensor_para_size_); + weights_size[14] = d_model_; + weights_size[15] = d_model_; + } + FT_LOG_DEBUG("T5EncoderLayerWeight " + std::string(__func__) + " end"); } @@ -63,7 +75,7 @@ T5EncoderLayerWeight::~T5EncoderLayerWeight() { FT_LOG_DEBUG("T5EncoderLayerWeight " + std::string(__func__) + " start"); if (is_maintain_buffer == true) { - for (int i = 0; i < weights_num_; i++) { + for (int i = 0; i < real_weights_num_; i++) { deviceFree(weights_ptr[i]); } @@ -75,7 +87,17 @@ T5EncoderLayerWeight::~T5EncoderLayerWeight() ffn_weights.intermediate_weight.kernel = nullptr; ffn_weights.output_weight.kernel = nullptr; ffn_layernorm_weights.gamma = nullptr; - is_maintain_buffer = false; + if (t5_with_bias_) { + attention_weights.query_weight.bias = nullptr; + attention_weights.key_weight.bias = nullptr; + attention_weights.value_weight.bias = nullptr; + attention_weights.attention_output_weight.bias = nullptr; + attn_layernorm_weights.beta = nullptr; + ffn_weights.intermediate_weight.bias = nullptr; + ffn_weights.output_weight.bias = nullptr; + ffn_layernorm_weights.beta = nullptr; + is_maintain_buffer = false; + } } if (is_maintain_sp_buffer == true) { @@ -100,12 +122,14 @@ T5EncoderLayerWeight::T5EncoderLayerWeight(const T5EncoderLayerWeight& other) d_model_(other.d_model_), inter_size_(other.inter_size_), tensor_para_size_(other.tensor_para_size_), - tensor_para_rank_(other.tensor_para_rank_) + tensor_para_rank_(other.tensor_para_rank_), + t5_with_bias_(other.t5_with_bias_), + real_weights_num_(other.real_weights_num_) { FT_LOG_DEBUG("T5EncoderLayerWeight " + std::string(__func__) + " start"); initialize(); mallocWeights(); - for (int i = 0; i < weights_num_; i++) { + for (int i = 0; i < real_weights_num_; i++) { cudaD2Dcpy(weights_ptr[i], other.weights_ptr[i], weights_size[i]); } setWeightPtr(); @@ -123,9 +147,11 @@ T5EncoderLayerWeight& T5EncoderLayerWeight::operator=(const T5EncoderLayer inter_size_ = other.inter_size_; tensor_para_size_ = other.tensor_para_size_; tensor_para_rank_ = other.tensor_para_rank_; + t5_with_bias_ = other.t5_with_bias_; + real_weights_num_ = other.real_weights_num_; initialize(); mallocWeights(); - for (int i = 0; i < weights_num_; i++) { + for (int i = 0; i < real_weights_num_; i++) { cudaD2Dcpy(weights_ptr[i], other.weights_ptr[i], weights_size[i]); } setWeightPtr(); @@ -191,6 +217,18 @@ void T5EncoderLayerWeight::setWeightPtr() ffn_weights.output_weight.kernel = weights_ptr[6]; ffn_layernorm_weights.gamma = weights_ptr[7]; + if (t5_with_bias_) { + attention_weights.query_weight.bias = weights_ptr[8]; + attention_weights.key_weight.bias = weights_ptr[9]; + attention_weights.value_weight.bias = weights_ptr[10]; + attention_weights.attention_output_weight.bias = weights_ptr[11]; + attn_layernorm_weights.beta = weights_ptr[12]; + ffn_weights.intermediate_weight.bias = weights_ptr[13]; + ffn_weights.output_weight.bias = weights_ptr[14]; + ffn_layernorm_weights.beta = weights_ptr[15]; + is_maintain_buffer = false; + } + is_maintain_buffer = true; FT_LOG_DEBUG("T5EncoderLayerWeight " + std::string(__func__) + " end"); } @@ -199,7 +237,7 @@ template void T5EncoderLayerWeight::mallocWeights() { FT_LOG_DEBUG("T5EncoderLayerWeight " + std::string(__func__) + " start"); - for (int i = 0; i < weights_num_; i++) { + for (int i = 0; i < real_weights_num_; i++) { deviceMalloc(&weights_ptr[i], weights_size[i]); } is_maintain_buffer = true; @@ -207,33 +245,74 @@ void T5EncoderLayerWeight::mallocWeights() } template -void T5EncoderLayerWeight::loadModel(std::string dir_path) +void T5EncoderLayerWeight::loadModel(std::string dir_path, FtCudaDataType model_file_type) { FT_LOG_DEBUG("T5EncoderLayerWeight " + std::string(__func__) + " start"); FT_CHECK(is_maintain_buffer == true); loadWeightFromBin(weights_ptr[0], - {weights_size[0]}, - dir_path + "layer.0.SelfAttention.q.weight." + std::to_string(tensor_para_rank_) + ".bin"); + {(int)weights_size[0]}, + dir_path + "layer.0.SelfAttention.q.weight." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); loadWeightFromBin(weights_ptr[1], - {weights_size[1]}, - dir_path + "layer.0.SelfAttention.k.weight." + std::to_string(tensor_para_rank_) + ".bin"); - loadWeightFromBin(weights_ptr[2],{weights_size[2]}, - dir_path + "layer.0.SelfAttention.v.weight." + std::to_string(tensor_para_rank_) + ".bin"); + {(int)weights_size[1]}, + dir_path + "layer.0.SelfAttention.k.weight." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); + loadWeightFromBin(weights_ptr[2], + {(int)weights_size[2]}, + dir_path + "layer.0.SelfAttention.v.weight." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); loadWeightFromBin(weights_ptr[3], - {weights_size[3]}, - dir_path + "layer.0.SelfAttention.o.weight." + std::to_string(tensor_para_rank_) + ".bin"); - loadWeightFromBin(weights_ptr[4], {weights_size[4]}, dir_path + "layer.0.layer_norm.weight.bin"); + {(int)weights_size[3]}, + dir_path + "layer.0.SelfAttention.o.weight." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); + loadWeightFromBin( + weights_ptr[4], {(int)weights_size[4]}, dir_path + "layer.0.layer_norm.weight.bin", model_file_type); loadWeightFromBin(weights_ptr[5], - {weights_size[5]}, - dir_path + "layer.1.DenseReluDense.wi.weight." + std::to_string(tensor_para_rank_) + ".bin"); + {(int)weights_size[5]}, + dir_path + "layer.1.DenseReluDense.wi.weight." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); loadWeightFromBin(weights_ptr[6], - {weights_size[6]}, - dir_path + "layer.1.DenseReluDense.wo.weight." + std::to_string(tensor_para_rank_) + ".bin"); - loadWeightFromBin(weights_ptr[7], {weights_size[7]}, dir_path + "layer.1.layer_norm.weight.bin"); + {(int)weights_size[6]}, + dir_path + "layer.1.DenseReluDense.wo.weight." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); + loadWeightFromBin( + weights_ptr[7], {(int)weights_size[7]}, dir_path + "layer.1.layer_norm.weight.bin", model_file_type); + + if (t5_with_bias_) { + loadWeightFromBin(weights_ptr[8], + {(int)weights_size[8]}, + dir_path + "layer.0.SelfAttention.q.bias." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); + loadWeightFromBin(weights_ptr[9], + {(int)weights_size[9]}, + dir_path + "layer.0.SelfAttention.k.bias." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); + loadWeightFromBin(weights_ptr[10], + {(int)weights_size[10]}, + dir_path + "layer.0.SelfAttention.v.bias." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); + loadWeightFromBin( + weights_ptr[11], {(int)weights_size[11]}, dir_path + "layer.0.SelfAttention.o.bias.bin", model_file_type); + loadWeightFromBin( + weights_ptr[12], {(int)weights_size[12]}, dir_path + "layer.0.layer_norm.bias.bin", model_file_type); + loadWeightFromBin(weights_ptr[13], + {(int)weights_size[13]}, + dir_path + "layer.1.DenseReluDense.wi.bias." + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); + loadWeightFromBin( + weights_ptr[14], {(int)weights_size[14]}, dir_path + "layer.1.DenseReluDense.wo.bias.bin", model_file_type); + loadWeightFromBin( + weights_ptr[15], {(int)weights_size[15]}, dir_path + "layer.1.layer_norm.bias.bin", model_file_type); + } FT_LOG_DEBUG("T5EncoderLayerWeight " + std::string(__func__) + " end"); +} +template +void T5EncoderLayerWeight::setT5WithBias(bool t5_with_bias_para) +{ + t5_with_bias_ = t5_with_bias_para; } template struct T5EncoderLayerWeight; diff --git a/src/fastertransformer/models/t5/T5EncoderLayerWeight.h b/src/fastertransformer/models/t5/T5EncoderLayerWeight.h index b99fe1872..1afc71a84 100644 --- a/src/fastertransformer/models/t5/T5EncoderLayerWeight.h +++ b/src/fastertransformer/models/t5/T5EncoderLayerWeight.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -33,7 +33,8 @@ struct T5EncoderLayerWeight { const size_t d_model, const size_t inter_size, const size_t tensor_para_size, - const size_t tensor_para_rank); + const size_t tensor_para_rank, + const bool t5_with_bias); ~T5EncoderLayerWeight(); T5EncoderLayerWeight(const T5EncoderLayerWeight& other); T5EncoderLayerWeight& operator=(const T5EncoderLayerWeight& other); @@ -46,8 +47,11 @@ struct T5EncoderLayerWeight { LayerNormWeight attn_layernorm_weights; FfnWeight ffn_weights; LayerNormWeight ffn_layernorm_weights; + bool t5_with_bias_; - void loadModel(std::string dir_path); + void loadModel(std::string dir_path, FtCudaDataType model_file_type); + + void setT5WithBias(bool t5_with_bias_para); private: void setWeightPtr(); @@ -61,9 +65,12 @@ struct T5EncoderLayerWeight { size_t tensor_para_size_; size_t tensor_para_rank_; + int real_weights_num_; + bool is_maintain_buffer = false; - const static int weights_num_ = 8; + // Assume bias added + const static int weights_num_ = 16; T* weights_ptr[weights_num_]; size_t weights_size[weights_num_]; diff --git a/src/fastertransformer/models/t5/T5EncoderWeight.cc b/src/fastertransformer/models/t5/T5EncoderWeight.cc index be6477132..8057bd173 100644 --- a/src/fastertransformer/models/t5/T5EncoderWeight.cc +++ b/src/fastertransformer/models/t5/T5EncoderWeight.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -14,8 +14,6 @@ * limitations under the License. */ -#pragma once - #include "src/fastertransformer/models/t5/T5EncoderWeight.h" #include "src/fastertransformer/utils/logger.h" @@ -28,22 +26,27 @@ T5EncoderWeight::T5EncoderWeight(const size_t head_num, const size_t inter_size, const size_t vocab_size, const size_t num_layer, - const size_t num_bucket, + const size_t num_bucket_or_max_seq_len, const size_t tensor_para_size, const size_t tensor_para_rank, const size_t pipeline_para_size, - const size_t pipeline_para_rank): + const size_t pipeline_para_rank, + const bool t5_with_bias_para, + const PositionEmbeddingType pe_type): head_num_(head_num), size_per_head_(size_per_head), d_model_(d_model), inter_size_(inter_size), vocab_size_(vocab_size), num_layer_(num_layer), - num_bucket_(num_bucket), + num_bucket_or_max_seq_len_(num_bucket_or_max_seq_len), tensor_para_size_(tensor_para_size), tensor_para_rank_(tensor_para_rank), pipeline_para_size_(pipeline_para_size), - pipeline_para_rank_(pipeline_para_rank) + pipeline_para_rank_(pipeline_para_rank), + t5_with_bias(t5_with_bias_para), + position_embedding_type(pe_type), + real_weights_num_(t5_with_bias ? 4 : 3) { FT_LOG_DEBUG("T5EncoderWeight " + std::string(__func__) + " start"); initialize(); @@ -52,8 +55,8 @@ T5EncoderWeight::T5EncoderWeight(const size_t head_num, t5_encoder_layer_weights.clear(); for (int l = 0; l < num_layer_; l++) { if (isValidLayerParallelId(l)) { - t5_encoder_layer_weights.push_back( - new T5EncoderLayerWeight(head_num_, size_per_head, d_model_, inter_size_, tensor_para_size_, tensor_para_rank_)); + t5_encoder_layer_weights.push_back(new T5EncoderLayerWeight( + head_num_, size_per_head, d_model_, inter_size_, tensor_para_size_, tensor_para_rank_, t5_with_bias)); } else { // Don't malloc and load these layers since we don't use them. @@ -68,25 +71,31 @@ void T5EncoderWeight::initialize() { FT_LOG_DEBUG("T5EncoderWeight " + std::string(__func__) + " start"); weights_size[0] = d_model_; - weights_size[1] = (head_num_ / tensor_para_size_) * num_bucket_; + if (position_embedding_type == PositionEmbeddingType::absolute) { + weights_size[1] = num_bucket_or_max_seq_len_ * d_model_; + } + else { + weights_size[1] = (head_num_ / tensor_para_size_) * num_bucket_or_max_seq_len_; + } weights_size[2] = d_model_ * vocab_size_; + weights_size[3] = d_model_; FT_LOG_DEBUG("T5EncoderWeight " + std::string(__func__) + " end"); } - template T5EncoderWeight::~T5EncoderWeight() { FT_LOG_DEBUG("T5EncoderWeight " + std::string(__func__) + " start"); - + if (is_maintain_buffer == true) { - for (int i = 0; i < weights_num_; i++) { + for (int i = 0; i < real_weights_num_; i++) { deviceFree(weights_ptr[i]); } post_transformer_layernorm_weights.gamma = nullptr; - relative_attention_bias = nullptr; + absolute_or_relative_position_embedding = nullptr; embedding_table = nullptr; + post_transformer_layernorm_weights.beta = nullptr; is_maintain_buffer = false; } for (int i = 0; i < num_layer_; i++) { @@ -103,16 +112,19 @@ T5EncoderWeight::T5EncoderWeight(const T5EncoderWeight& other): inter_size_(other.inter_size_), vocab_size_(other.vocab_size_), num_layer_(other.num_layer_), - num_bucket_(other.num_bucket_), + num_bucket_or_max_seq_len_(other.num_bucket_or_max_seq_len_), tensor_para_size_(other.tensor_para_size_), tensor_para_rank_(other.tensor_para_rank_), pipeline_para_size_(other.pipeline_para_size_), - pipeline_para_rank_(other.pipeline_para_rank_) + pipeline_para_rank_(other.pipeline_para_rank_), + t5_with_bias(other.t5_with_bias), + position_embedding_type(other.position_embedding_type), + real_weights_num_(other.real_weights_num_) { FT_LOG_DEBUG("T5EncoderWeight " + std::string(__func__) + " start"); initialize(); mallocWeights(); - for (int i = 0; i < weights_num_; i++) { + for (int i = 0; i < real_weights_num_; i++) { cudaD2Dcpy(weights_ptr[i], other.weights_ptr[i], weights_size[i]); } setWeightPtr(); @@ -135,14 +147,17 @@ T5EncoderWeight& T5EncoderWeight::operator=(const T5EncoderWeight& other) inter_size_ = other.inter_size_; vocab_size_ = other.vocab_size_; num_layer_ = other.num_layer_; - num_bucket_ = other.num_bucket_; + num_bucket_or_max_seq_len_ = other.num_bucket_or_max_seq_len_; tensor_para_size_ = other.tensor_para_size_; tensor_para_rank_ = other.tensor_para_rank_; pipeline_para_size_ = other.pipeline_para_size_; pipeline_para_rank_ = other.pipeline_para_rank_; + t5_with_bias = other.t5_with_bias; + position_embedding_type = other.position_embedding_type; + real_weights_num_ = other.real_weights_num_; initialize(); mallocWeights(); - for (int i = 0; i < weights_num_; i++) { + for (int i = 0; i < real_weights_num_; i++) { cudaD2Dcpy(weights_ptr[i], other.weights_ptr[i], weights_size[i]); } setWeightPtr(); @@ -161,17 +176,19 @@ void T5EncoderWeight::setWeightPtr() { FT_LOG_DEBUG("T5EncoderWeight " + std::string(__func__) + " start"); post_transformer_layernorm_weights.gamma = weights_ptr[0]; - relative_attention_bias = weights_ptr[1]; + absolute_or_relative_position_embedding = weights_ptr[1]; embedding_table = weights_ptr[2]; + if (t5_with_bias) { + post_transformer_layernorm_weights.beta = weights_ptr[3]; + } FT_LOG_DEBUG("T5EncoderWeight " + std::string(__func__) + " end"); - } template void T5EncoderWeight::mallocWeights() { FT_LOG_DEBUG("T5EncoderWeight " + std::string(__func__) + " start"); - for (int i = 0; i < weights_num_; i++) { + for (int i = 0; i < real_weights_num_; i++) { deviceMalloc(&weights_ptr[i], weights_size[i]); } is_maintain_buffer = true; @@ -182,18 +199,31 @@ template void T5EncoderWeight::loadModel(std::string dir_path) { FT_LOG_DEBUG("T5EncoderWeight " + std::string(__func__) + " start"); + FtCudaDataType model_file_type = getModelFileType(dir_path + "/config.ini", "encoder"); FT_CHECK(is_maintain_buffer == true); - loadWeightFromBin(weights_ptr[0], {weights_size[0]}, dir_path + "/encoder.final_layer_norm.weight.bin"); - loadWeightFromBin(weights_ptr[1], - {weights_size[1]}, - dir_path + "/encoder.block.0.layer.0.SelfAttention.relative_attention_bias.weight." - + std::to_string(tensor_para_rank_) + ".bin"); - loadWeightFromBin(weights_ptr[2], {weights_size[2]}, dir_path + "/shared.weight_T.bin"); + loadWeightFromBin( + weights_ptr[0], {(int)weights_size[0]}, dir_path + "/encoder.final_layer_norm.weight.bin", model_file_type); + if (position_embedding_type == PositionEmbeddingType::absolute) { + loadWeightFromBin(weights_ptr[1], {(int)weights_size[1]}, dir_path + "/shared.ape.bin", model_file_type); + } + else { + loadWeightFromBin(weights_ptr[1], + {(int)weights_size[1]}, + dir_path + "/encoder.block.0.layer.0.SelfAttention.relative_attention_bias.weight." + + std::to_string(tensor_para_rank_) + ".bin", + model_file_type); + } + loadWeightFromBin(weights_ptr[2], {(int)weights_size[2]}, dir_path + "/shared.weight_T.bin", model_file_type); + if (t5_with_bias) { + loadWeightFromBin( + weights_ptr[3], {(int)weights_size[3]}, dir_path + "/encoder.final_layer_norm.bias.bin", model_file_type); + } for (int l = 0; l < num_layer_; l++) { if (isValidLayerParallelId(l)) { - t5_encoder_layer_weights[l]->loadModel(dir_path + "/encoder.block." + std::to_string(l) + "."); + t5_encoder_layer_weights[l]->loadModel(dir_path + "/encoder.block." + std::to_string(l) + ".", + model_file_type); } } FT_LOG_DEBUG("T5EncoderWeight " + std::string(__func__) + " end"); @@ -220,6 +250,16 @@ void T5EncoderWeight::resizeLayer(const int num_layer) FT_LOG_DEBUG("T5EncoderWeight " + std::string(__func__) + " end"); } +template +void T5EncoderWeight::setT5StructureDiff(bool t5_with_bias_para, PositionEmbeddingType position_embedding_type_para) +{ + t5_with_bias = t5_with_bias_para; + position_embedding_type = position_embedding_type_para; + for (int i = 0; i < num_layer_; i++) { + t5_encoder_layer_weights[i]->setT5WithBias(t5_with_bias_para); + } +} + template struct T5EncoderWeight; template struct T5EncoderWeight; diff --git a/src/fastertransformer/models/t5/T5EncoderWeight.h b/src/fastertransformer/models/t5/T5EncoderWeight.h index 7908301ee..0f6b8f394 100644 --- a/src/fastertransformer/models/t5/T5EncoderWeight.h +++ b/src/fastertransformer/models/t5/T5EncoderWeight.h @@ -16,6 +16,7 @@ #pragma once +#include "src/fastertransformer/kernels/gen_relative_pos_bias.h" #include "src/fastertransformer/models/t5/T5EncoderLayerWeight.h" namespace fastertransformer { @@ -30,22 +31,28 @@ struct T5EncoderWeight { const size_t inter_size, const size_t vocab_size, const size_t num_layer, - const size_t num_bucket, + const size_t num_bucket_or_max_seq_len, const size_t tensor_para_size, const size_t tensor_para_rank, const size_t pipeline_para_size, - const size_t pipeline_para_rank); + const size_t pipeline_para_rank, + const bool t5_with_bias_para = false, + const PositionEmbeddingType pe_type = PositionEmbeddingType::relative); ~T5EncoderWeight(); T5EncoderWeight(const T5EncoderWeight& other); T5EncoderWeight& operator=(const T5EncoderWeight& other); std::vector*> t5_encoder_layer_weights; LayerNormWeight post_transformer_layernorm_weights; - T* relative_attention_bias; - T* embedding_table; + T* absolute_or_relative_position_embedding = nullptr; + T* embedding_table = nullptr; + bool t5_with_bias = false; + PositionEmbeddingType position_embedding_type = PositionEmbeddingType::relative; void loadModel(std::string dir_path); void resizeLayer(const int num_layer); + void setT5StructureDiff(bool t5_with_bias_para, PositionEmbeddingType position_embedding_type_para); + private: void setWeightPtr(); void mallocWeights(); @@ -58,7 +65,9 @@ struct T5EncoderWeight { size_t inter_size_; size_t vocab_size_; size_t num_layer_; - size_t num_bucket_; + // refer to num_buckt if using relative position embedding + // refer to max_seq_len if using absoulte position embedding + size_t num_bucket_or_max_seq_len_; size_t tensor_para_size_; size_t tensor_para_rank_; size_t pipeline_para_size_; @@ -66,7 +75,9 @@ struct T5EncoderWeight { bool is_maintain_buffer = false; - const static int weights_num_ = 3; + int real_weights_num_; + + const static int weights_num_ = 4; T* weights_ptr[weights_num_]; size_t weights_size[weights_num_]; }; diff --git a/src/fastertransformer/models/t5/t5_gemm.cc b/src/fastertransformer/models/t5/t5_gemm.cc index a37713407..094c1a73b 100644 --- a/src/fastertransformer/models/t5/t5_gemm.cc +++ b/src/fastertransformer/models/t5/t5_gemm.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -21,24 +21,25 @@ namespace ft = fastertransformer; int main(int argc, char* argv[]) { - if (argc != 14 && argc != 15 && argc != 16) { - printf("[ERROR] ./bin/t5_gemm \\ \n" - " batch_size \\ \n" - " beam_width \\ \n" - " max_mem_seq_len \\ \n" - " encoder_d_model \\ \n" - " encoder_head_num \\ \n" - " encoder_size_per_head \\ \n" - " encoder_inter_size \\ \n" - " decoder_d_model \\ \n" - " decoder_head_num \\ \n" - " decoder_size_per_head \\ \n" - " decoder_inter_size \\ \n" - " decoder_vocab_size \\ \n" - " is_fp16 \\ \n" - " tensor_para_size \\ \n" - " is_fp16_compute_type \n"); - printf("e.g. ./bin/t5_gemm 8 4 32 512 8 64 2048 512 8 64 2048 32100 1 2 1\n"); + if (argc != 14 && argc != 15 && argc != 16 && argc != 17) { + FT_LOG_ERROR("[ERROR] ./bin/t5_gemm \\ \n" + " batch_size \\ \n" + " beam_width \\ \n" + " max_mem_seq_len \\ \n" + " encoder_d_model \\ \n" + " encoder_head_num \\ \n" + " encoder_size_per_head \\ \n" + " encoder_inter_size \\ \n" + " decoder_d_model \\ \n" + " decoder_head_num \\ \n" + " decoder_size_per_head \\ \n" + " decoder_inter_size \\ \n" + " decoder_vocab_size \\ \n" + " data_type \\ \n" + " tensor_para_size \\ \n" + " is_fp16_compute_type \\ \n" + " is_append"); + FT_LOG_ERROR("e.g. ./bin/t5_gemm 8 4 32 512 8 64 2048 512 8 64 2048 32100 1 2 1 0"); return 0; } @@ -57,9 +58,14 @@ int main(int argc, char* argv[]) const int decoder_inter_size = atoi(argv[11]); const int decoder_vocab_size = atoi(argv[12]); - const int is_fp16 = atoi(argv[13]); - const int tensor_para_size = argc <= 14 ? 1 : atoi(argv[14]); - const int is_fp16_compute_type = argc <= 15 ? 1 : atoi(argv[15]); + const ft::CublasDataType data_type = static_cast(atoi(argv[13])); // 0 FP32, 1 FP16, 2 BF 16 + const int tensor_para_size = argc <= 15 ? 1 : atoi(argv[14]); + int is_fp16_compute_type = argc <= 16 ? 0 : atoi(argv[15]); + if (data_type == ft::BFLOAT16_DATATYPE && is_fp16_compute_type != 0) { + printf("[ERROR] BFLOAT16_DATATYPE does not support is_fp16_compute_type = True\n"); + return 0; + } + const bool is_append = argc <= 17 ? false : (bool)(atoi(argv[16])); std::cout << "[INFO] arguments: " << std::endl << " batch_size: " << batch_size << std::endl @@ -74,7 +80,7 @@ int main(int argc, char* argv[]) << " decoder_size_per_head: " << decoder_size_per_head << std::endl << " decoder_inter_size: " << decoder_inter_size << std::endl << " decoder_vocab_size: " << decoder_vocab_size << std::endl - << " is_fp16: " << is_fp16 << std::endl + << " data_type: " << data_type << std::endl << " tensor_para_size: " << tensor_para_size << std::endl << " is_fp16_compute_type: " << is_fp16_compute_type << std::endl; @@ -92,7 +98,7 @@ int main(int argc, char* argv[]) decoder_inter_size, decoder_vocab_size, tensor_para_size, - is_fp16); + data_type); size_t total, free; ft::check_cuda_error(cudaMemGetInfo(&free, &total)); if (free < buf_size_in_byte + 10 * 1024 * 1024) { @@ -107,7 +113,7 @@ int main(int argc, char* argv[]) ft::deviceMalloc(reinterpret_cast(&gemm_test_buf), buf_size_in_byte, false); } - if (is_fp16 == 0) { + if (data_type == ft::FLOAT_DATATYPE) { ft::generate_t5_gemm_config(batch_size, beam_width, max_mem_seq_len, @@ -122,10 +128,10 @@ int main(int argc, char* argv[]) decoder_vocab_size, tensor_para_size, gemm_test_buf, - false, + is_append, is_fp16_compute_type); } - else if (is_fp16 == 1) { + else if (data_type == ft::HALF_DATATYPE) { ft::generate_t5_gemm_config(batch_size, beam_width, max_mem_seq_len, @@ -140,11 +146,31 @@ int main(int argc, char* argv[]) decoder_vocab_size, tensor_para_size, gemm_test_buf, - false, + is_append, is_fp16_compute_type); } +#ifdef ENABLE_BF16 + else if (data_type == ft::BFLOAT16_DATATYPE) { + ft::generate_t5_gemm_config<__nv_bfloat16>(batch_size, + beam_width, + max_mem_seq_len, + encoder_d_model, + encoder_head_num, + encoder_size_per_head, + encoder_inter_size, + decoder_d_model, + decoder_head_num, + decoder_size_per_head, + decoder_inter_size, + decoder_vocab_size, + tensor_para_size, + gemm_test_buf, + is_append, + is_fp16_compute_type); + } +#endif else { - printf("[ERROR] is_fp16 should be 0 (use float) or 1 (use half). \n"); + printf("[ERROR] data type only supports fp32(0), fp16(1), bf16(2). \n"); return -1; } diff --git a/src/fastertransformer/models/vit/CMakeLists.txt b/src/fastertransformer/models/vit/CMakeLists.txt new file mode 100644 index 000000000..56b66af7c --- /dev/null +++ b/src/fastertransformer/models/vit/CMakeLists.txt @@ -0,0 +1,25 @@ +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +cmake_minimum_required(VERSION 3.8) + +add_library(ViT STATIC ViT.cc) +set_property(TARGET ViT PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET ViT PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(ViT PUBLIC -lcudart -lcublasLt -lcublas cublasMMWrapper + UnfusedAttentionLayer FusedAttentionLayer FfnLayer layernorm_kernels + add_residual_kernels activation_kernels vit_kernels bert_preprocess_kernels) + +add_executable(vit_gemm vit_gemm.cc) +target_link_libraries(vit_gemm PUBLIC -lcublas -lcublasLt -lcudart encoder_gemm_func encoder_igemm_func memory_utils) \ No newline at end of file diff --git a/src/fastertransformer/models/vit/ViT.cc b/src/fastertransformer/models/vit/ViT.cc new file mode 100644 index 000000000..e785f2bc6 --- /dev/null +++ b/src/fastertransformer/models/vit/ViT.cc @@ -0,0 +1,461 @@ +/* + * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/vit/ViT.h" +#include "src/fastertransformer/kernels/add_residual_kernels.h" +#include "src/fastertransformer/kernels/bert_preprocess_kernels.h" +#include "src/fastertransformer/kernels/vit_kernels.h" + +#define SAFE_FREE(x) \ + if (x) { \ + delete x; \ + x = nullptr; \ + } + +namespace fastertransformer { + +template +void ViTTransformer::initialize() +{ + FT_LOG_DEBUG("img_size: %lu, patch_size:%lu\n" + "batch_size:%lu, chn_num : %lu\n" + "seq_len :%lu, embed_dim: %lu\n" + "head_num :%lu, head_dim : %lu\n" + "inter_size:%lu, num_layer: %lu\n" + "att_type : %d, \n", + img_size_, + patch_size_, + max_batch_size_, + chn_num_, + max_seq_len_, + embed_dim_, + head_num_, + head_dim_, + inter_size_, + num_layer_, + int(attention_type_)); + if (img_size_ % patch_size_ != 0) { + std::ostringstream buffer; + buffer << "[FT][ERROR] IMG size & PITCH size missmatch. " << img_size_ << " % " << patch_size_ << " !=0 \n"; + throw std::runtime_error(buffer.str()); + } + + if (head_num_ * head_dim_ != embed_dim_) { + std::ostringstream buffer; + buffer << "[FT][ERROR] Embed size and head number mismatch. Embed_dim=" << embed_dim_ + << "; head_num*head_dim = " + << "(" << head_num_ << "*" << head_dim_ << ")=" << head_num_ * head_dim_ << std::endl; + throw std::runtime_error(buffer.str()); + } + + max_seq_len_ = request_seq_len_; + if ((attention_type_ == AttentionType::FUSED_MHA) && std::is_same::value == true && max_seq_len_ <= 384) { + + attention_layer_ = new FusedAttentionLayer(max_batch_size_, + max_seq_len_, + head_num_, + head_dim_, + sm_, + q_scaling_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + false); + } + else if (attention_type_ == AttentionType::UNFUSED_MHA) { + if (request_seq_len_ % 8 != 0 && std::is_same::value) { + max_seq_len_ = (request_seq_len_ + 7) / 8 * 8; + FT_LOG_DEBUG("Request sequence length(%lu) is odd with unfused mha. Padding to %lu\n", + request_seq_len_, + max_seq_len_); + } + attention_layer_ = new UnfusedAttentionLayer(max_batch_size_, + max_seq_len_, + head_num_, + head_dim_, + q_scaling_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + false); + } + else { + throw std::runtime_error(std::string("[FT][ERROR] Invalid attention type or sequence length\n")); + } + + ffn_layer_ = new GeluFfnLayer(max_batch_size_, + max_seq_len_, + head_num_, + head_dim_, + inter_size_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + false); +} + +template +ViTTransformer::ViTTransformer(size_t max_batch_size, + size_t img_size, + size_t chn_num, + size_t patch_size, + size_t embed_dim, + size_t head_num, + size_t inter_size, + size_t num_layer, + bool with_cls_token, + int sm, + float q_scaling, + cudaStream_t stream, + cudnnHandle_t cudnn_handle, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + AttentionType attention_type): + BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), + max_batch_size_(max_batch_size), + img_size_(img_size), + chn_num_(chn_num), + patch_size_(patch_size), + request_seq_len_(img_size * img_size / patch_size / patch_size + (with_cls_token ? 1 : 0)), + max_seq_len_(0), + embed_dim_(embed_dim), + head_num_(head_num), + head_dim_(embed_dim / head_num), + inter_size_(inter_size), + num_layer_(num_layer), + with_cls_token_(with_cls_token), + sm_(sm), + q_scaling_(q_scaling), + attention_type_(attention_type), + cudnn_handle_(cudnn_handle) +{ + initialize(); +} + +template +ViTTransformer::ViTTransformer(ViTTransformer const& vit): + BaseLayer(vit), + max_batch_size_(vit.max_batch_size_), + img_size_(vit.img_size_), + chn_num_(vit.chn_num_), + patch_size_(vit.patch_size_), + max_seq_len_(vit.max_seq_len_), + request_seq_len_(vit.request_seq_len_), + embed_dim_(vit.embed_dim_), + head_num_(vit.head_num_), + head_dim_(vit.head_dim_), + inter_size_(vit.inter_size_), + num_layer_(vit.num_layer_), + with_cls_token_(vit.with_cls_token_), + sm_(vit.sm_), + q_scaling_(vit.q_scaling_), + attention_type_(vit.attention_type_), + cudnn_handle_(vit.cudnn_handle_) +{ + initialize(); +} + +template +ViTTransformer::~ViTTransformer() +{ + delete attention_layer_; + delete ffn_layer_; + freeBuffer(); +} + +template +void ViTTransformer::allocateBuffer() +{ + if (is_allocate_buffer_ == false) { + embed_buf_1_ = (T*)allocator_->malloc(sizeof(T) * max_batch_size_ * max_seq_len_ * embed_dim_, false); + embed_buf_2_ = (T*)allocator_->malloc(sizeof(T) * max_batch_size_ * max_seq_len_ * embed_dim_, false); + embed_buf_3_ = (T*)allocator_->malloc(sizeof(T) * max_batch_size_ * max_seq_len_ * embed_dim_, false); + mask_buf_ = (T*)allocator_->malloc(sizeof(T) * max_batch_size_ * max_seq_len_ * max_seq_len_, false); + padding_offset_ = (int*)allocator_->malloc(sizeof(int) * max_batch_size_ * max_seq_len_, false); + token_num_ = (size_t*)allocator_->malloc(sizeof(size_t) * 1, false); + + trt_mha_padding_offset_ = (int*)allocator_->malloc(sizeof(int) * (2 * max_batch_size_ + 1), false); + seq_len_vec_ = (int*)allocator_->malloc(sizeof(int) * max_batch_size_, false); + + setSeqLenVec(max_batch_size_); + setDefaultMask(max_batch_size_); + setDefaultPaddingOffset(max_batch_size_); + + is_allocate_buffer_ = true; + } +} + +#define REMALLOC(var, size) \ + { \ + var = (decltype(var))allocator_->reMalloc(var, size, false); \ + FT_LOG_DEBUG("ReMalloc %s, ptr:%x, size:%lu", #var, var, size); \ + } + +template +void ViTTransformer::allocateBuffer(size_t batch_size) +{ + if (is_allocate_buffer_ && batch_size <= max_batch_size_) { + return; + } + + batch_size = batch_size > max_batch_size_ ? batch_size : max_batch_size_; + REMALLOC(embed_buf_1_, sizeof(T) * batch_size * max_seq_len_ * embed_dim_); + REMALLOC(embed_buf_2_, sizeof(T) * batch_size * max_seq_len_ * embed_dim_); + REMALLOC(embed_buf_3_, sizeof(T) * batch_size * max_seq_len_ * embed_dim_); + REMALLOC(mask_buf_, sizeof(T) * batch_size * max_seq_len_ * max_seq_len_); + REMALLOC(padding_offset_, sizeof(int) * batch_size * max_seq_len_); + REMALLOC(token_num_, sizeof(size_t) * 1); + REMALLOC(trt_mha_padding_offset_, sizeof(int) * (2 * batch_size + 1)); + REMALLOC(seq_len_vec_, sizeof(int) * batch_size); + resetBatch(batch_size); + setSeqLenVec(batch_size); + setDefaultPaddingOffset(batch_size); + setDefaultMask(batch_size); + + is_allocate_buffer_ = true; +} + +template +void ViTTransformer::freeBuffer() +{ + allocator_->free(embed_buf_1_); + allocator_->free(embed_buf_2_); + allocator_->free(embed_buf_3_); + allocator_->free(mask_buf_); + allocator_->free(trt_mha_padding_offset_); + allocator_->free(seq_len_vec_); + allocator_->free(padding_offset_); + allocator_->free(token_num_); + + is_allocate_buffer_ = false; +} + +template +void ViTTransformer::forward(std::vector* output_tensors, + const std::vector* input_tensors, + const ViTWeight* weights) +{ + // input_tensors: + // input_img, BCHW [batch, chn_num, img_size, img_size] + // output tensors: + // output feature_map [batch, seq_len, embed_dim] + + const size_t input_batch_size = input_tensors->at(0).shape[0]; + const size_t input_chn_num = input_tensors->at(0).shape[1]; + const size_t input_img_size = input_tensors->at(0).shape[2]; + const size_t patch_resol = input_img_size / patch_size_; + size_t seq_len = patch_resol * patch_resol + (with_cls_token_ ? 1 : 0); + const bool need_padding = + (attention_type_ == AttentionType::UNFUSED_MHA && seq_len % 8 != 0 && std::is_same::value); + + FT_CHECK(input_img_size == img_size_); + FT_CHECK(seq_len == request_seq_len_); + FT_CHECK(input_tensors->size() == 1); + FT_CHECK(input_tensors->at(0).shape.size() == 4); + FT_CHECK(output_tensors->size() == 1); + FT_CHECK(output_tensors->at(0).shape.size() == 3); + allocateBuffer(input_batch_size); + + const T* input = (const T*)input_tensors->at(0).data; + T* output = (T*)output_tensors->at(0).data; + T* encoder_input_ptr = embed_buf_1_; + + // preprocess (patches embedding, concat class embed and add pos embed) + patchEmbed(need_padding ? embed_buf_2_ : encoder_input_ptr, + input, + weights->pre_encoder_conv_weights.kernel, + weights->pre_encoder_conv_weights.bias, + weights->pre_transform_embeds.class_embed, + weights->pre_transform_embeds.position_embed, + input_batch_size, + input_img_size, + patch_size_, + seq_len, + input_chn_num, + embed_dim_); + + DataType data_type = getTensorType(); + + size_t h_token_num = input_batch_size * seq_len; + // get offsets + Tensor* offset_tensor_ptr; + if (attention_type_ == AttentionType::FUSED_MHA) { + invokeGetTrtPaddingOffset(trt_mha_padding_offset_, seq_len_vec_, input_batch_size, stream_); + offset_tensor_ptr = + new Tensor(MEMORY_GPU, TYPE_INT32, std::vector{input_batch_size + 1}, trt_mha_padding_offset_); + } + else { + offset_tensor_ptr = new Tensor(MEMORY_GPU, TYPE_INT32, std::vector{0}, nullptr); + if (need_padding) { + seq_len = (seq_len + 7) / 8 * 8; + h_token_num = seq_len * input_batch_size; + cudaMemsetAsync(encoder_input_ptr, 0, sizeof(T) * input_batch_size * seq_len * embed_dim_, stream_); + invokeRebuildPadding( + encoder_input_ptr, embed_buf_2_, padding_offset_, nopad_token_num_, head_num_ * head_dim_, stream_); + } + } + + T* from_buf = encoder_input_ptr; + T* norm_out_buf = embed_buf_2_; + T* attn_out_buf = embed_buf_3_; + T* encoder_out_buf = from_buf; + + for (uint i = 0; i < num_layer_; i++) { + + invokeGeneralLayerNorm(norm_out_buf, + from_buf, + weights->vit_layer_weights[i].attn_layernorm_weights.gamma, + weights->vit_layer_weights[i].attn_layernorm_weights.beta, + h_token_num, + embed_dim_, + stream_); + // Attention + { + + std::vector attn_input_tensors{ + Tensor{MEMORY_GPU, data_type, std::vector{h_token_num, embed_dim_}, norm_out_buf}, + Tensor{MEMORY_GPU, data_type, std::vector{input_batch_size, 1, seq_len, seq_len}, mask_buf_}, + *offset_tensor_ptr}; + std::vector attn_output_tensors{ + Tensor{MEMORY_GPU, data_type, std::vector{h_token_num, embed_dim_}, attn_out_buf}}; + + attention_layer_->forward( + &attn_output_tensors, &attn_input_tensors, &weights->vit_layer_weights[i].attention_weights); + } + + invokeGeneralAddBiasResidualPreLayerNorm( + from_buf, + norm_out_buf, + attn_out_buf, + weights->vit_layer_weights[i].ffn_layernorm_weights.gamma, + weights->vit_layer_weights[i].ffn_layernorm_weights.beta, + weights->vit_layer_weights[i].attention_weights.attention_output_weight.bias, + h_token_num, + embed_dim_, + stream_); + + // FFN + { + std::vector ffn_input_tensors{ + Tensor{MEMORY_GPU, data_type, std::vector{h_token_num, embed_dim_}, norm_out_buf}}; + std::vector ffn_output_tensors{ + Tensor{MEMORY_GPU, data_type, std::vector{h_token_num, embed_dim_}, attn_out_buf}}; + ffn_layer_->forward(&ffn_output_tensors, &ffn_input_tensors, &weights->vit_layer_weights[i].ffn_weights); + } + + invokeAddBiasResidual(from_buf, + attn_out_buf, + weights->vit_layer_weights[i].ffn_weights.output_weight.bias, + h_token_num, + embed_dim_, + stream_); + + sync_check_cuda_error(); + } + + invokeGeneralLayerNorm(need_padding ? norm_out_buf : output, + from_buf, + weights->post_transformer_layernorm_weights.gamma, + weights->post_transformer_layernorm_weights.beta, + h_token_num, + embed_dim_, + stream_); + + if (need_padding) { + invokeRemovePadding(output, norm_out_buf, padding_offset_, nopad_token_num_, head_num_ * head_dim_, stream_); + } + + if (is_free_buffer_after_forward_ == true) { + freeBuffer(); + } + sync_check_cuda_error(); + + SAFE_FREE(offset_tensor_ptr); +} + +template +bool ViTTransformer::resetBatch(size_t batch_size) +{ + if (max_batch_size_ < batch_size) { + max_batch_size_ = batch_size; + } + + return true; +} + +template +bool ViTTransformer::setSeqLenVec(size_t batch_size) +{ + int* seq_len_vec = new int[batch_size]; + for (int i = 0; i < batch_size; i++) { + seq_len_vec[i] = request_seq_len_; + } + cudaMemcpy(seq_len_vec_, seq_len_vec, sizeof(int) * batch_size, cudaMemcpyHostToDevice); + delete seq_len_vec; + return true; +} + +template +void ViTTransformer::setDefaultMask(size_t batch_size) +{ + invokeBuildEncoderAttentionMask(mask_buf_, seq_len_vec_, batch_size, max_seq_len_, stream_); +} + +template +void ViTTransformer::setDefaultPaddingOffset(size_t batch_size) +{ + invokeGetPaddingOffset( + &nopad_token_num_, token_num_, padding_offset_, seq_len_vec_, batch_size, max_seq_len_, stream_); +} + +template +void ViTTransformer::patchEmbed(T* output, + const T* input, + const T* kernel, + const T* bias, + const T* cls_embed, + const T* pos_embed, + const int batch, + const int img_size, + const int patch_size, + const int seq_len, + const int in_chans, + const int embed_dim) +{ + T* tmp_buf = with_cls_token_ ? (output == embed_buf_1_ ? embed_buf_2_ : embed_buf_1_) : output; + + conv2d( + tmp_buf, input, kernel, batch, img_size, img_size, in_chans, embed_dim, patch_size, patch_size, cudnn_handle_); + int n = embed_dim; + int s = seq_len; + int m = batch * s; + if (with_cls_token_) { + FT_CHECK(cls_embed != nullptr); + invokeAddBiasConcatClsTokenAddPosEmbed(tmp_buf, output, bias, cls_embed, pos_embed, m, n, s, stream_); + } + else { + invokeAddBiasAddPosEmbed(tmp_buf, bias, pos_embed, m, n, s * n, stream_); + } +} + +template class ViTTransformer; +template class ViTTransformer; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/vit/ViT.h b/src/fastertransformer/models/vit/ViT.h new file mode 100644 index 000000000..27fda8683 --- /dev/null +++ b/src/fastertransformer/models/vit/ViT.h @@ -0,0 +1,116 @@ +/* + * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include + +// #include "src/fastertransformer/kernels/bert_preprocess_kernels.h" +#include "src/fastertransformer/layers/FfnLayer.h" +#include "src/fastertransformer/layers/attention_layers/FusedAttentionLayer.h" +#include "src/fastertransformer/layers/attention_layers/UnfusedAttentionLayer.h" +#include "src/fastertransformer/models/vit/ViTWeight.h" +#include "src/fastertransformer/utils/conv2d.h" + +namespace fastertransformer { + +template +class ViTTransformer: public BaseLayer { +private: + size_t max_batch_size_ = 0; + size_t img_size_ = 224; + size_t chn_num_ = 3; + size_t patch_size_ = 16; // preproc patch size + size_t max_seq_len_; + size_t request_seq_len_; + size_t embed_dim_; // patch conv out units, size_per_head = embed_dim / head_num + size_t head_num_; // mha head num + size_t head_dim_; // mha head size + size_t inter_size_; // FF internal size + size_t num_layer_; + size_t nopad_token_num_; + bool with_cls_token_; + int sm_; + float q_scaling_; + AttentionType attention_type_; + cudnnHandle_t cudnn_handle_; + + BaseAttentionLayer* attention_layer_; + FfnLayer* ffn_layer_; + + bool is_allocate_buffer_ = false; + + void allocateBuffer(); + void freeBuffer(); + bool resetBatch(size_t batch_size); + bool setSeqLenVec(size_t batch_size); + void setDefaultMask(size_t batch_size); + void setDefaultPaddingOffset(size_t batch_size); + void patchEmbed(T* output, + const T* input, + const T* kernel, + const T* bias, + const T* cls_embed, + const T* pos_embed, + const int batch, + const int img_size, + const int patch_size, + const int seq_len, + const int in_chans, + const int embed_dim); + void initialize(); + + void allocateBuffer(size_t batch_size); + +protected: + // size_t* token_num_ = nullptr; + T* embed_buf_1_ = nullptr; + T* embed_buf_2_ = nullptr; + T* embed_buf_3_ = nullptr; + T* mask_buf_ = nullptr; + int* trt_mha_padding_offset_ = nullptr; + int* seq_len_vec_ = nullptr; + int* padding_offset_ = nullptr; + size_t* token_num_ = nullptr; + +public: + ViTTransformer(size_t max_batch_size, + size_t img_size, + size_t chn_num, + size_t patch_size, + size_t embed_dim, + size_t head_num, + size_t inter_size, + size_t num_layer, + bool with_cls_token, + int sm, + float q_scaling, + cudaStream_t stream, + cudnnHandle_t cudnn_handle, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + AttentionType attention_type); + + ViTTransformer(ViTTransformer const& vit_layer); + + ~ViTTransformer(); + + void + forward(std::vector* output_tensors, const std::vector* input_tensors, const ViTWeight* weights); +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/vit/ViTLayerWeight.h b/src/fastertransformer/models/vit/ViTLayerWeight.h new file mode 100644 index 000000000..69f5d824f --- /dev/null +++ b/src/fastertransformer/models/vit/ViTLayerWeight.h @@ -0,0 +1,310 @@ +/* + * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/kernels/layernorm_kernels.h" +#include "src/fastertransformer/layers/FfnWeight.h" +#include "src/fastertransformer/layers/attention_layers/AttentionWeight.h" +#include "src/fastertransformer/utils/cublasMMWrapper.h" +#include "src/fastertransformer/utils/memory_utils.h" + +namespace fastertransformer { + +#define WEIGHT_N 16 + +template +struct ViTLayerWeight { + + ViTLayerWeight() = delete; + ViTLayerWeight(const int embed_dim, const int inter_size, int layer_idx, const bool hold_buffer): + embed_dim_(embed_dim), inter_size_(inter_size), layer_idx_(layer_idx) + { + weights_size[0] = embed_dim_ * embed_dim_; + weights_size[1] = embed_dim_; + weights_size[2] = embed_dim_ * embed_dim_; + weights_size[3] = embed_dim_; + weights_size[4] = embed_dim_ * embed_dim_; + weights_size[5] = embed_dim_; + weights_size[6] = embed_dim_ * embed_dim_; + weights_size[7] = embed_dim_; + weights_size[8] = embed_dim_; + weights_size[9] = embed_dim_; + weights_size[10] = embed_dim_ * inter_size_; + weights_size[11] = inter_size_; + weights_size[12] = inter_size_ * embed_dim_; + weights_size[13] = embed_dim_; + weights_size[14] = embed_dim_; + weights_size[15] = embed_dim_; + if (hold_buffer) { + for (int i = 0; i < WEIGHT_N; i++) { + deviceMalloc(&weights_ptr[i], weights_size[i]); + } + + setWeightPtr(); + } + } + + ~ViTLayerWeight() + { + if (is_maintain_buffer == true) { + for (int i = 0; i < WEIGHT_N; i++) { + deviceFree(weights_ptr[i]); + } + + attention_weights.query_weight.kernel = nullptr; + attention_weights.query_weight.bias = nullptr; + attention_weights.key_weight.kernel = nullptr; + attention_weights.key_weight.bias = nullptr; + attention_weights.value_weight.kernel = nullptr; + attention_weights.value_weight.bias = nullptr; + attention_weights.attention_output_weight.kernel = nullptr; + attention_weights.attention_output_weight.bias = nullptr; + attn_layernorm_weights.gamma = nullptr; + attn_layernorm_weights.beta = nullptr; + ffn_weights.intermediate_weight.kernel = nullptr; + ffn_weights.intermediate_weight.bias = nullptr; + ffn_weights.output_weight.kernel = nullptr; + ffn_weights.output_weight.bias = nullptr; + ffn_layernorm_weights.gamma = nullptr; + ffn_layernorm_weights.beta = nullptr; + is_maintain_buffer = false; + } + } + + ViTLayerWeight(const ViTLayerWeight& other): embed_dim_(other.embed_dim_), inter_size_(other.inter_size_) + { + memcpy(weights_size, other.weights_size, sizeof(size_t) * WEIGHT_N); + layer_idx_ = other.layer_idx_; + if (other.is_maintain_buffer) { + for (int i = 0; i < WEIGHT_N; i++) { + if (!is_maintain_buffer) { + deviceMalloc(&weights_ptr[i], weights_size[i]); + } + cudaD2Dcpy(weights_ptr[i], other.weights_ptr[i], weights_size[i]); + } + + setWeightPtr(); + } + } + + ViTLayerWeight& operator=(const ViTLayerWeight& other) + { + embed_dim_ = other.embed_dim_; + inter_size_ = other.inter_size_; + layer_idx_ = other.layer_idx_; + memcpy(weights_size, other.weights_size, sizeof(size_t) * WEIGHT_N); + if (other.is_maintain_buffer) { + for (int i = 0; i < WEIGHT_N; i++) { + if (!is_maintain_buffer) { + deviceMalloc(&weights_ptr[i], weights_size[i]); + } + cudaD2Dcpy(weights_ptr[i], other.weights_ptr[i], weights_size[i]); + } + + setWeightPtr(); + } + + return *this; + } + + inline size_t GetWeightCount() + { + return WEIGHT_N; + } + + size_t GetSerializeSize() + { + size_t count; + for (int i = 0; i < WEIGHT_N; i++) { + count += weights_size[i]; + } + + return sizeof(T) * count; + } + + void CopyWeightsFromHostBuffers(const T* const*& w) + { + cudaMemcpy( + const_cast(attn_layernorm_weights.gamma), *w++, sizeof(T) * weights_size[8], cudaMemcpyHostToDevice); + cudaMemcpy( + const_cast(attn_layernorm_weights.beta), *w++, sizeof(T) * weights_size[9], cudaMemcpyHostToDevice); + cudaMemcpy(const_cast(attention_weights.query_weight.kernel), + *w++, + sizeof(T) * weights_size[0], + cudaMemcpyHostToDevice); + cudaMemcpy(const_cast(attention_weights.query_weight.bias), + *w++, + sizeof(T) * weights_size[1], + cudaMemcpyHostToDevice); + cudaMemcpy(const_cast(attention_weights.key_weight.kernel), + *w++, + sizeof(T) * weights_size[2], + cudaMemcpyHostToDevice); + cudaMemcpy(const_cast(attention_weights.key_weight.bias), + *w++, + sizeof(T) * weights_size[3], + cudaMemcpyHostToDevice); + cudaMemcpy(const_cast(attention_weights.value_weight.kernel), + *w++, + sizeof(T) * weights_size[4], + cudaMemcpyHostToDevice); + cudaMemcpy(const_cast(attention_weights.value_weight.bias), + *w++, + sizeof(T) * weights_size[5], + cudaMemcpyHostToDevice); + cudaMemcpy(const_cast(attention_weights.attention_output_weight.kernel), + *w++, + sizeof(T) * weights_size[6], + cudaMemcpyHostToDevice); + cudaMemcpy(const_cast(attention_weights.attention_output_weight.bias), + *w++, + sizeof(T) * weights_size[7], + cudaMemcpyHostToDevice); + cudaMemcpy( + const_cast(ffn_layernorm_weights.gamma), *w++, sizeof(T) * weights_size[14], cudaMemcpyHostToDevice); + cudaMemcpy( + const_cast(ffn_layernorm_weights.beta), *w++, sizeof(T) * weights_size[15], cudaMemcpyHostToDevice); + cudaMemcpy(const_cast(ffn_weights.intermediate_weight.kernel), + *w++, + sizeof(T) * weights_size[10], + cudaMemcpyHostToDevice); + cudaMemcpy(const_cast(ffn_weights.intermediate_weight.bias), + *w++, + sizeof(T) * weights_size[11], + cudaMemcpyHostToDevice); + cudaMemcpy(const_cast(ffn_weights.output_weight.kernel), + *w++, + sizeof(T) * weights_size[12], + cudaMemcpyHostToDevice); + cudaMemcpy( + const_cast(ffn_weights.output_weight.bias), *w++, sizeof(T) * weights_size[13], cudaMemcpyHostToDevice); + } + + void serialize(void* buffer) + { + char* tmp_buf = (char*)buffer; + for (int i = 0; i < WEIGHT_N; i++) { + cudaMemcpy(tmp_buf, weights_ptr[i], sizeof(T) * weights_size[i], cudaMemcpyDeviceToHost); + tmp_buf += sizeof(T) * weights_size[i]; + } + } + + void deserialize(const void* buffer) + { + if (!is_maintain_buffer) { + return; + } + + char* tmp_buf = (char*)buffer; + for (int i = 0; i < WEIGHT_N; i++) { + cudaMemcpy(weights_ptr[i], tmp_buf, sizeof(T) * weights_size[i], cudaMemcpyHostToDevice); + tmp_buf += sizeof(T) * weights_size[i]; + } + } + + void ExportWeights(int layer_idx) const + { + DataType dtype = DataType::TYPE_INVALID; + if (std::is_same::value) { + dtype = DataType::TYPE_FP16; + } + else if (std::is_same::value) { + dtype = DataType::TYPE_FP32; + } + + std::ostringstream buffer; + buffer << "./weights/l" << layer_idx; + + Tensor w1{ + MEMORY_GPU, dtype, std::vector{embed_dim_, embed_dim_}, attention_weights.query_weight.kernel}; + w1.save(std::string(buffer.str()) + "_q_kern.npy"); + Tensor w2{MEMORY_GPU, dtype, std::vector{embed_dim_}, attention_weights.query_weight.bias}; + w2.save(std::string(buffer.str()) + "_q_bias.npy"); + Tensor w3{MEMORY_GPU, dtype, std::vector{embed_dim_, embed_dim_}, attention_weights.key_weight.kernel}; + w3.save(std::string(buffer.str()) + "_k_kern.npy"); + Tensor w4{MEMORY_GPU, dtype, std::vector{embed_dim_}, attention_weights.key_weight.bias}; + w4.save(std::string(buffer.str()) + "_k_bias.npy"); + Tensor w5{ + MEMORY_GPU, dtype, std::vector{embed_dim_, embed_dim_}, attention_weights.value_weight.kernel}; + w5.save(std::string(buffer.str()) + "_v_kern.npy"); + Tensor w6{MEMORY_GPU, dtype, std::vector{embed_dim_}, attention_weights.value_weight.bias}; + w6.save(std::string(buffer.str()) + "_v_bias.npy"); + Tensor w7{MEMORY_GPU, + dtype, + std::vector{embed_dim_, embed_dim_}, + attention_weights.attention_output_weight.kernel}; + w7.save(std::string(buffer.str()) + "_att_o_kern.npy"); + Tensor w8{MEMORY_GPU, dtype, std::vector{embed_dim_}, attention_weights.attention_output_weight.bias}; + w8.save(std::string(buffer.str()) + "_att_o_bias.npy"); + Tensor w9{MEMORY_GPU, dtype, std::vector{embed_dim_}, attn_layernorm_weights.gamma}; + w9.save(std::string(buffer.str()) + "_ln0_scale.npy"); + Tensor w10{MEMORY_GPU, dtype, std::vector{embed_dim_}, attn_layernorm_weights.beta}; + w10.save(std::string(buffer.str()) + "_ln0_bias.npy"); + Tensor w11{ + MEMORY_GPU, dtype, std::vector{embed_dim_, inter_size_}, ffn_weights.intermediate_weight.kernel}; + w11.save(std::string(buffer.str()) + "_ffn_inter_kern.npy"); + Tensor w12{MEMORY_GPU, dtype, std::vector{inter_size_}, ffn_weights.intermediate_weight.bias}; + w12.save(std::string(buffer.str()) + "_ffn_inter_bias.npy"); + Tensor w13{MEMORY_GPU, dtype, std::vector{inter_size_, embed_dim_}, ffn_weights.output_weight.kernel}; + w13.save(std::string(buffer.str()) + "_ffn_o_kern.npy"); + Tensor w14{MEMORY_GPU, dtype, std::vector{embed_dim_}, ffn_weights.output_weight.bias}; + w14.save(std::string(buffer.str()) + "_ffn_o_bias.npy"); + Tensor w15{MEMORY_GPU, dtype, std::vector{embed_dim_}, ffn_layernorm_weights.gamma}; + w15.save(std::string(buffer.str()) + "_ln2_scale.npy"); + Tensor w16{MEMORY_GPU, dtype, std::vector{embed_dim_}, ffn_layernorm_weights.beta}; + w16.save(std::string(buffer.str()) + "_ln2_bias.npy"); + } + + AttentionWeight attention_weights; + LayerNormWeight attn_layernorm_weights; + FfnWeight ffn_weights; + LayerNormWeight ffn_layernorm_weights; + +private: + void setWeightPtr() + { + attention_weights.query_weight.kernel = weights_ptr[0]; + attention_weights.query_weight.bias = weights_ptr[1]; + attention_weights.key_weight.kernel = weights_ptr[2]; + attention_weights.key_weight.bias = weights_ptr[3]; + attention_weights.value_weight.kernel = weights_ptr[4]; + attention_weights.value_weight.bias = weights_ptr[5]; + attention_weights.attention_output_weight.kernel = weights_ptr[6]; + attention_weights.attention_output_weight.bias = weights_ptr[7]; + attn_layernorm_weights.gamma = weights_ptr[8]; + attn_layernorm_weights.beta = weights_ptr[9]; + ffn_weights.intermediate_weight.kernel = weights_ptr[10]; + ffn_weights.intermediate_weight.bias = weights_ptr[11]; + ffn_weights.output_weight.kernel = weights_ptr[12]; + ffn_weights.output_weight.bias = weights_ptr[13]; + ffn_layernorm_weights.gamma = weights_ptr[14]; + ffn_layernorm_weights.beta = weights_ptr[15]; + + is_maintain_buffer = true; + } + int embed_dim_; + int inter_size_; + int layer_idx_; + bool is_maintain_buffer = false; + T* weights_ptr[WEIGHT_N]{nullptr}; + size_t weights_size[WEIGHT_N]; + bool is_maintain_sp_buffer = false; +}; + +#undef WEIGHT_N + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/vit/ViTWeight.h b/src/fastertransformer/models/vit/ViTWeight.h new file mode 100644 index 000000000..356a6f6d9 --- /dev/null +++ b/src/fastertransformer/models/vit/ViTWeight.h @@ -0,0 +1,306 @@ +/* + * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/layers/DenseWeight.h" +#include "src/fastertransformer/models/vit/ViTLayerWeight.h" + +namespace fastertransformer { + +template +struct ViTEmbeds { + const T* class_embed; + const T* position_embed; +}; + +#define WEIGHT_N 6 +template +struct ViTWeight { + + ViTWeight() = delete; + ViTWeight(const int embed_dim, + const int inter_size, + const int num_layer, + const int img_size, + const int patch_size, + const int chn_num, + const bool with_cls_token, + const bool hold_buffer = true): + with_cls_token_(with_cls_token), + embed_dim_(embed_dim), + inter_size_(inter_size), + num_layer_(num_layer), + img_size_(img_size), + patch_size_(patch_size), + chn_num_(chn_num), + seq_len_(img_size_ * img_size_ / (patch_size_ * patch_size_) + (with_cls_token_ ? 1 : 0)) + { + weights_size[0] = chn_num_ * patch_size_ * patch_size_ * embed_dim_; + weights_size[1] = embed_dim_; + weights_size[2] = with_cls_token_ ? embed_dim_ : 0; + weights_size[3] = embed_dim_ * seq_len_; + weights_size[4] = embed_dim_; + weights_size[5] = embed_dim_; + + if (hold_buffer) { + for (int i = 0; i < WEIGHT_N; i++) { + if (weights_size[i] == 0) { + continue; + } + + deviceMalloc(&weights_ptr[i], weights_size[i]); + } + + setWeightPtr(); + } + + for (int i = 0; i < num_layer_; i++) { + vit_layer_weights.push_back(ViTLayerWeight(embed_dim_, inter_size_, i, hold_buffer)); + } + } + + ~ViTWeight() + { + if (is_maintain_buffer == true) { + vit_layer_weights.clear(); + for (int i = 0; i < WEIGHT_N; i++) { + if (weights_ptr[i] != nullptr) { + deviceFree(weights_ptr[i]); + } + } + + post_transformer_layernorm_weights.gamma = nullptr; + post_transformer_layernorm_weights.beta = nullptr; + pre_transform_embeds.class_embed = nullptr; + pre_transform_embeds.position_embed = nullptr; + pre_encoder_conv_weights.kernel = nullptr; + pre_encoder_conv_weights.bias = nullptr; + is_maintain_buffer = false; + } + } + + ViTWeight(const ViTWeight& other): + with_cls_token_(other.with_cls_token_), + embed_dim_(other.embed_dim_), + inter_size_(other.inter_size_), + num_layer_(other.num_layer_), + img_size_(other.img_size_), + patch_size_(other.patch_size_), + chn_num_(other.chn_num_), + seq_len_(other.seq_len_) + { + memcpy(weights_size, other.weights_size, sizeof(size_t) * WEIGHT_N); + if (other.is_maintain_buffer) { + for (int i = 0; i < WEIGHT_N; i++) { + if (!is_maintain_buffer) { + deviceMalloc(&weights_ptr[i], weights_size[i]); + } + cudaD2Dcpy(weights_ptr[i], other.weights_ptr[i], weights_size[i]); + } + setWeightPtr(); + } + + vit_layer_weights.clear(); + for (int i = 0; i < num_layer_; i++) { + vit_layer_weights.push_back(other.vit_layer_weights[i]); + } + } + + ViTWeight& operator=(const ViTWeight& other) + { + embed_dim_ = other.embed_dim_; + inter_size_ = other.inter_size_; + num_layer_ = other.num_layer_; + img_size_ = other.img_size_; + patch_size_ = other.patch_size_; + chn_num_ = other.chn_num_; + seq_len_ = other.seq_len_; + with_cls_token_ = other.with_cls_token_; + memcpy(weights_size, other.weights_size, sizeof(size_t) * WEIGHT_N); + + if (other.is_maintain_buffer) { + for (int i = 0; i < WEIGHT_N; i++) { + if (!is_maintain_buffer) { + deviceMalloc(&weights_ptr[i], weights_size[i]); + } + cudaD2Dcpy(weights_ptr[i], other.weights_ptr[i], weights_size[i]); + } + setWeightPtr(); + } + + vit_layer_weights.clear(); + for (int i = 0; i < num_layer_; i++) { + vit_layer_weights.push_back(other.vit_layer_weights[i]); + } + + return *this; + } + + size_t GetSerializeSize() + { + size_t count; + for (int i = 0; i < WEIGHT_N; i++) { + count += weights_size[i]; + } + count *= sizeof(T); + + for (auto& lw : vit_layer_weights) { + count += lw.GetSerializeSize(); + } + + return count; + } + + void serialize(void* buffer) + { + char* tmp_buf = (char*)buffer; + for (int i = 0; i < WEIGHT_N; i++) { + cudaMemcpy(tmp_buf, weights_ptr[i], sizeof(T) * weights_size[i], cudaMemcpyDeviceToHost); + tmp_buf += sizeof(T) * weights_size[i]; + } + + for (auto& lw : vit_layer_weights) { + lw.serialize(tmp_buf); + tmp_buf += lw.GetSerializeSize(); + } + } + + void deserialize(const void* buffer) + { + if (!is_maintain_buffer) { + return; + } + + char* tmp_buf = (char*)buffer; + for (int i = 0; i < WEIGHT_N; i++) { + cudaMemcpy(weights_ptr[i], tmp_buf, sizeof(T) * weights_size[i], cudaMemcpyHostToDevice); + tmp_buf += sizeof(T) * weights_size[i]; + } + + for (auto& lw : vit_layer_weights) { + lw.deserialize(tmp_buf); + tmp_buf += lw.GetSerializeSize(); + } + } + + void CopyWeightsFromHostBuffers(const T* const*& w) + { + cudaMemcpy( + const_cast(pre_encoder_conv_weights.kernel), *w++, sizeof(T) * weights_size[0], cudaMemcpyHostToDevice); + cudaMemcpy( + const_cast(pre_encoder_conv_weights.bias), *w++, sizeof(T) * weights_size[1], cudaMemcpyHostToDevice); + if (with_cls_token_) { + cudaMemcpy(const_cast(pre_transform_embeds.class_embed), + *w++, + sizeof(T) * weights_size[2], + cudaMemcpyHostToDevice); + with_cls_token_ = true; + } + cudaMemcpy(const_cast(pre_transform_embeds.position_embed), + *w++, + sizeof(T) * weights_size[3], + cudaMemcpyHostToDevice); + + for (int i = 0; i < num_layer_; i++) { + auto& layer_weight = vit_layer_weights[i]; + layer_weight.CopyWeightsFromHostBuffers(w); + } + + cudaMemcpy(const_cast(post_transformer_layernorm_weights.gamma), + *w++, + sizeof(T) * weights_size[4], + cudaMemcpyHostToDevice); + cudaMemcpy(const_cast(post_transformer_layernorm_weights.beta), + *w++, + sizeof(T) * weights_size[5], + cudaMemcpyHostToDevice); + } + + inline size_t GetWeightCount() + { + size_t weight_count = WEIGHT_N; + weight_count += num_layer_ * vit_layer_weights[0].GetWeightCount(); + + return weight_count; + } + + void ExportWeights() const + { + DataType dtype = DataType::TYPE_INVALID; + if (std::is_same::value) { + dtype = DataType::TYPE_FP16; + } + else if (std::is_same::value) { + dtype = DataType::TYPE_FP32; + } + + Tensor conv_kernel{MEMORY_GPU, + dtype, + std::vector{embed_dim_, chn_num_, patch_size_, patch_size_}, + pre_encoder_conv_weights.kernel}; // OIHW + conv_kernel.save("./weights/conv_kernel.npy"); + Tensor conv_bias{MEMORY_GPU, dtype, std::vector{embed_dim_}, pre_encoder_conv_weights.bias}; // OIHW + conv_bias.save("./weights/conv_bias.npy"); + Tensor cls_token{MEMORY_GPU, dtype, std::vector{embed_dim_}, pre_transform_embeds.class_embed}; + if (with_cls_token_) { + cls_token.save("./weights/cls_token.npy"); + } + Tensor pos_embed{ + MEMORY_GPU, dtype, std::vector{1, seq_len_, embed_dim_}, pre_transform_embeds.position_embed}; + pos_embed.save("./weights/pos_embed.npy"); + Tensor ln_gamma{MEMORY_GPU, dtype, std::vector{embed_dim_}, post_transformer_layernorm_weights.gamma}; + ln_gamma.save("./weights/enc_ln_scale.npy"); + Tensor ln_beta{MEMORY_GPU, dtype, std::vector{embed_dim_}, post_transformer_layernorm_weights.beta}; + ln_beta.save("./weights/enc_ln_bias.npy"); + + for (int i = 0; i < num_layer_; i++) { + vit_layer_weights[i].ExportWeights(i); + } + } + + std::vector> vit_layer_weights; + LayerNormWeight post_transformer_layernorm_weights; + ViTEmbeds pre_transform_embeds; + DenseWeight pre_encoder_conv_weights; + bool with_cls_token_; + +private: + void setWeightPtr() + { + pre_encoder_conv_weights.kernel = weights_ptr[0]; + pre_encoder_conv_weights.bias = weights_ptr[1]; + pre_transform_embeds.class_embed = weights_ptr[2]; + pre_transform_embeds.position_embed = weights_ptr[3]; + post_transformer_layernorm_weights.gamma = weights_ptr[4]; + post_transformer_layernorm_weights.beta = weights_ptr[5]; + + is_maintain_buffer = true; + } + int embed_dim_; + int inter_size_; + int num_layer_; + int img_size_; + int patch_size_; + int chn_num_; + int seq_len_; + bool is_maintain_buffer = false; + T* weights_ptr[WEIGHT_N]{nullptr}; + size_t weights_size[WEIGHT_N]; +}; + +#undef WEIGHT_N +} // namespace fastertransformer diff --git a/src/fastertransformer/models/vit/vit_gemm.cc b/src/fastertransformer/models/vit/vit_gemm.cc new file mode 100644 index 000000000..00281561c --- /dev/null +++ b/src/fastertransformer/models/vit/vit_gemm.cc @@ -0,0 +1,104 @@ +/* + * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/utils/gemm_test/encoder_gemm_func.h" +#include "src/fastertransformer/utils/gemm_test/encoder_igemm_func.h" +#include "src/fastertransformer/utils/memory_utils.h" + +namespace ft = fastertransformer; + +int main(int argc, char* argv[]) +{ + if (argc != 9) { + printf( + "[ERROR] vit_gemm batch_size img_size patch_size embed_dim head_number with_cls_token data_type int8_mode \n"); + printf("e.g. ./bin/vit_gemm 1 224 16 768 12 1 0 0\n"); + return 0; + } + + const int batch_size = atoi(argv[1]); + const int img_size = atoi(argv[2]); + const int patch_size = atoi(argv[3]); + const int embed_dim = atoi(argv[4]); + const int head_num = atoi(argv[5]); + const int with_cls_token = atoi(argv[6]); + const ft::CublasDataType data_type = static_cast(atoi(argv[7])); // 0 FP32, 1 FP16, 2 BF 16 + const int int8_mode = atoi(argv[8]); + + printf("[INFO] arguments: \n"); + printf(" batch_size: %d \n", batch_size); + printf(" img_size: %d \n", img_size); + printf(" patch_size: %d \n", patch_size); + printf(" embed_dim: %d \n", embed_dim); + printf(" head_num: %d \n", head_num); + printf(" with_cls_token: %d \n", with_cls_token); + printf(" data_type: %d \n", data_type); + printf(" int8_mode: %d \n", int8_mode); + + if (img_size % patch_size != 0) { + printf("[ERROR] Invalid img_size and patch_size, (i=%d mod p=%d) !=0\n", img_size, patch_size); + return -1; + } + + if (embed_dim % head_num != 0) { + printf("[ERROR] Invalid embed_dim and head_num, (e=%d mod h=%d) != 0\n", embed_dim, head_num); + } + + const int patch_resol = img_size / patch_size; + int seq_len = patch_resol * patch_resol + (with_cls_token != 0 ? 1 : 0); + if (atoi(argv[7]) == 1 && seq_len > 384 && seq_len % 8 != 0) { + seq_len = (seq_len + 7) / 8 * 8; + } + const int size_per_head = embed_dim / head_num; + + const int inter_size = 4 * head_num * size_per_head; + + std::cout << std::endl; + + void* gemm_test_buf; + size_t buf_size_in_byte = + ft::calGemmTestBufSizeInByte(batch_size, seq_len, head_num, size_per_head, inter_size, 0, int8_mode, data_type); + size_t total, free; + ft::check_cuda_error(cudaMemGetInfo(&free, &total)); + if (free < buf_size_in_byte + 10 * 1024 * 1024) { + printf("[ERROR] There is no enough device memory for gemm test!\n" + " %ld Bytes is needed, but only %ld Bytes is free.\n", + buf_size_in_byte, + free); + gemm_test_buf = NULL; + return -1; + } + else { + ft::deviceMalloc(reinterpret_cast(&gemm_test_buf), buf_size_in_byte, false); + } + + if (int8_mode != 0) { + ft::generate_encoder_igemm_config(batch_size, seq_len, head_num, size_per_head, gemm_test_buf, false); + } + else if (data_type == ft::FLOAT_DATATYPE) { + ft::generate_encoder_gemm_config(batch_size, seq_len, head_num, size_per_head, gemm_test_buf, false); + } + else if (data_type == ft::HALF_DATATYPE) { + ft::generate_encoder_gemm_config(batch_size, seq_len, head_num, size_per_head, gemm_test_buf, false); + } + else { + printf("[ERROR] is_fp16 should be 0 (use float) or 1 (use half). \n"); + return -1; + } + + ft::check_cuda_error(cudaFree(gemm_test_buf)); + return 0; +} diff --git a/src/fastertransformer/models/vit_int8/CMakeLists.txt b/src/fastertransformer/models/vit_int8/CMakeLists.txt new file mode 100644 index 000000000..dffc48d55 --- /dev/null +++ b/src/fastertransformer/models/vit_int8/CMakeLists.txt @@ -0,0 +1,23 @@ +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +cmake_minimum_required(VERSION 3.8) + +add_library(ViTINT8 STATIC ViTINT8.cc) +set_property(TARGET ViTINT8 PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET ViTINT8 PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(ViTINT8 PUBLIC -lcudart -lcublasLt -lcublas cublasINT8MMWrapper + UnfusedAttentionLayerINT8 FusedAttentionLayerINT8 FfnLayerINT8 layernorm_kernels + layernorm_int8_kernels add_residual_kernels activation_kernels layout_transformer_int8_kernels + vit_kernels bert_preprocess_kernels) diff --git a/src/fastertransformer/models/vit_int8/ViTINT8.cc b/src/fastertransformer/models/vit_int8/ViTINT8.cc new file mode 100644 index 000000000..f61078511 --- /dev/null +++ b/src/fastertransformer/models/vit_int8/ViTINT8.cc @@ -0,0 +1,507 @@ +/* + * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/vit_int8/ViTINT8.h" +#include "src/fastertransformer/kernels/add_residual_kernels.h" +#include "src/fastertransformer/kernels/bert_preprocess_kernels.h" +#include "src/fastertransformer/kernels/layernorm_int8_kernels.h" +#include "src/fastertransformer/kernels/layout_transformer_int8_kernels.h" +#include "src/fastertransformer/kernels/vit_kernels.h" + +#define SAFE_FREE(x) \ + if (x) { \ + delete x; \ + x = nullptr; \ + } + +namespace fastertransformer { + +template +void ViTTransformerINT8::initialize() +{ + if (img_size_ % patch_size_ != 0) { + std::ostringstream buffer; + buffer << "[FT][ERROR] IMG size & PITCH size missmatch. " << img_size_ << " % " << patch_size_ << " !=0 \n"; + throw std::runtime_error(buffer.str()); + } + + if (head_num_ * head_dim_ != embed_dim_) { + std::ostringstream buffer; + buffer << "[FT][ERROR] Embed size and head number mismatch. Embed_dim=" << embed_dim_ + << "; head_num*head_dim = " + << "(" << head_num_ << "*" << head_dim_ << ")=" << head_num_ * head_dim_ << std::endl; + throw std::runtime_error(buffer.str()); + } + + max_seq_len_ = request_seq_len_; + if ((attention_type_ == AttentionType::FUSED_MHA) && std::is_same::value == true && head_dim_ <= 384) { + attention_layer_ = new FusedAttentionLayerINT8(max_batch_size_, + max_seq_len_, + head_num_, + head_dim_, + sm_, + q_scaling_, + int8_mode_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + false); + } + else if (attention_type_ == AttentionType::UNFUSED_MHA) { + if (request_seq_len_ % 32 != 0 && std::is_same::value) { + max_seq_len_ = (request_seq_len_ + 31) / 32 * 32; + FT_LOG_DEBUG("Request sequence length(%lu) is odd with unfused mha. Padding to %lu\n", + request_seq_len_, + max_seq_len_); + } + attention_layer_ = new UnfusedAttentionLayerINT8(max_batch_size_, + max_seq_len_, + head_num_, + head_dim_, + q_scaling_, + int8_mode_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + false); + } + else { + throw std::runtime_error(std::string("[FT][ERROR] Invalid attention type \n")); + } + + ffn_layer_ = new GeluFfnLayerINT8(max_batch_size_, + max_seq_len_, + head_num_, + head_dim_, + inter_size_, + int8_mode_, + stream_, + cublas_wrapper_, + allocator_, + is_free_buffer_after_forward_, + false); +} + +template +ViTTransformerINT8::ViTTransformerINT8(size_t max_batch_size, + size_t img_size, + size_t chn_num, + size_t patch_size, + size_t embed_dim, + size_t head_num, + size_t inter_size, + size_t num_layer, + bool with_cls_token, + int sm, + float q_scaling, + int int8_mode, + cudaStream_t stream, + cudnnHandle_t cudnn_handle, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + AttentionType attention_type): + BaseLayer(stream, cublas_wrapper, allocator, is_free_buffer_after_forward), + max_batch_size_(max_batch_size), + img_size_(img_size), + chn_num_(chn_num), + patch_size_(patch_size), + request_seq_len_(img_size * img_size / patch_size / patch_size + (with_cls_token ? 1 : 0)), + max_seq_len_(0), + embed_dim_(embed_dim), + head_num_(head_num), + head_dim_(embed_dim / head_num), + inter_size_(inter_size), + num_layer_(num_layer), + with_cls_token_(with_cls_token), + sm_(sm), + q_scaling_(q_scaling), + attention_type_(attention_type), + int8_mode_(int8_mode), + cudnn_handle_(cudnn_handle) +{ + initialize(); +} + +template +ViTTransformerINT8::ViTTransformerINT8(ViTTransformerINT8 const& vit): + BaseLayer(vit), + max_batch_size_(vit.max_batch_size_), + img_size_(vit.img_size_), + chn_num_(vit.chn_num_), + patch_size_(vit.patch_size_), + max_seq_len_(vit.max_seq_len_), + request_seq_len_(vit.request_seq_len_), + embed_dim_(vit.embed_dim_), + head_num_(vit.head_num_), + head_dim_(vit.head_dim_), + inter_size_(vit.inter_size_), + num_layer_(vit.num_layer_), + with_cls_token_(vit.with_cls_token_), + sm_(vit.sm_), + q_scaling_(vit.q_scaling_), + attention_type_(vit.attention_type_), + int8_mode_(vit.int8_mode_), + cudnn_handle_(vit.cudnn_handle_) +{ + initialize(); +} + +template +ViTTransformerINT8::~ViTTransformerINT8() +{ + delete attention_layer_; + delete ffn_layer_; + freeBuffer(); +} + +template +void ViTTransformerINT8::allocateBuffer() +{ + if (is_allocate_buffer_ == false) { + embed_buf_1_ = (T*)allocator_->malloc(sizeof(T) * max_batch_size_ * max_seq_len_ * embed_dim_, false); + embed_buf_2_ = (T*)allocator_->malloc(sizeof(int32_t) * max_batch_size_ * max_seq_len_ * embed_dim_, false); + embed_buf_3_ = (T*)allocator_->malloc(sizeof(int32_t) * max_batch_size_ * max_seq_len_ * embed_dim_, false); + embed_buf_4_ = (T*)allocator_->malloc(sizeof(T) * max_batch_size_ * max_seq_len_ * embed_dim_, false); + mask_buf_ = (T*)allocator_->malloc(sizeof(T) * max_batch_size_ * max_seq_len_ * max_seq_len_, false); + padding_offset_ = (int*)allocator_->malloc(sizeof(int) * max_batch_size_ * max_seq_len_, false); + token_num_ = (size_t*)allocator_->malloc(sizeof(size_t) * 1, false); + + trt_mha_padding_offset_ = (int*)allocator_->malloc(sizeof(int) * (2 * max_batch_size_ + 1), false); + seq_len_vec_ = (int*)allocator_->malloc(sizeof(int) * max_batch_size_, false); + + setSeqLenVec(max_batch_size_); + setDefaultMask(max_batch_size_); + setDefaultPaddingOffset(max_batch_size_); + + is_allocate_buffer_ = true; + } +} + +#define REMALLOC(var, size) \ + { \ + var = (decltype(var))allocator_->reMalloc(var, size, false); \ + FT_LOG_DEBUG("ReMalloc %s, ptr:%x, size:%lu", #var, var, size); \ + } + +template +void ViTTransformerINT8::allocateBuffer(size_t batch_size) +{ + if (is_allocate_buffer_ && batch_size <= max_batch_size_) { + return; + } + + batch_size = batch_size > max_batch_size_ ? batch_size : max_batch_size_; + embed_buf_1_ = (T*)allocator_->reMalloc(embed_buf_1_, sizeof(T) * batch_size * max_seq_len_ * embed_dim_, false); + embed_buf_2_ = + (T*)allocator_->reMalloc(embed_buf_2_, sizeof(int32_t) * batch_size * max_seq_len_ * embed_dim_, false); + embed_buf_3_ = + (T*)allocator_->reMalloc(embed_buf_3_, sizeof(int32_t) * batch_size * max_seq_len_ * embed_dim_, false); + embed_buf_4_ = (T*)allocator_->reMalloc(embed_buf_4_, sizeof(T) * batch_size * max_seq_len_ * embed_dim_, false); + mask_buf_ = (T*)allocator_->reMalloc(mask_buf_, sizeof(T) * batch_size * max_seq_len_ * max_seq_len_, false); + REMALLOC(padding_offset_, sizeof(int) * batch_size * max_seq_len_); + REMALLOC(token_num_, sizeof(size_t) * 1); + trt_mha_padding_offset_ = + (int*)allocator_->reMalloc(trt_mha_padding_offset_, sizeof(int) * (2 * batch_size + 1), false); + seq_len_vec_ = (int*)allocator_->reMalloc(seq_len_vec_, sizeof(int) * batch_size, false); + + resetBatch(batch_size); + setSeqLenVec(batch_size); + setDefaultPaddingOffset(batch_size); + setDefaultMask(batch_size); + + is_allocate_buffer_ = true; +} + +template +void ViTTransformerINT8::freeBuffer() +{ + allocator_->free(embed_buf_1_); + allocator_->free(embed_buf_2_); + allocator_->free(embed_buf_3_); + allocator_->free(embed_buf_4_); + allocator_->free(mask_buf_); + allocator_->free(trt_mha_padding_offset_); + allocator_->free(seq_len_vec_); + allocator_->free(padding_offset_); + allocator_->free(token_num_); + + is_allocate_buffer_ = false; +} + +template +void ViTTransformerINT8::forward(std::vector* output_tensors, + const std::vector* input_tensors, + const ViTINT8Weight* weights) +{ + // input_tensors: + // input_img, BCHW [batch, chn_num, img_size, img_size] + // output tensors: + // output classification [batch, seq_len, embed_dim] + + const size_t input_batch_size = input_tensors->at(0).shape[0]; + const size_t input_chn_num = input_tensors->at(0).shape[1]; + const size_t input_img_size = input_tensors->at(0).shape[2]; + const size_t patch_resol = input_img_size / patch_size_; + size_t seq_len = patch_resol * patch_resol + (with_cls_token_ ? 1 : 0); + const bool need_padding = + (attention_type_ == AttentionType::UNFUSED_MHA && seq_len % 32 != 0 && std::is_same::value); + + FT_CHECK(input_img_size == img_size_); + FT_CHECK(seq_len == request_seq_len_); + FT_CHECK(input_tensors->size() == 1); + FT_CHECK(input_tensors->at(0).shape.size() == 4); + FT_CHECK(output_tensors->size() == 1); + FT_CHECK(output_tensors->at(0).shape.size() == 3); + allocateBuffer(input_batch_size); + + const T* input = (const T*)input_tensors->at(0).data; + T* output = (T*)output_tensors->at(0).data; + T* encoder_input_ptr = embed_buf_1_; + + // preprocess (patches embedding, concat class embed and add pos embed) + patchEmbed(need_padding ? embed_buf_2_ : encoder_input_ptr, + input, + weights->pre_encoder_conv_weights.kernel, + weights->pre_encoder_conv_weights.bias, + weights->pre_transform_embeds.class_embed, + weights->pre_transform_embeds.position_embed, + input_batch_size, + input_img_size, + patch_size_, + seq_len, + input_chn_num, + embed_dim_); + + DataType data_type = getTensorType(); + size_t h_token_num = input_batch_size * seq_len; + T* norm_out_buf = embed_buf_2_; + T* attn_out_buf = embed_buf_3_; + T* encoder_out_buf = embed_buf_1_; + + // get offsets + Tensor* offset_tensor_ptr; + if (attention_type_ == AttentionType::FUSED_MHA) { + invokeGetTrtPaddingOffset(trt_mha_padding_offset_, seq_len_vec_, input_batch_size, stream_); + offset_tensor_ptr = + new Tensor(MEMORY_GPU, TYPE_INT32, std::vector{input_batch_size + 1}, trt_mha_padding_offset_); + } + else { + offset_tensor_ptr = new Tensor(MEMORY_GPU, TYPE_INT32, std::vector{0}, nullptr); + if (need_padding) { + seq_len = (seq_len + 31) / 32 * 32; + h_token_num = seq_len * input_batch_size; + cudaMemsetAsync(encoder_input_ptr, 0, sizeof(T) * input_batch_size * seq_len * embed_dim_, stream_); + invokeRebuildPadding( + encoder_input_ptr, embed_buf_2_, padding_offset_, nopad_token_num_, head_num_ * head_dim_, stream_); + } + } + T* from_buf = embed_buf_4_; + invokeTransposeMatrixColMajorToCOL32(from_buf, encoder_input_ptr, embed_dim_, h_token_num, stream_); + + for (uint i = 0; i < num_layer_; i++) { + const ScaleList* scalePtr = &(weights->vit_layer_weights[i].scale_list_); + + invokeLayernormCol32((int8_t*)norm_out_buf, + from_buf, + weights->vit_layer_weights[i].attn_layernorm_weights.gamma, + weights->vit_layer_weights[i].attn_layernorm_weights.beta, + h_token_num, + embed_dim_, + &(scalePtr->d_scale_list_[0 + 3]), + stream_); + + // Attention + { + + std::vector attn_input_tensors{ + Tensor{MEMORY_GPU, TYPE_INT8, std::vector{h_token_num, embed_dim_}, norm_out_buf}, + Tensor{MEMORY_GPU, data_type, std::vector{input_batch_size, 1, seq_len, seq_len}, mask_buf_}, + *offset_tensor_ptr}; + std::vector attn_output_tensors{ + Tensor{MEMORY_GPU, TYPE_INT8, std::vector{h_token_num, embed_dim_}, attn_out_buf}}; + attention_layer_->forward( + &attn_output_tensors, &attn_input_tensors, &weights->vit_layer_weights[i].attention_weights); + } + + if (int8_mode_ == 1) { + invokeAddBiasResidualLayerNormCol32_noRes( + (int8_t*)norm_out_buf, + (int32_t*)attn_out_buf, + from_buf, + weights->vit_layer_weights[i].attention_weights.attention_output_weight.bias, + weights->vit_layer_weights[i].ffn_layernorm_weights.gamma, + weights->vit_layer_weights[i].ffn_layernorm_weights.beta, + h_token_num, + embed_dim_, + stream_, + &(scalePtr->d_scale_list_[scalePtr->p2_offset_ + 3 * embed_dim_]), + &(scalePtr->d_scale_list_[36]), + &(scalePtr->d_scale_list_[44 + 3])); + } + else if (int8_mode_ == 2) { + invokeAddBiasResidualLayerNormCol32_noRes( + (int8_t*)norm_out_buf, + (int8_t*)attn_out_buf, + from_buf, + weights->vit_layer_weights[i].attention_weights.attention_output_weight.bias, + weights->vit_layer_weights[i].ffn_layernorm_weights.gamma, + weights->vit_layer_weights[i].ffn_layernorm_weights.beta, + h_token_num, + embed_dim_, + stream_, + &(scalePtr->d_scale_list_[40 + 1]), + &(scalePtr->d_scale_list_[44 + 3])); + } + + // FFN + T* ffn_out_buf = attn_out_buf; + { + std::vector ffn_input_tensors{ + Tensor{MEMORY_GPU, data_type, std::vector{h_token_num, embed_dim_}, norm_out_buf}}; + std::vector ffn_output_tensors{ + Tensor{MEMORY_GPU, data_type, std::vector{h_token_num, embed_dim_}, ffn_out_buf}}; + ffn_layer_->forward(&ffn_output_tensors, &ffn_input_tensors, &weights->vit_layer_weights[i].ffn_weights); + } + + if (int8_mode_ == 1) { + invokeAddBiasResidualCol32(from_buf, + (const int32_t*)ffn_out_buf, + from_buf, + weights->vit_layer_weights[i].ffn_weights.output_weight.bias, + h_token_num, + embed_dim_, + stream_, + &(scalePtr->d_scale_list_[scalePtr->p2_offset_ + 8 * embed_dim_]), + &(scalePtr->d_scale_list_[52]), + 1); + } + else if (int8_mode_ == 2) { + invokeAddBiasResidualCol32(from_buf, + (const int8_t*)ffn_out_buf, + (const T*)from_buf, + weights->vit_layer_weights[i].ffn_weights.output_weight.bias, + h_token_num, + embed_dim_, + stream_, + &(scalePtr->d_scale_list_[56 + 1])); + } + + sync_check_cuda_error(); + } + + invokeTransposeMatrixCOL32ToColMajor(attn_out_buf, from_buf, h_token_num, embed_dim_, stream_); + + invokeGeneralLayerNorm(need_padding ? norm_out_buf : output, + attn_out_buf, + weights->post_transformer_layernorm_weights.gamma, + weights->post_transformer_layernorm_weights.beta, + h_token_num, + embed_dim_, + stream_); + + if (need_padding) { + invokeRemovePadding(output, norm_out_buf, padding_offset_, nopad_token_num_, head_num_ * head_dim_, stream_); + } + + if (is_free_buffer_after_forward_ == true) { + freeBuffer(); + } + sync_check_cuda_error(); + + SAFE_FREE(offset_tensor_ptr); +} + +template +bool ViTTransformerINT8::resetBatch(size_t batch_size) +{ + if (max_batch_size_ < batch_size) { + max_batch_size_ = batch_size; + } + + return true; +} + +template +bool ViTTransformerINT8::resetSeqLen(size_t seq_len) +{ + if (max_seq_len_ < seq_len) { + max_seq_len_ = seq_len; + } + + return true; +} + +template +bool ViTTransformerINT8::setSeqLenVec(size_t batch_size) +{ + int* seq_len_vec = new int[batch_size]; + for (int i = 0; i < batch_size; i++) { + seq_len_vec[i] = request_seq_len_; + } + cudaMemcpy(seq_len_vec_, seq_len_vec, sizeof(int) * batch_size, cudaMemcpyHostToDevice); + delete seq_len_vec; + return true; +} + +template +void ViTTransformerINT8::setDefaultMask(size_t batch_size) +{ + invokeBuildEncoderAttentionMask(mask_buf_, seq_len_vec_, batch_size, max_seq_len_, stream_); +} + +template +void ViTTransformerINT8::setDefaultPaddingOffset(size_t batch_size) +{ + invokeGetPaddingOffset( + &nopad_token_num_, token_num_, padding_offset_, seq_len_vec_, batch_size, max_seq_len_, stream_); +} + +template +void ViTTransformerINT8::patchEmbed(T* output, + const T* input, + const T* kernel, + const T* bias, + const T* cls_embed, + const T* pos_embed, + const int batch, + const int img_size, + const int patch_size, + const int seq_len, + const int in_chans, + const int embed_dim) +{ + T* tmp_buf = with_cls_token_ ? (output == embed_buf_1_ ? embed_buf_2_ : embed_buf_1_) : output; + conv2d( + tmp_buf, input, kernel, batch, img_size, img_size, in_chans, embed_dim, patch_size, patch_size, cudnn_handle_); + int n = embed_dim; + int s = seq_len; + int m = batch * s; + if (with_cls_token_) { + FT_CHECK(cls_embed != nullptr); + invokeAddBiasConcatClsTokenAddPosEmbed(tmp_buf, output, bias, cls_embed, pos_embed, m, n, s, stream_); + } + else { + invokeAddBiasAddPosEmbed(tmp_buf, bias, pos_embed, m, n, s * n, stream_); + } +} + +template class ViTTransformerINT8; +template class ViTTransformerINT8; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/vit_int8/ViTINT8.h b/src/fastertransformer/models/vit_int8/ViTINT8.h new file mode 100644 index 000000000..ef8b8840f --- /dev/null +++ b/src/fastertransformer/models/vit_int8/ViTINT8.h @@ -0,0 +1,122 @@ +/* + * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include + +// #include "src/fastertransformer/kernels/bert_preprocess_kernels.h" +#include "src/fastertransformer/layers/FfnLayerINT8.h" +#include "src/fastertransformer/layers/attention_layers_int8/FusedAttentionLayerINT8.h" +#include "src/fastertransformer/layers/attention_layers_int8/UnfusedAttentionLayerINT8.h" +#include "src/fastertransformer/models/vit_int8/ViTINT8Weight.h" +#include "src/fastertransformer/utils/conv2d.h" + +namespace fastertransformer { + +template +class ViTTransformerINT8: public BaseLayer { +private: + size_t max_batch_size_ = 0; + size_t img_size_ = 224; + size_t chn_num_ = 3; + size_t class_num_ = 1000; + size_t patch_size_ = 16; // preproc patch size + size_t max_seq_len_; + size_t request_seq_len_; + size_t embed_dim_; // patch conv out units, size_per_head = embed_dim / head_num + size_t head_num_; // mha head num + size_t head_dim_; // mha head size + size_t inter_size_; // FF internal size + size_t num_layer_; + size_t nopad_token_num_; + bool with_cls_token_; + int sm_; + float q_scaling_; + AttentionType attention_type_; + int int8_mode_; + cudnnHandle_t cudnn_handle_; + + BaseAttentionLayer* attention_layer_; + FfnLayerINT8* ffn_layer_; + + bool is_allocate_buffer_ = false; + + void allocateBuffer(); + void freeBuffer(); + bool resetBatch(size_t batch_size); + bool resetSeqLen(size_t seq_len); + bool setSeqLenVec(size_t batch_size); + void setDefaultMask(size_t batch_size); + void setDefaultPaddingOffset(size_t batch_size); + void patchEmbed(T* output, + const T* input, + const T* kernel, + const T* bias, + const T* cls_embed, + const T* pos_embed, + const int batch, + const int img_size, + const int patch_size, + const int seq_len, + const int in_chans, + const int embed_dim); + void initialize(); + + void allocateBuffer(size_t batch_size); + +protected: + // size_t* token_num_ = nullptr; + T* embed_buf_1_ = nullptr; + T* embed_buf_2_ = nullptr; + T* embed_buf_3_ = nullptr; + T* embed_buf_4_ = nullptr; + T* mask_buf_ = nullptr; + int* trt_mha_padding_offset_ = nullptr; + int* seq_len_vec_ = nullptr; + int* padding_offset_ = nullptr; + size_t* token_num_ = nullptr; + +public: + ViTTransformerINT8(size_t max_batch_size, + size_t img_size, + size_t chn_num, + size_t patch_size, + size_t embed_dim, + size_t head_num, + size_t inter_size, + size_t num_layer, + bool with_cls_token, + int sm, + float q_scaling, + int int8_mode, + cudaStream_t stream, + cudnnHandle_t cudnn_handle, + cublasMMWrapper* cublas_wrapper, + IAllocator* allocator, + bool is_free_buffer_after_forward, + AttentionType attention_type); + + ViTTransformerINT8(ViTTransformerINT8 const& vit_layer); + + ~ViTTransformerINT8(); + + void forward(std::vector* output_tensors, + const std::vector* input_tensors, + const ViTINT8Weight* weights); +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/vit_int8/ViTINT8Weight.h b/src/fastertransformer/models/vit_int8/ViTINT8Weight.h new file mode 100644 index 000000000..2a5b54def --- /dev/null +++ b/src/fastertransformer/models/vit_int8/ViTINT8Weight.h @@ -0,0 +1,191 @@ +/* + * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/layers/DenseWeight.h" +#include "src/fastertransformer/models/vit_int8/ViTLayerINT8Weight.h" + +namespace fastertransformer { + +template +struct ViTEmbeds { + const T* class_embed; + const T* position_embed; +}; + +template +struct ViTINT8Weight { + + ViTINT8Weight() = default; + ViTINT8Weight(const int embed_dim, + const int inter_size, + const int num_layer, + const int img_size, + const int patch_size, + const int chn_num, + const bool with_cls_token): + with_cls_token_(with_cls_token), + embed_dim_(embed_dim), + inter_size_(inter_size), + num_layer_(num_layer), + img_size_(img_size), + patch_size_(patch_size), + chn_num_(chn_num) + { + deviceMalloc(&weights_ptr[0], embed_dim_); + deviceMalloc(&weights_ptr[1], embed_dim_); + if (with_cls_token) { + deviceMalloc(&weights_ptr[2], embed_dim_); // pre_transform_embeds.class_embed + } + deviceMalloc(&weights_ptr[3], + embed_dim_ + * (img_size_ * img_size_ / (patch_size_ * patch_size_) + + (with_cls_token ? 1 : 0))); // pre_transform_embeds.position_embed + deviceMalloc(&weights_ptr[4], + chn_num_ * patch_size_ * patch_size_ * embed_dim_); // pre_encoder_conv_weights.kernel + deviceMalloc(&weights_ptr[5], embed_dim_); // pre_encoder_conv_weights.bias + + setWeightPtr(); + for (int i = 0; i < num_layer_; i++) { + vit_layer_weights.push_back(ViTLayerINT8Weight(embed_dim_, inter_size_)); + } + } + + ~ViTINT8Weight() + { + if (is_maintain_buffer == true) { + vit_layer_weights.clear(); + for (int i = 0; i < 6; i++) { + deviceFree(weights_ptr[i]); + } + + post_transformer_layernorm_weights.gamma = nullptr; + post_transformer_layernorm_weights.beta = nullptr; + pre_transform_embeds.class_embed = nullptr; + pre_transform_embeds.position_embed = nullptr; + pre_encoder_conv_weights.kernel = nullptr; + pre_encoder_conv_weights.bias = nullptr; + is_maintain_buffer = false; + } + } + + ViTINT8Weight(const ViTINT8Weight& other): + with_cls_token_(other.with_cls_token_), + embed_dim_(other.embed_dim_), + inter_size_(other.inter_size_), + num_layer_(other.num_layer_), + img_size_(other.img_size_), + patch_size_(other.patch_size_), + chn_num_(other.chn_num_), + cls_num_(other.cls_num_) + { + vit_layer_weights.clear(); + for (int i = 0; i < num_layer_; i++) { + vit_layer_weights.push_back(other.vit_layer_weights[i]); + } + deviceMalloc(&weights_ptr[0], embed_dim_); + cudaD2Dcpy(weights_ptr[0], other.weights_ptr[0], embed_dim_); + deviceMalloc(&weights_ptr[1], embed_dim_); + cudaD2Dcpy(weights_ptr[1], other.weights_ptr[1], embed_dim_); + if (other.weights_ptr[2] != nullptr) { + deviceMalloc(&weights_ptr[2], embed_dim_); // pre_transform_embeds.class_embed + cudaD2Dcpy(weights_ptr[2], other.weights_ptr[2], embed_dim_); + } + deviceMalloc(&weights_ptr[3], + embed_dim_ + * (img_size_ * img_size_ / (patch_size_ * patch_size_) + + (with_cls_token_ ? 1 : 0))); // pre_transform_embeds.position_embed + cudaD2Dcpy(weights_ptr[3], + other.weights_ptr[3], + embed_dim_ * (img_size_ * img_size_ / (patch_size_ * patch_size_) + (with_cls_token_ ? 1 : 0))); + deviceMalloc(&weights_ptr[4], + chn_num_ * patch_size_ * patch_size_ * embed_dim_); // pre_encoder_conv_weights.kernel + cudaD2Dcpy(weights_ptr[4], other.weights_ptr[4], chn_num_ * patch_size_ * patch_size_ * embed_dim_); + deviceMalloc(&weights_ptr[5], embed_dim_); // pre_encoder_conv_weights.bias + cudaD2Dcpy(weights_ptr[5], other.weights_ptr[5], embed_dim_); + + setWeightPtr(); + } + + ViTINT8Weight& operator=(const ViTINT8Weight& other) + { + with_cls_token_ = other.with_cls_token_; + embed_dim_ = other.embed_dim_; + inter_size_ = other.inter_size_; + num_layer_ = other.num_layer_; + img_size_ = other.img_size_; + patch_size_ = other.patch_size_; + chn_num_ = other.chn_num_; + cls_num_ = other.cls_num_; + vit_layer_weights.clear(); + for (int i = 0; i < num_layer_; i++) { + vit_layer_weights.push_back(other.vit_layer_weights[i]); + } + deviceMalloc(&weights_ptr[0], embed_dim_); + cudaD2Dcpy(weights_ptr[0], other.weights_ptr[0], embed_dim_); + deviceMalloc(&weights_ptr[1], embed_dim_); + cudaD2Dcpy(weights_ptr[1], other.weights_ptr[1], embed_dim_); + if (other.weights_ptr[2] != nullptr) { + deviceMalloc(&weights_ptr[2], embed_dim_); // pre_transform_embeds.class_embed + cudaD2Dcpy(weights_ptr[2], other.weights_ptr[2], embed_dim_); + } + deviceMalloc(&weights_ptr[3], + embed_dim_ + * (img_size_ * img_size_ / (patch_size_ * patch_size_) + + (with_cls_token_ ? 1 : 0))); // pre_transform_embeds.position_embed + cudaD2Dcpy(weights_ptr[3], + other.weights_ptr[3], + embed_dim_ * (img_size_ * img_size_ / (patch_size_ * patch_size_) + (with_cls_token_ ? 1 : 0))); + deviceMalloc(&weights_ptr[4], + chn_num_ * patch_size_ * patch_size_ * embed_dim_); // pre_encoder_conv_weights.kernel + cudaD2Dcpy(weights_ptr[4], other.weights_ptr[4], chn_num_ * patch_size_ * patch_size_ * embed_dim_); + deviceMalloc(&weights_ptr[5], embed_dim_); // pre_encoder_conv_weights.bias + cudaD2Dcpy(weights_ptr[5], other.weights_ptr[5], embed_dim_); + + setWeightPtr(); + } + + std::vector> vit_layer_weights; + LayerNormWeight post_transformer_layernorm_weights; + ViTEmbeds pre_transform_embeds; + DenseWeight pre_encoder_conv_weights; + bool with_cls_token_; + +private: + void setWeightPtr() + { + post_transformer_layernorm_weights.gamma = weights_ptr[0]; + post_transformer_layernorm_weights.beta = weights_ptr[1]; + pre_transform_embeds.class_embed = weights_ptr[2]; + pre_transform_embeds.position_embed = weights_ptr[3]; + pre_encoder_conv_weights.kernel = weights_ptr[4]; + pre_encoder_conv_weights.bias = weights_ptr[5]; + + is_maintain_buffer = true; + } + int embed_dim_; + int inter_size_; + int num_layer_; + int img_size_; + int patch_size_; + int chn_num_; + int cls_num_; + bool is_maintain_buffer = false; + T* weights_ptr[8]{nullptr}; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/vit_int8/ViTLayerINT8Weight.h b/src/fastertransformer/models/vit_int8/ViTLayerINT8Weight.h new file mode 100644 index 000000000..59f394fc6 --- /dev/null +++ b/src/fastertransformer/models/vit_int8/ViTLayerINT8Weight.h @@ -0,0 +1,224 @@ +/* + * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/kernels/layernorm_kernels.h" +#include "src/fastertransformer/layers/FfnINT8Weight.h" +#include "src/fastertransformer/layers/attention_layers_int8/AttentionINT8Weight.h" +#include "src/fastertransformer/utils/cublasMMWrapper.h" +#include "src/fastertransformer/utils/memory_utils.h" + +namespace fastertransformer { + +template +struct ViTLayerINT8Weight { + + ViTLayerINT8Weight() = default; + ViTLayerINT8Weight(const int embed_dim, const int inter_size): embed_dim_(embed_dim), inter_size_(inter_size) + { + deviceMalloc(&weights_ptr[0], embed_dim_ * embed_dim_); + deviceMalloc(&weights_ptr[1], embed_dim_); + deviceMalloc(&weights_ptr[2], embed_dim_ * embed_dim_); + deviceMalloc(&weights_ptr[3], embed_dim_); + deviceMalloc(&weights_ptr[4], embed_dim_ * embed_dim_); + deviceMalloc(&weights_ptr[5], embed_dim_); + deviceMalloc(&weights_ptr[6], embed_dim_ * embed_dim_); + deviceMalloc(&weights_ptr[7], embed_dim_); + deviceMalloc(&weights_ptr[8], embed_dim_); + deviceMalloc(&weights_ptr[9], embed_dim_); + deviceMalloc(&weights_ptr[10], embed_dim_ * inter_size_); + deviceMalloc(&weights_ptr[11], inter_size_); + deviceMalloc(&weights_ptr[12], inter_size_ * embed_dim_); + deviceMalloc(&weights_ptr[13], embed_dim_); + deviceMalloc(&weights_ptr[14], embed_dim_); + deviceMalloc(&weights_ptr[15], embed_dim_); + + scale_list_.size_ = ACTIVATION_AMAX_NUM + 9 * embed_dim + INT8O_GEMM_NUM + TRT_AMAX_NUM + SCALE_RESERVE_NUM; + scale_list_.p3_offset_ = ACTIVATION_AMAX_NUM + 9 * embed_dim; + scale_list_.p4_offset_ = ACTIVATION_AMAX_NUM + 9 * embed_dim + INT8O_GEMM_NUM; + deviceMalloc(&scale_list_ptr[0], scale_list_.size_); + scale_list_ptr[1] = (float*)malloc(sizeof(float) * scale_list_.size_); + + setWeightPtr(); + } + + ~ViTLayerINT8Weight() + { + if (is_maintain_buffer == true) { + for (int i = 0; i < 16; i++) { + deviceFree(weights_ptr[i]); + } + + deviceFree(scale_list_ptr[0]); + free(scale_list_ptr[1]); + + attention_weights.query_weight.kernel = nullptr; + attention_weights.query_weight.bias = nullptr; + attention_weights.key_weight.kernel = nullptr; + attention_weights.key_weight.bias = nullptr; + attention_weights.value_weight.kernel = nullptr; + attention_weights.value_weight.bias = nullptr; + attention_weights.attention_output_weight.kernel = nullptr; + attention_weights.attention_output_weight.bias = nullptr; + attn_layernorm_weights.gamma = nullptr; + attn_layernorm_weights.beta = nullptr; + ffn_weights.intermediate_weight.kernel = nullptr; + ffn_weights.intermediate_weight.bias = nullptr; + ffn_weights.output_weight.kernel = nullptr; + ffn_weights.output_weight.bias = nullptr; + ffn_layernorm_weights.gamma = nullptr; + ffn_layernorm_weights.beta = nullptr; + is_maintain_buffer = false; + } + } + + ViTLayerINT8Weight(const ViTLayerINT8Weight& other): embed_dim_(other.embed_dim_), inter_size_(other.inter_size_) + { + deviceMalloc(&weights_ptr[0], embed_dim_ * embed_dim_); + cudaD2Dcpy(weights_ptr[0], other.weights_ptr[0], embed_dim_ * embed_dim_); + deviceMalloc(&weights_ptr[1], embed_dim_); + cudaD2Dcpy(weights_ptr[1], other.weights_ptr[1], embed_dim_); + deviceMalloc(&weights_ptr[2], embed_dim_ * embed_dim_); + cudaD2Dcpy(weights_ptr[2], other.weights_ptr[2], embed_dim_ * embed_dim_); + deviceMalloc(&weights_ptr[3], embed_dim_); + cudaD2Dcpy(weights_ptr[3], other.weights_ptr[3], embed_dim_); + deviceMalloc(&weights_ptr[4], embed_dim_ * embed_dim_); + cudaD2Dcpy(weights_ptr[4], other.weights_ptr[4], embed_dim_ * embed_dim_); + deviceMalloc(&weights_ptr[5], embed_dim_); + cudaD2Dcpy(weights_ptr[5], other.weights_ptr[5], embed_dim_); + deviceMalloc(&weights_ptr[6], embed_dim_ * embed_dim_); + cudaD2Dcpy(weights_ptr[6], other.weights_ptr[6], embed_dim_ * embed_dim_); + deviceMalloc(&weights_ptr[7], embed_dim_); + cudaD2Dcpy(weights_ptr[7], other.weights_ptr[7], embed_dim_); + deviceMalloc(&weights_ptr[8], embed_dim_); + cudaD2Dcpy(weights_ptr[8], other.weights_ptr[8], embed_dim_); + deviceMalloc(&weights_ptr[9], embed_dim_); + cudaD2Dcpy(weights_ptr[9], other.weights_ptr[9], embed_dim_); + deviceMalloc(&weights_ptr[10], embed_dim_ * inter_size_); + cudaD2Dcpy(weights_ptr[10], other.weights_ptr[10], embed_dim_ * inter_size_); + deviceMalloc(&weights_ptr[11], inter_size_); + cudaD2Dcpy(weights_ptr[11], other.weights_ptr[11], inter_size_); + deviceMalloc(&weights_ptr[12], inter_size_ * embed_dim_); + cudaD2Dcpy(weights_ptr[12], other.weights_ptr[12], inter_size_ * embed_dim_); + deviceMalloc(&weights_ptr[13], embed_dim_); + cudaD2Dcpy(weights_ptr[13], other.weights_ptr[13], embed_dim_); + deviceMalloc(&weights_ptr[14], embed_dim_); + cudaD2Dcpy(weights_ptr[14], other.weights_ptr[14], embed_dim_); + deviceMalloc(&weights_ptr[15], embed_dim_); + cudaD2Dcpy(weights_ptr[15], other.weights_ptr[15], embed_dim_); + + scale_list_.size_ = other.scale_list_.size_; + scale_list_.p3_offset_ = other.scale_list_.p3_offset_; + scale_list_.p4_offset_ = other.scale_list_.p4_offset_; + deviceMalloc(&scale_list_ptr[0], scale_list_.size_); + cudaD2Dcpy(scale_list_ptr[0], other.scale_list_ptr[0], scale_list_.size_); + scale_list_ptr[1] = (float*)malloc(sizeof(float) * scale_list_.size_); + memcpy(scale_list_ptr[1], other.scale_list_ptr[1], sizeof(float) * scale_list_.size_); + + setWeightPtr(); + } + + ViTLayerINT8Weight& operator=(const ViTLayerINT8Weight& other) + { + embed_dim_ = other.embed_dim_; + inter_size_ = other.inter_size_; + deviceMalloc(&weights_ptr[0], embed_dim_ * embed_dim_); + cudaD2Dcpy(weights_ptr[0], other.weights_ptr[0], embed_dim_ * embed_dim_); + deviceMalloc(&weights_ptr[1], embed_dim_); + cudaD2Dcpy(weights_ptr[1], other.weights_ptr[1], embed_dim_); + deviceMalloc(&weights_ptr[2], embed_dim_ * embed_dim_); + cudaD2Dcpy(weights_ptr[2], other.weights_ptr[2], embed_dim_ * embed_dim_); + deviceMalloc(&weights_ptr[3], embed_dim_); + cudaD2Dcpy(weights_ptr[3], other.weights_ptr[3], embed_dim_); + deviceMalloc(&weights_ptr[4], embed_dim_ * embed_dim_); + cudaD2Dcpy(weights_ptr[4], other.weights_ptr[4], embed_dim_ * embed_dim_); + deviceMalloc(&weights_ptr[5], embed_dim_); + cudaD2Dcpy(weights_ptr[5], other.weights_ptr[5], embed_dim_); + deviceMalloc(&weights_ptr[6], embed_dim_ * embed_dim_); + cudaD2Dcpy(weights_ptr[6], other.weights_ptr[6], embed_dim_ * embed_dim_); + deviceMalloc(&weights_ptr[7], embed_dim_); + cudaD2Dcpy(weights_ptr[7], other.weights_ptr[7], embed_dim_); + deviceMalloc(&weights_ptr[8], embed_dim_); + cudaD2Dcpy(weights_ptr[8], other.weights_ptr[8], embed_dim_); + deviceMalloc(&weights_ptr[9], embed_dim_); + cudaD2Dcpy(weights_ptr[9], other.weights_ptr[9], embed_dim_); + deviceMalloc(&weights_ptr[10], embed_dim_ * inter_size_); + cudaD2Dcpy(weights_ptr[10], other.weights_ptr[10], embed_dim_ * inter_size_); + deviceMalloc(&weights_ptr[11], inter_size_); + cudaD2Dcpy(weights_ptr[11], other.weights_ptr[11], inter_size_); + deviceMalloc(&weights_ptr[12], inter_size_ * embed_dim_); + cudaD2Dcpy(weights_ptr[12], other.weights_ptr[12], inter_size_ * embed_dim_); + deviceMalloc(&weights_ptr[13], embed_dim_); + cudaD2Dcpy(weights_ptr[13], other.weights_ptr[13], embed_dim_); + deviceMalloc(&weights_ptr[14], embed_dim_); + cudaD2Dcpy(weights_ptr[14], other.weights_ptr[14], embed_dim_); + deviceMalloc(&weights_ptr[15], embed_dim_); + cudaD2Dcpy(weights_ptr[15], other.weights_ptr[15], embed_dim_); + + scale_list_.size_ = other.scale_list_.size_; + scale_list_.p3_offset_ = other.scale_list_.p3_offset_; + scale_list_.p4_offset_ = other.scale_list_.p4_offset_; + deviceMalloc(&scale_list_ptr[0], scale_list_.size_); + cudaD2Dcpy(scale_list_ptr[0], other.scale_list_ptr[0], scale_list_.size_); + scale_list_ptr[1] = (float*)malloc(sizeof(float) * scale_list_.size_); + memcpy(scale_list_ptr[1], other.scale_list_ptr[1], sizeof(float) * scale_list_.size_); + + setWeightPtr(); + } + + AttentionINT8Weight attention_weights; + LayerNormWeight attn_layernorm_weights; + FfnINT8Weight ffn_weights; + LayerNormWeight ffn_layernorm_weights; + ScaleList scale_list_; + +private: + void setWeightPtr() + { + attention_weights.query_weight.kernel = weights_ptr[0]; + attention_weights.query_weight.bias = weights_ptr[1]; + attention_weights.key_weight.kernel = weights_ptr[2]; + attention_weights.key_weight.bias = weights_ptr[3]; + attention_weights.value_weight.kernel = weights_ptr[4]; + attention_weights.value_weight.bias = weights_ptr[5]; + attention_weights.attention_output_weight.kernel = weights_ptr[6]; + attention_weights.attention_output_weight.bias = weights_ptr[7]; + attn_layernorm_weights.gamma = weights_ptr[8]; + attn_layernorm_weights.beta = weights_ptr[9]; + ffn_weights.intermediate_weight.kernel = weights_ptr[10]; + ffn_weights.intermediate_weight.bias = weights_ptr[11]; + ffn_weights.output_weight.kernel = weights_ptr[12]; + ffn_weights.output_weight.bias = weights_ptr[13]; + ffn_layernorm_weights.gamma = weights_ptr[14]; + ffn_layernorm_weights.beta = weights_ptr[15]; + + scale_list_.d_scale_list_ = scale_list_ptr[0]; + scale_list_.h_scale_list_ = scale_list_ptr[1]; + attention_weights.scale_list_ptr = &scale_list_; + ffn_weights.scale_list_ptr = &scale_list_; + + is_maintain_buffer = true; + } + int embed_dim_; + int inter_size_; + bool is_maintain_buffer = false; + T* weights_ptr[16]; + float* scale_list_ptr[2]; + T* sp_weights_ptr[6]; +}; + +} // namespace fastertransformer diff --git a/src/fastertransformer/models/xlnet/CMakeLists.txt b/src/fastertransformer/models/xlnet/CMakeLists.txt index d95c90940..f259b3c0b 100644 --- a/src/fastertransformer/models/xlnet/CMakeLists.txt +++ b/src/fastertransformer/models/xlnet/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/models/xlnet/Xlnet.cc b/src/fastertransformer/models/xlnet/Xlnet.cc index a00a6a2a6..958361f90 100644 --- a/src/fastertransformer/models/xlnet/Xlnet.cc +++ b/src/fastertransformer/models/xlnet/Xlnet.cc @@ -203,13 +203,13 @@ void Xlnet::forward(std::vector* output_tensors, std::vector ffn_input_tensors{ Tensor{MEMORY_GPU, data_type, - std::vector{request_batch_size*request_seq_len, hidden_units_}, + std::vector{request_batch_size * request_seq_len, hidden_units_}, out_tensor}}; std::vector ffn_output_tensors{ - Tensor{MEMORY_GPU, - data_type, - std::vector{request_batch_size*request_seq_len, hidden_units_}, - output_fc2_}}; + Tensor{MEMORY_GPU, + data_type, + std::vector{request_batch_size * request_seq_len, hidden_units_}, + output_fc2_}}; ffn_layer_->forward(&ffn_output_tensors, &ffn_input_tensors, &xlnet_layer_weights->at(i).ffn_weights); invokeAddBiasResidualLayerNorm(out_tensor, diff --git a/src/fastertransformer/models/xlnet/Xlnet.h b/src/fastertransformer/models/xlnet/Xlnet.h index 7246fee5e..047ec660c 100644 --- a/src/fastertransformer/models/xlnet/Xlnet.h +++ b/src/fastertransformer/models/xlnet/Xlnet.h @@ -45,7 +45,7 @@ class Xlnet: public BaseLayer { bool is_allocate_buffer_ = false; FfnLayer* ffn_layer_; - + void allocateBuffer(); void freeBuffer(); bool isValidBatchSize(size_t batch_size); diff --git a/src/fastertransformer/models/xlnet/xlnet_gemm.cc b/src/fastertransformer/models/xlnet/xlnet_gemm.cc index e8d253e4d..bedda97ec 100644 --- a/src/fastertransformer/models/xlnet/xlnet_gemm.cc +++ b/src/fastertransformer/models/xlnet/xlnet_gemm.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -15,7 +15,6 @@ */ #include "src/fastertransformer/utils/gemm_test/xlnet_gemm_func.h" -//#include "src/fastertransformer/utils/gemm_test/encoder_igemm_func.h" #include "src/fastertransformer/utils/memory_utils.h" namespace ft = fastertransformer; @@ -24,7 +23,7 @@ int main(int argc, char* argv[]) { if (argc != 6) { printf("[ERROR] xlnet_gemm batch_size seq_len head_number size_per_head " - "is_fp16 \n"); + "data_type \n"); printf("e.g. ./bin/xlnet_gemm 8 128 12 64 0\n"); return 0; } @@ -33,12 +32,12 @@ int main(int argc, char* argv[]) const int seq_len = atoi(argv[2]); const int head_num = atoi(argv[3]); const int size_per_head = atoi(argv[4]); - const int is_fp16 = atoi(argv[5]); + const ft::CublasDataType data_type = static_cast(atoi(argv[5])); // 0 FP32, 1 FP16, 2 BF 16 printf("[INFO] arguments: \n"); printf(" batch_size: %d \n", batch_size); printf(" head_num: %d \n", head_num); printf(" size_per_head: %d \n", size_per_head); - printf(" is_fp16: %d \n", is_fp16); + printf(" data_type: %d \n", data_type); std::cout << std::endl; int hidden_units_ = size_per_head * head_num; @@ -46,7 +45,7 @@ int main(int argc, char* argv[]) void* gemm_test_buf; size_t buf_size_in_byte = ft::calGemmTestBufSizeInByteXlnet( - batch_size, seq_len, head_num, size_per_head, inter_size_, hidden_units_, is_fp16); + batch_size, seq_len, head_num, size_per_head, inter_size_, hidden_units_, data_type); size_t total, free; ft::check_cuda_error(cudaMemGetInfo(&free, &total)); if (free < buf_size_in_byte + 10 * 1024 * 1024) { @@ -61,16 +60,22 @@ int main(int argc, char* argv[]) ft::deviceMalloc(reinterpret_cast(&gemm_test_buf), buf_size_in_byte, false); } - if (is_fp16 == 0) { + if (data_type == ft::FLOAT_DATATYPE) { ft::generate_xlnet_gemm_config( batch_size, seq_len, head_num, size_per_head, hidden_units_, inter_size_, gemm_test_buf, false); } - else if (is_fp16 == 1) { + else if (data_type == ft::HALF_DATATYPE) { ft::generate_xlnet_gemm_config( batch_size, seq_len, head_num, size_per_head, hidden_units_, inter_size_, gemm_test_buf, false); } +#ifdef ENABLE_BF16 + else if (data_type == ft::BFLOAT16_DATATYPE) { + ft::generate_xlnet_gemm_config<__nv_bfloat16>( + batch_size, seq_len, head_num, size_per_head, hidden_units_, inter_size_, gemm_test_buf, false); + } +#endif else { - printf("[ERROR] is_fp16 should be 0 (use float) or 1 (use half). \n"); + printf("[ERROR] data type only supports fp32(0), fp16(1), bf16(2). \n"); return -1; } diff --git a/src/fastertransformer/tensorrt_plugin/CMakeLists.txt b/src/fastertransformer/tensorrt_plugin/CMakeLists.txt new file mode 100644 index 000000000..de0cfb41a --- /dev/null +++ b/src/fastertransformer/tensorrt_plugin/CMakeLists.txt @@ -0,0 +1,17 @@ +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +add_subdirectory(swin) +add_subdirectory(t5) +add_subdirectory(vit) diff --git a/src/fastertransformer/tensorrt_plugin/swin/CMakeLists.txt b/src/fastertransformer/tensorrt_plugin/swin/CMakeLists.txt new file mode 100644 index 000000000..f9ac23a63 --- /dev/null +++ b/src/fastertransformer/tensorrt_plugin/swin/CMakeLists.txt @@ -0,0 +1,28 @@ +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +cmake_minimum_required(VERSION 3.8) + +set(swintransformer_trt_files + swinTransformerPlugin.cpp + swinTransformerINT8Plugin.cpp +) + + +if(BUILD_TRT) + set(LIB_NAME "swinTransformer_plugin") + add_library(${LIB_NAME} SHARED ${swintransformer_trt_files}) + set_target_properties(${LIB_NAME} PROPERTIES + CUDA_RESOLVE_DEVICE_SYMBOLS ON) + target_link_libraries(${LIB_NAME} trt_fused_multi_head_attention Swin SwinINT8 -lcudnn -lcublas -lcudart -lnvinfer) +endif() diff --git a/src/fastertransformer/tensorrt_plugin/swin/serialize.hpp b/src/fastertransformer/tensorrt_plugin/swin/serialize.hpp new file mode 100644 index 000000000..be49fc26f --- /dev/null +++ b/src/fastertransformer/tensorrt_plugin/swin/serialize.hpp @@ -0,0 +1,130 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include +#include +#include +#include + +#include +using std::cerr; +using std::cout; +using std::endl; + +template +inline void serialize_value(void** buffer, T const& value); + +template +inline void deserialize_value(void const** buffer, size_t* buffer_size, T* value); + +namespace { + +template +struct Serializer { +}; + +template +struct Serializer< + T, + typename std::enable_if::value || std::is_enum::value || std::is_pod::value>::type> { + static size_t serialized_size(T const& value) + { + return sizeof(T); + } + static void serialize(void** buffer, T const& value) + { + ::memcpy(*buffer, &value, sizeof(T)); + reinterpret_cast(*buffer) += sizeof(T); + } + static void deserialize(void const** buffer, size_t* buffer_size, T* value) + { + assert(*buffer_size >= sizeof(T)); + ::memcpy(value, *buffer, sizeof(T)); + reinterpret_cast(*buffer) += sizeof(T); + *buffer_size -= sizeof(T); + } +}; + +template<> +struct Serializer { + static size_t serialized_size(const char* value) + { + return strlen(value) + 1; + } + static void serialize(void** buffer, const char* value) + { + ::strcpy(static_cast(*buffer), value); + reinterpret_cast(*buffer) += strlen(value) + 1; + } + static void deserialize(void const** buffer, size_t* buffer_size, const char** value) + { + *value = static_cast(*buffer); + size_t data_size = strnlen(*value, *buffer_size) + 1; + assert(*buffer_size >= data_size); + reinterpret_cast(*buffer) += data_size; + *buffer_size -= data_size; + } +}; + +template +struct Serializer< + std::vector, + typename std::enable_if::value || std::is_enum::value || std::is_pod::value>::type> { + static size_t serialized_size(std::vector const& value) + { + return sizeof(value.size()) + value.size() * sizeof(T); + } + static void serialize(void** buffer, std::vector const& value) + { + serialize_value(buffer, value.size()); + size_t nbyte = value.size() * sizeof(T); + ::memcpy(*buffer, value.data(), nbyte); + reinterpret_cast(*buffer) += nbyte; + } + static void deserialize(void const** buffer, size_t* buffer_size, std::vector* value) + { + size_t size; + deserialize_value(buffer, buffer_size, &size); + value->resize(size); + size_t nbyte = value->size() * sizeof(T); + assert(*buffer_size >= nbyte); + ::memcpy(value->data(), *buffer, nbyte); + reinterpret_cast(*buffer) += nbyte; + *buffer_size -= nbyte; + } +}; + +} // namespace + +template +inline size_t serialized_size(T const& value) +{ + return Serializer::serialized_size(value); +} + +template +inline void serialize_value(void** buffer, T const& value) +{ + return Serializer::serialize(buffer, value); +} + +template +inline void deserialize_value(void const** buffer, size_t* buffer_size, T* value) +{ + return Serializer::deserialize(buffer, buffer_size, value); +} diff --git a/src/fastertransformer/tensorrt_plugin/swin/swinTransformerINT8Plugin.cpp b/src/fastertransformer/tensorrt_plugin/swin/swinTransformerINT8Plugin.cpp new file mode 100644 index 000000000..0a0fe068b --- /dev/null +++ b/src/fastertransformer/tensorrt_plugin/swin/swinTransformerINT8Plugin.cpp @@ -0,0 +1,1035 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "swinTransformerINT8Plugin.h" +#include "NvInfer.h" +#include "serialize.hpp" +#include +#include + +#include +#include +#include +#include +#include + +using namespace nvinfer1; +using namespace std; + +namespace fastertransformer { + +// Static class fields initialization +PluginFieldCollection SwinTransformerINT8PluginCreator::mFC{}; +std::vector SwinTransformerINT8PluginCreator::mPluginAttributes; + +REGISTER_TENSORRT_PLUGIN(SwinTransformerINT8PluginCreator); + +template +SwinTransformerINT8Plugin::SwinTransformerINT8Plugin(const std::string& name, + const int int8_mode, + const int max_batch_size, + const int img_size, + const int patch_size, + const int in_chans, + const int embed_dim, + const int window_size, + int* depths, + int* num_heads, + const bool ape, + const bool patch_norm, + const int layer_num, + const float mlp_ratio, + const bool qkv_bias, + const float qk_scale, + const std::vector& w, + const std::vector& d_amax, + const std::vector& h_amax): + int8_mode_(int8_mode), + layer_name_(name), + max_batch_size_(max_batch_size), + img_size_(img_size), + patch_size_(patch_size), + in_chans_(in_chans), + embed_dim_(embed_dim), + window_size_(window_size), + ape_(ape), + patch_norm_(patch_norm), + layer_num_(layer_num), + mlp_ratio_(mlp_ratio), + qkv_bias_(qkv_bias), + qk_scale_(qk_scale) +{ + check_cuda_error(cublasCreate(&cublas_handle_)); + check_cuda_error(cublasLtCreate(&cublaslt_handle_)); + checkCUDNN(cudnnCreate(&cudnn_handle_)); + sm_ = getSMVersion(); + bool _use_ORDER_COL32_2R_4R4 = false; +#if (CUDART_VERSION >= 11000) + if (sm_ >= 80) { + _use_ORDER_COL32_2R_4R4 = true; + } +#endif + + weight_num_ = getWeightNum(layer_num, depths); + if (weight_num_ != w.size()) { + printf("[ERROR][SwinTransformerINT8Plugin](T) weights number %lu does not match expected number %d!\n", + w.size(), + weight_num_); + exit(-1); + } + + depths_ = (int*)malloc(layer_num * sizeof(int)); + num_heads_ = (int*)malloc(layer_num * sizeof(int)); + memcpy(depths_, depths, layer_num * sizeof(int)); + memcpy(num_heads_, num_heads, layer_num * sizeof(int)); + + output_dim_ = int(pow(2, layer_num - 1)) * embed_dim; + + // calculate the size of each weight + generateWeightSize( + weight_size_, layer_num, embed_dim, mlp_ratio, window_size, img_size, patch_size, in_chans, depths, num_heads); + + int weight_idx = 0; + int amax_idx = 0; + int hidden_dim = embed_dim; + for (int l = 0; l < layer_num; l++) { + SwinTransformerINT8BasicLayerWeight bl; + for (int di = 0; di < depths[l]; di++) { + SwinTransformerINT8BlockWeight p; + p.attention_weights.query_weight.kernel = + cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.attention_weights.query_weight.bias = + cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.attention_weights.attention_output_weight.kernel = + cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.attention_weights.attention_output_weight.bias = + cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.ffn_weights.intermediate_weight.kernel = + cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.ffn_weights.intermediate_weight.bias = + cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.ffn_weights.output_weight.kernel = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.ffn_weights.output_weight.bias = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.attn_layernorm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.attn_layernorm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.ffn_layernorm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.ffn_layernorm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.scalelist.size_ = ACTIVATION_AMAX_NUM + 5 + INT8O_GEMM_NUM + TRT_AMAX_NUM; + p.scalelist.p2_offset_ = ACTIVATION_AMAX_NUM; + p.scalelist.p3_offset_ = ACTIVATION_AMAX_NUM + 5; + p.scalelist.p4_offset_ = ACTIVATION_AMAX_NUM + 5 + INT8O_GEMM_NUM; + p.scalelist.d_scale_list_ = d_amaxCopy(d_amaxlist_, d_amax[amax_idx], 96, amax_idx); + p.scalelist.h_scale_list_ = h_amaxCopy(h_amaxlist_, h_amax[amax_idx], 96, amax_idx); + amax_idx++; + p.attention_relative_pos_bias = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + bl.block_weight_list.push_back(p); + } + bl.merge_layernorm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + bl.merge_layernorm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + bl.merge_linear_weights.kernel = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + bl.attn_mask = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + // if(l != layer_num - 1){ + // bl.quantize_weights(hidden_dim, _use_ORDER_COL32_2R_4R4, nullptr); + // } + params_.basic_layer_weight_list.push_back(bl); + hidden_dim *= 2; + } + params_.patchEmbed_linear_weights.kernel = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + params_.patchEmbed_linear_weights.bias = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + params_.patchEmbed_norm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + params_.patchEmbed_norm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + params_.norm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + params_.norm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + + cublasAlgoMap_ = new cublasAlgoMap("igemm.config", ""); + cublasWrapperMutex_ = new std::mutex(); + allocator_ = new Allocator(getDevice()); + + cublasINT8MMWrapper* cublas_wrapper = new cublasINT8MMWrapper( + cublas_handle_, cublaslt_handle_, nullptr, cublasAlgoMap_, cublasWrapperMutex_, _use_ORDER_COL32_2R_4R4); + if (std::is_same::value) { + cublas_wrapper->setFP16GemmConfig(); + } + else if (std::is_same::value) { + cublas_wrapper->setFP32GemmConfig(); + } + + swin_transformer_ = new SwinTransformerINT8(int8_mode, + max_batch_size, + img_size, + patch_size, + in_chans, + embed_dim, + window_size, + depths, + num_heads, + ape, + patch_norm, + layer_num, + mlp_ratio, + cudnn_handle_, + nullptr, + cublas_wrapper, + allocator_, + false, + qkv_bias, + qk_scale); +} + +template +SwinTransformerINT8Plugin::SwinTransformerINT8Plugin(const std::string& name, + const int int8_mode, + const int max_batch_size, + const int img_size, + const int patch_size, + const int in_chans, + const int embed_dim, + const int window_size, + int* depths, + int* num_heads, + const bool ape, + const bool patch_norm, + const int layer_num, + const float mlp_ratio, + const bool qkv_bias, + const float qk_scale, + const std::vector& w, + const std::vector& d_amax, + const std::vector& h_amax): + int8_mode_(int8_mode), + layer_name_(name), + max_batch_size_(max_batch_size), + img_size_(img_size), + patch_size_(patch_size), + in_chans_(in_chans), + embed_dim_(embed_dim), + window_size_(window_size), + ape_(ape), + patch_norm_(patch_norm), + layer_num_(layer_num), + mlp_ratio_(mlp_ratio), + qkv_bias_(qkv_bias), + qk_scale_(qk_scale) +{ + + check_cuda_error(cublasCreate(&cublas_handle_)); + check_cuda_error(cublasLtCreate(&cublaslt_handle_)); + checkCUDNN(cudnnCreate(&cudnn_handle_)); + + sm_ = getSMVersion(); + bool _use_ORDER_COL32_2R_4R4 = false; +#if (CUDART_VERSION >= 11000) + if (sm_ >= 80) { + _use_ORDER_COL32_2R_4R4 = true; + } +#endif + + weight_num_ = getWeightNum(layer_num, depths); + if (weight_num_ != w.size()) { + printf("[ERROR][SwinTransformerINT8Plugin](Weights) weights number %lu does not match expected number %d!\n", + w.size(), + weight_num_); + exit(-1); + } + + depths_ = (int*)malloc(layer_num * sizeof(int)); + num_heads_ = (int*)malloc(layer_num * sizeof(int)); + memcpy(depths_, depths, layer_num * sizeof(int)); + memcpy(num_heads_, num_heads, layer_num * sizeof(int)); + + output_dim_ = int(pow(2, layer_num - 1)) * embed_dim; + + int weight_idx = 0; + int amax_idx = 0; + for (int l = 0; l < layer_num; l++) { + SwinTransformerINT8BasicLayerWeight bl; + for (int di = 0; di < depths[l]; di++) { + SwinTransformerINT8BlockWeight p; + p.attention_weights.query_weight.kernel = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.attention_weights.query_weight.bias = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.attention_weights.attention_output_weight.kernel = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.attention_weights.attention_output_weight.bias = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.ffn_weights.intermediate_weight.kernel = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.ffn_weights.intermediate_weight.bias = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.ffn_weights.output_weight.kernel = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.ffn_weights.output_weight.bias = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.attn_layernorm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.attn_layernorm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.ffn_layernorm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.ffn_layernorm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.scalelist.size_ = ACTIVATION_AMAX_NUM + 5 + INT8O_GEMM_NUM + TRT_AMAX_NUM; + p.scalelist.p2_offset_ = ACTIVATION_AMAX_NUM; + p.scalelist.p3_offset_ = ACTIVATION_AMAX_NUM + 5; + p.scalelist.p4_offset_ = ACTIVATION_AMAX_NUM + 5 + INT8O_GEMM_NUM; + p.scalelist.d_scale_list_ = d_amaxCopy(d_amaxlist_, d_amax[amax_idx]); + p.scalelist.h_scale_list_ = h_amaxCopy(h_amaxlist_, h_amax[amax_idx]); + amax_idx++; + p.attention_relative_pos_bias = cudaMallocAndCopy(weights_, w[weight_idx++]); + bl.block_weight_list.push_back(p); + } + bl.merge_layernorm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx++]); + bl.merge_layernorm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx++]); + bl.merge_linear_weights.kernel = cudaMallocAndCopy(weights_, w[weight_idx++]); + bl.attn_mask = cudaMallocAndCopy(weights_, w[weight_idx++]); + params_.basic_layer_weight_list.push_back(bl); + } + params_.patchEmbed_linear_weights.kernel = cudaMallocAndCopy(weights_, w[weight_idx++]); + params_.patchEmbed_linear_weights.bias = cudaMallocAndCopy(weights_, w[weight_idx++]); + params_.patchEmbed_norm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx++]); + params_.patchEmbed_norm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx++]); + params_.norm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx++]); + params_.norm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx++]); + + cublasAlgoMap_ = new cublasAlgoMap("igemm.config", ""); + cublasWrapperMutex_ = new std::mutex(); + allocator_ = new Allocator(getDevice()); + + cublasINT8MMWrapper* cublas_wrapper = new cublasINT8MMWrapper( + cublas_handle_, cublaslt_handle_, nullptr, cublasAlgoMap_, cublasWrapperMutex_, _use_ORDER_COL32_2R_4R4); + if (std::is_same::value) { + cublas_wrapper->setFP16GemmConfig(); + } + else if (std::is_same::value) { + cublas_wrapper->setFP32GemmConfig(); + } + + swin_transformer_ = new SwinTransformerINT8(int8_mode, + max_batch_size, + img_size, + patch_size, + in_chans, + embed_dim, + window_size, + depths, + num_heads, + ape, + patch_norm, + layer_num, + mlp_ratio, + cudnn_handle_, + nullptr, + cublas_wrapper, + allocator_, + false, + qkv_bias, + qk_scale); +} + +template +SwinTransformerINT8Plugin::SwinTransformerINT8Plugin(const std::string& name, const void* data, size_t length): + layer_name_(name) +{ + check_cuda_error(cublasCreate(&cublas_handle_)); + check_cuda_error(cublasLtCreate(&cublaslt_handle_)); + checkCUDNN(cudnnCreate(&cudnn_handle_)); + + sm_ = getSMVersion(); + bool _use_ORDER_COL32_2R_4R4 = false; +#if (CUDART_VERSION >= 11000) + if (sm_ >= 80) { + _use_ORDER_COL32_2R_4R4 = true; + } +#endif + + deserialize_value(&data, &length, &int8_mode_); + deserialize_value(&data, &length, &output_dim_); + deserialize_value(&data, &length, &max_batch_size_); + deserialize_value(&data, &length, &img_size_); + deserialize_value(&data, &length, &patch_size_); + deserialize_value(&data, &length, &in_chans_); + deserialize_value(&data, &length, &embed_dim_); + deserialize_value(&data, &length, &window_size_); + deserialize_value(&data, &length, &ape_); + deserialize_value(&data, &length, &patch_norm_); + deserialize_value(&data, &length, &layer_num_); + deserialize_value(&data, &length, &mlp_ratio_); + deserialize_value(&data, &length, &qkv_bias_); + deserialize_value(&data, &length, &qk_scale_); + deserialize_value(&data, &length, &weight_num_); + for (int i = 0; i < weight_num_; i++) { + size_t tmp; + deserialize_value(&data, &length, &tmp); + weight_size_.push_back(tmp); + } + + depths_ = (int*)malloc(layer_num_ * sizeof(int)); + num_heads_ = (int*)malloc(layer_num_ * sizeof(int)); + const char* d = static_cast(data); + memcpy(depths_, d, layer_num_ * sizeof(int)); + d = d + layer_num_ * sizeof(int); + memcpy(num_heads_, d, layer_num_ * sizeof(int)); + d = d + layer_num_ * sizeof(int); + for (int i = 0; i < weight_size_.size(); i++) { + T* tmp; + check_cuda_error(cudaMalloc((void**)&tmp, weight_size_[i] * sizeof(T))); + check_cuda_error(cudaMemcpy(tmp, d, weight_size_[i] * sizeof(T), cudaMemcpyHostToDevice)); + d = d + weight_size_[i] * sizeof(T); + weights_.push_back(tmp); + } + + int all_depth = 0; + for (int i = 0; i < layer_num_; i++) { + all_depth += depths_[i]; + } + for (int i = 0; i < all_depth; i++) { + float* tmp; + check_cuda_error(cudaMalloc((void**)&tmp, 96 * sizeof(float))); + check_cuda_error(cudaMemcpy(tmp, d, 96 * sizeof(float), cudaMemcpyHostToDevice)); + d = d + 96 * sizeof(float); + d_amaxlist_.push_back(tmp); + } + for (int i = 0; i < all_depth; i++) { + float* tmp; + tmp = (float*)malloc(96 * sizeof(float)); + check_cuda_error(cudaMemcpy(tmp, d, 96 * sizeof(float), cudaMemcpyHostToHost)); + // printf("[[%d]]:\n", i); + // for(int i = 0; i < 96; i ++){ + // printf("%.6f ", tmp[i]); + // } + // printf("\n"); + d = d + 96 * sizeof(float); + h_amaxlist_.push_back(tmp); + } + + int weight_idx = 0; + int amax_idx = 0; + for (int l = 0; l < layer_num_; l++) { + SwinTransformerINT8BasicLayerWeight bl; + for (int di = 0; di < depths_[l]; di++) { + SwinTransformerINT8BlockWeight p; + p.attention_weights.query_weight.kernel = weights_[weight_idx++]; + p.attention_weights.query_weight.bias = weights_[weight_idx++]; + p.attention_weights.attention_output_weight.kernel = weights_[weight_idx++]; + p.attention_weights.attention_output_weight.bias = weights_[weight_idx++]; + p.ffn_weights.intermediate_weight.kernel = weights_[weight_idx++]; + p.ffn_weights.intermediate_weight.bias = weights_[weight_idx++]; + p.ffn_weights.output_weight.kernel = weights_[weight_idx++]; + p.ffn_weights.output_weight.bias = weights_[weight_idx++]; + p.attn_layernorm_weights.gamma = weights_[weight_idx++]; + p.attn_layernorm_weights.beta = weights_[weight_idx++]; + p.ffn_layernorm_weights.gamma = weights_[weight_idx++]; + p.ffn_layernorm_weights.beta = weights_[weight_idx++]; + p.scalelist.size_ = ACTIVATION_AMAX_NUM + 5 + INT8O_GEMM_NUM + TRT_AMAX_NUM; + p.scalelist.p2_offset_ = ACTIVATION_AMAX_NUM; + p.scalelist.p3_offset_ = ACTIVATION_AMAX_NUM + 5; + p.scalelist.p4_offset_ = ACTIVATION_AMAX_NUM + 5 + INT8O_GEMM_NUM; + p.scalelist.d_scale_list_ = d_amaxlist_[amax_idx]; + p.scalelist.h_scale_list_ = h_amaxlist_[amax_idx]; + amax_idx++; + p.attention_relative_pos_bias = weights_[weight_idx++]; + bl.block_weight_list.push_back(p); + } + bl.merge_layernorm_weights.gamma = weights_[weight_idx++]; + bl.merge_layernorm_weights.beta = weights_[weight_idx++]; + bl.merge_linear_weights.kernel = weights_[weight_idx++]; + bl.attn_mask = weights_[weight_idx++]; + params_.basic_layer_weight_list.push_back(bl); + } + params_.patchEmbed_linear_weights.kernel = weights_[weight_idx++]; + params_.patchEmbed_linear_weights.bias = weights_[weight_idx++]; + params_.patchEmbed_norm_weights.gamma = weights_[weight_idx++]; + params_.patchEmbed_norm_weights.beta = weights_[weight_idx++]; + params_.norm_weights.gamma = weights_[weight_idx++]; + params_.norm_weights.beta = weights_[weight_idx++]; + + cublasAlgoMap_ = new cublasAlgoMap(IGEMM_CONFIG, ""); + cublasWrapperMutex_ = new std::mutex(); + allocator_ = new Allocator(getDevice()); + + cublasINT8MMWrapper* cublas_wrapper = new cublasINT8MMWrapper( + cublas_handle_, cublaslt_handle_, nullptr, cublasAlgoMap_, cublasWrapperMutex_, _use_ORDER_COL32_2R_4R4); + if (std::is_same::value) { + cublas_wrapper->setFP16GemmConfig(); + } + else if (std::is_same::value) { + cublas_wrapper->setFP32GemmConfig(); + } + + swin_transformer_ = new SwinTransformerINT8(int8_mode_, + max_batch_size_, + img_size_, + patch_size_, + in_chans_, + embed_dim_, + window_size_, + depths_, + num_heads_, + ape_, + patch_norm_, + layer_num_, + mlp_ratio_, + cudnn_handle_, + nullptr, + cublas_wrapper, + allocator_, + false, + qkv_bias_, + qk_scale_); +} + +template +SwinTransformerINT8Plugin::~SwinTransformerINT8Plugin() +{ + for (int i = 0; i < weights_.size(); i++) { + check_cuda_error(cudaFree(weights_[i])); + } + for (int i = 0; i < d_amaxlist_.size(); i++) { + check_cuda_error(cudaFree(d_amaxlist_[i])); + } + for (int i = 0; i < h_amaxlist_.size(); i++) { + delete h_amaxlist_[i]; + } + check_cuda_error(cublasDestroy(cublas_handle_)); + checkCUDNN(cudnnDestroy(cudnn_handle_)); + delete cublasWrapperMutex_; + delete cublasAlgoMap_; + delete swin_transformer_; + delete allocator_; + free(num_heads_); + free(depths_); + weights_.clear(); + weight_size_.clear(); +} + +// IPluginV2DynamicExt Methods +template +nvinfer1::IPluginV2DynamicExt* SwinTransformerINT8Plugin::clone() const noexcept +{ + printf("clone(): size is %lu\n", weights_.size()); + SwinTransformerINT8Plugin* ret = new SwinTransformerINT8Plugin(layer_name_, + int8_mode_, + max_batch_size_, + img_size_, + patch_size_, + in_chans_, + embed_dim_, + window_size_, + depths_, + num_heads_, + ape_, + patch_norm_, + layer_num_, + mlp_ratio_, + qkv_bias_, + qk_scale_, + weights_, + d_amaxlist_, + h_amaxlist_); + return ret; +} + +template +DimsExprs SwinTransformerINT8Plugin::getOutputDimensions(int outputIndex, + const DimsExprs* inputs, + int nbInputs, + IExprBuilder& exprBuilder) noexcept +{ + // Input is B*in_chans*H*W, output should be B*dim*1*1 for fc layer + assert(outputIndex == 0); + // Copy over everything + DimsExprs output; + output.nbDims = 4; + output.d[0] = inputs[0].d[0]; + output.d[1] = exprBuilder.constant(output_dim_); + output.d[2] = exprBuilder.constant(1); + output.d[3] = exprBuilder.constant(1); + return output; +} + +template +bool SwinTransformerINT8Plugin::supportsFormatCombination(int pos, + const PluginTensorDesc* inOut, + int nbInputs, + int nbOutputs) noexcept +{ + assert(pos >= 0); + assert(pos < 2); + assert(nbInputs == 1); + + return true; +} + +template +void SwinTransformerINT8Plugin::configurePlugin(const DynamicPluginTensorDesc* in, + int nbInputs, + const DynamicPluginTensorDesc* out, + int nbOutputs) noexcept +{ + assert(nbInputs == 1); + assert(nbOutputs == 1); +} + +template +size_t SwinTransformerINT8Plugin::getWorkspaceSize(const PluginTensorDesc* inputs, + int nbInputs, + const PluginTensorDesc* outputs, + int nbOutputs) const noexcept +{ + return 0; +} + +// IPluginV2Ext Methods +template +nvinfer1::DataType SwinTransformerINT8Plugin::getOutputDataType(int index, + const nvinfer1::DataType* inputTypes, + int nbInputs) const noexcept +{ + assert(index == 0); + assert(inputTypes[0] == nvinfer1::DataType::kFLOAT || inputTypes[0] == nvinfer1::DataType::kHALF); + return inputTypes[0]; +} + +// IPluginV2 Methods +template +const char* SwinTransformerINT8Plugin::getPluginType() const noexcept +{ + return SWIN_TRANSFORMER_PLUGIN_NAME; +} + +template +const char* SwinTransformerINT8Plugin::getPluginVersion() const noexcept +{ + return SWIN_TRANSFORMER_PLUGIN_VERSION; +} + +template +int SwinTransformerINT8Plugin::getNbOutputs() const noexcept +{ + return 1; +} + +template +int SwinTransformerINT8Plugin::initialize() noexcept +{ + return 0; +} + +template +void SwinTransformerINT8Plugin::terminate() noexcept +{ +} + +template +size_t SwinTransformerINT8Plugin::getSerializationSize() const noexcept +{ + + size_t size = sizeof(int) + sizeof(int8_mode_) + sizeof(output_dim_) + sizeof(max_batch_size_) + sizeof(img_size_) + + sizeof(patch_size_) + sizeof(in_chans_) + sizeof(embed_dim_) + sizeof(window_size_) + sizeof(ape_) + + sizeof(patch_norm_) + sizeof(layer_num_) + sizeof(mlp_ratio_) + sizeof(qkv_bias_) + + sizeof(qk_scale_) + sizeof(weight_num_) + weight_num_ * sizeof(size_t) + layer_num_ * sizeof(int) + + layer_num_ * sizeof(int); + for (int i = 0; i < weight_size_.size(); i++) { + size += weight_size_[i] * sizeof(T); + } + for (int i = 0; i < d_amaxlist_.size(); i++) { + size += 96 * sizeof(float); + } + for (int i = 0; i < h_amaxlist_.size(); i++) { + size += 96 * sizeof(float); + } + return size; +} + +template +void SwinTransformerINT8Plugin::serialize(void* buffer) const noexcept +{ + int type_id = 0; + if (std::is_same::value) { + type_id = 1; + } + serialize_value(&buffer, type_id); + serialize_value(&buffer, int8_mode_); + serialize_value(&buffer, output_dim_); + serialize_value(&buffer, max_batch_size_); + serialize_value(&buffer, img_size_); + serialize_value(&buffer, patch_size_); + serialize_value(&buffer, in_chans_); + serialize_value(&buffer, embed_dim_); + serialize_value(&buffer, window_size_); + serialize_value(&buffer, ape_); + serialize_value(&buffer, patch_norm_); + serialize_value(&buffer, layer_num_); + serialize_value(&buffer, mlp_ratio_); + serialize_value(&buffer, qkv_bias_); + serialize_value(&buffer, qk_scale_); + serialize_value(&buffer, weight_num_); + for (int i = 0; i < weight_size_.size(); i++) + serialize_value(&buffer, weight_size_[i]); + + char* d = static_cast(buffer); + memcpy(d, depths_, layer_num_ * sizeof(int)); + d += layer_num_ * sizeof(int); + memcpy(d, num_heads_, layer_num_ * sizeof(int)); + d += layer_num_ * sizeof(int); + for (int i = 0; i < weight_size_.size(); i++) { + check_cuda_error(cudaMemcpy(d, weights_[i], weight_size_[i] * sizeof(T), cudaMemcpyDeviceToHost)); + d += weight_size_[i] * sizeof(T); + } + for (int i = 0; i < d_amaxlist_.size(); i++) { + // float* ptr = (float*)d; + // printf("[[%d]]: ", i); + // for(int j = 0; j < 96; j ++){ + // printf("%.6f ", ptr[j]); + // } + // printf("\n"); + check_cuda_error(cudaMemcpy(d, d_amaxlist_[i], 96 * sizeof(float), cudaMemcpyDeviceToHost)); + d += 96 * sizeof(float); + } + + for (int i = 0; i < h_amaxlist_.size(); i++) { + // float* ptr = h_amaxlist_[i]; + // printf("[[%d]]: ", i); + // for(int j = 0; j < 96; j ++){ + // printf("%.6f ", ptr[j]); + // } + // printf("\n"); + check_cuda_error(cudaMemcpy(d, h_amaxlist_[i], 96 * sizeof(float), cudaMemcpyHostToHost)); + d += 96 * sizeof(float); + } +} + +template +void SwinTransformerINT8Plugin::destroy() noexcept +{ + delete this; +} + +template +void SwinTransformerINT8Plugin::setPluginNamespace(const char* libNamespace) noexcept +{ + namespace_ = libNamespace; +} + +template +const char* SwinTransformerINT8Plugin::getPluginNamespace() const noexcept +{ + return namespace_.c_str(); +} + +template +int SwinTransformerINT8Plugin::enqueue(const PluginTensorDesc* inputDesc, + const PluginTensorDesc* outputDesc, + const void* const* inputs, + void* const* outputs, + void* workspace, + cudaStream_t stream) noexcept +{ + int batch_size = inputDesc->dims.d[0]; + assert(batch_size <= max_batch_size_); + assert(in_chans_ == inputDesc->dims.d[1]); + assert(img_size_ == inputDesc->dims.d[2]); + assert(img_size_ == inputDesc->dims.d[3]); + + int sm_ptr[1] = {sm_}; + std::vector input_tensors = std::vector{ + Tensor{MEMORY_GPU, + getTensorType(), + std::vector{(size_t)batch_size, (size_t)img_size_ * img_size_, (size_t)in_chans_}, + (const T*)(inputs[0])}, + Tensor{MEMORY_CPU, TYPE_INT8, std::vector{1}, sm_ptr}}; + + std::vector output_tensors = std::vector{ + Tensor{MEMORY_GPU, + getTensorType(), + std::vector{(size_t)batch_size, (size_t)img_size_ * img_size_, (size_t)in_chans_}, + (T*)(outputs[0])}}; + + swin_transformer_->forward(&output_tensors, &input_tensors, params_); + return 0; +} + +SwinTransformerINT8PluginCreator::SwinTransformerINT8PluginCreator() +{ + mFC.nbFields = mPluginAttributes.size(); + mFC.fields = mPluginAttributes.data(); +} + +const char* SwinTransformerINT8PluginCreator::getPluginName() const noexcept +{ + return SWIN_TRANSFORMER_PLUGIN_NAME; +} + +const char* SwinTransformerINT8PluginCreator::getPluginVersion() const noexcept +{ + return SWIN_TRANSFORMER_PLUGIN_VERSION; +} + +const PluginFieldCollection* SwinTransformerINT8PluginCreator::getFieldNames() noexcept +{ + return &mFC; +} + +IPluginV2* SwinTransformerINT8PluginCreator::createPlugin(const char* name, const PluginFieldCollection* fc) noexcept +{ + int int8_mode; + int max_batch_size; + int img_size; + int patch_size; + int in_chans; + int embed_dim; + int window_size; + int* depths = nullptr; + int* num_heads = nullptr; + bool ape; + bool patch_norm; + int layer_num; + float mlp_ratio; + bool qkv_bias; + float qk_scale; + std::vector w; + std::vector d_amax; + std::vector h_amax; + + for (int i = 0; i < fc->nbFields; i++) { + std::string field_name(fc->fields[i].name); + if (field_name.compare("int8_mode") == 0) { + int8_mode = *static_cast(fc->fields[i].data); + } + if (field_name.compare("max_batch_size") == 0) { + max_batch_size = *static_cast(fc->fields[i].data); + } + if (field_name.compare("img_size") == 0) { + img_size = *static_cast(fc->fields[i].data); + } + if (field_name.compare("patch_size") == 0) { + patch_size = *static_cast(fc->fields[i].data); + } + if (field_name.compare("in_chans") == 0) { + in_chans = *static_cast(fc->fields[i].data); + } + if (field_name.compare("embed_dim") == 0) { + embed_dim = *static_cast(fc->fields[i].data); + } + if (field_name.compare("window_size") == 0) { + window_size = *static_cast(fc->fields[i].data); + } + if (field_name.compare("ape") == 0) { + int tmp = *static_cast(fc->fields[i].data); + if (tmp == 1) + ape = true; + else + ape = false; + } + if (field_name.compare("patch_norm") == 0) { + int tmp = *static_cast(fc->fields[i].data); + if (tmp == 1) + patch_norm = true; + else + patch_norm = false; + } + if (field_name.compare("layer_num") == 0) { + layer_num = *static_cast(fc->fields[i].data); + } + if (field_name.compare("mlp_ratio") == 0) { + mlp_ratio = *static_cast(fc->fields[i].data); + } + if (field_name.compare("qkv_bias") == 0) { + int tmp = *static_cast(fc->fields[i].data); + if (tmp == 1) + qkv_bias = true; + else + qkv_bias = false; + } + if (field_name.compare("qk_scale") == 0) { + qk_scale = *static_cast(fc->fields[i].data); + } + if (field_name.compare("depths") == 0) { + depths = (int*)malloc(fc->fields[i].length * sizeof(int)); + memcpy(depths, fc->fields[i].data, fc->fields[i].length * sizeof(int)); + } + if (field_name.compare("num_heads") == 0) { + num_heads = (int*)malloc(fc->fields[i].length * sizeof(int)); + memcpy(num_heads, fc->fields[i].data, fc->fields[i].length * sizeof(int)); + } + } + + if (depths == nullptr || num_heads == nullptr) { + printf("[ERROR][SwinTransformerINT8PluginCreator::createPlugin] empty depths or num_heads!\n"); + exit(-1); + } + + char weight_name[1024]; + for (int l = 0; l < layer_num; l++) { + for (int b = 0; b < depths[l]; b++) { + sprintf(weight_name, "attention_qkv_kernel_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "attention_qkv_bias_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "attention_proj_kernel_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "attention_proj_bias_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "mlp_linear_kernel_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "mlp_linear_bias_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "mlp_linear2_kernel_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "mlp_linear2_bias_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "block_norm_gamma_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "block_norm_beta_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "block_norm2_gamma_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "block_norm2_beta_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "block_d_amaxlist_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, d_amax); + sprintf(weight_name, "block_h_amaxlist_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, h_amax); + + sprintf(weight_name, "attention_relative_pos_bias_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + } + sprintf(weight_name, "patchMerge_norm_gamma_%d", l); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "patchMerge_norm_beta_%d", l); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "patchMerge_linear_kernel_%d", l); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "attn_mask_%d", l); + getWeightsFromFC(weight_name, fc, w); + } + sprintf(weight_name, "patchEmbed_proj_kernel"); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "patchEmbed_proj_bias"); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "patchEmbed_norm_gamma"); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "patchEmbed_norm_beta"); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "norm_gamma"); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "norm_beta"); + getWeightsFromFC(weight_name, fc, w); + + if (w[0].type == nvinfer1::DataType::kFLOAT) { + SwinTransformerINT8Plugin* p = new SwinTransformerINT8Plugin(name, + int8_mode, + max_batch_size, + img_size, + patch_size, + in_chans, + embed_dim, + window_size, + depths, + num_heads, + ape, + patch_norm, + layer_num, + mlp_ratio, + qkv_bias, + qk_scale, + w, + d_amax, + h_amax); + + if (depths != nullptr) + free(depths); + if (num_heads != nullptr) + free(num_heads); + return p; + } + else if (w[0].type == nvinfer1::DataType::kHALF) { + SwinTransformerINT8Plugin* p = new SwinTransformerINT8Plugin(name, + int8_mode, + max_batch_size, + img_size, + patch_size, + in_chans, + embed_dim, + window_size, + depths, + num_heads, + ape, + patch_norm, + layer_num, + mlp_ratio, + qkv_bias, + qk_scale, + w, + d_amax, + h_amax); + if (depths != nullptr) + free(depths); + if (num_heads != nullptr) + free(num_heads); + return p; + } + else { + printf("[ERROR][SwinTransformerINT8PluginCreator::createPlugin] unsupport datatype.\n"); + exit(-1); + } +} + +IPluginV2* SwinTransformerINT8PluginCreator::deserializePlugin(const char* name, + const void* serialData, + size_t serialLength) noexcept +{ + int type_id; + size_t int_length = sizeof(int); + deserialize_value(&serialData, &int_length, &type_id); + // This object will be deleted when the network is destroyed, which will + // call SwinTransformerINT8Plugin::destroy() + if (type_id == 0) + return new SwinTransformerINT8Plugin(name, serialData, serialLength); + else if (type_id == 1) + return new SwinTransformerINT8Plugin(name, serialData, serialLength); + else { + printf("[ERROR][SwinTransformerINT8PluginCreator::deserializePlugin] unsupport data type %d\n", type_id); + exit(-1); + } +} + +void SwinTransformerINT8PluginCreator::setPluginNamespace(const char* libNamespace) noexcept +{ + namespace_ = libNamespace; +} + +const char* SwinTransformerINT8PluginCreator::getPluginNamespace() const noexcept +{ + return namespace_.c_str(); +} + +template class SwinTransformerINT8Plugin; +template class SwinTransformerINT8Plugin; + +} // namespace fastertransformer diff --git a/src/fastertransformer/tensorrt_plugin/swin/swinTransformerINT8Plugin.h b/src/fastertransformer/tensorrt_plugin/swin/swinTransformerINT8Plugin.h new file mode 100644 index 000000000..b999c1100 --- /dev/null +++ b/src/fastertransformer/tensorrt_plugin/swin/swinTransformerINT8Plugin.h @@ -0,0 +1,320 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include + +#ifndef SWIN_TRANSFORMER_PLUGIN_H +#define SWIN_TRANSFORMER_PLUGIN_H + +#include "NvInfer.h" +#include "NvInferPlugin.h" +#include "NvInferRuntime.h" +#include "cublas_v2.h" +#include +#include + +#include "examples/cpp/swin/functions.h" +#include "src/fastertransformer/models/swin_int8/SwinINT8.h" +#include "src/fastertransformer/utils/allocator.h" +using namespace std; + +namespace fastertransformer { + +namespace { +static const char* SWIN_TRANSFORMER_PLUGIN_VERSION{"1"}; +static const char* SWIN_TRANSFORMER_PLUGIN_NAME{"CustomSwinTransformerINT8Plugin"}; +} // namespace + +inline nvinfer1::DataType fieldTypeToDataType(const nvinfer1::PluginFieldType ftype) +{ + switch (ftype) { + case nvinfer1::PluginFieldType::kFLOAT32: { + return nvinfer1::DataType::kFLOAT; + } + case nvinfer1::PluginFieldType::kFLOAT16: { + return nvinfer1::DataType::kHALF; + } + case nvinfer1::PluginFieldType::kINT32: { + return nvinfer1::DataType::kINT32; + } + case nvinfer1::PluginFieldType::kINT8: { + return nvinfer1::DataType::kINT8; + } + default: + throw std::invalid_argument("No corresponding datatype for plugin field type"); + } +} + +template +class SwinTransformerINT8Plugin: public nvinfer1::IPluginV2DynamicExt { +private: + const std::string layer_name_; + std::string namespace_; + + std::vector weights_; // in device memory + std::vector d_amaxlist_; // in device memory + std::vector h_amaxlist_; // in host memory + std::vector weight_size_; + cublasHandle_t cublas_handle_ = nullptr; + cublasLtHandle_t cublaslt_handle_ = nullptr; + cudnnHandle_t cudnn_handle_ = nullptr; + SwinTransformerINT8Weight params_; + SwinTransformerINT8* swin_transformer_ = nullptr; + std::mutex* cublasWrapperMutex_ = nullptr; + cublasAlgoMap* cublasAlgoMap_ = nullptr; + fastertransformer::Allocator* allocator_ = nullptr; + int int8_mode_; + int output_dim_; + int weight_num_; + int max_batch_size_; + int img_size_; + int patch_size_; + int in_chans_; + int embed_dim_; + int window_size_; + bool ape_; + int patch_norm_; + int layer_num_; + float mlp_ratio_; + bool qkv_bias_; + float qk_scale_; + int* depths_; + int* num_heads_; + +public: + int sm_; + SwinTransformerINT8Plugin(const std::string& name, + const int int8_mode, + const int max_batch, + const int img_size, + const int patch_size, + const int in_chans, + const int embed_dim, + const int window_size, + int* depths, + int* num_heads, + const bool ape, + const bool patch_norm, + const int layer_num, + const float mlp_ratio, + const bool qkv_bias, + const float qk_scale, + const std::vector& w, + const std::vector& d_amax, + const std::vector& h_amax); + + SwinTransformerINT8Plugin(const std::string& name, + const int int8_mode, + const int max_batch, + const int img_size, + const int patch_size, + const int in_chans, + const int embed_dim, + const int window_size, + int* depths, + int* num_heads, + const bool ape, + const bool patch_norm, + const int layer_num, + const float mlp_ratio, + const bool qkv_bias, + const float qk_scale, + const std::vector& w, + const std::vector& d_amax, + const std::vector& h_amax); + + SwinTransformerINT8Plugin(const std::string& name, const void* data, size_t length); + + // It doesn't make sense to make SwinTransformerINT8Plugin without arguments, so we + // delete default constructor. + SwinTransformerINT8Plugin() = delete; + + ~SwinTransformerINT8Plugin(); + + // IPluginV2DynamicExt Methods + nvinfer1::IPluginV2DynamicExt* clone() const noexcept override; + nvinfer1::DimsExprs getOutputDimensions(int outputIndex, + const nvinfer1::DimsExprs* inputs, + int nbInputs, + nvinfer1::IExprBuilder& exprBuilder) noexcept override; + bool supportsFormatCombination(int pos, + const nvinfer1::PluginTensorDesc* inOut, + int nbInputs, + int nbOutputs) noexcept override; + void configurePlugin(const nvinfer1::DynamicPluginTensorDesc* in, + int nbInputs, + const nvinfer1::DynamicPluginTensorDesc* out, + int nbOutputs) noexcept override; + size_t getWorkspaceSize(const nvinfer1::PluginTensorDesc* inputs, + int nbInputs, + const nvinfer1::PluginTensorDesc* outputs, + int nbOutputs) const noexcept override; + int enqueue(const nvinfer1::PluginTensorDesc* inputDesc, + const nvinfer1::PluginTensorDesc* outputDesc, + const void* const* inputs, + void* const* outputs, + void* workspace, + cudaStream_t stream) noexcept override; + + // IPluginV2Ext Methods + nvinfer1::DataType + getOutputDataType(int index, const nvinfer1::DataType* inputTypes, int nbInputs) const noexcept override; + + // IPluginV2 Methods + const char* getPluginType() const noexcept override; + const char* getPluginVersion() const noexcept override; + int getNbOutputs() const noexcept override; + int initialize() noexcept override; + void terminate() noexcept override; + size_t getSerializationSize() const noexcept override; + void serialize(void* buffer) const noexcept override; + void destroy() noexcept override; + void setPluginNamespace(const char* pluginNamespace) noexcept override; + const char* getPluginNamespace() const noexcept override; + + // Host To Device + static T* cudaMallocAndCopy(vector& weights, const nvinfer1::Weights& w) + { + T* dpWeight; + size_t nValue = w.count; + check_cuda_error(cudaMalloc(&dpWeight, nValue * sizeof(T))); + check_cuda_error(cudaMemcpy(dpWeight, w.values, nValue * sizeof(T), cudaMemcpyHostToDevice)); + + weights.push_back(dpWeight); + return dpWeight; + } + + // Device to Device + static T* cudaMallocAndCopy(vector& weights, + const T* dpWeightOld, + const vector& weight_size, + const int weight_idx, + bool is_float = false) + { + T* dpWeight; + size_t nValue = weight_size[weight_idx]; + check_cuda_error(cudaMalloc((void**)&dpWeight, nValue * sizeof(T))); + check_cuda_error(cudaMemcpy(dpWeight, dpWeightOld, nValue * sizeof(T), cudaMemcpyDeviceToDevice)); + weights.push_back(dpWeight); + return dpWeight; + } + + static float* d_amaxCopy(vector& d_amaxlist, const nvinfer1::Weights& w) + { + float* dpWeight; + size_t nValue = w.count; + check_cuda_error(cudaMalloc(&dpWeight, nValue * sizeof(float))); + check_cuda_error(cudaMemcpy(dpWeight, w.values, nValue * sizeof(float), cudaMemcpyHostToDevice)); + + d_amaxlist.push_back(dpWeight); + return dpWeight; + } + + // Device to Device + static float* + d_amaxCopy(vector& d_amaxlist, const float* dpWeightOld, size_t weight_size, const int weight_idx) + { + float* dpWeight; + size_t nValue = weight_size; + // printf("[DEVICE]dpWeight is float, allocate %ld val, each %lu bytes\n", nValue, sizeof(float)); + check_cuda_error(cudaMalloc((void**)&dpWeight, nValue * sizeof(float))); + check_cuda_error(cudaMemcpy(dpWeight, dpWeightOld, nValue * sizeof(float), cudaMemcpyDeviceToDevice)); + + d_amaxlist.push_back(dpWeight); + return dpWeight; + } + + // Host To Host + static float* h_amaxCopy(vector& h_amaxlist, const nvinfer1::Weights& w) + { + float* dpWeight; + size_t nValue = w.count; + // printf("[Host]tmp is float, malloc %ld val, each %lu bytes\n", nValue, sizeof(float)); + dpWeight = (float*)malloc(nValue * sizeof(float)); + check_cuda_error(cudaMemcpy(dpWeight, w.values, nValue * sizeof(float), cudaMemcpyHostToHost)); + + h_amaxlist.push_back(dpWeight); + return dpWeight; + } + + // Host To Host + static float* + h_amaxCopy(vector& h_amaxlist, const float* dpWeightOld, size_t weight_size, const int weight_idx) + { + float* dpWeight; + size_t nValue = weight_size; + // printf("[Host]dpWeight is float, malloc %ld val, each %lu bytes\n", nValue, sizeof(float)); + dpWeight = (float*)malloc(nValue * sizeof(float)); + check_cuda_error(cudaMemcpy(dpWeight, dpWeightOld, nValue * sizeof(float), cudaMemcpyHostToHost)); + + h_amaxlist.push_back(dpWeight); + return dpWeight; + } + + /*protected: + // To prevent compiler warnings. + using nvinfer1::IPluginV2DynamicExt::canBroadcastInputAcrossBatch; + using nvinfer1::IPluginV2DynamicExt::configurePlugin; + using nvinfer1::IPluginV2DynamicExt::enqueue; + using nvinfer1::IPluginV2DynamicExt::getOutputDimensions; + using nvinfer1::IPluginV2DynamicExt::getWorkspaceSize; + using nvinfer1::IPluginV2DynamicExt::isOutputBroadcastAcrossBatch; + using nvinfer1::IPluginV2DynamicExt::supportsFormat;*/ +}; + +class SwinTransformerINT8PluginCreator: public nvinfer1::IPluginCreator { +public: + SwinTransformerINT8PluginCreator(); + + const char* getPluginName() const noexcept override; + + const char* getPluginVersion() const noexcept override; + + const nvinfer1::PluginFieldCollection* getFieldNames() noexcept override; + + nvinfer1::IPluginV2* createPlugin(const char* name, const nvinfer1::PluginFieldCollection* fc) noexcept override; + + nvinfer1::IPluginV2* + deserializePlugin(const char* name, const void* serialData, size_t serialLength) noexcept override; + + void setPluginNamespace(const char* pluginNamespace) noexcept override; + + const char* getPluginNamespace() const noexcept override; + + static void + getWeightsFromFC(std::string name, const nvinfer1::PluginFieldCollection* fc, std::vector& w) + { + for (int i = 0; i < fc->nbFields; i++) { + std::string field_name(fc->fields[i].name); + if (field_name.compare(name) == 0) { + nvinfer1::Weights tmp; + tmp.values = fc->fields[i].data; + tmp.count = fc->fields[i].length; + tmp.type = fieldTypeToDataType(fc->fields[i].type); + w.push_back(tmp); + break; + } + } + } + +private: + static nvinfer1::PluginFieldCollection mFC; + static std::vector mPluginAttributes; + std::string namespace_; +}; + +} // namespace fastertransformer +#endif // TRT_SWIN_TRANSFORMER_H diff --git a/src/fastertransformer/tensorrt_plugin/swin/swinTransformerPlugin.cpp b/src/fastertransformer/tensorrt_plugin/swin/swinTransformerPlugin.cpp new file mode 100644 index 000000000..3248c6b98 --- /dev/null +++ b/src/fastertransformer/tensorrt_plugin/swin/swinTransformerPlugin.cpp @@ -0,0 +1,896 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "swinTransformerPlugin.h" +#include "NvInfer.h" +#include "serialize.hpp" +#include +#include + +#include +#include +#include +#include +#include + +using namespace nvinfer1; +using namespace std; + +namespace fastertransformer { + +// Static class fields initialization +PluginFieldCollection SwinTransformerPluginCreator::mFC{}; +std::vector SwinTransformerPluginCreator::mPluginAttributes; + +REGISTER_TENSORRT_PLUGIN(SwinTransformerPluginCreator); + +template +SwinTransformerPlugin::SwinTransformerPlugin(const std::string& name, + const int max_batch_size, + const int img_size, + const int patch_size, + const int in_chans, + const int embed_dim, + const int window_size, + int* depths, + int* num_heads, + const bool ape, + const bool patch_norm, + const int layer_num, + const float mlp_ratio, + const bool qkv_bias, + const float qk_scale, + const std::vector& w): + layer_name_(name), + max_batch_size_(max_batch_size), + img_size_(img_size), + patch_size_(patch_size), + in_chans_(in_chans), + embed_dim_(embed_dim), + window_size_(window_size), + ape_(ape), + patch_norm_(patch_norm), + layer_num_(layer_num), + mlp_ratio_(mlp_ratio), + qkv_bias_(qkv_bias), + qk_scale_(qk_scale) +{ + check_cuda_error(cublasCreate(&cublas_handle_)); + check_cuda_error(cublasLtCreate(&cublaslt_handle_)); + checkCUDNN(cudnnCreate(&cudnn_handle_)); + sm_ = getSMVersion(); + + weight_num_ = getWeightNum(layer_num, depths); + if (weight_num_ != w.size()) { + printf("[ERROR][SwinTransformerPlugin] weights number %lu does not match expected number %d!\n", + w.size(), + weight_num_); + exit(-1); + } + + depths_ = (int*)malloc(layer_num * sizeof(int)); + num_heads_ = (int*)malloc(layer_num * sizeof(int)); + memcpy(depths_, depths, layer_num * sizeof(int)); + memcpy(num_heads_, num_heads, layer_num * sizeof(int)); + + output_dim_ = int(pow(2, layer_num - 1)) * embed_dim; + + // calculate the size of each weight + generateWeightSize( + weight_size_, layer_num, embed_dim, mlp_ratio, window_size, img_size, patch_size, in_chans, depths, num_heads); + + int weight_idx = 0; + for (int l = 0; l < layer_num; l++) { + SwinTransformerBasicLayerWeight bl; + for (int di = 0; di < depths[l]; di++) { + SwinTransformerBlockWeight p; + p.attention_weights.query_weight.kernel = + cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.attention_weights.query_weight.bias = + cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.attention_weights.attention_output_weight.kernel = + cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.attention_weights.attention_output_weight.bias = + cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.ffn_weights.intermediate_weight.kernel = + cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.ffn_weights.intermediate_weight.bias = + cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.ffn_weights.output_weight.kernel = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.ffn_weights.output_weight.bias = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.attn_layernorm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.attn_layernorm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.ffn_layernorm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.ffn_layernorm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + p.attention_relative_pos_bias = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + bl.block_weight_list.push_back(p); + } + bl.merge_layernorm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + bl.merge_layernorm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + bl.merge_linear_weights.kernel = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + bl.attn_mask = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + params_.basic_layer_weight_list.push_back(bl); + } + params_.patchEmbed_linear_weights.kernel = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + params_.patchEmbed_linear_weights.bias = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + params_.patchEmbed_norm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + params_.patchEmbed_norm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + params_.norm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + params_.norm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx], weight_size_, weight_idx); + weight_idx++; + + cublasAlgoMap_ = new cublasAlgoMap(GEMM_CONFIG, ""); + cublasWrapperMutex_ = new std::mutex(); + allocator_ = new Allocator(getDevice()); + + cublasMMWrapper* cublas_wrapper = + new cublasMMWrapper(cublas_handle_, cublaslt_handle_, nullptr, cublasAlgoMap_, cublasWrapperMutex_, nullptr); + if (std::is_same::value) { + cublas_wrapper->setFP16GemmConfig(); + } + else if (std::is_same::value) { + cublas_wrapper->setFP32GemmConfig(); + } + + swin_transformer_ = new SwinTransformer(max_batch_size, + img_size, + patch_size, + in_chans, + embed_dim, + window_size, + depths, + num_heads, + ape, + patch_norm, + layer_num, + mlp_ratio, + cudnn_handle_, + nullptr, + cublas_wrapper, + allocator_, + false, + qkv_bias, + qk_scale); +} + +template +SwinTransformerPlugin::SwinTransformerPlugin(const std::string& name, + const int max_batch_size, + const int img_size, + const int patch_size, + const int in_chans, + const int embed_dim, + const int window_size, + int* depths, + int* num_heads, + const bool ape, + const bool patch_norm, + const int layer_num, + const float mlp_ratio, + const bool qkv_bias, + const float qk_scale, + const std::vector& w): + layer_name_(name), + max_batch_size_(max_batch_size), + img_size_(img_size), + patch_size_(patch_size), + in_chans_(in_chans), + embed_dim_(embed_dim), + window_size_(window_size), + ape_(ape), + patch_norm_(patch_norm), + layer_num_(layer_num), + mlp_ratio_(mlp_ratio), + qkv_bias_(qkv_bias), + qk_scale_(qk_scale) +{ + + check_cuda_error(cublasCreate(&cublas_handle_)); + check_cuda_error(cublasLtCreate(&cublaslt_handle_)); + checkCUDNN(cudnnCreate(&cudnn_handle_)); + + sm_ = getSMVersion(); + weight_num_ = getWeightNum(layer_num, depths); + if (weight_num_ != w.size()) { + printf("[ERROR][SwinTransformerPlugin] weights number %lu does not match expected number %d!\n", + w.size(), + weight_num_); + exit(-1); + } + + depths_ = (int*)malloc(layer_num * sizeof(int)); + num_heads_ = (int*)malloc(layer_num * sizeof(int)); + memcpy(depths_, depths, layer_num * sizeof(int)); + memcpy(num_heads_, num_heads, layer_num * sizeof(int)); + + output_dim_ = int(pow(2, layer_num - 1)) * embed_dim; + + int weight_idx = 0; + for (int l = 0; l < layer_num; l++) { + SwinTransformerBasicLayerWeight bl; + for (int di = 0; di < depths[l]; di++) { + SwinTransformerBlockWeight p; + p.attention_weights.query_weight.kernel = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.attention_weights.query_weight.bias = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.attention_weights.attention_output_weight.kernel = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.attention_weights.attention_output_weight.bias = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.ffn_weights.intermediate_weight.kernel = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.ffn_weights.intermediate_weight.bias = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.ffn_weights.output_weight.kernel = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.ffn_weights.output_weight.bias = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.attn_layernorm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.attn_layernorm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.ffn_layernorm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.ffn_layernorm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx++]); + p.attention_relative_pos_bias = cudaMallocAndCopy(weights_, w[weight_idx++]); + bl.block_weight_list.push_back(p); + } + bl.merge_layernorm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx++]); + bl.merge_layernorm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx++]); + bl.merge_linear_weights.kernel = cudaMallocAndCopy(weights_, w[weight_idx++]); + bl.attn_mask = cudaMallocAndCopy(weights_, w[weight_idx++]); + params_.basic_layer_weight_list.push_back(bl); + } + params_.patchEmbed_linear_weights.kernel = cudaMallocAndCopy(weights_, w[weight_idx++]); + params_.patchEmbed_linear_weights.bias = cudaMallocAndCopy(weights_, w[weight_idx++]); + params_.patchEmbed_norm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx++]); + params_.patchEmbed_norm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx++]); + params_.norm_weights.gamma = cudaMallocAndCopy(weights_, w[weight_idx++]); + params_.norm_weights.beta = cudaMallocAndCopy(weights_, w[weight_idx++]); + + cublasAlgoMap_ = new cublasAlgoMap("igemm.config", ""); + cublasWrapperMutex_ = new std::mutex(); + allocator_ = new Allocator(getDevice()); + + cublasMMWrapper* cublas_wrapper = + new cublasMMWrapper(cublas_handle_, cublaslt_handle_, nullptr, cublasAlgoMap_, cublasWrapperMutex_, nullptr); + if (std::is_same::value) { + cublas_wrapper->setFP16GemmConfig(); + } + else if (std::is_same::value) { + cublas_wrapper->setFP32GemmConfig(); + } + + swin_transformer_ = new SwinTransformer(max_batch_size_, + img_size_, + patch_size_, + in_chans_, + embed_dim_, + window_size_, + depths_, + num_heads_, + ape_, + patch_norm_, + layer_num_, + mlp_ratio_, + cudnn_handle_, + nullptr, + cublas_wrapper, + allocator_, + false, + qkv_bias_, + qk_scale_); +} + +template +SwinTransformerPlugin::SwinTransformerPlugin(const std::string& name, const void* data, size_t length): + layer_name_(name) +{ + check_cuda_error(cublasCreate(&cublas_handle_)); + check_cuda_error(cublasLtCreate(&cublaslt_handle_)); + checkCUDNN(cudnnCreate(&cudnn_handle_)); + + sm_ = getSMVersion(); + deserialize_value(&data, &length, &output_dim_); + deserialize_value(&data, &length, &max_batch_size_); + deserialize_value(&data, &length, &img_size_); + deserialize_value(&data, &length, &patch_size_); + deserialize_value(&data, &length, &in_chans_); + deserialize_value(&data, &length, &embed_dim_); + deserialize_value(&data, &length, &window_size_); + deserialize_value(&data, &length, &ape_); + deserialize_value(&data, &length, &patch_norm_); + deserialize_value(&data, &length, &layer_num_); + deserialize_value(&data, &length, &mlp_ratio_); + deserialize_value(&data, &length, &qkv_bias_); + deserialize_value(&data, &length, &qk_scale_); + deserialize_value(&data, &length, &weight_num_); + for (int i = 0; i < weight_num_; i++) { + size_t tmp; + deserialize_value(&data, &length, &tmp); + weight_size_.push_back(tmp); + } + + depths_ = (int*)malloc(layer_num_ * sizeof(int)); + num_heads_ = (int*)malloc(layer_num_ * sizeof(int)); + const char* d = static_cast(data); + memcpy(depths_, d, layer_num_ * sizeof(int)); + d = d + layer_num_ * sizeof(int); + memcpy(num_heads_, d, layer_num_ * sizeof(int)); + d = d + layer_num_ * sizeof(int); + for (int i = 0; i < weight_size_.size(); i++) { + T* tmp; + check_cuda_error(cudaMalloc((void**)&tmp, weight_size_[i] * sizeof(T))); + check_cuda_error(cudaMemcpy(tmp, d, weight_size_[i] * sizeof(T), cudaMemcpyHostToDevice)); + d = d + weight_size_[i] * sizeof(T); + weights_.push_back(tmp); + } + + int weight_idx = 0; + for (int l = 0; l < layer_num_; l++) { + SwinTransformerBasicLayerWeight bl; + for (int di = 0; di < depths_[l]; di++) { + SwinTransformerBlockWeight p; + p.attention_weights.query_weight.kernel = weights_[weight_idx++]; + p.attention_weights.query_weight.bias = weights_[weight_idx++]; + p.attention_weights.attention_output_weight.kernel = weights_[weight_idx++]; + p.attention_weights.attention_output_weight.bias = weights_[weight_idx++]; + p.ffn_weights.intermediate_weight.kernel = weights_[weight_idx++]; + p.ffn_weights.intermediate_weight.bias = weights_[weight_idx++]; + p.ffn_weights.output_weight.kernel = weights_[weight_idx++]; + p.ffn_weights.output_weight.bias = weights_[weight_idx++]; + p.attn_layernorm_weights.gamma = weights_[weight_idx++]; + p.attn_layernorm_weights.beta = weights_[weight_idx++]; + p.ffn_layernorm_weights.gamma = weights_[weight_idx++]; + p.ffn_layernorm_weights.beta = weights_[weight_idx++]; + p.attention_relative_pos_bias = weights_[weight_idx++]; + bl.block_weight_list.push_back(p); + } + bl.merge_layernorm_weights.gamma = weights_[weight_idx++]; + bl.merge_layernorm_weights.beta = weights_[weight_idx++]; + bl.merge_linear_weights.kernel = weights_[weight_idx++]; + bl.attn_mask = weights_[weight_idx++]; + params_.basic_layer_weight_list.push_back(bl); + } + params_.patchEmbed_linear_weights.kernel = weights_[weight_idx++]; + params_.patchEmbed_linear_weights.bias = weights_[weight_idx++]; + params_.patchEmbed_norm_weights.gamma = weights_[weight_idx++]; + params_.patchEmbed_norm_weights.beta = weights_[weight_idx++]; + params_.norm_weights.gamma = weights_[weight_idx++]; + params_.norm_weights.beta = weights_[weight_idx++]; + + cublasAlgoMap_ = new cublasAlgoMap("igemm.config", ""); + cublasWrapperMutex_ = new std::mutex(); + allocator_ = new Allocator(getDevice()); + + cublasMMWrapper* cublas_wrapper = + new cublasMMWrapper(cublas_handle_, cublaslt_handle_, nullptr, cublasAlgoMap_, cublasWrapperMutex_, nullptr); + if (std::is_same::value) { + cublas_wrapper->setFP16GemmConfig(); + } + else if (std::is_same::value) { + cublas_wrapper->setFP32GemmConfig(); + } + + swin_transformer_ = new SwinTransformer(max_batch_size_, + img_size_, + patch_size_, + in_chans_, + embed_dim_, + window_size_, + depths_, + num_heads_, + ape_, + patch_norm_, + layer_num_, + mlp_ratio_, + cudnn_handle_, + nullptr, + cublas_wrapper, + allocator_, + false, + qkv_bias_, + qk_scale_); +} + +template +SwinTransformerPlugin::~SwinTransformerPlugin() +{ + for (int i = 0; i < weights_.size(); i++) { + check_cuda_error(cudaFree(weights_[i])); + } + check_cuda_error(cublasDestroy(cublas_handle_)); + check_cuda_error(cublasLtDestroy(cublaslt_handle_)); + checkCUDNN(cudnnDestroy(cudnn_handle_)); + delete cublasWrapperMutex_; + delete cublasAlgoMap_; + delete swin_transformer_; + delete allocator_; + free(num_heads_); + free(depths_); + weights_.clear(); + weight_size_.clear(); +} + +// IPluginV2DynamicExt Methods +template +nvinfer1::IPluginV2DynamicExt* SwinTransformerPlugin::clone() const noexcept +{ + + SwinTransformerPlugin* ret = new SwinTransformerPlugin(layer_name_, + max_batch_size_, + img_size_, + patch_size_, + in_chans_, + embed_dim_, + window_size_, + depths_, + num_heads_, + ape_, + patch_norm_, + layer_num_, + mlp_ratio_, + qkv_bias_, + qk_scale_, + weights_); + return ret; +} + +template +DimsExprs SwinTransformerPlugin::getOutputDimensions(int outputIndex, + const DimsExprs* inputs, + int nbInputs, + IExprBuilder& exprBuilder) noexcept +{ + // Input is B*in_chans*H*W, output should be B*dim*1*1 for fc layer + assert(outputIndex == 0); + // Copy over everything + DimsExprs output; + output.nbDims = 4; + output.d[0] = inputs[0].d[0]; + output.d[1] = exprBuilder.constant(output_dim_); + output.d[2] = exprBuilder.constant(1); + output.d[3] = exprBuilder.constant(1); + return output; +} + +template +bool SwinTransformerPlugin::supportsFormatCombination(int pos, + const PluginTensorDesc* inOut, + int nbInputs, + int nbOutputs) noexcept +{ + assert(pos >= 0); + assert(pos < 2); + assert(nbInputs == 1); + + return true; +} + +template +void SwinTransformerPlugin::configurePlugin(const DynamicPluginTensorDesc* in, + int nbInputs, + const DynamicPluginTensorDesc* out, + int nbOutputs) noexcept +{ + assert(nbInputs == 1); + assert(nbOutputs == 1); +} + +template +size_t SwinTransformerPlugin::getWorkspaceSize(const PluginTensorDesc* inputs, + int nbInputs, + const PluginTensorDesc* outputs, + int nbOutputs) const noexcept +{ + return 0; +} + +// IPluginV2Ext Methods +template +nvinfer1::DataType SwinTransformerPlugin::getOutputDataType(int index, + const nvinfer1::DataType* inputTypes, + int nbInputs) const noexcept +{ + assert(index == 0); + assert(inputTypes[0] == nvinfer1::DataType::kFLOAT || inputTypes[0] == nvinfer1::DataType::kHALF); + return inputTypes[0]; +} + +// IPluginV2 Methods +template +const char* SwinTransformerPlugin::getPluginType() const noexcept +{ + return SWIN_TRANSFORMER_PLUGIN_NAME; +} + +template +const char* SwinTransformerPlugin::getPluginVersion() const noexcept +{ + return SWIN_TRANSFORMER_PLUGIN_VERSION; +} + +template +int SwinTransformerPlugin::getNbOutputs() const noexcept +{ + return 1; +} + +template +int SwinTransformerPlugin::initialize() noexcept +{ + return 0; +} + +template +void SwinTransformerPlugin::terminate() noexcept +{ +} + +template +size_t SwinTransformerPlugin::getSerializationSize() const noexcept +{ + + size_t size = sizeof(int) + sizeof(output_dim_) + sizeof(max_batch_size_) + sizeof(img_size_) + sizeof(patch_size_) + + sizeof(in_chans_) + sizeof(embed_dim_) + sizeof(window_size_) + sizeof(ape_) + sizeof(patch_norm_) + + sizeof(layer_num_) + sizeof(mlp_ratio_) + sizeof(qkv_bias_) + sizeof(qk_scale_) + + sizeof(weight_num_) + weight_num_ * sizeof(size_t) + layer_num_ * sizeof(int) + + layer_num_ * sizeof(int); + for (int i = 0; i < weight_size_.size(); i++) { + size += weight_size_[i] * sizeof(T); + } + return size; +} + +template +void SwinTransformerPlugin::serialize(void* buffer) const noexcept +{ + int type_id = 0; + if (std::is_same::value) { + type_id = 1; + } + serialize_value(&buffer, type_id); + serialize_value(&buffer, output_dim_); + serialize_value(&buffer, max_batch_size_); + serialize_value(&buffer, img_size_); + serialize_value(&buffer, patch_size_); + serialize_value(&buffer, in_chans_); + serialize_value(&buffer, embed_dim_); + serialize_value(&buffer, window_size_); + serialize_value(&buffer, ape_); + serialize_value(&buffer, patch_norm_); + serialize_value(&buffer, layer_num_); + serialize_value(&buffer, mlp_ratio_); + serialize_value(&buffer, qkv_bias_); + serialize_value(&buffer, qk_scale_); + serialize_value(&buffer, weight_num_); + for (int i = 0; i < weight_size_.size(); i++) + serialize_value(&buffer, weight_size_[i]); + + char* d = static_cast(buffer); + memcpy(d, depths_, layer_num_ * sizeof(int)); + d += layer_num_ * sizeof(int); + memcpy(d, num_heads_, layer_num_ * sizeof(int)); + d += layer_num_ * sizeof(int); + for (int i = 0; i < weight_size_.size(); i++) { + check_cuda_error(cudaMemcpy(d, weights_[i], weight_size_[i] * sizeof(T), cudaMemcpyDeviceToHost)); + d += weight_size_[i] * sizeof(T); + } +} + +template +void SwinTransformerPlugin::destroy() noexcept +{ + delete this; +} + +template +void SwinTransformerPlugin::setPluginNamespace(const char* libNamespace) noexcept +{ + namespace_ = libNamespace; +} + +template +const char* SwinTransformerPlugin::getPluginNamespace() const noexcept +{ + return namespace_.c_str(); +} + +template +int SwinTransformerPlugin::enqueue(const PluginTensorDesc* inputDesc, + const PluginTensorDesc* outputDesc, + const void* const* inputs, + void* const* outputs, + void* workspace, + cudaStream_t stream) noexcept +{ + int batch_size = inputDesc->dims.d[0]; + assert(batch_size <= max_batch_size_); + assert(in_chans_ == inputDesc->dims.d[1]); + assert(img_size_ == inputDesc->dims.d[2]); + assert(img_size_ == inputDesc->dims.d[3]); + + int sm_ptr[1] = {sm_}; + std::vector input_tensors = std::vector{ + Tensor{MEMORY_GPU, + getTensorType(), + std::vector{(size_t)batch_size, (size_t)img_size_ * img_size_, (size_t)in_chans_}, + (const T*)(inputs[0])}, + Tensor{MEMORY_CPU, TYPE_INT8, std::vector{1}, sm_ptr}}; + + std::vector output_tensors = std::vector{ + Tensor{MEMORY_GPU, + getTensorType(), + std::vector{(size_t)batch_size, (size_t)img_size_ * img_size_, (size_t)in_chans_}, + (T*)(outputs[0])}}; + + swin_transformer_->forward(&output_tensors, &input_tensors, params_); + return 0; +} + +SwinTransformerPluginCreator::SwinTransformerPluginCreator() +{ + mFC.nbFields = mPluginAttributes.size(); + mFC.fields = mPluginAttributes.data(); +} + +const char* SwinTransformerPluginCreator::getPluginName() const noexcept +{ + return SWIN_TRANSFORMER_PLUGIN_NAME; +} + +const char* SwinTransformerPluginCreator::getPluginVersion() const noexcept +{ + return SWIN_TRANSFORMER_PLUGIN_VERSION; +} + +const PluginFieldCollection* SwinTransformerPluginCreator::getFieldNames() noexcept +{ + return &mFC; +} + +IPluginV2* SwinTransformerPluginCreator::createPlugin(const char* name, const PluginFieldCollection* fc) noexcept +{ + int max_batch_size; + int img_size; + int patch_size; + int in_chans; + int embed_dim; + int window_size; + int* depths = nullptr; + int* num_heads = nullptr; + bool ape; + bool patch_norm; + int layer_num; + float mlp_ratio; + bool qkv_bias; + float qk_scale; + std::vector w; + + for (int i = 0; i < fc->nbFields; i++) { + std::string field_name(fc->fields[i].name); + if (field_name.compare("max_batch_size") == 0) { + max_batch_size = *static_cast(fc->fields[i].data); + } + if (field_name.compare("img_size") == 0) { + img_size = *static_cast(fc->fields[i].data); + } + if (field_name.compare("patch_size") == 0) { + patch_size = *static_cast(fc->fields[i].data); + } + if (field_name.compare("in_chans") == 0) { + in_chans = *static_cast(fc->fields[i].data); + } + if (field_name.compare("embed_dim") == 0) { + embed_dim = *static_cast(fc->fields[i].data); + } + if (field_name.compare("window_size") == 0) { + window_size = *static_cast(fc->fields[i].data); + } + if (field_name.compare("ape") == 0) { + int tmp = *static_cast(fc->fields[i].data); + if (tmp == 1) + ape = true; + else + ape = false; + } + if (field_name.compare("patch_norm") == 0) { + int tmp = *static_cast(fc->fields[i].data); + if (tmp == 1) + patch_norm = true; + else + patch_norm = false; + } + if (field_name.compare("layer_num") == 0) { + layer_num = *static_cast(fc->fields[i].data); + } + if (field_name.compare("mlp_ratio") == 0) { + mlp_ratio = *static_cast(fc->fields[i].data); + } + if (field_name.compare("qkv_bias") == 0) { + int tmp = *static_cast(fc->fields[i].data); + if (tmp == 1) + qkv_bias = true; + else + qkv_bias = false; + } + if (field_name.compare("qk_scale") == 0) { + qk_scale = *static_cast(fc->fields[i].data); + } + if (field_name.compare("depths") == 0) { + depths = (int*)malloc(fc->fields[i].length * sizeof(int)); + memcpy(depths, fc->fields[i].data, fc->fields[i].length * sizeof(int)); + } + if (field_name.compare("num_heads") == 0) { + num_heads = (int*)malloc(fc->fields[i].length * sizeof(int)); + memcpy(num_heads, fc->fields[i].data, fc->fields[i].length * sizeof(int)); + } + } + + if (depths == nullptr || num_heads == nullptr) { + printf("[ERROR][SwinTransformerPluginCreator::createPlugin] empty depths or num_heads!\n"); + exit(-1); + } + + char weight_name[1024]; + for (int l = 0; l < layer_num; l++) { + for (int b = 0; b < depths[l]; b++) { + sprintf(weight_name, "attention_qkv_kernel_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "attention_qkv_bias_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "attention_proj_kernel_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "attention_proj_bias_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "mlp_linear_kernel_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "mlp_linear_bias_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "mlp_linear2_kernel_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "mlp_linear2_bias_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "block_norm_gamma_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "block_norm_beta_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "block_norm2_gamma_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "block_norm2_beta_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "attention_relative_pos_bias_%d_%d", l, b); + getWeightsFromFC(weight_name, fc, w); + } + sprintf(weight_name, "patchMerge_norm_gamma_%d", l); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "patchMerge_norm_beta_%d", l); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "patchMerge_linear_kernel_%d", l); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "attn_mask_%d", l); + getWeightsFromFC(weight_name, fc, w); + } + sprintf(weight_name, "patchEmbed_proj_kernel"); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "patchEmbed_proj_bias"); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "patchEmbed_norm_gamma"); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "patchEmbed_norm_beta"); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "norm_gamma"); + getWeightsFromFC(weight_name, fc, w); + sprintf(weight_name, "norm_beta"); + getWeightsFromFC(weight_name, fc, w); + + if (w[0].type == nvinfer1::DataType::kFLOAT) { + SwinTransformerPlugin* p = new SwinTransformerPlugin(name, + max_batch_size, + img_size, + patch_size, + in_chans, + embed_dim, + window_size, + depths, + num_heads, + ape, + patch_norm, + layer_num, + mlp_ratio, + qkv_bias, + qk_scale, + w); + + if (depths != nullptr) + free(depths); + if (num_heads != nullptr) + free(num_heads); + return p; + } + else if (w[0].type == nvinfer1::DataType::kHALF) { + SwinTransformerPlugin* p = new SwinTransformerPlugin(name, + max_batch_size, + img_size, + patch_size, + in_chans, + embed_dim, + window_size, + depths, + num_heads, + ape, + patch_norm, + layer_num, + mlp_ratio, + qkv_bias, + qk_scale, + w); + if (depths != nullptr) + free(depths); + if (num_heads != nullptr) + free(num_heads); + return p; + } + else { + printf("[ERROR][SwinTransformerPluginCreator::createPlugin] unsupport datatype.\n"); + exit(-1); + } +} + +IPluginV2* +SwinTransformerPluginCreator::deserializePlugin(const char* name, const void* serialData, size_t serialLength) noexcept +{ + int type_id; + size_t int_length = sizeof(int); + deserialize_value(&serialData, &int_length, &type_id); + // This object will be deleted when the network is destroyed, which will + // call SwinTransformerPlugin::destroy() + if (type_id == 0) + return new SwinTransformerPlugin(name, serialData, serialLength); + else if (type_id == 1) + return new SwinTransformerPlugin(name, serialData, serialLength); + else { + printf("[ERROR][SwinTransformerPluginCreator::deserializePlugin] unsupport data type %d\n", type_id); + exit(-1); + } +} + +void SwinTransformerPluginCreator::setPluginNamespace(const char* libNamespace) noexcept +{ + namespace_ = libNamespace; +} + +const char* SwinTransformerPluginCreator::getPluginNamespace() const noexcept +{ + return namespace_.c_str(); +} + +template class SwinTransformerPlugin; +template class SwinTransformerPlugin; + +} // namespace fastertransformer diff --git a/src/fastertransformer/tensorrt_plugin/swin/swinTransformerPlugin.h b/src/fastertransformer/tensorrt_plugin/swin/swinTransformerPlugin.h new file mode 100644 index 000000000..8f6fb2bd1 --- /dev/null +++ b/src/fastertransformer/tensorrt_plugin/swin/swinTransformerPlugin.h @@ -0,0 +1,257 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include + +#ifndef SWIN_TRANSFORMER_PLUGIN_H +#define SWIN_TRANSFORMER_PLUGIN_H + +#include "NvInfer.h" +#include "NvInferPlugin.h" +#include "NvInferRuntime.h" +#include "cublas_v2.h" +#include +#include + +#include "examples/cpp/swin/functions.h" +#include "src/fastertransformer/models/swin/Swin.h" +#include "src/fastertransformer/utils/allocator.h" +using namespace std; + +namespace fastertransformer { + +namespace { +static const char* SWIN_TRANSFORMER_PLUGIN_VERSION{"1"}; +static const char* SWIN_TRANSFORMER_PLUGIN_NAME{"CustomSwinTransformerPlugin"}; +} // namespace + +inline nvinfer1::DataType fieldTypeToDataType(const nvinfer1::PluginFieldType ftype) +{ + switch (ftype) { + case nvinfer1::PluginFieldType::kFLOAT32: { + return nvinfer1::DataType::kFLOAT; + } + case nvinfer1::PluginFieldType::kFLOAT16: { + return nvinfer1::DataType::kHALF; + } + case nvinfer1::PluginFieldType::kINT32: { + return nvinfer1::DataType::kINT32; + } + case nvinfer1::PluginFieldType::kINT8: { + return nvinfer1::DataType::kINT8; + } + default: + throw std::invalid_argument("No corresponding datatype for plugin field type"); + } +} + +template +class SwinTransformerPlugin: public nvinfer1::IPluginV2DynamicExt { +private: + const std::string layer_name_; + std::string namespace_; + + std::vector weights_; // in device memory + std::vector weight_size_; + cublasHandle_t cublas_handle_ = nullptr; + cublasLtHandle_t cublaslt_handle_ = nullptr; + cudnnHandle_t cudnn_handle_ = nullptr; + SwinTransformerWeight params_; + SwinTransformer* swin_transformer_ = nullptr; + std::mutex* cublasWrapperMutex_ = nullptr; + cublasAlgoMap* cublasAlgoMap_ = nullptr; + fastertransformer::Allocator* allocator_ = nullptr; + int output_dim_; + int weight_num_; + int max_batch_size_; + int img_size_; + int patch_size_; + int in_chans_; + int embed_dim_; + int window_size_; + bool ape_; + int patch_norm_; + int layer_num_; + float mlp_ratio_; + bool qkv_bias_; + float qk_scale_; + int* depths_; + int* num_heads_; + +public: + int sm_; + SwinTransformerPlugin(const std::string& name, + const int max_batch, + const int img_size, + const int patch_size, + const int in_chans, + const int embed_dim, + const int window_size, + int* depths, + int* num_heads, + const bool ape, + const bool patch_norm, + const int layer_num, + const float mlp_ratio, + const bool qkv_bias, + const float qk_scale, + const std::vector& w); + + SwinTransformerPlugin(const std::string& name, + const int max_batch, + const int img_size, + const int patch_size, + const int in_chans, + const int embed_dim, + const int window_size, + int* depths, + int* num_heads, + const bool ape, + const bool patch_norm, + const int layer_num, + const float mlp_ratio, + const bool qkv_bias, + const float qk_scale, + const std::vector& w); + + SwinTransformerPlugin(const std::string& name, const void* data, size_t length); + + // It doesn't make sense to make SwinTransformerPlugin without arguments, so we + // delete default constructor. + SwinTransformerPlugin() = delete; + + ~SwinTransformerPlugin(); + + // IPluginV2DynamicExt Methods + nvinfer1::IPluginV2DynamicExt* clone() const noexcept override; + nvinfer1::DimsExprs getOutputDimensions(int outputIndex, + const nvinfer1::DimsExprs* inputs, + int nbInputs, + nvinfer1::IExprBuilder& exprBuilder) noexcept override; + bool supportsFormatCombination(int pos, + const nvinfer1::PluginTensorDesc* inOut, + int nbInputs, + int nbOutputs) noexcept override; + void configurePlugin(const nvinfer1::DynamicPluginTensorDesc* in, + int nbInputs, + const nvinfer1::DynamicPluginTensorDesc* out, + int nbOutputs) noexcept override; + size_t getWorkspaceSize(const nvinfer1::PluginTensorDesc* inputs, + int nbInputs, + const nvinfer1::PluginTensorDesc* outputs, + int nbOutputs) const noexcept override; + int enqueue(const nvinfer1::PluginTensorDesc* inputDesc, + const nvinfer1::PluginTensorDesc* outputDesc, + const void* const* inputs, + void* const* outputs, + void* workspace, + cudaStream_t stream) noexcept override; + + // IPluginV2Ext Methods + nvinfer1::DataType + getOutputDataType(int index, const nvinfer1::DataType* inputTypes, int nbInputs) const noexcept override; + + // IPluginV2 Methods + const char* getPluginType() const noexcept override; + const char* getPluginVersion() const noexcept override; + int getNbOutputs() const noexcept override; + int initialize() noexcept override; + void terminate() noexcept override; + size_t getSerializationSize() const noexcept override; + void serialize(void* buffer) const noexcept override; + void destroy() noexcept override; + void setPluginNamespace(const char* pluginNamespace) noexcept override; + const char* getPluginNamespace() const noexcept override; + + // Host To Device + static T* cudaMallocAndCopy(vector& weights, const nvinfer1::Weights& w) + { + T* dpWeight; + size_t nValue = w.count; + check_cuda_error(cudaMalloc(&dpWeight, nValue * sizeof(T))); + check_cuda_error(cudaMemcpy(dpWeight, w.values, nValue * sizeof(T), cudaMemcpyHostToDevice)); + weights.push_back(dpWeight); + return dpWeight; + } + + // Device to Device + static T* cudaMallocAndCopy(vector& weights, + const T* dpWeightOld, + const vector& weight_size, + const int weight_idx) + { + T* dpWeight; + size_t nValue = weight_size[weight_idx]; + check_cuda_error(cudaMalloc((void**)&dpWeight, nValue * sizeof(T))); + check_cuda_error(cudaMemcpy(dpWeight, dpWeightOld, nValue * sizeof(T), cudaMemcpyDeviceToDevice)); + weights.push_back(dpWeight); + return dpWeight; + } + + /*protected: + // To prevent compiler warnings. + using nvinfer1::IPluginV2DynamicExt::canBroadcastInputAcrossBatch; + using nvinfer1::IPluginV2DynamicExt::configurePlugin; + using nvinfer1::IPluginV2DynamicExt::enqueue; + using nvinfer1::IPluginV2DynamicExt::getOutputDimensions; + using nvinfer1::IPluginV2DynamicExt::getWorkspaceSize; + using nvinfer1::IPluginV2DynamicExt::isOutputBroadcastAcrossBatch; + using nvinfer1::IPluginV2DynamicExt::supportsFormat;*/ +}; + +class SwinTransformerPluginCreator: public nvinfer1::IPluginCreator { +public: + SwinTransformerPluginCreator(); + + const char* getPluginName() const noexcept override; + + const char* getPluginVersion() const noexcept override; + + const nvinfer1::PluginFieldCollection* getFieldNames() noexcept override; + + nvinfer1::IPluginV2* createPlugin(const char* name, const nvinfer1::PluginFieldCollection* fc) noexcept override; + + nvinfer1::IPluginV2* + deserializePlugin(const char* name, const void* serialData, size_t serialLength) noexcept override; + + void setPluginNamespace(const char* pluginNamespace) noexcept override; + + const char* getPluginNamespace() const noexcept override; + + static void + getWeightsFromFC(std::string name, const nvinfer1::PluginFieldCollection* fc, std::vector& w) + { + for (int i = 0; i < fc->nbFields; i++) { + std::string field_name(fc->fields[i].name); + if (field_name.compare(name) == 0) { + nvinfer1::Weights tmp; + tmp.values = fc->fields[i].data; + tmp.count = fc->fields[i].length; + tmp.type = fieldTypeToDataType(fc->fields[i].type); + w.push_back(tmp); + break; + } + } + } + +private: + static nvinfer1::PluginFieldCollection mFC; + static std::vector mPluginAttributes; + std::string namespace_; +}; + +} // namespace fastertransformer +#endif // TRT_SWIN_TRANSFORMER_H diff --git a/src/fastertransformer/tensorrt_plugin/t5/CMakeLists.txt b/src/fastertransformer/tensorrt_plugin/t5/CMakeLists.txt new file mode 100644 index 000000000..e87020eee --- /dev/null +++ b/src/fastertransformer/tensorrt_plugin/t5/CMakeLists.txt @@ -0,0 +1,16 @@ +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +add_library(trt_t5 SHARED T5PluginGemm.cc T5Plugin.cu) +target_link_libraries(trt_t5 PRIVATE T5Encoder T5Decoding t5_gemm_func -lnvinfer) diff --git a/src/fastertransformer/tensorrt_plugin/t5/README.md b/src/fastertransformer/tensorrt_plugin/t5/README.md new file mode 100644 index 000000000..ffccb16b9 --- /dev/null +++ b/src/fastertransformer/tensorrt_plugin/t5/README.md @@ -0,0 +1,68 @@ +# T5Plugin in FasterTransformer ++ Original Faster Transformer: [link](https://github.com/NVIDIA/FasterTransformer) ++ This project aims to wapper the encoder and decoding parts of the faster transformer as TensoRT plugins respectively. The most of teh code file are from orignial Faster TRansformer project. + +## Envionment ++ **nvcr.io/nvidia/pytorch:21.02-py3** (including CUDA 11.2.0, cudnn 8.1.0.77, 1.8.0a0+52ea372, TensorRTTensorRT 7.2.2.3+cuda11.1.0.024) ++ Now the code in the repository are compatible for TensorRT7, maybe need several edition before using in TensorRT8. + +--- +## T5EncoderPlugin in T5Plugin +| Classification | Tensor/Parameter Shape | Data Type | Description | +| :-------------: | :------------------------------------- | :------------- | :--------------------------------- | +| input tensor | | | | +| [0] | [nBatchSize,nSequenceLength] | int32 | input token after tokenization | +| [1] | [nBatchSize] | int32 | real sequence length of each input | +| input parameter | | | | +| [0] | [] | int32 | max_batch_size | +| [1] | [] | int32 | max_seq_len | +| [2] | [] | int32 | beam_width (not use but necessary) | +| [3] | [] | int32 | head_num | +| [4] | [] | int32 | size_per_head | +| [5] | [] | int32 | inter_size | +| [6] | [] | int32 | d_model | +| [7] | [] | int32 | num_layer | +| [8] | [] | int32 | num_bucket | +| [9] | [] | int32 | max_distance | +| [10] | [] | int32 | sm | +| [11] | [] | float32 | q_scaling | +| output tensor | | | | +| [0] | [nBatchSize,nSequenceLength,nModelDim] | foat32/float16 | encoder output | + +--- +## T5DecodingPlugin in T5Plugin +| Classification | Tensor/Parameter Shape | Data Type | Description | +| :-------------: | :-------------------------------------- | :-------------- | :---------------------------------- | +| input tensor | | | | +| [0] | [nBatchSize,nSequenceLength,nModelDim] | foat32/float16 | encoder output | +| [1] | [nBatchSize] | int32 | real sequence length of each input | +| input parameter | | | | +| [0] | [] | int32 | max_batch_size | +| [1] | [] | int32 | max_seq_len | +| [2] | [] | int32 | mem_max_seq_len | +| [3] | [] | int32 | beam_width | +| [4] | [] | int32 | head_num | +| [5] | [] | int32 | size_per_head | +| [6] | [] | int32 | inter_size | +| [7] | [] | int32 | d_model | +| [8] | [] | int32 | num_layer | +| [9] | [] | int32 | vocab_size | +| [10] | [] | int32 | num_bucket | +| [11] | [] | int32 | max_distance | +| [12] | [] | int32 | start_id | +| [13] | [] | int32 | end_id | +| [14] | [] | float32 | beam_search_diversity_rate | +| [15] | [] | int32 | top_k | +| [16] | [] | float32 | top_p | +| [17] | [] | float32 | temperature | +| [18] | [] | float32 | len_penalty | +| [19] | [] | float32 | repetition_penalty | +| output tensor | | | | +| [0] | [nBatchSize,nBeamSize,nSequenceLength] | float32/float16 | decoding output | +| [1] | [nBatchSize,nBeamSize] | float32/float16 | decoding parent output (useless) | +| [2] | [nBatchSize,nBeamSize] | float32/float16 | real sequence length of each output | + +--- +## Performance test result ++ [**Here**](https://nvidia-my.sharepoint.com/:x:/p/wili/EV9nBHbLFG1HuGAKt626mJgBwz-k3FVQtg3FnJ3GQdfCCw?e=1OeT0Q) + diff --git a/src/fastertransformer/tensorrt_plugin/t5/T5Plugin.cu b/src/fastertransformer/tensorrt_plugin/t5/T5Plugin.cu new file mode 100644 index 000000000..f7e873bb6 --- /dev/null +++ b/src/fastertransformer/tensorrt_plugin/t5/T5Plugin.cu @@ -0,0 +1,1471 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "T5Plugin.h" + +using namespace fastertransformer; + +namespace nvinfer1 { + +// class T5EncoderPlugin --------------------------------------------------------------------------- +T5EncoderPlugin::T5EncoderPlugin(const std::string& name, + size_t max_batch_size, + size_t max_seq_len, + size_t beam_width, + size_t head_num, + size_t size_per_head, + size_t inter_size, + size_t d_model, + size_t num_layer, + size_t num_bucket, + size_t max_distance, + int sm, + float q_scaling, + int useFP16): + name_(name) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + WHERE_AM_I(); + m_.max_batch_size = max_batch_size; + m_.max_seq_len = max_seq_len; + m_.beam_width = beam_width; + m_.head_num = head_num; + m_.size_per_head = size_per_head; + m_.inter_size = inter_size; + m_.d_model = d_model; + m_.num_layer = num_layer; + m_.num_bucket = num_bucket; + m_.max_distance = max_distance; + m_.sm = sm; + m_.q_scaling = q_scaling; + m_.useFP16 = (bool)useFP16; + m_.batch_size = m_.max_batch_size; + m_.seq_len = m_.max_seq_len; + + cublasCreate(&cublasHandle_); + cublasLtCreate(&cublasltHandle_); +#ifdef SPARSITY_ENABLED + cusparseLtInit(&cusparseltHandle_)); +#endif + + // T5 EncoderWeight + std::string paraFilePath = "./para"; + if (m_.useFP16) { + m_.attention_type = AttentionType::UNFUSED_MHA; // when use FP16, only this type works till v5.0-dev + pT5EncoderWeightHalf_ = new T5EncoderWeight(m_.head_num, + m_.size_per_head, + m_.d_model, + m_.inter_size, + m_.vocab_size, + m_.num_layer, + m_.num_bucket, + 1, // tensor_para_size + 0, // tensor_para_rank + 1, // pipeline_para_size + 0 // pipeline_para_rank + ); + pT5EncoderWeightHalf_->loadModel(paraFilePath); + } + else { + m_.attention_type = + getAttentionType(m_.size_per_head, getSMVersion(), m_.is_remove_padding, m_.max_seq_len); + pT5EncoderWeightFloat_ = new T5EncoderWeight(m_.head_num, + m_.size_per_head, + m_.d_model, + m_.inter_size, + m_.vocab_size, + m_.num_layer, + m_.num_bucket, + 1, // tensor_para_size + 0, // tensor_para_rank + 1, // pipeline_para_size + 0 // pipeline_para_rank + ); + pT5EncoderWeightFloat_->loadModel(paraFilePath); + } + + // Gemm file selection + std::string gemmFileName = std::string(GEMM_CONFIG).substr(0, 11) + std::string("-SM") + std::to_string(m_.sm) + + std::string("-FP") + std::to_string(m_.useFP16 ? 16 : 32) + std::string("-BS") + + std::to_string(m_.batch_size) + std::string("-SL") + std::to_string(m_.seq_len) + + std::string("-BM") + std::to_string(m_.beam_width) + std::string(".in"); + std::ifstream infile(gemmFileName); + if (infile.good()) { +#if DEBUG_ENABLE == 1 + printf("Gemm file exist!\n"); +#endif + } + else { +#if DEBUG_ENABLE == 1 + printf("Gemm file do not exist!\n"); +#endif + int argv[16] = { + 0, + m_.max_batch_size, + m_.beam_width, // useless for encoder + (m_.batch_size == 128 && m_.seq_len == 384) ? 128 : m_.seq_len, // seq_len, in case of OOM + m_.d_model, + m_.head_num, + m_.size_per_head, + m_.inter_size, + m_.d_model, + m_.head_num, + m_.size_per_head, + m_.inter_size, + m_.vocab_size, + m_.useFP16, // is_fp16 + 1, // tensor_para_size + m_.useFP16 // is_fp16_compute_type + }; + t5_gemm(argv); + rename(std::string(GEMM_CONFIG).c_str(), gemmFileName.c_str()); + } + + pCublasAlgoMap_ = new cublasAlgoMap(gemmFileName, ""); + pCublasWrapperMutex_ = new std::mutex(); + pAllocator_ = new Allocator(getDevice()); + + // cublas wrapper and T5Encoder +#ifdef SPARSITY_ENABLED + pCublasWrapper_ = new cublasMMWrapper( + cublasHandle_, cublasltHandle_, cusparseltHandle_, 0, pCublasAlgoMap_, pCublasWrapperMutex_, pAllocator_); + m_.is_sparse = true; +#else + pCublasWrapper_ = + new cublasMMWrapper(cublasHandle_, cublasltHandle_, 0, pCublasAlgoMap_, pCublasWrapperMutex_, pAllocator_); + m_.is_sparse = false; +#endif + if (m_.useFP16) { + pCublasWrapper_->setFP16GemmConfig(); + + pT5EncoderHalf_ = new T5Encoder(m_.max_batch_size, + m_.max_seq_len, + m_.head_num, + m_.size_per_head, + m_.inter_size, + m_.d_model, + m_.num_layer, + m_.num_bucket, + m_.max_distance, + m_.sm, + m_.q_scaling, + 0, // stream placeholder + pCublasWrapper_, + pAllocator_, + m_.is_free_buffer_after_forward, + m_.attention_type, + m_.is_sparse, + m_.activation_type, + m_.layernorm_type, + {0, 1, nullptr}, // tensor_para + {0, 1, nullptr} // pipeline_para + ); + } + else { + pCublasWrapper_->setFP32GemmConfig(); + + pT5EncoderFloat_ = new T5Encoder(m_.max_batch_size, + m_.max_seq_len, + m_.head_num, + m_.size_per_head, + m_.inter_size, + m_.d_model, + m_.num_layer, + m_.num_bucket, + m_.max_distance, + m_.sm, + m_.q_scaling, + 0, // stream placeholder + pCublasWrapper_, + pAllocator_, + m_.is_free_buffer_after_forward, + m_.attention_type, + m_.is_sparse, + m_.activation_type, + m_.layernorm_type, + {0, 1, nullptr}, // tensor_para + {0, 1, nullptr} // pipeline_para + ); + } + PRINT_ENCODER(m_.useFP16) +} + +T5EncoderPlugin::T5EncoderPlugin(const std::string& name, const void* buffer, size_t length): name_(name) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + WHERE_AM_I(); + memcpy(&m_, buffer, sizeof(m_)); + + cublasCreate(&cublasHandle_); + cublasLtCreate(&cublasltHandle_); +#ifdef SPARSITY_ENABLED + cusparseLtInit(&cusparseltHandle_)); +#endif + + // T5 EncoderWeight + std::string paraFilePath = "./para"; + if (m_.useFP16) { + m_.attention_type = AttentionType::UNFUSED_MHA; // when use FP16, only this type works till v5.0-dev + pT5EncoderWeightHalf_ = new T5EncoderWeight(m_.head_num, + m_.size_per_head, + m_.d_model, + m_.inter_size, + m_.vocab_size, + m_.num_layer, + m_.num_bucket, + 1, // tensor_para_size + 0, // tensor_para_rank + 1, // pipeline_para_size + 0 // pipeline_para_rank + ); + pT5EncoderWeightHalf_->loadModel(paraFilePath); + } + else { + m_.attention_type = + getAttentionType(m_.size_per_head, getSMVersion(), m_.is_remove_padding, m_.max_seq_len); + pT5EncoderWeightFloat_ = new T5EncoderWeight(m_.head_num, + m_.size_per_head, + m_.d_model, + m_.inter_size, + m_.vocab_size, + m_.num_layer, + m_.num_bucket, + 1, // tensor_para_size + 0, // tensor_para_rank + 1, // pipeline_para_size + 0 // pipeline_para_rank + ); + pT5EncoderWeightFloat_->loadModel(paraFilePath); + } + + // Gemm file selection, in constructor, we use max_batch_szie and seq_len as data size + std::string gemmFileName = std::string(GEMM_CONFIG).substr(0, 11) + std::string("-SM") + std::to_string(m_.sm) + + std::string("-FP") + std::to_string(m_.useFP16 ? 16 : 32) + std::string("-BS") + + std::to_string(m_.batch_size) + std::string("-SL") + std::to_string(m_.seq_len) + + std::string("-BM") + std::to_string(m_.beam_width) + std::string(".in"); + std::ifstream infile(gemmFileName); + if (infile.good()) { +#if DEBUG_ENABLE == 1 + printf("Gemm file exist!\n"); +#endif + } + else { +#if DEBUG_ENABLE == 1 + printf("Gemm file do not exist!\n"); +#endif + int argv[16] = { + 0, + m_.max_batch_size, + m_.beam_width, // useless for encoder + (m_.batch_size == 128 && m_.seq_len == 384) ? 128 : m_.seq_len, // seq_len, in case of OOM + m_.d_model, + m_.head_num, + m_.size_per_head, + m_.inter_size, + m_.d_model, + m_.head_num, + m_.size_per_head, + m_.inter_size, + m_.vocab_size, + m_.useFP16, // is_fp16 + 1, // tensor_para_size + m_.useFP16 // is_fp16_compute_type + }; + t5_gemm(argv); + rename(std::string(GEMM_CONFIG).c_str(), gemmFileName.c_str()); + } + + pCublasAlgoMap_ = new cublasAlgoMap(gemmFileName, ""); + pCublasWrapperMutex_ = new std::mutex(); + pAllocator_ = new Allocator(getDevice()); + + // cublas wrapper and T5Encoder +#ifdef SPARSITY_ENABLED + pCublasWrapper_ = new cublasMMWrapper( + cublasHandle_, cublasltHandle_, cusparseltHandle_, 0, pCublasAlgoMap_, pCublasWrapperMutex_, pAllocator_); + m_.is_sparse = true; +#else + pCublasWrapper_ = + new cublasMMWrapper(cublasHandle_, cublasltHandle_, 0, pCublasAlgoMap_, pCublasWrapperMutex_, pAllocator_); + m_.is_sparse = false; +#endif + if (m_.useFP16) { + pCublasWrapper_->setFP16GemmConfig(); + + pT5EncoderHalf_ = new T5Encoder(m_.max_batch_size, + m_.max_seq_len, + m_.head_num, + m_.size_per_head, + m_.inter_size, + m_.d_model, + m_.num_layer, + m_.num_bucket, + m_.max_distance, + m_.sm, + m_.q_scaling, + 0, // stream placeholder + pCublasWrapper_, + pAllocator_, + m_.is_free_buffer_after_forward, + m_.attention_type, + m_.is_sparse, + m_.activation_type, + m_.layernorm_type, + {0, 1, nullptr}, // tensor_para + {0, 1, nullptr} // pipeline_para + ); + } + else { + pCublasWrapper_->setFP32GemmConfig(); + + pT5EncoderFloat_ = new T5Encoder(m_.max_batch_size, + m_.max_seq_len, + m_.head_num, + m_.size_per_head, + m_.inter_size, + m_.d_model, + m_.num_layer, + m_.num_bucket, + m_.max_distance, + m_.sm, + m_.q_scaling, + 0, // stream placeholder + pCublasWrapper_, + pAllocator_, + m_.is_free_buffer_after_forward, + m_.attention_type, + m_.is_sparse, + m_.activation_type, + m_.layernorm_type, + {0, 1, nullptr}, // tensor_para + {0, 1, nullptr} // pipeline_para + ); + } + PRINT_ENCODER(m_.useFP16) +} + +T5EncoderPlugin::~T5EncoderPlugin() +{ + WHERE_AM_I(); + if (pT5EncoderWeightHalf_ != nullptr) { + delete pT5EncoderWeightHalf_; + } + if (pT5EncoderWeightFloat_ != nullptr) { + delete pT5EncoderWeightFloat_; + } + if (pT5EncoderHalf_ != nullptr) { + delete pT5EncoderHalf_; + } + if (pT5EncoderFloat_ != nullptr) { + delete pT5EncoderFloat_; + } + delete pCublasAlgoMap_; + delete pCublasWrapperMutex_; + delete pCublasWrapper_; + delete pAllocator_; +} + +size_t T5EncoderPlugin::getSerializationSize() const noexcept +{ + WHERE_AM_I(); + return sizeof(m_); +} + +void T5EncoderPlugin::serialize(void* buffer) const noexcept +{ + WHERE_AM_I(); + memcpy(buffer, &m_, sizeof(m_)); +} + +IPluginV2DynamicExt* T5EncoderPlugin::clone() const noexcept +{ + WHERE_AM_I(); + auto p = new T5EncoderPlugin(name_, &m_, sizeof(m_)); + p->setPluginNamespace(namespace_.c_str()); + return p; +} + +int T5EncoderPlugin::getNbOutputs() const noexcept +{ + WHERE_AM_I(); + return 1; +} + +DataType T5EncoderPlugin::getOutputDataType(int index, const DataType* inputTypes, int nbInputs) const noexcept +{ + WHERE_AM_I(); + return m_.useFP16 ? DataType::kHALF : DataType::kFLOAT; +} + +bool T5EncoderPlugin::supportsFormatCombination(int pos, + const PluginTensorDesc* inOut, + int nbInputs, + int nbOutputs) noexcept +{ + WHERE_AM_I(); + bool res = false; + + switch (pos) { + case 0: + case 1: + res = (inOut[pos].type == DataType::kINT32) && (inOut[pos].format == TensorFormat::kLINEAR); + break; + case 2: + res = (inOut[2].type == (m_.useFP16 ? DataType::kHALF : DataType::kFLOAT)) + && (inOut[2].format == TensorFormat::kLINEAR); + break; + default: // should NOT be here! + ; + } +#if DEBUG_ENABLE == 1 + printf("Dim("); + for (int i = 0; i < 3; i++) { + printf("%d,", inOut[i].dims.nbDims); + } + printf("),"); + printf("pos=%d,res=%d,format(%d,%d,%d),type(%d,%d,%d),", + pos, + int(res), + int(inOut[0].format), + int(inOut[1].format), + int(inOut[2].format), + int(inOut[0].type), + int(inOut[1].type), + int(inOut[2].type)); + printf("kLINEAR=%d,float=%d,half=%d,int8=%d,int32=%d,bool=%d\n", + int(TensorFormat::kLINEAR), + int(DataType::kFLOAT), + int(DataType::kHALF), + int(DataType::kINT8), + int(DataType::kINT32), + int(DataType::kBOOL)); +#endif + return res; +} + +DimsExprs T5EncoderPlugin::getOutputDimensions(int index, + const DimsExprs* pInputDim, + int nInputDim, + IExprBuilder& exprBuilder) noexcept +{ + WHERE_AM_I(); + DimsExprs ret; + ret.nbDims = 3; + ret.d[0] = pInputDim[0].d[0]; + ret.d[1] = pInputDim[0].d[1]; + ret.d[2] = exprBuilder.constant(512); + return ret; +} + +void T5EncoderPlugin::configurePlugin(const DynamicPluginTensorDesc* in, + int nbInput, + const DynamicPluginTensorDesc* out, + int nbOutput) noexcept +{ + WHERE_AM_I(); + PRINT_ENCODER(int(out[0].desc.type)) +} + +size_t T5EncoderPlugin::getWorkspaceSize(const PluginTensorDesc* inputs, + int32_t nbInputs, + const PluginTensorDesc* outputs, + int32_t nbOutputs) const noexcept +{ + WHERE_AM_I(); + return 0; +} + +void T5EncoderPlugin::setPluginNamespace(const char* szNamespace) noexcept +{ + WHERE_AM_I(); + namespace_ = szNamespace; +} + +const char* T5EncoderPlugin::getPluginNamespace() const noexcept +{ + WHERE_AM_I(); + return namespace_.c_str(); +} + +const char* T5EncoderPlugin::getPluginType() const noexcept +{ + WHERE_AM_I(); + return ENCODER_NAME; +} + +const char* T5EncoderPlugin::getPluginVersion() const noexcept +{ + WHERE_AM_I(); + return ENCODER_VERSION; +} + +int T5EncoderPlugin::initialize() noexcept +{ + WHERE_AM_I(); + return 0; +} + +void T5EncoderPlugin::terminate() noexcept +{ + WHERE_AM_I(); +} + +void T5EncoderPlugin::destroy() noexcept +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + WHERE_AM_I(); + cublasDestroy(cublasHandle_); + cublasLtDestroy(cublasltHandle_); +#ifdef SPARSITY_ENABLED + cusparseLtDestroy(&cusparseltHandle_); +#endif + // delete this; +} + +void T5EncoderPlugin::attachToContext(cudnnContext* /*cudnn*/, + cublasContext* /*cublas*/, + IGpuAllocator* /*allocator*/) noexcept +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + WHERE_AM_I(); +} + +void T5EncoderPlugin::detachFromContext() noexcept +{ + WHERE_AM_I(); +} + +int T5EncoderPlugin::enqueue(const PluginTensorDesc* inputDesc, + const PluginTensorDesc* outputDesc, + const void* const* inputs, + void* const* outputs, + void* workspace, + cudaStream_t stream) noexcept +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + WHERE_AM_I(); + m_.batch_size = inputDesc[0].dims.d[0]; + m_.seq_len = inputDesc[0].dims.d[1]; + PRINT_ENCODER(outputDesc[0].type) + + cublasSetStream(cublasHandle_, stream); + pCublasWrapper_->setStream(stream); + + std::unordered_map inputTensor{ + {"input_ids", Tensor{MEMORY_GPU, TYPE_INT32, std::vector{m_.batch_size, m_.seq_len}, (int*)inputs[0]}}, + {"sequence_length", Tensor{MEMORY_GPU, TYPE_INT32, std::vector{m_.batch_size}, (int*)inputs[1]}}}; + if (m_.useFP16) { + std::unordered_map outputTensor{ + {"output_hidden_state", + Tensor{MEMORY_GPU, + TYPE_FP16, + std::vector{m_.batch_size, m_.seq_len, (size_t)(m_.head_num * m_.size_per_head)}, + (half*)outputs[0]}}}; + pT5EncoderHalf_->setStream(stream); + pT5EncoderHalf_->forward(&outputTensor, &inputTensor, pT5EncoderWeightHalf_); + } + else { + std::unordered_map outputTensor{ + {"output_hidden_state", + Tensor{MEMORY_GPU, + TYPE_FP32, + std::vector{m_.batch_size, m_.seq_len, (size_t)(m_.head_num * m_.size_per_head)}, + (float*)outputs[0]}}}; + pT5EncoderFloat_->setStream(stream); + pT5EncoderFloat_->forward(&outputTensor, &inputTensor, pT5EncoderWeightFloat_); + } + return 0; +} + +// class T5EncoderPluginCreator -------------------------------------------------------------------- +PluginFieldCollection T5EncoderPluginCreator::fc_{}; +std::vector T5EncoderPluginCreator::attr_; + +T5EncoderPluginCreator::T5EncoderPluginCreator() +{ + WHERE_AM_I(); + fc_.nbFields = attr_.size(); + fc_.fields = attr_.data(); +} + +T5EncoderPluginCreator::~T5EncoderPluginCreator() +{ + WHERE_AM_I(); +} + +IPluginV2* T5EncoderPluginCreator::createPlugin(const char* name, const PluginFieldCollection* fc) noexcept +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + WHERE_AM_I(); + int max_batch_size = 128; + int max_seq_len = 384; + int beam_width = 1; + int head_num = 8; + int size_per_head = 512 / 8; + int inter_size = 512 * 4; + int d_model = 512; + int num_layer = 6; + int num_bucket = 32; + int max_distance = 128; + int sm = -1; + float q_scaling = 1.0f / (sqrt(size_per_head) * 1.0f); + int useFP16 = 0; + + struct cudaDeviceProp prop; + cudaGetDeviceProperties(&prop, 0); + sm = prop.major * 10 + prop.minor; + + std::map name2p{ + {"max_batch_size", &max_batch_size}, + {"max_seq_len", &max_seq_len}, + {"beam_width", &beam_width}, + {"head_num", &head_num}, + {"size_per_head", &size_per_head}, + {"inter_size", &inter_size}, + {"d_model", &d_model}, + {"num_layer", &num_layer}, + {"num_bucket", &num_bucket}, + {"max_distance", &max_distance}, + {"sm", &sm}, + {"useFP16", &useFP16}, + }; + for (int i = 0; i < fc->nbFields; i++) { + if (!strcmp(fc->fields[i].name, "q_scaling")) { + q_scaling = *(float*)fc->fields[i].data; + } + else if (name2p.find(fc->fields[i].name) != name2p.end()) { + *name2p[fc->fields[i].name] = *(int*)fc->fields[i].data; + } + } + return new T5EncoderPlugin(name, + max_batch_size, + max_seq_len, + beam_width, + head_num, + size_per_head, + inter_size, + d_model, + num_layer, + num_bucket, + max_distance, + sm, + q_scaling, + useFP16); +} + +IPluginV2* +T5EncoderPluginCreator::deserializePlugin(const char* name, const void* serialData, size_t serialLength) noexcept +{ + WHERE_AM_I(); + return new T5EncoderPlugin(name, serialData, serialLength); +} + +void T5EncoderPluginCreator::setPluginNamespace(const char* szNamespace) noexcept +{ + WHERE_AM_I(); + namespace_ = szNamespace; +} + +const char* T5EncoderPluginCreator::getPluginNamespace() const noexcept +{ + WHERE_AM_I(); + return namespace_.c_str(); +} + +const char* T5EncoderPluginCreator::getPluginName() const noexcept +{ + WHERE_AM_I(); + return ENCODER_NAME; +} + +const char* T5EncoderPluginCreator::getPluginVersion() const noexcept +{ + WHERE_AM_I(); + return ENCODER_VERSION; +} + +const PluginFieldCollection* T5EncoderPluginCreator::getFieldNames() noexcept +{ + WHERE_AM_I(); + return &fc_; +} + +REGISTER_TENSORRT_PLUGIN(T5EncoderPluginCreator); + +// class T5DecodingPlugin -------------------------------------------------------------------------- +T5DecodingPlugin::T5DecodingPlugin(const std::string& name, + size_t max_batch_size, + size_t max_seq_len, + size_t mem_max_seq_len, + size_t beam_width, + size_t head_num, + size_t size_per_head, + size_t inter_size, + size_t d_model, + size_t num_layer, + size_t vocab_size, + size_t num_bucket, + size_t max_distance, + float q_scaling, + int start_id, + int end_id, + float beam_search_diversity_rate, + size_t top_k, + float top_p, + float temperature, + float len_penalty, + float repetition_penalty, + int useFP16): + name_(name) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + WHERE_AM_I(); + m_.max_batch_size = max_batch_size; + m_.max_seq_len = max_seq_len; + m_.mem_max_seq_len = mem_max_seq_len; + m_.beam_width = beam_width; + m_.head_num = head_num; + m_.size_per_head = size_per_head; + m_.inter_size = inter_size; + m_.d_model = d_model; + m_.num_layer = num_layer; + m_.vocab_size = vocab_size; + m_.num_bucket = num_bucket; + m_.max_distance = max_distance; + m_.q_scaling = q_scaling; + m_.start_id = start_id; + m_.end_id = end_id; + m_.beam_search_diversity_rate = beam_search_diversity_rate; + m_.top_k = top_k; + m_.top_p = top_p; + m_.temperature = temperature; + m_.len_penalty = len_penalty; + m_.repetition_penalty = repetition_penalty; + m_.useFP16 = useFP16; + m_.batch_size = m_.max_batch_size; + m_.seq_len = m_.max_seq_len; + + cublasCreate(&cublasHandle_); + cublasLtCreate(&cublasltHandle_); + + // T5DecodingWeight + std::string paraFilePath = "./para"; + if (m_.useFP16) { + pT5DecodingWeightHalf_ = new T5DecodingWeight(m_.head_num, + m_.size_per_head, + m_.d_model, + m_.inter_size, + m_.vocab_size, + m_.num_layer, + m_.mem_d_model, + m_.num_bucket, + 1, // tensor_para_size + 0, // tensor_para_rank + 1, // pipeline_para_size + 0 // pipeline_para_rank + ); + pT5DecodingWeightHalf_->loadModel(paraFilePath); + } + else { + pT5DecodingWeightFloat_ = new T5DecodingWeight(m_.head_num, + m_.size_per_head, + m_.d_model, + m_.inter_size, + m_.vocab_size, + m_.num_layer, + m_.mem_d_model, + m_.num_bucket, + 1, // tensor_para_size, + 0, // tensor_para_rank, + 1, // pipeline_para_size, + 0 // pipeline_para_rank + ); + pT5DecodingWeightFloat_->loadModel(paraFilePath); + } + + // Gemm file selection + check_cuda_error(cudaGetDeviceProperties(&cuda_device_prop_, 0)); + std::string gemmFileName = std::string(GEMM_CONFIG).substr(0, 11) + std::string("-SM") + + std::to_string(cuda_device_prop_.major * 10 + cuda_device_prop_.minor) + + std::string("-FP") + std::to_string(m_.useFP16 ? 16 : 32) + std::string("-BS") + + std::to_string(m_.batch_size) + std::string("-SL") + std::to_string(m_.seq_len) + + std::string("-BM") + std::to_string(m_.beam_width) + std::string(".in"); + std::ifstream infile(gemmFileName); + if (infile.good()) { +#if DEBUG_ENABLE == 1 + printf("Gemm file exist!\n"); +#endif + } + else { +#if DEBUG_ENABLE == 1 + printf("Gemm file do not exist!\n"); +#endif + int argv[16] = { + 0, + m_.max_batch_size, + m_.beam_width, + (m_.batch_size == 128 && m_.seq_len == 384) ? 128 : m_.seq_len, // seq_len, in case of OOM + m_.d_model, + m_.head_num, + m_.size_per_head, + m_.inter_size, + m_.d_model, + m_.head_num, + m_.size_per_head, + m_.inter_size, + m_.vocab_size, + m_.useFP16, // is_fp16 + 1, // tensor_para_size + m_.useFP16 // is_fp16_compute_type + }; + t5_gemm(argv); + rename(std::string(GEMM_CONFIG).c_str(), gemmFileName.c_str()); + } + + pCublasAlgoMap_ = new cublasAlgoMap(gemmFileName, ""); + pCublasWrapperMutex_ = new std::mutex(); + pAllocator_ = new Allocator(getDevice()); + + // cublas wrapper and T5Decoding + pCublasWrapper_ = + new cublasMMWrapper(cublasHandle_, cublasltHandle_, 0, pCublasAlgoMap_, pCublasWrapperMutex_, pAllocator_); + + if (m_.useFP16) { + pCublasWrapper_->setFP16GemmConfig(); + + pT5DecodingHalf_ = new T5Decoding(m_.max_batch_size, + m_.max_seq_len, + m_.mem_max_seq_len, + m_.beam_width, + m_.head_num, + m_.size_per_head, + m_.inter_size, + m_.d_model, + m_.num_layer, + m_.vocab_size, + m_.num_bucket, + m_.max_distance, + m_.q_scaling, + m_.start_id, + m_.end_id, + m_.beam_search_diversity_rate, + m_.top_k, + m_.top_p, + m_.temperature, + m_.len_penalty, + m_.repetition_penalty, + 0, // stream placeholder + pCublasWrapper_, + pAllocator_, + m_.is_free_buffer_after_forward, + &cuda_device_prop_, + {0, 1, nullptr}, // tensor_para + {0, 1, nullptr} // pipeline_para + ); + } + else { + pCublasWrapper_->setFP32GemmConfig(); + + pT5DecodingFloat_ = new T5Decoding(m_.max_batch_size, + m_.max_seq_len, + m_.mem_max_seq_len, + m_.beam_width, + m_.head_num, + m_.size_per_head, + m_.inter_size, + m_.d_model, + m_.num_layer, + m_.vocab_size, + m_.num_bucket, + m_.max_distance, + m_.q_scaling, + m_.start_id, + m_.end_id, + m_.beam_search_diversity_rate, + m_.top_k, + m_.top_p, + m_.temperature, + m_.len_penalty, + m_.repetition_penalty, + 0, // stream placeholder + pCublasWrapper_, + pAllocator_, + m_.is_free_buffer_after_forward, + &cuda_device_prop_, + {0, 1, nullptr}, // tensor_para + {0, 1, nullptr} // pipeline_para + ); + } +} + +T5DecodingPlugin::T5DecodingPlugin(const std::string& name, const void* buffer, size_t length): name_(name) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + WHERE_AM_I(); + memcpy(&m_, buffer, sizeof(m_)); + + cublasCreate(&cublasHandle_); + cublasLtCreate(&cublasltHandle_); + + // T5DecodingWeight + std::string paraFilePath = "./para"; + if (m_.useFP16) { + pT5DecodingWeightHalf_ = new T5DecodingWeight(m_.head_num, + m_.size_per_head, + m_.d_model, + m_.inter_size, + m_.vocab_size, + m_.num_layer, + m_.mem_d_model, + m_.num_bucket, + 1, // tensor_para_size + 0, // tensor_para_rank + 1, // pipeline_para_size + 0 // pipeline_para_rank + ); + pT5DecodingWeightHalf_->loadModel(paraFilePath); + } + else { + pT5DecodingWeightFloat_ = new T5DecodingWeight(m_.head_num, + m_.size_per_head, + m_.d_model, + m_.inter_size, + m_.vocab_size, + m_.num_layer, + m_.mem_d_model, + m_.num_bucket, + 1, // tensor_para_size, + 0, // tensor_para_rank, + 1, // pipeline_para_size, + 0 // pipeline_para_rank + ); + pT5DecodingWeightFloat_->loadModel(paraFilePath); + } + + // Gemm file selection + check_cuda_error(cudaGetDeviceProperties(&cuda_device_prop_, 0)); + std::string gemmFileName = std::string(GEMM_CONFIG).substr(0, 11) + std::string("-SM") + + std::to_string(cuda_device_prop_.major * 10 + cuda_device_prop_.minor) + + std::string("-FP") + std::to_string(m_.useFP16 ? 16 : 32) + std::string("-BS") + + std::to_string(m_.batch_size) + std::string("-SL") + std::to_string(m_.seq_len) + + std::string("-BM") + std::to_string(m_.beam_width) + std::string(".in"); + std::ifstream infile(gemmFileName); + if (infile.good()) { +#if DEBUG_ENABLE == 1 + printf("Gemm file exist!\n"); +#endif + } + else { +#if DEBUG_ENABLE == 1 + printf("Gemm file do not exist!\n"); +#endif + int argv[16] = { + 0, + m_.max_batch_size, + m_.beam_width, + (m_.batch_size == 128 && m_.seq_len == 384) ? 128 : m_.seq_len, // seq_len, in case of OOM + m_.d_model, + m_.head_num, + m_.size_per_head, + m_.inter_size, + m_.d_model, + m_.head_num, + m_.size_per_head, + m_.inter_size, + m_.vocab_size, + m_.useFP16, // is_fp16 + 1, // tensor_para_size + m_.useFP16 // is_fp16_compute_type + }; + t5_gemm(argv); + rename(std::string(GEMM_CONFIG).c_str(), gemmFileName.c_str()); + } + + pCublasAlgoMap_ = new cublasAlgoMap(gemmFileName, ""); + pCublasWrapperMutex_ = new std::mutex(); + pAllocator_ = new Allocator(getDevice()); + + // cublas wrapper and T5Decoding + pCublasWrapper_ = + new cublasMMWrapper(cublasHandle_, cublasltHandle_, 0, pCublasAlgoMap_, pCublasWrapperMutex_, pAllocator_); + + if (m_.useFP16) { + pCublasWrapper_->setFP16GemmConfig(); + + pT5DecodingHalf_ = new T5Decoding(m_.max_batch_size, + m_.max_seq_len, + m_.mem_max_seq_len, + m_.beam_width, + m_.head_num, + m_.size_per_head, + m_.inter_size, + m_.d_model, + m_.num_layer, + m_.vocab_size, + m_.num_bucket, + m_.max_distance, + m_.q_scaling, + m_.start_id, + m_.end_id, + m_.beam_search_diversity_rate, + m_.top_k, + m_.top_p, + m_.temperature, + m_.len_penalty, + m_.repetition_penalty, + 0, // stream placeholder + pCublasWrapper_, + pAllocator_, + m_.is_free_buffer_after_forward, + &cuda_device_prop_, + {0, 1, nullptr}, // tensor_para + {0, 1, nullptr} // pipeline_para + ); + } + else { + pCublasWrapper_->setFP32GemmConfig(); + + pT5DecodingFloat_ = new T5Decoding(m_.max_batch_size, + m_.max_seq_len, + m_.mem_max_seq_len, + m_.beam_width, + m_.head_num, + m_.size_per_head, + m_.inter_size, + m_.d_model, + m_.num_layer, + m_.vocab_size, + m_.num_bucket, + m_.max_distance, + m_.q_scaling, + m_.start_id, + m_.end_id, + m_.beam_search_diversity_rate, + m_.top_k, + m_.top_p, + m_.temperature, + m_.len_penalty, + m_.repetition_penalty, + 0, // stream placeholder + pCublasWrapper_, + pAllocator_, + m_.is_free_buffer_after_forward, + &cuda_device_prop_, + {0, 1, nullptr}, // tensor_para + {0, 1, nullptr} // pipeline_para + ); + } +} + +T5DecodingPlugin::~T5DecodingPlugin() +{ + WHERE_AM_I(); + if (pT5DecodingWeightHalf_ != nullptr) { + delete pT5DecodingWeightHalf_; + } + if (pT5DecodingWeightFloat_ != nullptr) { + delete pT5DecodingWeightFloat_; + } + if (pT5DecodingHalf_ != nullptr) { + delete pT5DecodingHalf_; + } + if (pT5DecodingFloat_ != nullptr) { + delete pT5DecodingFloat_; + } + delete pCublasAlgoMap_; + delete pCublasWrapperMutex_; + delete pCublasWrapper_; + delete pAllocator_; +} + +size_t T5DecodingPlugin::getSerializationSize() const noexcept +{ + WHERE_AM_I(); + return sizeof(m_); +} + +void T5DecodingPlugin::serialize(void* buffer) const noexcept +{ + WHERE_AM_I(); + memcpy(buffer, &m_, sizeof(m_)); +} + +IPluginV2DynamicExt* T5DecodingPlugin::clone() const noexcept +{ + WHERE_AM_I(); + auto p = new T5DecodingPlugin(name_, &m_, sizeof(m_)); + p->setPluginNamespace(namespace_.c_str()); + return p; +} + +int T5DecodingPlugin::getNbOutputs() const noexcept +{ + WHERE_AM_I(); + return 2; +} + +DataType T5DecodingPlugin::getOutputDataType(int index, const DataType* inputTypes, int nbInputs) const noexcept +{ + WHERE_AM_I(); + return DataType::kINT32; +} + +bool T5DecodingPlugin::supportsFormatCombination(int pos, + const PluginTensorDesc* inOut, + int nbInputs, + int nbOutputs) noexcept +{ + WHERE_AM_I(); + bool res = false; + + switch (pos) { + case 0: + res = (inOut[0].type == (m_.useFP16 ? DataType::kHALF : DataType::kFLOAT)) + && (inOut[0].format == TensorFormat::kLINEAR); + break; + case 1: + case 2: + case 3: + case 4: + res = (inOut[pos].type == DataType::kINT32) && (inOut[pos].format == TensorFormat::kLINEAR); + break; + default: // should NOT be here! + ; + } +#if DEBUG_ENABLE == 1 + printf("Dim("); + for (int i = 0; i < 5; i++) { + printf("%d,", inOut[i].dims.nbDims); + } + printf("),"); + printf("pos=%d,res=%d,format(%d,%d,%d,%d,%d),type(%d,%d,%d,%d,%d),", + pos, + int(res), + int(inOut[0].format), + int(inOut[1].format), + int(inOut[2].format), + int(inOut[3].format), + int(inOut[4].format), + int(inOut[0].type), + int(inOut[1].type), + int(inOut[2].type), + int(inOut[3].type), + int(inOut[4].type)); + printf("kLINEAR=%d,float=%d,half=%d,int8=%d,int32=%d,bool=%d\n", + int(TensorFormat::kLINEAR), + int(DataType::kFLOAT), + int(DataType::kHALF), + int(DataType::kINT8), + int(DataType::kINT32), + int(DataType::kBOOL)); +#endif + return res; +} + +DimsExprs T5DecodingPlugin::getOutputDimensions(int index, + const DimsExprs* pInputDim, + int nInputDim, + IExprBuilder& exprBuilder) noexcept +{ + WHERE_AM_I(); + DimsExprs ret; + switch (index) { + case 0: + ret.nbDims = 3; + ret.d[0] = pInputDim[0].d[0]; + ret.d[1] = exprBuilder.constant(m_.beam_width); + ret.d[2] = exprBuilder.constant(m_.max_seq_len); + break; + case 1: + ret.nbDims = 2; + ret.d[0] = pInputDim[0].d[0]; + ret.d[1] = exprBuilder.constant(m_.beam_width); + break; + default: // should NOT be here! + ; + } + return ret; +} + +void T5DecodingPlugin::configurePlugin(const DynamicPluginTensorDesc* in, + int nbInput, + const DynamicPluginTensorDesc* out, + int nbOutput) noexcept +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + WHERE_AM_I(); + PRINT_DECODING(int(in[0].desc.type)) +} + +size_t T5DecodingPlugin::getWorkspaceSize(const PluginTensorDesc* inputs, + int32_t nbInputs, + const PluginTensorDesc* outputs, + int32_t nbOutputs) const noexcept +{ + WHERE_AM_I(); + return 0; +} + +void T5DecodingPlugin::setPluginNamespace(const char* szNamespace) noexcept +{ + WHERE_AM_I(); + namespace_ = szNamespace; +} + +const char* T5DecodingPlugin::getPluginNamespace() const noexcept +{ + WHERE_AM_I(); + return namespace_.c_str(); +} + +const char* T5DecodingPlugin::getPluginType() const noexcept +{ + WHERE_AM_I(); + return DECODING_NAME; +} + +const char* T5DecodingPlugin::getPluginVersion() const noexcept +{ + WHERE_AM_I(); + return DECODING_VERSION; +} + +int T5DecodingPlugin::initialize() noexcept +{ + WHERE_AM_I(); + return 0; +} + +void T5DecodingPlugin::terminate() noexcept +{ + WHERE_AM_I(); +} + +void T5DecodingPlugin::destroy() noexcept +{ + WHERE_AM_I(); + cublasDestroy(cublasHandle_); + cublasLtDestroy(cublasltHandle_); + // delete this; +} + +void T5DecodingPlugin::attachToContext(cudnnContext* /*cudnn*/, + cublasContext* /*cublas*/, + IGpuAllocator* /*allocator*/) noexcept +{ + WHERE_AM_I(); +} + +void T5DecodingPlugin::detachFromContext() noexcept +{ + WHERE_AM_I(); +} + +int T5DecodingPlugin::enqueue(const PluginTensorDesc* inputDesc, + const PluginTensorDesc* outputDesc, + const void* const* inputs, + void* const* outputs, + void* workspace, + cudaStream_t stream) noexcept +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + WHERE_AM_I(); + m_.batch_size = inputDesc[0].dims.d[0]; + m_.seq_len = inputDesc[0].dims.d[1]; + PRINT_DECODING(inputDesc[0].type) + + cublasSetStream(cublasHandle_, stream); + pCublasWrapper_->setStream(stream); + + std::unordered_map outputTensor{ + {"output_ids", + Tensor{MEMORY_GPU, + TYPE_INT32, + std::vector{(size_t)m_.batch_size, (size_t)m_.beam_width, (size_t)m_.max_seq_len}, + (int*)outputs[0]}}, + {"sequence_length", + Tensor{MEMORY_GPU, + TYPE_INT32, + std::vector{(size_t)m_.batch_size, (size_t)m_.beam_width}, + (int*)outputs[1]}}}; + if (m_.useFP16) { + std::unordered_map inputTensor{ + {"encoder_output", + Tensor{MEMORY_GPU, + TYPE_FP16, + std::vector{(size_t)m_.batch_size, (size_t)m_.seq_len, (size_t)m_.mem_hidden_units}, + (half*)inputs[0]}}, + {"encoder_sequence_length", + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{(size_t)m_.batch_size}, (int*)inputs[1]}}}; + pT5DecodingHalf_->setStream(stream); + pT5DecodingHalf_->forward(&outputTensor, &inputTensor, pT5DecodingWeightHalf_); + } + else { + std::unordered_map inputTensor{ + {"encoder_output", + Tensor{MEMORY_GPU, + TYPE_FP32, + std::vector{(size_t)m_.batch_size, (size_t)m_.seq_len, (size_t)m_.mem_hidden_units}, + (float*)inputs[0]}}, + {"encoder_sequence_length", + Tensor{MEMORY_GPU, TYPE_INT32, std::vector{(size_t)m_.batch_size}, (int*)inputs[1]}}}; + pT5DecodingFloat_->setStream(stream); + pT5DecodingFloat_->forward(&outputTensor, &inputTensor, pT5DecodingWeightFloat_); + } + return 0; +} +// class T5DecodingPluginCreator ------------------------------------------------------------------- +PluginFieldCollection T5DecodingPluginCreator::fc_{}; +std::vector T5DecodingPluginCreator::attr_; + +T5DecodingPluginCreator::T5DecodingPluginCreator() +{ + WHERE_AM_I(); + fc_.nbFields = attr_.size(); + fc_.fields = attr_.data(); +} + +T5DecodingPluginCreator::~T5DecodingPluginCreator() +{ + WHERE_AM_I(); +} + +IPluginV2* T5DecodingPluginCreator::createPlugin(const char* name, const PluginFieldCollection* fc) noexcept +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + WHERE_AM_I(); + int max_batch_size = 128; + int max_seq_len = 384; + int mem_max_seq_len = max_seq_len; + int beam_width = 4; + int head_num = 8; + int size_per_head = 512 / 8; + int d_model = head_num * size_per_head; + int inter_size = d_model * 4; + int num_layer = 6; + int vocab_size = 32128; + int num_bucket = 32; + int max_distance = 128; + int start_id = 0; + int end_id = 1; + float beam_search_diversity_rate = 0.0f; + int top_k = beam_width; + float top_p = 0.0f; + float temperature = 1.0f; + float len_penalty = 2.0f; + float q_scaling = 1.0f / (sqrt(size_per_head) * 1.0f); + float repetition_penalty = 1.0f; + int useFP16 = 0; + + std::map name2pint{ + {"max_batch_size", &max_batch_size}, + {"max_seq_len", &max_seq_len}, + {"mem_max_seq_len", &mem_max_seq_len}, + {"beam_width", &beam_width}, + {"head_num", &head_num}, + {"size_per_head", &size_per_head}, + {"inter_size", &inter_size}, + {"d_model", &d_model}, + {"num_layer", &num_layer}, + {"num_bucket", &num_bucket}, + {"max_distance", &max_distance}, + {"vocab_size", &vocab_size}, + {"start_id", &start_id}, + {"end_id", &end_id}, + {"top_k", &top_k}, + {"useFP16", &useFP16}, + }; + std::map name2pfloat{ + {"beam_search_diversity_rate", &beam_search_diversity_rate}, + {"top_p", &top_p}, + {"temperature", &temperature}, + {"len_penalty", &len_penalty}, + {"repetition_penalty", &repetition_penalty}, + }; + for (int i = 0; i < fc->nbFields; i++) { + if (name2pint.find(fc->fields[i].name) != name2pint.end()) { + *name2pint[fc->fields[i].name] = *(int*)fc->fields[i].data; + } + if (name2pfloat.find(fc->fields[i].name) != name2pfloat.end()) { + *name2pfloat[fc->fields[i].name] = *(float*)fc->fields[i].data; + } + } + + return new T5DecodingPlugin(name, + max_batch_size, + max_seq_len, + mem_max_seq_len, + beam_width, + head_num, + size_per_head, + inter_size, + d_model, + num_layer, + vocab_size, + num_bucket, + max_distance, + q_scaling, + start_id, + end_id, + beam_search_diversity_rate, + top_k, + top_p, + temperature, + len_penalty, + repetition_penalty, + useFP16); +} + +IPluginV2* +T5DecodingPluginCreator::deserializePlugin(const char* name, const void* serialData, size_t serialLength) noexcept +{ + WHERE_AM_I(); + return new T5DecodingPlugin(name, serialData, serialLength); +} + +void T5DecodingPluginCreator::setPluginNamespace(const char* szNamespace) noexcept +{ + WHERE_AM_I(); + namespace_ = szNamespace; +} + +const char* T5DecodingPluginCreator::getPluginNamespace() const noexcept +{ + WHERE_AM_I(); + return namespace_.c_str(); +} + +const char* T5DecodingPluginCreator::getPluginName() const noexcept +{ + WHERE_AM_I(); + return DECODING_NAME; +} + +const char* T5DecodingPluginCreator::getPluginVersion() const noexcept +{ + WHERE_AM_I(); + return DECODING_VERSION; +} + +const PluginFieldCollection* T5DecodingPluginCreator::getFieldNames() noexcept +{ + WHERE_AM_I(); + return &fc_; +} + +REGISTER_TENSORRT_PLUGIN(T5DecodingPluginCreator); + +} // namespace nvinfer1 diff --git a/src/fastertransformer/tensorrt_plugin/t5/T5Plugin.h b/src/fastertransformer/tensorrt_plugin/t5/T5Plugin.h new file mode 100644 index 000000000..92aa6baf9 --- /dev/null +++ b/src/fastertransformer/tensorrt_plugin/t5/T5Plugin.h @@ -0,0 +1,367 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "T5PluginGemm.h" +#include "src/fastertransformer/models/t5/T5Decoding.h" +#include "src/fastertransformer/models/t5/T5DecodingWeight.h" +#include "src/fastertransformer/models/t5/T5Encoder.h" +#include "src/fastertransformer/models/t5/T5EncoderWeight.h" +#include "src/fastertransformer/utils/Tensor.h" +#include +#include +#include +#include +#include +#include +#include +#include + +#if DEBUG_ENABLE == 1 +#define WHERE_AM_I() printf("[%s]: this->%p\n", __func__, this); +#define PRINT_ENCODER(DATA_TYPE) \ + printf("[encoder::%s]Info:\n\tdatatype=%d\n", __func__, DATA_TYPE); \ + printf("\tmax_batch_size=%d\n", m_.max_batch_size); \ + printf("\tmax_seq_len=%d\n", m_.max_seq_len); \ + printf("\tbeam_width=%d\n", m_.beam_width); \ + printf("\thead_num=%d\n", m_.head_num); \ + printf("\tsize_per_head=%d\n", m_.size_per_head); \ + printf("\td_model=%d\n", m_.d_model); \ + printf("\tinter_size=%d\n", m_.inter_size); \ + printf("\tnum_layer=%d\n", m_.num_layer); \ + printf("\tnum_bucket=%d\n", m_.num_bucket); \ + printf("\tmax_distance=%d\n", m_.max_distance); \ + printf("\tsm=%d\n", m_.sm); \ + printf("\tq_scaling=%f\n", m_.q_scaling); \ + printf("\tuseFP16=%d\n", m_.useFP16); \ + printf("\tvocab_size=%d\n", m_.vocab_size); \ + printf("\tis_remove_padding=%d\n", m_.is_remove_padding); \ + printf("\tis_free_buffer_after_forward=%d\n", m_.is_free_buffer_after_forward); \ + printf("\tis_sparse=%d\n", m_.is_sparse); \ + printf("\tattention_type=%d\n", m_.attention_type); \ + printf("\tactivation_type=%d\n", m_.activation_type); \ + printf("\tlayernorm_type=%d\n", m_.layernorm_type); \ + printf("\tbatch_size=%d\n", m_.batch_size); \ + printf("\tseq_len=%d\n", m_.seq_len); + +#define PRINT_DECODING(DATA_TYPE) \ + printf("[decoding::%s]Info:\n\tdatatype=%d\n", __func__, DATA_TYPE); \ + printf("\tmax_batch_size=%d\n", m_.max_batch_size); \ + printf("\tmax_seq_len=%d\n", m_.max_seq_len); \ + printf("\tmem_max_seq_len=%d\n", m_.mem_max_seq_len); \ + printf("\tbeam_width=%d\n", m_.beam_width); \ + printf("\thead_num=%d\n", m_.head_num); \ + printf("\tsize_per_head=%d\n", m_.size_per_head); \ + printf("\td_model=%d\n", m_.d_model); \ + printf("\tinter_size=%d\n", m_.inter_size); \ + printf("\tnum_layer=%d\n", m_.num_layer); \ + printf("\tvocab_size=%d\n", m_.vocab_size); \ + printf("\tnum_bucket=%d\n", m_.num_bucket); \ + printf("\tmax_distance=%d\n", m_.max_distance); \ + printf("\tq_scaling=%f\n", m_.q_scaling); \ + printf("\tstart_id=%d\n", m_.start_id); \ + printf("\tend_id=%d\n", m_.end_id); \ + printf("\tbeam_search_diversity_rate=%f\n", m_.beam_search_diversity_rate); \ + printf("\ttop_k=%d\n", m_.top_k); \ + printf("\ttop_p=%f\n", m_.top_p); \ + printf("\ttemperature=%f\n", m_.temperature); \ + printf("\tlen_penalty=%f\n", m_.len_penalty); \ + printf("\trepetition_penalty=%f\n", m_.repetition_penalty); \ + printf("\tuseFP16=%d\n", m_.useFP16); \ + printf("\tmem_d_model=%d\n", m_.mem_d_model); \ + printf("\tmem_hidden_units=%d\n", m_.mem_hidden_units); \ + printf("\tis_free_buffer_after_forward=%d\n", m_.is_free_buffer_after_forward); \ + printf("\tbatch_size=%d\n", m_.batch_size); \ + printf("\tseq_len=%d\n", m_.seq_len); + +#else +#define WHERE_AM_I() +#define PRINT_ENCODER(DATA_TYPE) +#define PRINT_DECODING(DATA_TYPE) +#endif // DEBUG_ENABLE==1 + +namespace { +static const char* ENCODER_NAME{"T5EncoderPlugin"}; +static const char* ENCODER_VERSION{"1"}; +static const char* DECODING_NAME{"T5DecodingPlugin"}; +static const char* DECODING_VERSION{"1"}; +} // namespace + +using namespace fastertransformer; + +namespace nvinfer1 { + +// class T5EncoderPlugin --------------------------------------------------------------------------- +class T5EncoderPlugin: public IPluginV2DynamicExt { +private: + using IPluginV2Ext::configurePlugin; + using IPluginV2::getOutputDimensions; + using IPluginV2::getWorkspaceSize; + using IPluginV2::enqueue; + + const std::string name_; + std::string namespace_; + cublasHandle_t cublasHandle_; + cublasLtHandle_t cublasltHandle_; +#ifdef SPARSITY_ENABLED + cusparseLtHandle_t cusparseltHandle_; +#endif + cublasAlgoMap* pCublasAlgoMap_ = nullptr; + std::mutex* pCublasWrapperMutex_ = nullptr; + T5EncoderWeight* pT5EncoderWeightHalf_ = nullptr; + T5EncoderWeight* pT5EncoderWeightFloat_ = nullptr; + Allocator* pAllocator_ = nullptr; + cublasMMWrapper* pCublasWrapper_ = nullptr; + T5Encoder* pT5EncoderHalf_ = nullptr; + T5Encoder* pT5EncoderFloat_ = nullptr; + struct { + // constructor parameter + size_t max_batch_size = 128; + size_t max_seq_len = 384; + size_t beam_width = 1; + size_t head_num = 8; + size_t size_per_head = 512 / 8; + size_t d_model = head_num * size_per_head; + size_t inter_size = d_model * 4; + size_t num_layer = 6; + size_t num_bucket = 32; + size_t max_distance = 128; + int sm = -1; // assign later + float q_scaling = 1.0f / (1.0f * sqrt(size_per_head)); + bool useFP16 = false; + // internal parameter + size_t vocab_size = 32128; + bool is_remove_padding = true; + bool is_free_buffer_after_forward = false; + bool is_sparse = false; + AttentionType attention_type = AttentionType::UNFUSED_MHA; + fastertransformer::ActivationType activation_type = fastertransformer::ActivationType::Relu; + LayerNormType layernorm_type = LayerNormType::pre_layernorm; + // runtime parameter + size_t batch_size = 0; + size_t seq_len = 0; + } m_; + +public: + T5EncoderPlugin() = delete; + T5EncoderPlugin(const std::string& name, + size_t max_batch_size, + size_t max_seq_len, + size_t beam_width, + size_t head_num, + size_t size_per_head, + size_t inter_size, + size_t d_model, + size_t num_layer, + size_t num_bucket, + size_t max_distance, + int sm, + float q_scaling, + int useFP16); + T5EncoderPlugin(const std::string& name, const void* buffer, size_t length); + ~T5EncoderPlugin(); + + virtual size_t getSerializationSize() const noexcept override; + virtual void serialize(void* buffer) const noexcept override; + IPluginV2DynamicExt* clone() const noexcept override; + int getNbOutputs() const noexcept override; + DataType getOutputDataType(int index, const DataType* inputTypes, int nbInputs) const noexcept override; + bool + supportsFormatCombination(int pos, const PluginTensorDesc* inOut, int nbInputs, int nbOutputs) noexcept override; + DimsExprs getOutputDimensions(int index, + const DimsExprs* pInputDim, + int nInputDim, + IExprBuilder& exprBuilder) noexcept override; + virtual void configurePlugin(const DynamicPluginTensorDesc* in, + int nbInput, + const DynamicPluginTensorDesc* out, + int nbOutput) noexcept override; + size_t getWorkspaceSize(const PluginTensorDesc* inputs, + int32_t nbInputs, + const PluginTensorDesc* outputs, + int32_t nbOutputs) const noexcept override; + int enqueue(const PluginTensorDesc* inputDesc, + const PluginTensorDesc* outputDesc, + const void* const* inputs, + void* const* outputs, + void* workspace, + cudaStream_t stream) noexcept override; + void setPluginNamespace(const char* szNamespace) noexcept override; + const char* getPluginNamespace() const noexcept override; + const char* getPluginType() const noexcept override; + const char* getPluginVersion() const noexcept override; + int initialize() noexcept override; + void terminate() noexcept override; + void destroy() noexcept override; + void attachToContext(cudnnContext* /*cudnn*/, cublasContext* /*cublas*/, IGpuAllocator* /*allocator*/) noexcept; + void detachFromContext() noexcept; +}; + +// class T5EncoderPluginCreator -------------------------------------------------------------------- +class T5EncoderPluginCreator: public IPluginCreator { +private: + static PluginFieldCollection fc_; + static std::vector attr_; + std::string namespace_; + +public: + T5EncoderPluginCreator(); + ~T5EncoderPluginCreator(); + IPluginV2* createPlugin(const char* name, const PluginFieldCollection* fc) noexcept override; + IPluginV2* deserializePlugin(const char* name, const void* serialData, size_t serialLength) noexcept override; + void setPluginNamespace(const char* szNamespace) noexcept override; + const char* getPluginNamespace() const noexcept override; + const char* getPluginName() const noexcept override; + const char* getPluginVersion() const noexcept override; + const PluginFieldCollection* getFieldNames() noexcept override; +}; +// class T5DecodingPlugin -------------------------------------------------------------------------- +class T5DecodingPlugin: public IPluginV2DynamicExt { +private: + using IPluginV2Ext::configurePlugin; + using IPluginV2::getOutputDimensions; + using IPluginV2::getWorkspaceSize; + using IPluginV2::enqueue; + + const std::string name_; + std::string namespace_; + cublasHandle_t cublasHandle_; + cublasLtHandle_t cublasltHandle_; + cudaDeviceProp cuda_device_prop_; + cublasAlgoMap* pCublasAlgoMap_ = nullptr; + Allocator* pAllocator_ = nullptr; + std::mutex* pCublasWrapperMutex_ = nullptr; + cublasMMWrapper* pCublasWrapper_ = nullptr; + T5DecodingWeight* pT5DecodingWeightHalf_ = nullptr; + T5DecodingWeight* pT5DecodingWeightFloat_ = nullptr; + T5Decoding* pT5DecodingHalf_ = nullptr; + T5Decoding* pT5DecodingFloat_ = nullptr; + struct { + // constructor parameter + size_t max_batch_size = 128; + size_t max_seq_len = 384; + size_t mem_max_seq_len = max_seq_len; + size_t beam_width = 4; + size_t head_num = 8; + size_t size_per_head = 512 / 8; + size_t d_model = head_num * size_per_head; + size_t inter_size = d_model * 4; + size_t num_layer = 6; + size_t vocab_size = 32128; + size_t num_bucket = 32; + size_t max_distance = 128; + float q_scaling = 1.0f / (1.0f * sqrt(size_per_head)); + int start_id = 0; + int end_id = 1; + float beam_search_diversity_rate = 0.0f; + size_t top_k = beam_width; + float top_p = 0.0f; + float temperature = 1.0f; + float len_penalty = 2.0f; + float repetition_penalty = 1.0f; + bool useFP16 = false; + // internal parameter + size_t mem_d_model = d_model; + size_t mem_hidden_units = d_model; + bool is_free_buffer_after_forward = false; + // runtime parameter + size_t batch_size = 128; + size_t seq_len = 384; + } m_; + +public: + T5DecodingPlugin() = delete; + T5DecodingPlugin(const std::string& name, + size_t max_batch_size, + size_t max_seq_len, + size_t mem_max_seq_len, + size_t beam_width, + size_t head_num, + size_t size_per_head, + size_t inter_size, + size_t d_model, + size_t num_layer, + size_t vocab_size, + size_t num_bucket, + size_t max_distance, + float q_scaling, + int start_id, + int end_id, + float beam_search_diversity_rate, + size_t top_k, + float top_p, + float temperature, + float len_penalty, + float repetition_penalty, + int useFP16); + T5DecodingPlugin(const std::string& name, const void* buffer, size_t length); + ~T5DecodingPlugin(); + + virtual size_t getSerializationSize() const noexcept override; + virtual void serialize(void* buffer) const noexcept override; + IPluginV2DynamicExt* clone() const noexcept override; + int getNbOutputs() const noexcept override; + DataType getOutputDataType(int index, const DataType* inputTypes, int nbInputs) const noexcept override; + bool + supportsFormatCombination(int pos, const PluginTensorDesc* inOut, int nbInputs, int nbOutputs) noexcept override; + DimsExprs getOutputDimensions(int index, + const DimsExprs* pInputDim, + int nInputDim, + IExprBuilder& exprBuilder) noexcept override; + virtual void configurePlugin(const DynamicPluginTensorDesc* in, + int nbInput, + const DynamicPluginTensorDesc* out, + int nbOutput) noexcept override; + size_t getWorkspaceSize(const PluginTensorDesc* inputs, + int32_t nbInputs, + const PluginTensorDesc* outputs, + int32_t nbOutputs) const noexcept override; + int enqueue(const PluginTensorDesc* inputDesc, + const PluginTensorDesc* outputDesc, + const void* const* inputs, + void* const* outputs, + void* workspace, + cudaStream_t stream) noexcept override; + void setPluginNamespace(const char* szNamespace) noexcept override; + const char* getPluginNamespace() const noexcept override; + const char* getPluginType() const noexcept override; + const char* getPluginVersion() const noexcept override; + int initialize() noexcept override; + void terminate() noexcept override; + void destroy() noexcept override; + void attachToContext(cudnnContext* /*cudnn*/, cublasContext* /*cublas*/, IGpuAllocator* /*allocator*/) noexcept; + void detachFromContext() noexcept; +}; + +// class T5DecodingPluginCreator ------------------------------------------------------------------- +class T5DecodingPluginCreator: public IPluginCreator { +private: + static PluginFieldCollection fc_; + static std::vector attr_; + std::string namespace_; + +public: + T5DecodingPluginCreator(); + ~T5DecodingPluginCreator(); + IPluginV2* createPlugin(const char* name, const PluginFieldCollection* fc) noexcept override; + IPluginV2* deserializePlugin(const char* name, const void* serialData, size_t serialLength) noexcept override; + void setPluginNamespace(const char* szNamespace) noexcept override; + const char* getPluginNamespace() const noexcept override; + const char* getPluginName() const noexcept override; + const char* getPluginVersion() const noexcept override; + const PluginFieldCollection* getFieldNames() noexcept override; +}; + +} // namespace nvinfer1 diff --git a/src/fastertransformer/tensorrt_plugin/t5/T5PluginGemm.cc b/src/fastertransformer/tensorrt_plugin/t5/T5PluginGemm.cc new file mode 100644 index 000000000..dc967b125 --- /dev/null +++ b/src/fastertransformer/tensorrt_plugin/t5/T5PluginGemm.cc @@ -0,0 +1,175 @@ +/* + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "T5PluginGemm.h" +#include "src/fastertransformer/utils/gemm_test/t5_gemm_func.h" +#include "src/fastertransformer/utils/memory_utils.h" + +namespace ft = fastertransformer; + +int t5_gemm(int argv[16]) +{ + const int argc = 16; + if (argc != 14 && argc != 15 && argc != 16) { + printf("[ERROR] ./bin/t5_gemm \\ \n" + " batch_size \\ \n" + " beam_width \\ \n" + " max_mem_seq_len \\ \n" + " encoder_d_model \\ \n" + " encoder_head_num \\ \n" + " encoder_size_per_head \\ \n" + " encoder_inter_size \\ \n" + " decoder_d_model \\ \n" + " decoder_head_num \\ \n" + " decoder_size_per_head \\ \n" + " decoder_inter_size \\ \n" + " decoder_vocab_size \\ \n" + " data_type \\ \n" + " tensor_para_size \\ \n" + " is_fp16_compute_type \n"); + printf("e.g. ./bin/t5_gemm 8 4 32 512 8 64 2048 512 8 64 2048 32100 1 2 1\n"); + return 0; + } + + const int batch_size = argv[1]; + const int beam_width = argv[2]; + const int max_mem_seq_len = argv[3]; + + const int encoder_d_model = argv[4]; + const int encoder_head_num = argv[5]; + const int encoder_size_per_head = argv[6]; + const int encoder_inter_size = argv[7]; + + const int decoder_d_model = argv[8]; + const int decoder_head_num = argv[9]; + const int decoder_size_per_head = argv[10]; + const int decoder_inter_size = argv[11]; + const int decoder_vocab_size = argv[12]; + + const ft::CublasDataType data_type = static_cast(argv[13]); // 0 FP32, 1 FP16, 2 BF 16 + const int tensor_para_size = argc <= 14 ? 1 : argv[14]; + const int is_fp16_compute_type = argc <= 15 ? 1 : argv[15]; + + std::cout << "[INFO] arguments: " << std::endl + << " batch_size: " << batch_size << std::endl + << " beam_width: " << beam_width << std::endl + << " max_mem_seq_len: " << max_mem_seq_len << std::endl + << " encoder_d_model: " << encoder_d_model << std::endl + << " encoder_head_num: " << encoder_head_num << std::endl + << " encoder_size_per_head: " << encoder_size_per_head << std::endl + << " encoder_inter_size: " << encoder_inter_size << std::endl + << " decoder_d_model: " << decoder_d_model << std::endl + << " decoder_head_num: " << decoder_head_num << std::endl + << " decoder_size_per_head: " << decoder_size_per_head << std::endl + << " decoder_inter_size: " << decoder_inter_size << std::endl + << " decoder_vocab_size: " << decoder_vocab_size << std::endl + << " data_type: " << data_type << std::endl + << " tensor_para_size: " << tensor_para_size << std::endl + << " is_fp16_compute_type: " << is_fp16_compute_type << std::endl; + + void* gemm_test_buf; + size_t buf_size_in_byte = ft::calT5GemmTestBufSizeInByte(batch_size, + beam_width, + max_mem_seq_len, + encoder_d_model, + encoder_head_num, + encoder_size_per_head, + encoder_inter_size, + decoder_d_model, + decoder_head_num, + decoder_size_per_head, + decoder_inter_size, + decoder_vocab_size, + tensor_para_size, + data_type); + size_t total, free; + ft::check_cuda_error(cudaMemGetInfo(&free, &total)); + if (free < buf_size_in_byte + 10 * 1024 * 1024) { + printf("[ERROR] There is no enough device memory for gemm test!\n" + " %ld Bytes is needed, but only %ld Bytes is free.\n", + buf_size_in_byte, + free); + gemm_test_buf = NULL; + return -1; + } + else { + ft::deviceMalloc(reinterpret_cast(&gemm_test_buf), buf_size_in_byte, false); + } + + if (data_type == ft::FLOAT_DATATYPE) { + ft::generate_t5_gemm_config(batch_size, + beam_width, + max_mem_seq_len, + encoder_d_model, + encoder_head_num, + encoder_size_per_head, + encoder_inter_size, + decoder_d_model, + decoder_head_num, + decoder_size_per_head, + decoder_inter_size, + decoder_vocab_size, + tensor_para_size, + gemm_test_buf, + false, + is_fp16_compute_type); + } + if (data_type == ft::HALF_DATATYPE) { + ft::generate_t5_gemm_config(batch_size, + beam_width, + max_mem_seq_len, + encoder_d_model, + encoder_head_num, + encoder_size_per_head, + encoder_inter_size, + decoder_d_model, + decoder_head_num, + decoder_size_per_head, + decoder_inter_size, + decoder_vocab_size, + tensor_para_size, + gemm_test_buf, + false, + is_fp16_compute_type); + } +#ifdef ENABLE_BF16 + if (data_type == ft::BFLOAT16_DATATYPE) { + ft::generate_t5_gemm_config<__nv_bfloat16>(batch_size, + beam_width, + max_mem_seq_len, + encoder_d_model, + encoder_head_num, + encoder_size_per_head, + encoder_inter_size, + decoder_d_model, + decoder_head_num, + decoder_size_per_head, + decoder_inter_size, + decoder_vocab_size, + tensor_para_size, + gemm_test_buf, + false, + is_fp16_compute_type); + } +#endif + else { + printf("[ERROR] data type only supports fp32(0), fp16(1), bf16(2). \n"); + return -1; + } + + ft::check_cuda_error(cudaFree(gemm_test_buf)); + return 0; +} diff --git a/src/fastertransformer/tensorrt_plugin/t5/T5PluginGemm.h b/src/fastertransformer/tensorrt_plugin/t5/T5PluginGemm.h new file mode 100644 index 000000000..d58e8476c --- /dev/null +++ b/src/fastertransformer/tensorrt_plugin/t5/T5PluginGemm.h @@ -0,0 +1,17 @@ +/* + * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +int t5_gemm(int argv[16]); diff --git a/src/fastertransformer/tensorrt_plugin/vit/CMakeLists.txt b/src/fastertransformer/tensorrt_plugin/vit/CMakeLists.txt new file mode 100644 index 000000000..8a2fe6d98 --- /dev/null +++ b/src/fastertransformer/tensorrt_plugin/vit/CMakeLists.txt @@ -0,0 +1,27 @@ +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +cmake_minimum_required(VERSION 3.8) + +set(vit_trt_files + ViTPlugin.cpp +) + + +if(BUILD_TRT) + set(LIB_NAME "vit_plugin") + add_library(${LIB_NAME} SHARED ${vit_trt_files}) + set_target_properties(${LIB_NAME} PROPERTIES + CUDA_RESOLVE_DEVICE_SYMBOLS ON) + target_link_libraries(${LIB_NAME} trt_fused_multi_head_attention ViT -lcudnn -lcublas -lcudart -lnvinfer) +endif() diff --git a/src/fastertransformer/tensorrt_plugin/vit/ViTPlugin.cpp b/src/fastertransformer/tensorrt_plugin/vit/ViTPlugin.cpp new file mode 100644 index 000000000..710b7c150 --- /dev/null +++ b/src/fastertransformer/tensorrt_plugin/vit/ViTPlugin.cpp @@ -0,0 +1,574 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "ViTPlugin.h" +#include "NvInfer.h" +#include +#include + +#include +#include +#include +#include +#include + +using namespace nvinfer1; +using namespace std; + +namespace fastertransformer { + +// Static class fields initialization +PluginFieldCollection VisionTransformerPluginCreator::mFC{}; +std::vector VisionTransformerPluginCreator::mPluginAttributes; + +REGISTER_TENSORRT_PLUGIN(VisionTransformerPluginCreator); + +template +VisionTransformerPlugin::VisionTransformerPlugin(const std::string& name, + const int max_batch, + const int img_size, + const int patch_size, + const int in_chans, + const int embed_dim, + const int num_heads, + const int inter_size, + const int layer_num, + const float q_scaling, + const bool with_cls_token, + const std::vector& w): + layer_name_(name) +{ + + settings_.max_batch_size = max_batch; + settings_.img_size = img_size; + settings_.chn_num = in_chans; + settings_.patch_size = patch_size; + settings_.embed_dim = embed_dim; + settings_.head_num = num_heads; + settings_.inter_size = inter_size; + settings_.num_layer = layer_num; + settings_.with_cls_token = with_cls_token; + settings_.sm = getSMVersion(); + settings_.q_scaling = q_scaling; + settings_.seq_len = (img_size / patch_size) * (img_size / patch_size) + (with_cls_token ? 1 : 0); + settings_.attention_type = getAttentionType(embed_dim / num_heads, settings_.sm, true, settings_.seq_len); + + Init(w); +} + +template +VisionTransformerPlugin::VisionTransformerPlugin(const std::string& name, const void* data, size_t length): + layer_name_(name) +{ + ::memcpy(&settings_, data, sizeof(settings_)); + const char* w_buffer = static_cast(data) + sizeof(settings_); + + std::vector dummy; + Init(dummy); + + params_->deserialize(w_buffer); +} + +template +VisionTransformerPlugin::VisionTransformerPlugin(const VisionTransformerPlugin& plugin): + layer_name_(plugin.layer_name_), settings_(plugin.settings_) +{ + std::vector dummy; + Init(dummy); + *params_ = *plugin.params_; +} + +template +void VisionTransformerPlugin::Init(const std::vector& w) +{ + params_ = new ViTWeight(settings_.embed_dim, + settings_.inter_size, + settings_.num_layer, + settings_.img_size, + settings_.patch_size, + settings_.chn_num, + settings_.with_cls_token); + + if (w.size() > 0) { + size_t weight_num = params_->GetWeightCount(); + + if (weight_num != w.size()) { + printf("[ERROR][VisionTransformerPlugin] weights number %lu does not match expected number %lu!\n", + w.size(), + weight_num); + exit(-1); + } + const T* const* pp_buf = &w[0]; + params_->CopyWeightsFromHostBuffers(pp_buf); + } + + check_cuda_error(cublasCreate(&cublas_handle_)); + check_cuda_error(cublasLtCreate(&cublaslt_handle_)); + checkCUDNN(cudnnCreate(&cudnn_handle_)); + + cublasAlgoMap_ = new cublasAlgoMap("igemm.config", ""); + cublasWrapperMutex_ = new std::mutex(); + allocator_ = new Allocator(getDevice()); + + cublas_wrapper_ = + new cublasMMWrapper(cublas_handle_, cublaslt_handle_, nullptr, cublasAlgoMap_, cublasWrapperMutex_, allocator_); + if (std::is_same::value) { + cublas_wrapper_->setFP16GemmConfig(); + } + else if (std::is_same::value) { + cublas_wrapper_->setFP32GemmConfig(); + } + + vit_transformer_ = new ViTTransformer(settings_.max_batch_size, + settings_.img_size, + settings_.chn_num, + settings_.patch_size, + settings_.embed_dim, + settings_.head_num, + settings_.inter_size, + settings_.num_layer, + settings_.with_cls_token, + settings_.sm, + settings_.q_scaling, + 0, + cudnn_handle_, + cublas_wrapper_, + allocator_, + false, + settings_.attention_type); +} + +template +VisionTransformerPlugin::~VisionTransformerPlugin() +{ + check_cuda_error(cublasDestroy(cublas_handle_)); + check_cuda_error(cublasLtDestroy(cublaslt_handle_)); + checkCUDNN(cudnnDestroy(cudnn_handle_)); + delete cublasWrapperMutex_; + delete cublasAlgoMap_; + delete vit_transformer_; + delete allocator_; + delete params_; +} + +// IPluginV2DynamicExt Methods +template +nvinfer1::IPluginV2DynamicExt* VisionTransformerPlugin::clone() const noexcept +{ + + VisionTransformerPlugin* ret = new VisionTransformerPlugin(*this); + return ret; +} + +template +DimsExprs VisionTransformerPlugin::getOutputDimensions(int outputIndex, + const DimsExprs* inputs, + int nbInputs, + IExprBuilder& exprBuilder) noexcept +{ + // Input is B*in_chans*H*W, output should be B*seq_len*embed_dim*1 + assert(outputIndex == 0); + DimsExprs output; + output.nbDims = 3; + output.d[0] = inputs[0].d[0]; + output.d[1] = exprBuilder.constant(settings_.seq_len); + output.d[2] = exprBuilder.constant(settings_.embed_dim); + return output; +} + +template +bool VisionTransformerPlugin::supportsFormatCombination(int pos, + const PluginTensorDesc* inOut, + int nbInputs, + int nbOutputs) noexcept +{ + bool res = false; + assert(pos >= 0 && pos < 2); + assert(nbInputs == 1); + switch (pos) { + case 0: // input + case 1: // output + res = (inOut[pos].type + == (std::is_same::value ? nvinfer1::DataType::kHALF : nvinfer1::DataType::kFLOAT)) + && (inOut[pos].format == nvinfer1::TensorFormat::kLINEAR); + break; + default: + break; + } + + return res; +} + +template +void VisionTransformerPlugin::configurePlugin(const DynamicPluginTensorDesc* in, + int nbInputs, + const DynamicPluginTensorDesc* out, + int nbOutputs) noexcept +{ + assert(nbInputs == 1); + assert(nbOutputs == 1); +} + +template +size_t VisionTransformerPlugin::getWorkspaceSize(const PluginTensorDesc* inputs, + int nbInputs, + const PluginTensorDesc* outputs, + int nbOutputs) const noexcept +{ + return 0; +} + +// IPluginV2Ext Methods +template +nvinfer1::DataType VisionTransformerPlugin::getOutputDataType(int index, + const nvinfer1::DataType* inputTypes, + int nbInputs) const noexcept +{ + assert(index == 0); + assert(inputTypes[0] == nvinfer1::DataType::kFLOAT || inputTypes[0] == nvinfer1::DataType::kHALF); + return inputTypes[0]; +} + +// IPluginV2 Methods +template +const char* VisionTransformerPlugin::getPluginType() const noexcept +{ + return VIT_PLUGIN_NAME; +} + +template +const char* VisionTransformerPlugin::getPluginVersion() const noexcept +{ + return VIT_PLUGIN_VERSION; +} + +template +int VisionTransformerPlugin::getNbOutputs() const noexcept +{ + return 1; +} + +template +int VisionTransformerPlugin::initialize() noexcept +{ + return 0; +} + +template +void VisionTransformerPlugin::terminate() noexcept +{ +} + +template +size_t VisionTransformerPlugin::getSerializationSize() const noexcept +{ + + size_t size = sizeof(int) + sizeof(settings_); + size += params_->GetSerializeSize(); + return size; +} + +template +void VisionTransformerPlugin::serialize(void* buffer) const noexcept +{ + printf("start serialize vit...\n"); + + int type_id = 0; + if (std::is_same::value) { + type_id = 1; + } + ::memcpy(buffer, &type_id, sizeof(type_id)); + char* serial_buffer = (char*)buffer + sizeof(type_id); + ::memcpy(serial_buffer, &settings_, sizeof(settings_)); + serial_buffer += sizeof(settings_); + params_->serialize(serial_buffer); +} + +template +void VisionTransformerPlugin::destroy() noexcept +{ + delete this; +} + +template +void VisionTransformerPlugin::setPluginNamespace(const char* libNamespace) noexcept +{ + namespace_ = libNamespace; +} + +template +const char* VisionTransformerPlugin::getPluginNamespace() const noexcept +{ + return namespace_.c_str(); +} + +template +int VisionTransformerPlugin::enqueue(const PluginTensorDesc* inputDesc, + const PluginTensorDesc* outputDesc, + const void* const* inputs, + void* const* outputs, + void* workspace, + cudaStream_t stream) noexcept +{ + int batch_size = inputDesc->dims.d[0]; + assert(batch_size <= settings_.max_batch_size); + assert(settings_.chn_num == inputDesc->dims.d[1]); + assert(settings_.img_size == inputDesc->dims.d[2]); + assert(settings_.img_size == inputDesc->dims.d[3]); + + int sm_ptr[1] = {sm_}; + std::vector input_tensors = std::vector{Tensor{ + MEMORY_GPU, + getTensorType(), + std::vector{ + (size_t)batch_size, (size_t)settings_.chn_num, (size_t)settings_.img_size, (size_t)settings_.img_size}, + (const T*)(inputs[0])}}; + + std::vector output_tensors = std::vector{ + Tensor{MEMORY_GPU, + getTensorType(), + std::vector{(size_t)batch_size, (size_t)settings_.seq_len, (size_t)settings_.embed_dim}, + (T*)(outputs[0])}}; + + vit_transformer_->forward(&output_tensors, &input_tensors, params_); + return 0; +} + +VisionTransformerPluginCreator::VisionTransformerPluginCreator() +{ + mFC.nbFields = mPluginAttributes.size(); + mFC.fields = mPluginAttributes.data(); +} + +const char* VisionTransformerPluginCreator::getPluginName() const noexcept +{ + return VIT_PLUGIN_NAME; +} + +const char* VisionTransformerPluginCreator::getPluginVersion() const noexcept +{ + return VIT_PLUGIN_VERSION; +} + +const PluginFieldCollection* VisionTransformerPluginCreator::getFieldNames() noexcept +{ + return &mFC; +} + +// Creator +#define L_ROOT "Transformer/encoderblock_%d" +#define ATT_Q "MultiHeadDotProductAttention_1/query" +#define ATT_K "MultiHeadDotProductAttention_1/key" +#define ATT_V "MultiHeadDotProductAttention_1/value" +#define ATT_OUT "MultiHeadDotProductAttention_1/out" +#define ATT_NORM "LayerNorm_0" +#define FFN_NORM "LayerNorm_2" +#define FFN_IN "MlpBlock_3/Dense_0" +#define FFN_OUT "MlpBlock_3/Dense_1" + +const std::vector layer_weight_names = {L_ROOT "/" ATT_NORM "/scale", + L_ROOT "/" ATT_NORM "/bias", + L_ROOT "/" ATT_Q "/kernel", + L_ROOT "/" ATT_Q "/bias", + L_ROOT "/" ATT_K "/kernel", + L_ROOT "/" ATT_K "/bias", + L_ROOT "/" ATT_V "/kernel", + L_ROOT "/" ATT_V "/bias", + L_ROOT "/" ATT_OUT "/kernel", + L_ROOT "/" ATT_OUT "/bias", + L_ROOT "/" FFN_NORM "/scale", + L_ROOT "/" FFN_NORM "/bias", + L_ROOT "/" FFN_IN "/kernel", + L_ROOT "/" FFN_IN "/bias", + L_ROOT "/" FFN_OUT "/kernel", + L_ROOT "/" FFN_OUT "/bias"}; + +const std::vector pre_layer_weight_names = { + "embedding/kernel", "embedding/bias", "cls", "Transformer/posembed_input/pos_embedding"}; +const std::vector post_layer_weight_names = {"Transformer/encoder_norm/scale", + "Transformer/encoder_norm/bias"}; + +nvinfer1::PluginFieldType getFieldCollectionType(std::string name, const nvinfer1::PluginFieldCollection* fc) +{ + for (int i = 0; i < fc->nbFields; i++) { + std::string field_name(fc->fields[i].name); + if (field_name.compare(name) == 0) { + return fc->fields[i].type; + } + } + return nvinfer1::PluginFieldType::kUNKNOWN; +} + +template +void loadWeightsPtr(std::vector& w, + const nvinfer1::PluginFieldCollection* fc, + int layer_num, + bool with_cls_token = true) +{ + int idx = 0; + for (auto& name : pre_layer_weight_names) { + if (!with_cls_token && name == "cls") + continue; + + for (int i = 0; i < fc->nbFields; i++) { + std::string field_name(fc->fields[i].name); + if (field_name.compare(name) == 0) { + w[idx++] = (const T*)fc->fields[i].data; + } + } + } + + for (int i = 0; i < layer_num; i++){ + for (auto& name : layer_weight_names) { + char str_buf[1024]; + sprintf(str_buf, name, i); + + for (int j = 0; j < fc->nbFields; j++) { + std::string field_name(fc->fields[j].name); + if (field_name.compare(str_buf) == 0) { + w[idx++] = (const T*)fc->fields[j].data; + } + } + } + } + + for (auto& name : post_layer_weight_names) { + for (int i = 0; i < fc->nbFields; i++) { + std::string field_name(fc->fields[i].name); + if (field_name.compare(name) == 0) { + w[idx++] = (const T*)fc->fields[i].data; + } + } + } + + FT_CHECK(idx == w.size()); +} + +IPluginV2* VisionTransformerPluginCreator::createPlugin(const char* name, const PluginFieldCollection* fc) noexcept +{ + int max_batch; + int img_size; + int patch_size; + int in_chans; + int embed_dim; + int num_heads; + int inter_size; + int layer_num; + int with_cls_token = true; + + std::map name2pint = {{"max_batch", &max_batch}, + {"img_size", &img_size}, + {"patch_size", &patch_size}, + {"in_chans", &in_chans}, + {"embed_dim", &embed_dim}, + {"num_heads", &num_heads}, + {"inter_size", &inter_size}, + {"layer_num", &layer_num}, + {"with_cls_token", &with_cls_token}}; + + for (int i = 0; i < fc->nbFields; i++) { + auto iter = name2pint.find(fc->fields[i].name); + if (iter != name2pint.end()) { + *(iter->second) = *((int*)fc->fields[i].data); + printf("name=%s, value=%d\n", iter->first.c_str(), *((int*)fc->fields[i].data)); + continue; + } + } + + size_t weights_num = + pre_layer_weight_names.size() + post_layer_weight_names.size() + layer_num * layer_weight_names.size(); + + auto weights_type = getFieldCollectionType(pre_layer_weight_names[0], fc); + + std::vector w_fp16; + std::vector w_fp32; + IPluginV2* p; + switch (weights_type) { + case nvinfer1::PluginFieldType::kFLOAT16: + w_fp16.resize(weights_num); + loadWeightsPtr(w_fp16, fc, layer_num); + p = new VisionTransformerPlugin(name, + max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + num_heads, + inter_size, + layer_num, + 1.0, + with_cls_token, + w_fp16); + + break; + case nvinfer1::PluginFieldType::kFLOAT32: + w_fp32.resize(weights_num); + loadWeightsPtr(w_fp32, fc, layer_num); + p = new VisionTransformerPlugin(name, + max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + num_heads, + inter_size, + layer_num, + 1.0, + with_cls_token, + w_fp32); + break; + default: + printf("[ERROR][VisionTransformerPluginCreator::createPlugin] unsupport datatype.\n"); + exit(-1); + } + + return p; +} + +IPluginV2* VisionTransformerPluginCreator::deserializePlugin(const char* name, + const void* serialData, + size_t serialLength) noexcept +{ + int type_id; + ::memcpy(&type_id, serialData, sizeof(int)); + char* modelData = (char*)serialData + sizeof(int); + + // This object will be deleted when the network is destroyed, which will + // call VisionTransformerPlugin::destroy() + if (type_id == 0) + return new VisionTransformerPlugin(name, modelData, serialLength); + else if (type_id == 1) + return new VisionTransformerPlugin(name, modelData, serialLength); + else { + printf("[ERROR][VisionTransformerPluginCreator::deserializePlugin] unsupport data type %d\n", type_id); + exit(-1); + } +} + +void VisionTransformerPluginCreator::setPluginNamespace(const char* libNamespace) noexcept +{ + namespace_ = libNamespace; +} + +const char* VisionTransformerPluginCreator::getPluginNamespace() const noexcept +{ + return namespace_.c_str(); +} + +template class VisionTransformerPlugin; +template class VisionTransformerPlugin; + +} // namespace fastertransformer diff --git a/src/fastertransformer/tensorrt_plugin/vit/ViTPlugin.h b/src/fastertransformer/tensorrt_plugin/vit/ViTPlugin.h new file mode 100644 index 000000000..d90fdf187 --- /dev/null +++ b/src/fastertransformer/tensorrt_plugin/vit/ViTPlugin.h @@ -0,0 +1,167 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include + +#ifndef SWIN_TRANSFORMER_PLUGIN_H +#define SWIN_TRANSFORMER_PLUGIN_H + +#include "NvInfer.h" +#include "NvInferPlugin.h" +#include "NvInferRuntime.h" +#include "cublas_v2.h" +#include +#include + +#include "src/fastertransformer/models/vit/ViT.h" +#include "src/fastertransformer/utils/allocator.h" + +namespace fastertransformer { + +namespace { +static const char* VIT_PLUGIN_VERSION{"1"}; +static const char* VIT_PLUGIN_NAME{"CustomVisionTransformerPlugin"}; +} // namespace + +struct ViTSettings { + size_t max_batch_size = 32; + size_t img_size = 224; + size_t chn_num = 3; + size_t patch_size = 16; + size_t embed_dim = 768; + size_t head_num = 12; + size_t inter_size = embed_dim * 4; + size_t num_layer = 12; + bool with_cls_token = true; + bool is_fp16 = false; + int sm = -1; + float q_scaling = 1.0f; + AttentionType attention_type = AttentionType::UNFUSED_MHA; + // runtime param + size_t seq_len = 0; +}; + +template +class VisionTransformerPlugin: public nvinfer1::IPluginV2DynamicExt { +private: + const std::string layer_name_; + std::string namespace_; + + cublasHandle_t cublas_handle_ = nullptr; + cublasLtHandle_t cublaslt_handle_ = nullptr; + cudnnHandle_t cudnn_handle_ = nullptr; + ViTWeight* params_ = nullptr; + ViTTransformer* vit_transformer_ = nullptr; + std::mutex* cublasWrapperMutex_ = nullptr; + cublasAlgoMap* cublasAlgoMap_ = nullptr; + fastertransformer::Allocator* allocator_ = nullptr; + cublasMMWrapper* cublas_wrapper_ = nullptr; + + ViTSettings settings_; + +public: + int sm_; + VisionTransformerPlugin(const std::string& name, + const int max_batch, + const int img_size, + const int patch_size, + const int in_chans, + const int embed_dim, + const int num_heads, + const int inter_size, + const int layer_num, + const float q_scaling, + const bool with_cls_token, + const std::vector& w); + + VisionTransformerPlugin(const std::string& name, const void* data, size_t length); + VisionTransformerPlugin(const VisionTransformerPlugin& plugin); + VisionTransformerPlugin() = delete; + + ~VisionTransformerPlugin(); + + // IPluginV2DynamicExt Methods + nvinfer1::IPluginV2DynamicExt* clone() const noexcept override; + nvinfer1::DimsExprs getOutputDimensions(int outputIndex, + const nvinfer1::DimsExprs* inputs, + int nbInputs, + nvinfer1::IExprBuilder& exprBuilder) noexcept override; + bool supportsFormatCombination(int pos, + const nvinfer1::PluginTensorDesc* inOut, + int nbInputs, + int nbOutputs) noexcept override; + void configurePlugin(const nvinfer1::DynamicPluginTensorDesc* in, + int nbInputs, + const nvinfer1::DynamicPluginTensorDesc* out, + int nbOutputs) noexcept override; + size_t getWorkspaceSize(const nvinfer1::PluginTensorDesc* inputs, + int nbInputs, + const nvinfer1::PluginTensorDesc* outputs, + int nbOutputs) const noexcept override; + int enqueue(const nvinfer1::PluginTensorDesc* inputDesc, + const nvinfer1::PluginTensorDesc* outputDesc, + const void* const* inputs, + void* const* outputs, + void* workspace, + cudaStream_t stream) noexcept override; + + // IPluginV2Ext Methods + nvinfer1::DataType + getOutputDataType(int index, const nvinfer1::DataType* inputTypes, int nbInputs) const noexcept override; + + // IPluginV2 Methods + const char* getPluginType() const noexcept override; + const char* getPluginVersion() const noexcept override; + int getNbOutputs() const noexcept override; + int initialize() noexcept override; + void terminate() noexcept override; + size_t getSerializationSize() const noexcept override; + void serialize(void* buffer) const noexcept override; + void destroy() noexcept override; + void setPluginNamespace(const char* pluginNamespace) noexcept override; + const char* getPluginNamespace() const noexcept override; + +private: + void Init(const std::vector& w); +}; + +class VisionTransformerPluginCreator: public nvinfer1::IPluginCreator { +public: + VisionTransformerPluginCreator(); + + const char* getPluginName() const noexcept override; + + const char* getPluginVersion() const noexcept override; + + const nvinfer1::PluginFieldCollection* getFieldNames() noexcept override; + + nvinfer1::IPluginV2* createPlugin(const char* name, const nvinfer1::PluginFieldCollection* fc) noexcept override; + + nvinfer1::IPluginV2* + deserializePlugin(const char* name, const void* serialData, size_t serialLength) noexcept override; + + void setPluginNamespace(const char* pluginNamespace) noexcept override; + + const char* getPluginNamespace() const noexcept override; + +private: + static nvinfer1::PluginFieldCollection mFC; + static std::vector mPluginAttributes; + std::string namespace_; +}; + +} // namespace fastertransformer +#endif // TRT_SWIN_TRANSFORMER_H diff --git a/src/fastertransformer/tf_op/BaseOp.h b/src/fastertransformer/tf_op/BaseOp.h index 212428260..dfa42e412 100644 --- a/src/fastertransformer/tf_op/BaseOp.h +++ b/src/fastertransformer/tf_op/BaseOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -21,6 +21,7 @@ #define EIGEN_USE_GPU +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" #include "src/fastertransformer/utils/cuda_utils.h" #include "tensorflow/core/framework/op.h" @@ -100,6 +101,14 @@ class BaseOp: public tf::OpKernel { return ft::Tensor{ ft::MEMORY_GPU, ft::getTensorType(), convert_shape(tensor), (half*)(tensor.flat().data())}; } +#ifdef ENABLE_BF16 + if (std::is_same::value == true) { + return ft::Tensor{ft::MEMORY_GPU, + ft::getTensorType<__nv_bfloat16>(), + convert_shape(tensor), + (__nv_bfloat16*)(tensor.flat().data())}; + } +#endif else if (std::is_same::value == true) { return ft::Tensor{ ft::MEMORY_GPU, ft::getTensorType(), convert_shape(tensor), (float*)(tensor.flat().data())}; diff --git a/src/fastertransformer/tf_op/CMakeLists.txt b/src/fastertransformer/tf_op/CMakeLists.txt index 7bea22260..b1c5dee31 100644 --- a/src/fastertransformer/tf_op/CMakeLists.txt +++ b/src/fastertransformer/tf_op/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/bert/BertINT8Op.cc b/src/fastertransformer/tf_op/bert/BertINT8Op.cc index 1ea312bda..e022fc0a0 100644 --- a/src/fastertransformer/tf_op/bert/BertINT8Op.cc +++ b/src/fastertransformer/tf_op/bert/BertINT8Op.cc @@ -17,6 +17,10 @@ #include "src/fastertransformer/models/bert_int8/BertINT8.h" #include "src/fastertransformer/tf_op/BaseOp.h" +#ifndef CUDART_VERSION +#error CUDART_VERSION Undefined! +#endif + namespace ft = fastertransformer; namespace tf = tensorflow; @@ -91,7 +95,7 @@ class BertINT8Op: public BaseOp { cublas_algo_map_ = new ft::cublasAlgoMap("igemm_config.in"); set_weight_ = false; use_ORDER_COL32_2R_4R4_ = false; -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) if (sm_ >= 80) { use_ORDER_COL32_2R_4R4_ = true; } @@ -105,8 +109,7 @@ class BertINT8Op: public BaseOp { ~BertINT8Op() { delete cublas_algo_map_; - if (set_weight_ && h_scale_list_) - { + if (set_weight_ && h_scale_list_) { free(h_scale_list_); h_scale_list_ = nullptr; set_weight_ = false; @@ -129,52 +132,68 @@ class BertINT8Op: public BaseOp { const cudaStream_t& stream = context->eigen_device().stream(); cublasLtHandle_t cublaslt_handle = this->get_cublaslt_handler(); - ft::cublasINT8MMWrapper cublas_wrapper = - ft::cublasINT8MMWrapper(cublaslt_handle, stream, cublas_algo_map_, this->get_cublas_wrapper_mutex(), use_ORDER_COL32_2R_4R4_); - + ft::cublasINT8MMWrapper cublas_wrapper = ft::cublasINT8MMWrapper( + cublaslt_handle, stream, cublas_algo_map_, this->get_cublas_wrapper_mutex(), use_ORDER_COL32_2R_4R4_); + ft::Allocator allocator(context, stream); - if (!set_weight_) - { - const int scale_list_size = ACTIVATION_AMAX_NUM + 9*head_num_*size_per_head_ + INT8O_GEMM_NUM + TRT_AMAX_NUM + SCALE_RESERVE_NUM; - h_scale_list_ = (float*)malloc(num_layer_*scale_list_size*sizeof(float)); - + if (!set_weight_) { + const int scale_list_size = ACTIVATION_AMAX_NUM + 9 * head_num_ * size_per_head_ + INT8O_GEMM_NUM + + TRT_AMAX_NUM + SCALE_RESERVE_NUM; + h_scale_list_ = (float*)malloc(num_layer_ * scale_list_size * sizeof(float)); + bert_layer_weights_.resize(num_layer_); for (int i = 0; i < num_layer_; i++) { this->get_tensor(context, 3 + i, &bert_layer_weights_[i].attention_weights.query_weight.kernel); - this->get_tensor(context, 3 + num_layer_ + i, &bert_layer_weights_[i].attention_weights.query_weight.bias); - this->get_tensor(context, 3 + num_layer_ * 2 + i, &bert_layer_weights_[i].attention_weights.key_weight.kernel); - this->get_tensor(context, 3 + num_layer_ * 3 + i, &bert_layer_weights_[i].attention_weights.key_weight.bias); - this->get_tensor(context, 3 + num_layer_ * 4 + i, &bert_layer_weights_[i].attention_weights.value_weight.kernel); - this->get_tensor(context, 3 + num_layer_ * 5 + i, &bert_layer_weights_[i].attention_weights.value_weight.bias); - this->get_tensor(context,3 + num_layer_ * 6 + i, &bert_layer_weights_[i].attention_weights.attention_output_weight.kernel); - this->get_tensor(context, 3 + num_layer_ * 7 + i, &bert_layer_weights_[i].attention_weights.attention_output_weight.bias); + this->get_tensor( + context, 3 + num_layer_ + i, &bert_layer_weights_[i].attention_weights.query_weight.bias); + this->get_tensor( + context, 3 + num_layer_ * 2 + i, &bert_layer_weights_[i].attention_weights.key_weight.kernel); + this->get_tensor( + context, 3 + num_layer_ * 3 + i, &bert_layer_weights_[i].attention_weights.key_weight.bias); + this->get_tensor( + context, 3 + num_layer_ * 4 + i, &bert_layer_weights_[i].attention_weights.value_weight.kernel); + this->get_tensor( + context, 3 + num_layer_ * 5 + i, &bert_layer_weights_[i].attention_weights.value_weight.bias); + this->get_tensor(context, + 3 + num_layer_ * 6 + i, + &bert_layer_weights_[i].attention_weights.attention_output_weight.kernel); + this->get_tensor(context, + 3 + num_layer_ * 7 + i, + &bert_layer_weights_[i].attention_weights.attention_output_weight.bias); this->get_tensor(context, 3 + num_layer_ * 8 + i, &bert_layer_weights_[i].attn_layernorm_weights.beta); this->get_tensor(context, 3 + num_layer_ * 9 + i, &bert_layer_weights_[i].attn_layernorm_weights.gamma); - this->get_tensor(context, 3 + num_layer_ * 10 + i, &bert_layer_weights_[i].ffn_weights.intermediate_weight.kernel); - this->get_tensor(context, 3 + num_layer_ * 11 + i, &bert_layer_weights_[i].ffn_weights.intermediate_weight.bias); - this->get_tensor(context, 3 + num_layer_ * 12 + i, &bert_layer_weights_[i].ffn_weights.output_weight.kernel); - this->get_tensor(context, 3 + num_layer_ * 13 + i, &bert_layer_weights_[i].ffn_weights.output_weight.bias); + this->get_tensor( + context, 3 + num_layer_ * 10 + i, &bert_layer_weights_[i].ffn_weights.intermediate_weight.kernel); + this->get_tensor( + context, 3 + num_layer_ * 11 + i, &bert_layer_weights_[i].ffn_weights.intermediate_weight.bias); + this->get_tensor( + context, 3 + num_layer_ * 12 + i, &bert_layer_weights_[i].ffn_weights.output_weight.kernel); + this->get_tensor( + context, 3 + num_layer_ * 13 + i, &bert_layer_weights_[i].ffn_weights.output_weight.bias); this->get_tensor(context, 3 + num_layer_ * 14 + i, &bert_layer_weights_[i].ffn_layernorm_weights.beta); this->get_tensor(context, 3 + num_layer_ * 15 + i, &bert_layer_weights_[i].ffn_layernorm_weights.gamma); - //deal with scale list - bert_layer_weights_[i].scale_list_.d_scale_list_ = reinterpret_cast(context->input(3 + num_layer_ * 16 + i).flat().data()); + // deal with scale list + bert_layer_weights_[i].scale_list_.d_scale_list_ = + reinterpret_cast(context->input(3 + num_layer_ * 16 + i).flat().data()); bert_layer_weights_[i].scale_list_.size_ = scale_list_size; - bert_layer_weights_[i].scale_list_.p3_offset_ = ACTIVATION_AMAX_NUM + 9*head_num_*size_per_head_; - bert_layer_weights_[i].scale_list_.p4_offset_ = ACTIVATION_AMAX_NUM + 9*head_num_*size_per_head_ + INT8O_GEMM_NUM; + bert_layer_weights_[i].scale_list_.p3_offset_ = ACTIVATION_AMAX_NUM + 9 * head_num_ * size_per_head_; + bert_layer_weights_[i].scale_list_.p4_offset_ = + ACTIVATION_AMAX_NUM + 9 * head_num_ * size_per_head_ + INT8O_GEMM_NUM; bert_layer_weights_[i].attention_weights.scale_list_ptr = &(bert_layer_weights_[i].scale_list_); bert_layer_weights_[i].ffn_weights.scale_list_ptr = &(bert_layer_weights_[i].scale_list_); - //copy h_scale_list - cudaMemcpy(h_scale_list_ + i*scale_list_size, - bert_layer_weights_[i].scale_list_.d_scale_list_, - sizeof(float)*scale_list_size, cudaMemcpyDeviceToHost); - bert_layer_weights_[i].scale_list_.h_scale_list_ = h_scale_list_ + i*scale_list_size; + // copy h_scale_list + cudaMemcpy(h_scale_list_ + i * scale_list_size, + bert_layer_weights_[i].scale_list_.d_scale_list_, + sizeof(float) * scale_list_size, + cudaMemcpyDeviceToHost); + bert_layer_weights_[i].scale_list_.h_scale_list_ = h_scale_list_ + i * scale_list_size; } set_weight_ = true; } - - ft::AttentionType attention_type = + + ft::AttentionType attention_type = ft::getAttentionTypeINT8(size_per_head_, sm_, remove_padding_, from_seq_len_, int8_mode_); ft::BertINT8 bert = ft::BertINT8(batch_size_, from_seq_len_, @@ -196,9 +215,8 @@ class BertINT8Op: public BaseOp { DataType* out_tensor = reinterpret_cast(output->flat().data()); ft::DataType data_type = ft::getTensorType(); - std::vector input_tensors = std::vector{ - this->convert_tensor(context->input(0)), - this->convert_int_tensor(context->input(2))}; + std::vector input_tensors = std::vector{this->convert_tensor(context->input(0)), + this->convert_int_tensor(context->input(2))}; std::vector output_tensors = std::vector{ ft::Tensor{ft::MEMORY_GPU, @@ -226,7 +244,7 @@ class BertINT8Op: public BaseOp { int sm_; float q_scaling_ = 1.0f; ft::cublasAlgoMap* cublas_algo_map_; - float *h_scale_list_ = nullptr; + float* h_scale_list_ = nullptr; bool set_weight_ = false; typedef TFTraits traits_; typedef typename traits_::DataType DataType; diff --git a/src/fastertransformer/tf_op/bert/BertOp.cc b/src/fastertransformer/tf_op/bert/BertOp.cc index e49dd5c85..12b41f329 100644 --- a/src/fastertransformer/tf_op/bert/BertOp.cc +++ b/src/fastertransformer/tf_op/bert/BertOp.cc @@ -214,11 +214,11 @@ class BertOp: public BaseOp { } catch (std::runtime_error& error) { std::cout << tf::errors::Internal(error.what()); - exit(-1); + ft::FT_CHECK(false); } catch (...) { std::cout << tf::errors::Internal("Runtime error"); - exit(-1); + ft::FT_CHECK(false); } } diff --git a/src/fastertransformer/tf_op/bert/CMakeLists.txt b/src/fastertransformer/tf_op/bert/CMakeLists.txt index c48edf4b4..dfa2ae389 100644 --- a/src/fastertransformer/tf_op/bert/CMakeLists.txt +++ b/src/fastertransformer/tf_op/bert/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/bert/weight_quantize_op.cc b/src/fastertransformer/tf_op/bert/weight_quantize_op.cc index c069fb4ee..93891a111 100644 --- a/src/fastertransformer/tf_op/bert/weight_quantize_op.cc +++ b/src/fastertransformer/tf_op/bert/weight_quantize_op.cc @@ -18,6 +18,10 @@ #include "src/fastertransformer/tf_op/BaseOp.h" #include "src/fastertransformer/utils/convert_data_type.h" +#ifndef CUDART_VERSION +#error CUDART_VERSION Undefined! +#endif + namespace ft = fastertransformer; namespace tf = tensorflow; @@ -67,10 +71,12 @@ void quantization_CUBLASLT_ORDER_COL4_4R2_8C(T* dst, if (per_channel_quantization) { for (int i = 0; i < n; i++) { amaxs[i] = fabs(quant_min[i]); - if (fabs(quant_max[i]) > amaxs[i]) + if (fabs(quant_max[i]) > amaxs[i]) { amaxs[i] = fabs(quant_max[i]); - if (amaxs[i] > amax_in_all) + } + if (amaxs[i] > amax_in_all) { amax_in_all = amaxs[i]; + } } } if (!per_channel_quantization) { @@ -109,10 +115,12 @@ void quantization_CUBLASLT_ORDER_COL32_2R_4R4(T* dst, if (per_channel_quantization) { for (int i = 0; i < n; i++) { amaxs[i] = fabs(quant_min[i]); - if (fabs(quant_max[i]) > amaxs[i]) + if (fabs(quant_max[i]) > amaxs[i]) { amaxs[i] = fabs(quant_max[i]); - if (amaxs[i] > amax_in_all) + } + if (amaxs[i] > amax_in_all) { amax_in_all = amaxs[i]; + } } } if (!per_channel_quantization) { @@ -157,7 +165,7 @@ class WeightQuantizeOp: public BaseOp { { OP_REQUIRES_OK(context, context->GetAttr("per_channel_quantization", &per_channel_quantization_)); use_ORDER_COL32_2R_4R4 = false; -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) int device{-1}; cudaGetDevice(&device); cudaDeviceProp props; @@ -194,12 +202,14 @@ class WeightQuantizeOp: public BaseOp { try { // TODO: accelerate quantizing weight with CUDA kernel & less call of sess.run in python - if (use_ORDER_COL32_2R_4R4) + if (use_ORDER_COL32_2R_4R4) { quantization_CUBLASLT_ORDER_COL32_2R_4R4( transform_out, transform_out2, weight_, quant_max_, quant_min_, n, k, per_channel_quantization_); - else + } + else { quantization_CUBLASLT_ORDER_COL4_4R2_8C( transform_out, transform_out2, weight_, quant_max_, quant_min_, n, k, per_channel_quantization_); + } } catch (std::runtime_error& error) { std::cout << errors::Internal(error.what()); diff --git a/src/fastertransformer/tf_op/decoder/CMakeLists.txt b/src/fastertransformer/tf_op/decoder/CMakeLists.txt index c1c487026..1321bc2c1 100644 --- a/src/fastertransformer/tf_op/decoder/CMakeLists.txt +++ b/src/fastertransformer/tf_op/decoder/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/decoder/DecoderOp.cc b/src/fastertransformer/tf_op/decoder/DecoderOp.cc index 5e4975165..a6e0f7f32 100644 --- a/src/fastertransformer/tf_op/decoder/DecoderOp.cc +++ b/src/fastertransformer/tf_op/decoder/DecoderOp.cc @@ -220,13 +220,17 @@ class DecoderOp: public BaseOp { size_t hidden_units = (size_t)(head_num_ * size_per_head_); ft::DataType data_type = ft::getTensorType(); - std::vector input_tensors = - std::vector{this->convert_tensor(context->input(0)), - this->convert_tensor(context->input(1)), - this->convert_int_tensor(context->input(2)), - ft::Tensor{ft::MEMORY_GPU, ft::TYPE_BOOL, {batch_size}, nullptr}, - ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT32, {1}, &step}, - this->convert_int_tensor(sequence_length_tensor)}; + std::vector input_tensors = std::vector{ + this->convert_tensor(context->input(0)), + this->convert_tensor(context->input(1)), + this->convert_int_tensor(context->input(2)), + ft::Tensor{ft::MEMORY_GPU, ft::TYPE_BOOL, {batch_size}, nullptr}, + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT32, {1}, &step}, + this->convert_int_tensor(sequence_length_tensor), + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + {batch_size, 1, step}, + nullptr}}; // Since we do gather in the Framework, we don't need id of indirection buffer std::vector output_tensors = std::vector{ft::Tensor{ft::MEMORY_GPU, data_type, {batch_size, hidden_units}, out_tensor}, diff --git a/src/fastertransformer/tf_op/decoding/CMakeLists.txt b/src/fastertransformer/tf_op/decoding/CMakeLists.txt index c7ba06fa5..24dfe82e9 100644 --- a/src/fastertransformer/tf_op/decoding/CMakeLists.txt +++ b/src/fastertransformer/tf_op/decoding/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/decoding/DecodingOp.cc b/src/fastertransformer/tf_op/decoding/DecodingOp.cc index 37e20f6de..993f38f6e 100644 --- a/src/fastertransformer/tf_op/decoding/DecodingOp.cc +++ b/src/fastertransformer/tf_op/decoding/DecodingOp.cc @@ -152,6 +152,7 @@ class DecodingOp: public BaseOp { void Compute(tf::OpKernelContext* context) override { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); OP_REQUIRES(context, context->num_inputs() == (num_layer_ * 22) + 8, tf::errors::InvalidArgument("[ERROR] More or Less input arguments")); @@ -331,11 +332,11 @@ class DecodingOp: public BaseOp { } catch (std::runtime_error& error) { std::cout << tf::errors::Internal(error.what()); - exit(-1); + ft::FT_CHECK(false); } catch (...) { - std::cout << tf::errors::Internal("Runtime error"); - exit(-1); + std::cout << tf::errors::Internal("Runtime error") << std::endl; + ft::FT_CHECK(false); } } diff --git a/src/fastertransformer/tf_op/encoder/CMakeLists.txt b/src/fastertransformer/tf_op/encoder/CMakeLists.txt index e01451b10..4f0e2e05b 100644 --- a/src/fastertransformer/tf_op/encoder/CMakeLists.txt +++ b/src/fastertransformer/tf_op/encoder/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/tf_op/gpt/CMakeLists.txt b/src/fastertransformer/tf_op/gpt/CMakeLists.txt index 046ccb1a8..b7c3eee1e 100644 --- a/src/fastertransformer/tf_op/gpt/CMakeLists.txt +++ b/src/fastertransformer/tf_op/gpt/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -13,4 +13,4 @@ # limitations under the License. add_library(tf_gpt SHARED GptOp.cc) -target_link_libraries(tf_gpt PRIVATE ${tf_link} -lcublas -lcublasLt -lcudart Gpt) +target_link_libraries(tf_gpt PRIVATE ${tf_link} -lcublas -lcublasLt -lcudart ParallelGpt) diff --git a/src/fastertransformer/tf_op/gpt/GptOp.cc b/src/fastertransformer/tf_op/gpt/GptOp.cc index 44d88115a..06df93845 100644 --- a/src/fastertransformer/tf_op/gpt/GptOp.cc +++ b/src/fastertransformer/tf_op/gpt/GptOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -15,7 +15,7 @@ * limitations under the License. */ -#include "src/fastertransformer/models/gpt/Gpt.h" +#include "src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.h" #include "src/fastertransformer/tf_op/BaseOp.h" namespace ft = fastertransformer; @@ -65,7 +65,7 @@ REGISTER_OP("Gpt") .Attr("temperature: float") .Attr("len_penalty: float") .Attr("repetition_penalty: float") - .Attr("output_cum_log_probs: bool = false") + .Attr("output_log_probs: bool = false") .Attr("request_output_length: int") .SetShapeFn([](tf::shape_inference::InferenceContext* c) { int beam_width, max_seq_len, request_output_length; @@ -78,19 +78,17 @@ REGISTER_OP("Gpt") // calculate batch size tf::shape_inference::DimensionOrConstant max_seq_dim(max_seq_len); - tf::shape_inference::DimensionOrConstant beam_width_dim(beam_width); - tf::shape_inference::DimensionHandle batchxbeam_dim = c->Dim(c->input(0), 0); - tf::shape_inference::DimensionHandle batch_dim; - TF_RETURN_IF_ERROR(c->Divide(batchxbeam_dim, beam_width_dim, true, &batch_dim)); + tf::shape_inference::DimensionOrConstant beam_dim(beam_width); + tf::shape_inference::DimensionHandle batch_dim = c->Dim(c->input(0), 0); if (beam_width > 1) { - c->set_output(0, c->MakeShape({max_seq_len, batch_dim, beam_width_dim})); - c->set_output(1, c->MakeShape({max_seq_len, batch_dim, beam_width_dim})); - c->set_output(2, c->MakeShape({batch_dim, beam_width_dim})); + c->set_output(0, c->MakeShape({batch_dim, beam_dim, max_seq_len})); + c->set_output(1, c->MakeShape({max_seq_len, batch_dim, beam_dim})); + c->set_output(2, c->MakeShape({batch_dim, beam_dim})); } else { - c->set_output(0, c->MakeShape({max_seq_len, batch_dim})); - c->set_output(1, c->MakeShape({max_seq_len, batch_dim})); + c->set_output(0, c->MakeShape({batch_dim, max_seq_len})); + c->set_output(1, c->MakeShape({max_seq_len, batch_dim, 1})); c->set_output(2, c->MakeShape({batch_dim})); c->set_output(3, c->MakeShape({request_output_length, batch_dim})); } @@ -113,6 +111,14 @@ class TFTraits { typedef half DataType; }; +#ifdef ENABLE_BF16 +template<> +class TFTraits { +public: + typedef __nv_bfloat16 DataType; +}; +#endif + template class GptOp: public BaseOp { public: @@ -134,7 +140,7 @@ class GptOp: public BaseOp { OP_REQUIRES_OK(context, context->GetAttr("temperature", &temperature_)); OP_REQUIRES_OK(context, context->GetAttr("len_penalty", &len_penalty_)); OP_REQUIRES_OK(context, context->GetAttr("repetition_penalty", &repetition_penalty_)); - OP_REQUIRES_OK(context, context->GetAttr("output_cum_log_probs", &output_cum_log_probs_)); + OP_REQUIRES_OK(context, context->GetAttr("output_log_probs", &output_log_probs_)); OP_REQUIRES_OK(context, context->GetAttr("request_output_length", &request_output_length_)); cublas_algo_map_ = new ft::cublasAlgoMap("gemm_config.in"); ft::check_cuda_error(cudaGetDeviceProperties(&prop_, 0)); @@ -155,7 +161,7 @@ class GptOp: public BaseOp { context->num_inputs() == (num_layer_ * 12) + 7, tf::errors::InvalidArgument("[ERROR] More or Less input arguments")); - const size_t batch_size = (size_t)(context->input(0).dim_size(0) / beam_width_); + const size_t batch_size = (size_t)context->input(0).dim_size(0); const size_t vocab_size = (size_t)(context->input(2 + num_layer_ * 12 + 3).dim_size(0)); const size_t max_input_length = (size_t)(context->input(0).dim_size(1)); @@ -173,51 +179,56 @@ class GptOp: public BaseOp { if (std::is_same::value) { cublas_wrapper.setGemmConfig(CUDA_R_16F, CUDA_R_16F, CUDA_R_16F, CUDA_R_32F); } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + cublas_wrapper.setBF16GemmConfig(); + } +#endif else if (std::is_same::value) { cublas_wrapper.setFP32GemmConfig(); } - ft::GptWeight gpt_weidghts; - gpt_weidghts.decoder_layer_weights.resize(num_layer_); + ft::ParallelGptWeight gpt_weidghts; + gpt_weidghts.resizeLayer(num_layer_); for (int i = 0; i < num_layer_; i++) { - this->get_tensor(context, 2 + i, &gpt_weidghts.decoder_layer_weights[i].pre_layernorm_weights.beta); + this->get_tensor(context, 2 + i, &gpt_weidghts.decoder_layer_weights[i]->pre_layernorm_weights.beta); this->get_tensor( - context, 2 + num_layer_ * 1 + i, &gpt_weidghts.decoder_layer_weights[i].pre_layernorm_weights.gamma); + context, 2 + num_layer_ * 1 + i, &gpt_weidghts.decoder_layer_weights[i]->pre_layernorm_weights.gamma); this->get_tensor(context, 2 + num_layer_ * 2 + i, - &gpt_weidghts.decoder_layer_weights[i].self_attention_weights.query_weight.kernel); + &gpt_weidghts.decoder_layer_weights[i]->self_attention_weights.query_weight.kernel); this->get_tensor(context, 2 + num_layer_ * 3 + i, - &gpt_weidghts.decoder_layer_weights[i].self_attention_weights.query_weight.bias); + &gpt_weidghts.decoder_layer_weights[i]->self_attention_weights.query_weight.bias); this->get_tensor( context, 2 + num_layer_ * 4 + i, - &gpt_weidghts.decoder_layer_weights[i].self_attention_weights.attention_output_weight.kernel); + &gpt_weidghts.decoder_layer_weights[i]->self_attention_weights.attention_output_weight.kernel); this->get_tensor( context, 2 + num_layer_ * 5 + i, - &gpt_weidghts.decoder_layer_weights[i].self_attention_weights.attention_output_weight.bias); + &gpt_weidghts.decoder_layer_weights[i]->self_attention_weights.attention_output_weight.bias); this->get_tensor(context, 2 + num_layer_ * 6 + i, - &gpt_weidghts.decoder_layer_weights[i].self_attn_layernorm_weights.beta); + &gpt_weidghts.decoder_layer_weights[i]->self_attn_layernorm_weights.beta); this->get_tensor(context, 2 + num_layer_ * 7 + i, - &gpt_weidghts.decoder_layer_weights[i].self_attn_layernorm_weights.gamma); + &gpt_weidghts.decoder_layer_weights[i]->self_attn_layernorm_weights.gamma); this->get_tensor(context, 2 + num_layer_ * 8 + i, - &gpt_weidghts.decoder_layer_weights[i].ffn_weights.intermediate_weight.kernel); + &gpt_weidghts.decoder_layer_weights[i]->ffn_weights.intermediate_weight.kernel); this->get_tensor(context, 2 + num_layer_ * 9 + i, - &gpt_weidghts.decoder_layer_weights[i].ffn_weights.intermediate_weight.bias); + &gpt_weidghts.decoder_layer_weights[i]->ffn_weights.intermediate_weight.bias); this->get_tensor(context, 2 + num_layer_ * 10 + i, - &gpt_weidghts.decoder_layer_weights[i].ffn_weights.output_weight.kernel); + &gpt_weidghts.decoder_layer_weights[i]->ffn_weights.output_weight.kernel); this->get_tensor(context, 2 + num_layer_ * 11 + i, - &gpt_weidghts.decoder_layer_weights[i].ffn_weights.output_weight.bias); + &gpt_weidghts.decoder_layer_weights[i]->ffn_weights.output_weight.bias); } this->get_tensor(context, 2 + num_layer_ * 12 + 0, &gpt_weidghts.post_decoder_layernorm.beta); @@ -225,27 +236,30 @@ class GptOp: public BaseOp { this->get_tensor(context, 2 + num_layer_ * 12 + 2, &gpt_weidghts.position_encoding_table); this->get_tensor(context, 2 + num_layer_ * 12 + 3, &gpt_weidghts.pre_decoder_embedding_table); this->get_tensor(context, 2 + num_layer_ * 12 + 4, &gpt_weidghts.post_decoder_embedding.kernel); + int total_output_length = request_output_length_ + (int)max_input_length; tf::Tensor* output_id_tensor = nullptr; tf::Tensor* parent_id_tensor = nullptr; tf::Tensor* sequence_length_tensor = nullptr; tf::Tensor* cum_log_probs = nullptr; if (beam_width_ > 1) { - OP_REQUIRES_OK(context, - context->allocate_output( - 0, - {(long long int)max_seq_len_, (long long int)batch_size, (long long int)beam_width_}, - &output_id_tensor)); - OP_REQUIRES_OK(context, - context->allocate_output( - 1, - {(long long int)max_seq_len_, (long long int)batch_size, (long long int)beam_width_}, - &parent_id_tensor)); + OP_REQUIRES_OK( + context, + context->allocate_output( + 0, + {(long long int)batch_size, (long long int)beam_width_, (long long int)total_output_length}, + &output_id_tensor)); + OP_REQUIRES_OK( + context, + context->allocate_output( + 1, + {(long long int)total_output_length, (long long int)batch_size, (long long int)beam_width_}, + &parent_id_tensor)); OP_REQUIRES_OK(context, context->allocate_output( 2, {(long long int)batch_size, (long long int)beam_width_}, &sequence_length_tensor)); - if (this->output_cum_log_probs_) { + if (this->output_log_probs_) { OP_REQUIRES_OK( context, context->allocate_output( @@ -260,12 +274,12 @@ class GptOp: public BaseOp { else { OP_REQUIRES_OK(context, context->allocate_output( - 0, {(long long int)max_seq_len_, (long long int)batch_size}, &output_id_tensor)); + 0, {(long long int)batch_size, (long long int)total_output_length}, &output_id_tensor)); OP_REQUIRES_OK(context, context->allocate_output( - 1, {(long long int)max_seq_len_, (long long int)batch_size}, &parent_id_tensor)); + 1, {(long long int)total_output_length, (long long int)batch_size}, &parent_id_tensor)); OP_REQUIRES_OK(context, context->allocate_output(2, {(long long int)batch_size}, &sequence_length_tensor)); - if (this->output_cum_log_probs_) { + if (this->output_log_probs_) { OP_REQUIRES_OK( context, context->allocate_output( @@ -278,52 +292,90 @@ class GptOp: public BaseOp { int* output_ids = (int*)(output_id_tensor->flat().data()); int* parent_ids = (int*)(parent_id_tensor->flat().data()); int* sequence_length = (int*)(sequence_length_tensor->flat().data()); - int total_output_length = request_output_length_ + (int)max_input_length; - ft::Gpt gpt = ft::Gpt(batch_size, - max_seq_len_, - max_input_length, - beam_width_, - head_num_, - size_per_head_, - inter_size_, - num_layer_, - vocab_size, - start_id_, - end_id_, - beam_search_diversity_rate_, - top_k_, - top_p_, - 0, - temperature_, - len_penalty_, - repetition_penalty_, - stream, - &cublas_wrapper, - &allocator, - false, - &prop_); - - std::vector input_tensors = - std::vector{this->convert_int_tensor(context->input(0)), - this->convert_int_tensor(context->input(1)), - ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT32, {1}, &total_output_length}}; - - std::vector output_tensors = std::vector{ - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_INT32, - {batch_size, (size_t)beam_width_, (size_t)total_output_length}, - output_ids}, - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_INT32, - {(size_t)total_output_length, batch_size, (size_t)beam_width_}, - parent_ids}, - ft::Tensor{ft::MEMORY_GPU, ft::TYPE_INT32, {batch_size, (size_t)beam_width_}, sequence_length}, - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_FP32, - {(size_t)request_output_length_, (size_t)batch_size, (size_t)beam_width_}, - output_cum_log_probs_ ? reinterpret_cast(cum_log_probs->flat().data()) : - nullptr}}; + ft::NcclParam tensor_para; + ft::NcclParam pipeline_para; + + ft::ParallelGpt gpt = ft::ParallelGpt(batch_size, + total_output_length, + max_input_length, + beam_width_, + head_num_, + size_per_head_, + inter_size_, + num_layer_, + vocab_size, + start_id_, + end_id_, + beam_search_diversity_rate_, + top_k_, + top_p_, + 0, + temperature_, + len_penalty_, + repetition_penalty_, + tensor_para, + pipeline_para, + stream, + &cublas_wrapper, + &allocator, + false, + &prop_, + false, + 0); + + std::unordered_map input_tensors = std::unordered_map{ + {"input_ids", this->convert_int_tensor(context->input(0))}, + {"input_lengths", this->convert_int_tensor(context->input(1))}, + {"max_output_seq_len", + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT32, std::vector{1}, &total_output_length}}}; + if (top_k_ == 0 && top_p_ == 0.0f) { + ft::FT_CHECK(beam_width_ > 1); + input_tensors.insert( + {"beam_search_diversity_rate", + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &beam_search_diversity_rate_}}); + } + else { + if (top_p_ != 0.0f) { + input_tensors.insert( + {"runtime_top_p", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &top_p_}}); + } + if (top_k_ != 0) { + input_tensors.insert( + {"runtime_top_k", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT32, std::vector{1}, &top_k_}}); + } + } + input_tensors.insert( + {"temperature", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &temperature_}}); + input_tensors.insert( + {"len_penalty", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &len_penalty_}}); + input_tensors.insert({"repetition_penalty", + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &repetition_penalty_}}); + uint64_t random_seed = 0; + input_tensors.insert( + {"random_seed", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_UINT64, std::vector{1}, &random_seed}}); + + std::unordered_map output_tensors = std::unordered_map{ + {"output_ids", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{batch_size, (size_t)beam_width_, (size_t)total_output_length}, + output_ids}}, + {"parent_ids", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{(size_t)total_output_length, batch_size, (size_t)beam_width_}, + parent_ids}}, + {"sequence_length", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{batch_size, (size_t)beam_width_}, + sequence_length}}, + {"output_log_probs", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_FP32, + {(size_t)request_output_length_, (size_t)batch_size, (size_t)beam_width_}, + output_log_probs_ ? reinterpret_cast(cum_log_probs->flat().data()) : nullptr}}}; try { gpt.forward(&output_tensors, &input_tensors, &gpt_weidghts); @@ -348,7 +400,7 @@ class GptOp: public BaseOp { float repetition_penalty_; int top_k_ = 0; float top_p_ = 0.0f; - bool output_cum_log_probs_; + bool output_log_probs_; int request_output_length_; ft::cublasAlgoMap* cublas_algo_map_; struct cudaDeviceProp prop_; diff --git a/src/fastertransformer/th_op/CMakeLists.txt b/src/fastertransformer/th_op/CMakeLists.txt index 85eb6fe70..138b2d0a3 100644 --- a/src/fastertransformer/th_op/CMakeLists.txt +++ b/src/fastertransformer/th_op/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -25,8 +25,10 @@ add_subdirectory(decoder) add_subdirectory(decoding) add_subdirectory(gpt) add_subdirectory(longformer) +add_subdirectory(swin) +add_subdirectory(vit) -if(BUILD_GPT) - add_subdirectory(t5) +if(BUILD_MULTI_GPU) add_subdirectory(multi_gpu_gpt) + add_subdirectory(t5) endif() diff --git a/src/fastertransformer/th_op/bert/BertINT8Op.cc b/src/fastertransformer/th_op/bert/BertINT8Op.cc index d620673b2..cf6de4190 100644 --- a/src/fastertransformer/th_op/bert/BertINT8Op.cc +++ b/src/fastertransformer/th_op/bert/BertINT8Op.cc @@ -17,33 +17,34 @@ #include "src/fastertransformer/th_op/bert/BertINT8Op.h" namespace th = torch; + namespace torch_ext { FasterTransformerINT8Bert::FasterTransformerINT8Bert(th::Tensor q_kernel, - th::Tensor q_bias, - th::Tensor k_kernel, - th::Tensor k_bias, - th::Tensor v_kernel, - th::Tensor v_bias, - th::Tensor attr_output_kernel, - th::Tensor attr_output_bias, - th::Tensor attr_output_layernorm_gamma, - th::Tensor attr_output_layernorm_beta, - th::Tensor inter_kernel, - th::Tensor inter_bias, - th::Tensor output_kernel, - th::Tensor output_bias, - th::Tensor output_layernorm_gamma, - th::Tensor output_layernorm_beta, - th::Tensor d_scale_list, - th::Tensor h_scale_list, - int64_t head_num, - int64_t head_size, - bool remove_padding, - int64_t layer_num, - int64_t int8_mode, - bool sparse, - double q_scaling): + th::Tensor q_bias, + th::Tensor k_kernel, + th::Tensor k_bias, + th::Tensor v_kernel, + th::Tensor v_bias, + th::Tensor attr_output_kernel, + th::Tensor attr_output_bias, + th::Tensor attr_output_layernorm_gamma, + th::Tensor attr_output_layernorm_beta, + th::Tensor inter_kernel, + th::Tensor inter_bias, + th::Tensor output_kernel, + th::Tensor output_bias, + th::Tensor output_layernorm_gamma, + th::Tensor output_layernorm_beta, + th::Tensor d_scale_list, + th::Tensor h_scale_list, + int64_t head_num, + int64_t head_size, + bool remove_padding, + int64_t layer_num, + int64_t int8_mode, + bool sparse, + double q_scaling): _st(q_kernel.scalar_type()), _remove_padding(remove_padding), weights{q_kernel, @@ -176,28 +177,28 @@ static auto fasterTransformerINT8BertTHS = bool sparse = (bool)(state[18][5].item().to()); double q_scaling = state[19][0].item().to(); return c10::make_intrusive(state[0], - state[1], - state[2], - state[3], - state[4], - state[5], - state[6], - state[7], - state[8], - state[9], - state[10], - state[11], - state[12], - state[13], - state[14], - state[15], - state[16], - state[17], - head_num, - head_size, - remove_padding, - layer_num, - int8_mode, - sparse, - q_scaling); + state[1], + state[2], + state[3], + state[4], + state[5], + state[6], + state[7], + state[8], + state[9], + state[10], + state[11], + state[12], + state[13], + state[14], + state[15], + state[16], + state[17], + head_num, + head_size, + remove_padding, + layer_num, + int8_mode, + sparse, + q_scaling); }); diff --git a/src/fastertransformer/th_op/bert/BertINT8Op.h b/src/fastertransformer/th_op/bert/BertINT8Op.h index ea01ad369..e440b2768 100644 --- a/src/fastertransformer/th_op/bert/BertINT8Op.h +++ b/src/fastertransformer/th_op/bert/BertINT8Op.h @@ -15,19 +15,12 @@ */ #include "src/fastertransformer/models/bert_int8/BertINT8.h" - -#include -#include -#include -#include - -#include "torch/csrc/cuda/Stream.h" -#include -#include - -#include "src/fastertransformer/th_op/th_traits.h" #include "src/fastertransformer/th_op/th_utils.h" +#ifndef CUDART_VERSION +#error CUDART_VERSION Undefined! +#endif + namespace ft = fastertransformer; namespace th = torch; namespace torch_ext { @@ -62,11 +55,12 @@ class FTBertINT8: public IFBertINT8 { _sparse(sparse) { #ifndef SPARSITY_ENABLED - if (sparse) + if (sparse) { std::cout << "[WARNING] Sparsity support is not enabled. Will use dense GEMM instead.\n" << std::flush; + } #endif int hidden_dim = _head_num * _head_size; - check_cuda_error(cublasLtCreate(&_cublasltHandle)); + ft::check_cuda_error(cublasLtCreate(&_cublasltHandle)); sm_ = ft::getSMVersion(); #ifdef SPARSITY_ENABLED if (sparse) { @@ -74,7 +68,7 @@ class FTBertINT8: public IFBertINT8 { } #endif _use_ORDER_COL32_2R_4R4 = false; -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) if (sm_ >= 80) { _use_ORDER_COL32_2R_4R4 = true; } @@ -173,8 +167,8 @@ class FTBertINT8: public IFBertINT8 { _cublasltHandle, stream, cublas_algo_map_, cublas_wrapper_mutex_, _use_ORDER_COL32_2R_4R4); #endif - fastertransformer::Allocator* allocator = - new fastertransformer::Allocator(); + fastertransformer::Allocator* allocator = + new fastertransformer::Allocator(); ft::AttentionType attention_type = ft::getAttentionTypeINT8(_head_size, sm_, removing_padding, seq_len, _int8_mode); @@ -200,8 +194,10 @@ class FTBertINT8: public IFBertINT8 { data_type, std::vector{(size_t)batch_size, (size_t)seq_len, (size_t)(_head_num * _head_size)}, get_ptr(input)}, - ft::Tensor{ - ft::MEMORY_GPU, ft::TYPE_INT32, std::vector{(size_t)batch_size}, get_ptr(sequence_lengths)}}; + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{(size_t)batch_size}, + get_ptr(sequence_lengths)}}; std::vector output_tensors = std::vector{ ft::Tensor{ft::MEMORY_GPU, diff --git a/src/fastertransformer/th_op/bert/BertOp.h b/src/fastertransformer/th_op/bert/BertOp.h index 43c7e279d..2c6aaca57 100644 --- a/src/fastertransformer/th_op/bert/BertOp.h +++ b/src/fastertransformer/th_op/bert/BertOp.h @@ -15,18 +15,6 @@ */ #include "src/fastertransformer/models/bert/Bert.h" - -#include -#include -#include -#include - -#include "torch/csrc/cuda/Stream.h" -#include -#include -#include - -#include "src/fastertransformer/th_op/th_traits.h" #include "src/fastertransformer/th_op/th_utils.h" namespace ft = fastertransformer; @@ -63,11 +51,12 @@ class FTBert: public IFBert { _q_scaling(q_scaling) { #ifndef SPARSITY_ENABLED - if (sparse) + if (sparse) { std::cout << "[WARNING] Sparsity support is not enabled. Will use dense GEMM instead.\n" << std::flush; + } #endif int hidden_dim = _head_num * _head_size; - check_cuda_error(cublasLtCreate(&_cublasltHandle)); + ft::check_cuda_error(cublasLtCreate(&_cublasltHandle)); sm_ = ft::getSMVersion(); #ifdef SPARSITY_ENABLED if (sparse) { @@ -83,13 +72,16 @@ class FTBert: public IFBert { for (int i = 0; i < _layer_num; i++) { bert_weights.bert_layer_weights[i].attention_weights.query_weight.kernel = get_ptr(_weights[0]) + hidden_dim * hidden_dim * i; - bert_weights.bert_layer_weights[i].attention_weights.query_weight.bias = get_ptr(_weights[1]) + hidden_dim * i; + bert_weights.bert_layer_weights[i].attention_weights.query_weight.bias = + get_ptr(_weights[1]) + hidden_dim * i; bert_weights.bert_layer_weights[i].attention_weights.key_weight.kernel = get_ptr(_weights[2]) + hidden_dim * hidden_dim * i; - bert_weights.bert_layer_weights[i].attention_weights.key_weight.bias = get_ptr(_weights[3]) + hidden_dim * i; + bert_weights.bert_layer_weights[i].attention_weights.key_weight.bias = + get_ptr(_weights[3]) + hidden_dim * i; bert_weights.bert_layer_weights[i].attention_weights.value_weight.kernel = get_ptr(_weights[4]) + hidden_dim * hidden_dim * i; - bert_weights.bert_layer_weights[i].attention_weights.value_weight.bias = get_ptr(_weights[5]) + hidden_dim * i; + bert_weights.bert_layer_weights[i].attention_weights.value_weight.bias = + get_ptr(_weights[5]) + hidden_dim * i; bert_weights.bert_layer_weights[i].attention_weights.attention_output_weight.kernel = get_ptr(_weights[6]) + hidden_dim * hidden_dim * i; bert_weights.bert_layer_weights[i].attention_weights.attention_output_weight.bias = @@ -98,10 +90,12 @@ class FTBert: public IFBert { bert_weights.bert_layer_weights[i].attn_layernorm_weights.beta = get_ptr(_weights[9]) + hidden_dim * i; bert_weights.bert_layer_weights[i].ffn_weights.intermediate_weight.kernel = get_ptr(_weights[10]) + hidden_dim * hidden_dim * 4 * i; - bert_weights.bert_layer_weights[i].ffn_weights.intermediate_weight.bias = get_ptr(_weights[11]) + hidden_dim * 4 * i; + bert_weights.bert_layer_weights[i].ffn_weights.intermediate_weight.bias = + get_ptr(_weights[11]) + hidden_dim * 4 * i; bert_weights.bert_layer_weights[i].ffn_weights.output_weight.kernel = get_ptr(_weights[12]) + hidden_dim * hidden_dim * 4 * i; - bert_weights.bert_layer_weights[i].ffn_weights.output_weight.bias = get_ptr(_weights[13]) + hidden_dim * i; + bert_weights.bert_layer_weights[i].ffn_weights.output_weight.bias = + get_ptr(_weights[13]) + hidden_dim * i; bert_weights.bert_layer_weights[i].ffn_layernorm_weights.gamma = get_ptr(_weights[14]) + hidden_dim * i; bert_weights.bert_layer_weights[i].ffn_layernorm_weights.beta = get_ptr(_weights[15]) + hidden_dim * i; } @@ -146,8 +140,7 @@ class FTBert: public IFBert { auto stream = at::cuda::getCurrentCUDAStream().stream(); cublasHandle_t _cublasHandle = at::cuda::getCurrentCUDABlasHandle(); cublasSetStream(_cublasHandle, stream); - fastertransformer::Allocator* allocator = - new fastertransformer::Allocator(); + ft::Allocator* allocator = new ft::Allocator(); ft::cublasMMWrapper* cublas_wrapper = #ifdef SPARSITY_ENABLED new ft::cublasMMWrapper(_cublasHandle, diff --git a/src/fastertransformer/th_op/bert/CMakeLists.txt b/src/fastertransformer/th_op/bert/CMakeLists.txt index bb74e2052..a2068642d 100644 --- a/src/fastertransformer/th_op/bert/CMakeLists.txt +++ b/src/fastertransformer/th_op/bert/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/bert/WeightQuantizeOp.cc b/src/fastertransformer/th_op/bert/WeightQuantizeOp.cc index d54d9f46e..cd065a1fc 100644 --- a/src/fastertransformer/th_op/bert/WeightQuantizeOp.cc +++ b/src/fastertransformer/th_op/bert/WeightQuantizeOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -14,88 +14,84 @@ * limitations under the License. */ -#include -#include "torch/csrc/cuda/Stream.h" -#include -#include -#include "src/fastertransformer/utils/cuda_utils.h" -#include "src/fastertransformer/th_op/th_traits.h" -#include "src/fastertransformer/th_op/th_utils.h" #include "src/fastertransformer/kernels/quantize_weight.h" +#include "src/fastertransformer/th_op/th_utils.h" +#ifndef CUDART_VERSION +#error CUDART_VERSION Undefined! +#endif #ifdef SPARSITY_ENABLED namespace { void compressInt8Matrix(void* output, const void* input, const int m, const int k, cudaStream_t stream) { - cusparseLtHandle_t _cusparseLtHandle; - CHECK_CUSPARSE(cusparseLtInit(&_cusparseLtHandle)); - cusparseLtMatDescriptor_t matA; - unsigned alignment = 16; - CHECK_CUSPARSE( cusparseLtStructuredDescriptorInit( - &_cusparseLtHandle, &matA, m, - k, k, alignment, - CUDA_R_8I, CUSPARSE_ORDER_ROW, - CUSPARSELT_SPARSITY_50_PERCENT) ) - CHECK_CUSPARSE( cusparseLtSpMMACompress2(&_cusparseLtHandle, &matA, true, CUSPARSE_OPERATION_NON_TRANSPOSE, input, output, stream) ) - cusparseLtDestroy(&_cusparseLtHandle); + cusparseLtHandle_t _cusparseLtHandle; + CHECK_CUSPARSE(cusparseLtInit(&_cusparseLtHandle)); + cusparseLtMatDescriptor_t matA; + unsigned alignment = 16; + CHECK_CUSPARSE(cusparseLtStructuredDescriptorInit( + &_cusparseLtHandle, &matA, m, k, k, alignment, CUDA_R_8I, CUSPARSE_ORDER_ROW, CUSPARSELT_SPARSITY_50_PERCENT)) + CHECK_CUSPARSE(cusparseLtSpMMACompress2( + &_cusparseLtHandle, &matA, true, CUSPARSE_OPERATION_NON_TRANSPOSE, input, output, stream)) + cusparseLtDestroy(&_cusparseLtHandle); } -} // namespace +} // namespace #endif - -namespace torch_ext -{ +namespace torch_ext { using torch::Tensor; -Tensor weight_quantize(Tensor weight, Tensor quant_max, bool sparse) { - bool use_ORDER_COL32_2R_4R4 = false; -#ifdef CUDA11_MODE - int device{-1}; - cudaGetDevice(&device); - cudaDeviceProp props; - cudaGetDeviceProperties(&props, device); - if (props.major * 10 + props.minor >= 80){ - use_ORDER_COL32_2R_4R4 = true; - } +Tensor weight_quantize(Tensor weight, Tensor quant_max, bool sparse) +{ + bool use_ORDER_COL32_2R_4R4 = false; +#if (CUDART_VERSION >= 11000) + int device{-1}; + cudaGetDevice(&device); + cudaDeviceProp props; + cudaGetDeviceProperties(&props, device); + if (props.major * 10 + props.minor >= 80) { + use_ORDER_COL32_2R_4R4 = true; + } #endif - CHECK_TH_CUDA(weight); CHECK_TH_CUDA(weight); - TORCH_CHECK(weight.dtype()==torch::kFloat32, "weight dtype should be float32"); - TORCH_CHECK(weight.numel()!=0, "weight should not be empty tensor"); - TORCH_CHECK(weight.dim()==2, "Invalid rank. The rank of weight should be 2"); + CHECK_TH_CUDA(weight); + CHECK_TH_CUDA(weight); + TORCH_CHECK(weight.dtype() == torch::kFloat32, "weight dtype should be float32"); + TORCH_CHECK(weight.numel() != 0, "weight should not be empty tensor"); + TORCH_CHECK(weight.dim() == 2, "Invalid rank. The rank of weight should be 2"); - int k = weight.size(0); - int n = weight.size(1); + int k = weight.size(0); + int n = weight.size(1); - CHECK_TH_CUDA(quant_max); CHECK_TH_CUDA(quant_max); - TORCH_CHECK(quant_max.dtype()==torch::kFloat32, "quant_max dtype should be float32"); - TORCH_CHECK(quant_max.numel()==n, "quant_max wrong shape"); + CHECK_TH_CUDA(quant_max); + CHECK_TH_CUDA(quant_max); + TORCH_CHECK(quant_max.dtype() == torch::kFloat32, "quant_max dtype should be float32"); + TORCH_CHECK(quant_max.numel() == n, "quant_max wrong shape"); - const float* weight_ = get_ptr(weight); - const float* quant_max_ = get_ptr(quant_max); + const float* weight_ = get_ptr(weight); + const float* quant_max_ = get_ptr(quant_max); - auto output = torch::empty({k * n}, torch::dtype(torch::kFloat16).device(torch::kCUDA).requires_grad(false)); - int8_t* transform_out = get_ptr(output); + auto output = torch::empty({k * n}, torch::dtype(torch::kFloat16).device(torch::kCUDA).requires_grad(false)); + int8_t* transform_out = get_ptr(output); - auto stream = at::cuda::getCurrentCUDAStream().stream(); + auto stream = at::cuda::getCurrentCUDAStream().stream(); #ifdef SPARSITY_ENABLED - if (sparse) { - int format = 0; - auto tmp = torch::empty({k * n}, torch::dtype(torch::kInt8).device(torch::kCUDA).requires_grad(false)); - int8_t* tmp_out = get_ptr(tmp); - invokeQuantizeWeight(tmp_out, weight_, quant_max_, n, k, format, stream); - compressInt8Matrix(transform_out, tmp_out, n, k, stream); - return output; - } + if (sparse) { + int format = 0; + auto tmp = torch::empty({k * n}, torch::dtype(torch::kInt8).device(torch::kCUDA).requires_grad(false)); + int8_t* tmp_out = get_ptr(tmp); + fastertransformer::invokeQuantizeWeight(tmp_out, weight_, quant_max_, n, k, format, stream); + compressInt8Matrix(transform_out, tmp_out, n, k, stream); + return output; + } #endif - int format = use_ORDER_COL32_2R_4R4 ? 1 : 2; - invokeQuantizeWeight(transform_out, weight_, quant_max_, n, k, format, stream); - return output; + int format = use_ORDER_COL32_2R_4R4 ? 1 : 2; + fastertransformer::invokeQuantizeWeight(transform_out, weight_, quant_max_, n, k, format, stream); + return output; } -} //namespace torch_ext +} // namespace torch_ext static auto weight_quantize = - torch::RegisterOperators("fastertransformer::weight_quantize", &torch_ext::weight_quantize); + torch::RegisterOperators("fastertransformer::weight_quantize", &torch_ext::weight_quantize); diff --git a/src/fastertransformer/th_op/decoder/CMakeLists.txt b/src/fastertransformer/th_op/decoder/CMakeLists.txt index 91aa61d89..bb0d3940f 100644 --- a/src/fastertransformer/th_op/decoder/CMakeLists.txt +++ b/src/fastertransformer/th_op/decoder/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/decoder/DecoderOp.h b/src/fastertransformer/th_op/decoder/DecoderOp.h index 2e78ead35..032992596 100644 --- a/src/fastertransformer/th_op/decoder/DecoderOp.h +++ b/src/fastertransformer/th_op/decoder/DecoderOp.h @@ -15,18 +15,6 @@ */ #include "src/fastertransformer/models/decoder/Decoder.h" - -#include -#include -#include -#include - -#include "torch/csrc/cuda/Stream.h" -#include -#include -#include - -#include "src/fastertransformer/th_op/th_traits.h" #include "src/fastertransformer/th_op/th_utils.h" namespace ft = fastertransformer; @@ -66,7 +54,7 @@ class FTDecoder: public IFDecoder { _mem_hidden_dim(mem_hidden_dim) { int hidden_dim = _head_num * _head_size; - check_cuda_error(cublasLtCreate(&_cublasltHandle)); + ft::check_cuda_error(cublasLtCreate(&_cublasltHandle)); cublas_algo_map_ = new ft::cublasAlgoMap("gemm_config.in"); cublas_wrapper_mutex_ = new std::mutex(); @@ -135,8 +123,7 @@ class FTDecoder: public IFDecoder { auto stream = at::cuda::getCurrentCUDAStream().stream(); cublasHandle_t _cublasHandle = at::cuda::getCurrentCUDABlasHandle(); cublasSetStream(_cublasHandle, stream); - fastertransformer::Allocator* allocator = - new fastertransformer::Allocator(); + ft::Allocator* allocator = new ft::Allocator(); ft::cublasMMWrapper* cublas_wrapper = new ft::cublasMMWrapper( _cublasHandle, _cublasltHandle, stream, cublas_algo_map_, cublas_wrapper_mutex_, allocator); @@ -147,17 +134,21 @@ class FTDecoder: public IFDecoder { cublas_wrapper->setFP32GemmConfig(); } - ft::Decoder decoder = ft::Decoder( + ft::Decoder* decoder = new ft::Decoder( batch_size, _head_num, _head_size, _inter_size, _layer_num, stream, cublas_wrapper, allocator, true); int tmp_step = step + 1; - std::vector input_tensors = - std::vector{convert_tensor(from_tensor), - convert_tensor(memory_tensor), - convert_tensor(memory_sequence_length), - ft::Tensor{ft::MEMORY_GPU, ft::TYPE_BOOL, {batch_size}, nullptr}, - ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT32, {1}, &tmp_step}, - convert_tensor(sequence_length)}; + std::vector input_tensors = std::vector{ + convert_tensor(from_tensor), + convert_tensor(memory_tensor), + convert_tensor(memory_sequence_length), + ft::Tensor{ft::MEMORY_GPU, ft::TYPE_BOOL, {batch_size}, nullptr}, + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT32, {1}, &tmp_step}, + convert_tensor(sequence_length), + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + {batch_size, 1, (size_t)tmp_step}, + nullptr}}; // Since we do gather in the Framework, we don't need id of indirection buffer std::vector output_tensors = std::vector{convert_tensor(output_tensor), convert_tensor(self_cache_keys_tensor), @@ -166,7 +157,7 @@ class FTDecoder: public IFDecoder { convert_tensor(memory_cache_values_tensor)}; try { - decoder.forward(&output_tensors, &input_tensors, &decoder_layer_weights); + decoder->forward(&output_tensors, &input_tensors, &decoder_layer_weights); } catch (std::runtime_error& error) { std::cout << error.what(); @@ -176,6 +167,7 @@ class FTDecoder: public IFDecoder { std::cout << "Runtime error"; exit(-1); } + delete decoder; delete cublas_wrapper; delete allocator; } diff --git a/src/fastertransformer/th_op/decoding/CMakeLists.txt b/src/fastertransformer/th_op/decoding/CMakeLists.txt index f8889c641..9abedc337 100644 --- a/src/fastertransformer/th_op/decoding/CMakeLists.txt +++ b/src/fastertransformer/th_op/decoding/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/decoding/DecodingOp.cc b/src/fastertransformer/th_op/decoding/DecodingOp.cc index 593861478..ba064c0ec 100644 --- a/src/fastertransformer/th_op/decoding/DecodingOp.cc +++ b/src/fastertransformer/th_op/decoding/DecodingOp.cc @@ -161,7 +161,10 @@ FasterTransformerDecoding::~FasterTransformerDecoding() delete ftdecoding; } -std::vector FasterTransformerDecoding::forward(int64_t beam_width, int64_t max_seq_len, th::Tensor memory, th::Tensor memory_seq_lens) +std::vector FasterTransformerDecoding::forward(int64_t beam_width, + int64_t max_seq_len, + th::Tensor memory, + th::Tensor memory_seq_lens) { CHECK_INPUT(memory, _st); CHECK_TH_CUDA(memory_seq_lens); @@ -175,7 +178,8 @@ std::vector FasterTransformerDecoding::forward(int64_t beam_width, i torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); auto out_seq_lens = torch::empty({batch_size * beam_width}, torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); - ftdecoding->forward((size_t)beam_width, (size_t)max_seq_len, memory, memory_seq_lens, output_ids, parent_ids, out_seq_lens); + ftdecoding->forward( + (size_t)beam_width, (size_t)max_seq_len, memory, memory_seq_lens, output_ids, parent_ids, out_seq_lens); return std::vector{output_ids, parent_ids, out_seq_lens}; } diff --git a/src/fastertransformer/th_op/decoding/DecodingOp.h b/src/fastertransformer/th_op/decoding/DecodingOp.h index 9a6580f59..5b45581e0 100644 --- a/src/fastertransformer/th_op/decoding/DecodingOp.h +++ b/src/fastertransformer/th_op/decoding/DecodingOp.h @@ -14,18 +14,7 @@ * limitations under the License. */ -#include -#include -#include -#include - -#include "torch/csrc/cuda/Stream.h" -#include -#include -#include - #include "src/fastertransformer/models/decoding/Decoding.h" -#include "src/fastertransformer/th_op/th_traits.h" #include "src/fastertransformer/th_op/th_utils.h" namespace ft = fastertransformer; @@ -79,7 +68,7 @@ class FTDecoding: public IFTDecoding { repetition_penalty_(repetition_penalty), _weights(w) { - check_cuda_error(cublasLtCreate(&cublasltHandle_)); + ft::check_cuda_error(cublasLtCreate(&cublasltHandle_)); cublas_algo_map_ = new ft::cublasAlgoMap("gemm_config.in"); cublas_wrapper_mutex_ = new std::mutex(); @@ -160,9 +149,9 @@ class FTDecoding: public IFTDecoding { auto stream = at::cuda::getCurrentCUDAStream().stream(); cublasHandle_t cublasHandle = at::cuda::getCurrentCUDABlasHandle(); cublasSetStream(cublasHandle, stream); - ft::Allocator allocator = ft::Allocator(); - ft::cublasMMWrapper cublas_wrapper = - ft::cublasMMWrapper(cublasHandle, cublasltHandle_, stream, cublas_algo_map_, cublas_wrapper_mutex_, &allocator); + ft::Allocator allocator = ft::Allocator(); + ft::cublasMMWrapper cublas_wrapper = ft::cublasMMWrapper( + cublasHandle, cublasltHandle_, stream, cublas_algo_map_, cublas_wrapper_mutex_, &allocator); if (std::is_same::value) { cublas_wrapper.setFP16GemmConfig(); @@ -198,24 +187,28 @@ class FTDecoding: public IFTDecoding { &prop_); ft::DataType data_type = ft::getTensorType(); std::vector input_tensors = std::vector{ - ft::Tensor{MEMORY_GPU, + ft::Tensor{ft::MEMORY_GPU, data_type, std::vector{(size_t)memory.size(0), (size_t)memory.size(1), (size_t)memory.size(2)}, get_ptr(memory)}, - ft::Tensor{ - MEMORY_GPU, TYPE_INT32, std::vector{(size_t)memory_seq_lens.size(0)}, get_ptr(memory_seq_lens)}}; + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{(size_t)memory_seq_lens.size(0)}, + get_ptr(memory_seq_lens)}}; - std::vector output_tensors = std::vector{ - ft::Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{max_seq_len, batch_size, beam_width}, - get_ptr(output_ids)}, - ft::Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{max_seq_len, batch_size, beam_width}, - get_ptr(parent_ids)}, - ft::Tensor{ - MEMORY_GPU, TYPE_INT32, std::vector{batch_size, beam_width}, get_ptr(sequence_lengths)}}; + std::vector output_tensors = + std::vector{ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{max_seq_len, batch_size, beam_width}, + get_ptr(output_ids)}, + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{max_seq_len, batch_size, beam_width}, + get_ptr(parent_ids)}, + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{batch_size, beam_width}, + get_ptr(sequence_lengths)}}; decoding.forward(&output_tensors, &input_tensors, &decoding_weights); } diff --git a/src/fastertransformer/th_op/decoding/GatherTreeOp.cc b/src/fastertransformer/th_op/decoding/GatherTreeOp.cc index 0b08c2892..24925d48d 100644 --- a/src/fastertransformer/th_op/decoding/GatherTreeOp.cc +++ b/src/fastertransformer/th_op/decoding/GatherTreeOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -19,7 +19,8 @@ namespace th = torch; namespace torch_ext { -th::Tensor gather_tree(th::Tensor step_ids, th::Tensor parent_ids, th::Tensor max_sequence_lengths, int64_t end_token) +th::Tensor +gather_tree(th::Tensor step_ids, th::Tensor parent_ids, th::Tensor max_sequence_lengths, th::Tensor end_tokens) { CHECK_TH_CUDA(step_ids); CHECK_CONTIGUOUS(step_ids); @@ -43,7 +44,7 @@ th::Tensor gather_tree(th::Tensor step_ids, th::Tensor parent_ids, th::Tensor ma beam_width, torch_ext::get_ptr(step_ids), torch_ext::get_ptr(parent_ids), - end_token, + torch_ext::get_ptr(end_tokens), stream); return beams; diff --git a/src/fastertransformer/th_op/decoding/GatherTreeOp.h b/src/fastertransformer/th_op/decoding/GatherTreeOp.h index 9c8eddaae..4a8ed5f6c 100644 --- a/src/fastertransformer/th_op/decoding/GatherTreeOp.h +++ b/src/fastertransformer/th_op/decoding/GatherTreeOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -14,24 +14,14 @@ * limitations under the License. */ -#include -#include -#include -#include - -#include "torch/csrc/cuda/Stream.h" -#include -#include -#include - #include "src/fastertransformer/kernels/decoding_kernels.h" -#include "src/fastertransformer/th_op/th_traits.h" #include "src/fastertransformer/th_op/th_utils.h" namespace th = torch; namespace torch_ext { -th::Tensor gather_tree(th::Tensor step_ids, th::Tensor parent_ids, th::Tensor max_sequence_lengths, int64_t end_token); +th::Tensor +gather_tree(th::Tensor step_ids, th::Tensor parent_ids, th::Tensor max_sequence_lengths, th::Tensor end_tokens); } // namespace torch_ext \ No newline at end of file diff --git a/src/fastertransformer/th_op/encoder/CMakeLists.txt b/src/fastertransformer/th_op/encoder/CMakeLists.txt index 9f0a56622..7f2732a1f 100644 --- a/src/fastertransformer/th_op/encoder/CMakeLists.txt +++ b/src/fastertransformer/th_op/encoder/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/encoder/EncoderOp.h b/src/fastertransformer/th_op/encoder/EncoderOp.h index caf3f0a3d..4331c36da 100644 --- a/src/fastertransformer/th_op/encoder/EncoderOp.h +++ b/src/fastertransformer/th_op/encoder/EncoderOp.h @@ -15,18 +15,6 @@ */ #include "src/fastertransformer/models/bert/Bert.h" - -#include -#include -#include -#include - -#include "torch/csrc/cuda/Stream.h" -#include -#include -#include - -#include "src/fastertransformer/th_op/th_traits.h" #include "src/fastertransformer/th_op/th_utils.h" namespace ft = fastertransformer; @@ -64,11 +52,12 @@ class FTEncoder: public IFEncoder { _q_scaling(q_scaling) { #ifndef SPARSITY_ENABLED - if (sparse) + if (sparse) { std::cout << "[WARNING] Sparsity support is not enabled. Will use dense GEMM instead.\n" << std::flush; + } #endif int hidden_dim = _head_num * _head_size; - check_cuda_error(cublasLtCreate(&_cublasltHandle)); + ft::check_cuda_error(cublasLtCreate(&_cublasltHandle)); sm_ = ft::getSMVersion(); #ifdef SPARSITY_ENABLED if (sparse) { @@ -158,8 +147,7 @@ class FTEncoder: public IFEncoder { auto stream = at::cuda::getCurrentCUDAStream().stream(); cublasHandle_t _cublasHandle = at::cuda::getCurrentCUDABlasHandle(); cublasSetStream(_cublasHandle, stream); - fastertransformer::Allocator* allocator = - new fastertransformer::Allocator(); + ft::Allocator* allocator = new ft::Allocator(); ft::cublasMMWrapper* cublas_wrapper = #ifdef SPARSITY_ENABLED new ft::cublasMMWrapper(_cublasHandle, diff --git a/src/fastertransformer/th_op/gpt/CMakeLists.txt b/src/fastertransformer/th_op/gpt/CMakeLists.txt index 05a163a72..9df633602 100644 --- a/src/fastertransformer/th_op/gpt/CMakeLists.txt +++ b/src/fastertransformer/th_op/gpt/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -13,4 +13,4 @@ # limitations under the License. add_library(th_gpt SHARED GptOp.cc) -target_link_libraries(th_gpt PRIVATE "${TORCH_LIBRARIES}" Gpt th_utils) +target_link_libraries(th_gpt PRIVATE "${TORCH_LIBRARIES}" ParallelGpt th_utils) diff --git a/src/fastertransformer/th_op/gpt/GptOp.cc b/src/fastertransformer/th_op/gpt/GptOp.cc index e4d627f55..8690a8b9d 100644 --- a/src/fastertransformer/th_op/gpt/GptOp.cc +++ b/src/fastertransformer/th_op/gpt/GptOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -19,23 +19,13 @@ namespace th = torch; namespace torch_ext { -GptOp::GptOp(const int64_t max_batch_size, - const int64_t max_seq_len, - const int64_t beam_width, - const int64_t head_num, +GptOp::GptOp(const int64_t head_num, const int64_t size_per_head, const int64_t inter_size, const int64_t layer_num, const int64_t vocab_size, const int64_t start_id, const int64_t end_id, - const double beam_search_diversity_rate, - const int64_t top_k, - const double top_p, - const unsigned long long random_seed, - const double temperature, - const double len_penalty, - const double repetition_penalty, const bool sparse, const std::vector weights): st_(weights[0].scalar_type()) @@ -46,47 +36,40 @@ GptOp::GptOp(const int64_t max_batch_size, switch (st_) { case at::ScalarType::Float: - ftgpt = new FTGpt((size_t)max_batch_size, - (size_t)max_seq_len, - (size_t)beam_width, - (size_t)head_num, + ftgpt = new FTGpt((size_t)head_num, (size_t)size_per_head, (size_t)inter_size, (size_t)layer_num, vocab_size, start_id, end_id, - beam_search_diversity_rate, - top_k, - top_p, - random_seed, - temperature, - len_penalty, - repetition_penalty, sparse, weights); break; case at::ScalarType::Half: - ftgpt = new FTGpt((size_t)max_batch_size, - (size_t)max_seq_len, - (size_t)beam_width, - (size_t)head_num, + ftgpt = new FTGpt((size_t)head_num, (size_t)size_per_head, (size_t)inter_size, (size_t)layer_num, (size_t)vocab_size, start_id, end_id, - beam_search_diversity_rate, - top_k, - top_p, - random_seed, - temperature, - len_penalty, - repetition_penalty, sparse, weights); break; +#ifdef ENABLE_BF16 + case at::ScalarType::BFloat16: + ftgpt = new FTGpt<__nv_bfloat16>((size_t)head_num, + (size_t)size_per_head, + (size_t)inter_size, + (size_t)layer_num, + (size_t)vocab_size, + start_id, + end_id, + sparse, + weights); + break; +#endif default: throw std::runtime_error("Wrong Tensor type."); } @@ -97,7 +80,18 @@ GptOp::~GptOp() delete ftgpt; } -std::vector GptOp::forward(th::Tensor input_ids, th::Tensor input_lengths, const int64_t output_len) +std::vector GptOp::forward(th::Tensor input_ids, + th::Tensor input_lengths, + const int64_t output_len, + const int64_t beam_width, + const int64_t top_k, + const double top_p, + const double beam_search_diversity_rate, + const double temperature, + const double len_penalty, + const double repetition_penalty, + const int64_t random_seed, + const int64_t return_cum_log_probs) { CHECK_TH_CUDA(input_ids); CHECK_CONTIGUOUS(input_ids); @@ -105,41 +99,50 @@ std::vector GptOp::forward(th::Tensor input_ids, th::Tensor input_le CHECK_TH_CUDA(input_lengths); CHECK_CONTIGUOUS(input_lengths); TORCH_CHECK(input_lengths.dtype() == torch::kInt32, "input_lengths dtype should be int32"); + TORCH_CHECK(return_cum_log_probs == 0 || return_cum_log_probs == 1 || return_cum_log_probs == 2, + "return_cum_log_probs should be" + " 0 (no return cum_log_probs), " + " 1 (the cumulative log probs of generated sequences), or" + " 2 (the cumulative log probs of sequences).") - const int batchbeam = input_ids.size(0); + const int batch_size = input_ids.size(0); const int max_input_length = input_ids.size(1); const int total_request_output_len = max_input_length + output_len; - th::Tensor output_ids = torch::empty({batchbeam, total_request_output_len}, + th::Tensor output_ids = torch::empty({batch_size, beam_width, total_request_output_len}, torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); - th::Tensor parent_ids = torch::empty({total_request_output_len, batchbeam}, + th::Tensor parent_ids = torch::empty({total_request_output_len, batch_size, beam_width}, torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); th::Tensor sequence_lengths = - torch::empty({batchbeam}, torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); + torch::empty({batch_size, beam_width}, torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); + th::Tensor cum_log_probs = + torch::empty({batch_size, beam_width}, torch::dtype(torch::kFloat32).device(torch::kCUDA).requires_grad(false)); - ftgpt->forward(input_ids, input_lengths, output_ids, parent_ids, sequence_lengths, (size_t)output_len); + ftgpt->forward(input_ids, + input_lengths, + output_ids, + parent_ids, + sequence_lengths, + cum_log_probs, + (const size_t)output_len, + (const size_t)beam_width, + (const size_t)top_k, + (const float)top_p, + (const float)beam_search_diversity_rate, + (const float)temperature, + (const float)len_penalty, + (const float)repetition_penalty, + (const unsigned long long int)random_seed, + return_cum_log_probs); + if (return_cum_log_probs > 0) { + return std::vector{output_ids, sequence_lengths, cum_log_probs}; + } return std::vector{output_ids, sequence_lengths}; } } // namespace torch_ext -static auto fasterTransformerGptTHS = torch::jit::class_("FasterTransformer", "GptOp") - .def(torch::jit::init>()) - .def("forward", &torch_ext::GptOp::forward); +static auto fasterTransformerGptTHS = + torch::jit::class_("FasterTransformer", "GptOp") + .def(torch::jit:: + init>()) + .def("forward", &torch_ext::GptOp::forward); diff --git a/src/fastertransformer/th_op/gpt/GptOp.h b/src/fastertransformer/th_op/gpt/GptOp.h index 3daa5e87a..2f931cdd9 100644 --- a/src/fastertransformer/th_op/gpt/GptOp.h +++ b/src/fastertransformer/th_op/gpt/GptOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -15,20 +15,9 @@ * limitations under the License. */ -#include "src/fastertransformer/models/gpt/Gpt.h" - -#include -#include -#include -#include - -#include "torch/csrc/cuda/Stream.h" -#include -#include -#include - -#include "src/fastertransformer/th_op/th_traits.h" +#include "src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.h" #include "src/fastertransformer/th_op/th_utils.h" +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" namespace ft = fastertransformer; namespace th = torch; @@ -44,34 +33,31 @@ class IFGpt { th::Tensor& output_ids, th::Tensor& parent_ids, th::Tensor& sequence_lengths, - size_t request_output_len) = 0; + th::Tensor& cum_log_probs, + const size_t request_output_len, + const size_t beam_width, + const size_t top_k, + const float top_p, + const float beam_search_diversity_rate, + const float temperature, + const float len_penalty, + const float repetition_penalty, + const unsigned long long int random_seed, + const int return_cum_log_probs = 0) = 0; }; template class FTGpt: public IFGpt { public: - FTGpt(const size_t max_batch_size, - const size_t max_seq_len, - const size_t beam_width, - const size_t head_num, + FTGpt(const size_t head_num, const size_t size_per_head, const size_t inter_size, const size_t layer_num, const size_t vocab_size, const int start_id, const int end_id, - const float beam_search_diversity_rate, - const int top_k, - const float top_p, - const unsigned long long random_seed, - const float temperature, - const float len_penalty, - const float repetition_penalty, const bool sparse, const vector weights): - max_batch_size_(max_batch_size), - max_seq_len_(max_seq_len), - beam_width_(beam_width), head_num_(head_num), size_per_head_(size_per_head), inter_size_(inter_size), @@ -79,13 +65,6 @@ class FTGpt: public IFGpt { vocab_size_(vocab_size), start_id_(start_id), end_id_(end_id), - beam_search_diversity_rate_(beam_search_diversity_rate), - top_k_(top_k), - top_p_(top_p), - random_seed_(random_seed), - temperature_(temperature), - len_penalty_(len_penalty), - repetition_penalty_(repetition_penalty), #ifndef SPARSITY_ENABLED sparse_(false), #else @@ -93,15 +72,14 @@ class FTGpt: public IFGpt { #endif weights_(weights) { - check_cuda_error(cublasLtCreate(&cublasltHandle_)); + ft::check_cuda_error(cublasLtCreate(&cublasltHandle_)); if (sparse) { #ifdef SPARSITY_ENABLED CHECK_CUSPARSE(cusparseLtInit(&cusparseLtHandle_)); #else - std::cout - << "[WARNING] Sparsity support is not enabled. Will use dense GEMM instead. " - "To enabled sparisty, please provide `-DSUPPORT_SPARITY` flag for compliation." - << std::endl; + std::cout << "[WARNING] Sparsity support is not enabled. Will use dense GEMM instead. " + "To enabled sparisty, please provide `-DSUPPORT_SPARITY` flag for compliation." + << std::endl; #endif } @@ -109,30 +87,31 @@ class FTGpt: public IFGpt { cublas_algo_map_ = new ft::cublasAlgoMap(GEMM_CONFIG, sp_config_fname); cublas_wrapper_mutex_ = new std::mutex(); - gpt_weights_.decoder_layer_weights.resize(layer_num_); + gpt_weights_.resizeLayer(layer_num_); for (int i = 0; i < (int)layer_num_; i++) { - gpt_weights_.decoder_layer_weights[i].pre_layernorm_weights.gamma = + gpt_weights_.decoder_layer_weights[i]->pre_layernorm_weights.gamma = get_ptr(weights_[i + 0 * layer_num_]); - gpt_weights_.decoder_layer_weights[i].pre_layernorm_weights.beta = get_ptr(weights_[i + 1 * layer_num_]); - gpt_weights_.decoder_layer_weights[i].self_attention_weights.query_weight.kernel = + gpt_weights_.decoder_layer_weights[i]->pre_layernorm_weights.beta = + get_ptr(weights_[i + 1 * layer_num_]); + gpt_weights_.decoder_layer_weights[i]->self_attention_weights.query_weight.kernel = get_ptr(weights_[i + 2 * layer_num_]); - gpt_weights_.decoder_layer_weights[i].self_attention_weights.query_weight.bias = + gpt_weights_.decoder_layer_weights[i]->self_attention_weights.query_weight.bias = get_ptr(weights_[i + 3 * layer_num_]); - gpt_weights_.decoder_layer_weights[i].self_attention_weights.attention_output_weight.kernel = + gpt_weights_.decoder_layer_weights[i]->self_attention_weights.attention_output_weight.kernel = get_ptr(weights_[i + 4 * layer_num_]); - gpt_weights_.decoder_layer_weights[i].self_attention_weights.attention_output_weight.bias = + gpt_weights_.decoder_layer_weights[i]->self_attention_weights.attention_output_weight.bias = get_ptr(weights_[i + 5 * layer_num_]); - gpt_weights_.decoder_layer_weights[i].self_attn_layernorm_weights.gamma = + gpt_weights_.decoder_layer_weights[i]->self_attn_layernorm_weights.gamma = get_ptr(weights_[i + 6 * layer_num_]); - gpt_weights_.decoder_layer_weights[i].self_attn_layernorm_weights.beta = + gpt_weights_.decoder_layer_weights[i]->self_attn_layernorm_weights.beta = get_ptr(weights_[i + 7 * layer_num_]); - gpt_weights_.decoder_layer_weights[i].ffn_weights.intermediate_weight.kernel = + gpt_weights_.decoder_layer_weights[i]->ffn_weights.intermediate_weight.kernel = get_ptr(weights_[i + 8 * layer_num_]); - gpt_weights_.decoder_layer_weights[i].ffn_weights.intermediate_weight.bias = + gpt_weights_.decoder_layer_weights[i]->ffn_weights.intermediate_weight.bias = get_ptr(weights_[i + 9 * layer_num_]); - gpt_weights_.decoder_layer_weights[i].ffn_weights.output_weight.kernel = + gpt_weights_.decoder_layer_weights[i]->ffn_weights.output_weight.kernel = get_ptr(weights_[i + 10 * layer_num_]); - gpt_weights_.decoder_layer_weights[i].ffn_weights.output_weight.bias = + gpt_weights_.decoder_layer_weights[i]->ffn_weights.output_weight.bias = get_ptr(weights_[i + 11 * layer_num_]); } @@ -158,13 +137,13 @@ class FTGpt: public IFGpt { // or inter_size. Let me udpate an initalization of GptWeights in future. int hidden_units = head_num_ * size_per_head_; for (size_t i = 0; i < layer_num_; ++i) { - gpt_weights_.decoder_layer_weights[i].compress_weights(cublas_wrapper, hidden_units); + gpt_weights_.decoder_layer_weights[i]->compress_weights(cublas_wrapper, hidden_units); } is_spmm_compressed = true; } #endif - check_cuda_error(cudaGetDeviceProperties(&prop_, 0)); + ft::check_cuda_error(cudaGetDeviceProperties(&prop_, 0)); } ~FTGpt() override @@ -179,84 +158,147 @@ class FTGpt: public IFGpt { th::Tensor& output_ids, th::Tensor& parent_ids, th::Tensor& sequence_lengths, - size_t request_output_len) override + th::Tensor& cum_log_probs, + const size_t request_output_len, + const size_t beam_width, + const size_t top_k, + const float top_p, + const float beam_search_diversity_rate, + const float temperature, + const float len_penalty, + const float repetition_penalty, + const unsigned long long int random_seed, + const int return_cum_log_probs = 0) override { auto stream = at::cuda::getCurrentCUDAStream().stream(); cublasHandle_t cublasHandle = at::cuda::getCurrentCUDABlasHandle(); cublasSetStream(cublasHandle, stream); - fastertransformer::Allocator allocator = fastertransformer::Allocator(); - ft::cublasMMWrapper cublas_wrapper = ft::cublasMMWrapper( - cublasHandle, cublasltHandle_, + ft::Allocator allocator = ft::Allocator(); + ft::cublasMMWrapper cublas_wrapper = ft::cublasMMWrapper(cublasHandle, + cublasltHandle_, #ifdef SPARSITY_ENABLED - cusparseLtHandle_, + cusparseLtHandle_, #endif - stream, cublas_algo_map_, cublas_wrapper_mutex_, &allocator); - + stream, + cublas_algo_map_, + cublas_wrapper_mutex_, + &allocator); if (std::is_same::value) { cublas_wrapper.setGemmConfig(CUDA_R_16F, CUDA_R_16F, CUDA_R_16F, CUDA_R_32F); } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + cublas_wrapper.setBF16GemmConfig(); + } +#endif else if (std::is_same::value) { cublas_wrapper.setFP32GemmConfig(); } - const size_t request_batch_size = (size_t)input_ids.size(0) / beam_width_; + const size_t request_batch_size = (size_t)input_ids.size(0); const size_t max_input_length = (size_t)input_ids.size(1); const int total_output_len = (int)(max_input_length + request_output_len); - Gpt gpt = Gpt(request_batch_size, - total_output_len, - max_input_length, - beam_width_, - head_num_, - size_per_head_, - inter_size_, - layer_num_, - vocab_size_, - start_id_, - end_id_, - 0.0f, - top_k_, - top_p_, - random_seed_, - temperature_, - len_penalty_, - repetition_penalty_, - stream, - &cublas_wrapper, - &allocator, - false, - &prop_, - sparse_); + ft::NcclParam tensor_para; + ft::NcclParam pipeline_para; - std::vector input_tensors = - std::vector{Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{request_batch_size * beam_width_, max_input_length}, - get_ptr(input_ids)}, - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{request_batch_size * beam_width_}, - get_ptr(input_lengths)}, - Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, &total_output_len}}; + ft::ParallelGpt gpt = ft::ParallelGpt(request_batch_size, + total_output_len, + max_input_length, + beam_width, + head_num_, + size_per_head_, + inter_size_, + layer_num_, + vocab_size_, + start_id_, + end_id_, + beam_search_diversity_rate, + top_k, + top_p, + random_seed, + temperature, + len_penalty, + repetition_penalty, + tensor_para, + pipeline_para, + stream, + &cublas_wrapper, + &allocator, + false, + &prop_, + sparse_, + 0); - std::vector output_tensors = - std::vector{Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{request_batch_size, beam_width_, (size_t)total_output_len}, - get_ptr(output_ids)}, - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{(size_t)total_output_len, request_batch_size, beam_width_}, - get_ptr(parent_ids)}, - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{request_batch_size, beam_width_}, - get_ptr(sequence_lengths)}, - Tensor{MEMORY_GPU, - TYPE_FP32, - std::vector{request_output_len, request_batch_size, beam_width_}, - nullptr}}; + std::unordered_map input_tensors = std::unordered_map{ + {"input_ids", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{request_batch_size, max_input_length}, + get_ptr(input_ids)}}, + {"input_lengths", + ft::Tensor{ + ft::MEMORY_GPU, ft::TYPE_INT32, std::vector{request_batch_size}, get_ptr(input_lengths)}}, + {"max_output_seq_len", + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT32, std::vector{1}, &total_output_len}}}; + if (top_k == 0 && top_p == 0.0f) { + ft::FT_CHECK(beam_width > 1); + input_tensors.insert( + {"beam_search_diversity_rate", + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &beam_search_diversity_rate}}); + } + else { + if (top_p != 0.0f) { + input_tensors.insert( + {"runtime_top_p", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &top_p}}); + } + if (top_k != 0) { + input_tensors.insert( + {"runtime_top_k", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT32, std::vector{1}, &top_k}}); + } + } + input_tensors.insert( + {"temperature", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &temperature}}); + input_tensors.insert( + {"len_penalty", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &len_penalty}}); + input_tensors.insert({"repetition_penalty", + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &repetition_penalty}}); + input_tensors.insert( + {"random_seed", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_UINT64, std::vector{1}, &random_seed}}); + + bool return_context_cum_log_probs = false; + if (return_cum_log_probs == 2) { + return_context_cum_log_probs = true; + input_tensors.insert( + {"is_return_context_cum_log_probs", + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_BOOL, std::vector{1}, &return_context_cum_log_probs}}); + } + + std::unordered_map output_tensors = std::unordered_map{ + {"output_ids", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{request_batch_size, beam_width, (size_t)total_output_len}, + get_ptr(output_ids)}}, + {"parent_ids", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{(size_t)total_output_len, request_batch_size, beam_width}, + get_ptr(parent_ids)}}, + {"sequence_length", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{request_batch_size, beam_width}, + get_ptr(sequence_lengths)}}}; + + if (return_cum_log_probs > 0) { + output_tensors.insert({"cum_log_probs", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_FP32, + std::vector{request_batch_size, beam_width}, + get_ptr(cum_log_probs)}}); + } try { gpt.forward(&output_tensors, &input_tensors, &gpt_weights_); @@ -272,9 +314,6 @@ class FTGpt: public IFGpt { } private: - const size_t max_batch_size_; - const size_t max_seq_len_; - const size_t beam_width_; const size_t head_num_; const size_t size_per_head_; const size_t inter_size_; @@ -282,13 +321,6 @@ class FTGpt: public IFGpt { const size_t vocab_size_; const int start_id_; const int end_id_; - const float beam_search_diversity_rate_; - const int top_k_; - const float top_p_; - const unsigned long long random_seed_; - const float temperature_; - const float len_penalty_; - const float repetition_penalty_; const bool sparse_; std::vector weights_; @@ -300,34 +332,35 @@ class FTGpt: public IFGpt { std::mutex* cublas_wrapper_mutex_; ft::cublasAlgoMap* cublas_algo_map_; struct cudaDeviceProp prop_; - GptWeight gpt_weights_; + ft::ParallelGptWeight gpt_weights_; }; class GptOp: public th::jit::CustomClassHolder { public: - GptOp(const int64_t max_batch_size, - const int64_t max_seq_len, - const int64_t beam_width, - const int64_t head_num, + GptOp(const int64_t head_num, const int64_t size_per_head, const int64_t inter_size, const int64_t layer_num, const int64_t vocab_size, const int64_t start_id, const int64_t end_id, - const double beam_search_diversity_rate, - const int64_t top_k, - const double top_p, - const unsigned long long random_seed, - const double temperature, - const double len_penalty, - const double repetition_penalty, const bool sparse, const vector weights); ~GptOp(); - vector forward(th::Tensor input_ids, th::Tensor input_lengths, const int64_t output_len); + vector forward(th::Tensor input_ids, + th::Tensor input_lengths, + const int64_t output_len, + const int64_t beam_width, + const int64_t top_k, + const double top_p, + const double beam_search_diversity_rate, + const double temperature, + const double len_penalty, + const double repetition_penalty, + const int64_t random_seed, + const int64_t return_cum_log_probs = 0); private: const at::ScalarType st_; diff --git a/src/fastertransformer/th_op/longformer/CMakeLists.txt b/src/fastertransformer/th_op/longformer/CMakeLists.txt index d3acd83ec..bc981714f 100644 --- a/src/fastertransformer/th_op/longformer/CMakeLists.txt +++ b/src/fastertransformer/th_op/longformer/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/longformer/LongformerEncoderOp.cc b/src/fastertransformer/th_op/longformer/LongformerEncoderOp.cc index 3f48e1d28..05ade7e88 100644 --- a/src/fastertransformer/th_op/longformer/LongformerEncoderOp.cc +++ b/src/fastertransformer/th_op/longformer/LongformerEncoderOp.cc @@ -43,7 +43,7 @@ FasterTransformerLongformerEncoder::FasterTransformerLongformerEncoder(int64_t l attn_scaler_(attn_scaler), hidden_units_(head_num * size_per_head) { - check_cuda_error(cublasLtCreate(&_cublasltHandle)); + ft::check_cuda_error(cublasLtCreate(&_cublasltHandle)); cublas_algo_map_ = new ft::cublasAlgoMap("gemm_config.in"); cublas_wrapper_mutex_ = new std::mutex(); } @@ -63,7 +63,7 @@ th::Tensor FasterTransformerLongformerEncoder::forward( CHECK_INPUT(local_attn_mask, scalar_type); CHECK_INPUT(global_attn_mask, scalar_type); - check_cuda_error(cudaSetDevice(device_id)); + ft::check_cuda_error(cudaSetDevice(device_id)); int batch_size = input.size(0); int seq_len = input.size(1); @@ -76,7 +76,7 @@ th::Tensor FasterTransformerLongformerEncoder::forward( cublasHandle_t _cublasHandle = at::cuda::getCurrentCUDABlasHandle(); cublasSetStream(_cublasHandle, stream); - fastertransformer::Allocator* allocator = new fastertransformer::Allocator(); + ft::Allocator* allocator = new ft::Allocator(); auto cublas_wrapper = new ft::cublasMMWrapper( _cublasHandle, _cublasltHandle, stream, cublas_algo_map_, cublas_wrapper_mutex_, allocator); @@ -132,7 +132,7 @@ th::Tensor FasterTransformerLongformerEncoder::forward( false); setWeight(layer_num_, in_dim_, hidden_units_, intermediate_size_, th_weights, encoder->getWeightsPtr()); encoder->forward(&output_tensors, &input_tensors); - check_cuda_error(cudaStreamSynchronize(stream)); + ft::check_cuda_error(cudaStreamSynchronize(stream)); delete encoder; } else if (scalar_type == at::ScalarType::Half) { @@ -153,7 +153,7 @@ th::Tensor FasterTransformerLongformerEncoder::forward( false); setWeight(layer_num_, in_dim_, hidden_units_, intermediate_size_, th_weights, encoder->getWeightsPtr()); encoder->forward(&output_tensors, &input_tensors); - check_cuda_error(cudaStreamSynchronize(stream)); + ft::check_cuda_error(cudaStreamSynchronize(stream)); delete encoder; } delete cublas_wrapper; diff --git a/src/fastertransformer/th_op/longformer/LongformerEncoderOp.h b/src/fastertransformer/th_op/longformer/LongformerEncoderOp.h index e1acfa71b..68e388d4d 100644 --- a/src/fastertransformer/th_op/longformer/LongformerEncoderOp.h +++ b/src/fastertransformer/th_op/longformer/LongformerEncoderOp.h @@ -14,19 +14,8 @@ * limitations under the License. */ -#include - -#include - -#include "torch/csrc/cuda/Stream.h" -#include -#include -#include - -#include "src/fastertransformer/th_op/th_traits.h" -#include "src/fastertransformer/th_op/th_utils.h" - #include "src/fastertransformer/models/longformer/LongformerEncoder.h" +#include "src/fastertransformer/th_op/th_utils.h" namespace ft = fastertransformer; namespace th = torch; @@ -76,7 +65,7 @@ class FasterTransformerLongformerEncoder: public th::jit::CustomClassHolder { int hidden_units, int intermediate_size, th::Tensor th_weights, - std::vector>* weights) + std::vector>* weights) { weights->clear(); weights->resize(layer_num); diff --git a/src/fastertransformer/th_op/multi_gpu_gpt/CMakeLists.txt b/src/fastertransformer/th_op/multi_gpu_gpt/CMakeLists.txt index db7329060..88c4e58fe 100644 --- a/src/fastertransformer/th_op/multi_gpu_gpt/CMakeLists.txt +++ b/src/fastertransformer/th_op/multi_gpu_gpt/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptOp.cc b/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptOp.cc index 75ef162f5..498959372 100644 --- a/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptOp.cc +++ b/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptOp.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -20,23 +20,13 @@ namespace th = torch; namespace torch_ext { -ParallelGptOp::ParallelGptOp(const int64_t max_batch_size, - const int64_t max_seq_len, - const int64_t beam_width, - const int64_t head_num, +ParallelGptOp::ParallelGptOp(const int64_t head_num, const int64_t size_per_head, const int64_t inter_size, const int64_t layer_num, const int64_t vocab_size, const int64_t start_id, const int64_t end_id, - const double beam_search_diversity_rate, - const int64_t top_k, - const double top_p, - const unsigned long long random_seed, - const double temperature, - const double len_penalty, - const double repetition_penalty, const int64_t tensor_para_size, const int64_t pipeline_para_size, const int64_t int8_mode, @@ -51,23 +41,13 @@ ParallelGptOp::ParallelGptOp(const int64_t max_batch_size, switch (st_) { case at::ScalarType::Float: - ftgpt = new FTGpt((size_t)max_batch_size, - (size_t)max_seq_len, - (size_t)beam_width, - (size_t)head_num, + ftgpt = new FTGpt((size_t)head_num, (size_t)size_per_head, (size_t)inter_size, (size_t)layer_num, (size_t)vocab_size, start_id, end_id, - beam_search_diversity_rate, - top_k, - top_p, - random_seed, - temperature, - len_penalty, - repetition_penalty, tensor_para_size, pipeline_para_size, int8_mode, @@ -76,23 +56,13 @@ ParallelGptOp::ParallelGptOp(const int64_t max_batch_size, scale); break; case at::ScalarType::Half: - ftgpt = new FTGpt((size_t)max_batch_size, - (size_t)max_seq_len, - (size_t)beam_width, - (size_t)head_num, + ftgpt = new FTGpt((size_t)head_num, (size_t)size_per_head, (size_t)inter_size, (size_t)layer_num, (size_t)vocab_size, start_id, end_id, - beam_search_diversity_rate, - top_k, - top_p, - random_seed, - temperature, - len_penalty, - repetition_penalty, tensor_para_size, pipeline_para_size, int8_mode, @@ -100,6 +70,23 @@ ParallelGptOp::ParallelGptOp(const int64_t max_batch_size, int8_weights, scale); break; +#ifdef ENABLE_BF16 + case at::ScalarType::BFloat16: + ftgpt = new FTGpt<__nv_bfloat16>((size_t)head_num, + (size_t)size_per_head, + (size_t)inter_size, + (size_t)layer_num, + (size_t)vocab_size, + start_id, + end_id, + tensor_para_size, + pipeline_para_size, + int8_mode, + weights, + int8_weights, + scale); + break; +#endif default: throw std::runtime_error("Wrong Tensor type."); } @@ -110,7 +97,18 @@ ParallelGptOp::~ParallelGptOp() delete ftgpt; } -std::vector ParallelGptOp::forward(th::Tensor input_ids, th::Tensor input_lengths, const int64_t output_len) +std::vector ParallelGptOp::forward(th::Tensor input_ids, + th::Tensor input_lengths, + const int64_t output_len, + const int64_t beam_width, + const int64_t top_k, + const double top_p, + const double beam_search_diversity_rate, + const double temperature, + const double len_penalty, + const double repetition_penalty, + const int64_t random_seed, + const int64_t return_cum_log_probs) { CHECK_TH_CUDA(input_ids); CHECK_CONTIGUOUS(input_ids); @@ -118,18 +116,43 @@ std::vector ParallelGptOp::forward(th::Tensor input_ids, th::Tensor CHECK_TH_CUDA(input_lengths); CHECK_CONTIGUOUS(input_lengths); TORCH_CHECK(input_lengths.dtype() == torch::kInt32, "input_lengths dtype should be int32"); + TORCH_CHECK(return_cum_log_probs == 0 || return_cum_log_probs == 1 || return_cum_log_probs == 2, + "return_cum_log_probs should be" + " 0 (no return cum_log_probs), " + " 1 (the cumulative log probs of generated sequences), or" + " 2 (the cumulative log probs of sequences).") - const int batchbeam = input_ids.size(0); + const int batch_size = input_ids.size(0) / beam_width; const int max_input_length = input_ids.size(1); const int total_request_output_len = max_input_length + output_len; - th::Tensor output_ids = torch::empty({total_request_output_len, batchbeam}, + th::Tensor output_ids = torch::empty({batch_size, beam_width, total_request_output_len}, torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); - th::Tensor parent_ids = torch::empty({total_request_output_len, batchbeam}, + th::Tensor parent_ids = torch::empty({total_request_output_len, batch_size, beam_width}, torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); th::Tensor sequence_lengths = - torch::empty({batchbeam}, torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); + torch::empty({batch_size, beam_width}, torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); + th::Tensor cum_log_probs = + torch::empty({batch_size, beam_width}, torch::dtype(torch::kFloat32).device(torch::kCUDA).requires_grad(false)); - ftgpt->forward(input_ids, input_lengths, output_ids, parent_ids, sequence_lengths, (size_t)output_len); + ftgpt->forward(input_ids, + input_lengths, + output_ids, + parent_ids, + sequence_lengths, + cum_log_probs, + (const size_t)output_len, + (const size_t)beam_width, + (const size_t)top_k, + (const float)top_p, + (const float)beam_search_diversity_rate, + (const float)temperature, + (const float)len_penalty, + (const float)repetition_penalty, + (const unsigned long long int)random_seed, + return_cum_log_probs); + if (return_cum_log_probs > 0) { + return std::vector{output_ids, sequence_lengths, cum_log_probs}; + } return std::vector{output_ids, sequence_lengths}; } @@ -146,16 +169,6 @@ static auto fasterTransformerGptTHS = torch::jit::class_, std::vector, std::vector>()) diff --git a/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptOp.h b/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptOp.h index 250af888f..38a88388c 100644 --- a/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptOp.h +++ b/src/fastertransformer/th_op/multi_gpu_gpt/ParallelGptOp.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -16,20 +16,9 @@ */ #include "src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.h" -#include "src/fastertransformer/utils/mpi_utils.h" - -#include -#include -#include -#include - -#include "torch/csrc/cuda/Stream.h" -#include -#include -#include - -#include "src/fastertransformer/th_op/th_traits.h" #include "src/fastertransformer/th_op/th_utils.h" +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" +#include "src/fastertransformer/utils/mpi_utils.h" namespace ft = fastertransformer; namespace th = torch; @@ -45,38 +34,35 @@ class IFGpt { th::Tensor& output_ids, th::Tensor& parent_ids, th::Tensor& sequence_lengths, - size_t request_output_len) = 0; + th::Tensor& cum_log_probs, + const size_t request_output_len, + const size_t beam_width, + const size_t top_k, + const float top_p, + const float beam_search_diversity_rate, + const float temperature, + const float len_penalty, + const float repetition_penalty, + const unsigned long long int random_seed, + const int return_cum_log_probs = 0) = 0; }; template class FTGpt: public IFGpt { public: - FTGpt(const size_t max_batch_size, - const size_t max_seq_len, - const size_t beam_width, - const size_t head_num, + FTGpt(const size_t head_num, const size_t size_per_head, const size_t inter_size, const size_t layer_num, const size_t vocab_size, const int start_id, const int end_id, - const float beam_search_diversity_rate, - const int top_k, - const float top_p, - const unsigned long long random_seed, - const float temperature, - const float len_penalty, - const float repetition_penalty, const int tensor_para_size, const int pipeline_para_size, const int int8_mode, const vector weights, const vector int8_weights, const vector scale): - max_batch_size_(max_batch_size), - max_seq_len_(max_seq_len), - beam_width_(beam_width), head_num_(head_num), size_per_head_(size_per_head), inter_size_(inter_size), @@ -84,12 +70,6 @@ class FTGpt: public IFGpt { vocab_size_(vocab_size), start_id_(start_id), end_id_(end_id), - beam_search_diversity_rate_(beam_search_diversity_rate), - top_k_(top_k), - top_p_(top_p), - temperature_(temperature), - len_penalty_(len_penalty), - repetition_penalty_(repetition_penalty), tensor_para_size_(tensor_para_size), pipeline_para_size_(pipeline_para_size), int8_mode_(int8_mode), @@ -97,7 +77,7 @@ class FTGpt: public IFGpt { int8_weights_(int8_weights), scale_(scale) { - check_cuda_error(cublasLtCreate(&cublasltHandle_)); + ft::check_cuda_error(cublasLtCreate(&cublasltHandle_)); cublas_algo_map_ = new ft::cublasAlgoMap("gemm_config.in"); cublas_wrapper_mutex_ = new std::mutex(); @@ -157,21 +137,10 @@ class FTGpt: public IFGpt { gpt_weights_.pre_decoder_embedding_table = get_ptr(weights_[12 * layer_num_ + 3]); gpt_weights_.post_decoder_embedding.kernel = get_ptr(weights_[12 * layer_num_ + 4]); - int rank, world_size; - MPICHECK(MPI_Comm_rank(MPI_COMM_WORLD, &rank)); - MPICHECK(MPI_Comm_size(MPI_COMM_WORLD, &world_size)); - - if (rank == 0) { - random_seed_ = random_seed; - } - if (world_size > 1) { - MPICHECK(MPI_Bcast(&random_seed_, 1, MPI_UNSIGNED_LONG_LONG, 0, MPI_COMM_WORLD)); - } - int device_id = 0; - check_cuda_error(cudaGetDevice(&device_id)); - check_cuda_error(cudaGetDeviceProperties(&prop_, device_id)); - printf("Device %s\n", prop_.name); + ft::check_cuda_error(cudaGetDevice(&device_id)); + ft::check_cuda_error(cudaGetDeviceProperties(&prop_, device_id)); + FT_LOG_INFO("Device %s", prop_.name); } ~FTGpt() override @@ -185,8 +154,25 @@ class FTGpt: public IFGpt { void init_nccl_comm() { - int rank; - MPICHECK(MPI_Comm_rank(MPI_COMM_WORLD, &rank)); + MPICHECK(MPI_Comm_rank(MPI_COMM_WORLD, &rank_)); + MPICHECK(MPI_Comm_size(MPI_COMM_WORLD, &world_size_)); + + int mpi_initialized; + MPICHECK(MPI_Initialized(&mpi_initialized)); + if (!mpi_initialized) { + FT_LOG_INFO("MPI is not initialized! Skipped the NCCL communication initialization.\n"); + if (tensor_para_size_ != 1) { + FT_LOG_ERROR("MPI initialization can only be skipped when tensor_para_size=1, but got %zu!\n", + tensor_para_size_); + } + if (pipeline_para_size_ != 1) { + FT_LOG_ERROR("MPI initialization can only be skipped when pipeline_para_size=1, but got %zu!\n", + pipeline_para_size_); + } + return; + } + + int rank = rank_; tensor_para_rank_ = rank % tensor_para_size_; pipeline_para_rank_ = rank / tensor_para_size_; @@ -202,14 +188,14 @@ class FTGpt: public IFGpt { // n, ..., 2n - 1 are in group 1. NCCLCHECK(ncclGetUniqueId(&tensor_para_nccl_uid)); for (int i = 1; i < (int)tensor_para_size_; i++) { - printf("[INFO] rank %d sends tensor_para_nccl_uid to rank %d \n", rank, rank + i); + FT_LOG_INFO("rank %d sends tensor_para_nccl_uid to rank %d \n", rank, rank + i); MPICHECK(MPI_Send( &tensor_para_nccl_uid, sizeof(tensor_para_nccl_uid), MPI_BYTE, rank + i, 0, MPI_COMM_WORLD)); } } else { MPI_Status status; - printf("[INFO] rank %d receives tensor_para_nccl_uid from rank %d \n", rank, rank - (int)tensor_para_rank_); + FT_LOG_INFO("rank %d receives tensor_para_nccl_uid from rank %d \n", rank, rank - (int)tensor_para_rank_); MPICHECK(MPI_Recv(&tensor_para_nccl_uid, sizeof(tensor_para_nccl_uid), MPI_BYTE, @@ -225,9 +211,8 @@ class FTGpt: public IFGpt { // 1, k+1, 2k+1 are in group 1 NCCLCHECK(ncclGetUniqueId(&pipeline_para_nccl_uid)); for (int i = 1; i < (int)pipeline_para_size_; i++) { - printf("[INFO] rank %d sends pipeline_para_nccl_uid to rank %d \n", - rank, - rank + i * (int)tensor_para_size_); + FT_LOG_INFO( + "rank %d sends pipeline_para_nccl_uid to rank %d \n", rank, rank + i * (int)tensor_para_size_); MPICHECK(MPI_Send(&pipeline_para_nccl_uid, sizeof(pipeline_para_nccl_uid), MPI_BYTE, @@ -238,8 +223,7 @@ class FTGpt: public IFGpt { } else { MPI_Status status; - printf( - "[INFO] rank %d receives pipeline_para_nccl_uid from rank %d \n", rank, rank % (int)tensor_para_size_); + FT_LOG_INFO("rank %d receives pipeline_para_nccl_uid from rank %d \n", rank, rank % (int)tensor_para_size_); MPICHECK(MPI_Recv(&pipeline_para_nccl_uid, sizeof(pipeline_para_nccl_uid), MPI_BYTE, @@ -258,104 +242,160 @@ class FTGpt: public IFGpt { th::Tensor& output_ids, th::Tensor& parent_ids, th::Tensor& sequence_lengths, - size_t request_output_len) override + th::Tensor& cum_log_probs, + const size_t request_output_len, + const size_t beam_width, + const size_t top_k, + const float top_p, + const float beam_search_diversity_rate, + const float temperature, + const float len_penalty, + const float repetition_penalty, + const unsigned long long int query_random_seed, + const int return_cum_log_probs = 0) override { auto stream = at::cuda::getCurrentCUDAStream().stream(); cublasHandle_t cublasHandle = at::cuda::getCurrentCUDABlasHandle(); cublasSetStream(cublasHandle, stream); - fastertransformer::Allocator allocator = fastertransformer::Allocator(); + ft::Allocator allocator = ft::Allocator(); ft::cublasMMWrapper cublas_wrapper = ft::cublasMMWrapper( cublasHandle, cublasltHandle_, stream, cublas_algo_map_, cublas_wrapper_mutex_, &allocator); if (std::is_same::value) { cublas_wrapper.setGemmConfig(CUDA_R_16F, CUDA_R_16F, CUDA_R_16F, CUDA_R_32F); } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + cublas_wrapper.setBF16GemmConfig(); + } +#endif else if (std::is_same::value) { cublas_wrapper.setFP32GemmConfig(); } - const size_t request_batch_size = (size_t)input_ids.size(0) / beam_width_; + const size_t request_batch_size = (size_t)input_ids.size(0) / beam_width; const size_t max_input_length = (size_t)input_ids.size(1); const int total_output_len = (int)(max_input_length + request_output_len); - ParallelGpt gpt = ParallelGpt(request_batch_size, - total_output_len, - max_input_length, - beam_width_, - head_num_, - size_per_head_, - inter_size_, - layer_num_, - vocab_size_, - start_id_, - end_id_, - 0.0f, - top_k_, - top_p_, - random_seed_, // TODO(bhsueh) add seed argument - temperature_, - len_penalty_, - repetition_penalty_, - tensor_para_size_, - tensor_para_rank_, - tensor_para_comm_, - pipeline_para_size_, - pipeline_para_rank_, - pipeline_para_comm_, - stream, - &cublas_wrapper, - &allocator, - false, - &prop_, - false, - int8_mode_); - - std::vector input_tensors = - std::vector{Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{request_batch_size * beam_width_, max_input_length}, - get_ptr(input_ids)}, - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{request_batch_size * beam_width_}, - get_ptr(input_lengths)}, - Tensor{MEMORY_CPU, TYPE_INT32, std::vector{1}, &total_output_len}}; - - std::vector output_tensors = - std::vector{Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{request_batch_size, beam_width_, (size_t)total_output_len}, - get_ptr(output_ids)}, - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{(size_t)total_output_len, request_batch_size, beam_width_}, - get_ptr(parent_ids)}, - Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{request_batch_size, beam_width_}, - get_ptr(sequence_lengths)}, - Tensor{MEMORY_GPU, - TYPE_FP32, - std::vector{request_output_len, request_batch_size, beam_width_}, - nullptr}}; + ft::NcclParam tensor_para(tensor_para_rank_, tensor_para_size_, tensor_para_comm_); + ft::NcclParam pipeline_para(pipeline_para_rank_, pipeline_para_size_, pipeline_para_comm_); + + unsigned long long int random_seed = query_random_seed; + if (world_size_ > 1) { + MPICHECK(MPI_Bcast(&random_seed, 1, MPI_UNSIGNED_LONG_LONG, 0, MPI_COMM_WORLD)); + } + + ft::ParallelGpt gpt = ft::ParallelGpt(request_batch_size, + total_output_len, + max_input_length, + beam_width, + head_num_, + size_per_head_, + inter_size_, + layer_num_, + vocab_size_, + start_id_, + end_id_, + beam_search_diversity_rate, + top_k, + top_p, + random_seed, + temperature, + len_penalty, + repetition_penalty, + tensor_para, + pipeline_para, + stream, + &cublas_wrapper, + &allocator, + false, + &prop_, + false, + int8_mode_); + + std::unordered_map input_tensors = std::unordered_map{ + {"input_ids", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{request_batch_size, max_input_length}, + get_ptr(input_ids)}}, + {"input_lengths", + ft::Tensor{ + ft::MEMORY_GPU, ft::TYPE_INT32, std::vector{request_batch_size}, get_ptr(input_lengths)}}, + {"max_output_seq_len", + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT32, std::vector{1}, &total_output_len}}}; + if (top_k == 0 && top_p == 0.0f) { + ft::FT_CHECK(beam_width > 1); + input_tensors.insert( + {"beam_search_diversity_rate", + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &beam_search_diversity_rate}}); + } + else { + if (top_p != 0.0f) { + input_tensors.insert( + {"runtime_top_p", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &top_p}}); + } + if (top_k != 0) { + input_tensors.insert( + {"runtime_top_k", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT32, std::vector{1}, &top_k}}); + } + } + input_tensors.insert( + {"temperature", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &temperature}}); + input_tensors.insert( + {"len_penalty", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &len_penalty}}); + input_tensors.insert({"repetition_penalty", + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &repetition_penalty}}); + input_tensors.insert( + {"random_seed", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_UINT64, std::vector{1}, &random_seed}}); + + bool return_context_cum_log_probs = false; + if (return_cum_log_probs == 2) { + return_context_cum_log_probs = true; + input_tensors.insert( + {"is_return_context_cum_log_probs", + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_BOOL, std::vector{1}, &return_context_cum_log_probs}}); + } + + std::unordered_map output_tensors = std::unordered_map{ + {"output_ids", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{request_batch_size, beam_width, (size_t)total_output_len}, + get_ptr(output_ids)}}, + {"parent_ids", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{(size_t)total_output_len, request_batch_size, beam_width}, + get_ptr(parent_ids)}}, + {"sequence_length", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{request_batch_size, beam_width}, + get_ptr(sequence_lengths)}}}; + + if (return_cum_log_probs > 0) { + output_tensors.insert({"cum_log_probs", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_FP32, + std::vector{request_batch_size, beam_width}, + get_ptr(cum_log_probs)}}); + } try { gpt.forward(&output_tensors, &input_tensors, &gpt_weights_); } catch (std::runtime_error& error) { - std::cout << error.what(); - exit(-1); + std::cout << error.what() << std::endl; + ft::FT_CHECK(false); } catch (...) { - std::cout << "Runtime error"; - exit(-1); + std::cout << "Runtime error" << std::endl; + ft::FT_CHECK(false); } } private: - const size_t max_batch_size_; - const size_t max_seq_len_; - const size_t beam_width_; const size_t head_num_; const size_t size_per_head_; const size_t inter_size_; @@ -363,12 +403,6 @@ class FTGpt: public IFGpt { const size_t vocab_size_; const int start_id_; const int end_id_; - const float beam_search_diversity_rate_; - const int top_k_; - const float top_p_; - const float temperature_; - const float len_penalty_; - const float repetition_penalty_; const int int8_mode_ = 0; @@ -384,34 +418,24 @@ class FTGpt: public IFGpt { size_t pipeline_para_rank_; ncclComm_t pipeline_para_comm_; - unsigned long long random_seed_; - cublasLtHandle_t cublasltHandle_; std::mutex* cublas_wrapper_mutex_; ft::cublasAlgoMap* cublas_algo_map_; struct cudaDeviceProp prop_; - ParallelGptWeight gpt_weights_; + ft::ParallelGptWeight gpt_weights_; + int world_size_ = 1; + int rank_ = 0; }; class ParallelGptOp: public th::jit::CustomClassHolder { public: - ParallelGptOp(const int64_t max_batch_size, - const int64_t max_seq_len, - const int64_t beam_width, - const int64_t head_num, + ParallelGptOp(const int64_t head_num, const int64_t size_per_head, const int64_t inter_size, const int64_t layer_num, const int64_t vocab_size, const int64_t start_id, const int64_t end_id, - const double beam_search_diversity_rate, - const int64_t top_k, - const double top_p, - const unsigned long long random_seed, - const double temperature, - const double len_penalty, - const double repetition_penalty, const int64_t tensor_para_size, const int64_t pipeline_para_size, const int64_t int8_mode, @@ -421,7 +445,18 @@ class ParallelGptOp: public th::jit::CustomClassHolder { ~ParallelGptOp(); - vector forward(th::Tensor input_ids, th::Tensor input_lengths, const int64_t output_len); + vector forward(th::Tensor input_ids, + th::Tensor input_lengths, + const int64_t output_len, + const int64_t beam_width, + const int64_t top_k, + const double top_p, + const double beam_search_diversity_rate, + const double temperature, + const double len_penalty, + const double repetition_penalty, + const int64_t random_seed, + const int64_t return_cum_log_probs); private: const at::ScalarType st_; diff --git a/src/fastertransformer/th_op/multi_gpu_gpt/WeightTransposeCalibrateQuantizeOp.cc b/src/fastertransformer/th_op/multi_gpu_gpt/WeightTransposeCalibrateQuantizeOp.cc index d88332c8f..bf187c75b 100644 --- a/src/fastertransformer/th_op/multi_gpu_gpt/WeightTransposeCalibrateQuantizeOp.cc +++ b/src/fastertransformer/th_op/multi_gpu_gpt/WeightTransposeCalibrateQuantizeOp.cc @@ -24,8 +24,9 @@ void ldnCalibrateWeightPerChannel(float* scale_out, const T* weight, const int k float amax = 0.0f; for (int k_i = 0; k_i < k; k_i++) { float val = fabs(weight[k_i * n + n_i]); - if (amax < val) + if (amax < val) { amax = val; + } } scale_out[n_i] = amax / 127.0f; } @@ -66,8 +67,9 @@ std::vector weight_transpose_calibrate_quantize(Tensor weight) auto stream = at::cuda::getCurrentCUDAStream().stream(); - invokeLdnCalibrateWeightPerChannel(scale_out, weight_, k, n, stream); - invokeLdnTransposeQuantizeWeightPerChannel(int8_weight_out, scale_out, weight_, k, n, stream); + fastertransformer::invokeLdnCalibrateWeightPerChannel(scale_out, weight_, k, n, stream); + fastertransformer::invokeLdnTransposeQuantizeWeightPerChannel( + int8_weight_out, scale_out, weight_, k, n, stream); return std::vector{int8_weight, scale}; } diff --git a/src/fastertransformer/th_op/multi_gpu_gpt/WeightTransposeCalibrateQuantizeOp.h b/src/fastertransformer/th_op/multi_gpu_gpt/WeightTransposeCalibrateQuantizeOp.h index 65bf45345..a1e918768 100644 --- a/src/fastertransformer/th_op/multi_gpu_gpt/WeightTransposeCalibrateQuantizeOp.h +++ b/src/fastertransformer/th_op/multi_gpu_gpt/WeightTransposeCalibrateQuantizeOp.h @@ -15,13 +15,7 @@ */ #include "src/fastertransformer/kernels/calibrate_quantize_weight_kernels.h" -#include "src/fastertransformer/th_op/th_traits.h" #include "src/fastertransformer/th_op/th_utils.h" -#include "src/fastertransformer/utils/cuda_utils.h" -#include "torch/csrc/cuda/Stream.h" -#include -#include -#include namespace torch_ext { using torch::Tensor; diff --git a/src/fastertransformer/th_op/swin/CMakeLists.txt b/src/fastertransformer/th_op/swin/CMakeLists.txt new file mode 100644 index 000000000..479891ca4 --- /dev/null +++ b/src/fastertransformer/th_op/swin/CMakeLists.txt @@ -0,0 +1,32 @@ +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +cmake_minimum_required(VERSION 3.13) + +set(swintransformer_ths_files + SwinOp.cc + SwinINT8Op.cc + WeightQuantizeOp.cc +) + +add_definitions(-DTORCH_CUDA=1) + +if(BUILD_PYT) + set(LIB_NAME "pyt_swintransformer") + add_library(${LIB_NAME} SHARED ${swintransformer_ths_files}) + set_target_properties(${LIB_NAME} PROPERTIES + CUDA_RESOLVE_DEVICE_SYMBOLS ON) + target_link_libraries(${LIB_NAME} "${TORCH_LIBRARIES}" Swin SwinINT8 + cublasINT8MMWrapper cublasAlgoMap trt_fused_multi_head_attention + gen_relative_pos_bias quantize_weight -lcudnn -lcublas -lcudart) +endif() diff --git a/src/fastertransformer/th_op/swin/SwinINT8Op.cc b/src/fastertransformer/th_op/swin/SwinINT8Op.cc new file mode 100644 index 000000000..e6b8a7131 --- /dev/null +++ b/src/fastertransformer/th_op/swin/SwinINT8Op.cc @@ -0,0 +1,203 @@ +/* + * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/th_op/swin/SwinINT8Op.h" + +namespace th = torch; +namespace torch_ext { + +SwinTransformerINT8Class::SwinTransformerINT8Class(std::vector w, + int64_t int8_mode, + th::Tensor depths, + th::Tensor num_heads, + int64_t max_batch, + int64_t img_size, + int64_t patch_size, + int64_t in_chans, + int64_t embed_dim, + int64_t window_size, + bool ape, + bool patch_norm, + int64_t layer_num, + double mlp_ratio, + bool qkv_bias, + double qk_scale): + st_(w[0].scalar_type()), depths_(depths), num_heads_(num_heads), weights_(w) +{ + + output_dim_ = embed_dim; + for (int i = 0; i < layer_num - 1; i++) { + output_dim_ *= 2; + } + + // for (int i = 0 ; i < weights_.size() ; i++) { + // CHECK_INPUT(weights_[i], st_); + // } + + CHECK_TYPE(depths, at::ScalarType::Int); + CHECK_CPU(depths); + CHECK_TYPE(num_heads, at::ScalarType::Int); + CHECK_CPU(num_heads); + + switch (st_) { + case at::ScalarType::Float: + swin_transformer_func_ = new SwinTransformerINT8Func(int8_mode, + max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + window_size, + get_ptr(depths), + get_ptr(num_heads), + ape, + patch_norm, + layer_num, + mlp_ratio, + qkv_bias, + qk_scale, + weights_); + break; + case at::ScalarType::Half: + swin_transformer_func_ = new SwinTransformerINT8Func(int8_mode, + max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + window_size, + get_ptr(depths), + get_ptr(num_heads), + ape, + patch_norm, + layer_num, + mlp_ratio, + qkv_bias, + qk_scale, + weights_); + break; + default: + throw std::runtime_error("Wrong Tensor type."); + } + info_int_ = torch::empty({11}, torch::dtype(torch::kInt64)); + info_int_[0] = max_batch; + info_int_[1] = img_size; + info_int_[2] = patch_size; + info_int_[3] = in_chans; + info_int_[4] = embed_dim; + info_int_[5] = window_size; + info_int_[6] = (int64_t)ape; + info_int_[7] = (int64_t)patch_norm; + info_int_[8] = layer_num; + info_int_[9] = (int64_t)qkv_bias; + info_int_[10] = int8_mode; + info_float_ = torch::empty({2}, torch::dtype(torch::kFloat64)); + info_float_[0] = mlp_ratio; + info_float_[1] = qk_scale; +} + +std::vector SwinTransformerINT8Class::get_pickle_info() const +{ + std::vector tmp(weights_); + tmp.push_back(depths_); + tmp.push_back(num_heads_); + tmp.push_back(info_int_); + tmp.push_back(info_float_); + return tmp; +} + +SwinTransformerINT8Class::~SwinTransformerINT8Class() +{ + delete swin_transformer_func_; +} + +th::Tensor SwinTransformerINT8Class::forward(th::Tensor input) +{ + CHECK_INPUT(input, st_); + int batch_size = input.size(0); + auto output = + torch::empty({batch_size, output_dim_}, torch::dtype(input.dtype()).device(torch::kCUDA).requires_grad(false)); + swin_transformer_func_->forward(batch_size, input, output); + return output; +} + +} // namespace torch_ext + +static auto swinTransformerINT8THS = + // #ifdef LEGACY_THS + // torch::jit::class_("SwinTransformerINT8Class") + // #else + torch::jit::class_("SwinTransformerINT8", "Class") + // #endif + .def(torch::jit::init, + int64_t, + th::Tensor, + th::Tensor, + int64_t, + int64_t, + int64_t, + int64_t, + int64_t, + int64_t, + bool, + bool, + int64_t, + double, + bool, + double>()) + .def("forward", &torch_ext::SwinTransformerINT8Class::forward) + .def_pickle( + [](const c10::intrusive_ptr& self) -> std::vector { + return self->get_pickle_info(); + }, + [](std::vector state) -> c10::intrusive_ptr { + int state_size = state.size(); + std::vector::const_iterator first = state.begin(); + std::vector::const_iterator last = state.begin() + (state_size - 4); + std::vector weights(first, last); + int idx = state.size() - 2; + int i = 0; + int64_t max_batch = state[idx][i++].item().to(); + int64_t img_size = state[idx][i++].item().to(); + int64_t patch_size = state[idx][i++].item().to(); + int64_t in_chans = state[idx][i++].item().to(); + int64_t embed_dim = state[idx][i++].item().to(); + int64_t window_size = state[idx][i++].item().to(); + bool ape = state[idx][i++].item().to(); + bool patch_norm = state[idx][i++].item().to(); + int64_t layer_num = state[idx][i++].item().to(); + bool qkv_bias = state[idx][i++].item().to(); + int64_t int8_mode = state[idx][i++].item().to(); + idx = state.size() - 1; + double mlp_ratio = state[idx][0].item().to(); + double qk_scale = state[idx][1].item().to(); + return c10::make_intrusive(weights, + int8_mode, + state[state_size - 4], + state[state_size - 3], + max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + window_size, + ape, + patch_norm, + layer_num, + mlp_ratio, + qkv_bias, + qk_scale); + }); diff --git a/src/fastertransformer/th_op/swin/SwinINT8Op.h b/src/fastertransformer/th_op/swin/SwinINT8Op.h new file mode 100644 index 000000000..ea920fc0e --- /dev/null +++ b/src/fastertransformer/th_op/swin/SwinINT8Op.h @@ -0,0 +1,274 @@ +/* + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/swin_int8/SwinINT8.h" +#include "src/fastertransformer/th_op/th_utils.h" + +namespace ft = fastertransformer; +namespace th = torch; + +namespace torch_ext { + +class ISwinTransformerINT8Func { +public: + virtual ~ISwinTransformerINT8Func() {} + virtual void forward(int batch_size, th::Tensor& input, th::Tensor& output) = 0; +}; + +template +class SwinTransformerINT8Func: public ISwinTransformerINT8Func { +public: + int sm_; + bool _use_ORDER_COL32_2R_4R4; + int int8_mode_; + int max_batch_; + int img_size_; + int patch_size_; + int in_chans_; + int embed_dim_; + int window_size_; + int* depths_; + int* num_heads_; + bool ape_; + bool patch_norm_; + int layer_num_; + float mlp_ratio_; + bool qkv_bias_; + float qk_scale_; + + SwinTransformerINT8Func(const int int8_mode, + const int max_batch, + const int img_size, + const int patch_size, + const int in_chans, + const int embed_dim, + const int window_size, + int* depths, + int* num_heads, + const bool ape, + const bool patch_norm, + const int layer_num, + const float mlp_ratio, + const bool qkv_bias, + const float qk_scale, + const std::vector& w): + weights_(w), + int8_mode_(int8_mode), + max_batch_(max_batch), + img_size_(img_size), + patch_size_(patch_size), + in_chans_(in_chans), + embed_dim_(embed_dim), + window_size_(window_size), + depths_(depths), + num_heads_(num_heads), + ape_(ape), + patch_norm_(patch_norm), + layer_num_(layer_num), + mlp_ratio_(mlp_ratio), + qkv_bias_(qkv_bias), + qk_scale_(qk_scale) + { + ft::check_cuda_error(cublasCreate(&cublas_handle_)); + ft::check_cuda_error(cublasLtCreate(&cublaslt_handle_)); + checkCUDNN(cudnnCreate(&cudnn_handle_)); + + sm_ = ft::getSMVersion(); + + _use_ORDER_COL32_2R_4R4 = false; + if (sm_ >= 80) { + _use_ORDER_COL32_2R_4R4 = true; + } + + cublas_algo_map_ = new ft::cublasAlgoMap(IGEMM_CONFIG, ""); + cublas_wrapper_mutex_ = new std::mutex(); + + // We arrange weights layer by layer and block by block inside each layer; + // each block has 13 weights + // each layer has a block list && 4 weights + // each swin transformer has a layer list && 6 weights && 3 handles + + int weight_num = 6; + for (int l = 0; l < layer_num; l++) { + for (int di = 0; di < depths[l]; di++) { + weight_num += 15; + } + weight_num += 4; + } + if (weight_num != weights_.size()) { + printf("[ERROR][SwinTransformerINT8Func] weights number %lu does not match expected number %d!\n", + weights_.size(), + weight_num); + exit(-1); + } + + int weight_idx = 0; + int hidden_dim = embed_dim; + for (int l = 0; l < layer_num; l++) { + ft::SwinTransformerINT8BasicLayerWeight bl; + for (int di = 0; di < depths[l]; di++) { + ft::SwinTransformerINT8BlockWeight p; + p.attention_weights.query_weight.kernel = get_ptr(weights_[weight_idx++]); + p.attention_weights.query_weight.bias = get_ptr(weights_[weight_idx++]); + p.attention_weights.attention_output_weight.kernel = get_ptr(weights_[weight_idx++]); + p.attention_weights.attention_output_weight.bias = get_ptr(weights_[weight_idx++]); + p.ffn_weights.intermediate_weight.kernel = get_ptr(weights_[weight_idx++]); + p.ffn_weights.intermediate_weight.bias = get_ptr(weights_[weight_idx++]); + p.ffn_weights.output_weight.kernel = get_ptr(weights_[weight_idx++]); + p.ffn_weights.output_weight.bias = get_ptr(weights_[weight_idx++]); + p.attn_layernorm_weights.gamma = get_ptr(weights_[weight_idx++]); + p.attn_layernorm_weights.beta = get_ptr(weights_[weight_idx++]); + p.ffn_layernorm_weights.gamma = get_ptr(weights_[weight_idx++]); + p.ffn_layernorm_weights.beta = get_ptr(weights_[weight_idx++]); + p.scalelist.size_ = ACTIVATION_AMAX_NUM + 5 + INT8O_GEMM_NUM + TRT_AMAX_NUM; + p.scalelist.p2_offset_ = ACTIVATION_AMAX_NUM; + p.scalelist.p3_offset_ = ACTIVATION_AMAX_NUM + 5; + p.scalelist.p4_offset_ = ACTIVATION_AMAX_NUM + 5 + INT8O_GEMM_NUM; + p.scalelist.d_scale_list_ = get_ptr(weights_[weight_idx++]); + p.scalelist.h_scale_list_ = get_ptr(weights_[weight_idx++]); + p.attention_relative_pos_bias = get_ptr(weights_[weight_idx++]); + bl.block_weight_list.push_back(p); + } + bl.merge_layernorm_weights.gamma = get_ptr(weights_[weight_idx++]); + bl.merge_layernorm_weights.beta = get_ptr(weights_[weight_idx++]); + bl.merge_linear_weights.kernel = get_ptr(weights_[weight_idx++]); + bl.attn_mask = get_ptr(weights_[weight_idx++]); + + params_.basic_layer_weight_list.push_back(bl); + hidden_dim *= 2; + } + params_.patchEmbed_linear_weights.kernel = get_ptr(weights_[weight_idx++]); + params_.patchEmbed_linear_weights.bias = get_ptr(weights_[weight_idx++]); + params_.patchEmbed_norm_weights.gamma = get_ptr(weights_[weight_idx++]); + params_.patchEmbed_norm_weights.beta = get_ptr(weights_[weight_idx++]); + params_.norm_weights.gamma = get_ptr(weights_[weight_idx++]); + params_.norm_weights.beta = get_ptr(weights_[weight_idx++]); + } + + ~SwinTransformerINT8Func() override + { + ft::check_cuda_error(cublasDestroy(cublas_handle_)); + ft::check_cuda_error(cublasLtDestroy(cublaslt_handle_)); + checkCUDNN(cudnnDestroy(cudnn_handle_)); + delete cublas_algo_map_; + delete cublas_wrapper_mutex_; + } + + void forward(int batch_size, th::Tensor& input, th::Tensor& output) override + { + auto stream = at::cuda::getCurrentCUDAStream().stream(); + + ft::cublasINT8MMWrapper* cublas_wrapper = new ft::cublasINT8MMWrapper( + cublas_handle_, cublaslt_handle_, stream, cublas_algo_map_, cublas_wrapper_mutex_, _use_ORDER_COL32_2R_4R4); + + if (std::is_same::value) { + cublas_wrapper->setFP16GemmConfig(); + } + else if (std::is_same::value) { + cublas_wrapper->setFP32GemmConfig(); + } + + ft::Allocator* allocator = new ft::Allocator(); + + ft::SwinTransformerINT8* swin_transformer = new ft::SwinTransformerINT8(int8_mode_, + max_batch_, + img_size_, + patch_size_, + in_chans_, + embed_dim_, + window_size_, + depths_, + num_heads_, + ape_, + patch_norm_, + layer_num_, + mlp_ratio_, + cudnn_handle_, + stream, + cublas_wrapper, + allocator, + true, + qkv_bias_, + qk_scale_); + + ft::DataType data_type = ft::getTensorType(); + int sm_ptr[1] = {sm_}; + std::vector input_tensors = std::vector{ + ft::Tensor{ft::MEMORY_GPU, + data_type, + std::vector{(size_t)batch_size, (size_t)img_size_ * img_size_, (size_t)in_chans_}, + get_ptr(input)}, + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT8, std::vector{1}, sm_ptr}}; + + std::vector output_tensors = std::vector{ + ft::Tensor{ft::MEMORY_GPU, + data_type, + std::vector{(size_t)batch_size, (size_t)img_size_ * img_size_, (size_t)in_chans_}, + get_ptr(output)}}; + + swin_transformer->forward(&output_tensors, &input_tensors, params_); + delete swin_transformer; + delete cublas_wrapper; + delete allocator; + } + +private: + std::vector weights_; + cublasHandle_t cublas_handle_ = nullptr; + cudnnHandle_t cudnn_handle_ = nullptr; + cublasLtHandle_t cublaslt_handle_ = nullptr; + ft::SwinTransformerINT8Weight params_; + std::mutex* cublas_wrapper_mutex_; + ft::cublasAlgoMap* cublas_algo_map_; +}; + +class SwinTransformerINT8Class: public torch::jit::CustomClassHolder { +public: + SwinTransformerINT8Class(std::vector w, + int64_t int8_mode, + th::Tensor depths, + th::Tensor num_heads, + int64_t max_batch, + int64_t img_size, + int64_t patch_size, + int64_t in_chans, + int64_t embed_dim, + int64_t window_size, + bool ape, + bool patch_norm, + int64_t layer_num, + double mlp_ratio, + bool qkv_bias = true, + double qk_scale = 1.0); + + ~SwinTransformerINT8Class(); + + th::Tensor forward(th::Tensor input); + + std::vector get_pickle_info() const; + +private: + const at::ScalarType st_; + ISwinTransformerINT8Func* swin_transformer_func_; + std::vector weights_; + th::Tensor depths_; + th::Tensor num_heads_; + th::Tensor info_int_; + th::Tensor info_float_; + int output_dim_; +}; + +} // namespace torch_ext diff --git a/src/fastertransformer/th_op/swin/SwinOp.cc b/src/fastertransformer/th_op/swin/SwinOp.cc new file mode 100644 index 000000000..7a9e18436 --- /dev/null +++ b/src/fastertransformer/th_op/swin/SwinOp.cc @@ -0,0 +1,219 @@ +/* + * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "SwinOp.h" + +namespace th = torch; +namespace torch_ext { + +template class SwinTransformerFunc; +template class SwinTransformerFunc; + +SwinTransformerClass::SwinTransformerClass(std::vector w, + th::Tensor depths, + th::Tensor num_heads, + int64_t max_batch, + int64_t img_size, + int64_t patch_size, + int64_t in_chans, + int64_t embed_dim, + int64_t window_size, + bool ape, + bool patch_norm, + int64_t layer_num, + double mlp_ratio, + bool qkv_bias, + double qk_scale): + st_(w[0].scalar_type()), depths_(depths), num_heads_(num_heads), weights_(w) +{ + + output_dim_ = embed_dim; + for (int i = 0; i < layer_num - 1; i++) { + output_dim_ *= 2; + } + + for (int i = 0; i < weights_.size(); i++) { + CHECK_INPUT(weights_[i], st_); + } + + CHECK_TYPE(depths, at::ScalarType::Int); + CHECK_TYPE(num_heads, at::ScalarType::Int); + + switch (st_) { + case at::ScalarType::Float: + swin_transformer_func_ = new SwinTransformerFunc(max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + window_size, + get_ptr(depths), + get_ptr(num_heads), + ape, + patch_norm, + layer_num, + mlp_ratio, + qkv_bias, + qk_scale, + weights_); + break; + case at::ScalarType::Half: + swin_transformer_func_ = new SwinTransformerFunc(max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + window_size, + get_ptr(depths), + get_ptr(num_heads), + ape, + patch_norm, + layer_num, + mlp_ratio, + qkv_bias, + qk_scale, + weights_); + break; + default: + throw std::runtime_error("Wrong th::Tensor type."); + } + info_int_ = torch::empty({10}, torch::dtype(torch::kInt64)); + info_int_[0] = max_batch; + info_int_[1] = img_size; + info_int_[2] = patch_size; + info_int_[3] = in_chans; + info_int_[4] = embed_dim; + info_int_[5] = window_size; + info_int_[6] = (int64_t)ape; + info_int_[7] = (int64_t)patch_norm; + info_int_[8] = layer_num; + info_int_[9] = (int64_t)qkv_bias; + info_float_ = torch::empty({2}, torch::dtype(torch::kFloat64)); + info_float_[0] = mlp_ratio; + info_float_[1] = qk_scale; +} + +std::vector SwinTransformerClass::get_pickle_info() const +{ + std::vector tmp(weights_); + tmp.push_back(depths_); + tmp.push_back(num_heads_); + tmp.push_back(info_int_); + tmp.push_back(info_float_); + return tmp; +} + +SwinTransformerClass::~SwinTransformerClass() +{ + delete swin_transformer_func_; +} + +th::Tensor SwinTransformerClass::forward(th::Tensor input) +{ + CHECK_INPUT(input, st_); + int batch_size = input.size(0); + auto output = + torch::empty({batch_size, output_dim_}, torch::dtype(input.dtype()).device(torch::kCUDA).requires_grad(false)); + swin_transformer_func_->forward(batch_size, input, output); + return output; +} + +th::Tensor gen_relative_pos_bias(th::Tensor relative_position_bias_table, + th::Tensor relative_position_bias_index, + const int64_t window_size, + const int64_t head_num) +{ + const at::ScalarType _st = relative_position_bias_table.scalar_type(); + CHECK_INPUT(relative_position_bias_table, _st); + switch (_st) { + case at::ScalarType::Float: + return gen_relative_pos_bias_impl( + relative_position_bias_table, relative_position_bias_index, window_size, head_num); + case at::ScalarType::Half: + return gen_relative_pos_bias_impl( + relative_position_bias_table, relative_position_bias_index, window_size, head_num); + default: + throw std::runtime_error("Wrong th::Tensor type."); + } +} + +} // namespace torch_ext + +static auto swinTransformerTHS = +#ifdef LEGACY_THS + torch::jit::class_("SwinTransformerClass") +#else + torch::jit::class_("SwinTransformer", "Class") +#endif + .def(torch::jit::init, + th::Tensor, + th::Tensor, + int64_t, + int64_t, + int64_t, + int64_t, + int64_t, + int64_t, + bool, + bool, + int64_t, + double, + bool, + double>()) + .def("forward", &torch_ext::SwinTransformerClass::forward) + .def_pickle( + [](const c10::intrusive_ptr& self) -> std::vector { + return self->get_pickle_info(); + }, + [](std::vector state) -> c10::intrusive_ptr { + int state_size = state.size(); + std::vector::const_iterator first = state.begin(); + std::vector::const_iterator last = state.begin() + (state_size - 4); + std::vector weights(first, last); + int idx = state.size() - 2; + int i = 0; + int64_t max_batch = state[idx][i++].item().to(); + int64_t img_size = state[idx][i++].item().to(); + int64_t patch_size = state[idx][i++].item().to(); + int64_t in_chans = state[idx][i++].item().to(); + int64_t embed_dim = state[idx][i++].item().to(); + int64_t window_size = state[idx][i++].item().to(); + bool ape = state[idx][i++].item().to(); + bool patch_norm = state[idx][i++].item().to(); + int64_t layer_num = state[idx][i++].item().to(); + bool qkv_bias = state[idx][i++].item().to(); + idx = state.size() - 1; + double mlp_ratio = state[idx][0].item().to(); + double qk_scale = state[idx][1].item().to(); + return c10::make_intrusive(weights, + state[state_size - 4], + state[state_size - 3], + max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + window_size, + ape, + patch_norm, + layer_num, + mlp_ratio, + qkv_bias, + qk_scale); + }); + +static auto gen_relative_pos_bias = + torch::RegisterOperators("fastertransformer::gen_relative_pos_bias", &torch_ext::gen_relative_pos_bias); diff --git a/src/fastertransformer/th_op/swin/SwinOp.h b/src/fastertransformer/th_op/swin/SwinOp.h new file mode 100644 index 000000000..58e805e45 --- /dev/null +++ b/src/fastertransformer/th_op/swin/SwinOp.h @@ -0,0 +1,281 @@ +/* + * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/gen_relative_pos_bias.h" +#include "src/fastertransformer/models/swin/Swin.h" +#include "src/fastertransformer/th_op/th_utils.h" + +namespace ft = fastertransformer; +namespace th = torch; + +namespace torch_ext { + +class ISwinTransformerFunc { +public: + virtual ~ISwinTransformerFunc() {} + virtual void forward(int batch_size, th::Tensor& input, th::Tensor& output) = 0; +}; + +template +class SwinTransformerFunc: public ISwinTransformerFunc { +public: + int sm_; + int max_batch_; + int img_size_; + int patch_size_; + int in_chans_; + int embed_dim_; + int window_size_; + int* depths_; + int* num_heads_; + bool ape_; + bool patch_norm_; + int layer_num_; + float mlp_ratio_; + bool qkv_bias_; + float qk_scale_; + + SwinTransformerFunc(const int max_batch, + const int img_size, + const int patch_size, + const int in_chans, + const int embed_dim, + const int window_size, + int* depths, + int* num_heads, + const bool ape, + const bool patch_norm, + const int layer_num, + const float mlp_ratio, + const bool qkv_bias, + const float qk_scale, + const std::vector& w): + weights_(w), + max_batch_(max_batch), + img_size_(img_size), + patch_size_(patch_size), + in_chans_(in_chans), + embed_dim_(embed_dim), + window_size_(window_size), + depths_(depths), + num_heads_(num_heads), + ape_(ape), + patch_norm_(patch_norm), + layer_num_(layer_num), + mlp_ratio_(mlp_ratio), + qkv_bias_(qkv_bias), + qk_scale_(qk_scale) + { + ft::check_cuda_error(cublasCreate(&cublas_handle_)); + ft::check_cuda_error(cublasLtCreate(&cublaslt_handle_)); + checkCUDNN(cudnnCreate(&cudnn_handle_)); + + sm_ = ft::getSMVersion(); + + cublas_algo_map_ = new ft::cublasAlgoMap(GEMM_CONFIG, ""); + cublas_wrapper_mutex_ = new std::mutex(); + + // We arrange weights layer by layer and block by block inside each layer; + // each block has 13 weights + // each layer has a block list && 4 weights + // each swin transformer has a layer list && 6 weights && 3 handles + + int weight_num = 6; + for (int l = 0; l < layer_num; l++) { + for (int di = 0; di < depths[l]; di++) { + weight_num += 13; + } + weight_num += 4; + } + if (weight_num != weights_.size()) { + printf("[ERROR][SwinTransformerFunc] weights number %lu does not match expected number %d!\n", + weights_.size(), + weight_num); + exit(-1); + } + + int weight_idx = 0; + for (int l = 0; l < layer_num; l++) { + ft::SwinTransformerBasicLayerWeight bl; + for (int di = 0; di < depths[l]; di++) { + ft::SwinTransformerBlockWeight p; + p.attention_weights.query_weight.kernel = get_ptr(weights_[weight_idx++]); + p.attention_weights.query_weight.bias = get_ptr(weights_[weight_idx++]); + p.attention_weights.attention_output_weight.kernel = get_ptr(weights_[weight_idx++]); + p.attention_weights.attention_output_weight.bias = get_ptr(weights_[weight_idx++]); + p.ffn_weights.intermediate_weight.kernel = get_ptr(weights_[weight_idx++]); + p.ffn_weights.intermediate_weight.bias = get_ptr(weights_[weight_idx++]); + p.ffn_weights.output_weight.kernel = get_ptr(weights_[weight_idx++]); + p.ffn_weights.output_weight.bias = get_ptr(weights_[weight_idx++]); + p.attn_layernorm_weights.gamma = get_ptr(weights_[weight_idx++]); + p.attn_layernorm_weights.beta = get_ptr(weights_[weight_idx++]); + p.ffn_layernorm_weights.gamma = get_ptr(weights_[weight_idx++]); + p.ffn_layernorm_weights.beta = get_ptr(weights_[weight_idx++]); + p.attention_relative_pos_bias = get_ptr(weights_[weight_idx++]); + bl.block_weight_list.push_back(p); + } + bl.merge_layernorm_weights.gamma = get_ptr(weights_[weight_idx++]); + bl.merge_layernorm_weights.beta = get_ptr(weights_[weight_idx++]); + bl.merge_linear_weights.kernel = get_ptr(weights_[weight_idx++]); + bl.attn_mask = get_ptr(weights_[weight_idx++]); + params_.basic_layer_weight_list.push_back(bl); + } + params_.patchEmbed_linear_weights.kernel = get_ptr(weights_[weight_idx++]); + params_.patchEmbed_linear_weights.bias = get_ptr(weights_[weight_idx++]); + params_.patchEmbed_norm_weights.gamma = get_ptr(weights_[weight_idx++]); + params_.patchEmbed_norm_weights.beta = get_ptr(weights_[weight_idx++]); + params_.norm_weights.gamma = get_ptr(weights_[weight_idx++]); + params_.norm_weights.beta = get_ptr(weights_[weight_idx++]); + } + + ~SwinTransformerFunc() override + { + ft::check_cuda_error(cublasDestroy(cublas_handle_)); + ft::check_cuda_error(cublasLtDestroy(cublaslt_handle_)); + checkCUDNN(cudnnDestroy(cudnn_handle_)); + delete cublas_algo_map_; + delete cublas_wrapper_mutex_; + } + + void forward(int batch_size, th::Tensor& input, th::Tensor& output) override + { + auto stream = at::cuda::getCurrentCUDAStream().stream(); + + ft::Allocator* allocator = new ft::Allocator(); + + ft::cublasMMWrapper* cublas_wrapper = new ft::cublasMMWrapper( + cublas_handle_, cublaslt_handle_, stream, cublas_algo_map_, cublas_wrapper_mutex_, allocator); + + if (std::is_same::value) { + cublas_wrapper->setFP16GemmConfig(); + } + else if (std::is_same::value) { + cublas_wrapper->setFP32GemmConfig(); + } + + ft::SwinTransformer* swin_transformer = new ft::SwinTransformer(max_batch_, + img_size_, + patch_size_, + in_chans_, + embed_dim_, + window_size_, + depths_, + num_heads_, + ape_, + patch_norm_, + layer_num_, + mlp_ratio_, + cudnn_handle_, + stream, + cublas_wrapper, + allocator, + true, + qkv_bias_, + qk_scale_); + + ft::DataType data_type = ft::getTensorType(); + int sm_ptr[1] = {sm_}; + std::vector input_tensors = std::vector{ + ft::Tensor{ft::MEMORY_GPU, + data_type, + std::vector{(size_t)batch_size, (size_t)img_size_ * img_size_, (size_t)in_chans_}, + get_ptr(input)}, + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT8, std::vector{1}, sm_ptr}}; + + std::vector output_tensors = std::vector{ + ft::Tensor{ft::MEMORY_GPU, + data_type, + std::vector{(size_t)batch_size, (size_t)img_size_ * img_size_, (size_t)in_chans_}, + get_ptr(output)}}; + swin_transformer->forward(&output_tensors, &input_tensors, params_); + delete swin_transformer; + delete cublas_wrapper; + delete allocator; + } + +private: + std::vector weights_; + cublasHandle_t cublas_handle_ = nullptr; + cublasLtHandle_t cublaslt_handle_ = nullptr; + cudnnHandle_t cudnn_handle_ = nullptr; + ft::SwinTransformerWeight params_; + std::mutex* cublas_wrapper_mutex_; + ft::cublasAlgoMap* cublas_algo_map_; +}; + +class SwinTransformerClass: public torch::jit::CustomClassHolder { +public: + SwinTransformerClass(std::vector w, + th::Tensor depths, + th::Tensor num_heads, + int64_t max_batch, + int64_t img_size, + int64_t patch_size, + int64_t in_chans, + int64_t embed_dim, + int64_t window_size, + bool ape, + bool patch_norm, + int64_t layer_num, + double mlp_ratio, + bool qkv_bias = true, + double qk_scale = 1.0); + + ~SwinTransformerClass(); + + th::Tensor forward(th::Tensor input); + + std::vector get_pickle_info() const; + +private: + const at::ScalarType st_; + ISwinTransformerFunc* swin_transformer_func_; + std::vector weights_; + th::Tensor depths_; + th::Tensor num_heads_; + th::Tensor info_int_; + th::Tensor info_float_; + int output_dim_; +}; + +template +th::Tensor gen_relative_pos_bias_impl(th::Tensor relative_position_bias_table, + th::Tensor relative_position_bias_index, + const int window_size, + const int head_num) +{ + auto stream = at::cuda::getCurrentCUDAStream().stream(); + int window_len = window_size * window_size; + const T* relative_position_bias_table_ptr = get_ptr(relative_position_bias_table); + CHECK_INPUT(relative_position_bias_index, at::ScalarType::Long); + const int64_t* relative_position_bias_index_ptr = get_ptr(relative_position_bias_index); + auto output = + torch::empty({head_num, window_len, window_len}, + torch::dtype(relative_position_bias_table.dtype()).device(torch::kCUDA).requires_grad(false)); + T* output_ptr = get_ptr(output); + + ft::invokeGenRelativePosBias( + output_ptr, relative_position_bias_table_ptr, relative_position_bias_index_ptr, window_size, head_num, stream); + + return output; +} + +th::Tensor gen_relative_pos_bias(th::Tensor relative_position_bias_table, + th::Tensor relative_position_bias_index, + const int64_t window_size, + const int64_t head_num); + +} // namespace torch_ext diff --git a/src/fastertransformer/th_op/swin/WeightQuantizeOp.cc b/src/fastertransformer/th_op/swin/WeightQuantizeOp.cc new file mode 100644 index 000000000..e92b109c3 --- /dev/null +++ b/src/fastertransformer/th_op/swin/WeightQuantizeOp.cc @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/quantize_weight.h" +#include "src/fastertransformer/th_op/th_utils.h" + +namespace torch_ext { +using torch::Tensor; +using namespace fastertransformer; + +Tensor swin_weight_quantize(Tensor weight, Tensor quant_max) +{ + bool use_ORDER_COL32_2R_4R4 = false; +#if (CUDART_VERSION >= 11000) + int device{-1}; + cudaGetDevice(&device); + cudaDeviceProp props; + cudaGetDeviceProperties(&props, device); + if (props.major * 10 + props.minor >= 80) { + use_ORDER_COL32_2R_4R4 = true; + } +#endif + + CHECK_TH_CUDA(weight); + TORCH_CHECK(weight.dtype() == torch::kFloat16, "weight dtype should be float16"); + TORCH_CHECK(weight.numel() != 0, "weight should not be empty tensor"); + TORCH_CHECK(weight.dim() == 2, "Invalid rank. The rank of weight should be 2"); + + int k = weight.size(0); + int n = weight.size(1); + + CHECK_TH_CUDA(quant_max); + TORCH_CHECK(quant_max.dtype() == torch::kFloat32, "quant_max dtype should be float32"); + TORCH_CHECK(quant_max.numel() == 1, "quant_max wrong shape"); + + const half* weight_ = get_ptr(weight); + const float* quant_max_ = get_ptr(quant_max); + + auto output = torch::empty({k * n}, torch::dtype(torch::kFloat16).device(torch::kCUDA).requires_grad(false)); + int8_t* transform_out = get_ptr(output); + + auto stream = at::cuda::getCurrentCUDAStream().stream(); + + int format = use_ORDER_COL32_2R_4R4 ? 1 : 2; + const int scale_is_vector = 0; + invokeQuantizeWeight(transform_out, weight_, quant_max_, n, k, format, stream, scale_is_vector); + return output; +} + +} // namespace torch_ext + +static auto weight_quantize = + torch::RegisterOperators("fastertransformer::swin_weight_quantize", &torch_ext::swin_weight_quantize); diff --git a/src/fastertransformer/th_op/t5/CMakeLists.txt b/src/fastertransformer/th_op/t5/CMakeLists.txt index 96c15b805..ccf7a073d 100644 --- a/src/fastertransformer/th_op/t5/CMakeLists.txt +++ b/src/fastertransformer/th_op/t5/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/src/fastertransformer/th_op/t5/T5DecoderOp.h b/src/fastertransformer/th_op/t5/T5DecoderOp.h index 765cbac78..0baf864f6 100644 --- a/src/fastertransformer/th_op/t5/T5DecoderOp.h +++ b/src/fastertransformer/th_op/t5/T5DecoderOp.h @@ -14,18 +14,7 @@ * limitations under the License. */ -#include -#include -#include -#include - -#include "torch/csrc/cuda/Stream.h" -#include -#include -#include - #include "src/fastertransformer/models/t5/T5Decoder.h" -#include "src/fastertransformer/th_op/th_traits.h" #include "src/fastertransformer/th_op/th_utils.h" #include "src/fastertransformer/utils/mpi_utils.h" @@ -75,7 +64,7 @@ class FTT5Decoder: public IFT5Decoder { init_nccl_comm(); int hidden_dim = _head_num * _head_size; - check_cuda_error(cublasLtCreate(&_cublasltHandle)); + ft::check_cuda_error(cublasLtCreate(&_cublasltHandle)); cublas_algo_map_ = new ft::cublasAlgoMap("gemm_config.in"); cublas_wrapper_mutex_ = new std::mutex(); @@ -84,17 +73,20 @@ class FTT5Decoder: public IFT5Decoder { for (int i = 0; i < _layer_num; ++i) { int local_num_layer = (int)(ceil(_layer_num * 1.0f / pipeline_para_.world_size_)); - if (!(i < _layer_num && (i >= local_num_layer * pipeline_para_.rank_) && (i < local_num_layer * (pipeline_para_.rank_ + 1)))) { + if (!(i < _layer_num && (i >= local_num_layer * pipeline_para_.rank_) + && (i < local_num_layer * (pipeline_para_.rank_ + 1)))) { continue; } const int first_layer_index = local_num_layer * pipeline_para_.rank_; - decoder_layer_weights[i]->pre_layernorm_weights.gamma = get_ptr(_weights[0]) + (i - first_layer_index) * _d_model; + decoder_layer_weights[i]->pre_layernorm_weights.gamma = + get_ptr(_weights[0]) + (i - first_layer_index) * _d_model; decoder_layer_weights[i]->self_attention_weights.query_weight.kernel = get_ptr(_weights[1]) + (i - first_layer_index) * _d_model * 3 * hidden_dim; decoder_layer_weights[i]->self_attention_weights.attention_output_weight.kernel = get_ptr(_weights[2]) + (i - first_layer_index) * hidden_dim * _d_model; - decoder_layer_weights[i]->self_attn_layernorm_weights.gamma = get_ptr(_weights[3]) + (i - first_layer_index) * _d_model; + decoder_layer_weights[i]->self_attn_layernorm_weights.gamma = + get_ptr(_weights[3]) + (i - first_layer_index) * _d_model; decoder_layer_weights[i]->cross_attention_weights.query_weight.kernel = get_ptr(_weights[4]) + (i - first_layer_index) * _d_model * hidden_dim; decoder_layer_weights[i]->cross_attention_weights.key_weight.kernel = @@ -103,7 +95,8 @@ class FTT5Decoder: public IFT5Decoder { get_ptr(_weights[6]) + (i - first_layer_index) * _mem_d_model * hidden_dim; decoder_layer_weights[i]->cross_attention_weights.attention_output_weight.kernel = get_ptr(_weights[7]) + (i - first_layer_index) * hidden_dim * _d_model; - decoder_layer_weights[i]->cross_attn_layernorm_weights.gamma = get_ptr(_weights[8]) + (i - first_layer_index) * _d_model; + decoder_layer_weights[i]->cross_attn_layernorm_weights.gamma = + get_ptr(_weights[8]) + (i - first_layer_index) * _d_model; decoder_layer_weights[i]->ffn_weights.intermediate_weight.kernel = get_ptr(_weights[9]) + (i - first_layer_index) * _d_model * _inter_size; decoder_layer_weights[i]->ffn_weights.output_weight.kernel = @@ -113,6 +106,21 @@ class FTT5Decoder: public IFT5Decoder { void init_nccl_comm() { + int mpi_initialized; + MPICHECK(MPI_Initialized(&mpi_initialized)); + if (!mpi_initialized) { + printf("[INFO] MPI is not initialized! Skipped the NCCL communication initialization.\n"); + if (tensor_para_.world_size_ != 1) { + printf("[FATAL] MPI initialization can only be skipped when tensor_para_size=1, but got %d!\n", + tensor_para_.world_size_); + } + if (pipeline_para_.world_size_ != 1) { + printf("[FATAL] MPI initialization can only be skipped when pipeline_para_size=1, but got %d!\n", + pipeline_para_.world_size_); + } + return; + } + int rank, world_size; MPICHECK(MPI_Comm_rank(MPI_COMM_WORLD, &rank)); MPICHECK(MPI_Comm_size(MPI_COMM_WORLD, &world_size)); @@ -131,15 +139,14 @@ class FTT5Decoder: public IFT5Decoder { // n, ..., 2n - 1 are in group 1. NCCLCHECK(ncclGetUniqueId(&tensor_para_nccl_uid)); for (int i = 1; i < (int)tensor_para_.world_size_; i++) { - printf("[INFO] rank %d sends tensor_para_nccl_uid to rank %d \n", rank, rank + i); + FT_LOG_INFO("rank %d sends tensor_para_nccl_uid to rank %d \n", rank, rank + i); MPICHECK(MPI_Send( &tensor_para_nccl_uid, sizeof(tensor_para_nccl_uid), MPI_BYTE, rank + i, 0, MPI_COMM_WORLD)); } } else { MPI_Status status; - printf( - "[INFO] rank %d receives tensor_para_nccl_uid from rank %d \n", rank, rank - (int)tensor_para_.rank_); + FT_LOG_INFO("rank %d receives tensor_para_nccl_uid from rank %d \n", rank, rank - (int)tensor_para_.rank_); MPICHECK(MPI_Recv(&tensor_para_nccl_uid, sizeof(tensor_para_nccl_uid), MPI_BYTE, @@ -155,9 +162,9 @@ class FTT5Decoder: public IFT5Decoder { // 1, k+1, 2k+1 are in group 1 NCCLCHECK(ncclGetUniqueId(&pipeline_para_nccl_uid)); for (int i = 1; i < (int)pipeline_para_.world_size_; i++) { - printf("[INFO] rank %d sends pipeline_para_nccl_uid to rank %d \n", - rank, - rank + i * (int)tensor_para_.world_size_); + FT_LOG_INFO("rank %d sends pipeline_para_nccl_uid to rank %d \n", + rank, + rank + i * (int)tensor_para_.world_size_); MPICHECK(MPI_Send(&pipeline_para_nccl_uid, sizeof(pipeline_para_nccl_uid), MPI_BYTE, @@ -168,9 +175,8 @@ class FTT5Decoder: public IFT5Decoder { } else { MPI_Status status; - printf("[INFO] rank %d receives pipeline_para_nccl_uid from rank %d \n", - rank, - rank % (int)tensor_para_.world_size_); + FT_LOG_INFO( + "rank %d receives pipeline_para_nccl_uid from rank %d \n", rank, rank % (int)tensor_para_.world_size_); MPICHECK(MPI_Recv(&pipeline_para_nccl_uid, sizeof(pipeline_para_nccl_uid), MPI_BYTE, @@ -208,8 +214,8 @@ class FTT5Decoder: public IFT5Decoder { auto stream = at::cuda::getCurrentCUDAStream().stream(); cublasHandle_t _cublasHandle = at::cuda::getCurrentCUDABlasHandle(); cublasSetStream(_cublasHandle, stream); - fastertransformer::Allocator* allocator = - new fastertransformer::Allocator(); + fastertransformer::Allocator* allocator = + new fastertransformer::Allocator(); ft::cublasMMWrapper* cublas_wrapper = new ft::cublasMMWrapper( _cublasHandle, _cublasltHandle, stream, cublas_algo_map_, cublas_wrapper_mutex_, allocator); @@ -231,7 +237,8 @@ class FTT5Decoder: public IFT5Decoder { allocator, true, tensor_para_, - pipeline_para_); + pipeline_para_, + ft::ActivationType::Relu); int tmp_step = step + 1; std::vector input_tensors = diff --git a/src/fastertransformer/th_op/t5/T5DecodingOp.cc b/src/fastertransformer/th_op/t5/T5DecodingOp.cc index 9facfdc36..055d66a8b 100644 --- a/src/fastertransformer/th_op/t5/T5DecodingOp.cc +++ b/src/fastertransformer/th_op/t5/T5DecodingOp.cc @@ -29,16 +29,13 @@ FasterTransformerT5Decoding::FasterTransformerT5Decoding(int64_t head_num, int64_t vocab_size, int64_t num_bucket, int64_t max_distance, + double q_scaling, int64_t start_id, int64_t end_id, - double beam_search_diversity_rate, - int64_t top_k, - double top_p, - double temperature, - double len_penalty, - double repetition_penalty, int64_t tensor_para_size, int64_t pipeline_para_size, + bool t5_with_bias, + int64_t position_embedding_type, th::Tensor self_layernorm_gamma, th::Tensor self_kernel_q, th::Tensor self_output_kernel, @@ -52,37 +49,64 @@ FasterTransformerT5Decoding::FasterTransformerT5Decoding(int64_t head_num, th::Tensor output_kernel, th::Tensor decoding_gamma, th::Tensor embedding_table, - th::Tensor relative_attention_bias): - _st(self_layernorm_gamma.scalar_type()), - weights{self_layernorm_gamma, - self_kernel_q, - self_output_kernel, - cross_layernorm_gamma, - cross_kernel_q, - cross_kernel_k, - cross_kernel_v, - cross_output_kernel, - ffn_layernorm_gamma, - inter_kernel, - output_kernel, - decoding_gamma, - embedding_table, - relative_attention_bias} + th::Tensor absolute_or_relative_position_embedding, + th::Tensor self_layernorm_beta, + th::Tensor self_bias_qkv, + th::Tensor self_output_bias, + th::Tensor cross_layernorm_beta, + th::Tensor cross_bias_q, + th::Tensor cross_bias_k, + th::Tensor cross_bias_v, + th::Tensor cross_output_bias, + th::Tensor ffn_layernorm_beta, + th::Tensor inter_bias, + th::Tensor output_bias, + th::Tensor decoding_beta, + th::Tensor embedding_bias): + _st(self_layernorm_gamma.scalar_type()), weights{self_layernorm_gamma, self_kernel_q, + self_output_kernel, cross_layernorm_gamma, + cross_kernel_q, cross_kernel_k, + cross_kernel_v, cross_output_kernel, + ffn_layernorm_gamma, inter_kernel, + output_kernel, decoding_gamma, + embedding_table, absolute_or_relative_position_embedding, + self_layernorm_beta, self_bias_qkv, + self_output_bias, cross_layernorm_beta, + cross_bias_q, cross_bias_k, + cross_bias_v, cross_output_bias, + ffn_layernorm_beta, inter_bias, + output_bias, decoding_beta, + embedding_bias} { - CHECK_INPUT(self_layernorm_gamma, _st); // layer_num, d_model - CHECK_INPUT(self_kernel_q, _st); // layer_num, d_model, 3 * hidden_dim - CHECK_INPUT(self_output_kernel, _st); // layer_num, hidden_dim, d_model - CHECK_INPUT(cross_layernorm_gamma, _st); // layer_num, d_model - CHECK_INPUT(cross_kernel_q, _st); // layer_num, d_model, hidden_dim - CHECK_INPUT(cross_kernel_k, _st); // layer_num, mem_d_model, hidden_dim - CHECK_INPUT(cross_kernel_v, _st); // layer_num, mem_d_model, hidden_dim - CHECK_INPUT(cross_output_kernel, _st); // layer_num, hidden_dim, d_model - CHECK_INPUT(ffn_layernorm_gamma, _st); // layer_num, d_model - CHECK_INPUT(inter_kernel, _st); // layer_num, d_model, inter_size - CHECK_INPUT(output_kernel, _st); // layer_num, inter_size, d_model - CHECK_INPUT(decoding_gamma, _st); // d_model - CHECK_INPUT(embedding_table, _st); // vocab_size, d_model - CHECK_INPUT(relative_attention_bias, _st); // head_num, num_bucket + CHECK_INPUT(self_layernorm_gamma, _st); // layer_num, d_model + CHECK_INPUT(self_kernel_q, _st); // layer_num, d_model, 3 * hidden_dim + CHECK_INPUT(self_output_kernel, _st); // layer_num, hidden_dim, d_model + CHECK_INPUT(cross_layernorm_gamma, _st); // layer_num, d_model + CHECK_INPUT(cross_kernel_q, _st); // layer_num, d_model, hidden_dim + CHECK_INPUT(cross_kernel_k, _st); // layer_num, mem_d_model, hidden_dim + CHECK_INPUT(cross_kernel_v, _st); // layer_num, mem_d_model, hidden_dim + CHECK_INPUT(cross_output_kernel, _st); // layer_num, hidden_dim, d_model + CHECK_INPUT(ffn_layernorm_gamma, _st); // layer_num, d_model + CHECK_INPUT(inter_kernel, _st); // layer_num, d_model, inter_size + CHECK_INPUT(output_kernel, _st); // layer_num, inter_size, d_model + CHECK_INPUT(decoding_gamma, _st); // d_model + CHECK_INPUT(embedding_table, _st); // vocab_size, d_model + CHECK_INPUT(absolute_or_relative_position_embedding, _st); // head_num, num_bucket or max_seq_len, d_model + if (t5_with_bias) { + CHECK_INPUT(self_layernorm_beta, _st); // layer_num, d_model + CHECK_INPUT(self_bias_qkv, _st); // layer_num,3 * hidden_dim + CHECK_INPUT(self_output_bias, _st); // layer_num, d_model + CHECK_INPUT(cross_layernorm_beta, _st); // layer_num, d_model + CHECK_INPUT(cross_bias_q, _st); // layer_num, hidden_dim + CHECK_INPUT(cross_bias_k, _st); // layer_num, hidden_dim + CHECK_INPUT(cross_bias_v, _st); // layer_num, hidden_dim + CHECK_INPUT(cross_output_bias, _st); // layer_num, d_model + CHECK_INPUT(ffn_layernorm_beta, _st); // layer_num, d_model + CHECK_INPUT(inter_bias, _st); // layer_num, inter_size + CHECK_INPUT(output_bias, _st); // layer_num, d_model + CHECK_INPUT(decoding_beta, _st); // d_model + CHECK_INPUT(embedding_bias, _st); // vocab_size + } switch (_st) { case at::ScalarType::Float: ftdecoding = new torch_ext::FTT5Decoding(head_num, @@ -94,16 +118,13 @@ FasterTransformerT5Decoding::FasterTransformerT5Decoding(int64_t head_num, vocab_size, num_bucket, max_distance, + q_scaling, start_id, end_id, - (float)beam_search_diversity_rate, - top_k, - (float)top_p, - (float)temperature, - (float)len_penalty, - (float)repetition_penalty, tensor_para_size, pipeline_para_size, + t5_with_bias, + ft::PositionEmbeddingType(position_embedding_type), weights); break; case at::ScalarType::Half: @@ -116,23 +137,19 @@ FasterTransformerT5Decoding::FasterTransformerT5Decoding(int64_t head_num, vocab_size, num_bucket, max_distance, + q_scaling, start_id, end_id, - (float)beam_search_diversity_rate, - top_k, - (float)top_p, - (float)temperature, - (float)len_penalty, - (float)repetition_penalty, tensor_para_size, pipeline_para_size, + t5_with_bias, + ft::PositionEmbeddingType(position_embedding_type), weights); break; default: throw std::runtime_error("Wrong Tensor type."); } - int_info_ = torch::empty({14}, torch::dtype(torch::kInt64)); - float_info_ = torch::empty({5}, torch::dtype(torch::kFloat64)); + int_info_ = torch::empty({16}, torch::dtype(torch::kInt64)); int_info_[0] = head_num; int_info_[1] = size_per_head; int_info_[2] = inter_size; @@ -142,17 +159,13 @@ FasterTransformerT5Decoding::FasterTransformerT5Decoding(int64_t head_num, int_info_[6] = vocab_size; int_info_[7] = num_bucket; int_info_[8] = max_distance; - int_info_[9] = start_id; - int_info_[10] = end_id; - int_info_[11] = top_k; + int_info_[9] = q_scaling; + int_info_[10] = start_id; + int_info_[11] = end_id; int_info_[12] = tensor_para_size; int_info_[13] = pipeline_para_size; - - float_info_[0] = beam_search_diversity_rate; - float_info_[1] = top_p; - float_info_[2] = temperature; - float_info_[3] = len_penalty; - float_info_[4] = repetition_penalty; + int_info_[14] = t5_with_bias; + int_info_[15] = position_embedding_type; } FasterTransformerT5Decoding::~FasterTransformerT5Decoding() @@ -162,6 +175,15 @@ FasterTransformerT5Decoding::~FasterTransformerT5Decoding() std::vector FasterTransformerT5Decoding::forward(int64_t beam_width, int64_t max_seq_len, + int64_t top_k, + double top_p, + double beam_search_diversity_rate, + double temperature, + double len_penalty, + double repetition_penalty, + int64_t random_seed, + bool is_return_output_log_probs, + bool is_return_cum_log_probs, th::Tensor memory, th::Tensor memory_seq_lens) { @@ -170,23 +192,26 @@ std::vector FasterTransformerT5Decoding::forward(int64_t beam_width, CHECK_CONTIGUOUS(memory_seq_lens); TORCH_CHECK(memory_seq_lens.dtype() == torch::kInt32, "mem_seq_lens dtype should be int32"); - int batch_size = (int)(memory.size(0)); - auto output_ids = torch::empty({batch_size * beam_width * max_seq_len}, - torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); - auto parent_ids = torch::empty({batch_size * beam_width * max_seq_len}, - torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); - auto out_seq_lens = - torch::empty({batch_size * beam_width}, torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); - ftdecoding->forward( - (size_t)beam_width, (size_t)max_seq_len, memory, memory_seq_lens, output_ids, parent_ids, out_seq_lens); - return std::vector{output_ids, parent_ids, out_seq_lens}; + auto results = ftdecoding->forward((size_t)beam_width, + (size_t)max_seq_len, + (size_t)top_k, + (float)top_p, + (float)beam_search_diversity_rate, + (float)temperature, + (float)len_penalty, + (float)repetition_penalty, + (unsigned long long)random_seed, + is_return_output_log_probs, + is_return_cum_log_probs, + memory, + memory_seq_lens); + return results; } std::vector FasterTransformerT5Decoding::get_pickle_info() const { std::vector tmp(weights); tmp.push_back(int_info_); - tmp.push_back(float_info_); return tmp; } @@ -207,14 +232,11 @@ static auto fasterTransformerT5DecodingTHS = int64_t, int64_t, int64_t, + double, + int64_t, int64_t, int64_t, - double, int64_t, - double, - double, - double, - double, int64_t, int64_t, th::Tensor, @@ -230,6 +252,19 @@ static auto fasterTransformerT5DecodingTHS = th::Tensor, th::Tensor, th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, + th::Tensor, th::Tensor>()) .def("forward", &torch_ext::FasterTransformerT5Decoding::forward) .def_pickle( @@ -237,27 +272,22 @@ static auto fasterTransformerT5DecodingTHS = return self->get_pickle_info(); }, [](std::vector state) -> c10::intrusive_ptr { - int head_num = state[15][0].item().to(); - int size_per_head = state[15][1].item().to(); - int inter_size = state[15][2].item().to(); - int mem_d_model = state[15][3].item().to(); - int d_model = state[15][4].item().to(); - int layer_num = state[15][5].item().to(); - int vocab_size = state[15][6].item().to(); - int num_bucket = state[15][7].item().to(); - int max_distance = state[15][8].item().to(); - int start_id = state[15][9].item().to(); - int end_id = state[15][10].item().to(); - int top_k = state[15][11].item().to(); - int tensor_para_size = state[15][12].item().to(); - int pipeline_para_size = state[15][13].item().to(); - - double beam_search_diversity_rate = state[16][0].item().to(); - double top_p = state[16][1].item().to(); - double temperature = state[16][2].item().to(); - double len_penalty = state[16][3].item().to(); - double repetition_penalty = state[16][4].item().to(); - + int head_num = state[27][0].item().to(); + int size_per_head = state[27][1].item().to(); + int inter_size = state[27][2].item().to(); + int mem_d_model = state[27][3].item().to(); + int d_model = state[27][4].item().to(); + int layer_num = state[27][5].item().to(); + int vocab_size = state[27][6].item().to(); + int num_bucket = state[27][7].item().to(); + int max_distance = state[27][8].item().to(); + int start_id = state[27][9].item().to(); + int end_id = state[27][10].item().to(); + int tensor_para_size = state[27][11].item().to(); + int pipeline_para_size = state[27][12].item().to(); + bool t5_with_bias = (bool)state[27][13].item().to(); + int position_embedding_type = state[27][14].item().to(); + double q_scaling = state[28][0].item().to(); return c10::make_intrusive(head_num, size_per_head, inter_size, @@ -267,16 +297,13 @@ static auto fasterTransformerT5DecodingTHS = vocab_size, num_bucket, max_distance, + q_scaling, start_id, end_id, - beam_search_diversity_rate, - top_k, - top_p, - temperature, - len_penalty, - repetition_penalty, tensor_para_size, pipeline_para_size, + t5_with_bias, + position_embedding_type, state[0], state[1], state[2], @@ -290,5 +317,18 @@ static auto fasterTransformerT5DecodingTHS = state[10], state[11], state[12], - state[13]); + state[13], + state[14], + state[15], + state[16], + state[17], + state[18], + state[19], + state[20], + state[21], + state[22], + state[23], + state[24], + state[25], + state[26]); }); \ No newline at end of file diff --git a/src/fastertransformer/th_op/t5/T5DecodingOp.h b/src/fastertransformer/th_op/t5/T5DecodingOp.h index b7f144ef5..91114b219 100644 --- a/src/fastertransformer/th_op/t5/T5DecodingOp.h +++ b/src/fastertransformer/th_op/t5/T5DecodingOp.h @@ -14,18 +14,7 @@ * limitations under the License. */ -#include -#include -#include -#include - -#include "torch/csrc/cuda/Stream.h" -#include -#include -#include - #include "src/fastertransformer/models/t5/T5Decoding.h" -#include "src/fastertransformer/th_op/th_traits.h" #include "src/fastertransformer/th_op/th_utils.h" #include "src/fastertransformer/utils/mpi_utils.h" @@ -37,13 +26,19 @@ namespace torch_ext { class IFTT5Decoding { public: virtual ~IFTT5Decoding() {} - virtual void forward(size_t beam_width, - size_t max_seq_len, - th::Tensor memory, - th::Tensor memory_seq_lens, - th::Tensor output_ids, - th::Tensor parent_ids, - th::Tensor out_seq_lens) = 0; + virtual std::vector forward(size_t beam_width, + size_t max_seq_len, + size_t top_k, + float top_p, + float beam_search_diversity_rate, + float temperature, + float len_penalty, + float repetition_penalty, + unsigned long long random_seed, + bool is_return_output_log_probs, + bool is_return_cum_log_probs, + th::Tensor memory, + th::Tensor memory_seq_lens) = 0; }; template @@ -58,16 +53,13 @@ class FTT5Decoding: public IFTT5Decoding { int vocab_size, int num_bucket, int max_distance, + double q_scaling, int start_id, int end_id, - float beam_search_diversity_rate, - int top_k, - float top_p, - float temperature, - float len_penalty, - float repetition_penalty, int tensor_para_size, int pipeline_para_size, + bool t5_with_bias, + ft::PositionEmbeddingType position_embedding_type, const std::vector& w): head_num_(head_num), size_per_head_(size_per_head), @@ -78,25 +70,23 @@ class FTT5Decoding: public IFTT5Decoding { vocab_size_(vocab_size), num_bucket_(num_bucket), max_distance_(max_distance), + q_scaling_(q_scaling), start_id_(start_id), end_id_(end_id), - beam_search_diversity_rate_(beam_search_diversity_rate), - top_k_(top_k), - top_p_(top_p), - temperature_(temperature), - len_penalty_(len_penalty), - repetition_penalty_(repetition_penalty), + t5_with_bias_(t5_with_bias), + position_embedding_type_(position_embedding_type), _weights(w) { tensor_para_.world_size_ = tensor_para_size; pipeline_para_.world_size_ = pipeline_para_size; init_nccl_comm(); - check_cuda_error(cublasLtCreate(&cublasltHandle_)); + ft::check_cuda_error(cublasLtCreate(&cublasltHandle_)); cublas_algo_map_ = new ft::cublasAlgoMap("gemm_config.in"); cublas_wrapper_mutex_ = new std::mutex(); decoding_weights.resizeLayer(layer_num_); + decoding_weights.setT5StructureDiff(t5_with_bias, position_embedding_type); const int hidden_dim = head_num_ * size_per_head_; for (int i = 0; i < layer_num_; ++i) { @@ -129,19 +119,62 @@ class FTT5Decoding: public IFTT5Decoding { get_ptr(_weights[9]) + (i - first_layer_index) * d_model * inter_size_ / tensor_para_.world_size_; decoding_weights.decoder_layer_weights[i]->ffn_weights.output_weight.kernel = get_ptr(_weights[10]) + (i - first_layer_index) * inter_size_ / tensor_para_.world_size_ * d_model; + + if (t5_with_bias_) { + decoding_weights.decoder_layer_weights[i]->pre_layernorm_weights.beta = + get_ptr(_weights[14]) + (i - first_layer_index) * d_model; + decoding_weights.decoder_layer_weights[i]->self_attention_weights.query_weight.bias = + get_ptr(_weights[15]) + (i - first_layer_index) * 3 * hidden_dim / tensor_para_.world_size_; + decoding_weights.decoder_layer_weights[i]->self_attention_weights.attention_output_weight.bias = + get_ptr(_weights[16]) + (i - first_layer_index) * d_model; + decoding_weights.decoder_layer_weights[i]->self_attn_layernorm_weights.beta = + get_ptr(_weights[17]) + (i - first_layer_index) * d_model; + decoding_weights.decoder_layer_weights[i]->cross_attention_weights.query_weight.bias = + get_ptr(_weights[18]) + (i - first_layer_index) * hidden_dim / tensor_para_.world_size_; + decoding_weights.decoder_layer_weights[i]->cross_attention_weights.key_weight.bias = + get_ptr(_weights[19]) + (i - first_layer_index) * hidden_dim / tensor_para_.world_size_; + decoding_weights.decoder_layer_weights[i]->cross_attention_weights.value_weight.bias = + get_ptr(_weights[20]) + (i - first_layer_index) * hidden_dim / tensor_para_.world_size_; + decoding_weights.decoder_layer_weights[i]->cross_attention_weights.attention_output_weight.bias = + get_ptr(_weights[21]) + (i - first_layer_index) * d_model; + decoding_weights.decoder_layer_weights[i]->cross_attn_layernorm_weights.beta = + get_ptr(_weights[22]) + (i - first_layer_index) * d_model; + decoding_weights.decoder_layer_weights[i]->ffn_weights.intermediate_weight.bias = + get_ptr(_weights[23]) + (i - first_layer_index) * inter_size_ / tensor_para_.world_size_; + decoding_weights.decoder_layer_weights[i]->ffn_weights.output_weight.bias = + get_ptr(_weights[24]) + (i - first_layer_index) * d_model; + } } decoding_weights.post_decoder_layernorm.gamma = get_ptr(_weights[11]); decoding_weights.pre_decoder_embedding_table = get_ptr(_weights[12]); decoding_weights.post_decoder_embedding.kernel = get_ptr(_weights[12]); - decoding_weights.relative_attention_bias = get_ptr(_weights[13]); - + decoding_weights.absolute_or_relative_position_embedding = get_ptr(_weights[13]); + if (t5_with_bias_) { + decoding_weights.post_decoder_layernorm.beta = get_ptr(_weights[25]); + decoding_weights.post_decoder_embedding.bias = get_ptr(_weights[26]); + } int device_id = 0; - check_cuda_error(cudaGetDevice(&device_id)); + ft::check_cuda_error(cudaGetDevice(&device_id)); ft::check_cuda_error(cudaGetDeviceProperties(&prop_, device_id)); } void init_nccl_comm() { + int mpi_initialized; + MPICHECK(MPI_Initialized(&mpi_initialized)); + if (!mpi_initialized) { + FT_LOG_INFO("MPI is not initialized! Skipped the NCCL communication initialization.\n"); + if (tensor_para_.world_size_ != 1) { + printf("[FATAL] MPI initialization can only be skipped when tensor_para_size=1, but got %d!\n", + tensor_para_.world_size_); + } + if (pipeline_para_.world_size_ != 1) { + printf("[FATAL] MPI initialization can only be skipped when pipeline_para_size=1, but got %d!\n", + pipeline_para_.world_size_); + } + return; + } + int rank, world_size; MPICHECK(MPI_Comm_rank(MPI_COMM_WORLD, &rank)); MPICHECK(MPI_Comm_size(MPI_COMM_WORLD, &world_size)); @@ -221,18 +254,24 @@ class FTT5Decoding: public IFTT5Decoding { delete cublas_wrapper_mutex_; } - void forward(size_t beam_width, - size_t max_seq_len, - th::Tensor memory, - th::Tensor memory_seq_lens, - th::Tensor output_ids, - th::Tensor parent_ids, - th::Tensor sequence_lengths) override + std::vector forward(size_t beam_width, + size_t max_seq_len, + size_t top_k, + float top_p, + float beam_search_diversity_rate, + float temperature, + float len_penalty, + float repetition_penalty, + unsigned long long random_seed, + bool is_return_output_log_probs, + bool is_return_cum_log_probs, + th::Tensor memory, + th::Tensor memory_seq_lens) override { auto stream = at::cuda::getCurrentCUDAStream().stream(); cublasHandle_t cublasHandle = at::cuda::getCurrentCUDABlasHandle(); cublasSetStream(cublasHandle, stream); - ft::Allocator allocator = ft::Allocator(); + ft::Allocator allocator = ft::Allocator(); ft::cublasMMWrapper cublas_wrapper = ft::cublasMMWrapper( cublasHandle, cublasltHandle_, stream, cublas_algo_map_, cublas_wrapper_mutex_, &allocator); @@ -246,56 +285,114 @@ class FTT5Decoding: public IFTT5Decoding { const size_t batch_size = (size_t)memory.size(0); const size_t mem_max_seq_len = (size_t)memory.size(1); - ft::T5Decoding decoding = ft::T5Decoding(batch_size, - max_seq_len, - mem_max_seq_len, - beam_width, - head_num_, - size_per_head_, - inter_size_, - d_model_, - layer_num_, - vocab_size_, - num_bucket_, - max_distance_, - start_id_, - end_id_, - beam_search_diversity_rate_, - top_k_, - top_p_, - temperature_, - len_penalty_, - repetition_penalty_, - stream, - &cublas_wrapper, - &allocator, - false, - &prop_, - tensor_para_, - pipeline_para_); + ft::T5Decoding decoding = + ft::T5Decoding(batch_size, + max_seq_len, + mem_max_seq_len, + beam_width, + head_num_, + size_per_head_, + inter_size_, + d_model_, + layer_num_, + vocab_size_, + num_bucket_, + max_distance_, + q_scaling_, + start_id_, + end_id_, + beam_search_diversity_rate, + top_k, + top_p, + temperature, + len_penalty, + repetition_penalty, + stream, + &cublas_wrapper, + &allocator, + false, + &prop_, + tensor_para_, + pipeline_para_, + t5_with_bias_ ? ft::ActivationType::Gelu : ft::ActivationType::Relu); ft::DataType data_type = ft::getTensorType(); - std::vector input_tensors = std::vector{ - ft::Tensor{MEMORY_GPU, - data_type, - std::vector{(size_t)memory.size(0), (size_t)memory.size(1), (size_t)memory.size(2)}, - get_ptr(memory)}, - ft::Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{(size_t)memory_seq_lens.size(0)}, - get_ptr(memory_seq_lens)}}; - - std::vector output_tensors = std::vector{ - ft::Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{batch_size, beam_width, max_seq_len}, - get_ptr(output_ids)}, - ft::Tensor{MEMORY_GPU, - TYPE_INT32, - std::vector{batch_size, beam_width, max_seq_len}, - get_ptr(parent_ids)}, - ft::Tensor{ - MEMORY_GPU, TYPE_INT32, std::vector{batch_size, beam_width}, get_ptr(sequence_lengths)}}; + + std::unordered_map input_tensors = std::unordered_map{ + {"encoder_output", + ft::Tensor{ft::MEMORY_GPU, + data_type, + std::vector{(size_t)memory.size(0), (size_t)memory.size(1), (size_t)memory.size(2)}, + get_ptr(memory)}}, + {"encoder_sequence_length", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{(size_t)memory_seq_lens.size(0)}, + get_ptr(memory_seq_lens)}}}; + + if (top_k == 0 && top_p == 0.0f) { + ft::FT_CHECK(beam_width > 1); + input_tensors.insert( + {"beam_search_diversity_rate", + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &beam_search_diversity_rate}}); + } + else { + if (top_p != 0.0f) { + input_tensors.insert( + {"runtime_top_p", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &top_p}}); + } + if (top_k != 0) { + input_tensors.insert( + {"runtime_top_k", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT32, std::vector{1}, &top_k}}); + } + } + input_tensors.insert( + {"temperature", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &temperature}}); + input_tensors.insert( + {"len_penalty", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &len_penalty}}); + input_tensors.insert({"repetition_penalty", + ft::Tensor{ft::MEMORY_CPU, ft::TYPE_FP32, std::vector{1}, &repetition_penalty}}); + input_tensors.insert( + {"random_seed", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_UINT64, std::vector{1}, &random_seed}}); + + auto output_ids = torch::empty({batch_size * beam_width * max_seq_len}, + torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); + auto sequence_length = torch::empty({batch_size * beam_width}, + torch::dtype(torch::kInt32).device(torch::kCUDA).requires_grad(false)); + std::vector th_output_tensors = {output_ids, sequence_length}; + + std::unordered_map output_tensors = std::unordered_map{ + {"output_ids", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{batch_size, beam_width, max_seq_len}, + get_ptr(output_ids)}}, + {"sequence_length", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{batch_size, beam_width}, + get_ptr(sequence_length)}}}; + + if (is_return_output_log_probs) { + auto output_log_probs = torch::empty({batch_size * beam_width * max_seq_len}, + torch::dtype(torch::kFloat).device(torch::kCUDA).requires_grad(false)); + output_tensors.insert({"output_log_probs", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_FP32, + {batch_size, beam_width, max_seq_len}, + get_ptr(output_log_probs)}}); + th_output_tensors.push_back(output_log_probs); + } + if (is_return_cum_log_probs) { + auto cum_log_probs = torch::empty({batch_size * beam_width}, + torch::dtype(torch::kFloat).device(torch::kCUDA).requires_grad(false)); + output_tensors.insert( + {"cum_log_probs", + ft::Tensor{ft::MEMORY_GPU, ft::TYPE_FP32, {batch_size, beam_width}, get_ptr(cum_log_probs)}}); + th_output_tensors.push_back(cum_log_probs); + } + decoding.forward(&output_tensors, &input_tensors, &decoding_weights); + return th_output_tensors; } private: @@ -308,14 +405,11 @@ class FTT5Decoding: public IFTT5Decoding { const int vocab_size_; const int num_bucket_; const int max_distance_; + double q_scaling_; const int start_id_; const int end_id_; - const float beam_search_diversity_rate_; - const int top_k_; - const float top_p_; - const float temperature_; - const float len_penalty_; - const float repetition_penalty_; + const bool t5_with_bias_; + const ft::PositionEmbeddingType position_embedding_type_; std::vector _weights; cublasLtHandle_t cublasltHandle_; @@ -339,18 +433,15 @@ class FasterTransformerT5Decoding: public torch::jit::CustomClassHolder { int64_t vocab_size, int64_t num_bucket, int64_t max_distance, + double q_scaling, int64_t start_id, int64_t end_id, - double beam_search_diversity_rate, - int64_t top_k, - double top_p, - double temperature, - double len_penalty, - double repetition_penalty, int64_t tensor_para_size, int64_t pipeline_para_size, + bool t5_with_bias, + int64_t position_embedding_type, th::Tensor self_layernorm_gamma, - th::Tensor self_kernel_q, + th::Tensor self_kernel_qkv, th::Tensor self_output_kernel, th::Tensor cross_layernorm_gamma, th::Tensor cross_kernel_q, @@ -362,12 +453,36 @@ class FasterTransformerT5Decoding: public torch::jit::CustomClassHolder { th::Tensor output_kernel, th::Tensor decoding_gamma, th::Tensor embedding_table, - th::Tensor relative_attention_bias); + th::Tensor absolute_or_relative_position_embedding, + th::Tensor self_layernorm_beta, + th::Tensor self_bias_qkv, + th::Tensor self_output_bias, + th::Tensor cross_layernorm_beta, + th::Tensor cross_bias_q, + th::Tensor cross_bias_k, + th::Tensor cross_bias_v, + th::Tensor cross_output_bias, + th::Tensor ffn_layernorm_beta, + th::Tensor inter_bias, + th::Tensor output_bias, + th::Tensor decoding_beta, + th::Tensor embedding_bias); ~FasterTransformerT5Decoding(); - std::vector - forward(int64_t beam_width, int64_t max_seq_len, th::Tensor memory, th::Tensor memory_seq_lens); + std::vector forward(int64_t beam_width, + int64_t max_seq_len, + int64_t top_k, + double top_p, + double beam_search_diversity_rate, + double temperature, + double len_penalty, + double repetition_penalty, + int64_t random_seed, + bool is_return_output_log_probs, + bool is_return_cum_log_probs, + th::Tensor memory, + th::Tensor memory_seq_lens); std::vector get_pickle_info() const; @@ -375,7 +490,6 @@ class FasterTransformerT5Decoding: public torch::jit::CustomClassHolder { const at::ScalarType _st; torch_ext::IFTT5Decoding* ftdecoding; th::Tensor int_info_; - th::Tensor float_info_; std::vector weights; }; diff --git a/src/fastertransformer/th_op/t5/T5EncoderOp.cc b/src/fastertransformer/th_op/t5/T5EncoderOp.cc index b8381489d..d5015878b 100644 --- a/src/fastertransformer/th_op/t5/T5EncoderOp.cc +++ b/src/fastertransformer/th_op/t5/T5EncoderOp.cc @@ -28,8 +28,17 @@ FasterTransformerT5Encoder::FasterTransformerT5Encoder(th::Tensor attr_output_la th::Tensor inter_kernel, th::Tensor output_kernel, th::Tensor post_transformer_layernorm_gamma, - th::Tensor relative_attention_bias, + th::Tensor absolute_or_relative_position_embedding, th::Tensor embedding_table, + th::Tensor attr_output_layernorm_beta, + th::Tensor q_bias, + th::Tensor k_bias, + th::Tensor v_bias, + th::Tensor attr_output_bias, + th::Tensor output_layernorm_beta, + th::Tensor inter_bias, + th::Tensor output_bias, + th::Tensor post_transformer_layernorm_beta, int64_t head_num, int64_t head_size, int64_t inter_size, @@ -41,7 +50,9 @@ FasterTransformerT5Encoder::FasterTransformerT5Encoder(th::Tensor attr_output_la bool sparse, double q_scaling, int64_t tensor_para_size, - int64_t pipeline_para_size): + int64_t pipeline_para_size, + bool t5_with_bias, + int64_t position_embedding_type): _st(q_kernel.scalar_type()), _remove_padding(remove_padding), weights{attr_output_layernorm_gamma, @@ -53,20 +64,40 @@ FasterTransformerT5Encoder::FasterTransformerT5Encoder(th::Tensor attr_output_la inter_kernel, output_kernel, post_transformer_layernorm_gamma, - relative_attention_bias, - embedding_table} + absolute_or_relative_position_embedding, + embedding_table, + attr_output_layernorm_beta, + q_bias, + k_bias, + v_bias, + attr_output_bias, + output_layernorm_beta, + inter_bias, + output_bias, + post_transformer_layernorm_beta} { - CHECK_INPUT(q_kernel, _st); // d_model, hidden_dim - CHECK_INPUT(k_kernel, _st); // d_model, hidden_dim - CHECK_INPUT(v_kernel, _st); // d_model, hidden_dim - CHECK_INPUT(attr_output_kernel, _st); // hidden_dim, d_model - CHECK_INPUT(attr_output_layernorm_gamma, _st); // d_model - CHECK_INPUT(inter_kernel, _st); // d_model, inter_size - CHECK_INPUT(output_kernel, _st); // inter_size, d_model - CHECK_INPUT(output_layernorm_gamma, _st); // d_model - CHECK_INPUT(post_transformer_layernorm_gamma, _st); // d_model - CHECK_INPUT(relative_attention_bias, _st); // head_num, num_bucket - CHECK_INPUT(embedding_table, _st); // vocab_size, d_model + CHECK_INPUT(q_kernel, _st); // d_model, hidden_dim + CHECK_INPUT(k_kernel, _st); // d_model, hidden_dim + CHECK_INPUT(v_kernel, _st); // d_model, hidden_dim + CHECK_INPUT(attr_output_kernel, _st); // hidden_dim, d_model + CHECK_INPUT(attr_output_layernorm_gamma, _st); // d_model + CHECK_INPUT(inter_kernel, _st); // d_model, inter_size + CHECK_INPUT(output_kernel, _st); // inter_size, d_model + CHECK_INPUT(output_layernorm_gamma, _st); // d_model + CHECK_INPUT(post_transformer_layernorm_gamma, _st); // d_model + CHECK_INPUT(absolute_or_relative_position_embedding, _st); // head_num, num_bucket or max_seq_len, d_model + CHECK_INPUT(embedding_table, _st); // vocab_size, d_model + if (t5_with_bias) { + CHECK_INPUT(q_bias, _st); // hidden_dim + CHECK_INPUT(k_bias, _st); // hidden_dim + CHECK_INPUT(v_bias, _st); // hidden_dim + CHECK_INPUT(attr_output_bias, _st); // d_model + CHECK_INPUT(attr_output_layernorm_beta, _st); // d_model + CHECK_INPUT(inter_bias, _st); // inter_size + CHECK_INPUT(output_bias, _st); // d_model + CHECK_INPUT(output_layernorm_beta, _st); // d_model + CHECK_INPUT(post_transformer_layernorm_beta, _st); // d_model + } switch (_st) { case at::ScalarType::Float: @@ -81,6 +112,8 @@ FasterTransformerT5Encoder::FasterTransformerT5Encoder(th::Tensor attr_output_la q_scaling, tensor_para_size, pipeline_para_size, + t5_with_bias, + ft::PositionEmbeddingType(position_embedding_type), weights); break; case at::ScalarType::Half: @@ -95,12 +128,14 @@ FasterTransformerT5Encoder::FasterTransformerT5Encoder(th::Tensor attr_output_la q_scaling, tensor_para_size, pipeline_para_size, + t5_with_bias, + ft::PositionEmbeddingType(position_embedding_type), weights); break; default: throw std::runtime_error("Wrong Tensor type."); } - head_info = torch::empty({11}, torch::dtype(torch::kInt64)); + head_info = torch::empty({13}, torch::dtype(torch::kInt64)); head_info[0] = head_num; head_info[1] = head_size; head_info[2] = (int64_t)remove_padding; @@ -112,6 +147,8 @@ FasterTransformerT5Encoder::FasterTransformerT5Encoder(th::Tensor attr_output_la head_info[8] = d_model; head_info[9] = tensor_para_size; head_info[10] = pipeline_para_size; + head_info[11] = t5_with_bias; + head_info[12] = position_embedding_type; scaling_info = torch::empty({1}, torch::dtype(torch::kFloat64)); scaling_info[0] = (double)q_scaling; } @@ -134,7 +171,7 @@ th::Tensor FasterTransformerT5Encoder::forward(th::Tensor input_ids, th::Tensor int64_t d_model = head_info[8].item().to(); auto output = torch::empty({(long int)batch_size, (long int)seq_len, (long int)d_model}, - torch::dtype(_st).device(torch::kCUDA).requires_grad(false)); + torch::dtype(_st).device(torch::kCUDA).requires_grad(false)); ft_t5_encoder->forward(batch_size, seq_len, input_ids, sequence_lengths, output, _remove_padding); return output; } @@ -156,6 +193,15 @@ static auto fasterTransformerT5EncoderTHS = torch::jit::class_("FasterTransformer", "T5Encoder") #endif .def(torch::jit::init()) .def("forward", &torch_ext::FasterTransformerT5Encoder::forward) .def_pickle( @@ -184,18 +232,20 @@ static auto fasterTransformerT5EncoderTHS = return self->get_pickle_info(); }, [](std::vector state) -> c10::intrusive_ptr { - int64_t head_num = state[11][0].item().to(); - int64_t head_size = state[11][1].item().to(); - bool remove_padding = (bool)(state[11][2].item().to()); - int64_t layer_num = state[11][3].item().to(); - int64_t num_bucket = state[11][4].item().to(); - int64_t max_distance = state[11][5].item().to(); - bool sparse = (bool)(state[11][6].item().to()); - int64_t inter_size = state[11][7].item().to(); - int64_t d_model = state[11][8].item().to(); - int64_t tensor_para_size = state[11][9].item().to(); - int64_t pipeline_para_size = state[11][10].item().to(); - double q_scaling = state[12][0].item().to(); + int64_t head_num = state[20][0].item().to(); + int64_t head_size = state[20][1].item().to(); + bool remove_padding = (bool)(state[20][2].item().to()); + int64_t layer_num = state[20][3].item().to(); + int64_t num_bucket = state[20][4].item().to(); + int64_t max_distance = state[20][5].item().to(); + bool sparse = (bool)(state[20][6].item().to()); + int64_t inter_size = state[20][7].item().to(); + int64_t d_model = state[20][8].item().to(); + int64_t tensor_para_size = state[20][9].item().to(); + int64_t pipeline_para_size = state[20][10].item().to(); + bool t5_with_bias = (bool)(state[20][11].item().to()); + int64_t position_embedding_type = state[20][12].item().to(); + double q_scaling = state[21][0].item().to(); return c10::make_intrusive(state[0], state[1], state[2], @@ -207,6 +257,15 @@ static auto fasterTransformerT5EncoderTHS = state[8], state[9], state[10], + state[11], + state[12], + state[13], + state[14], + state[15], + state[16], + state[17], + state[18], + state[19], head_num, head_size, inter_size, @@ -218,5 +277,7 @@ static auto fasterTransformerT5EncoderTHS = sparse, q_scaling, tensor_para_size, - pipeline_para_size); + pipeline_para_size, + t5_with_bias, + position_embedding_type); }); \ No newline at end of file diff --git a/src/fastertransformer/th_op/t5/T5EncoderOp.h b/src/fastertransformer/th_op/t5/T5EncoderOp.h index d513c37e6..7de9e2027 100644 --- a/src/fastertransformer/th_op/t5/T5EncoderOp.h +++ b/src/fastertransformer/th_op/t5/T5EncoderOp.h @@ -14,18 +14,7 @@ * limitations under the License. */ -#include -#include -#include -#include - -#include "torch/csrc/cuda/Stream.h" -#include -#include -#include - #include "src/fastertransformer/models/t5/T5Encoder.h" -#include "src/fastertransformer/th_op/th_traits.h" #include "src/fastertransformer/th_op/th_utils.h" #include "src/fastertransformer/utils/mpi_utils.h" @@ -58,6 +47,8 @@ class FTT5Encoder: public IFT5Encoder { float q_scaling, int tensor_para_size, int pipeline_para_size, + bool t5_with_bias, + ft::PositionEmbeddingType position_embedding_type, const std::vector& w): _head_num(head_num), _head_size(head_size), @@ -68,17 +59,20 @@ class FTT5Encoder: public IFT5Encoder { _max_distance(max_distance), _weights(w), _sparse(sparse), - _q_scaling(q_scaling) + _q_scaling(q_scaling), + _t5_with_bias(t5_with_bias), + _position_embedding_type(position_embedding_type) { tensor_para_.world_size_ = tensor_para_size; pipeline_para_.world_size_ = pipeline_para_size; init_nccl_comm(); #ifndef SPARSITY_ENABLED - if (sparse) + if (sparse) { std::cout << "[WARNING] Sparsity support is not enabled. Will use dense GEMM instead.\n" << std::flush; + } #endif int hidden_dim = _head_num * _head_size; - check_cuda_error(cublasLtCreate(&_cublasltHandle)); + ft::check_cuda_error(cublasLtCreate(&_cublasltHandle)); sm_ = ft::getSMVersion(); #ifdef SPARSITY_ENABLED if (sparse) { @@ -90,6 +84,7 @@ class FTT5Encoder: public IFT5Encoder { cublas_wrapper_mutex_ = new std::mutex(); t5_encoder_weights.resizeLayer(_layer_num); + t5_encoder_weights.setT5StructureDiff(t5_with_bias, position_embedding_type); for (int i = 0; i < _layer_num; i++) { int local_num_layer = (int)(ceil(_layer_num * 1.0f / pipeline_para_.world_size_)); if (!(i < _layer_num && (i >= local_num_layer * pipeline_para_.rank_) @@ -114,10 +109,31 @@ class FTT5Encoder: public IFT5Encoder { get_ptr(_weights[6]) + _d_model * _inter_size / tensor_para_.world_size_ * (i - first_layer_index); t5_encoder_weights.t5_encoder_layer_weights[i]->ffn_weights.output_weight.kernel = get_ptr(_weights[7]) + _inter_size / tensor_para_.world_size_ * _d_model * (i - first_layer_index); + if (_t5_with_bias) { + t5_encoder_weights.t5_encoder_layer_weights[i]->attn_layernorm_weights.beta = + get_ptr(_weights[11]) + _d_model * (i - first_layer_index); + t5_encoder_weights.t5_encoder_layer_weights[i]->attention_weights.query_weight.bias = + get_ptr(_weights[12]) + hidden_dim / tensor_para_.world_size_ * (i - first_layer_index); + t5_encoder_weights.t5_encoder_layer_weights[i]->attention_weights.key_weight.bias = + get_ptr(_weights[13]) + hidden_dim / tensor_para_.world_size_ * (i - first_layer_index); + t5_encoder_weights.t5_encoder_layer_weights[i]->attention_weights.value_weight.bias = + get_ptr(_weights[14]) + hidden_dim / tensor_para_.world_size_ * (i - first_layer_index); + t5_encoder_weights.t5_encoder_layer_weights[i]->attention_weights.attention_output_weight.bias = + get_ptr(_weights[15]) + _d_model * (i - first_layer_index); + t5_encoder_weights.t5_encoder_layer_weights[i]->ffn_layernorm_weights.beta = + get_ptr(_weights[16]) + _d_model * (i - first_layer_index); + t5_encoder_weights.t5_encoder_layer_weights[i]->ffn_weights.intermediate_weight.bias = + get_ptr(_weights[17]) + _inter_size / tensor_para_.world_size_ * (i - first_layer_index); + t5_encoder_weights.t5_encoder_layer_weights[i]->ffn_weights.output_weight.bias = + get_ptr(_weights[18]) + _d_model * (i - first_layer_index); + } } t5_encoder_weights.post_transformer_layernorm_weights.gamma = get_ptr(_weights[8]); - t5_encoder_weights.relative_attention_bias = get_ptr(_weights[9]); + t5_encoder_weights.absolute_or_relative_position_embedding = get_ptr(_weights[9]); t5_encoder_weights.embedding_table = get_ptr(_weights[10]); + if (_t5_with_bias) { + t5_encoder_weights.post_transformer_layernorm_weights.beta = get_ptr(_weights[19]); + } #ifdef SPARSITY_ENABLED if (sparse) { @@ -152,6 +168,21 @@ class FTT5Encoder: public IFT5Encoder { void init_nccl_comm() { + int mpi_initialized; + MPICHECK(MPI_Initialized(&mpi_initialized)); + if (!mpi_initialized) { + printf("[INFO] MPI is not initialized! Skipped the NCCL communication initialization.\n"); + if (tensor_para_.world_size_ != 1) { + printf("[FATAL] MPI initialization can only be skipped when tensor_para_size=1, but got %d!\n", + tensor_para_.world_size_); + } + if (pipeline_para_.world_size_ != 1) { + printf("[FATAL] MPI initialization can only be skipped when pipeline_para_size=1, but got %d!\n", + pipeline_para_.world_size_); + } + return; + } + int rank, world_size; MPICHECK(MPI_Comm_rank(MPI_COMM_WORLD, &rank)); MPICHECK(MPI_Comm_size(MPI_COMM_WORLD, &world_size)); @@ -234,8 +265,7 @@ class FTT5Encoder: public IFT5Encoder { auto stream = at::cuda::getCurrentCUDAStream().stream(); cublasHandle_t _cublasHandle = at::cuda::getCurrentCUDABlasHandle(); cublasSetStream(_cublasHandle, stream); - fastertransformer::Allocator* allocator = - new fastertransformer::Allocator(); + ft::Allocator* allocator = new ft::Allocator(); ft::cublasMMWrapper* cublas_wrapper = #ifdef SPARSITY_ENABLED new ft::cublasMMWrapper(_cublasHandle, @@ -259,32 +289,34 @@ class FTT5Encoder: public IFT5Encoder { ft::AttentionType attention_type = ft::getAttentionType(_head_size, sm_, removing_padding, seq_len, false); - ft::T5Encoder* t5_encoder = new ft::T5Encoder(batch_size, - seq_len, - _head_num, - _head_size, - _inter_size, - _d_model, - _layer_num, - _num_bucket, - _max_distance, - sm_, - _q_scaling, - stream, - cublas_wrapper, - allocator, - false, - attention_type, - _sparse, - ft::ActivationType::Relu, - ft::LayerNormType::pre_layernorm, - tensor_para_, - pipeline_para_); + ft::T5Encoder* t5_encoder = + new ft::T5Encoder(batch_size, + seq_len, + _head_num, + _head_size, + _inter_size, + _d_model, + _layer_num, + _num_bucket, + _max_distance, + sm_, + _q_scaling, + stream, + cublas_wrapper, + allocator, + false, + attention_type, + _sparse, + _t5_with_bias ? ft::ActivationType::Gelu : ft::ActivationType::Relu, + ft::LayerNormType::pre_layernorm, + tensor_para_, + pipeline_para_); - std::vector input_tensors = - std::vector{convert_tensor(input_ids), convert_tensor(sequence_lengths)}; + std::unordered_map input_tensors = std::unordered_map{ + {"input_ids", convert_tensor(input_ids)}, {"sequence_length", convert_tensor(sequence_lengths)}}; - std::vector output_tensors = std::vector{convert_tensor(output)}; + std::unordered_map output_tensors = + std::unordered_map{{"output_hidden_state", convert_tensor(output)}}; try { t5_encoder->forward(&output_tensors, &input_tensors, &t5_encoder_weights); @@ -311,6 +343,8 @@ class FTT5Encoder: public IFT5Encoder { const int _num_bucket; const int _max_distance; std::vector _weights; + bool _t5_with_bias; + ft::PositionEmbeddingType _position_embedding_type; bool _sparse; const float _q_scaling; int sm_; @@ -328,17 +362,26 @@ class FTT5Encoder: public IFT5Encoder { class FasterTransformerT5Encoder: public th::jit::CustomClassHolder { public: - FasterTransformerT5Encoder(th::Tensor q_kernel, + FasterTransformerT5Encoder(th::Tensor attr_output_layernorm_gamma, + th::Tensor q_kernel, th::Tensor k_kernel, th::Tensor v_kernel, th::Tensor attr_output_kernel, - th::Tensor attr_output_layernorm_gamma, + th::Tensor output_layernorm_gamma, th::Tensor inter_kernel, th::Tensor output_kernel, - th::Tensor output_layernorm_gamma, th::Tensor post_transformer_layernorm_gamma, - th::Tensor relative_attention_bias, + th::Tensor absolute_or_relative_position_embedding, th::Tensor embedding_table, + th::Tensor attr_output_layernorm_beta, + th::Tensor q_bias, + th::Tensor k_bias, + th::Tensor v_bias, + th::Tensor attr_output_bias, + th::Tensor output_layernorm_beta, + th::Tensor inter_bias, + th::Tensor output_bias, + th::Tensor post_transformer_layernorm_beta, int64_t head_num, int64_t head_size, int64_t inter_size, @@ -350,7 +393,9 @@ class FasterTransformerT5Encoder: public th::jit::CustomClassHolder { bool sparse, double q_scaling, int64_t tensor_para_size, - int64_t pipeline_para_size); + int64_t pipeline_para_size, + bool t5_with_bias, + int64_t position_embedding_type); ~FasterTransformerT5Encoder(); diff --git a/src/fastertransformer/th_op/th_utils.h b/src/fastertransformer/th_op/th_utils.h index 37fef9395..7cb6830bc 100644 --- a/src/fastertransformer/th_op/th_utils.h +++ b/src/fastertransformer/th_op/th_utils.h @@ -15,14 +15,19 @@ */ #pragma once +#include "src/fastertransformer/utils/Tensor.h" +#include "torch/csrc/cuda/Stream.h" #include "torch/extension.h" +#include #include #include #include +#include +#include +#include +#include #include -#include "src/fastertransformer/utils/Tensor.h" - #define CHECK_TYPE(x, st) TORCH_CHECK(x.scalar_type() == st, "Inconsistency of Tensor type: " #x) #define CHECK_TH_CUDA(x) TORCH_CHECK(x.is_cuda(), #x " must be a CUDA tensor") #define CHECK_CPU(x) TORCH_CHECK(!x.is_cuda(), #x " must be a CPU tensor") diff --git a/src/fastertransformer/th_op/vit/CMakeLists.txt b/src/fastertransformer/th_op/vit/CMakeLists.txt new file mode 100644 index 000000000..e70108aee --- /dev/null +++ b/src/fastertransformer/th_op/vit/CMakeLists.txt @@ -0,0 +1,30 @@ +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +cmake_minimum_required(VERSION 3.13) + +set(vit_ths_files + ViTOp.cc + ViTINT8Op.cc + WeightQuantizeOp.cc +) + +add_definitions(-DTORCH_CUDA=1) + +if(BUILD_PYT) + set(LIB_NAME "pyt_vit") + add_library(${LIB_NAME} SHARED ${vit_ths_files}) + set_target_properties(${LIB_NAME} PROPERTIES CUDA_RESOLVE_DEVICE_SYMBOLS ON) + target_link_libraries(${LIB_NAME} ViT ViTINT8 quantize_weight cublasMMWrapper trt_fused_multi_head_attention + -lcudnn -lcublas -lcudart "${TORCH_LIBRARIES}") +endif() diff --git a/src/fastertransformer/th_op/vit/ViTINT8Op.cc b/src/fastertransformer/th_op/vit/ViTINT8Op.cc new file mode 100644 index 000000000..5db8925ef --- /dev/null +++ b/src/fastertransformer/th_op/vit/ViTINT8Op.cc @@ -0,0 +1,166 @@ +/* + * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "ViTINT8Op.h" + +namespace th = torch; +namespace torch_ext { + +template class VisionTransformerINT8Func; +template class VisionTransformerINT8Func; + +VisionTransformerINT8Class::VisionTransformerINT8Class(std::vector w, + int64_t max_batch, + int64_t img_size, + int64_t patch_size, + int64_t in_chans, + int64_t embed_dim, + int64_t num_heads, + int64_t inter_size, + int64_t layer_num, + int64_t int8_mode, + int64_t with_cls_token): + st_(w[0].scalar_type()), weights_(w) +{ + + // for (int i = 0; i < weights_.size(); i++) { + // CHECK_INPUT(weights_[i], st_); + // } + + output_seq_len_ = (img_size / patch_size) * (img_size / patch_size) + (with_cls_token ? 1 : 0); + output_emb_dim_ = embed_dim; + + switch (st_) { + case at::ScalarType::Float: + vit_func_ = new VisionTransformerINT8Func(max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + num_heads, + inter_size, + layer_num, + 1.0f, + int8_mode, + with_cls_token, + weights_); + break; + case at::ScalarType::Half: + vit_func_ = new VisionTransformerINT8Func(max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + num_heads, + inter_size, + layer_num, + 1.0f, + int8_mode, + with_cls_token, + weights_); + + break; + default: + throw std::runtime_error("Wrong th::Tensor type."); + } + info_int_ = torch::empty({10}, torch::dtype(torch::kInt64)); + info_int_[0] = max_batch; + info_int_[1] = img_size; + info_int_[2] = patch_size; + info_int_[3] = in_chans; + info_int_[4] = embed_dim; + info_int_[5] = num_heads; + info_int_[6] = inter_size; + info_int_[7] = layer_num; + info_int_[8] = int8_mode; + info_int_[9] = with_cls_token; +} + +std::vector VisionTransformerINT8Class::get_pickle_info() const +{ + std::vector tmp(weights_); + tmp.push_back(info_int_); + return tmp; +} + +VisionTransformerINT8Class::~VisionTransformerINT8Class() +{ + delete vit_func_; +} + +th::Tensor VisionTransformerINT8Class::forward(th::Tensor input) +{ + CHECK_INPUT(input, st_); + int batch_size = input.size(0); + auto output = torch::empty({batch_size, output_seq_len_, output_emb_dim_}, + torch::dtype(input.dtype()).device(torch::kCUDA).requires_grad(false)); + vit_func_->forward(batch_size, input, output); + return output; +} + +} // namespace torch_ext + +static auto visionTransformerTHS = +#ifdef LEGACY_THS + torch::jit::class_("VisionTransformerINT8Class") +#else + torch::jit::class_("VisionTransformerINT8", "Class") +#endif + .def(torch::jit::init, + int64_t, + int64_t, + int64_t, + int64_t, + int64_t, + int64_t, + int64_t, + int64_t, + int64_t, + int64_t>()) + .def("forward", &torch_ext::VisionTransformerINT8Class::forward) + .def_pickle( + [](const c10::intrusive_ptr& self) -> std::vector { + return self->get_pickle_info(); + }, + [](std::vector state) -> c10::intrusive_ptr { + int state_size = state.size(); + std::vector::const_iterator first = state.begin(); + std::vector::const_iterator last = state.begin() + (state_size - 1); + std::vector weights(first, last); + int idx = state.size() - 1; + int i = 0; + int64_t max_batch = state[idx][i++].item().to(); + int64_t img_size = state[idx][i++].item().to(); + int64_t patch_size = state[idx][i++].item().to(); + int64_t in_chans = state[idx][i++].item().to(); + int64_t embed_dim = state[idx][i++].item().to(); + int64_t num_heads = state[idx][i++].item().to(); + int64_t inter_size = state[idx][i++].item().to(); + int64_t layer_num = state[idx][i++].item().to(); + int64_t int8_mode = state[idx][i++].item().to(); + int64_t with_cls_token = state[idx][i++].item().to(); + return c10::make_intrusive(weights, + max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + num_heads, + inter_size, + layer_num, + int8_mode, + with_cls_token); + }); diff --git a/src/fastertransformer/th_op/vit/ViTINT8Op.h b/src/fastertransformer/th_op/vit/ViTINT8Op.h new file mode 100644 index 000000000..158af314b --- /dev/null +++ b/src/fastertransformer/th_op/vit/ViTINT8Op.h @@ -0,0 +1,242 @@ +/* + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/vit_int8/ViTINT8.h" + +#include "src/fastertransformer/th_op/th_utils.h" + +namespace ft = fastertransformer; +namespace th = torch; + +namespace torch_ext { + +class IViTFunc { +public: + virtual ~IViTFunc() {} + virtual void forward(int batch_size, th::Tensor& input, th::Tensor& output) = 0; +}; + +template +class VisionTransformerINT8Func: public IViTFunc { +public: + int sm_; + bool _use_ORDER_COL32_2R_4R4; + int max_batch_; + int img_size_; + int patch_size_; + int in_chans_; + int embed_dim_; + int num_heads_; + int head_dim_; + int inter_size_; + int layer_num_; + float q_scaling_; + int int8_mode_; + bool with_cls_token_; + + VisionTransformerINT8Func(const int max_batch, + const int img_size, + const int patch_size, + const int in_chans, + const int embed_dim, + const int num_heads, + const int inter_size, + const int layer_num, + const float q_scaling, + const int int8_mode, + const bool with_cls_token, + const std::vector& w): + weights_(w), + max_batch_(max_batch), + img_size_(img_size), + patch_size_(patch_size), + in_chans_(in_chans), + embed_dim_(embed_dim), + num_heads_(num_heads), + head_dim_(embed_dim / num_heads), + inter_size_(inter_size), + layer_num_(layer_num), + q_scaling_(q_scaling), + int8_mode_(int8_mode), + with_cls_token_(with_cls_token) + { + ft::check_cuda_error(cublasCreate(&cublas_handle_)); + ft::check_cuda_error(cublasLtCreate(&cublaslt_handle_)); + checkCUDNN(cudnnCreate(&cudnn_handle_)); + sm_ = ft::getSMVersion(); + + _use_ORDER_COL32_2R_4R4 = false; + + if (sm_ >= 80) { + _use_ORDER_COL32_2R_4R4 = true; + } + cublas_algo_map_ = new ft::cublasAlgoMap("gemm_config.in", std::string("")); + cublas_wrapper_mutex_ = new std::mutex(); + params_.vit_layer_weights.clear(); + params_.vit_layer_weights.resize(layer_num_); + + int idx_w = 0; + params_.pre_transform_embeds.position_embed = get_ptr(weights_[idx_w++]); + if (with_cls_token) { + params_.pre_transform_embeds.class_embed = get_ptr(weights_[idx_w++]); + } + params_.pre_encoder_conv_weights.kernel = get_ptr(weights_[idx_w++]); + params_.pre_encoder_conv_weights.bias = get_ptr(weights_[idx_w++]); + + for (int i = 0; i < layer_num_; i++) { + auto& layer_weight = params_.vit_layer_weights[i]; + layer_weight.attn_layernorm_weights.gamma = get_ptr(weights_[idx_w++]); + layer_weight.attn_layernorm_weights.beta = get_ptr(weights_[idx_w++]); + layer_weight.ffn_layernorm_weights.gamma = get_ptr(weights_[idx_w++]); + layer_weight.ffn_layernorm_weights.beta = get_ptr(weights_[idx_w++]); + layer_weight.ffn_weights.intermediate_weight.kernel = get_ptr(weights_[idx_w++]); + layer_weight.ffn_weights.intermediate_weight.bias = get_ptr(weights_[idx_w++]); + layer_weight.ffn_weights.output_weight.kernel = get_ptr(weights_[idx_w++]); + layer_weight.ffn_weights.output_weight.bias = get_ptr(weights_[idx_w++]); + layer_weight.attention_weights.query_weight.kernel = get_ptr(weights_[idx_w++]); + layer_weight.attention_weights.query_weight.bias = get_ptr(weights_[idx_w++]); + layer_weight.attention_weights.key_weight.kernel = get_ptr(weights_[idx_w++]); + layer_weight.attention_weights.key_weight.bias = get_ptr(weights_[idx_w++]); + layer_weight.attention_weights.value_weight.kernel = get_ptr(weights_[idx_w++]); + layer_weight.attention_weights.value_weight.bias = get_ptr(weights_[idx_w++]); + layer_weight.attention_weights.attention_output_weight.kernel = get_ptr(weights_[idx_w++]); + layer_weight.attention_weights.attention_output_weight.bias = get_ptr(weights_[idx_w++]); + } + params_.post_transformer_layernorm_weights.gamma = get_ptr(weights_[idx_w++]); + params_.post_transformer_layernorm_weights.beta = get_ptr(weights_[idx_w++]); + + for (int i = 0; i < layer_num_; i++) { + auto& layer_weight = params_.vit_layer_weights[i]; + layer_weight.scale_list_.size_ = ACTIVATION_AMAX_NUM + 9 * embed_dim + INT8O_GEMM_NUM + TRT_AMAX_NUM; + layer_weight.scale_list_.p2_offset_ = ACTIVATION_AMAX_NUM; + layer_weight.scale_list_.p3_offset_ = ACTIVATION_AMAX_NUM + 9 * embed_dim; + layer_weight.scale_list_.p4_offset_ = ACTIVATION_AMAX_NUM + 9 * embed_dim + INT8O_GEMM_NUM; + layer_weight.scale_list_.d_scale_list_ = get_ptr(weights_[idx_w++]); + layer_weight.scale_list_.h_scale_list_ = get_ptr(weights_[idx_w++]); + layer_weight.attention_weights.scale_list_ptr = &(layer_weight.scale_list_); + layer_weight.ffn_weights.scale_list_ptr = &(layer_weight.scale_list_); + } + } + + ~VisionTransformerINT8Func() override + { + ft::check_cuda_error(cublasDestroy(cublas_handle_)); + ft::check_cuda_error(cublasLtDestroy(cublaslt_handle_)); + checkCUDNN(cudnnDestroy(cudnn_handle_)); + delete cublas_algo_map_; + delete cublas_wrapper_mutex_; + } + + void forward(int batch_size, th::Tensor& input, th::Tensor& output) override + { + auto stream = at::cuda::getCurrentCUDAStream().stream(); + cublasSetStream(cublas_handle_, stream); + + ft::Allocator* allocator = new ft::Allocator(); + + ft::cublasINT8MMWrapper* cublas_wrapper = new ft::cublasINT8MMWrapper( + cublas_handle_, cublaslt_handle_, stream, cublas_algo_map_, cublas_wrapper_mutex_, _use_ORDER_COL32_2R_4R4); + + if (std::is_same::value) { + cublas_wrapper->setFP16GemmConfig(); + } + else if (std::is_same::value) { + cublas_wrapper->setFP32GemmConfig(); + } + + int seq_len = (img_size_ / patch_size_) * (img_size_ / patch_size_) + (with_cls_token_ ? 1 : 0); + ft::AttentionType attention_type = ft::getAttentionType(head_dim_, sm_, true, seq_len); + + auto vit = new ft::ViTTransformerINT8(max_batch_, + img_size_, + in_chans_, + patch_size_, + embed_dim_, + num_heads_, + inter_size_, + layer_num_, + with_cls_token_, + sm_, + q_scaling_, + int8_mode_, + stream, + cudnn_handle_, + cublas_wrapper, + allocator, + true, + attention_type); + + ft::DataType data_type = ft::getTensorType(); + int sm_ptr[1] = {sm_}; + std::vector input_tensors = std::vector{ + ft::Tensor{ft::MEMORY_GPU, + data_type, + std::vector{(size_t)batch_size, (size_t)in_chans_, (size_t)img_size_, (size_t)img_size_}, + get_ptr(input)}}; + + std::vector output_tensors = std::vector{ + ft::Tensor{ft::MEMORY_GPU, + data_type, + std::vector{(size_t)batch_size, (size_t)seq_len, (size_t)embed_dim_}, + get_ptr(output)}}; + + vit->forward(&output_tensors, &input_tensors, ¶ms_); + + delete vit; + delete cublas_wrapper; + delete allocator; + } + +private: + std::vector weights_; + cublasHandle_t cublas_handle_ = nullptr; + cublasLtHandle_t cublaslt_handle_ = nullptr; + cudnnHandle_t cudnn_handle_ = nullptr; + ft::ViTINT8Weight params_; + std::mutex* cublas_wrapper_mutex_; + ft::cublasAlgoMap* cublas_algo_map_; +}; + +class VisionTransformerINT8Class: public torch::jit::CustomClassHolder { +public: + VisionTransformerINT8Class(std::vector w, + int64_t max_batch, + int64_t img_size, + int64_t patch_size, + int64_t in_chans, + int64_t embed_dim, + int64_t num_heads, + int64_t inter_size, + int64_t layer_num, + int64_t with_cls_token, + int64_t int8_mode); + + ~VisionTransformerINT8Class(); + + th::Tensor forward(th::Tensor input); + + std::vector get_pickle_info() const; + +private: + const at::ScalarType st_; + IViTFunc* vit_func_; + std::vector weights_; + th::Tensor info_int_; + int output_seq_len_; + int output_emb_dim_; +}; + +} // namespace torch_ext diff --git a/src/fastertransformer/th_op/vit/ViTOp.cc b/src/fastertransformer/th_op/vit/ViTOp.cc new file mode 100644 index 000000000..ca51ef728 --- /dev/null +++ b/src/fastertransformer/th_op/vit/ViTOp.cc @@ -0,0 +1,158 @@ +/* + * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "ViTOp.h" + +namespace th = torch; +namespace torch_ext { + +template class VisionTransformerFunc; +template class VisionTransformerFunc; + +VisionTransformerClass::VisionTransformerClass(std::vector w, + int64_t max_batch, + int64_t img_size, + int64_t patch_size, + int64_t in_chans, + int64_t embed_dim, + int64_t num_heads, + int64_t inter_size, + int64_t layer_num, + int64_t with_cls_token): + st_(w[0].scalar_type()), weights_(w) +{ + + for (int i = 0; i < weights_.size(); i++) { + CHECK_INPUT(weights_[i], st_); + } + + output_seq_len_ = (img_size / patch_size) * (img_size / patch_size) + (with_cls_token ? 1 : 0); + output_emb_dim_ = embed_dim; + + switch (st_) { + case at::ScalarType::Float: + vit_func_ = new VisionTransformerFunc(max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + num_heads, + inter_size, + layer_num, + 1.0f, + with_cls_token, + weights_); + break; + case at::ScalarType::Half: + vit_func_ = new VisionTransformerFunc(max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + num_heads, + inter_size, + layer_num, + 1.0f, + with_cls_token, + weights_); + break; + default: + throw std::runtime_error("Wrong th::Tensor type."); + } + info_int_ = torch::empty({9}, torch::dtype(torch::kInt64)); + info_int_[0] = max_batch; + info_int_[1] = img_size; + info_int_[2] = patch_size; + info_int_[3] = in_chans; + info_int_[4] = embed_dim; + info_int_[5] = num_heads; + info_int_[6] = inter_size; + info_int_[7] = layer_num; + info_int_[8] = with_cls_token; +} + +std::vector VisionTransformerClass::get_pickle_info() const +{ + std::vector tmp(weights_); + tmp.push_back(info_int_); + return tmp; +} + +VisionTransformerClass::~VisionTransformerClass() +{ + delete vit_func_; +} + +th::Tensor VisionTransformerClass::forward(th::Tensor input) +{ + CHECK_INPUT(input, st_); + int batch_size = input.size(0); + auto output = torch::empty({batch_size, output_seq_len_, output_emb_dim_}, + torch::dtype(input.dtype()).device(torch::kCUDA).requires_grad(false)); + vit_func_->forward(batch_size, input, output); + return output; +} + +} // namespace torch_ext + +static auto visionTransformerTHS = +#ifdef LEGACY_THS + torch::jit::class_("VisionTransformerClass") +#else + torch::jit::class_("VisionTransformer", "Class") +#endif + .def(torch::jit::init, + int64_t, + int64_t, + int64_t, + int64_t, + int64_t, + int64_t, + int64_t, + int64_t, + int64_t>()) + .def("forward", &torch_ext::VisionTransformerClass::forward) + .def_pickle( + [](const c10::intrusive_ptr& self) -> std::vector { + return self->get_pickle_info(); + }, + [](std::vector state) -> c10::intrusive_ptr { + int state_size = state.size(); + std::vector::const_iterator first = state.begin(); + std::vector::const_iterator last = state.begin() + (state_size - 1); + std::vector weights(first, last); + int idx = state.size() - 1; + int i = 0; + int64_t max_batch = state[idx][i++].item().to(); + int64_t img_size = state[idx][i++].item().to(); + int64_t patch_size = state[idx][i++].item().to(); + int64_t in_chans = state[idx][i++].item().to(); + int64_t embed_dim = state[idx][i++].item().to(); + int64_t num_heads = state[idx][i++].item().to(); + int64_t inter_size = state[idx][i++].item().to(); + int64_t layer_num = state[idx][i++].item().to(); + int64_t with_cls_token = state[idx][i++].item().to(); + return c10::make_intrusive(weights, + max_batch, + img_size, + patch_size, + in_chans, + embed_dim, + num_heads, + inter_size, + layer_num, + with_cls_token); + }); diff --git a/src/fastertransformer/th_op/vit/ViTOp.h b/src/fastertransformer/th_op/vit/ViTOp.h new file mode 100644 index 000000000..2a946e8f7 --- /dev/null +++ b/src/fastertransformer/th_op/vit/ViTOp.h @@ -0,0 +1,233 @@ +/* + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/models/vit/ViT.h" +#include "src/fastertransformer/th_op/th_utils.h" + +namespace ft = fastertransformer; +namespace th = torch; + +namespace torch_ext { + +class IViTFunc { +public: + virtual ~IViTFunc() {} + virtual void forward(int batch_size, th::Tensor& input, th::Tensor& output) = 0; +}; + +template +class VisionTransformerFunc: public IViTFunc { +public: + int sm_; + int max_batch_; + int img_size_; + int patch_size_; + int in_chans_; + int embed_dim_; + int num_heads_; + int head_dim_; + int inter_size_; + int layer_num_; + bool sparse_; + float q_scaling_; + bool with_cls_token_; + + VisionTransformerFunc(const int max_batch, + const int img_size, + const int patch_size, + const int in_chans, + const int embed_dim, + const int num_heads, + const int inter_size, + const int layer_num, + const float q_scaling, + const bool with_cls_token, + const std::vector& w): + weights_(w), + max_batch_(max_batch), + img_size_(img_size), + patch_size_(patch_size), + in_chans_(in_chans), + embed_dim_(embed_dim), + num_heads_(num_heads), + head_dim_(embed_dim / num_heads), + inter_size_(inter_size), + layer_num_(layer_num), + q_scaling_(q_scaling), + with_cls_token_(with_cls_token), + params_{embed_dim, inter_size, layer_num, img_size, patch_size, in_chans_, with_cls_token, false} + { + + FT_LOG_INFO("img_size: %lu, patch_size:%lu\n" + "batch_size:%lu, chn_num : %lu\n" + "embed_dim: %lu, is_fp16 : %d\n" + "head_num :%lu, head_dim : %lu\n" + "inter_size:%lu, num_layer: %lu\n", + img_size_, + patch_size_, + max_batch_, + in_chans_, + embed_dim_, + std::is_same::value, + num_heads_, + head_dim_, + inter_size_, + layer_num_); + ft::check_cuda_error(cublasLtCreate(&cublaslt_handle_)); + checkCUDNN(cudnnCreate(&cudnn_handle_)); + sm_ = ft::getSMVersion(); + + cublas_algo_map_ = new ft::cublasAlgoMap("gemm_config.in", std::string("")); + cublas_wrapper_mutex_ = new std::mutex(); + // params_.vit_layer_weights.clear(); + // params_.vit_layer_weights.resize(layer_num_); + + int idx_w = 0; + params_.pre_encoder_conv_weights.kernel = get_ptr(weights_[idx_w++]); + params_.pre_encoder_conv_weights.bias = get_ptr(weights_[idx_w++]); + if (with_cls_token) { + params_.pre_transform_embeds.class_embed = get_ptr(weights_[idx_w++]); + params_.with_cls_token_ = true; + } + params_.pre_transform_embeds.position_embed = get_ptr(weights_[idx_w++]); + for (int i = 0; i < layer_num_; i++) { + auto& layer_weight = params_.vit_layer_weights[i]; + layer_weight.attn_layernorm_weights.gamma = get_ptr(weights_[idx_w++]); + layer_weight.attn_layernorm_weights.beta = get_ptr(weights_[idx_w++]); + layer_weight.attention_weights.query_weight.kernel = get_ptr(weights_[idx_w++]); + layer_weight.attention_weights.query_weight.bias = get_ptr(weights_[idx_w++]); + layer_weight.attention_weights.key_weight.kernel = get_ptr(weights_[idx_w++]); + layer_weight.attention_weights.key_weight.bias = get_ptr(weights_[idx_w++]); + layer_weight.attention_weights.value_weight.kernel = get_ptr(weights_[idx_w++]); + layer_weight.attention_weights.value_weight.bias = get_ptr(weights_[idx_w++]); + layer_weight.attention_weights.attention_output_weight.kernel = get_ptr(weights_[idx_w++]); + layer_weight.attention_weights.attention_output_weight.bias = get_ptr(weights_[idx_w++]); + layer_weight.ffn_layernorm_weights.gamma = get_ptr(weights_[idx_w++]); + layer_weight.ffn_layernorm_weights.beta = get_ptr(weights_[idx_w++]); + layer_weight.ffn_weights.intermediate_weight.kernel = get_ptr(weights_[idx_w++]); + layer_weight.ffn_weights.intermediate_weight.bias = get_ptr(weights_[idx_w++]); + layer_weight.ffn_weights.output_weight.kernel = get_ptr(weights_[idx_w++]); + layer_weight.ffn_weights.output_weight.bias = get_ptr(weights_[idx_w++]); + } + params_.post_transformer_layernorm_weights.gamma = get_ptr(weights_[idx_w++]); + params_.post_transformer_layernorm_weights.beta = get_ptr(weights_[idx_w++]); + } + + ~VisionTransformerFunc() override + { + ft::check_cuda_error(cublasLtDestroy(cublaslt_handle_)); + checkCUDNN(cudnnDestroy(cudnn_handle_)); + delete cublas_algo_map_; + delete cublas_wrapper_mutex_; + } + + void forward(int batch_size, th::Tensor& input, th::Tensor& output) override + { + auto stream = at::cuda::getCurrentCUDAStream().stream(); + auto cublas_handle = at::cuda::getCurrentCUDABlasHandle(); + cublasSetStream(cublas_handle, stream); + + ft::Allocator* allocator = new ft::Allocator(); + + ft::cublasMMWrapper* cublas_wrapper = new ft::cublasMMWrapper( + cublas_handle, cublaslt_handle_, stream, cublas_algo_map_, cublas_wrapper_mutex_, allocator); + + if (std::is_same::value) { + cublas_wrapper->setFP16GemmConfig(); + } + else if (std::is_same::value) { + cublas_wrapper->setFP32GemmConfig(); + } + int seq_len = (img_size_ / patch_size_) * (img_size_ / patch_size_) + (with_cls_token_ ? 1 : 0); + ft::AttentionType attention_type = ft::getAttentionType(head_dim_, sm_, true, seq_len); + + auto vit = new ft::ViTTransformer(max_batch_, + img_size_, + in_chans_, + patch_size_, + embed_dim_, + num_heads_, + inter_size_, + layer_num_, + with_cls_token_, + sm_, + q_scaling_, + stream, + cudnn_handle_, + cublas_wrapper, + allocator, + true, + attention_type); + + ft::DataType data_type = ft::getTensorType(); + int sm_ptr[1] = {sm_}; + std::vector input_tensors = std::vector{ + ft::Tensor{ft::MEMORY_GPU, + data_type, + std::vector{(size_t)batch_size, (size_t)in_chans_, (size_t)img_size_, (size_t)img_size_}, + get_ptr(input)}}; + + std::vector output_tensors = std::vector{ + ft::Tensor{ft::MEMORY_GPU, + data_type, + std::vector{(size_t)batch_size, (size_t)seq_len, (size_t)embed_dim_}, + get_ptr(output)}}; + + vit->forward(&output_tensors, &input_tensors, ¶ms_); + + delete vit; + delete cublas_wrapper; + delete allocator; + } + +private: + std::vector weights_; + cublasLtHandle_t cublaslt_handle_ = nullptr; + cudnnHandle_t cudnn_handle_ = nullptr; + ft::ViTWeight params_; + std::mutex* cublas_wrapper_mutex_; + ft::cublasAlgoMap* cublas_algo_map_; +}; + +class VisionTransformerClass: public torch::jit::CustomClassHolder { +public: + VisionTransformerClass(std::vector w, + int64_t max_batch, + int64_t img_size, + int64_t patch_size, + int64_t in_chans, + int64_t embed_dim, + int64_t num_heads, + int64_t inter_size, + int64_t layer_num, + int64_t with_cls_token); + + ~VisionTransformerClass(); + + th::Tensor forward(th::Tensor input); + + std::vector get_pickle_info() const; + +private: + const at::ScalarType st_; + IViTFunc* vit_func_; + std::vector weights_; + th::Tensor info_int_; + int output_seq_len_; + int output_emb_dim_; +}; + +} // namespace torch_ext diff --git a/src/fastertransformer/th_op/vit/WeightQuantizeOp.cc b/src/fastertransformer/th_op/vit/WeightQuantizeOp.cc new file mode 100644 index 000000000..453418426 --- /dev/null +++ b/src/fastertransformer/th_op/vit/WeightQuantizeOp.cc @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/kernels/quantize_weight.h" +#include "src/fastertransformer/th_op/th_utils.h" +#include "torch/csrc/cuda/Stream.h" +#include +#include +#include + +namespace torch_ext { +using torch::Tensor; +using namespace fastertransformer; + +Tensor vit_weight_quantize(Tensor weight, Tensor quant_max) +{ + bool use_ORDER_COL32_2R_4R4 = false; +#if (CUDART_VERSION >= 11000) + int device{-1}; + cudaGetDevice(&device); + cudaDeviceProp props; + cudaGetDeviceProperties(&props, device); + if (props.major * 10 + props.minor >= 80) { + use_ORDER_COL32_2R_4R4 = true; + } +#endif + + CHECK_TH_CUDA(weight); + TORCH_CHECK(weight.dtype() == torch::kFloat32, "weight dtype should be float16"); + TORCH_CHECK(weight.numel() != 0, "weight should not be empty tensor"); + TORCH_CHECK(weight.dim() == 2, "Invalid rank. The rank of weight should be 2"); + + int k = weight.size(0); + int n = weight.size(1); + + CHECK_TH_CUDA(quant_max); + TORCH_CHECK(quant_max.dtype() == torch::kFloat32, "quant_max dtype should be float32"); + TORCH_CHECK(quant_max.numel() == n, "quant_max wrong shape"); + + const float* weight_ = get_ptr(weight); + const float* quant_max_ = get_ptr(quant_max); + + auto output = torch::empty({k * n}, torch::dtype(torch::kFloat16).device(torch::kCUDA).requires_grad(false)); + int8_t* transform_out = get_ptr(output); + + auto stream = at::cuda::getCurrentCUDAStream().stream(); + + int format = use_ORDER_COL32_2R_4R4 ? 1 : 2; + invokeQuantizeWeight(transform_out, weight_, quant_max_, n, k, format, stream); + return output; +} + +} // namespace torch_ext + +static auto weight_quantize = + torch::RegisterOperators("fastertransformer::vit_weight_quantize", &torch_ext::vit_weight_quantize); diff --git a/src/fastertransformer/triton_backend/CMakeLists.txt b/src/fastertransformer/triton_backend/CMakeLists.txt index 753e7cc93..42157aa15 100644 --- a/src/fastertransformer/triton_backend/CMakeLists.txt +++ b/src/fastertransformer/triton_backend/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -14,8 +14,8 @@ cmake_minimum_required(VERSION 3.8) -if(BUILD_GPT) - add_subdirectory(multi_gpu_gpt) +if(BUILD_MULTI_GPU) add_subdirectory(gptj) add_subdirectory(t5) -endif() + add_subdirectory(multi_gpu_gpt) +endif() \ No newline at end of file diff --git a/src/fastertransformer/triton_backend/gptj/CMakeLists.txt b/src/fastertransformer/triton_backend/gptj/CMakeLists.txt index d5673c888..0a4b91b25 100644 --- a/src/fastertransformer/triton_backend/gptj/CMakeLists.txt +++ b/src/fastertransformer/triton_backend/gptj/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -14,7 +14,6 @@ cmake_minimum_required(VERSION 3.8) -if(BUILD_GPT) set(parallel_gpt_triton_backend_files GptJTritonModel.cc GptJTritonModelInstance.cc @@ -23,4 +22,3 @@ set(parallel_gpt_triton_backend_files add_library(GptJTritonBackend SHARED ${parallel_gpt_triton_backend_files}) target_link_libraries(GptJTritonBackend PRIVATE GptJ) target_compile_features(GptJTritonBackend PRIVATE cxx_std_14) -endif() \ No newline at end of file diff --git a/src/fastertransformer/triton_backend/gptj/GptJTritonModel.cc b/src/fastertransformer/triton_backend/gptj/GptJTritonModel.cc index 6d9a4a00c..44bb4c323 100644 --- a/src/fastertransformer/triton_backend/gptj/GptJTritonModel.cc +++ b/src/fastertransformer/triton_backend/gptj/GptJTritonModel.cc @@ -1,6 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. - * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -37,12 +36,9 @@ std::shared_ptr AbstractTransformerModel::createGptJMo std::string model_dir = reader.Get("ft_instance_hyperparameter", "model_dir"); model_dir = model_dir + "/" + std::to_string(tensor_para_size) + "-gpu/"; - if (is_half) + if (is_half) { return std::make_shared>( - reader.GetInteger("ft_instance_hyperparameter", "max_batch_size"), reader.GetInteger("ft_instance_hyperparameter", "max_seq_len"), - 0, - reader.GetInteger("ft_instance_hyperparameter", "beam_width"), reader.GetInteger(model_name, "head_num"), reader.GetInteger(model_name, "size_per_head"), reader.GetInteger(model_name, "inter_size"), @@ -51,21 +47,15 @@ std::shared_ptr AbstractTransformerModel::createGptJMo reader.GetInteger(model_name, "rotary_embedding"), reader.GetInteger(model_name, "start_id"), reader.GetInteger(model_name, "end_id"), - reader.GetFloat("ft_instance_hyperparameter", "beam_search_diversity_rate"), - reader.GetInteger("ft_instance_hyperparameter", "top_k"), - reader.GetFloat("ft_instance_hyperparameter", "top_p"), - reader.GetFloat("ft_instance_hyperparameter", "temperature"), - reader.GetFloat("ft_instance_hyperparameter", "len_penalty"), - reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty"), reader.GetInteger("ft_instance_hyperparameter", "tensor_para_size"), reader.GetInteger("ft_instance_hyperparameter", "pipeline_para_size"), - model_name, model_dir); - else + reader.GetInteger("ft_instance_hyperparameter", "enable_custom_all_reduce", 0), + model_name, + model_dir); + } + else { return std::make_shared>( - reader.GetInteger("ft_instance_hyperparameter", "max_batch_size"), reader.GetInteger("ft_instance_hyperparameter", "max_seq_len"), - 0, - reader.GetInteger("ft_instance_hyperparameter", "beam_width"), reader.GetInteger(model_name, "head_num"), reader.GetInteger(model_name, "size_per_head"), reader.GetInteger(model_name, "inter_size"), @@ -74,22 +64,16 @@ std::shared_ptr AbstractTransformerModel::createGptJMo reader.GetInteger(model_name, "rotary_embedding"), reader.GetInteger(model_name, "start_id"), reader.GetInteger(model_name, "end_id"), - reader.GetFloat("ft_instance_hyperparameter", "beam_search_diversity_rate"), - reader.GetInteger("ft_instance_hyperparameter", "top_k"), - reader.GetFloat("ft_instance_hyperparameter", "top_p"), - reader.GetFloat("ft_instance_hyperparameter", "temperature"), - reader.GetFloat("ft_instance_hyperparameter", "len_penalty"), - reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty"), reader.GetInteger("ft_instance_hyperparameter", "tensor_para_size"), reader.GetInteger("ft_instance_hyperparameter", "pipeline_para_size"), - model_name, model_dir); + reader.GetInteger("ft_instance_hyperparameter", "enable_custom_all_reduce", 0), + model_name, + model_dir); + } } template -GptJTritonModel::GptJTritonModel(size_t max_batch_size, - size_t max_seq_len, - size_t max_input_len, - size_t beam_width, +GptJTritonModel::GptJTritonModel(size_t max_seq_len, size_t head_num, size_t size_per_head, size_t inter_size, @@ -98,20 +82,12 @@ GptJTritonModel::GptJTritonModel(size_t max_batch_size, size_t rotary_embedding_dim, int start_id, int end_id, - float beam_search_diversity_rate, - size_t top_k, - float top_p, - float temperature, - float len_penalty, - float repetition_penalty, size_t tensor_para_size, size_t pipeline_para_size, + int enable_custom_all_reduce, std::string model_name, std::string model_dir): - max_batch_size_(max_batch_size), max_seq_len_(max_seq_len), - max_input_len_(max_input_len), - beam_width_(beam_width), head_num_(head_num), size_per_head_(size_per_head), inter_size_(inter_size), @@ -120,14 +96,9 @@ GptJTritonModel::GptJTritonModel(size_t max_batch_size, rotary_embedding_dim_(rotary_embedding_dim), start_id_(start_id), end_id_(end_id), - beam_search_diversity_rate_(beam_search_diversity_rate), - top_k_(top_k), - top_p_(top_p), - temperature_(temperature), - len_penalty_(len_penalty), - repetition_penalty_(repetition_penalty), tensor_para_size_(tensor_para_size), pipeline_para_size_(pipeline_para_size), + enable_custom_all_reduce_(enable_custom_all_reduce), model_name_(model_name), model_dir_(model_dir) { @@ -138,7 +109,8 @@ std::unique_ptr GptJTritonModel::createModelInstance(int device_id, int rank, cudaStream_t stream, - std::pair, std::vector> nccl_comms) + std::pair, std::vector> nccl_comms, + std::shared_ptr custom_all_reduce_comm) { ft::check_cuda_error(cudaSetDevice(device_id)); const int tensor_para_rank = rank % tensor_para_size_; @@ -147,6 +119,8 @@ GptJTritonModel::createModelInstance(int device_id, std::unique_ptr> allocator( new ft::Allocator(device_id)); + allocator->setStream(stream); + cublasHandle_t cublas_handle; cublasLtHandle_t cublaslt_handle; @@ -169,60 +143,56 @@ GptJTritonModel::createModelInstance(int device_id, cublas_wrapper->setFP32GemmConfig(); } - auto gpt = std::make_unique>( - ft::GptJ(0, // max_batch_size, FT will adjust the buffer automatically. - 0, // max_seq_len, FT will adjust the buffer automatically. - 0, // max_input_len, FT will adjust the buffer automatically. - beam_width_, - head_num_, - size_per_head_, - inter_size_, - num_layer_, - vocab_size_, - rotary_embedding_dim_, - start_id_, - end_id_, - beam_search_diversity_rate_, - top_k_, - top_p_, - 0, // random seed, note that all gpus should use same seed - temperature_, - len_penalty_, - repetition_penalty_, - tensor_para_size_, - tensor_para_rank, - nccl_comms.first[device_id], - pipeline_para_size_, - pipeline_para_rank, - nccl_comms.second[device_id], - stream, - cublas_wrapper.get(), - allocator.get(), - false, - cuda_device_prop_ptr.get())); + ft::NcclParam tensor_para(tensor_para_rank, tensor_para_size_, nccl_comms.first[device_id]); + ft::NcclParam pipeline_para(pipeline_para_rank, pipeline_para_size_, nccl_comms.second[device_id]); + + auto gpt = std::make_unique>(ft::GptJ(0, // max_batch_size, FT will adjust the buffer automatically. + 0, // max_seq_len, FT will adjust the buffer automatically. + 0, // max_input_len, FT will adjust the buffer automatically. + 0, + head_num_, + size_per_head_, + inter_size_, + num_layer_, + vocab_size_, + rotary_embedding_dim_, + start_id_, + end_id_, + 0.0f, // beam_search_diversity_rate_, + 0, // top_k_, + 0.0f, // top_p_, + 0, // random seed, note that all gpus should use same seed + 0.0f, // temperature_, + 0.0f, // len_penalty_, + 0.0f, // repetition_penalty_, + tensor_para, + pipeline_para, + stream, + cublas_wrapper.get(), + allocator.get(), + false, + cuda_device_prop_ptr.get(), + custom_all_reduce_comm, + enable_custom_all_reduce_)); auto weight = std::unique_ptr>(new ft::GptJWeight(head_num_ * size_per_head_, - inter_size_, - vocab_size_, - num_layer_, - max_seq_len_, - tensor_para_size_, - tensor_para_rank, - pipeline_para_size_, - pipeline_para_rank)); + inter_size_, + vocab_size_, + num_layer_, + max_seq_len_, + tensor_para_size_, + tensor_para_rank, + pipeline_para_size_, + pipeline_para_rank)); weight->loadModel(model_dir_); - return std::unique_ptr>( - new GptJTritonModelInstance(std::move(gpt), - std::move(weight), - std::move(allocator), - std::move(cublas_algo_map), - std::move(cublas_wrapper_mutex), - std::move(cublas_wrapper), - std::move(cuda_device_prop_ptr), - max_batch_size_, - max_seq_len_, - beam_width_)); + return std::unique_ptr>(new GptJTritonModelInstance(std::move(gpt), + std::move(weight), + std::move(allocator), + std::move(cublas_algo_map), + std::move(cublas_wrapper_mutex), + std::move(cublas_wrapper), + std::move(cuda_device_prop_ptr))); } template @@ -230,15 +200,11 @@ std::string GptJTritonModel::toString() { std::stringstream ss; ss << "Model: " - << "\nmax_batch_size: " << max_batch_size_ << "\nmax_seq_len: " << max_seq_len_ - << "\nmax_input_len: " << max_input_len_ << "\nbeam_width: " << beam_width_ << "\nhead_num: " << head_num_ - << "\nsize_per_head: " << size_per_head_ << "\ninter_size: " << inter_size_ << "\nnum_layer: " << num_layer_ - << "\nvocab_size: " << vocab_size_ << "\nstart_id: " << start_id_ << "\nend_id: " << end_id_ - << "\nbeam_search_diversity_rate: " << beam_search_diversity_rate_ << "\ntop_k: " << top_k_ - << "\ntop_p: " << top_p_ << "\ntemperature: " << temperature_ << "\nlen_penalty: " << len_penalty_ - << "\nrepetition_penalty: " << repetition_penalty_ << "\ntensor_para_size: " << tensor_para_size_ - << "\npipeline_para_size: " << pipeline_para_size_ << "\nmodel_name: " << model_name_ - << "\nmodel_dir: " << model_dir_ << std::endl; + << "\nmax_seq_len: " << max_seq_len_ << "\nhead_num: " << head_num_ << "\nsize_per_head: " << size_per_head_ + << "\ninter_size: " << inter_size_ << "\nnum_layer: " << num_layer_ << "\nvocab_size: " << vocab_size_ + << "\nstart_id: " << start_id_ << "\nend_id: " << end_id_ << "\ntensor_para_size: " << tensor_para_size_ + << "\npipeline_para_size: " << pipeline_para_size_ << "\nenable_custom_all_reduce: " << enable_custom_all_reduce_ + << "\nmodel_name: " << model_name_ << "\nmodel_dir: " << model_dir_ << std::endl; return ss.str(); } @@ -246,25 +212,25 @@ template std::vector GptJTritonModel::createNcclIds(const uint32_t world_size, bool multi_instances) { std::vector nccl_ids(tensor_para_size_ + pipeline_para_size_); - if (multi_instances) - { + if (multi_instances) { if (tensor_para_size_ * pipeline_para_size_ != 1) { - printf("[ERROR] Multiple Instances currently only support tensor_para_size_ and pipeline_para_size_ both 1\n"); + printf( + "[ERROR] Multiple Instances currently only support tensor_para_size_ and pipeline_para_size_ both 1\n"); ft::FT_CHECK(tensor_para_size_ == 1 && pipeline_para_size_ == 1); } nccl_ids.resize(2); } - else - { + else { if (world_size != tensor_para_size_ * pipeline_para_size_) { - printf("[ERROR] world_size (%d) should equal to tensor_para_size_ * pipeline_para_size_ (%ld * %ld here) \n", - world_size, - tensor_para_size_, - pipeline_para_size_); + printf( + "[ERROR] world_size (%d) should equal to tensor_para_size_ * pipeline_para_size_ (%ld * %ld here) \n", + world_size, + tensor_para_size_, + pipeline_para_size_); ft::FT_CHECK(world_size == tensor_para_size_ * pipeline_para_size_); } } - + for (uint32_t i = 0; i < nccl_ids.size(); i++) { NCCLCHECK(ncclGetUniqueId(&nccl_ids[i])); } @@ -272,26 +238,25 @@ std::vector GptJTritonModel::createNcclIds(const uint32_t world } template -std::pair, std::vector> -GptJTritonModel::createNcclComms(std::vector nccl_ids, const int node_id, bool multi_instances, int instance_id) +std::pair, std::vector> GptJTritonModel::createNcclComms( + std::vector nccl_ids, const int node_id, bool multi_instances, int instance_id) { - const int gpu_count = ft::getDeviceCount(); + const int gpu_count = ft::getDeviceCount(); std::vector tensor_para_comms(gpu_count); std::vector pipeline_para_comms(gpu_count); - if (multi_instances) - { + if (multi_instances) { ncclUniqueId tensor_para_nccl_uid = nccl_ids[0]; ncclUniqueId pipeline_para_nccl_uid = nccl_ids[1]; size_t tensor_para_rank = 0; size_t pipeline_para_rank = 0; ft::check_cuda_error(cudaSetDevice(instance_id)); - NCCLCHECK(ncclCommInitRank(&tensor_para_comms[instance_id], tensor_para_size_, tensor_para_nccl_uid, tensor_para_rank)); + NCCLCHECK(ncclCommInitRank( + &tensor_para_comms[instance_id], tensor_para_size_, tensor_para_nccl_uid, tensor_para_rank)); NCCLCHECK(ncclCommInitRank( &pipeline_para_comms[instance_id], pipeline_para_size_, pipeline_para_nccl_uid, pipeline_para_rank)); } - else - { + else { NCCLCHECK(ncclGroupStart()); for (int gid = 0; gid < gpu_count; gid++) { int rank = node_id * gpu_count + gid; @@ -301,7 +266,8 @@ GptJTritonModel::createNcclComms(std::vector nccl_ids, const in ncclUniqueId pipeline_para_nccl_uid = nccl_ids[pipeline_para_size_ + tensor_para_rank]; ft::check_cuda_error(cudaSetDevice(gid)); - NCCLCHECK(ncclCommInitRank(&tensor_para_comms[gid], tensor_para_size_, tensor_para_nccl_uid, tensor_para_rank)); + NCCLCHECK( + ncclCommInitRank(&tensor_para_comms[gid], tensor_para_size_, tensor_para_nccl_uid, tensor_para_rank)); NCCLCHECK(ncclCommInitRank( &pipeline_para_comms[gid], pipeline_para_size_, pipeline_para_nccl_uid, pipeline_para_rank)); } @@ -311,9 +277,11 @@ GptJTritonModel::createNcclComms(std::vector nccl_ids, const in } template -std::pair GptJTritonModel::getMaxBatchSeqlen() +void GptJTritonModel::createCustomComms( + std::vector>* custom_all_reduce_comms, int world_size) { - return std::pair(max_batch_size_, max_seq_len_); + using commDataType = typename ft::CustomARCommTypeConverter::Type; + ft::initCustomAllReduceComm(custom_all_reduce_comms, enable_custom_all_reduce_, world_size); } template diff --git a/src/fastertransformer/triton_backend/gptj/GptJTritonModel.h b/src/fastertransformer/triton_backend/gptj/GptJTritonModel.h index fff1a4cc9..131f1e95d 100644 --- a/src/fastertransformer/triton_backend/gptj/GptJTritonModel.h +++ b/src/fastertransformer/triton_backend/gptj/GptJTritonModel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -19,6 +19,7 @@ #include "src/fastertransformer/models/gptj/GptJ.h" #include "src/fastertransformer/triton_backend/transformer_triton_backend.hpp" #include "src/fastertransformer/utils/cuda_utils.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" #include "src/fastertransformer/utils/nccl_utils.h" #include @@ -26,10 +27,7 @@ namespace ft = fastertransformer; template struct GptJTritonModel: public AbstractTransformerModel { - GptJTritonModel(size_t max_batch_size, - size_t max_seq_len, - size_t max_input_len, - size_t beam_width, + GptJTritonModel(size_t max_seq_len, size_t head_num, size_t size_per_head, size_t inter_size, @@ -38,14 +36,9 @@ struct GptJTritonModel: public AbstractTransformerModel { size_t rotary_embedding_dim, int start_id, int end_id, - float beam_search_diversity_rate, - size_t top_k, - float top_p, - float temperature, - float len_penalty, - float repetition_penalty, size_t tensor_para_size, size_t pipeline_para_size, + int enable_custom_all_reduce, std::string model_name, std::string model_dir); @@ -55,23 +48,26 @@ struct GptJTritonModel: public AbstractTransformerModel { createModelInstance(int deviceId, int rank, cudaStream_t stream, - std::pair, std::vector> nccl_comms) override; + std::pair, std::vector> nccl_comms, + std::shared_ptr custom_all_reduce_comm = nullptr) override; + + virtual void createCustomComms(std::vector>* custom_all_reduce_comms, + int world_size) override; virtual std::pair, std::vector> - createNcclComms(std::vector nccl_ids, const int node_id, bool multi_instances = false, int instance_id = 0) override; + createNcclComms(std::vector nccl_ids, + const int node_id, + bool multi_instances = false, + int instance_id = 0) override; virtual std::vector createNcclIds(const uint32_t world_size, bool multi_instances = false) override; virtual std::string toString() override; - virtual std::pair getMaxBatchSeqlen() override; virtual int getTensorParaSize() override; virtual int getPipelineParaSize() override; private: - const size_t max_batch_size_; const size_t max_seq_len_; - const size_t max_input_len_; - const size_t beam_width_; const size_t head_num_; const size_t size_per_head_; const size_t inter_size_; @@ -80,18 +76,12 @@ struct GptJTritonModel: public AbstractTransformerModel { const size_t rotary_embedding_dim_; const int start_id_; const int end_id_; - const float beam_search_diversity_rate_; - const size_t top_k_; - const float top_p_; - const float temperature_; - const float len_penalty_; - const float repetition_penalty_; const size_t tensor_para_size_; const size_t pipeline_para_size_; bool is_fp16_; + int enable_custom_all_reduce_ = 0; std::string model_name_; std::string model_dir_; - }; \ No newline at end of file diff --git a/src/fastertransformer/triton_backend/gptj/GptJTritonModelInstance.cc b/src/fastertransformer/triton_backend/gptj/GptJTritonModelInstance.cc index 30ca9e9f5..61ec89967 100644 --- a/src/fastertransformer/triton_backend/gptj/GptJTritonModelInstance.cc +++ b/src/fastertransformer/triton_backend/gptj/GptJTritonModelInstance.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,125 +16,186 @@ #include "src/fastertransformer/triton_backend/gptj/GptJTritonModelInstance.h" #include "src/fastertransformer/triton_backend/transformer_triton_backend.hpp" +#include "src/fastertransformer/triton_backend/triton_utils.hpp" #include "src/fastertransformer/utils/Tensor.h" +#include +#include +#include #include namespace ft = fastertransformer; template -GptJTritonModelInstance::GptJTritonModelInstance( - std::unique_ptr> gpt, - std::unique_ptr> gpt_weight, - std::unique_ptr> allocator, - std::unique_ptr cublas_algo_map, - std::unique_ptr cublas_wrapper_mutex, - std::unique_ptr cublas_wrapper, - std::unique_ptr cuda_device_prop_ptr, - const size_t max_batch_size, - const size_t max_seq_len, - const size_t beam_width): +GptJTritonModelInstance::GptJTritonModelInstance(std::unique_ptr> gpt, + std::unique_ptr> gpt_weight, + std::unique_ptr> allocator, + std::unique_ptr cublas_algo_map, + std::unique_ptr cublas_wrapper_mutex, + std::unique_ptr cublas_wrapper, + std::unique_ptr cuda_device_prop_ptr): gpt_(std::move(gpt)), gpt_weight_(std::move(gpt_weight)), allocator_(std::move(allocator)), cublas_algo_map_(std::move(cublas_algo_map)), cublas_wrapper_mutex_(std::move(cublas_wrapper_mutex)), cublas_wrapper_(std::move(cublas_wrapper)), - cuda_device_prop_ptr_(std::move(cuda_device_prop_ptr)), - max_batch_size_(max_batch_size), - max_seq_len_(max_seq_len), - beam_width_(beam_width) + cuda_device_prop_ptr_(std::move(cuda_device_prop_ptr)) { - ft::FT_CHECK(beam_width_ == 1); // TODO(bhsueh) disable the beam search } template -std::vector -GptJTritonModelInstance::convert_inputs(std::shared_ptr> input_tensors) +std::unordered_map GptJTritonModelInstance::convert_inputs( + std::shared_ptr> input_tensors) { - if (input_tensors->at(0).where == triton::MEMORY_CPU) { - size_t size = 1; - for (auto t : input_tensors->at(0).shape) { - size = size * t; - } - ft::deviceMalloc(&d_input_ids_, size, false); - ft::cudaH2Dcpy(d_input_ids_, (int*)(input_tensors->at(0).data), size); + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + + move_tensor_H2D(input_tensors->at("input_ids"), d_input_ids_); + move_tensor_H2D(input_tensors->at("input_lengths"), d_input_lengths_); + + const int input_data_len = input_tensors->at("input_ids").shape[1]; + size_t size = 1; + for (auto t : input_tensors->at("request_output_len").shape) { + size = size * t; + } + + h_total_output_lengths_ = reinterpret_cast(malloc(size * sizeof(int))); + for (int i = 0; i < size; ++i) { + h_total_output_lengths_[i] = + reinterpret_cast(input_tensors->at("request_output_len").data)[i] + input_data_len; + } + + std::unordered_map ft_input_tensors = std::unordered_map{ + {"input_ids", as_GPU_tensor(input_tensors->at("input_ids"), d_input_ids_)}, + {"input_lengths", as_GPU_tensor(input_tensors->at("input_lengths"), d_input_lengths_)}, + {"max_output_seq_len", + ft::Tensor{ + ft::MEMORY_CPU, ft::TYPE_INT32, input_tensors->at("request_output_len").shape, h_total_output_lengths_}}}; + + if (input_tensors->find("bad_words_list") != input_tensors->end()) { + move_tensor_H2D(input_tensors->at("bad_words_list"), d_input_bad_words_); + ft_input_tensors.insert( + {"bad_words_list", as_GPU_tensor(input_tensors->at("bad_words_list"), d_input_bad_words_)}); } - if (input_tensors->at(1).where == triton::MEMORY_CPU) { - size_t size = 1; - for (auto t : input_tensors->at(1).shape) { - size = size * t; + if (input_tensors->find("stop_words_list") != input_tensors->end()) { + move_tensor_H2D(input_tensors->at("stop_words_list"), d_input_stop_words_); + ft_input_tensors.insert( + {"stop_words_list", as_GPU_tensor(input_tensors->at("stop_words_list"), d_input_stop_words_)}); + } + + if (input_tensors->count("prefix_soft_prompt_embedding") && input_tensors->count("prefix_soft_prompt_lengths")) { + triton::Tensor soft_prompt_lengths_tensor = input_tensors->at("prefix_soft_prompt_lengths"); + size_t length_size = std::accumulate(soft_prompt_lengths_tensor.shape.begin(), + soft_prompt_lengths_tensor.shape.end(), + 1, + std::multiplies()); + ft::deviceMalloc(&d_prefix_soft_prompt_lengths_, length_size, false); + ft::cudaH2Dcpy( + d_prefix_soft_prompt_lengths_, reinterpret_cast(soft_prompt_lengths_tensor.data), length_size); + ft_input_tensors.insert( + {"prefix_soft_prompt_lengths", + ft::Tensor{ + ft::MEMORY_GPU, ft::TYPE_INT32, soft_prompt_lengths_tensor.shape, d_prefix_soft_prompt_lengths_}}); + + triton::Tensor soft_prompt_embedding_tensor = input_tensors->at("prefix_soft_prompt_embedding"); + size_t emb_size = std::accumulate(soft_prompt_embedding_tensor.shape.begin(), + soft_prompt_embedding_tensor.shape.end(), + 1, + std::multiplies()); + ft::deviceMalloc(&d_prefix_soft_prompt_embedding_, emb_size, false); + ft::cudaH2Dcpy(d_prefix_soft_prompt_embedding_, + reinterpret_cast(soft_prompt_embedding_tensor.data), + emb_size); + ft_input_tensors.insert( + {"prefix_soft_prompt_embedding", + ft::Tensor{ + ft::MEMORY_GPU, ft::TYPE_FP32, soft_prompt_embedding_tensor.shape, d_prefix_soft_prompt_embedding_}}); + } + + for (auto t = input_tensors->begin(); t != input_tensors->end(); ++t) { + if (t->first.find("input_ids") == std::string::npos && t->first.find("input_lengths") == std::string::npos + && t->first.find("max_output_seq_len") == std::string::npos + && t->first.find("prefix_soft_prompt_embedding") == std::string::npos + && t->first.find("prefix_soft_prompt_lengths") == std::string::npos) { + if (ft_input_tensors.count(t->first) == 0) { + ft_input_tensors.insert({t->first, t->second.convertTritonTensorToFt()}); + } } - ft::deviceMalloc(&d_input_lengths_, size, false); - ft::cudaH2Dcpy(d_input_lengths_, (int*)(input_tensors->at(1).data), size); } - h_total_output_len_ = - (*((int*)input_tensors->at(2).data)) - + (input_tensors->at(0).shape.size() == 3 ? input_tensors->at(0).shape[2] : input_tensors->at(0).shape[1]); - std::vector ft_input_tensors = std::vector{ - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_INT32, - input_tensors->at(0).shape.size() == 3 ? - std::vector{input_tensors->at(0).shape[0] * input_tensors->at(0).shape[1], - input_tensors->at(0).shape[2]} : - std::vector{input_tensors->at(0).shape[0] * beam_width_, - input_tensors->at(0).shape[1]}, - input_tensors->at(0).where == triton::MEMORY_CPU ? d_input_ids_ : input_tensors->at(0).data}, - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_INT32, - input_tensors->at(1).shape.size() == 2 ? - std::vector{input_tensors->at(1).shape[0] * input_tensors->at(1).shape[1], - input_tensors->at(1).shape[0]} : - input_tensors->at(1).shape, - input_tensors->at(1).where == triton::MEMORY_CPU ? d_input_lengths_ : input_tensors->at(1).data}, - ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT32, {1}, &h_total_output_len_}}; return ft_input_tensors; } template -std::shared_ptr> -GptJTritonModelInstance::convert_outputs(const std::vector& output_tensors) +std::shared_ptr> +GptJTritonModelInstance::convert_outputs(const std::unordered_map& output_tensors) { - // Remove the dimension of beam_width of output ids - // change output.shape to [batch_size, beam_width, total_output_len] - return std::shared_ptr>(new std::vector{ - triton::Tensor{triton::MEMORY_GPU, - triton::TYPE_INT32, - output_tensors[0].shape, - d_output_ids_}}); + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + std::unordered_map* outputs_mapping = + new std::unordered_map(); + + for (auto it = output_tensors.begin(); it != output_tensors.end(); it++) { + outputs_mapping->insert({it->first, triton::Tensor::convertFtTensorToTriton(it->second)}); + } + + return std::shared_ptr>(outputs_mapping); } template std::shared_ptr> GptJTritonModelInstance::forward(std::shared_ptr> input_tensors) { - const size_t request_batch_size = input_tensors->at(0).shape[0]; - const size_t request_output_len = (size_t) * ((int*)(input_tensors->at(2).data)); - const size_t total_output_len = - request_output_len - + (input_tensors->at(0).shape.size() == 3 ? input_tensors->at(0).shape[2] : input_tensors->at(0).shape[1]); + ft::FT_CHECK(false); + return nullptr; +} + +template +std::shared_ptr> +GptJTritonModelInstance::forward(std::shared_ptr> input_tensors) +{ + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + ft::FT_CHECK_WITH_INFO(input_tensors->at("input_ids").shape.size() == 2, + "input_tensors->at(\"input_ids\").shape.size() == 2"); + ft::FT_CHECK_WITH_INFO(input_tensors->at("input_lengths").shape.size() == 1, + "input_tensors->at(\"input_lengths\").shape.size() == 1"); + + const size_t request_batch_size = input_tensors->at("input_ids").shape[0]; + const size_t max_request_output_len = (size_t)*std::max_element( + (int*)input_tensors->at("request_output_len").data, + (int*)input_tensors->at("request_output_len").data + input_tensors->at("request_output_len").shape[0]); + const size_t total_output_len = max_request_output_len + input_tensors->at("input_ids").shape[1]; + const size_t beam_width = + input_tensors->count("beam_width") ? (size_t)(*(uint*)input_tensors->at("beam_width").data) : 1; freeBuffer(); // free buffer of previous iteration - allocateBuffer(request_batch_size, total_output_len); - - std::vector ft_input_tensors = convert_inputs(input_tensors); - - std::vector output_tensors = std::vector{ - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_INT32, - std::vector{request_batch_size, beam_width_,(size_t)total_output_len}, - d_output_ids_}, - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_INT32, - std::vector{(size_t)total_output_len, request_batch_size, beam_width_}, - d_parent_ids_}, - ft::Tensor{ - ft::MEMORY_GPU, ft::TYPE_INT32, std::vector{request_batch_size, beam_width_}, d_sequence_lengths_}, - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_FP32, - std::vector{request_output_len, request_batch_size, beam_width_}, - nullptr}}; + allocateBuffer(request_batch_size, beam_width, total_output_len, max_request_output_len); + + std::unordered_map ft_input_tensors = convert_inputs(input_tensors); + + std::unordered_map output_tensors = std::unordered_map{ + {"output_ids", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_UINT32, + std::vector{request_batch_size, beam_width, total_output_len}, + d_output_ids_}}, + {"sequence_length", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{request_batch_size, beam_width}, + d_sequence_lengths_}}}; + + if (input_tensors->count("is_return_log_probs") && *((bool*)input_tensors->at("is_return_log_probs").data)) { + output_tensors.insert({"output_log_probs", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_FP32, + std::vector{request_batch_size, beam_width, max_request_output_len}, + d_output_log_probs_}}); + output_tensors.insert({"cum_log_probs", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_FP32, + std::vector{request_batch_size, beam_width}, + d_cum_log_probs_}}); + } gpt_->forward(&output_tensors, &ft_input_tensors, gpt_weight_.get()); if (d_input_ids_ != nullptr) { @@ -145,6 +206,26 @@ GptJTritonModelInstance::forward(std::shared_ptr> ft::check_cuda_error(cudaFree(d_input_lengths_)); d_input_lengths_ = nullptr; } + if (h_total_output_lengths_ != nullptr) { + free(h_total_output_lengths_); + h_total_output_lengths_ = nullptr; + } + if (d_input_bad_words_ != nullptr) { + ft::check_cuda_error(cudaFree(d_input_bad_words_)); + d_input_bad_words_ = nullptr; + } + if (d_input_stop_words_ != nullptr) { + ft::check_cuda_error(cudaFree(d_input_stop_words_)); + d_input_stop_words_ = nullptr; + } + if (d_prefix_soft_prompt_embedding_ != nullptr) { + ft::check_cuda_error(cudaFree(d_prefix_soft_prompt_embedding_)); + d_prefix_soft_prompt_embedding_ = nullptr; + } + if (d_prefix_soft_prompt_lengths_ != nullptr) { + ft::check_cuda_error(cudaFree(d_prefix_soft_prompt_lengths_)); + d_prefix_soft_prompt_lengths_ = nullptr; + } return convert_outputs(output_tensors); } @@ -155,19 +236,24 @@ GptJTritonModelInstance::~GptJTritonModelInstance() } template -void GptJTritonModelInstance::allocateBuffer(const size_t request_batch_size, const size_t total_output_len) +void GptJTritonModelInstance::allocateBuffer(const size_t request_batch_size, + const size_t beam_width, + const size_t total_output_len, + const size_t max_request_output_len) { - ft::deviceMalloc(&d_output_ids_, request_batch_size * beam_width_ * total_output_len); - ft::deviceMalloc(&d_parent_ids_, request_batch_size * beam_width_ * total_output_len); - ft::deviceMalloc(&d_sequence_lengths_, request_batch_size * beam_width_); + ft::deviceMalloc(&d_output_ids_, request_batch_size * beam_width * total_output_len); + ft::deviceMalloc(&d_sequence_lengths_, request_batch_size * beam_width); + ft::deviceMalloc(&d_output_log_probs_, max_request_output_len * request_batch_size * beam_width); + ft::deviceMalloc(&d_cum_log_probs_, request_batch_size * beam_width); } template void GptJTritonModelInstance::freeBuffer() { ft::deviceFree(d_output_ids_); - ft::deviceFree(d_parent_ids_); ft::deviceFree(d_sequence_lengths_); + ft::deviceFree(d_output_log_probs_); + ft::deviceFree(d_cum_log_probs_); } template struct GptJTritonModelInstance; diff --git a/src/fastertransformer/triton_backend/gptj/GptJTritonModelInstance.h b/src/fastertransformer/triton_backend/gptj/GptJTritonModelInstance.h index 6fad1d0ec..da3a038bb 100644 --- a/src/fastertransformer/triton_backend/gptj/GptJTritonModelInstance.h +++ b/src/fastertransformer/triton_backend/gptj/GptJTritonModelInstance.h @@ -32,15 +32,15 @@ struct GptJTritonModelInstance: AbstractTransformerModelInstance { std::unique_ptr cublas_algo_map, std::unique_ptr cublas_wrapper_mutex, std::unique_ptr cublas_wrapper, - std::unique_ptr cuda_device_prop_ptr, - const size_t max_batch_size, - const size_t max_seq_len, - const size_t beam_width); + std::unique_ptr cuda_device_prop_ptr); ~GptJTritonModelInstance(); std::shared_ptr> forward(std::shared_ptr> input_tensors) override; + std::shared_ptr> + forward(std::shared_ptr> input_tensors) override; + private: const std::unique_ptr> gpt_; const std::unique_ptr> gpt_weight_; @@ -50,22 +50,28 @@ struct GptJTritonModelInstance: AbstractTransformerModelInstance { const std::unique_ptr cublas_wrapper_; const std::unique_ptr cuda_device_prop_ptr_; - std::vector convert_inputs(std::shared_ptr> input_tensors); - std::shared_ptr> convert_outputs(const std::vector& output_tensors); + std::unordered_map + convert_inputs(std::shared_ptr> input_tensors); + std::shared_ptr> + convert_outputs(const std::unordered_map& output_tensors); - void allocateBuffer(const size_t request_batch_size, const size_t total_output_len); + void allocateBuffer(const size_t request_batch_size, + const size_t beam_width, + const size_t total_output_len, + const size_t max_request_output_len); void freeBuffer(); - const size_t max_batch_size_; - const size_t max_seq_len_; - const size_t beam_width_; - int* d_input_ids_ = nullptr; int* d_input_lengths_ = nullptr; + int* d_input_bad_words_ = nullptr; + int* d_input_stop_words_ = nullptr; + int* d_prefix_soft_prompt_lengths_ = nullptr; + float* d_prefix_soft_prompt_embedding_ = nullptr; int* d_output_ids_ = nullptr; - int* d_parent_ids_ = nullptr; int* d_sequence_lengths_ = nullptr; + float* d_output_log_probs_ = nullptr; + float* d_cum_log_probs_ = nullptr; - int h_total_output_len_; + int* h_total_output_lengths_ = nullptr; }; diff --git a/src/fastertransformer/triton_backend/multi_gpu_gpt/CMakeLists.txt b/src/fastertransformer/triton_backend/multi_gpu_gpt/CMakeLists.txt index a97122ae2..871e35a62 100644 --- a/src/fastertransformer/triton_backend/multi_gpu_gpt/CMakeLists.txt +++ b/src/fastertransformer/triton_backend/multi_gpu_gpt/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -14,7 +14,6 @@ cmake_minimum_required(VERSION 3.8) -if(BUILD_GPT) set(parallel_gpt_triton_backend_files ParallelGptTritonModel.cc ParallelGptTritonModelInstance.cc @@ -22,5 +21,4 @@ set(parallel_gpt_triton_backend_files add_library(ParallelGptTritonBackend SHARED ${parallel_gpt_triton_backend_files}) target_link_libraries(ParallelGptTritonBackend PRIVATE ParallelGpt) -target_compile_features(ParallelGptTritonBackend PRIVATE cxx_std_14) -endif() \ No newline at end of file +target_compile_features(ParallelGptTritonBackend PRIVATE cxx_std_14) \ No newline at end of file diff --git a/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModel.cc b/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModel.cc index 3d6544880..cf8693ef9 100644 --- a/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModel.cc +++ b/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModel.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. * * Licensed under the Apache License, Version 2.0 (the "License"); @@ -15,8 +15,9 @@ * limitations under the License. */ -#include "src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModel.h" #include "3rdparty/INIReader.h" + +#include "src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModel.h" #include "src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModelInstance.h" #include "src/fastertransformer/triton_backend/transformer_triton_backend.hpp" #include "src/fastertransformer/utils/allocator.h" @@ -32,13 +33,10 @@ std::shared_ptr AbstractTransformerModel::createGptMod } const std::string model_name = reader.Get("ft_instance_hyperparameter", "model_name"); - const int is_half = reader.GetInteger("ft_instance_hyperparameter", "is_half"); - if (is_half) + const std::string data_type = reader.Get("ft_instance_hyperparameter", "data_type"); + if (data_type == "fp16") { return std::make_shared>( - reader.GetInteger("ft_instance_hyperparameter", "max_batch_size"), reader.GetInteger("ft_instance_hyperparameter", "max_seq_len"), - 0, - reader.GetInteger("ft_instance_hyperparameter", "beam_width"), reader.GetInteger(model_name, "head_num"), reader.GetInteger(model_name, "size_per_head"), reader.GetInteger(model_name, "inter_size"), @@ -46,23 +44,35 @@ std::shared_ptr AbstractTransformerModel::createGptMod reader.GetInteger(model_name, "vocab_size"), reader.GetInteger(model_name, "start_id"), reader.GetInteger(model_name, "end_id"), - reader.GetFloat("ft_instance_hyperparameter", "beam_search_diversity_rate"), - reader.GetInteger("ft_instance_hyperparameter", "top_k"), - reader.GetFloat("ft_instance_hyperparameter", "top_p"), - reader.GetFloat("ft_instance_hyperparameter", "temperature"), - reader.GetFloat("ft_instance_hyperparameter", "len_penalty"), - reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty"), reader.GetInteger("ft_instance_hyperparameter", "tensor_para_size"), reader.GetInteger("ft_instance_hyperparameter", "pipeline_para_size"), reader.Get("ft_instance_hyperparameter", "model_name"), reader.Get("ft_instance_hyperparameter", "model_dir"), - reader.GetInteger("ft_instance_hyperparameter", "int8_mode")); - else + reader.GetInteger("ft_instance_hyperparameter", "int8_mode"), + reader.GetInteger("ft_instance_hyperparameter", "enable_custom_all_reduce", 0)); + } +#ifdef ENABLE_BF16 + else if (data_type == "bf16") { + return std::make_shared>( + reader.GetInteger("ft_instance_hyperparameter", "max_seq_len"), + reader.GetInteger(model_name, "head_num"), + reader.GetInteger(model_name, "size_per_head"), + reader.GetInteger(model_name, "inter_size"), + reader.GetInteger(model_name, "decoder_layers"), + reader.GetInteger(model_name, "vocab_size"), + reader.GetInteger(model_name, "start_id"), + reader.GetInteger(model_name, "end_id"), + reader.GetInteger("ft_instance_hyperparameter", "tensor_para_size"), + reader.GetInteger("ft_instance_hyperparameter", "pipeline_para_size"), + reader.Get("ft_instance_hyperparameter", "model_name"), + reader.Get("ft_instance_hyperparameter", "model_dir"), + reader.GetInteger("ft_instance_hyperparameter", "int8_mode"), + reader.GetInteger("ft_instance_hyperparameter", "enable_custom_all_reduce", 0)); + } +#endif + else if (data_type == "fp32") { return std::make_shared>( - reader.GetInteger("ft_instance_hyperparameter", "max_batch_size"), reader.GetInteger("ft_instance_hyperparameter", "max_seq_len"), - 0, - reader.GetInteger("ft_instance_hyperparameter", "beam_width"), reader.GetInteger(model_name, "head_num"), reader.GetInteger(model_name, "size_per_head"), reader.GetInteger(model_name, "inter_size"), @@ -70,24 +80,21 @@ std::shared_ptr AbstractTransformerModel::createGptMod reader.GetInteger(model_name, "vocab_size"), reader.GetInteger(model_name, "start_id"), reader.GetInteger(model_name, "end_id"), - reader.GetFloat("ft_instance_hyperparameter", "beam_search_diversity_rate"), - reader.GetInteger("ft_instance_hyperparameter", "top_k"), - reader.GetFloat("ft_instance_hyperparameter", "top_p"), - reader.GetFloat("ft_instance_hyperparameter", "temperature"), - reader.GetFloat("ft_instance_hyperparameter", "len_penalty"), - reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty"), reader.GetInteger("ft_instance_hyperparameter", "tensor_para_size"), reader.GetInteger("ft_instance_hyperparameter", "pipeline_para_size"), reader.Get("ft_instance_hyperparameter", "model_name"), reader.Get("ft_instance_hyperparameter", "model_dir"), - reader.GetInteger("ft_instance_hyperparameter", "int8_mode")); + reader.GetInteger("ft_instance_hyperparameter", "int8_mode"), + reader.GetInteger("ft_instance_hyperparameter", "enable_custom_all_reduce", 0)); + } + else { + FT_LOG_ERROR("Unspported data type " + data_type); + exit(-1); + } } template -ParallelGptTritonModel::ParallelGptTritonModel(size_t max_batch_size, - size_t max_seq_len, - size_t max_input_len, - size_t beam_width, +ParallelGptTritonModel::ParallelGptTritonModel(size_t max_seq_len, size_t head_num, size_t size_per_head, size_t inter_size, @@ -95,21 +102,13 @@ ParallelGptTritonModel::ParallelGptTritonModel(size_t max_batch_size, size_t vocab_size, int start_id, int end_id, - float beam_search_diversity_rate, - size_t top_k, - float top_p, - float temperature, - float len_penalty, - float repetition_penalty, size_t tensor_para_size, size_t pipeline_para_size, std::string model_name, std::string model_dir, - int int8_mode): - max_batch_size_(max_batch_size), + int int8_mode, + int enable_custom_all_reduce): max_seq_len_(max_seq_len), - max_input_len_(max_input_len), - beam_width_(beam_width), head_num_(head_num), size_per_head_(size_per_head), inter_size_(inter_size), @@ -117,17 +116,12 @@ ParallelGptTritonModel::ParallelGptTritonModel(size_t max_batch_size, vocab_size_(vocab_size), start_id_(start_id), end_id_(end_id), - beam_search_diversity_rate_(beam_search_diversity_rate), - top_k_(top_k), - top_p_(top_p), - temperature_(temperature), - len_penalty_(len_penalty), - repetition_penalty_(repetition_penalty), tensor_para_size_(tensor_para_size), pipeline_para_size_(pipeline_para_size), model_name_(model_name), model_dir_(model_dir), - int8_mode_(int8_mode) + int8_mode_(int8_mode), + enable_custom_all_reduce_(enable_custom_all_reduce) { } @@ -136,7 +130,8 @@ std::unique_ptr ParallelGptTritonModel::createModelInstance(int device_id, int rank, cudaStream_t stream, - std::pair, std::vector> nccl_comms) + std::pair, std::vector> nccl_comms, + std::shared_ptr custom_all_reduce_comm) { ft::check_cuda_error(cudaSetDevice(device_id)); const int tensor_para_rank = rank % tensor_para_size_; @@ -145,6 +140,8 @@ ParallelGptTritonModel::createModelInstance(int device_id, std::unique_ptr> allocator( new ft::Allocator(device_id)); + allocator->setStream(stream); + cublasHandle_t cublas_handle; cublasLtHandle_t cublaslt_handle; @@ -163,15 +160,23 @@ ParallelGptTritonModel::createModelInstance(int device_id, if (std::is_same::value) { cublas_wrapper->setGemmConfig(CUDA_R_16F, CUDA_R_16F, CUDA_R_16F, CUDA_R_32F); } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + cublas_wrapper->setBF16GemmConfig(); + } +#endif else if (std::is_same::value) { cublas_wrapper->setFP32GemmConfig(); } + ft::NcclParam tensor_para(tensor_para_rank, tensor_para_size_, nccl_comms.first[device_id]); + ft::NcclParam pipeline_para(pipeline_para_rank, pipeline_para_size_, nccl_comms.second[device_id]); + auto gpt = std::make_unique>( ft::ParallelGpt(0, // max_batch_size, FT will adjust the buffer automatically. 0, // max_seq_len, FT will adjust the buffer automatically. 0, // max_input_len, FT will adjust the buffer automatically. - beam_width_, + 0, head_num_, size_per_head_, inter_size_, @@ -179,26 +184,24 @@ ParallelGptTritonModel::createModelInstance(int device_id, vocab_size_, start_id_, end_id_, - beam_search_diversity_rate_, - top_k_, - top_p_, - 0, // random seed, note that all gpus should use same seed - temperature_, - len_penalty_, - repetition_penalty_, - tensor_para_size_, - tensor_para_rank, - nccl_comms.first[device_id], - pipeline_para_size_, - pipeline_para_rank, - nccl_comms.second[device_id], + 0.0f, // beam_search_diversity_rate_, + 1, // top_k_, + 0.0f, // top_p_, + 0, // random seed, note that all gpus should use same seed + 1.0f, // temperature_, + 1.0f, // len_penalty_, + 1.0f, // repetition_penalty_, + tensor_para, + pipeline_para, stream, cublas_wrapper.get(), allocator.get(), false, cuda_device_prop_ptr.get(), false, - int8_mode_)); + int8_mode_, + custom_all_reduce_comm, + enable_custom_all_reduce_)); auto weight = std::unique_ptr>(new ft::ParallelGptWeight(head_num_ * size_per_head_, inter_size_, @@ -219,10 +222,7 @@ ParallelGptTritonModel::createModelInstance(int device_id, std::move(cublas_algo_map), std::move(cublas_wrapper_mutex), std::move(cublas_wrapper), - std::move(cuda_device_prop_ptr), - max_batch_size_, - max_seq_len_, - beam_width_)); + std::move(cuda_device_prop_ptr))); } template @@ -230,15 +230,12 @@ std::string ParallelGptTritonModel::toString() { std::stringstream ss; ss << "Model: " - << "\nmax_batch_size: " << max_batch_size_ << "\nmax_seq_len: " << max_seq_len_ - << "\nmax_input_len: " << max_input_len_ << "\nbeam_width: " << beam_width_ << "\nhead_num: " << head_num_ - << "\nsize_per_head: " << size_per_head_ << "\ninter_size: " << inter_size_ << "\nnum_layer: " << num_layer_ - << "\nvocab_size: " << vocab_size_ << "\nstart_id: " << start_id_ << "\nend_id: " << end_id_ - << "\nbeam_search_diversity_rate: " << beam_search_diversity_rate_ << "\ntop_k: " << top_k_ - << "\ntop_p: " << top_p_ << "\ntemperature: " << temperature_ << "\nlen_penalty: " << len_penalty_ - << "\nrepetition_penalty: " << repetition_penalty_ << "\ntensor_para_size: " << tensor_para_size_ + << "\nmax_seq_len: " << max_seq_len_ << "\nhead_num: " << head_num_ << "\nsize_per_head: " << size_per_head_ + << "\ninter_size: " << inter_size_ << "\nnum_layer: " << num_layer_ << "\nvocab_size: " << vocab_size_ + << "\nstart_id: " << start_id_ << "\nend_id: " << end_id_ << "\ntensor_para_size: " << tensor_para_size_ << "\npipeline_para_size: " << pipeline_para_size_ << "\nint8_mode: " << int8_mode_ - << "\nmodel_name: " << model_name_ << "\nmodel_dir: " << model_dir_ << std::endl; + << "\nenable_custom_all_reduce: " << enable_custom_all_reduce_ << "\nmodel_name: " << model_name_ + << "\nmodel_dir: " << model_dir_ << std::endl; return ss.str(); } @@ -246,25 +243,23 @@ template std::vector ParallelGptTritonModel::createNcclIds(const uint32_t world_size, bool multi_instances) { std::vector nccl_ids(tensor_para_size_ + pipeline_para_size_); - if (multi_instances) - { + if (multi_instances) { if (tensor_para_size_ * pipeline_para_size_ != 1) { - printf("[ERROR] Multiple Instances currently only support tensor_para_size_ and pipeline_para_size_ both 1\n"); + printf( + "[ERROR] Multiple Instances currently only support tensor_para_size_ and pipeline_para_size_ both 1\n"); ft::FT_CHECK(tensor_para_size_ == 1 && pipeline_para_size_ == 1); } nccl_ids.resize(2); } - else - { + else { if (world_size != tensor_para_size_ * pipeline_para_size_) { - printf("[ERROR] world_size (%d) should equal to tensor_para_size_ * pipeline_para_size_ (%ld * %ld here) \n", - world_size, - tensor_para_size_, - pipeline_para_size_); - ft::FT_CHECK(world_size == tensor_para_size_ * pipeline_para_size_); + ft::FT_CHECK_WITH_INFO(world_size == tensor_para_size_ * pipeline_para_size_, + "world_size == tensor_para_size_ * pipeline_para_size_ (" + + std::to_string(world_size) + " != " + std::to_string(tensor_para_size_) + "*" + + std::to_string(pipeline_para_size_) + ")"); } } - + for (uint32_t i = 0; i < nccl_ids.size(); i++) { NCCLCHECK(ncclGetUniqueId(&nccl_ids[i])); } @@ -272,26 +267,25 @@ std::vector ParallelGptTritonModel::createNcclIds(const uint32_ } template -std::pair, std::vector> -ParallelGptTritonModel::createNcclComms(std::vector nccl_ids, const int node_id, bool multi_instances, int instance_id) +std::pair, std::vector> ParallelGptTritonModel::createNcclComms( + std::vector nccl_ids, const int node_id, bool multi_instances, int instance_id) { const int gpu_count = ft::getDeviceCount(); std::vector tensor_para_comms(gpu_count); std::vector pipeline_para_comms(gpu_count); - if (multi_instances) - { + if (multi_instances) { ncclUniqueId tensor_para_nccl_uid = nccl_ids[0]; ncclUniqueId pipeline_para_nccl_uid = nccl_ids[1]; size_t tensor_para_rank = 0; size_t pipeline_para_rank = 0; ft::check_cuda_error(cudaSetDevice(instance_id)); - NCCLCHECK(ncclCommInitRank(&tensor_para_comms[instance_id], tensor_para_size_, tensor_para_nccl_uid, tensor_para_rank)); + NCCLCHECK(ncclCommInitRank( + &tensor_para_comms[instance_id], tensor_para_size_, tensor_para_nccl_uid, tensor_para_rank)); NCCLCHECK(ncclCommInitRank( &pipeline_para_comms[instance_id], pipeline_para_size_, pipeline_para_nccl_uid, pipeline_para_rank)); } - else - { + else { NCCLCHECK(ncclGroupStart()); for (int gid = 0; gid < gpu_count; gid++) { int rank = node_id * gpu_count + gid; @@ -301,7 +295,8 @@ ParallelGptTritonModel::createNcclComms(std::vector nccl_ids, c ncclUniqueId pipeline_para_nccl_uid = nccl_ids[pipeline_para_size_ + tensor_para_rank]; ft::check_cuda_error(cudaSetDevice(gid)); - NCCLCHECK(ncclCommInitRank(&tensor_para_comms[gid], tensor_para_size_, tensor_para_nccl_uid, tensor_para_rank)); + NCCLCHECK( + ncclCommInitRank(&tensor_para_comms[gid], tensor_para_size_, tensor_para_nccl_uid, tensor_para_rank)); NCCLCHECK(ncclCommInitRank( &pipeline_para_comms[gid], pipeline_para_size_, pipeline_para_nccl_uid, pipeline_para_rank)); } @@ -311,9 +306,11 @@ ParallelGptTritonModel::createNcclComms(std::vector nccl_ids, c } template -std::pair ParallelGptTritonModel::getMaxBatchSeqlen() +void ParallelGptTritonModel::createCustomComms( + std::vector>* custom_all_reduce_comms, int world_size) { - return std::pair(max_batch_size_, max_seq_len_); + using commDataType = typename ft::CustomARCommTypeConverter::Type; + ft::initCustomAllReduceComm(custom_all_reduce_comms, enable_custom_all_reduce_, world_size); } template @@ -330,3 +327,6 @@ int ParallelGptTritonModel::getPipelineParaSize() template struct ParallelGptTritonModel; template struct ParallelGptTritonModel; +#ifdef ENABLE_BF16 +template struct ParallelGptTritonModel<__nv_bfloat16>; +#endif \ No newline at end of file diff --git a/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModel.h b/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModel.h index 6aa324a00..7192bded9 100644 --- a/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModel.h +++ b/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,20 +16,19 @@ #pragma once +#include + #include "src/fastertransformer/models/multi_gpu_gpt/ParallelGpt.h" #include "src/fastertransformer/triton_backend/transformer_triton_backend.hpp" #include "src/fastertransformer/utils/cuda_utils.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" #include "src/fastertransformer/utils/nccl_utils.h" -#include namespace ft = fastertransformer; template struct ParallelGptTritonModel: public AbstractTransformerModel { - ParallelGptTritonModel(size_t max_batch_size, - size_t max_seq_len, - size_t max_input_len, - size_t beam_width, + ParallelGptTritonModel(size_t max_seq_len, size_t head_num, size_t size_per_head, size_t inter_size, @@ -37,41 +36,37 @@ struct ParallelGptTritonModel: public AbstractTransformerModel { size_t vocab_size, int start_id, int end_id, - float beam_search_diversity_rate, - size_t top_k, - float top_p, - float temperature, - float len_penalty, - float repetition_penalty, size_t tensor_para_size, size_t pipeline_para_size, std::string model_name, std::string model_dir, - int int8_mode); - - ~ParallelGptTritonModel() = default; + int int8_mode, + int enable_custom_all_reduce); virtual std::unique_ptr createModelInstance(int deviceId, int rank, cudaStream_t stream, - std::pair, std::vector> nccl_comms) override; + std::pair, std::vector> nccl_comms, + std::shared_ptr custom_all_reduce_comm = nullptr) override; virtual std::pair, std::vector> - createNcclComms(std::vector nccl_ids, const int node_id, bool multi_instances = false, int instance_id = 0) override; + createNcclComms(std::vector nccl_ids, + const int node_id, + bool multi_instances = false, + int instance_id = 0) override; + + virtual void createCustomComms(std::vector>* custom_all_reduce_comms, + int world_size) override; virtual std::vector createNcclIds(const uint32_t world_size, bool multi_instances = false) override; virtual std::string toString() override; - virtual std::pair getMaxBatchSeqlen() override; virtual int getTensorParaSize() override; virtual int getPipelineParaSize() override; private: - const size_t max_batch_size_; const size_t max_seq_len_; - const size_t max_input_len_; - const size_t beam_width_; const size_t head_num_; const size_t size_per_head_; const size_t inter_size_; @@ -79,12 +74,6 @@ struct ParallelGptTritonModel: public AbstractTransformerModel { const size_t vocab_size_; const int start_id_; const int end_id_; - const float beam_search_diversity_rate_; - const size_t top_k_; - const float top_p_; - const float temperature_; - const float len_penalty_; - const float repetition_penalty_; const size_t tensor_para_size_; const size_t pipeline_para_size_; @@ -93,4 +82,5 @@ struct ParallelGptTritonModel: public AbstractTransformerModel { std::string model_name_; std::string model_dir_; int int8_mode_ = 0; + int enable_custom_all_reduce_ = 0; }; diff --git a/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModelInstance.cc b/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModelInstance.cc index 928d0bec1..831079442 100644 --- a/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModelInstance.cc +++ b/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModelInstance.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,7 +16,11 @@ #include "src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModelInstance.h" #include "src/fastertransformer/triton_backend/transformer_triton_backend.hpp" +#include "src/fastertransformer/triton_backend/triton_utils.hpp" #include "src/fastertransformer/utils/Tensor.h" +#include +#include +#include #include namespace ft = fastertransformer; @@ -29,110 +33,136 @@ ParallelGptTritonModelInstance::ParallelGptTritonModelInstance( std::unique_ptr cublas_algo_map, std::unique_ptr cublas_wrapper_mutex, std::unique_ptr cublas_wrapper, - std::unique_ptr cuda_device_prop_ptr, - const size_t max_batch_size, - const size_t max_seq_len, - const size_t beam_width): + std::unique_ptr cuda_device_prop_ptr): gpt_(std::move(gpt)), gpt_weight_(std::move(gpt_weight)), allocator_(std::move(allocator)), cublas_algo_map_(std::move(cublas_algo_map)), cublas_wrapper_mutex_(std::move(cublas_wrapper_mutex)), cublas_wrapper_(std::move(cublas_wrapper)), - cuda_device_prop_ptr_(std::move(cuda_device_prop_ptr)), - max_batch_size_(max_batch_size), - max_seq_len_(max_seq_len), - beam_width_(beam_width) + cuda_device_prop_ptr_(std::move(cuda_device_prop_ptr)) { } template -std::vector -ParallelGptTritonModelInstance::convert_inputs(std::shared_ptr> input_tensors) +std::shared_ptr> +ParallelGptTritonModelInstance::forward(std::shared_ptr> input_tensors) { - if (input_tensors->at(0).where == triton::MEMORY_CPU) { - size_t size = 1; - for (auto t : input_tensors->at(0).shape) { - size = size * t; - } - ft::deviceMalloc(&d_input_ids_, size, false); - ft::cudaH2Dcpy(d_input_ids_, (int*)(input_tensors->at(0).data), size); + ft::FT_CHECK(false); + return nullptr; +} + +template +std::unordered_map ParallelGptTritonModelInstance::convert_inputs( + std::shared_ptr> input_tensors) +{ + move_tensor_H2D(input_tensors->at("input_ids"), d_input_ids_); + move_tensor_H2D(input_tensors->at("input_lengths"), d_input_lengths_); + + std::unordered_map ft_input_tensors{ + {"input_ids", as_GPU_tensor(input_tensors->at("input_ids"), d_input_ids_)}, + {"input_lengths", as_GPU_tensor(input_tensors->at("input_lengths"), d_input_lengths_)}, + {"max_output_seq_len", ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT32, {1}, &h_total_output_len_}}}; + + if (input_tensors->count("prefix_soft_prompt_embedding") && input_tensors->count("prefix_soft_prompt_lengths")) { + + move_tensor_H2D(input_tensors->at("prefix_soft_prompt_lengths"), d_prefix_soft_prompt_lengths_); + ft_input_tensors.insert( + {"prefix_soft_prompt_lengths", + as_GPU_tensor(input_tensors->at("prefix_soft_prompt_lengths"), d_prefix_soft_prompt_lengths_)}); + + move_tensor_H2D(input_tensors->at("prefix_soft_prompt_embedding"), d_prefix_soft_prompt_embedding_); + ft_input_tensors.insert( + {"prefix_soft_prompt_embedding", + as_GPU_tensor(input_tensors->at("prefix_soft_prompt_embedding"), d_prefix_soft_prompt_embedding_)}); } - if (input_tensors->at(1).where == triton::MEMORY_CPU) { - size_t size = 1; - for (auto t : input_tensors->at(1).shape) { - size = size * t; + if (input_tensors->find("bad_words_list") != input_tensors->end()) { + move_tensor_H2D(input_tensors->at("bad_words_list"), d_input_bad_words_); + ft_input_tensors.insert( + {"bad_words_list", as_GPU_tensor(input_tensors->at("bad_words_list"), d_input_bad_words_)}); + } + + if (input_tensors->find("stop_words_list") != input_tensors->end()) { + move_tensor_H2D(input_tensors->at("stop_words_list"), d_input_stop_words_); + ft_input_tensors.insert( + {"stop_words_list", as_GPU_tensor(input_tensors->at("stop_words_list"), d_input_stop_words_)}); + } + + for (auto t = input_tensors->begin(); t != input_tensors->end(); ++t) { + if (t->first.find("input_ids") == std::string::npos && t->first.find("input_lengths") == std::string::npos + && t->first.find("max_output_seq_len") == std::string::npos + && t->first.find("prefix_soft_prompt_embedding") == std::string::npos + && t->first.find("prefix_soft_prompt_lengths") == std::string::npos) { + ft_input_tensors.insert({t->first, t->second.convertTritonTensorToFt()}); } - ft::deviceMalloc(&d_input_lengths_, size, false); - ft::cudaH2Dcpy(d_input_lengths_, (int*)(input_tensors->at(1).data), size); } - h_total_output_len_ = - (*((int*)input_tensors->at(2).data)) - + (input_tensors->at(0).shape.size() == 3 ? input_tensors->at(0).shape[2] : input_tensors->at(0).shape[1]); - std::vector ft_input_tensors = std::vector{ - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_INT32, - input_tensors->at(0).shape.size() == 3 ? - std::vector{input_tensors->at(0).shape[0] * input_tensors->at(0).shape[1], - input_tensors->at(0).shape[2]} : - std::vector{input_tensors->at(0).shape[0] * beam_width_, - input_tensors->at(0).shape[1]}, - input_tensors->at(0).where == triton::MEMORY_CPU ? d_input_ids_ : input_tensors->at(0).data}, - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_INT32, - input_tensors->at(1).shape.size() == 2 ? - std::vector{input_tensors->at(1).shape[0] * input_tensors->at(1).shape[1]} : - input_tensors->at(1).shape, - input_tensors->at(1).where == triton::MEMORY_CPU ? d_input_lengths_ : input_tensors->at(1).data}, - ft::Tensor{ft::MEMORY_CPU, ft::TYPE_INT32, {1}, &h_total_output_len_}}; return ft_input_tensors; } template -std::shared_ptr> -ParallelGptTritonModelInstance::convert_outputs(const std::vector& output_tensors) +std::shared_ptr> +ParallelGptTritonModelInstance::convert_outputs(const std::unordered_map& output_tensors) { - // Remove the dimension of beam_width of output ids - // change output.shape to [batch_size, beam_width, total_output_len] - return std::shared_ptr>(new std::vector{ - triton::Tensor{triton::MEMORY_GPU, - triton::TYPE_UINT32, - output_tensors[0].shape, - d_output_ids_}}); + std::unordered_map* outputs_mapping = + new std::unordered_map(); + + for (auto it = output_tensors.begin(); it != output_tensors.end(); it++) { + outputs_mapping->insert({it->first, triton::Tensor::convertFtTensorToTriton(it->second)}); + } + + return std::shared_ptr>(outputs_mapping); } template -std::shared_ptr> -ParallelGptTritonModelInstance::forward(std::shared_ptr> input_tensors) +std::shared_ptr> ParallelGptTritonModelInstance::forward( + std::shared_ptr> input_tensors) { - const size_t request_batch_size = input_tensors->at(0).shape[0]; - const size_t request_output_len = (size_t) * ((int*)(input_tensors->at(2).data)); - const size_t total_output_len = - request_output_len - + (input_tensors->at(0).shape.size() == 3 ? input_tensors->at(0).shape[2] : input_tensors->at(0).shape[1]); + ft::FT_CHECK_WITH_INFO(input_tensors->at("input_ids").shape.size() == 2, + "input_tensors->at(\"input_ids\").shape.size() == 2"); + ft::FT_CHECK_WITH_INFO(input_tensors->at("input_lengths").shape.size() == 1, + "input_tensors->at(\"input_lengths\").shape.size() == 1"); + const size_t request_batch_size = input_tensors->at("input_ids").shape[0]; + const size_t request_output_len = (size_t)(*(uint*)input_tensors->at("request_output_len").data); + const size_t beam_width = + input_tensors->count("beam_width") ? (size_t)(*(uint*)input_tensors->at("beam_width").data) : 1; + h_total_output_len_ = request_output_len + input_tensors->at("input_ids").shape[1]; freeBuffer(); // free buffer of previous iteration - allocateBuffer(request_batch_size, total_output_len); - - std::vector ft_input_tensors = convert_inputs(input_tensors); - - std::vector output_tensors = std::vector{ - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_INT32, - std::vector{request_batch_size, beam_width_,(size_t)total_output_len}, - d_output_ids_}, - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_INT32, - std::vector{(size_t)total_output_len, request_batch_size, beam_width_}, - d_parent_ids_}, - ft::Tensor{ - ft::MEMORY_GPU, ft::TYPE_INT32, std::vector{request_batch_size, beam_width_}, d_sequence_lengths_}, - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_FP32, - std::vector{request_output_len, request_batch_size, beam_width_}, - nullptr}}; + allocateBuffer(request_batch_size, beam_width, h_total_output_len_, request_output_len); + + std::unordered_map ft_input_tensors = convert_inputs(input_tensors); + + std::unordered_map output_tensors = std::unordered_map{ + {"output_ids", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_UINT32, + std::vector{request_batch_size, beam_width, (size_t)h_total_output_len_}, + d_output_ids_}}, + {"parent_ids", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{(size_t)h_total_output_len_, request_batch_size, beam_width}, + d_parent_ids_}}, + {"sequence_length", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{request_batch_size, beam_width}, + d_sequence_lengths_}}}; + + if (input_tensors->count("is_return_log_probs") && *((bool*)input_tensors->at("is_return_log_probs").data)) { + output_tensors.insert({"output_log_probs", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_FP32, + std::vector{request_batch_size, beam_width, request_output_len}, + d_output_log_probs_}}); + output_tensors.insert({"cum_log_probs", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_FP32, + std::vector{request_batch_size, beam_width}, + d_cum_log_probs_}}); + } gpt_->forward(&output_tensors, &ft_input_tensors, gpt_weight_.get()); if (d_input_ids_ != nullptr) { @@ -143,7 +173,23 @@ ParallelGptTritonModelInstance::forward(std::shared_ptr::~ParallelGptTritonModelInstance() } template -void ParallelGptTritonModelInstance::allocateBuffer(const size_t request_batch_size, const size_t total_output_len) +void ParallelGptTritonModelInstance::allocateBuffer(const size_t request_batch_size, + const size_t beam_width, + const size_t total_output_len, + const size_t request_output_len) { - ft::deviceMalloc(&d_output_ids_, request_batch_size * beam_width_ * total_output_len); - ft::deviceMalloc(&d_parent_ids_, request_batch_size * beam_width_ * total_output_len); - ft::deviceMalloc(&d_sequence_lengths_, request_batch_size * beam_width_); + ft::deviceMalloc(&d_output_ids_, request_batch_size * beam_width * total_output_len); + ft::deviceMalloc(&d_parent_ids_, request_batch_size * beam_width * total_output_len); + ft::deviceMalloc(&d_sequence_lengths_, request_batch_size * beam_width); + ft::deviceMalloc(&d_output_log_probs_, request_output_len * request_batch_size * beam_width); + ft::deviceMalloc(&d_cum_log_probs_, request_batch_size * beam_width); } template @@ -167,7 +218,12 @@ void ParallelGptTritonModelInstance::freeBuffer() ft::deviceFree(d_output_ids_); ft::deviceFree(d_parent_ids_); ft::deviceFree(d_sequence_lengths_); + ft::deviceFree(d_output_log_probs_); + ft::deviceFree(d_cum_log_probs_); } template struct ParallelGptTritonModelInstance; template struct ParallelGptTritonModelInstance; +#ifdef ENABLE_BF16 +template struct ParallelGptTritonModelInstance<__nv_bfloat16>; +#endif \ No newline at end of file diff --git a/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModelInstance.h b/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModelInstance.h index 93032f536..da7f4a559 100644 --- a/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModelInstance.h +++ b/src/fastertransformer/triton_backend/multi_gpu_gpt/ParallelGptTritonModelInstance.h @@ -32,15 +32,15 @@ struct ParallelGptTritonModelInstance: AbstractTransformerModelInstance { std::unique_ptr cublas_algo_map, std::unique_ptr cublas_wrapper_mutex, std::unique_ptr cublas_wrapper, - std::unique_ptr cuda_device_prop_ptr, - const size_t max_batch_size, - const size_t max_seq_len, - const size_t beam_width); + std::unique_ptr cuda_device_prop_ptr); ~ParallelGptTritonModelInstance(); std::shared_ptr> forward(std::shared_ptr> input_tensors) override; + std::shared_ptr> + forward(std::shared_ptr> input_tensors) override; + private: const std::unique_ptr> gpt_; const std::unique_ptr> gpt_weight_; @@ -50,22 +50,29 @@ struct ParallelGptTritonModelInstance: AbstractTransformerModelInstance { const std::unique_ptr cublas_wrapper_; const std::unique_ptr cuda_device_prop_ptr_; - std::vector convert_inputs(std::shared_ptr> input_tensors); - std::shared_ptr> convert_outputs(const std::vector& output_tensors); + std::unordered_map + convert_inputs(std::shared_ptr> input_tensors); + std::shared_ptr> + convert_outputs(const std::unordered_map& output_tensors); - void allocateBuffer(const size_t request_batch_size, const size_t total_output_len); + void allocateBuffer(const size_t request_batch_size, + const size_t beam_width, + const size_t total_output_len, + const size_t request_output_len); void freeBuffer(); - const size_t max_batch_size_; - const size_t max_seq_len_; - const size_t beam_width_; - int* d_input_ids_ = nullptr; int* d_input_lengths_ = nullptr; + int* d_prefix_soft_prompt_lengths_ = nullptr; + int* d_input_bad_words_ = nullptr; + int* d_input_stop_words_ = nullptr; + float* d_prefix_soft_prompt_embedding_ = nullptr; int* d_output_ids_ = nullptr; int* d_parent_ids_ = nullptr; int* d_sequence_lengths_ = nullptr; + float* d_output_log_probs_ = nullptr; + float* d_cum_log_probs_ = nullptr; int h_total_output_len_; }; diff --git a/src/fastertransformer/triton_backend/t5/CMakeLists.txt b/src/fastertransformer/triton_backend/t5/CMakeLists.txt index 26a7926c3..f6638868a 100644 --- a/src/fastertransformer/triton_backend/t5/CMakeLists.txt +++ b/src/fastertransformer/triton_backend/t5/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -14,7 +14,6 @@ cmake_minimum_required(VERSION 3.8) -if(BUILD_GPT) set(t5_triton_backend_files T5TritonModel.cc T5TritonModelInstance.cc @@ -23,4 +22,3 @@ set(t5_triton_backend_files add_library(T5TritonBackend SHARED ${t5_triton_backend_files}) target_link_libraries(T5TritonBackend PRIVATE T5Encoder T5Decoding) target_compile_features(T5TritonBackend PRIVATE cxx_std_14) -endif() \ No newline at end of file diff --git a/src/fastertransformer/triton_backend/t5/T5TritonModel.cc b/src/fastertransformer/triton_backend/t5/T5TritonModel.cc index 97cf61ffa..29b2ce6b3 100644 --- a/src/fastertransformer/triton_backend/t5/T5TritonModel.cc +++ b/src/fastertransformer/triton_backend/t5/T5TritonModel.cc @@ -1,6 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. - * Copyright (c) 2021, NAVER Corp. Authored by CLOVA. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -22,8 +21,7 @@ namespace ft = fastertransformer; -std::shared_ptr AbstractTransformerModel::createT5Model(const int max_batch_size, - std::string model_dir) +std::shared_ptr AbstractTransformerModel::createT5Model(std::string model_dir) { INIReader reader = INIReader(model_dir + "/config.ini"); if (reader.ParseError() < 0) { @@ -34,78 +32,55 @@ std::shared_ptr AbstractTransformerModel::createT5Mode const int is_half = reader.GetInteger("ft_instance_hyperparameter", "is_half"); if (is_half) { - return std::make_shared>(max_batch_size, reader, model_dir); + return std::make_shared>(reader, model_dir); } else { - return std::make_shared>(max_batch_size, reader, model_dir); + return std::make_shared>(reader, model_dir); } } template -T5TritonModel::T5TritonModel(const int max_batch_size, INIReader reader, std::string model_dir): - max_batch_size_(max_batch_size), model_dir_(model_dir) +T5TritonModel::T5TritonModel(INIReader reader, std::string model_dir): model_dir_(model_dir) { // encoder - max_encoder_seq_len_ = 1; encoder_head_num_ = reader.GetInteger("encoder", "num_heads"); encoder_size_per_head_ = reader.GetInteger("encoder", "d_kv"); encoder_d_model_ = reader.GetInteger("encoder", "d_model"); encoder_inter_size_ = reader.GetInteger("encoder", "d_ff"); encoder_num_layer_ = reader.GetInteger("encoder", "num_layers"); encoder_vocab_size_ = reader.GetInteger("encoder", "vocab_size"); - encoder_num_bucket_ = reader.GetInteger("encoder", "relative_attention_num_buckets"); + encoder_num_bucket_or_max_pos_seq_len_ = + reader.GetInteger("encoder", "relative_attention_num_buckets_or_max_pos_seq_len"); // decoding - max_decoding_seq_len_ = reader.GetInteger("ft_instance_hyperparameter", "max_decoding_seq_len"); - beam_width_ = reader.GetInteger("ft_instance_hyperparameter", "beam_width"); decoding_head_num_ = reader.GetInteger("decoder", "num_heads"); decoding_size_per_head_ = reader.GetInteger("decoder", "d_kv"); decoding_d_model_ = reader.GetInteger("decoder", "d_model"); decoding_inter_size_ = reader.GetInteger("decoder", "d_ff"); decoding_num_layer_ = reader.GetInteger("decoder", "num_layers"); decoding_vocab_size_ = reader.GetInteger("decoder", "vocab_size"); - decoding_num_bucket_ = reader.GetInteger("decoder", "relative_attention_num_buckets"); + decoding_num_bucket_or_max_pos_seq_len_ = + reader.GetInteger("decoder", "relative_attention_num_buckets_or_max_pos_seq_len"); start_id_ = reader.GetInteger("decoder", "decoder_start_token_id"); end_id_ = reader.GetInteger("decoder", "eos_token_id"); - beam_search_diversity_rate_ = reader.GetFloat("ft_instance_hyperparameter", "beam_search_diversity_rate"); - top_k_ = reader.GetFloat("ft_instance_hyperparameter", "top_k"); - top_p_ = reader.GetFloat("ft_instance_hyperparameter", "top_p"); - temperature_ = reader.GetFloat("ft_instance_hyperparameter", "temperature"); - len_penalty_ = reader.GetFloat("ft_instance_hyperparameter", "len_penalty"); - repetition_penalty_ = reader.GetFloat("ft_instance_hyperparameter", "repetition_penalty"); tensor_para_size_ = reader.GetInteger("ft_instance_hyperparameter", "tensor_para_size"); pipeline_para_size_ = reader.GetInteger("ft_instance_hyperparameter", "pipeline_para_size"); - + enable_custom_all_reduce_ = reader.GetInteger("ft_instance_hyperparameter", "enable_custom_all_reduce", 0); + t5_with_bias_ = (bool)reader.GetInteger("structure", "t5_with_bias", 0); + position_embedding_type_ = ft::PositionEmbeddingType(reader.GetInteger("structure", "position_embedding_type", 0)); + q_scaling_ = t5_with_bias_ ? 1.0f : (1.0f / (sqrt(encoder_size_per_head_) * 1.0f)); max_distance_ = 128; // use default value of huggingface here } template -T5TritonModel::T5TritonModel(size_t max_batch_size, - size_t max_decoding_seq_len, - size_t max_encoder_seq_len, - size_t beam_width, - float beam_search_diversity_rate, - size_t top_k, - float top_p, - float temperature, - float len_penalty, - float repetition_penalty, - size_t tensor_para_size, +T5TritonModel::T5TritonModel(size_t tensor_para_size, size_t pipeline_para_size, + int enable_custom_all_reduce, std::string model_dir, int int8_mode): - max_batch_size_(max_batch_size), - max_decoding_seq_len_(max_decoding_seq_len), - max_encoder_seq_len_(max_encoder_seq_len), - beam_width_(beam_width), - beam_search_diversity_rate_(beam_search_diversity_rate), - top_k_(top_k), - top_p_(top_p), - temperature_(temperature), - len_penalty_(len_penalty), - repetition_penalty_(repetition_penalty), tensor_para_size_(tensor_para_size), pipeline_para_size_(pipeline_para_size), + enable_custom_all_reduce_(enable_custom_all_reduce), model_dir_(model_dir), int8_mode_(int8_mode) { @@ -126,7 +101,8 @@ T5TritonModel::T5TritonModel(size_t max_batch_size, encoder_inter_size_ = reader.GetInteger("encoder", "d_ff"); encoder_num_layer_ = reader.GetInteger("encoder", "num_layers"); encoder_vocab_size_ = reader.GetInteger("encoder", "vocab_size"); - encoder_num_bucket_ = reader.GetInteger("encoder", "relative_attention_num_buckets"); + encoder_num_bucket_or_max_pos_seq_len_ = + reader.GetInteger("encoder", "relative_attention_num_buckets_or_max_pos_seq_len"); // decoding decoding_head_num_ = reader.GetInteger("decoder", "num_heads"); @@ -135,10 +111,15 @@ T5TritonModel::T5TritonModel(size_t max_batch_size, decoding_inter_size_ = reader.GetInteger("decoder", "d_ff"); decoding_num_layer_ = reader.GetInteger("decoder", "num_layers"); decoding_vocab_size_ = reader.GetInteger("decoder", "vocab_size"); - decoding_num_bucket_ = reader.GetInteger("decoder", "relative_attention_num_buckets"); + decoding_num_bucket_or_max_pos_seq_len_ = + reader.GetInteger("decoder", "relative_attention_num_buckets_or_max_pos_seq_len"); start_id_ = reader.GetInteger("decoder", "decoder_start_token_id"); end_id_ = reader.GetInteger("decoder", "eos_token_id"); + t5_with_bias_ = (bool)reader.GetInteger("structure", "t5_with_bias", 0); + position_embedding_type_ = ft::PositionEmbeddingType(reader.GetInteger("structure", "position_embedding_type", 0)); + q_scaling_ = t5_with_bias_ ? 1.0f : (1.0f / (sqrt(encoder_size_per_head_) * 1.0f)); + max_distance_ = 128; // use default value of huggingface here } @@ -147,7 +128,8 @@ std::unique_ptr T5TritonModel::createModelInstance(int device_id, int rank, cudaStream_t stream, - std::pair, std::vector> nccl_comms) + std::pair, std::vector> nccl_comms, + std::shared_ptr custom_all_reduce_comm) { ft::check_cuda_error(cudaSetDevice(device_id)); const int tensor_para_rank = rank % tensor_para_size_; @@ -156,6 +138,8 @@ T5TritonModel::createModelInstance(int device_id, std::unique_ptr> allocator( new ft::Allocator(device_id)); + allocator->setStream(stream); + cublasHandle_t cublas_handle; cublasLtHandle_t cublaslt_handle; @@ -179,9 +163,11 @@ T5TritonModel::createModelInstance(int device_id, } const int sm_ = ft::getSMVersion(); - const float q_scaling_ = 1.0f; - ft::AttentionType attention_type = - ft::getAttentionType(encoder_size_per_head_, sm_, true, max_encoder_seq_len_, false); + + // TODO(bhsueh) not support fused mha + // ft::AttentionType attention_type = + // ft::getAttentionType(encoder_size_per_head_, sm_, true, max_encoder_seq_len_, false); + ft::AttentionType attention_type = ft::AttentionType::UNFUSED_MHA; ft::NcclParam tensor_para_; ft::NcclParam pipeline_para_; @@ -193,67 +179,78 @@ T5TritonModel::createModelInstance(int device_id, pipeline_para_.rank_ = pipeline_para_rank; pipeline_para_.nccl_comm_ = nccl_comms.second[device_id]; - auto encoder = std::make_unique>(ft::T5Encoder(0, - max_encoder_seq_len_, - encoder_head_num_, - encoder_size_per_head_, - encoder_inter_size_, - encoder_d_model_, - encoder_num_layer_, - encoder_num_bucket_, - max_distance_, - sm_, - q_scaling_, - stream, - cublas_wrapper.get(), - allocator.get(), - false, - attention_type, - false, - ft::ActivationType::Relu, - ft::LayerNormType::pre_layernorm, - tensor_para_, - pipeline_para_)); - - auto decoding = std::make_unique>(ft::T5Decoding(0, - max_decoding_seq_len_, - max_encoder_seq_len_, - beam_width_, - decoding_head_num_, - decoding_size_per_head_, - decoding_inter_size_, - decoding_d_model_, - decoding_num_layer_, - decoding_vocab_size_, - decoding_num_bucket_, - max_distance_, - start_id_, - end_id_, - beam_search_diversity_rate_, - top_k_, - top_p_, - temperature_, - len_penalty_, - repetition_penalty_, - stream, - cublas_wrapper.get(), - allocator.get(), - false, - cuda_device_prop_ptr.get(), - tensor_para_, - pipeline_para_)); - - auto encoder_weight = std::unique_ptr>(new ft::T5EncoderWeight(encoder_head_num_, - encoder_size_per_head_, - encoder_d_model_, - encoder_inter_size_, - encoder_vocab_size_, - encoder_num_layer_, - encoder_num_bucket_, - tensor_para_.world_size_, - tensor_para_.rank_, - pipeline_para_.world_size_, - pipeline_para_.rank_)); + auto encoder = std::make_unique>( + ft::T5Encoder(0, + 0, + encoder_head_num_, + encoder_size_per_head_, + encoder_inter_size_, + encoder_d_model_, + encoder_num_layer_, + encoder_num_bucket_or_max_pos_seq_len_, + max_distance_, + sm_, + q_scaling_, + stream, + cublas_wrapper.get(), + allocator.get(), + false, + attention_type, + false, + t5_with_bias_ ? ft::ActivationType::Gelu : ft::ActivationType::Relu, + ft::LayerNormType::pre_layernorm, + tensor_para_, + pipeline_para_, + custom_all_reduce_comm, + enable_custom_all_reduce_)); + + auto decoding = std::make_unique>( + ft::T5Decoding(0, + 0, + 0, + 0, + decoding_head_num_, + decoding_size_per_head_, + decoding_inter_size_, + decoding_d_model_, + decoding_num_layer_, + decoding_vocab_size_, + decoding_num_bucket_or_max_pos_seq_len_, + max_distance_, + q_scaling_, + start_id_, + end_id_, + 0.0f, // beam_search_diversity_rate_, + 1, // top_k_, + 0.0f, // top_p_, + 1.0f, // temperature_, + 1.0f, // len_penalty_, + 1.0f, // repetition_penalty_, + stream, + cublas_wrapper.get(), + allocator.get(), + false, + cuda_device_prop_ptr.get(), + tensor_para_, + pipeline_para_, + t5_with_bias_ ? ft::ActivationType::Gelu : ft::ActivationType::Relu, + custom_all_reduce_comm, + enable_custom_all_reduce_)); + + auto encoder_weight = + std::unique_ptr>(new ft::T5EncoderWeight(encoder_head_num_, + encoder_size_per_head_, + encoder_d_model_, + encoder_inter_size_, + encoder_vocab_size_, + encoder_num_layer_, + encoder_num_bucket_or_max_pos_seq_len_, + tensor_para_.world_size_, + tensor_para_.rank_, + pipeline_para_.world_size_, + pipeline_para_.rank_, + t5_with_bias_, + position_embedding_type_)); auto decoding_weight = std::unique_ptr>(new ft::T5DecodingWeight(decoding_head_num_, @@ -263,11 +260,13 @@ T5TritonModel::createModelInstance(int device_id, decoding_vocab_size_, decoding_num_layer_, encoder_d_model_, - decoding_num_bucket_, + decoding_num_bucket_or_max_pos_seq_len_, tensor_para_.world_size_, tensor_para_.rank_, pipeline_para_.world_size_, - pipeline_para_.rank_)); + pipeline_para_.rank_, + t5_with_bias_, + position_embedding_type_)); encoder_weight->loadModel(model_dir_); decoding_weight->loadModel(model_dir_); @@ -280,33 +279,30 @@ T5TritonModel::createModelInstance(int device_id, std::move(cublas_algo_map), std::move(cublas_wrapper_mutex), std::move(cublas_wrapper), - std::move(cuda_device_prop_ptr), - max_batch_size_, - max_decoding_seq_len_, - beam_width_)); + std::move(cuda_device_prop_ptr))); } template std::string T5TritonModel::toString() { std::stringstream ss; + std::string position_embedding_type_string = + position_embedding_type_ == ft::PositionEmbeddingType::relative ? "relative" : "absolute"; ss << "\nModel: " - << "\n max_batch_size_: " << max_batch_size_ << "\n max_encoder_seq_len_: " << max_encoder_seq_len_ << "\n encoder_head_num_: " << encoder_head_num_ << "\n encoder_size_per_head_: " << encoder_size_per_head_ << "\n encoder_d_model_: " << encoder_d_model_ << "\n encoder_inter_size_: " << encoder_inter_size_ << "\n encoder_num_layer_: " << encoder_num_layer_ << "\n encoder_vocab_size_: " << encoder_vocab_size_ - << "\n encoder_num_bucket_: " << encoder_num_bucket_ - << "\n max_decoding_seq_len_: " << max_decoding_seq_len_ << "\n beam_width_: " << beam_width_ + << "\n encoder_num_bucket_or_max_pos_seq_len_: " << encoder_num_bucket_or_max_pos_seq_len_ << "\n decoding_head_num_: " << decoding_head_num_ << "\n decoding_size_per_head_: " << decoding_size_per_head_ << "\n decoding_d_model_: " << decoding_d_model_ << "\n decoding_inter_size_: " << decoding_inter_size_ << "\n decoding_num_layer_: " << decoding_num_layer_ << "\n decoding_vocab_size_: " << decoding_vocab_size_ - << "\n decoding_num_bucket_: " << decoding_num_bucket_ << "\n start_id_: " << start_id_ - << "\n end_id_: " << end_id_ << "\n beam_search_diversity_rate_: " << beam_search_diversity_rate_ - << "\n top_k_: " << top_k_ << "\n top_p_: " << top_p_ << "\n temperature_: " << temperature_ - << "\n len_penalty_: " << len_penalty_ << "\n repetition_penalty_: " << repetition_penalty_ - << "\n model_name_: " << model_name_ << "\n model_dir_: " << model_dir_ << std::endl; + << "\n decoding_num_bucket_or_max_pos_seq_len_: " << decoding_num_bucket_or_max_pos_seq_len_ + << "\n t5_with_bias_: " << t5_with_bias_ + << "\n position_embedding_type_: " << position_embedding_type_string << "\n start_id_: " << start_id_ + << "\n end_id_: " << end_id_ << "\n model_name_: " << model_name_ << "\n model_dir_: " << model_dir_ + << std::endl; return ss.str(); } @@ -380,9 +376,11 @@ std::pair, std::vector> T5TritonModel::cr } template -std::pair T5TritonModel::getMaxBatchSeqlen() +void T5TritonModel::createCustomComms(std::vector>* custom_all_reduce_comms, + int world_size) { - return std::pair(max_batch_size_, max_decoding_seq_len_); + using commDataType = typename ft::CustomARCommTypeConverter::Type; + ft::initCustomAllReduceComm(custom_all_reduce_comms, enable_custom_all_reduce_, world_size); } template diff --git a/src/fastertransformer/triton_backend/t5/T5TritonModel.h b/src/fastertransformer/triton_backend/t5/T5TritonModel.h index 69b2e63c8..d5803d8ba 100644 --- a/src/fastertransformer/triton_backend/t5/T5TritonModel.h +++ b/src/fastertransformer/triton_backend/t5/T5TritonModel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -21,6 +21,7 @@ #include "src/fastertransformer/models/t5/T5Encoder.h" #include "src/fastertransformer/triton_backend/transformer_triton_backend.hpp" #include "src/fastertransformer/utils/cuda_utils.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" #include "src/fastertransformer/utils/nccl_utils.h" #include @@ -28,20 +29,11 @@ namespace ft = fastertransformer; template struct T5TritonModel: public AbstractTransformerModel { - T5TritonModel(const int max_batch_size, INIReader reader, std::string model_dir); - - T5TritonModel(size_t max_batch_size, - size_t max_decoding_seq_len, - size_t max_encoder_seq_len, - size_t beam_width, - float beam_search_diversity_rate, - size_t top_k, - float top_p, - float temperature, - float len_penalty, - float repetition_penalty, - size_t tensor_para_size, + T5TritonModel(INIReader reader, std::string model_dir); + + T5TritonModel(size_t tensor_para_size, size_t pipeline_para_size, + int enable_custom_all_reduce, std::string model_dir, int int8_mode); @@ -51,7 +43,11 @@ struct T5TritonModel: public AbstractTransformerModel { createModelInstance(int deviceId, int rank, cudaStream_t stream, - std::pair, std::vector> nccl_comms) override; + std::pair, std::vector> nccl_comms, + std::shared_ptr custom_all_reduce_comm = nullptr); + + virtual void createCustomComms(std::vector>* custom_all_reduce_comms, + int world_size) override; virtual std::pair, std::vector> createNcclComms(std::vector nccl_ids, @@ -61,50 +57,46 @@ struct T5TritonModel: public AbstractTransformerModel { virtual std::vector createNcclIds(const uint32_t world_size, bool multi_instances = false) override; virtual std::string toString() override; - virtual std::pair getMaxBatchSeqlen() override; virtual int getTensorParaSize() override; virtual int getPipelineParaSize() override; private: - size_t max_batch_size_; - // encoder - size_t max_encoder_seq_len_; size_t encoder_head_num_; size_t encoder_size_per_head_; size_t encoder_d_model_; size_t encoder_inter_size_; size_t encoder_num_layer_; size_t encoder_vocab_size_; - size_t encoder_num_bucket_; + size_t encoder_num_bucket_or_max_pos_seq_len_; // decoding - size_t max_decoding_seq_len_; - size_t beam_width_; size_t decoding_head_num_; size_t decoding_size_per_head_; size_t decoding_d_model_; size_t decoding_inter_size_; size_t decoding_num_layer_; size_t decoding_vocab_size_; - size_t decoding_num_bucket_; + size_t decoding_num_bucket_or_max_pos_seq_len_; + + float q_scaling_; size_t max_distance_; int start_id_; int end_id_; - float beam_search_diversity_rate_; - size_t top_k_; - float top_p_; - float temperature_; - float len_penalty_; - float repetition_penalty_; size_t tensor_para_size_; size_t pipeline_para_size_; + // t5 structure difference + bool t5_with_bias_; + ft::PositionEmbeddingType position_embedding_type_; + bool is_fp16_; int int8_mode_; + int enable_custom_all_reduce_ = 0; + std::string model_name_; std::string model_dir_; }; \ No newline at end of file diff --git a/src/fastertransformer/triton_backend/t5/T5TritonModelInstance.cc b/src/fastertransformer/triton_backend/t5/T5TritonModelInstance.cc index d9d84a39a..0024126cb 100644 --- a/src/fastertransformer/triton_backend/t5/T5TritonModelInstance.cc +++ b/src/fastertransformer/triton_backend/t5/T5TritonModelInstance.cc @@ -16,6 +16,7 @@ #include "src/fastertransformer/triton_backend/t5/T5TritonModelInstance.h" #include "src/fastertransformer/triton_backend/transformer_triton_backend.hpp" +#include "src/fastertransformer/triton_backend/triton_utils.hpp" #include "src/fastertransformer/utils/Tensor.h" #include @@ -30,10 +31,7 @@ T5TritonModelInstance::T5TritonModelInstance(std::unique_ptr std::unique_ptr cublas_algo_map, std::unique_ptr cublas_wrapper_mutex, std::unique_ptr cublas_wrapper, - std::unique_ptr cuda_device_prop_ptr, - const size_t max_batch_size, - const size_t max_seq_len, - const size_t beam_width): + std::unique_ptr cuda_device_prop_ptr): t5_encoder_(std::move(t5_encoder)), t5_decoding_(std::move(t5_decoding)), t5_encoder_weight_(std::move(t5_encoder_weight)), @@ -42,91 +40,106 @@ T5TritonModelInstance::T5TritonModelInstance(std::unique_ptr cublas_algo_map_(std::move(cublas_algo_map)), cublas_wrapper_mutex_(std::move(cublas_wrapper_mutex)), cublas_wrapper_(std::move(cublas_wrapper)), - cuda_device_prop_ptr_(std::move(cuda_device_prop_ptr)), - max_batch_size_(max_batch_size), - max_seq_len_(max_seq_len), - beam_width_(beam_width) + cuda_device_prop_ptr_(std::move(cuda_device_prop_ptr)) { } template -std::vector -T5TritonModelInstance::convert_inputs(std::shared_ptr> input_tensors) +std::unordered_map +T5TritonModelInstance::convert_inputs(std::shared_ptr> input_tensors) { - if (input_tensors->at(0).where == triton::MEMORY_CPU) { - size_t size = 1; - for (auto t : input_tensors->at(0).shape) { - size = size * t; - } - ft::deviceMalloc(&d_input_ids_, size, false); - ft::cudaH2Dcpy(d_input_ids_, (int*)(input_tensors->at(0).data), size); - } - - if (input_tensors->at(1).where == triton::MEMORY_CPU) { - size_t size = 1; - for (auto t : input_tensors->at(1).shape) { - size = size * t; - } - ft::deviceMalloc(&d_input_lengths_, size, false); - ft::cudaH2Dcpy(d_input_lengths_, (int*)(input_tensors->at(1).data), size); - } + move_tensor_H2D(input_tensors->at("input_ids"), d_input_ids_); + move_tensor_H2D(input_tensors->at("sequence_length"), d_input_lengths_); - ft::FT_CHECK(input_tensors->at(1).shape[1] == 1); - std::vector ft_input_tensors = std::vector{ - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_INT32, - input_tensors->at(0).shape, - input_tensors->at(0).where == triton::MEMORY_CPU ? d_input_ids_ : input_tensors->at(0).data}, - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_INT32, - std::vector{input_tensors->at(1).shape[0]}, - input_tensors->at(1).where == triton::MEMORY_CPU ? d_input_lengths_ : input_tensors->at(1).data}}; + std::unordered_map ft_input_tensors{ + {"input_ids", as_GPU_tensor(input_tensors->at("input_ids"), d_input_ids_)}, + {"sequence_length", as_GPU_tensor(input_tensors->at("sequence_length"), d_input_lengths_)}}; return ft_input_tensors; } template -std::shared_ptr> -T5TritonModelInstance::convert_outputs(const std::vector& output_tensors) +std::shared_ptr> +T5TritonModelInstance::convert_outputs(const std::unordered_map& output_tensors) { - // Remove the dimension of beam_width of output ids - // change output.shape to [batch_size, beam_width, total_output_len] - return std::shared_ptr>(new std::vector{ - triton::Tensor{triton::MEMORY_GPU, triton::TYPE_INT32, output_tensors[0].shape, d_output_ids_}, - triton::Tensor{triton::MEMORY_GPU, triton::TYPE_INT32, output_tensors[2].shape, d_sequence_lengths_}}); + std::unordered_map* outputs_mapping = + new std::unordered_map(); + + for (auto it = output_tensors.begin(); it != output_tensors.end(); it++) { + outputs_mapping->insert({it->first, triton::Tensor::convertFtTensorToTriton(it->second)}); + } + + return std::shared_ptr>(outputs_mapping); } template -std::shared_ptr> -T5TritonModelInstance::forward(std::shared_ptr> input_tensors) +std::shared_ptr> +T5TritonModelInstance::forward(std::shared_ptr> input_tensors) { - const size_t request_batch_size = input_tensors->at(0).shape[0]; - const size_t mem_max_seq_len = input_tensors->at(0).shape[1]; + const size_t request_batch_size = input_tensors->at("input_ids").shape[0]; + const size_t mem_max_seq_len = input_tensors->at("input_ids").shape[1]; + const size_t max_output_len = *((uint*)input_tensors->at("max_output_len").data); + const size_t beam_width = + input_tensors->count("beam_width") ? (size_t)(*(uint*)input_tensors->at("beam_width").data) : 1; freeBuffer(); // free buffer of previous iteration - allocateBuffer(request_batch_size, mem_max_seq_len); - - std::vector encoder_input_tensors = convert_inputs(input_tensors); - - std::vector encoder_output_tensors = std::vector{ - ft::Tensor{ft::MEMORY_GPU, - ft::getTensorType(), - std::vector{request_batch_size, mem_max_seq_len, t5_encoder_->getDModel()}, - d_encoder_outputs_}}; - - std::vector decoding_input_tensors = - std::vector{encoder_output_tensors.at(0), encoder_input_tensors.at(1)}; - - std::vector decoding_output_tensors = std::vector{ - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_INT32, - std::vector{request_batch_size, beam_width_, t5_decoding_->getMaxSeqLen()}, - d_output_ids_}, - ft::Tensor{ft::MEMORY_GPU, - ft::TYPE_INT32, - std::vector{request_batch_size, beam_width_, t5_decoding_->getMaxSeqLen()}, - d_parent_ids_}, - ft::Tensor{ - ft::MEMORY_GPU, ft::TYPE_INT32, std::vector{request_batch_size, beam_width_}, d_sequence_lengths_}}; + allocateBuffer(request_batch_size, beam_width, max_output_len, mem_max_seq_len); + + std::unordered_map encoder_input_tensors = convert_inputs(input_tensors); + + std::unordered_map encoder_output_tensors{ + {"output_hidden_state", + ft::Tensor{ft::MEMORY_GPU, + ft::getTensorType(), + std::vector{request_batch_size, mem_max_seq_len, t5_encoder_->getDModel()}, + d_encoder_outputs_}}}; + + std::unordered_map decoding_input_tensors{ + {"encoder_output", encoder_output_tensors.at("output_hidden_state")}, + {"encoder_sequence_length", encoder_input_tensors.at("sequence_length")}}; + + for (auto& t : *input_tensors) { + if (t.first.compare("input_ids") != 0 && t.first.compare("sequence_length") != 0 + && t.first.compare("bad_words_list") != 0 && t.first.compare("stop_words_list") != 0) { + decoding_input_tensors.insert({t.first, t.second.convertTritonTensorToFt()}); + } + } + + if (input_tensors->find("bad_words_list") != input_tensors->end()) { + move_tensor_H2D(input_tensors->at("bad_words_list"), d_input_bad_words_); + decoding_input_tensors.insert( + {"bad_words_list", as_GPU_tensor(input_tensors->at("bad_words_list"), d_input_bad_words_)}); + } + + if (input_tensors->find("stop_words_list") != input_tensors->end()) { + move_tensor_H2D(input_tensors->at("stop_words_list"), d_input_stop_words_); + decoding_input_tensors.insert( + {"stop_words_list", as_GPU_tensor(input_tensors->at("stop_words_list"), d_input_stop_words_)}); + } + + std::unordered_map decoding_output_tensors{ + {"output_ids", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{request_batch_size, beam_width, max_output_len}, + d_output_ids_}}, + {"sequence_length", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_INT32, + std::vector{request_batch_size, beam_width}, + d_sequence_lengths_}}}; + if (input_tensors->count("is_return_log_probs") > 0 + && input_tensors->at("is_return_log_probs").convertTritonTensorToFt().getVal()) { + decoding_output_tensors.insert({"output_log_probs", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_FP32, + std::vector{request_batch_size, beam_width, max_output_len}, + d_output_log_probs_}}); + decoding_output_tensors.insert({"cum_log_probs", + ft::Tensor{ft::MEMORY_GPU, + ft::TYPE_FP32, + std::vector{request_batch_size, beam_width}, + d_cum_log_probs_}}); + } t5_encoder_->forward(&encoder_output_tensors, &encoder_input_tensors, t5_encoder_weight_.get()); t5_decoding_->forward(&decoding_output_tensors, &decoding_input_tensors, t5_decoding_weight_.get()); @@ -139,6 +152,14 @@ T5TritonModelInstance::forward(std::shared_ptr> i ft::check_cuda_error(cudaFree(d_input_lengths_)); d_input_lengths_ = nullptr; } + if (d_input_bad_words_ != nullptr) { + ft::check_cuda_error(cudaFree(d_input_bad_words_)); + d_input_bad_words_ = nullptr; + } + if (d_input_stop_words_ != nullptr) { + ft::check_cuda_error(cudaFree(d_input_stop_words_)); + d_input_stop_words_ = nullptr; + } return convert_outputs(decoding_output_tensors); } @@ -150,12 +171,16 @@ T5TritonModelInstance::~T5TritonModelInstance() } template -void T5TritonModelInstance::allocateBuffer(const size_t request_batch_size, const size_t mem_max_seq_len) +void T5TritonModelInstance::allocateBuffer(const size_t request_batch_size, + const size_t beam_width, + const size_t max_output_len, + const size_t mem_max_seq_len) { ft::deviceMalloc(&d_encoder_outputs_, request_batch_size * mem_max_seq_len * t5_encoder_->getDModel()); - ft::deviceMalloc(&d_output_ids_, request_batch_size * beam_width_ * t5_decoding_->getMaxSeqLen()); - ft::deviceMalloc(&d_parent_ids_, request_batch_size * beam_width_ * t5_decoding_->getMaxSeqLen()); - ft::deviceMalloc(&d_sequence_lengths_, request_batch_size * beam_width_); + ft::deviceMalloc(&d_output_ids_, request_batch_size * beam_width * max_output_len); + ft::deviceMalloc(&d_sequence_lengths_, request_batch_size * beam_width); + ft::deviceMalloc(&d_output_log_probs_, request_batch_size * beam_width * max_output_len); + ft::deviceMalloc(&d_cum_log_probs_, request_batch_size * beam_width * max_output_len); } template @@ -163,8 +188,9 @@ void T5TritonModelInstance::freeBuffer() { ft::deviceFree(d_encoder_outputs_); ft::deviceFree(d_output_ids_); - ft::deviceFree(d_parent_ids_); ft::deviceFree(d_sequence_lengths_); + ft::deviceFree(d_output_log_probs_); + ft::deviceFree(d_cum_log_probs_); } template struct T5TritonModelInstance; diff --git a/src/fastertransformer/triton_backend/t5/T5TritonModelInstance.h b/src/fastertransformer/triton_backend/t5/T5TritonModelInstance.h index 7864c213b..a8a9e9c7b 100644 --- a/src/fastertransformer/triton_backend/t5/T5TritonModelInstance.h +++ b/src/fastertransformer/triton_backend/t5/T5TritonModelInstance.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -35,14 +35,18 @@ struct T5TritonModelInstance: AbstractTransformerModelInstance { std::unique_ptr cublas_algo_map, std::unique_ptr cublas_wrapper_mutex, std::unique_ptr cublas_wrapper, - std::unique_ptr cuda_device_prop_ptr, - const size_t max_batch_size, - const size_t max_seq_len, - const size_t beam_width); + std::unique_ptr cuda_device_prop_ptr); ~T5TritonModelInstance(); std::shared_ptr> - forward(std::shared_ptr> input_tensors) override; + forward(std::shared_ptr> input_tensors) override + { + ft::FT_CHECK(false); + return nullptr; + }; + + std::shared_ptr> + forward(std::shared_ptr> input_tensors) override; private: const std::unique_ptr> t5_encoder_; @@ -55,23 +59,28 @@ struct T5TritonModelInstance: AbstractTransformerModelInstance { const std::unique_ptr cublas_wrapper_; const std::unique_ptr cuda_device_prop_ptr_; - std::vector convert_inputs(std::shared_ptr> input_tensors); - std::shared_ptr> convert_outputs(const std::vector& output_tensors); + std::unordered_map + convert_inputs(std::shared_ptr> input_tensors); - void allocateBuffer(const size_t request_batch_size, const size_t total_output_len); - void freeBuffer(); + std::shared_ptr> + convert_outputs(const std::unordered_map& output_tensors); - const size_t max_batch_size_; - const size_t max_seq_len_; - const size_t beam_width_; + void allocateBuffer(const size_t request_batch_size, + const size_t beam_width, + const size_t max_output_len, + const size_t mem_max_seq_len); + void freeBuffer(); int* d_input_ids_ = nullptr; int* d_input_lengths_ = nullptr; + int* d_input_bad_words_ = nullptr; + int* d_input_stop_words_ = nullptr; T* d_encoder_outputs_ = nullptr; int* d_output_ids_ = nullptr; - int* d_parent_ids_ = nullptr; int* d_sequence_lengths_ = nullptr; + float* d_output_log_probs_ = nullptr; + float* d_cum_log_probs_ = nullptr; int h_total_output_len_; }; diff --git a/src/fastertransformer/triton_backend/transformer_triton_backend.hpp b/src/fastertransformer/triton_backend/transformer_triton_backend.hpp index f9a886737..bb0d2a3bd 100644 --- a/src/fastertransformer/triton_backend/transformer_triton_backend.hpp +++ b/src/fastertransformer/triton_backend/transformer_triton_backend.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -22,6 +22,7 @@ #include #include "src/fastertransformer/utils/Tensor.h" +#include "src/fastertransformer/utils/custom_ar_comm.h" #include "src/fastertransformer/utils/nccl_utils.h" namespace ft = fastertransformer; @@ -48,6 +49,7 @@ constexpr TRITONSERVER_DataType TYPE_FP16 = TRITONSERVER_TYPE_FP16; constexpr TRITONSERVER_DataType TYPE_FP32 = TRITONSERVER_TYPE_FP32; constexpr TRITONSERVER_DataType TYPE_FP64 = TRITONSERVER_TYPE_FP64; constexpr TRITONSERVER_DataType TYPE_BYTES = TRITONSERVER_TYPE_BYTES; +// constexpr TRITONSERVER_DataType TYPE_BF16 = TRITONSERVER_TYPE_BF16; // BF16 is not supported in Triton constexpr TRITONSERVER_MemoryType MEMORY_CPU = TRITONSERVER_MEMORY_CPU; constexpr TRITONSERVER_MemoryType MEMORY_CPU_PINNED = TRITONSERVER_MEMORY_CPU_PINNED; constexpr TRITONSERVER_MemoryType MEMORY_GPU = TRITONSERVER_MEMORY_GPU; @@ -71,6 +73,7 @@ constexpr DataType TYPE_FP16 = ft::TYPE_FP16; constexpr DataType TYPE_FP32 = ft::TYPE_FP32; constexpr DataType TYPE_FP64 = ft::TYPE_FP64; constexpr DataType TYPE_BYTES = ft::TYPE_BYTES; +// constexpr DataType TYPE_BF16 = ft::TYPE_BF16; constexpr MemoryType MEMORY_CPU = ft::MEMORY_CPU; constexpr MemoryType MEMORY_CPU_PINNED = ft::MEMORY_CPU_PINNED; constexpr MemoryType MEMORY_GPU = ft::MEMORY_GPU; @@ -87,6 +90,142 @@ struct Tensor { where(_where), type(_type), shape(_shape), data(_data) { } + + static ft::DataType convertTritonTypeToFt(DataType tmp_type) + { + ft::DataType ft_data_type; + switch (tmp_type) { + case TYPE_INVALID: + ft_data_type = ft::DataType::TYPE_INVALID; + break; + case TYPE_BOOL: + ft_data_type = ft::DataType::TYPE_BOOL; + break; + case TYPE_UINT8: + ft_data_type = ft::DataType::TYPE_UINT8; + break; + case TYPE_UINT16: + ft_data_type = ft::DataType::TYPE_UINT16; + break; + case TYPE_UINT32: + ft_data_type = ft::DataType::TYPE_UINT32; + break; + case TYPE_UINT64: + ft_data_type = ft::DataType::TYPE_UINT64; + break; + case TYPE_INT8: + ft_data_type = ft::DataType::TYPE_INT8; + break; + case TYPE_INT16: + ft_data_type = ft::DataType::TYPE_INT16; + break; + case TYPE_INT32: + ft_data_type = ft::DataType::TYPE_INT32; + break; + case TYPE_INT64: + ft_data_type = ft::DataType::TYPE_INT64; + break; + case TYPE_FP16: + ft_data_type = ft::DataType::TYPE_FP16; + break; + case TYPE_FP32: + ft_data_type = ft::DataType::TYPE_FP32; + break; + case TYPE_FP64: + ft_data_type = ft::DataType::TYPE_FP64; + break; + case TYPE_BYTES: + ft_data_type = ft::DataType::TYPE_BYTES; + break; + default: + ft::FT_CHECK_WITH_INFO(false, "Unknown data type with type id: " + std::to_string(tmp_type)); + break; + } + return ft_data_type; + } + + ft::Tensor convertTritonTensorToFt() + { + ft::DataType ft_data_type = convertTritonTypeToFt(type); + ft::MemoryType ft_memory_type; + switch (where) { + case MEMORY_CPU: + ft_memory_type = ft::MemoryType::MEMORY_CPU; + break; + case MEMORY_CPU_PINNED: + ft_memory_type = ft::MemoryType::MEMORY_CPU_PINNED; + break; + case MEMORY_GPU: + ft_memory_type = ft::MemoryType::MEMORY_GPU; + break; + } + return ft::Tensor{ft_memory_type, ft_data_type, shape, data}; + } + + static Tensor convertFtTensorToTriton(ft::Tensor ft_tensor) + { + DataType triton_data_type; + switch (ft_tensor.type) { + case TYPE_INVALID: + triton_data_type = TYPE_INVALID; + break; + case TYPE_BOOL: + triton_data_type = TYPE_BOOL; + break; + case TYPE_UINT8: + triton_data_type = TYPE_UINT8; + break; + case TYPE_UINT16: + triton_data_type = TYPE_UINT16; + break; + case TYPE_UINT32: + triton_data_type = TYPE_UINT32; + break; + case TYPE_UINT64: + triton_data_type = TYPE_UINT64; + break; + case TYPE_INT8: + triton_data_type = TYPE_INT8; + break; + case TYPE_INT16: + triton_data_type = TYPE_INT16; + break; + case TYPE_INT32: + triton_data_type = TYPE_INT32; + break; + case TYPE_INT64: + triton_data_type = TYPE_INT64; + break; + case TYPE_FP16: + triton_data_type = TYPE_FP16; + break; + case TYPE_FP32: + triton_data_type = TYPE_FP32; + break; + case TYPE_FP64: + triton_data_type = TYPE_FP64; + break; + case TYPE_BYTES: + triton_data_type = TYPE_BYTES; + break; + default: + ft::FT_CHECK_WITH_INFO(false, "Unknown data type with type id: " + std::to_string(ft_tensor.type)); + break; + } + MemoryType triton_memory_type; + switch (ft_tensor.where) { + case MEMORY_CPU: + triton_memory_type = MEMORY_CPU; + break; + case MEMORY_CPU_PINNED: + triton_memory_type = MEMORY_CPU_PINNED; + break; + case MEMORY_GPU: + triton_memory_type = MEMORY_GPU; + break; + } + return Tensor{triton_memory_type, triton_data_type, ft_tensor.shape, ft_tensor.data}; + } }; } // namespace triton @@ -97,26 +236,31 @@ struct AbstractTransformerModelInstance; struct AbstractTransformerModelInstance { virtual std::shared_ptr> forward(std::shared_ptr> input_tensors) = 0; + + virtual std::shared_ptr> + forward(std::shared_ptr> input_tensors) = 0; }; struct AbstractTransformerModel { static std::shared_ptr createGptModel(std::string inifile); static std::shared_ptr createGptJModel(std::string inifile); + static std::shared_ptr createT5Model(std::string model_dir); - static std::shared_ptr createT5Model(const int max_batch_size, std::string model_dir); virtual std::vector createNcclIds(const uint32_t world_size, bool multi_instances = false) = 0; + virtual std::pair, std::vector> createNcclComms( + std::vector nccl_ids, const int node_id, bool multi_instances = false, int instance_id = 0) = 0; - virtual std::pair, std::vector> - createNcclComms(std::vector nccl_ids, const int node_id, bool multi_instances = false, int instance_id = 0) = 0; + virtual void createCustomComms(std::vector>* custom_all_reduce_comms, + int world_size) = 0; virtual std::unique_ptr createModelInstance(int deviceId, int rank, cudaStream_t stream, - std::pair, std::vector> nccl_comms) = 0; + std::pair, std::vector> nccl_comms, + std::shared_ptr custom_all_reduce_comm = nullptr) = 0; virtual std::string toString() = 0; - virtual std::pair getMaxBatchSeqlen() = 0; virtual int getTensorParaSize() = 0; virtual int getPipelineParaSize() = 0; }; diff --git a/src/fastertransformer/triton_backend/triton_utils.hpp b/src/fastertransformer/triton_backend/triton_utils.hpp new file mode 100644 index 000000000..52d0c3a92 --- /dev/null +++ b/src/fastertransformer/triton_backend/triton_utils.hpp @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/triton_backend/transformer_triton_backend.hpp" +#include "src/fastertransformer/utils/Tensor.h" + +namespace ft = fastertransformer; + +template +void move_tensor_H2D(const triton::Tensor &tensor, T* &d_ptr) +{ + if (tensor.where == triton::MEMORY_GPU) { + return; + } + + size_t tensor_size = 1; + for (auto t : tensor.shape) { + tensor_size *= t; + } + ft::deviceMalloc(&d_ptr, tensor_size, false); + ft::cudaH2Dcpy(d_ptr, (T*) tensor.data, tensor_size); +} + +template +ft::Tensor as_GPU_tensor(const triton::Tensor &tensor, T* d_ptr) +{ + return ft::Tensor {ft::MEMORY_GPU, + triton::Tensor::convertTritonTypeToFt(tensor.type), + tensor.shape, + tensor.where == triton::MEMORY_CPU ? d_ptr : tensor.data}; +} diff --git a/src/fastertransformer/utils/CMakeLists.txt b/src/fastertransformer/utils/CMakeLists.txt index 339bb998c..3d0f28a6d 100644 --- a/src/fastertransformer/utils/CMakeLists.txt +++ b/src/fastertransformer/utils/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -30,6 +30,10 @@ else() target_link_libraries(cublasMMWrapper PUBLIC -lcublas -lcudart -lcurand cublasAlgoMap) endif() +add_library(word_list STATIC word_list.cc) +set_property(TARGET word_list PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET word_list PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) + add_library(nvtx_utils STATIC nvtx_utils.cc) set_property(TARGET nvtx_utils PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET nvtx_utils PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) @@ -40,14 +44,30 @@ set_property(TARGET memory_utils PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET memory_utils PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) target_link_libraries(memory_utils PUBLIC -lnvToolsExt) -if(BUILD_GPT) - add_library(nccl_utils STATIC nccl_utils.cc) - set_property(TARGET nccl_utils PROPERTY POSITION_INDEPENDENT_CODE ON) - set_property(TARGET nccl_utils PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) - target_link_libraries(nccl_utils PUBLIC -lnccl) -endif() +add_library(nccl_utils STATIC nccl_utils.cc) +set_property(TARGET nccl_utils PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET nccl_utils PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(nccl_utils PUBLIC -lnccl) add_library(cublasINT8MMWrapper STATIC cublasINT8MMWrapper.cc) set_property(TARGET cublasINT8MMWrapper PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET cublasINT8MMWrapper PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) target_link_libraries(cublasINT8MMWrapper PUBLIC -lcublasLt -lcudart -lcurand cublasAlgoMap cublasMMWrapper) + +add_library(custom_ar_comm STATIC custom_ar_comm.cc) +set_property(TARGET custom_ar_comm PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET custom_ar_comm PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +target_link_libraries(custom_ar_comm PUBLIC custom_ar_kernels memory_utils) + +add_library(gemm STATIC gemm.cc) +set_property(TARGET gemm PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET gemm PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) +if (SPARSITY_SUPPORT) + target_link_libraries(gemm PUBLIC + -lcublas -lcublasLt -lcudart -lcurand -lcusparse -lcusparseLt + cublasAlgoMap memory_utils) +else() + target_link_libraries(gemm PUBLIC + -lcublas -lcublasLt -lcudart -lcurand + cublasAlgoMap memory_utils) +endif() diff --git a/src/fastertransformer/utils/ScaleList.h b/src/fastertransformer/utils/ScaleList.h index e8e63cd44..44a855640 100644 --- a/src/fastertransformer/utils/ScaleList.h +++ b/src/fastertransformer/utils/ScaleList.h @@ -19,29 +19,33 @@ namespace fastertransformer { - #define ACTIVATION_AMAX_NUM 72 #define INT8O_GEMM_NUM 8 #define TRT_AMAX_NUM 3 #define SCALE_RESERVE_NUM 21 struct ScaleList { -//Part 1 -- 72: -// First 72 are for activation amaxs. For each activation amax, there are 4 values: amax, amax/127.0f, amax/127.0f/127.0f, 127.0f/amax -- input_amax 0-3 , Q_aftergemm_amax 4-7, Qbias_amax 8-11, K_aftergemm_amax 12-15, Kbias_amax 16-19, V_aftergemm_amax 20-23, Vbias_amax 24-27, bmm1_amax 28-31, Softmax_amax 32-35, bmm2_amax 36-39, Proj_aftergemm_scale 40-43, ProjBiasNorm_amax 44-47, FC1_aftergemm_amax 48-51, F1Bias_amax 52-55, FC2_aftergemm_amax 56-59, F2BiasNorm_amax 60-63, reserve 64-71 -//Part 2 -- 9*hidden_dim: -// Kernel amaxs, for each kernel amax list, there are output_channel values : query_weight_amax_list, key_weight_amax_list, value_weight_amax_list, proj_weight_amax_list, FC1_weight_amax_list, FC2_weight_amax_list -//Part 3 -- 8: -// Int8 gemm deQFactor list (8 values): Q_deQ_scale, K_deQ_scale, V_deQ_scale, bmm1_deQ_scale, bmm2_deQ_scale, FC0_deQ_scale, FC1_deQ_scale, FC2_deQ_scale -//Part 4 -- 3: -// Amax used in trt fused mha kernel (3 values) : QKVbias_amax, Softmax_amax, bmm2_amax -//Part 5 -- 21: reverse + // Part 1 -- 72: + // First 72 are for activation amaxs. For each activation amax, there are 4 values: amax, amax/127.0f, + // amax/127.0f/127.0f, 127.0f/amax -- input_amax 0-3 , Q_aftergemm_amax 4-7, Qbias_amax 8-11, K_aftergemm_amax + // 12-15, Kbias_amax 16-19, V_aftergemm_amax 20-23, Vbias_amax 24-27, bmm1_amax 28-31, Softmax_amax 32-35, + // bmm2_amax 36-39, Proj_aftergemm_scale 40-43, ProjBiasNorm_amax 44-47, FC1_aftergemm_amax 48-51, F1Bias_amax + // 52-55, FC2_aftergemm_amax 56-59, F2BiasNorm_amax 60-63, reserve 64-71 + // Part 2 -- 9*hidden_dim: + // Kernel amaxs, for each kernel amax list, there are output_channel values : query_weight_amax_list, + // key_weight_amax_list, value_weight_amax_list, proj_weight_amax_list, FC1_weight_amax_list, FC2_weight_amax_list + // Part 3 -- 8: + // Int8 gemm deQFactor list (8 values): Q_deQ_scale, K_deQ_scale, V_deQ_scale, bmm1_deQ_scale, bmm2_deQ_scale, + // FC0_deQ_scale, FC1_deQ_scale, FC2_deQ_scale + // Part 4 -- 3: + // Amax used in trt fused mha kernel (3 values) : QKVbias_amax, Softmax_amax, bmm2_amax + // Part 5 -- 21: reverse const float* d_scale_list_ = nullptr; const float* h_scale_list_ = nullptr; - size_t size_ = ACTIVATION_AMAX_NUM + 9*768 + INT8O_GEMM_NUM + TRT_AMAX_NUM; + size_t size_ = ACTIVATION_AMAX_NUM + 9 * 768 + INT8O_GEMM_NUM + TRT_AMAX_NUM; size_t p2_offset_ = ACTIVATION_AMAX_NUM; - size_t p3_offset_ = ACTIVATION_AMAX_NUM + 9*768; - size_t p4_offset_ = ACTIVATION_AMAX_NUM + 9*768 + INT8O_GEMM_NUM; - + size_t p3_offset_ = ACTIVATION_AMAX_NUM + 9 * 768; + size_t p4_offset_ = ACTIVATION_AMAX_NUM + 9 * 768 + INT8O_GEMM_NUM; }; } // namespace fastertransformer diff --git a/src/fastertransformer/utils/Tensor.h b/src/fastertransformer/utils/Tensor.h index b21b8f5d7..83ae91883 100644 --- a/src/fastertransformer/utils/Tensor.h +++ b/src/fastertransformer/utils/Tensor.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,14 +16,20 @@ #pragma once +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" +#include "src/fastertransformer/utils/cuda_utils.h" +#include "src/fastertransformer/utils/string_utils.h" + +#include "stdlib.h" #include +#include +#include +#include #include -#include "stdlib.h" namespace fastertransformer { -typedef enum datatype_enum -{ +typedef enum datatype_enum { TYPE_INVALID, TYPE_BOOL, TYPE_UINT8, @@ -37,11 +43,11 @@ typedef enum datatype_enum TYPE_FP16, TYPE_FP32, TYPE_FP64, - TYPE_BYTES + TYPE_BYTES, + TYPE_BF16, } DataType; -typedef enum memorytype_enum -{ +typedef enum memorytype_enum { MEMORY_CPU, MEMORY_CPU_PINNED, MEMORY_GPU @@ -51,27 +57,283 @@ struct Tensor { const MemoryType where; const DataType type; const std::vector shape; - const void* data; // TODO(bhseuh) modify from const void* to void* const + const void* data; // TODO(bhseuh) modify from const void* to void* const Tensor(const MemoryType _where, const DataType _type, const std::vector _shape, const void* _data): where(_where), type(_type), shape(_shape), data(_data) { } + + size_t size() const + { + size_t n_elements = 1; + for (size_t s : shape) { + n_elements *= s; + } + return n_elements; + } + + std::string toString() const + { + std::string memtype_str; + switch (where) { + case MEMORY_CPU: + memtype_str = "CPU"; + break; + case MEMORY_CPU_PINNED: + memtype_str = "CPU_PINNED"; + break; + case MEMORY_GPU: + memtype_str = "GPU"; + break; + } + + std::string dtype_str = ""; + switch (type) { + case TYPE_BOOL: + dtype_str = "BOOL"; + break; + case TYPE_UINT8: + dtype_str = "UINT8"; + break; + case TYPE_UINT16: + dtype_str = "UINT16"; + break; + case TYPE_UINT32: + dtype_str = "UINT32"; + break; + case TYPE_UINT64: + dtype_str = "UINT64"; + break; + case TYPE_INT8: + dtype_str = "INT8"; + break; + case TYPE_INT16: + dtype_str = "INT16"; + break; + case TYPE_INT32: + dtype_str = "INT32"; + break; + case TYPE_INT64: + dtype_str = "INT64"; + break; + case TYPE_BF16: + dtype_str = "BF16"; + break; + case TYPE_FP16: + dtype_str = "FP16"; + break; + case TYPE_FP32: + dtype_str = "FP32"; + break; + case TYPE_FP64: + dtype_str = "FP64"; + break; + case TYPE_BYTES: + dtype_str = "BYTES"; + break; + case TYPE_INVALID: + dtype_str = "INVALID"; + break; + default: + break; + } + return fmtstr( + "Tensor[where=%s, type=%s, shape=%s]", memtype_str.c_str(), dtype_str.c_str(), vec2str(shape).c_str()); + } + + template + inline T getVal(size_t index) const + { + FT_CHECK(where == MEMORY_CPU); + FT_CHECK(data != nullptr); + FT_CHECK_WITH_INFO(index < size(), "index is larger than buffer size"); + return ((T*)data)[index]; + } + + template + inline T getVal() const + { + return getVal(0); + } + + template + inline T* getPtr() const + { + return (T*)data; + } + + inline void* getPtrWithOffset(size_t offset) const + { + if (data == nullptr) { + return (void*)data; + } + else { + FT_CHECK_WITH_INFO(offset < size(), "offset is larger than buffer size"); + return (void*)((char*)data + offset * getDataTypeByteNum(type)); + } + } + + template + inline T* getPtrWithOffset(size_t offset) const + { + if (data == nullptr) { + return (T*)data; + } + else { + FT_CHECK_WITH_INFO(offset < size(), "offset is larger than buffer size"); + return ((T*)data) + offset; + } + } + + std::string getNumpyTypeDesc(DataType type) const + { + switch (type) { + case TYPE_BOOL: + return "?"; + case TYPE_UINT8: + return "u1"; + case TYPE_UINT16: + return "u2"; + case TYPE_UINT32: + return "u4"; + case TYPE_UINT64: + return "u8"; + case TYPE_INT8: + return "i1"; + case TYPE_INT16: + return "i2"; + case TYPE_INT32: + return "i4"; + case TYPE_INT64: + return "i8"; + case TYPE_FP16: + return "f2"; + case TYPE_FP32: + return "f4"; + case TYPE_FP64: + return "f8"; + case TYPE_INVALID: + default:; + } + return ""; + } + + int getDataTypeByteNum(DataType type) const + { + switch (type) { + case TYPE_BOOL: + return 1; + case TYPE_UINT8: + return 1; + case TYPE_UINT16: + return 2; + case TYPE_UINT32: + return 4; + case TYPE_UINT64: + return 8; + case TYPE_INT8: + return 1; + case TYPE_INT16: + return 2; + case TYPE_INT32: + return 4; + case TYPE_INT64: + return 8; + case TYPE_FP16: + return 2; + case TYPE_BF16: + return 2; + case TYPE_FP32: + return 4; + case TYPE_FP64: + return 8; + case TYPE_INVALID: + FT_CHECK(false); + default: + FT_CHECK(false); + } + } + + template + void save(const std::string& filename) const + { + // Save tensor to NPY 1.0 format (see https://numpy.org/neps/nep-0001-npy-format.html) + void* cpu_data = (void*)data; + bool is_data_temp = false; + size_t tensor_size = size(); + if (where == MemoryType::MEMORY_GPU) { + cpu_data = malloc(tensor_size * sizeof(T)); + is_data_temp = true; + cudaDeviceSynchronize(); + cudaMemcpy(cpu_data, data, tensor_size * sizeof(T), cudaMemcpyDeviceToHost); + } + + const char magic[] = "\x93" + "NUMPY"; + const uint8_t npy_major = 1; + const uint8_t npy_minor = 0; + + std::stringstream header_stream; + header_stream << "{'descr': '" << getNumpyTypeDesc(type) << "', 'fortran_order': False, 'shape': ("; + for (size_t i = 0; i < shape.size(); ++i) { + header_stream << shape[i]; + if (i + 1 < shape.size() || shape.size() == 1) { + header_stream << ", "; + } + } + header_stream << ")}"; + int base_length = 6 + 4 + header_stream.str().size(); + int pad_length = 16 * ((base_length + 1 + 15) / 16); // Take ceiling of base_length + 1 (for '\n' ending) + for (int i = 0; i < pad_length - base_length; ++i) { + header_stream << ((i == pad_length - base_length - 1) ? "\n" : "\x20"); + } + std::string header = header_stream.str(); + const uint16_t header_len = header.size(); + + FILE* f_ptr = fopen(filename.c_str(), "wb"); + if (f_ptr == nullptr) { + printf("Unable to open %s for writing.\n", filename.c_str()); + exit(-1); + } + fwrite(magic, sizeof(char), sizeof(magic) - 1, f_ptr); + fwrite(&npy_major, sizeof(uint8_t), 1, f_ptr); + fwrite(&npy_minor, sizeof(uint8_t), 1, f_ptr); + fwrite(&header_len, sizeof(uint16_t), 1, f_ptr); + fwrite(header.c_str(), sizeof(char), header_len, f_ptr); + fwrite(cpu_data, sizeof(T), tensor_size, f_ptr); + + fclose(f_ptr); + + if (is_data_temp) { + free(cpu_data); + } + } }; template DataType getTensorType() { - if (std::is_same::value) + if (std::is_same::value) { return TYPE_FP32; - else if (std::is_same::value) + } + else if (std::is_same::value) { return TYPE_FP16; - else if (std::is_same::value) + } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + return TYPE_BF16; + } +#endif + else if (std::is_same::value) { return TYPE_INT32; - else if (std::is_same::value) + } + else if (std::is_same::value) { return TYPE_INT8; - else + } + else { return TYPE_INVALID; + } } } // namespace fastertransformer diff --git a/src/fastertransformer/utils/allocator.h b/src/fastertransformer/utils/allocator.h index dbb2c4e61..f66f4dda2 100644 --- a/src/fastertransformer/utils/allocator.h +++ b/src/fastertransformer/utils/allocator.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -19,11 +19,11 @@ #pragma once +#include "cuda_utils.h" #include +#include #include -#include "cuda_utils.h" - #ifdef GOOGLE_CUDA #include "tensorflow/core/framework/op.h" #include "tensorflow/core/framework/op_kernel.h" @@ -41,10 +41,11 @@ #include #endif +#include "src/fastertransformer/utils/logger.h" + namespace fastertransformer { -enum class AllocatorType -{ +enum class AllocatorType { CUDA, TF, TH @@ -52,8 +53,44 @@ enum class AllocatorType class IAllocator { public: - virtual void* malloc(size_t size, const bool is_set_zero = true) const = 0; + virtual void* malloc(size_t size, const bool is_set_zero = true) = 0; virtual void free(void* ptr) const = 0; + virtual void setStream(cudaStream_t stream) = 0; + + template + void* reMalloc(T* ptr, size_t size, const bool is_set_zero = true) + { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + void* void_ptr = (void*)ptr; + std::string ptr_address = getAddress(void_ptr); + if (isExist(ptr_address)) { + if (isReMalloc(ptr_address, size)) { + FT_LOG_DEBUG("ReMalloc the buffer %p since it is too small.", void_ptr); + free(void_ptr); + return malloc(size, is_set_zero); + } + else { + FT_LOG_DEBUG("Reuse original buffer %p and do nothing for reMalloc.", void_ptr); + return void_ptr; + } + } + else { + FT_LOG_DEBUG("Cannot find buffer %p, mallocing new one.", void_ptr); + return malloc(size, is_set_zero); + } + } + +protected: + virtual bool isExist(std::string address) const = 0; + virtual bool isReMalloc(std::string address, size_t size) const = 0; + + std::string getAddress(void* ptr) const + { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + char address[256]; + sprintf(address, "%p", ptr); + return std::string(address); + } }; template @@ -61,28 +98,120 @@ class Allocator; template<> class Allocator: public IAllocator { +private: const int device_id_; + cudaStream_t stream_ = 0; // initialize as default stream + std::unordered_map>* pointer_mapping_; + + bool isExist(std::string address) const + { + return pointer_mapping_->count(address) > 0; + } + bool isReMalloc(std::string address, size_t size) const + { + FT_CHECK(isExist(address)); + if (pointer_mapping_->at(address).second < size) { + return true; + } + else { + return false; + } + } public: - Allocator(int device_id): device_id_(device_id) {} - virtual ~Allocator() {} + Allocator(int device_id): device_id_(device_id) + { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + pointer_mapping_ = new std::unordered_map>(); +#if defined(CUDART_VERSION) && CUDART_VERSION < 11020 + FT_LOG_WARNING( + "Async cudaMalloc/Free is not supported before CUDA 11.2. Using Sync cudaMalloc/Free." + "Note this may lead to hang with NCCL kernels launched in parallel; if so, try NCCL_LAUNCH_MODE=GROUP"); +#else + int device_count = 1; + cudaGetDeviceCount(&device_count); + cudaMemPool_t mempool; + cudaDeviceGetMemPool(&mempool, device_id); + cudaMemAccessDesc desc = {}; + int peer_access_available = 0; + for (int i = 0; i < device_count; i++) { + if (i == device_id) { + continue; + } + cudaDeviceCanAccessPeer(&peer_access_available, device_id, i); + if (!peer_access_available) { + FT_LOG_WARNING( + "Device " + std::to_string(device_id) + " peer access Device " + std::to_string(i) + + " is not avaiable. This may lead to peer access errors when doing tensor/pipeline parallel!"); + continue; + } + desc.location.type = cudaMemLocationTypeDevice; + desc.location.id = i; + desc.flags = cudaMemAccessFlagsProtReadWrite; + cudaMemPoolSetAccess(mempool, &desc, 1); + } +#endif + } + + virtual ~Allocator() + { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + while (!pointer_mapping_->empty()) { + free(pointer_mapping_->begin()->second.first); + } + delete pointer_mapping_; + } + + void setStream(cudaStream_t stream) + { + stream_ = stream; + } - void* malloc(size_t size, const bool is_set_zero = true) const + void* malloc(size_t size, const bool is_set_zero = true) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + if (size == 0) { + return nullptr; + } void* ptr = nullptr; int o_device = 0; + check_cuda_error(getSetDevice(device_id_, &o_device)); +#if defined(CUDART_VERSION) && CUDART_VERSION >= 11020 + check_cuda_error(cudaMallocAsync(&ptr, (size_t)(ceil(size / 32.)) * 32, stream_)); +#else check_cuda_error(cudaMalloc(&ptr, (size_t)(ceil(size / 32.)) * 32)); +#endif check_cuda_error(getSetDevice(o_device)); + FT_LOG_DEBUG("malloc buffer %p with size %ld", ptr, size); + + pointer_mapping_->insert({getAddress(ptr), {ptr, size}}); + return ptr; } void free(void* ptr) const { - int o_device = 0; - check_cuda_error(getSetDevice(device_id_, &o_device)); - check_cuda_error(cudaFree(ptr)); - check_cuda_error(getSetDevice(o_device)); + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + std::string address = getAddress(ptr); + if (ptr != nullptr) { + int o_device = 0; + + if (pointer_mapping_->count(address)) { + FT_LOG_DEBUG("Free buffer %s", address.c_str()); + check_cuda_error(getSetDevice(device_id_, &o_device)); +#if defined(CUDART_VERSION) && CUDART_VERSION >= 11020 + check_cuda_error(cudaFreeAsync(ptr, stream_)); +#else + check_cuda_error(cudaFree(ptr)); +#endif + check_cuda_error(getSetDevice(o_device)); + pointer_mapping_->erase(address); + } + else { + FT_LOG_WARNING("pointer_mapping_ does not have information of ptr at %s.", address.c_str()); + } + } return; } }; @@ -92,44 +221,76 @@ using namespace tensorflow; template<> class Allocator: public IAllocator { OpKernelContext* context_; - std::vector* allocated_tensor_vector; + std::unordered_map* pointer_mapping_; cudaStream_t stream_; + bool isExist(std::string address) const + { + return pointer_mapping_->count(address) > 0; + } + bool isReMalloc(std::string address, size_t size) const + { + FT_CHECK(isExist(address)); + size_t current_buffer_size = 1; + for (int i = 0; i < pointer_mapping_->at(address).dims(); i++) { + current_buffer_size *= pointer_mapping_->at(address).dim_size(i); + } + FT_LOG_DEBUG("current_buffer_size: %d, new buffer: %d", current_buffer_size, size); + if (current_buffer_size < size) { + return true; + } + else { + return false; + } + } + public: Allocator(OpKernelContext* context, cudaStream_t stream): context_(context), stream_(stream) { - allocated_tensor_vector = new std::vector; + pointer_mapping_ = new std::unordered_map(); + } + + void setStream(cudaStream_t stream) + { + stream_ = stream; } - void* malloc(size_t size, const bool is_set_zero = true) const + void* malloc(size_t size, const bool is_set_zero = true) { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); tensorflow::Tensor buf; long long int buf_size = ((long long int)ceil(size / 32.) * 32); tensorflow::Status status = context_->allocate_temp(DT_UINT8, TensorShape{buf_size}, &buf); - allocated_tensor_vector->push_back(buf); - if (status != tensorflow::Status::OK()) + if (status != tensorflow::Status::OK()) { throw std::runtime_error("TF error: context->allocate_temp failed"); + } auto flat = buf.flat(); void* ptr = (void*)flat.data(); - if (is_set_zero == true) + if (is_set_zero == true) { cudaMemsetAsync(ptr, 0, buf_size, stream_); + } + pointer_mapping_->insert({getAddress(ptr), buf}); + return ptr; } void free(void* ptr) const { -#ifndef NDEBUG - printf("call from allocator free\n"); -#endif + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + std::string address = getAddress(ptr); + pointer_mapping_->erase(address); return; } virtual ~Allocator() { - allocated_tensor_vector->clear(); - delete allocated_tensor_vector; + while (!pointer_mapping_->empty()) { + free((void*)pointer_mapping_->begin()->second.flat().data()); + } + pointer_mapping_->clear(); + delete pointer_mapping_; } }; #endif @@ -137,34 +298,71 @@ class Allocator: public IAllocator { #ifdef TORCH_CUDA template<> class Allocator: public IAllocator { - std::shared_ptr> allocated_tensor_vector; + std::unordered_map* pointer_mapping_; + + bool isExist(std::string address) const + { + return pointer_mapping_->count(address) > 0; + } + bool isReMalloc(std::string address, size_t size) const + { + FT_CHECK(isExist(address)); + size_t current_buffer_size = 1; + for (int i = 0; i < pointer_mapping_->at(address).dim(); i++) { + current_buffer_size *= pointer_mapping_->at(address).size(i); + } + FT_LOG_DEBUG( + "current_buffer_size: %d, original buffer: %p, new buffer: %d", current_buffer_size, address, size); + if (current_buffer_size < size) { + return true; + } + else { + return false; + } + } public: - Allocator(): allocated_tensor_vector(std::make_shared>()) {} + Allocator() + { + pointer_mapping_ = new std::unordered_map(); + } - void* malloc(size_t size, const bool is_set_zero = true) const + void setStream(cudaStream_t stream) { + // nothing to do here; + } + + void* malloc(size_t size, const bool is_set_zero = true) + { + FT_LOG_DEBUG(__PRETTY_FUNCTION__); int64_t buf_size = static_cast(ceil(size / 32.)) * 32; // TODO: test this later // torch::Tensor buf = is_set_zero ? // torch::zeros({buf_size}, torch::dtype(torch::kUInt8).device(torch::kCUDA)) : // torch::empty({buf_size}, torch::dtype(torch::kUInt8).device(torch::kCUDA)); torch::Tensor buf = torch::empty({buf_size}, torch::dtype(torch::kUInt8).device(torch::kCUDA)); - allocated_tensor_vector->push_back(buf); - return (*allocated_tensor_vector)[allocated_tensor_vector->size() - 1].data_ptr(); + void* ptr = buf.data_ptr(); + FT_LOG_DEBUG("malloc buffer %p with size %ld", ptr, buf_size); + pointer_mapping_->insert({getAddress(ptr), buf}); + return ptr; } void free(void* ptr) const { -#ifndef NDEBUG - printf("call from allocator free\n"); -#endif + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + std::string address = getAddress(ptr); + pointer_mapping_->erase(address); return; } virtual ~Allocator() { - allocated_tensor_vector->clear(); + FT_LOG_DEBUG(__PRETTY_FUNCTION__); + while (!pointer_mapping_->empty()) { + free(pointer_mapping_->begin()->second.data_ptr()); + } + pointer_mapping_->clear(); + delete pointer_mapping_; } }; #endif diff --git a/src/fastertransformer/utils/conv2d.h b/src/fastertransformer/utils/conv2d.h new file mode 100644 index 000000000..d0f996913 --- /dev/null +++ b/src/fastertransformer/utils/conv2d.h @@ -0,0 +1,132 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "cublasLt.h" +#include "cuda_utils.h" +#include "math.h" +#include "stdio.h" +#include "stdlib.h" +#include +#include +#include + +namespace fastertransformer { + +template +void conv2d(T* output, + const T* input, + const T* kernel, + const int batch, + const int h, + const int w, + const int in_channels, + const int out_channels, + const int kernel_size, + const int stride, + cudnnHandle_t& cudnn_handle) +{ + cudnnDataType_t dataType; + cudnnDataType_t computeType = CUDNN_DATA_FLOAT; + float alpha = 1.0f; + float beta = 0.0f; + if (std::is_same::value) { + dataType = CUDNN_DATA_HALF; + } + else { + dataType = CUDNN_DATA_FLOAT; + } + + cudnnTensorDescriptor_t input_descriptor_; + cudnnTensorDescriptor_t output_descriptor_; + cudnnFilterDescriptor_t kernel_descriptor_; + cudnnConvolutionDescriptor_t convolution_descriptor_; + cudnnConvolutionFwdAlgo_t convolution_algorithm_ = CUDNN_CONVOLUTION_FWD_ALGO_IMPLICIT_GEMM; + // cudnnConvolutionFwdAlgo_t convolution_algorithm_ = CUDNN_CONVOLUTION_FWD_ALGO_IMPLICIT_PRECOMP_GEMM; + // cudnnConvolutionFwdAlgo_t convolution_algorithm_ = CUDNN_CONVOLUTION_FWD_ALGO_GEMM; + // cudnnConvolutionFwdAlgo_t convolution_algorithm_ = CUDNN_CONVOLUTION_FWD_ALGO_DIRECT; + // cudnnConvolutionFwdAlgo_t convolution_algorithm_ = CUDNN_CONVOLUTION_FWD_ALGO_FFT_TILING; + // cudnnConvolutionFwdAlgo_t convolution_algorithm_ = CUDNN_CONVOLUTION_FWD_ALGO_FFT; + // cudnnConvolutionFwdAlgo_t convolution_algorithm_ = CUDNN_CONVOLUTION_FWD_ALGO_WINOGRAD; + // cudnnConvolutionFwdAlgo_t convolution_algorithm_ = CUDNN_CONVOLUTION_FWD_ALGO_WINOGRAD_NONFUSED; + + checkCUDNN(cudnnCreateTensorDescriptor(&input_descriptor_)); + checkCUDNN(cudnnSetTensor4dDescriptor(input_descriptor_, + /*format=*/CUDNN_TENSOR_NCHW, + /*dataType=*/dataType, + /*batch_size=*/batch, + /*channels=*/in_channels, + /*image_height=*/h, + /*image_width=*/w)); + + checkCUDNN(cudnnCreateTensorDescriptor(&output_descriptor_)); + checkCUDNN(cudnnSetTensor4dDescriptor(output_descriptor_, + /*format=*/CUDNN_TENSOR_NHWC, + /*dataType=*/dataType, + /*batch_size=*/batch, + /*channels=*/out_channels, + /*image_height=*/h / stride, + /*image_width=*/w / stride)); + + checkCUDNN(cudnnCreateFilterDescriptor(&kernel_descriptor_)); + checkCUDNN(cudnnSetFilter4dDescriptor(kernel_descriptor_, + /*dataType=*/dataType, + /*format=*/CUDNN_TENSOR_NCHW, + /*out_channels=*/out_channels, + /*in_channels=*/in_channels, + /*kernel_height=*/kernel_size, + /*kernel_width=*/kernel_size)); + + checkCUDNN(cudnnCreateConvolutionDescriptor(&convolution_descriptor_)); + checkCUDNN(cudnnSetConvolution2dDescriptor(convolution_descriptor_, + /*pad_height=*/0, + /*pad_width=*/0, + /*vertical_stride=*/stride, + /*horizontal_stride=*/stride, + /*dilation_height=*/1, + /*dilation_width=*/1, + /*mode=*//*CUDNN_CONVOLUTION,*/ CUDNN_CROSS_CORRELATION, + /*computeType=*/computeType)); + + /*checkCUDNN(cudnnGetConvolutionForwardAlgorithm(cudnn_handle, + input_descriptor_, + kernel_descriptor_, + convolution_descriptor_, + output_descriptor_, + CUDNN_CONVOLUTION_FWD_PREFER_FASTEST, + 0,//memoryLimitInBytes + &convolution_algorithm_));*/ + + checkCUDNN(cudnnConvolutionForward(cudnn_handle, + &alpha, + input_descriptor_, + input, + kernel_descriptor_, + kernel, + convolution_descriptor_, + convolution_algorithm_, + nullptr, + 0, + &beta, + output_descriptor_, + output)); + + checkCUDNN(cudnnDestroyTensorDescriptor(input_descriptor_)); + checkCUDNN(cudnnDestroyTensorDescriptor(output_descriptor_)); + checkCUDNN(cudnnDestroyFilterDescriptor(kernel_descriptor_)); + checkCUDNN(cudnnDestroyConvolutionDescriptor(convolution_descriptor_)); +} + +} // namespace fastertransformer diff --git a/src/fastertransformer/utils/cublasAlgoMap.cc b/src/fastertransformer/utils/cublasAlgoMap.cc index dd2330c3a..37dd1f9b9 100644 --- a/src/fastertransformer/utils/cublasAlgoMap.cc +++ b/src/fastertransformer/utils/cublasAlgoMap.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -18,18 +18,19 @@ namespace fastertransformer { -cublasAlgoMap::cublasAlgoMap(const std::string filename, const std::string sp_config_filename) - : config_filename_(filename), sp_config_filename_(sp_config_filename) +cublasAlgoMap::cublasAlgoMap(const std::string filename, const std::string sp_config_filename): + config_filename_(filename), sp_config_filename_(sp_config_filename) { loadGemmConfig(); loadSpGemmConfig(); } -cublasAlgoMap::cublasAlgoMap(const cublasAlgoMap& algo_map) - : config_filename_(algo_map.config_filename_), sp_config_filename_(algo_map.sp_config_filename_) +cublasAlgoMap::cublasAlgoMap(const cublasAlgoMap& algo_map): + config_filename_(algo_map.config_filename_), + sp_config_filename_(algo_map.sp_config_filename_), + algo_map_(algo_map.algo_map_), + sp_algo_map_(algo_map.sp_algo_map_) { - loadGemmConfig(); - loadSpGemmConfig(); } cublasAlgoMap::~cublasAlgoMap() @@ -76,7 +77,8 @@ void cublasAlgoMap::loadGemmConfig() &stages, &exec_time) != EOF) { - if (dataType != FLOAT_DATATYPE && dataType != HALF_DATATYPE && dataType != INT8_DATATYPE) { + if (dataType != FLOAT_DATATYPE && dataType != HALF_DATATYPE && dataType != BFLOAT16_DATATYPE + && dataType != INT8_DATATYPE) { printf("[WARNING][readAlgoFromConfig] wrong dataType %d!\n", dataType); continue; } @@ -150,9 +152,20 @@ void cublasAlgoMap::loadSpGemmConfig() printf("[ERROR] fgets fail at %s:%d \n", __FILE__, __LINE__); exit(-1); } - while(fscanf(fd, "%d %d %d %d %d ### %d %d %d %d %d %f\n", - &batch_size, &seq_len, &head_num, &size_per_head, &data_type, &batchCount, &m, &n, &k, &algoId, &exec_time)!=EOF) - { + while (fscanf(fd, + "%d %d %d %d %d ### %d %d %d %d %d %f\n", + &batch_size, + &seq_len, + &head_num, + &size_per_head, + &data_type, + &batchCount, + &m, + &n, + &k, + &algoId, + &exec_time) + != EOF) { char mark[256]; sprintf(mark, "%d_%d_%d_%d", batchCount, m, n, k); std::string markStr(mark); diff --git a/src/fastertransformer/utils/cublasAlgoMap.h b/src/fastertransformer/utils/cublasAlgoMap.h index 6bfc9e8e8..668ae28fa 100644 --- a/src/fastertransformer/utils/cublasAlgoMap.h +++ b/src/fastertransformer/utils/cublasAlgoMap.h @@ -59,7 +59,7 @@ class cublasAlgoMap { std::map sp_algo_map_; public: - explicit cublasAlgoMap(const std::string filename, const std::string sp_config_filename=""); + explicit cublasAlgoMap(const std::string filename, const std::string sp_config_filename = ""); cublasAlgoMap(const cublasAlgoMap& map); ~cublasAlgoMap(); void loadGemmConfig(); diff --git a/src/fastertransformer/utils/cublasINT8MMWrapper.cc b/src/fastertransformer/utils/cublasINT8MMWrapper.cc index 11791ef48..580299efa 100644 --- a/src/fastertransformer/utils/cublasINT8MMWrapper.cc +++ b/src/fastertransformer/utils/cublasINT8MMWrapper.cc @@ -16,6 +16,10 @@ #include "cublasINT8MMWrapper.h" +#ifndef CUDART_VERSION +#error CUDART_VERSION Undefined! +#endif + namespace fastertransformer { cublasINT8MMWrapper::cublasINT8MMWrapper(cublasLtHandle_t cublaslt_handle, cudaStream_t stream, @@ -27,6 +31,17 @@ cublasINT8MMWrapper::cublasINT8MMWrapper(cublasLtHandle_t cublaslt_handle, { } +cublasINT8MMWrapper::cublasINT8MMWrapper(cublasHandle_t cublas_handle, + cublasLtHandle_t cublaslt_handle, + cudaStream_t stream, + cublasAlgoMap* cublas_algo_map, + std::mutex* mu, + bool use_ORDER_COL32_2R_4R4): + cublasMMWrapper(cublas_handle, cublaslt_handle, stream, cublas_algo_map, mu, nullptr), + use_ORDER_COL32_2R_4R4_(use_ORDER_COL32_2R_4R4) +{ +} + #ifdef SPARSITY_ENABLED cublasINT8MMWrapper::cublasINT8MMWrapper(cublasLtHandle_t cublaslt_handle, cusparseLtHandle_t cusparselt_handle, @@ -47,25 +62,39 @@ cublasINT8MMWrapper::~cublasINT8MMWrapper() cublasINT8MMWrapper::cublasINT8MMWrapper(const cublasINT8MMWrapper& wrapper): #ifdef SPARSITY_ENABLED - cublasMMWrapper(nullptr, wrapper.cublaslt_handle_, wrapper.cusparselt_handle_, wrapper.stream_, wrapper.cublas_algo_map_, wrapper.mu_, wrapper.allocator_), + cublasMMWrapper(nullptr, + wrapper.cublaslt_handle_, + wrapper.cusparselt_handle_, + wrapper.stream_, + wrapper.cublas_algo_map_, + wrapper.mu_, + wrapper.allocator_), #else - cublasMMWrapper(nullptr, wrapper.cublaslt_handle_, wrapper.stream_, wrapper.cublas_algo_map_, wrapper.mu_, wrapper.allocator_), + cublasMMWrapper( + nullptr, wrapper.cublaslt_handle_, wrapper.stream_, wrapper.cublas_algo_map_, wrapper.mu_, wrapper.allocator_), #endif use_ORDER_COL32_2R_4R4_(wrapper.use_ORDER_COL32_2R_4R4_) { } -//for int8 cublasLtMM with algo -//ATransform should be m*n, CUBLASLT_ORDER_COL32 -//kernel should be n*k, CUBLASLT_ORDER_COL4_4R2_8C or CUBLASLT_ORDER_COL32_2R_4R4 -//res is m*n, CUBLASLT_ORDER_COL32 -void cublasINT8MMWrapper::Gemm(int *res, int batchCount, int m, int n, int k, - int64_t stridea, int64_t strideb, int64_t stridec, - const int8_t *ATransform, const int8_t *kernel) +// for int8 cublasLtMM with algo +// ATransform should be m*n, CUBLASLT_ORDER_COL32 +// kernel should be n*k, CUBLASLT_ORDER_COL4_4R2_8C or CUBLASLT_ORDER_COL32_2R_4R4 +// res is m*n, CUBLASLT_ORDER_COL32 +void cublasINT8MMWrapper::Gemm(int* res, + int batchCount, + int m, + int n, + int k, + int64_t stridea, + int64_t strideb, + int64_t stridec, + const int8_t* ATransform, + const int8_t* kernel) { mu_->lock(); cublasOperation_t opTranspose = CUBLAS_OP_T; -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) cublasComputeType_t computeType = CUBLAS_COMPUTE_32I; #else cudaDataType_t computeType = CUDA_R_32I; @@ -77,27 +106,29 @@ void cublasINT8MMWrapper::Gemm(int *res, int batchCount, int m, int n, int k, cublasLtOrder_t order_COL32 = CUBLASLT_ORDER_COL32; cublasLtOrder_t order_matrixB; -#ifdef CUDA11_MODE - if (use_ORDER_COL32_2R_4R4_) +#if (CUDART_VERSION >= 11000) + if (use_ORDER_COL32_2R_4R4_) { order_matrixB = CUBLASLT_ORDER_COL32_2R_4R4; - else + } + else { order_matrixB = CUBLASLT_ORDER_COL4_4R2_8C; + } #else - order_matrixB = CUBLASLT_ORDER_COL4_4R2_8C; + order_matrixB = CUBLASLT_ORDER_COL4_4R2_8C; #endif - - int ldaTransform = 32 * m; int ldbTransform; - if (use_ORDER_COL32_2R_4R4_) + if (use_ORDER_COL32_2R_4R4_) { ldbTransform = 32 * ((n + 32 - 1) / 32) * 32; - else + } + else { ldbTransform = 32 * ((n + 8 - 1) / 8) * 8; + } int ldcTransform = 32 * m; // create matmulDesc -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) cublasLtMatmulDescCreate(&matmulDesc, computeType, CUDA_R_32I); #else cublasLtMatmulDescCreate(&matmulDesc, computeType); @@ -106,52 +137,68 @@ void cublasINT8MMWrapper::Gemm(int *res, int batchCount, int m, int n, int k, cublasLtMatrixLayoutCreate(&AtransformDesc, CUDA_R_8I, m, k, ldaTransform); cublasLtMatrixLayoutSetAttribute(AtransformDesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_COL32, sizeof(order_COL32)); cublasLtMatrixLayoutCreate(&BtransformDesc, CUDA_R_8I, n, k, ldbTransform); - cublasLtMatrixLayoutSetAttribute(BtransformDesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_matrixB, sizeof(order_matrixB)); + cublasLtMatrixLayoutSetAttribute( + BtransformDesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_matrixB, sizeof(order_matrixB)); cublasLtMatrixLayoutCreate(&CtransformDesc, CUDA_R_32I, m, n, ldcTransform); cublasLtMatrixLayoutSetAttribute(CtransformDesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_COL32, sizeof(order_COL32)); - if (batchCount > 1) - { - cublasLtMatrixLayoutSetAttribute(AtransformDesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount)); - cublasLtMatrixLayoutSetAttribute(AtransformDesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &stridea, sizeof(stridea)); - cublasLtMatrixLayoutSetAttribute(BtransformDesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount)); - cublasLtMatrixLayoutSetAttribute(BtransformDesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideb, sizeof(strideb)); - cublasLtMatrixLayoutSetAttribute(CtransformDesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount)); - cublasLtMatrixLayoutSetAttribute(CtransformDesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &stridec, sizeof(stridec)); + if (batchCount > 1) { + cublasLtMatrixLayoutSetAttribute( + AtransformDesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount)); + cublasLtMatrixLayoutSetAttribute( + AtransformDesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &stridea, sizeof(stridea)); + cublasLtMatrixLayoutSetAttribute( + BtransformDesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount)); + cublasLtMatrixLayoutSetAttribute( + BtransformDesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideb, sizeof(strideb)); + cublasLtMatrixLayoutSetAttribute( + CtransformDesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount)); + cublasLtMatrixLayoutSetAttribute( + CtransformDesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &stridec, sizeof(stridec)); } int alphaI = 1; int betaI = 0; - //get algo + // get algo cublasLtMatmulAlgo_t algo; int findAlgo = 0; - if (cublas_algo_map_->isExist(batchCount, m, n, k, INT8_DATATYPE)) - { - //printf("find algo %s\n", markStr.c_str()); + if (cublas_algo_map_->isExist(batchCount, m, n, k, INT8_DATATYPE)) { + // printf("find algo %s\n", markStr.c_str()); findAlgo = 1; - + cublasLtMatmulAlgo_info tmp_info = cublas_algo_map_->getAlgo(batchCount, m, n, k, INT8_DATATYPE); - cublasLtMatmulAlgoInit(cublaslt_handle_, computeType, CUDA_R_32I, CUDA_R_8I, CUDA_R_8I, CUDA_R_32I, CUDA_R_32I, tmp_info.algoId, &algo); - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &(tmp_info.customOption), sizeof(tmp_info.customOption)); - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_TILE_ID, &(tmp_info.tile), sizeof(tmp_info.tile)); - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &(tmp_info.splitK_val), sizeof(tmp_info.splitK_val)); - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &(tmp_info.swizzle), sizeof(tmp_info.swizzle)); - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &(tmp_info.reductionScheme), sizeof(int)); -#ifdef CUDA11_MODE - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &(tmp_info.stages), sizeof(tmp_info.stages)); + cublasLtMatmulAlgoInit(cublaslt_handle_, + computeType, + CUDA_R_32I, + CUDA_R_8I, + CUDA_R_8I, + CUDA_R_32I, + CUDA_R_32I, + tmp_info.algoId, + &algo); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &(tmp_info.customOption), sizeof(tmp_info.customOption)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_TILE_ID, &(tmp_info.tile), sizeof(tmp_info.tile)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &(tmp_info.splitK_val), sizeof(tmp_info.splitK_val)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &(tmp_info.swizzle), sizeof(tmp_info.swizzle)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &(tmp_info.reductionScheme), sizeof(int)); +#if (CUDART_VERSION >= 11000) + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &(tmp_info.stages), sizeof(tmp_info.stages)); #endif } - else - { + else { findAlgo = 1; int algoId; - if (use_ORDER_COL32_2R_4R4_) - { + if (use_ORDER_COL32_2R_4R4_) { algoId = 7; } - else - { + else { algoId = 6; } int swizzle = 0; @@ -159,18 +206,23 @@ void cublasINT8MMWrapper::Gemm(int *res, int batchCount, int m, int n, int k, int tile = 20; int splitK_val = 0; int reductionScheme = 0; - cublasLtMatmulAlgoInit(cublaslt_handle_, computeType, CUDA_R_32I, CUDA_R_8I, CUDA_R_8I, CUDA_R_32I, CUDA_R_32I, algoId, &algo); - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &(customOption), sizeof(customOption)); + cublasLtMatmulAlgoInit( + cublaslt_handle_, computeType, CUDA_R_32I, CUDA_R_8I, CUDA_R_8I, CUDA_R_32I, CUDA_R_32I, algoId, &algo); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &(customOption), sizeof(customOption)); cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_TILE_ID, &(tile), sizeof(tile)); cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &(splitK_val), sizeof(splitK_val)); cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &(swizzle), sizeof(swizzle)); - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &(reductionScheme), sizeof(int)); -#ifdef CUDA11_MODE + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &(reductionScheme), sizeof(int)); +#if (CUDART_VERSION >= 11000) int stages; - if (use_ORDER_COL32_2R_4R4_) + if (use_ORDER_COL32_2R_4R4_) { stages = 15; - else + } + else { stages = 13; + } cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &(stages), sizeof(stages)); #endif } @@ -187,7 +239,10 @@ void cublasINT8MMWrapper::Gemm(int *res, int batchCount, int m, int n, int k, CtransformDesc, res, CtransformDesc, - (findAlgo == 1 ? (&algo) : NULL), NULL, 0, stream_); + (findAlgo == 1 ? (&algo) : NULL), + NULL, + 0, + stream_); cublasLtMatmulDescDestroy(matmulDesc); cublasLtMatrixLayoutDestroy(AtransformDesc); @@ -197,20 +252,28 @@ void cublasINT8MMWrapper::Gemm(int *res, int batchCount, int m, int n, int k, mu_->unlock(); } -//for int8 IO cublasLtMM with algo -//ATransform should be m*k CUBLASLT_ORDER_COL32 -//kernel should be n*k CUBLASLT_ORDER_COL4_4R2_8C -//res is m*n CUBLASLT_ORDER_COL32 -void cublasINT8MMWrapper::Gemm(int8_t *res, int batchCount, int m, int n, int k, - int64_t stridea, int64_t strideb, int64_t stridec, - const float alpha, const int8_t *ATransform, const int8_t *kernel) +// for int8 IO cublasLtMM with algo +// ATransform should be m*k CUBLASLT_ORDER_COL32 +// kernel should be n*k CUBLASLT_ORDER_COL4_4R2_8C +// res is m*n CUBLASLT_ORDER_COL32 +void cublasINT8MMWrapper::Gemm(int8_t* res, + int batchCount, + int m, + int n, + int k, + int64_t stridea, + int64_t strideb, + int64_t stridec, + const float alpha, + const int8_t* ATransform, + const int8_t* kernel) { mu_->lock(); cublasOperation_t opTranspose = CUBLAS_OP_T; - //int8 gemm does not support CUBLAS_POINTER_MODE_DEVICE - //cublasLtPointerMode_t pointerMode = CUBLASLT_POINTER_MODE_ALPHA_DEVICE_VECTOR_BETA_ZERO; + // int8 gemm does not support CUBLAS_POINTER_MODE_DEVICE + // cublasLtPointerMode_t pointerMode = CUBLASLT_POINTER_MODE_ALPHA_DEVICE_VECTOR_BETA_ZERO; cudaDataType_t scaleType = CUDA_R_32F; -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) cublasComputeType_t computeType = CUBLAS_COMPUTE_32I; #else cudaDataType_t computeType = CUDA_R_32I; @@ -222,81 +285,100 @@ void cublasINT8MMWrapper::Gemm(int8_t *res, int batchCount, int m, int n, int k, cublasLtOrder_t order_COL32 = CUBLASLT_ORDER_COL32; cublasLtOrder_t order_matrixB; -#ifdef CUDA11_MODE - if (use_ORDER_COL32_2R_4R4_) +#if (CUDART_VERSION >= 11000) + if (use_ORDER_COL32_2R_4R4_) { order_matrixB = CUBLASLT_ORDER_COL32_2R_4R4; - else + } + else { order_matrixB = CUBLASLT_ORDER_COL4_4R2_8C; + } #else order_matrixB = CUBLASLT_ORDER_COL4_4R2_8C; #endif - int ldaTransform = 32 * m; int ldbTransform; - if (use_ORDER_COL32_2R_4R4_) + if (use_ORDER_COL32_2R_4R4_) { ldbTransform = 32 * ((n + 32 - 1) / 32) * 32; - else + } + else { ldbTransform = 32 * ((n + 8 - 1) / 8) * 8; - + } int ldcTransform = 32 * m; // create matmulDesc -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) cublasLtMatmulDescCreate(&matmulDesc, computeType, scaleType); #else cublasLtMatmulDescCreate(&matmulDesc, computeType); #endif cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_TRANSB, &opTranspose, sizeof(cublasOperation_t)); cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_SCALE_TYPE, &scaleType, sizeof(scaleType)); - //cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_POINTER_MODE, &pointerMode, sizeof(cublasLtPointerMode_t)); + // cublasLtMatmulDescSetAttribute(matmulDesc, CUBLASLT_MATMUL_DESC_POINTER_MODE, &pointerMode, + // sizeof(cublasLtPointerMode_t)); cublasLtMatrixLayoutCreate(&AtransformDesc, CUDA_R_8I, m, k, ldaTransform); cublasLtMatrixLayoutSetAttribute(AtransformDesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_COL32, sizeof(order_COL32)); cublasLtMatrixLayoutCreate(&BtransformDesc, CUDA_R_8I, n, k, ldbTransform); - cublasLtMatrixLayoutSetAttribute(BtransformDesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_matrixB, sizeof(order_matrixB)); + cublasLtMatrixLayoutSetAttribute( + BtransformDesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_matrixB, sizeof(order_matrixB)); cublasLtMatrixLayoutCreate(&CtransformDesc, CUDA_R_8I, m, n, ldcTransform); - cublasLtMatrixLayoutSetAttribute(CtransformDesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_COL32, sizeof(order_COL32)); - if (batchCount > 1) - { - cublasLtMatrixLayoutSetAttribute(AtransformDesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount)); - cublasLtMatrixLayoutSetAttribute(AtransformDesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &stridea, sizeof(stridea)); - cublasLtMatrixLayoutSetAttribute(BtransformDesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount)); - cublasLtMatrixLayoutSetAttribute(BtransformDesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideb, sizeof(strideb)); - cublasLtMatrixLayoutSetAttribute(CtransformDesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount)); - cublasLtMatrixLayoutSetAttribute(CtransformDesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &stridec, sizeof(stridec)); + cublasLtMatrixLayoutSetAttribute(CtransformDesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_COL32, sizeof(order_COL32)); + if (batchCount > 1) { + cublasLtMatrixLayoutSetAttribute( + AtransformDesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount)); + cublasLtMatrixLayoutSetAttribute( + AtransformDesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &stridea, sizeof(stridea)); + cublasLtMatrixLayoutSetAttribute( + BtransformDesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount)); + cublasLtMatrixLayoutSetAttribute( + BtransformDesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideb, sizeof(strideb)); + cublasLtMatrixLayoutSetAttribute( + CtransformDesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount)); + cublasLtMatrixLayoutSetAttribute( + CtransformDesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &stridec, sizeof(stridec)); } - //get algo + // get algo cublasLtMatmulAlgo_t algo; int findAlgo = 0; - if (cublas_algo_map_->isExist(batchCount, m, n, k, INT8_DATATYPE)) - { + if (cublas_algo_map_->isExist(batchCount, m, n, k, INT8_DATATYPE)) { findAlgo = 1; - + cublasLtMatmulAlgo_info tmp_info = cublas_algo_map_->getAlgo(batchCount, m, n, k, INT8_DATATYPE); - - cublasLtMatmulAlgoInit(cublaslt_handle_, computeType, CUDA_R_32F, CUDA_R_8I, CUDA_R_8I, CUDA_R_8I, CUDA_R_8I, tmp_info.algoId, &algo); - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &(tmp_info.customOption), sizeof(tmp_info.customOption)); - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_TILE_ID, &(tmp_info.tile), sizeof(tmp_info.tile)); - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &(tmp_info.splitK_val), sizeof(tmp_info.splitK_val)); - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &(tmp_info.swizzle), sizeof(tmp_info.swizzle)); - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &(tmp_info.reductionScheme), sizeof(int)); -#ifdef CUDA11_MODE - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &(tmp_info.stages), sizeof(tmp_info.stages)); + + cublasLtMatmulAlgoInit(cublaslt_handle_, + computeType, + CUDA_R_32F, + CUDA_R_8I, + CUDA_R_8I, + CUDA_R_8I, + CUDA_R_8I, + tmp_info.algoId, + &algo); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &(tmp_info.customOption), sizeof(tmp_info.customOption)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_TILE_ID, &(tmp_info.tile), sizeof(tmp_info.tile)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &(tmp_info.splitK_val), sizeof(tmp_info.splitK_val)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &(tmp_info.swizzle), sizeof(tmp_info.swizzle)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &(tmp_info.reductionScheme), sizeof(int)); +#if (CUDART_VERSION >= 11000) + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &(tmp_info.stages), sizeof(tmp_info.stages)); #endif } - else - { + else { findAlgo = 1; int algoId; - if (use_ORDER_COL32_2R_4R4_) - { + if (use_ORDER_COL32_2R_4R4_) { algoId = 7; } - else - { + else { algoId = 6; } int swizzle = 0; @@ -304,18 +386,23 @@ void cublasINT8MMWrapper::Gemm(int8_t *res, int batchCount, int m, int n, int k, int tile = 20; int splitK_val = 0; int reductionScheme = 0; - cublasLtMatmulAlgoInit(cublaslt_handle_, computeType, CUDA_R_32F, CUDA_R_8I, CUDA_R_8I, CUDA_R_8I, CUDA_R_8I, algoId, &algo); - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &(customOption), sizeof(customOption)); + cublasLtMatmulAlgoInit( + cublaslt_handle_, computeType, CUDA_R_32F, CUDA_R_8I, CUDA_R_8I, CUDA_R_8I, CUDA_R_8I, algoId, &algo); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &(customOption), sizeof(customOption)); cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_TILE_ID, &(tile), sizeof(tile)); cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &(splitK_val), sizeof(splitK_val)); cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &(swizzle), sizeof(swizzle)); - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &(reductionScheme), sizeof(int)); -#ifdef CUDA11_MODE + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &(reductionScheme), sizeof(int)); +#if (CUDART_VERSION >= 11000) int stages; - if (use_ORDER_COL32_2R_4R4_) + if (use_ORDER_COL32_2R_4R4_) { stages = 15; - else + } + else { stages = 13; + } cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &(stages), sizeof(stages)); #endif } @@ -333,53 +420,55 @@ void cublasINT8MMWrapper::Gemm(int8_t *res, int batchCount, int m, int n, int k, CtransformDesc, res, CtransformDesc, - (findAlgo == 1 ? (&algo) : NULL), NULL, 0, stream_); + (findAlgo == 1 ? (&algo) : NULL), + NULL, + 0, + stream_); cublasLtMatmulDescDestroy(matmulDesc); cublasLtMatrixLayoutDestroy(AtransformDesc); cublasLtMatrixLayoutDestroy(BtransformDesc); cublasLtMatrixLayoutDestroy(CtransformDesc); sync_check_cuda_error(); - mu_->unlock(); + mu_->unlock(); } -template -int cublasINT8MMWrapper::getFusedINT8QKVType(const int k, const int n, const AttentionWeight *attention_weights) { - +template +int cublasINT8MMWrapper::getFusedINT8QKVType(const int k, const int n, const AttentionWeight* attention_weights) +{ + int fusedINT8QKV_type = 0; const int8_t* Q_weight = (const int8_t*)(attention_weights->query_weight.kernel); const int8_t* K_weight = (const int8_t*)(attention_weights->key_weight.kernel); const int8_t* V_weight = (const int8_t*)(attention_weights->value_weight.kernel); - //for QKV weight are DataType_ & continue - if ((attention_weights->query_weight.kernel + n*k == attention_weights->key_weight.kernel) && - (attention_weights->key_weight.kernel + n*k == attention_weights->value_weight.kernel)) + // for QKV weight are DataType_ & continue + if ((attention_weights->query_weight.kernel + n * k == attention_weights->key_weight.kernel) + && (attention_weights->key_weight.kernel + n * k == attention_weights->value_weight.kernel)) { fusedINT8QKV_type = 1; - //for QVK weight are int8 & continue - else if ((Q_weight + n*k == K_weight) && (K_weight + n*k == V_weight)) + } + // for QVK weight are int8 & continue + else if ((Q_weight + n * k == K_weight) && (K_weight + n * k == V_weight)) { fusedINT8QKV_type = 2; + } return fusedINT8QKV_type; } -bool cublasINT8MMWrapper::getUseOrderCol322R4R4() { +bool cublasINT8MMWrapper::getUseOrderCol322R4R4() +{ return use_ORDER_COL32_2R_4R4_; } -template -int cublasINT8MMWrapper::getFusedINT8QKVType(const int k, const int n, const AttentionWeight *attention_weights); +template int +cublasINT8MMWrapper::getFusedINT8QKVType(const int k, const int n, const AttentionWeight* attention_weights); -template -int cublasINT8MMWrapper::getFusedINT8QKVType(const int k, const int n, const AttentionWeight *attention_weights); +template int +cublasINT8MMWrapper::getFusedINT8QKVType(const int k, const int n, const AttentionWeight* attention_weights); #ifdef SPARSITY_ENABLED // A is sparse weight [m,k], non transposed row major // B is activation input [k, n], non transposed col major -void cublasINT8MMWrapper::SpGemm(const int m, - const int n, - const int k, - const float alpha, - const void *A, - const void *B, - void *C) +void cublasINT8MMWrapper::SpGemm( + const int m, const int n, const int k, const float alpha, const void* A, const void* B, void* C) { cudaDataType_t Atype = CUDA_R_8I; cudaDataType_t Btype = CUDA_R_8I; @@ -393,68 +482,76 @@ void cublasINT8MMWrapper::SpGemm(const int m, cusparseLtMatmulAlgSelection_t alg_sel; cusparseLtMatmulPlan_t plan; - auto num_A_rows = m; - auto num_A_cols = k; - auto num_B_rows = k; - auto num_B_cols = n; - auto num_C_rows = m; - auto num_C_cols = n; - unsigned alignment = 16; - auto lda = num_A_cols; - auto ldb = num_B_rows; - auto ldc = num_C_rows; + auto num_A_rows = m; + auto num_A_cols = k; + auto num_B_rows = k; + auto num_B_cols = n; + auto num_C_rows = m; + auto num_C_cols = n; + unsigned alignment = 16; + auto lda = num_A_cols; + auto ldb = num_B_rows; + auto ldc = num_C_rows; float _beta(0.0f); char mark[256]; sprintf(mark, "%d_%d_%d_%d", 1, m, n, k); if (sp_mat_A_desc_map_.find(mark) != sp_mat_A_desc_map_.end()) { - CHECK_CUSPARSE( cusparseLtMatmulDescriptorInit( - &cusparselt_handle_, &matmul, opA, opB, - &sp_mat_A_desc_map_[mark], &sp_mat_B_desc_map_[mark], &sp_mat_C_desc_map_[mark], &sp_mat_C_desc_map_[mark], - compute_type) ) - } else { + CHECK_CUSPARSE(cusparseLtMatmulDescriptorInit(&cusparselt_handle_, + &matmul, + opA, + opB, + &sp_mat_A_desc_map_[mark], + &sp_mat_B_desc_map_[mark], + &sp_mat_C_desc_map_[mark], + &sp_mat_C_desc_map_[mark], + compute_type)) + } + else { // initializing MatDesc takes a lot of time cusparseLtMatDescriptor_t matA, matB, matC; sp_mat_A_desc_map_[mark] = matA; sp_mat_B_desc_map_[mark] = matB; sp_mat_C_desc_map_[mark] = matC; - CHECK_CUSPARSE( cusparseLtStructuredDescriptorInit( - &cusparselt_handle_, &sp_mat_A_desc_map_[mark], num_A_rows, - num_A_cols, lda, alignment, - Atype, row_order, - CUSPARSELT_SPARSITY_50_PERCENT) ) - CHECK_CUSPARSE( cusparseLtDenseDescriptorInit( - &cusparselt_handle_, &sp_mat_B_desc_map_[mark], num_B_rows, - num_B_cols, ldb, alignment, - Btype, col_order) ) - CHECK_CUSPARSE( cusparseLtDenseDescriptorInit( - &cusparselt_handle_, &sp_mat_C_desc_map_[mark], num_C_rows, - num_C_cols, ldc, alignment, - Ctype, col_order) ) - CHECK_CUSPARSE( cusparseLtMatmulDescriptorInit( - &cusparselt_handle_, &matmul, opA, opB, - &sp_mat_A_desc_map_[mark], &sp_mat_B_desc_map_[mark], &sp_mat_C_desc_map_[mark], &sp_mat_C_desc_map_[mark], - compute_type) ) + CHECK_CUSPARSE(cusparseLtStructuredDescriptorInit(&cusparselt_handle_, + &sp_mat_A_desc_map_[mark], + num_A_rows, + num_A_cols, + lda, + alignment, + Atype, + row_order, + CUSPARSELT_SPARSITY_50_PERCENT)) + CHECK_CUSPARSE(cusparseLtDenseDescriptorInit( + &cusparselt_handle_, &sp_mat_B_desc_map_[mark], num_B_rows, num_B_cols, ldb, alignment, Btype, col_order)) + CHECK_CUSPARSE(cusparseLtDenseDescriptorInit( + &cusparselt_handle_, &sp_mat_C_desc_map_[mark], num_C_rows, num_C_cols, ldc, alignment, Ctype, col_order)) + CHECK_CUSPARSE(cusparseLtMatmulDescriptorInit(&cusparselt_handle_, + &matmul, + opA, + opB, + &sp_mat_A_desc_map_[mark], + &sp_mat_B_desc_map_[mark], + &sp_mat_C_desc_map_[mark], + &sp_mat_C_desc_map_[mark], + compute_type)) } mu_->lock(); - CHECK_CUSPARSE( cusparseLtMatmulAlgSelectionInit( - &cusparselt_handle_, &alg_sel, &matmul, - CUSPARSELT_MATMUL_ALG_DEFAULT) ) + CHECK_CUSPARSE( + cusparseLtMatmulAlgSelectionInit(&cusparselt_handle_, &alg_sel, &matmul, CUSPARSELT_MATMUL_ALG_DEFAULT)) int alg = cublas_algo_map_->getSpAlgo(1, num_A_rows, num_B_cols, num_A_cols); - CHECK_CUSPARSE( cusparseLtMatmulAlgSetAttribute( - &cusparselt_handle_, &alg_sel, - CUSPARSELT_MATMUL_ALG_CONFIG_ID, - &alg, sizeof(alg)) ) + CHECK_CUSPARSE(cusparseLtMatmulAlgSetAttribute( + &cusparselt_handle_, &alg_sel, CUSPARSELT_MATMUL_ALG_CONFIG_ID, &alg, sizeof(alg))) size_t workspace_size; - CHECK_CUSPARSE( cusparseLtMatmulGetWorkspace(&cusparselt_handle_, &alg_sel, &workspace_size) ) - CHECK_CUSPARSE( cusparseLtMatmulPlanInit(&cusparselt_handle_, &plan, &matmul, &alg_sel, workspace_size) ) + CHECK_CUSPARSE(cusparseLtMatmulGetWorkspace(&cusparselt_handle_, &alg_sel, &workspace_size)) + CHECK_CUSPARSE(cusparseLtMatmulPlanInit(&cusparselt_handle_, &plan, &matmul, &alg_sel, workspace_size)) void* d_workspace = nullptr; int num_streams = 1; cudaStream_t streams[1] = {stream_}; - CHECK_CUSPARSE( cusparseLtMatmul(&cusparselt_handle_, &plan, &alpha, A, B, - &_beta, C, C, d_workspace, streams, num_streams) ) - CHECK_CUSPARSE( cusparseLtMatmulPlanDestroy(&plan) ) + CHECK_CUSPARSE( + cusparseLtMatmul(&cusparselt_handle_, &plan, &alpha, A, B, &_beta, C, C, d_workspace, streams, num_streams)) + CHECK_CUSPARSE(cusparseLtMatmulPlanDestroy(&plan)) sync_check_cuda_error(); mu_->unlock(); } diff --git a/src/fastertransformer/utils/cublasINT8MMWrapper.h b/src/fastertransformer/utils/cublasINT8MMWrapper.h index 72354bf53..92169c4d0 100644 --- a/src/fastertransformer/utils/cublasINT8MMWrapper.h +++ b/src/fastertransformer/utils/cublasINT8MMWrapper.h @@ -14,10 +14,10 @@ * limitations under the License. */ -#include "src/fastertransformer/utils/cublasAlgoMap.h" +#include "cuda_utils.h" #include "src/fastertransformer/layers/attention_layers/AttentionWeight.h" +#include "src/fastertransformer/utils/cublasAlgoMap.h" #include "src/fastertransformer/utils/cublasMMWrapper.h" -#include "cuda_utils.h" #include #include #include @@ -28,16 +28,23 @@ #pragma once namespace fastertransformer { -class cublasINT8MMWrapper : public cublasMMWrapper { +class cublasINT8MMWrapper: public cublasMMWrapper { private: bool use_ORDER_COL32_2R_4R4_; -public: +public: cublasINT8MMWrapper(cublasLtHandle_t cublaslt_handle_, cudaStream_t stream, cublasAlgoMap* map, std::mutex* mu, bool use_ORDER_COL32_2R_4R4); + + cublasINT8MMWrapper(cublasHandle_t cublas_handle, + cublasLtHandle_t cublaslt_handle, + cudaStream_t stream, + cublasAlgoMap* map, + std::mutex* mu, + bool use_ORDER_COL32_2R_4R4); #ifdef SPARSITY_ENABLED cublasINT8MMWrapper(cublasLtHandle_t cublaslt_handle_, cusparseLtHandle_t cusparselt_handle, @@ -51,27 +58,36 @@ class cublasINT8MMWrapper : public cublasMMWrapper { cublasINT8MMWrapper(const cublasINT8MMWrapper& wrapper); - void Gemm(int *res, int batchCount, int m, int n, int k, - int64_t stridea, int64_t strideb, int64_t stridec, - const int8_t *ATransform, const int8_t *kernel); - - void Gemm(int8_t *res, int batchCount, int m, int n, int k, - int64_t stridea, int64_t strideb, int64_t stridec, - const float alpha, const int8_t *ATransform, const int8_t *kernel); + void Gemm(int* res, + int batchCount, + int m, + int n, + int k, + int64_t stridea, + int64_t strideb, + int64_t stridec, + const int8_t* ATransform, + const int8_t* kernel); + + void Gemm(int8_t* res, + int batchCount, + int m, + int n, + int k, + int64_t stridea, + int64_t strideb, + int64_t stridec, + const float alpha, + const int8_t* ATransform, + const int8_t* kernel); + + template + int getFusedINT8QKVType(const int k, const int n, const AttentionWeight* attention_weights); - template - int getFusedINT8QKVType(const int k, const int n, const AttentionWeight *attention_weights); - bool getUseOrderCol322R4R4(); #ifdef SPARSITY_ENABLED - void SpGemm(const int m, - const int n, - const int k, - const float alpha, - const void *A, - const void *B, - void *C); + void SpGemm(const int m, const int n, const int k, const float alpha, const void* A, const void* B, void* C); #endif }; diff --git a/src/fastertransformer/utils/cublasMMWrapper.cc b/src/fastertransformer/utils/cublasMMWrapper.cc index cc6931ad3..e291151a2 100644 --- a/src/fastertransformer/utils/cublasMMWrapper.cc +++ b/src/fastertransformer/utils/cublasMMWrapper.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,6 +16,10 @@ #include "cublasMMWrapper.h" +#ifndef CUDART_VERSION +#error CUDART_VERSION Undefined! +#endif + namespace fastertransformer { cublasMMWrapper::cublasMMWrapper(cublasHandle_t cublas_handle, cublasLtHandle_t cublaslt_handle, @@ -155,6 +159,7 @@ void cublasMMWrapper::Gemm(cublasOperation_t transa, half h_beta = (half)(f_beta); mu_->lock(); + // TODO: default cublas libs int is_fp16_computeType = computeType_ == CUDA_R_16F ? 1 : 0; bool using_cublasLt = (Atype_ == CUDA_R_16F) ? true : false; int batch_count = 1; @@ -163,30 +168,30 @@ void cublasMMWrapper::Gemm(cublasOperation_t transa, const void* alpha = is_fp16_computeType ? reinterpret_cast(&h_alpha) : reinterpret_cast(&f_alpha); const void* beta = is_fp16_computeType ? reinterpret_cast(&h_beta) : reinterpret_cast(&f_beta); - int findAlgo = - cublas_algo_map_->isExist(batch_count, m, n, k, (Atype_ == CUDA_R_16F) ? HALF_DATATYPE : FLOAT_DATATYPE); + int findAlgo = cublas_algo_map_->isExist(batch_count, m, n, k, getCublasDataType(Atype_)); - cublasLtMatmulAlgo_info info = - cublas_algo_map_->getAlgo(batch_count, m, n, k, (Atype_ == CUDA_R_16F) ? HALF_DATATYPE : FLOAT_DATATYPE); + cublasLtMatmulAlgo_info info = cublas_algo_map_->getAlgo(batch_count, m, n, k, getCublasDataType(Atype_)); if (findAlgo) { - if (info.stages != -1) + if (info.stages != -1) { using_cublasLt = true; - else + } + else { using_cublasLt = false; + } } if (using_cublasLt) { cublasLtMatmulDesc_t operationDesc = NULL; cublasLtMatrixLayout_t Adesc = NULL, Bdesc = NULL, Cdesc = NULL; cudaDataType_t scaleType; -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) cublasComputeType_t computeType; #else cudaDataType_t computeType; #endif if (is_fp16_computeType) { -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) computeType = CUBLAS_COMPUTE_16F; #else computeType = CUDA_R_16F; @@ -194,7 +199,7 @@ void cublasMMWrapper::Gemm(cublasOperation_t transa, scaleType = CUDA_R_16F; } else { -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) computeType = CUBLAS_COMPUTE_32F; #else computeType = CUDA_R_32F; @@ -207,7 +212,7 @@ void cublasMMWrapper::Gemm(cublasOperation_t transa, cublasLtMatrixLayoutCreate(&Adesc, Atype_, transa == CUBLAS_OP_N ? m : k, transa == CUBLAS_OP_N ? k : m, lda); cublasLtMatrixLayoutCreate(&Bdesc, Btype_, transb == CUBLAS_OP_N ? k : n, transb == CUBLAS_OP_N ? n : k, ldb); cublasLtMatrixLayoutCreate(&Cdesc, Ctype_, m, n, ldc); -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) cublasLtMatmulDescCreate(&operationDesc, computeType, scaleType); #else cublasLtMatmulDescCreate(&operationDesc, computeType); @@ -220,8 +225,9 @@ void cublasMMWrapper::Gemm(cublasOperation_t transa, void* workSpace = cublas_workspace_; int workspaceSize = cublas_workspace_ == NULL ? 0 : CUBLAS_WORKSPACE_SIZE; if (findAlgo) { - if (info.workspaceSize > workspaceSize) + if (info.workspaceSize > workspaceSize) { findAlgo = 0; + } else { cublasLtMatmulAlgoInit( cublaslt_handle_, computeType, scaleType, Atype_, Btype_, Ctype_, Ctype_, info.algoId, &algo); @@ -235,7 +241,7 @@ void cublasMMWrapper::Gemm(cublasOperation_t transa, &algo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &(info.swizzle), sizeof(info.swizzle)); cublasLtMatmulAlgoConfigSetAttribute( &algo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &(info.reductionScheme), sizeof(int)); -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) cublasLtMatmulAlgoConfigSetAttribute( &algo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &(info.stages), sizeof(info.stages)); #endif @@ -304,9 +310,19 @@ void cublasMMWrapper::setFP16GemmConfig() Atype_ = CUDA_R_16F; Btype_ = CUDA_R_16F; Ctype_ = CUDA_R_16F; - computeType_ = CUDA_R_16F; + computeType_ = CUDA_R_32F; } +#ifdef ENABLE_BF16 +void cublasMMWrapper::setBF16GemmConfig() +{ + Atype_ = CUDA_R_16BF; + Btype_ = CUDA_R_16BF; + Ctype_ = CUDA_R_16BF; + computeType_ = CUDA_R_32F; +} +#endif + void cublasMMWrapper::setGemmConfig(cudaDataType_t aType, cudaDataType_t bType, cudaDataType_t cType, @@ -318,6 +334,101 @@ void cublasMMWrapper::setGemmConfig(cudaDataType_t aType, computeType_ = computeType; } +CublasDataType cublasMMWrapper::getCublasDataType(cudaDataType_t data_type) +{ + if (data_type == CUDA_R_16F) { + return HALF_DATATYPE; + } + else if (data_type == CUDA_R_32F) { + return FLOAT_DATATYPE; + } +#ifdef ENABLE_BF16 + else if (data_type == CUDA_R_16BF) { + return BFLOAT16_DATATYPE; + } +#endif + return FLOAT_DATATYPE; +} + +#if (CUDART_VERSION >= 11000) +// input, weight, output are row-major +// only works for cublas 11.x +void cublasMMWrapper::Gemm(cublasOperation_t transa, + cublasOperation_t transb, + const int m, + const int n, + const int k, + const void* A, + const int lda, + const void* B, + const int ldb, + const void* bias, + void* C, + const int ldc) +{ + cudaDataType_t Atype, Btype, Ctype; + cublasComputeType_t computeType; + cudaDataType_t scaleType; + float alpha_float = 1.0f; + float beta_float = 0.0f; + half alpha_half = half(1.0f); + half beta_half = half(0.0f); + void *alpha, *beta; + + // int is_fp16_computeType = computeType_ == CUDA_R_16F ? 1 : 0; + if (Atype_ == CUDA_R_32F) { + computeType = CUBLAS_COMPUTE_32F_FAST_TF32; + Atype = CUDA_R_32F; + Btype = CUDA_R_32F; + Ctype = CUDA_R_32F; + scaleType = CUDA_R_32F; + alpha = &alpha_float; + beta = &beta_float; + } + else if (Atype_ == CUDA_R_16BF) { + computeType = CUBLAS_COMPUTE_32F_FAST_TF32; + Atype = CUDA_R_16BF; + Btype = CUDA_R_16BF; + Ctype = CUDA_R_16BF; + scaleType = CUDA_R_32F; + alpha = &alpha_float; + beta = &beta_float; + } + else { + computeType = CUBLAS_COMPUTE_16F; + Atype = CUDA_R_16F; + Btype = CUDA_R_16F; + Ctype = CUDA_R_16F; + scaleType = CUDA_R_16F; + alpha = &alpha_half; + beta = &beta_half; + } + + cublasLtMatmulDesc_t operationDesc = NULL; + cublasLtMatrixLayout_t Adesc = NULL, Bdesc = NULL, Cdesc = NULL; + cublasLtEpilogue_t epi = CUBLASLT_EPILOGUE_BIAS; + cublasLtMatrixLayoutCreate(&Adesc, Atype, (transa == CUBLAS_OP_N) ? m : k, (transa == CUBLAS_OP_N) ? k : m, lda); + cublasLtMatrixLayoutCreate(&Bdesc, Btype, (transb == CUBLAS_OP_N) ? k : n, (transb == CUBLAS_OP_N) ? n : k, ldb); + cublasLtMatrixLayoutCreate(&Cdesc, Ctype, m, n, ldc); + + cublasLtMatmulDescCreate(&operationDesc, computeType, scaleType); + cublasLtMatmulDescSetAttribute(operationDesc, CUBLASLT_MATMUL_DESC_TRANSA, &transa, sizeof(cublasOperation_t)); + cublasLtMatmulDescSetAttribute(operationDesc, CUBLASLT_MATMUL_DESC_TRANSB, &transb, sizeof(cublasOperation_t)); + cublasLtMatmulDescSetAttribute(operationDesc, CUBLASLT_MATMUL_DESC_EPILOGUE, &epi, sizeof(cublasLtEpilogue_t)); + cublasLtMatmulDescSetAttribute(operationDesc, CUBLASLT_MATMUL_DESC_BIAS_POINTER, &bias, sizeof(const void*)); + check_cuda_error(cublasLtMatmul( + cublaslt_handle_, operationDesc, alpha, A, Adesc, B, Bdesc, beta, C, Cdesc, C, Cdesc, NULL, NULL, 0, stream_)); + cublasLtMatrixLayoutDestroy(Adesc); + cublasLtMatrixLayoutDestroy(Bdesc); + cublasLtMatrixLayoutDestroy(Cdesc); + cublasLtMatmulDescDestroy(operationDesc); +} +#endif +void cublasMMWrapper::setStream(cudaStream_t stream) +{ + stream_ = stream; +} + void cublasMMWrapper::stridedBatchedGemm(cublasOperation_t transa, cublasOperation_t transb, const int m, @@ -344,8 +455,7 @@ void cublasMMWrapper::stridedBatchedGemm(cublasOperation_t transa, const void* alpha = is_fp16_computeType ? reinterpret_cast(&h_alpha) : reinterpret_cast(&f_alpha); const void* beta = is_fp16_computeType ? reinterpret_cast(&h_beta) : reinterpret_cast(&f_beta); - cublasLtMatmulAlgo_info info = - cublas_algo_map_->getAlgo(batch_count, m, n, k, (Atype_ == CUDA_R_16F) ? HALF_DATATYPE : FLOAT_DATATYPE); + cublasLtMatmulAlgo_info info = cublas_algo_map_->getAlgo(batch_count, m, n, k, getCublasDataType(Atype_)); check_cuda_error(cublasGemmStridedBatchedEx(cublas_handle_, transa, @@ -404,8 +514,7 @@ void cublasMMWrapper::stridedBatchedGemm(cublasOperation_t transa, const void* alpha = is_fp16_computeType ? reinterpret_cast(&h_alpha) : reinterpret_cast(&f_alpha); const void* beta = is_fp16_computeType ? reinterpret_cast(&h_beta) : reinterpret_cast(&f_beta); - cublasLtMatmulAlgo_info info = - cublas_algo_map_->getAlgo(batch_count, m, n, k, (AType == CUDA_R_16F) ? HALF_DATATYPE : FLOAT_DATATYPE); + cublasLtMatmulAlgo_info info = cublas_algo_map_->getAlgo(batch_count, m, n, k, getCublasDataType(Atype_)); check_cuda_error(cublasGemmStridedBatchedEx(cublas_handle_, transa, @@ -457,8 +566,7 @@ void cublasMMWrapper::batchedGemm(cublasOperation_t transa, int is_fp16_computeType = computeType_ == CUDA_R_16F ? 1 : 0; const void* alpha = is_fp16_computeType ? reinterpret_cast(&h_alpha) : reinterpret_cast(&f_alpha); const void* beta = is_fp16_computeType ? reinterpret_cast(&h_beta) : reinterpret_cast(&f_beta); - cublasLtMatmulAlgo_info info = - cublas_algo_map_->getAlgo(batch_count, m, n, k, (Atype_ == CUDA_R_16F) ? HALF_DATATYPE : FLOAT_DATATYPE); + cublasLtMatmulAlgo_info info = cublas_algo_map_->getAlgo(batch_count, m, n, k, getCublasDataType(Atype_)); check_cuda_error(cublasGemmBatchedEx(cublas_handle_, transa, @@ -485,7 +593,7 @@ void cublasMMWrapper::batchedGemm(cublasOperation_t transa, bool cublasMMWrapper::isFuseBatchGemm(const int batch_count, const int m, const int k, const int n) { - CublasDataType data_type = Atype_ == CUDA_R_16F ? HALF_DATATYPE : FLOAT_DATATYPE; + CublasDataType data_type = getCublasDataType(Atype_); if (cublas_algo_map_->isExist(batch_count, m, k, n, data_type) == false || cublas_algo_map_->isExist(1, m, k, n, data_type) == false) { @@ -603,7 +711,8 @@ void cublasMMWrapper::SpGemm(cublasOperation_t transa, mu_->unlock(); } -size_t cublasMMWrapper::getSparseMatrixSize(int m, int k) { +size_t cublasMMWrapper::getSparseMatrixSize(int m, int k) +{ // Get a compressed matrix size of shape (m, k) used in cusparselt. auto Atype_ = CUDA_R_16F; cusparseOrder_t order = CUSPARSE_ORDER_COL; @@ -623,9 +732,7 @@ size_t cublasMMWrapper::getSparseMatrixSize(int m, int k) { order, CUSPARSELT_SPARSITY_50_PERCENT)); size_t compressed_size = 0; - CHECK_CUSPARSE(cusparseLtSpMMACompressedSize2(&cusparselt_handle_, - &matA, - &compressed_size)); + CHECK_CUSPARSE(cusparseLtSpMMACompressedSize2(&cusparselt_handle_, &matA, &compressed_size)); return compressed_size; } diff --git a/src/fastertransformer/utils/cublasMMWrapper.h b/src/fastertransformer/utils/cublasMMWrapper.h index 07c48163e..6f410ab3f 100644 --- a/src/fastertransformer/utils/cublasMMWrapper.h +++ b/src/fastertransformer/utils/cublasMMWrapper.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -121,9 +121,30 @@ class cublasMMWrapper { void setFP32GemmConfig(); void setFP16GemmConfig(); +#ifdef ENABLE_BF16 + void setBF16GemmConfig(); +#endif + void setStream(cudaStream_t stream); void setGemmConfig(cudaDataType_t aType, cudaDataType_t bType, cudaDataType_t cType, cudaDataType_t computeType); + CublasDataType getCublasDataType(cudaDataType_t data_type); + +#if (CUDART_VERSION >= 11000) + void Gemm(cublasOperation_t transa, + cublasOperation_t transb, + const int m, + const int n, + const int k, + const void* A, + const int lda, + const void* B, + const int ldb, + const void* bias, + void* C, + const int ldc); +#endif + void stridedBatchedGemm(cublasOperation_t transa, cublasOperation_t transb, const int m, diff --git a/src/fastertransformer/utils/cuda_bf16_wrapper.h b/src/fastertransformer/utils/cuda_bf16_wrapper.h new file mode 100644 index 000000000..33456b26c --- /dev/null +++ b/src/fastertransformer/utils/cuda_bf16_wrapper.h @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#ifdef ENABLE_BF16 +#include +#endif \ No newline at end of file diff --git a/src/fastertransformer/utils/cuda_utils.h b/src/fastertransformer/utils/cuda_utils.h index 82055269a..5d73c87c5 100644 --- a/src/fastertransformer/utils/cuda_utils.h +++ b/src/fastertransformer/utils/cuda_utils.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,13 +16,17 @@ #pragma once +#include "3rdparty/INIReader.h" +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" +#include "src/fastertransformer/utils/logger.h" + #include #include #include -#include #include #include #include +#include #ifdef SPARSITY_ENABLED #include #endif @@ -34,19 +38,29 @@ namespace fastertransformer { // workspace for cublas gemm : 32MB #define CUBLAS_WORKSPACE_SIZE 33554432 +typedef struct half4 { + half x, y, z, w; +} half4; + /* **************************** type definition ***************************** */ -enum CublasDataType -{ +enum CublasDataType { FLOAT_DATATYPE = 0, HALF_DATATYPE = 1, - INT8_DATATYPE = 2 + BFLOAT16_DATATYPE = 2, + INT8_DATATYPE = 3 }; -enum class OperationType -{ +enum FtCudaDataType { + FP32 = 0, + FP16 = 1, + BF16 = 2 +}; + +enum class OperationType { FP32, - FP16 + FP16, + BF16 }; /* **************************** debug tools ********************************* */ @@ -117,6 +131,16 @@ inline void syncAndCheck(const char* const file, int const line) #define sync_check_cuda_error() syncAndCheck(__FILE__, __LINE__) +#define checkCUDNN(expression) \ + { \ + cudnnStatus_t status = (expression); \ + if (status != CUDNN_STATUS_SUCCESS) { \ + std::cerr << "Error on file " << __FILE__ << " line " << __LINE__ << ": " << cudnnGetErrorString(status) \ + << std::endl; \ + std::exit(EXIT_FAILURE); \ + } \ + } + template void print_to_file(const T* result, const int size, const char* file) { @@ -128,10 +152,12 @@ void print_to_file(const T* result, const int size, const char* file) check_cuda_error(cudaMemcpy(tmp, result, sizeof(T) * size, cudaMemcpyDeviceToHost)); for (int i = 0; i < size; ++i) { float val; - if (sizeof(T) == 2) + if (sizeof(T) == 2) { val = (T)__half2float(tmp[i]); - else + } + else { val = (T)tmp[i]; + } fprintf(fd, "%f\n", val); } free(tmp); @@ -156,10 +182,12 @@ void print_to_file(const T* result, check_cuda_error(cudaMemcpyAsync(tmp, result, sizeof(T) * size, cudaMemcpyDeviceToHost, stream)); for (int i = 0; i < size; ++i) { float val; - if (sizeof(T) == 2) + if (sizeof(T) == 2) { val = (T)__half2float(tmp[i]); - else + } + else { val = (T)tmp[i]; + } outFile << val << std::endl; } delete[] tmp; @@ -187,16 +215,27 @@ void print_abs_mean(const T* buf, uint size, cudaStream_t stream, std::string na double sum = 0.0f; uint64_t zero_count = 0; float max_val = -1e10; + bool find_inf = false; for (uint i = 0; i < size; i++) { + if (std::isinf(h_tmp[i])) { + find_inf = true; + continue; + } sum += abs((double)h_tmp[i]); if ((float)h_tmp[i] == 0.0f) { - zero_count ++; + zero_count++; } max_val = max_val > abs(float(h_tmp[i])) ? max_val : abs(float(h_tmp[i])); } - printf("[INFO][FT] %s size: %u, abs mean: %f, abs sum: %f, abs max: %f", name.c_str(), size, sum / size, sum, max_val); + printf("[INFO][FT] %20s size: %u, abs mean: %f, abs sum: %f, abs max: %f, find inf: %s", + name.c_str(), + size, + sum / size, + sum, + max_val, + find_inf ? "true" : "false"); std::cout << std::endl; - delete [] h_tmp; + delete[] h_tmp; cudaDeviceSynchronize(); check_cuda_error(cudaGetLastError()); } @@ -205,7 +244,7 @@ template void print_to_screen(const T* result, const int size) { if (result == nullptr) { - printf("[WARNING] It is an nullptr, skip!"); + printf("[WARNING] It is an nullptr, skip! \n"); return; } T* tmp = reinterpret_cast(malloc(sizeof(T) * size)); @@ -216,6 +255,43 @@ void print_to_screen(const T* result, const int size) free(tmp); } +template +static inline void printMatrix(T* ptr, int m, int k, int stride, bool is_device_ptr) +{ + T* tmp; + if (is_device_ptr) { + // k < stride ; stride = col-dimension. + tmp = reinterpret_cast(malloc(m * stride * sizeof(T))); + check_cuda_error(cudaMemcpy(tmp, ptr, sizeof(T) * m * stride, cudaMemcpyDeviceToHost)); + cudaDeviceSynchronize(); + } + else { + tmp = ptr; + } + + for (int ii = -1; ii < m; ++ii) { + if (ii >= 0) { + printf("%02d ", ii); + } + else { + printf(" "); + } + + for (int jj = 0; jj < k; jj += 1) { + if (ii >= 0) { + printf("%7.3f ", (float)tmp[ii * stride + jj]); + } + else { + printf("%7d ", jj); + } + } + printf("\n"); + } + if (is_device_ptr) { + free(tmp); + } +} + template void check_max_val(const T* result, const int size) { @@ -224,8 +300,9 @@ void check_max_val(const T* result, const int size) float max_val = -100000; for (int i = 0; i < size; i++) { float val = static_cast(tmp[i]); - if (val > max_val) + if (val > max_val) { max_val = val; + } } delete tmp; printf("[INFO][CUDA] addr %p max val: %f \n", result, max_val); @@ -249,25 +326,27 @@ void check_abs_mean_val(const T* result, const int size) std::cout << "[FT][CALL] " << __FUNCTION__ << " " << std::endl; \ } while (0) -inline void myAssert(bool result, const char* const file, int const line) +inline void myAssert(bool result, const char* const file, int const line, std::string info = "") { if (result != true) { - throw std::runtime_error(std::string("[FT][ERROR] Assertion fail: ") + +file + ":" + std::to_string(line) - + " \n"); + throw std::runtime_error(std::string("[FT][ERROR] ") + info + std::string(" Assertion fail: ") + file + ":" + + std::to_string(line) + " \n"); } } #define FT_CHECK(val) myAssert(val, __FILE__, __LINE__) +#define FT_CHECK_WITH_INFO(val, info) myAssert(val, __FILE__, __LINE__, info) #ifdef SPARSITY_ENABLED -#define CHECK_CUSPARSE(func) \ -{ \ - cusparseStatus_t status = (func); \ - if (status != CUSPARSE_STATUS_SUCCESS) { \ - throw std::runtime_error(std::string("[FT][ERROR] CUSPARSE API failed at line ") + std::to_string(__LINE__) + \ - " in file " + __FILE__ + ": " + cusparseGetErrorString(status) + " " + std::to_string(status)); \ - } \ -} +#define CHECK_CUSPARSE(func) \ + { \ + cusparseStatus_t status = (func); \ + if (status != CUSPARSE_STATUS_SUCCESS) { \ + throw std::runtime_error(std::string("[FT][ERROR] CUSPARSE API failed at line ") \ + + std::to_string(__LINE__) + " in file " + __FILE__ + ": " \ + + cusparseGetErrorString(status) + " " + std::to_string(status)); \ + } \ + } #endif /*************Time Handling**************/ @@ -347,8 +426,9 @@ inline cudaError_t getSetDevice(int i_device, int* o_device = NULL) if (o_device != NULL) { err = cudaGetDevice(¤t_dev_id); - if (err != cudaSuccess) + if (err != cudaSuccess) { return err; + } if (current_dev_id == i_device) { *o_device = i_device; } @@ -384,5 +464,89 @@ inline int getDeviceCount() return count; } +template +CublasDataType getCublasDataType() +{ + if (std::is_same::value) { + return HALF_DATATYPE; + } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + return BFLOAT16_DATATYPE; + } +#endif + else if (std::is_same::value) { + return FLOAT_DATATYPE; + } + else { + FT_CHECK(false); + return FLOAT_DATATYPE; + } +} + +template +cudaDataType_t getCudaDataType() +{ + if (std::is_same::value) { + return CUDA_R_16F; + } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + return CUDA_R_16BF; + } +#endif + else if (std::is_same::value) { + return CUDA_R_32F; + } + else { + FT_CHECK(false); + return CUDA_R_32F; + } +} + +template +struct getTypeFromCudaDataType { + using Type = float; +}; + +template<> +struct getTypeFromCudaDataType { + using Type = half; +}; + +#ifdef ENABLE_BF16 +template<> +struct getTypeFromCudaDataType { + using Type = __nv_bfloat16; +}; +#endif + +inline FtCudaDataType getModelFileType(std::string ini_file, std::string section_name) +{ + FtCudaDataType model_file_type; + INIReader reader = INIReader(ini_file); + if (reader.ParseError() < 0) { + FT_LOG_WARNING("Can't load %s. Use FP32 as default", ini_file.c_str()); + model_file_type = FtCudaDataType::FP32; + } + else { + std::string weight_data_type_str = std::string(reader.Get(section_name, "weight_data_type")); + if (weight_data_type_str.find("fp32") != std::string::npos) { + model_file_type = FtCudaDataType::FP32; + } + else if (weight_data_type_str.find("fp16") != std::string::npos) { + model_file_type = FtCudaDataType::FP16; + } + else if (weight_data_type_str.find("bf16") != std::string::npos) { + model_file_type = FtCudaDataType::BF16; + } + else { + FT_LOG_WARNING("Invalid type %s. Use FP32 as default", weight_data_type_str.c_str()); + model_file_type = FtCudaDataType::FP32; + } + } + return model_file_type; +} + /* ************************** end of common utils ************************** */ } // namespace fastertransformer diff --git a/src/fastertransformer/utils/custom_ar_comm.cc b/src/fastertransformer/utils/custom_ar_comm.cc new file mode 100644 index 000000000..ded1e58c8 --- /dev/null +++ b/src/fastertransformer/utils/custom_ar_comm.cc @@ -0,0 +1,179 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "custom_ar_comm.h" + +namespace fastertransformer { + +template +CustomAllReduceComm::CustomAllReduceComm(size_t rank_size, size_t rank): rank_size_(rank_size), rank_(rank) +{ + param_.barrier_flag = 0; + // NOTE: assume All Reduce happens within the node (DGX A100) + param_.rank = rank_; + param_.local_rank = rank_; + param_.node_id = 0; +} + +template +CustomAllReduceComm::~CustomAllReduceComm() +{ + cudaPointerAttributes comm_buffer_attributes, barrier_attributes; + check_cuda_error(cudaPointerGetAttributes(&comm_buffer_attributes, param_.peer_comm_buffer_ptrs[rank_])); + check_cuda_error(cudaPointerGetAttributes(&barrier_attributes, param_.peer_barrier_ptrs[rank_])); + if (comm_buffer_attributes.type == 2) { + check_cuda_error(cudaFree(param_.peer_comm_buffer_ptrs[rank_])); + } + if (barrier_attributes.type == 2) { + check_cuda_error(cudaFree(param_.peer_barrier_ptrs[rank_])); + } +} + +template +void CustomAllReduceComm::customAllReduce(size_t elts, cudaStream_t stream) +{ + param_.elts_total = elts; + param_.barrier_flag = FLAG(param_.barrier_flag + 1); + + invokeOneOrTwoShotAllReduceKernel(param_, stream); + + // swap back + output_tensor_->at(0).data = (const void*)tmp_tensor_data_; +} + +template +void CustomAllReduceComm::allocateAndExchangePeerAccessPointer( + std::vector>* custom_all_reduce_comms) +{ + assert(custom_all_reduce_comms->size() == rank_size_); + assert(rank_ == 0); + // Enable Peer to Peer Access + enableP2P(rank_size_); + for (size_t i = 0; i < rank_size_; i++) { + check_cuda_error(cudaSetDevice(i)); + check_cuda_error(cudaMalloc(&(param_.peer_comm_buffer_ptrs[i]), CUSTOM_AR_SIZE_THRESHOLD)); + check_cuda_error( + cudaMalloc(&(param_.peer_barrier_ptrs[i]), rank_size_ * (MAX_ALL_REDUCE_BLOCKS + 1) * sizeof(uint32_t))); + check_cuda_error( + cudaMemset(param_.peer_barrier_ptrs[i], 0, rank_size_ * (MAX_ALL_REDUCE_BLOCKS + 1) * sizeof(uint32_t))); + T* current_peer_comm_buffer_ptr = param_.peer_comm_buffer_ptrs[i]; + uint32_t* current_peer_barrier_ptr = param_.peer_barrier_ptrs[i]; + // Assume current comm allocates device memory on all ranks (rank_ == 0) + for (size_t j = 1; j < rank_size_; j++) { + static_cast*>(custom_all_reduce_comms->at(j).get()) + ->param_.peer_comm_buffer_ptrs[i] = current_peer_comm_buffer_ptr; + static_cast*>(custom_all_reduce_comms->at(j).get())->param_.peer_barrier_ptrs[i] = + current_peer_barrier_ptr; + } + } + + // Set default local_output_buffer_ptr to local peer_comm_buffer_ptrs + for (size_t i = 0; i < rank_size_; i++) { + static_cast*>(custom_all_reduce_comms->at(i).get())->param_.local_output_buffer_ptr = + static_cast*>(custom_all_reduce_comms->at(i).get())->param_.peer_comm_buffer_ptrs[i]; + } +} + +template +void CustomAllReduceComm::enableP2P(int ngpus) +{ + int peer_access_available = 0; + for (int i = 0; i < ngpus; i++) { + cudaSetDevice(i); + for (int j = 0; j < ngpus; j++) { + if (i == j) { + continue; + } + cudaDeviceCanAccessPeer(&peer_access_available, i, j); + // Custom AR Kernels need DGX A100 NVSWITCH connections + assert(peer_access_available); + cudaDeviceEnablePeerAccess(j, 0); + } + } +} + +template +bool CustomAllReduceComm::swapInternalBuffer(std::vector* tensor_buffer, size_t elts) +{ + // Check if all reduce elts meet the requirement of custom kernels + // If meet, then swap the local comm buffer ptr with output tensor data pointer (avoid additional + // memory movement) + if (rank_size_ > 1 && elts * sizeof(T) <= CUSTOM_AR_SIZE_THRESHOLD) { + tmp_tensor_data_ = (T*)(tensor_buffer->at(0).data); + output_tensor_ = tensor_buffer; + tensor_buffer->at(0).data = param_.peer_comm_buffer_ptrs[rank_]; + param_.local_output_buffer_ptr = tmp_tensor_data_; + return true; + } + return false; +} + +template +void initCustomAllReduceComm(std::vector>* custom_all_reduce_comms, + int enable_custom_all_reduce, + size_t rank_size) +{ + if (custom_all_reduce_comms == 0) { + // don't use custom all reduce kernels, fall back to NCCL + for (size_t i = 0; i < rank_size; i++) { + custom_all_reduce_comms->push_back(nullptr); + } + return; + } + + if (rank_size != RANKS_PER_NODE) { + FT_LOG_WARNING("Custom All Reduce only supports 8 Ranks currently. Using NCCL as Comm."); + for (size_t i = 0; i < rank_size; i++) { + custom_all_reduce_comms->push_back(nullptr); + } + return; + } + +#if defined(CUDART_VERSION) && CUDART_VERSION >= 11020 + for (size_t i = 0; i < rank_size; i++) { + custom_all_reduce_comms->push_back(std::make_shared>(rank_size, i)); + } + custom_all_reduce_comms->at(0)->allocateAndExchangePeerAccessPointer(custom_all_reduce_comms); +#else + FT_LOG_WARNING("Custom All Reduce is not supported before CUDA 11.2. Using NCCL as Comm."); + for (size_t i = 0; i < rank_size; i++) { + custom_all_reduce_comms->push_back(nullptr); + } +#endif +} + +// Template instantiation +template class CustomAllReduceComm; +#ifdef ENABLE_BF16 +template class CustomAllReduceComm<__nv_bfloat16>; +#endif +template class CustomAllReduceComm; +template void +initCustomAllReduceComm(std::vector>* custom_all_reduce_comms, + int enable_custom_all_reduce, + size_t rank_size); +#ifdef ENABLE_BF16 +template void +initCustomAllReduceComm<__nv_bfloat16>(std::vector>* custom_all_reduce_comms, + int enable_custom_all_reduce, + size_t rank_size); +#endif +template void +initCustomAllReduceComm(std::vector>* custom_all_reduce_comms, + int enable_custom_all_reduce, + size_t rank_size); + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/utils/custom_ar_comm.h b/src/fastertransformer/utils/custom_ar_comm.h new file mode 100644 index 000000000..798211e09 --- /dev/null +++ b/src/fastertransformer/utils/custom_ar_comm.h @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include +#include +#include +#include + +#include "src/fastertransformer/kernels/custom_ar_kernels.h" +#include "src/fastertransformer/utils/Tensor.h" +#include "src/fastertransformer/utils/cuda_utils.h" +#include "src/fastertransformer/utils/logger.h" + +namespace fastertransformer { + +class AbstractCustomComm { +public: + AbstractCustomComm() = default; + virtual ~AbstractCustomComm() = default; + virtual void customAllReduce(size_t elts, cudaStream_t stream) = 0; + virtual void enableP2P(int ngpus) = 0; + virtual bool swapInternalBuffer(std::vector* tensor_buffer, size_t elts) = 0; + virtual void + allocateAndExchangePeerAccessPointer(std::vector>* custom_all_reduce_comms) = 0; +}; + +template +class CustomAllReduceComm: public AbstractCustomComm { +public: + CustomAllReduceComm(size_t rank_size, size_t rank); + ~CustomAllReduceComm(); + + void customAllReduce(size_t elts, cudaStream_t stream); + + void allocateAndExchangePeerAccessPointer( + std::vector>* custom_all_reduce_comms) override; + + bool swapInternalBuffer(std::vector* tensor_buffer, size_t elts) override; + + void enableP2P(int ngpus) override; + +private: + AllReduceParams param_; + std::vector* output_tensor_; + T* tmp_tensor_data_; + size_t rank_size_; + size_t rank_; +}; + +template +void initCustomAllReduceComm(std::vector>* custom_all_reduce_comms, + int enable_custom_all_reduce, + size_t rank_size); + +template +struct CustomARCommTypeConverter { + using Type = uint32_t; +}; + +template<> +struct CustomARCommTypeConverter { + using Type = uint16_t; +}; + +#ifdef ENABLE_BF16 +template<> +struct CustomARCommTypeConverter<__nv_bfloat16> { + using Type = __nv_bfloat16; +}; +#endif + +} // namespace fastertransformer \ No newline at end of file diff --git a/src/fastertransformer/utils/gemm.cc b/src/fastertransformer/utils/gemm.cc new file mode 100644 index 000000000..035d5b3a9 --- /dev/null +++ b/src/fastertransformer/utils/gemm.cc @@ -0,0 +1,1184 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/utils/gemm.h" + +namespace fastertransformer { + +/* ***************************** GEMM Impl ******************************** */ + +Gemm::Gemm(IAllocator* allocator, cudaStream_t stream, std::string config_file) +{ + allocator_ = allocator; + stream_ = stream; + mutex_ = new std::mutex(); // mutex per process + check_cuda_error(cublasCreate(&cublas_handle_)); + check_cuda_error(cublasLtCreate(&cublaslt_handle_)); + check_cuda_error(cublasSetStream(cublas_handle_, stream)); + + if (allocator_ != nullptr) { + workspace_ = allocator_->malloc(WORKSPACE_SIZE); + } + loadGemmConfig(config_file); +} + +Gemm::~Gemm() +{ + if (allocator_ != nullptr) { + allocator_->free(workspace_); + allocator_ = nullptr; + } + cublasLtDestroy(cublaslt_handle_); + cublasDestroy(cublas_handle_); + delete cublas_algo_map_; + delete mutex_; +} + +std::string Gemm::toString() +{ + const char* a_type_str = a_type_ == TYPE_FP16 ? "FP16" : "FP32"; + const char* b_type_str = b_type_ == TYPE_FP16 ? "FP16" : "FP32"; + const char* c_type_str = c_type_ == TYPE_FP16 ? "FP16" : "FP32"; + const char* compute_type_str = compute_type_ == TYPE_FP16 ? "FP16" : "FP32"; + return fmtstr( + "Gemm[a_type=%s, b_type=%s, c_type=%s, compute_type=%s]", a_type_str, b_type_str, c_type_str, compute_type_str); +} + +void Gemm::setAllocator(IAllocator* allocator) +{ + if (allocator_ != nullptr && workspace_ != nullptr) { + allocator_->free(workspace_); + } + allocator_ = allocator; + if (allocator_ != nullptr) { + workspace_ = allocator_->malloc(WORKSPACE_SIZE); + } +} + +void Gemm::setCudaStream(cudaStream_t& stream) +{ + stream_ = stream; + cublasSetStream(cublas_handle_, stream); +} + +void Gemm::setComputeType(DataType compute_type) +{ + checkDataTypeValidity(compute_type); + compute_type_ = compute_type; +} + +void Gemm::setTypes(DataType a_type, DataType b_type, DataType c_type, DataType compute_type) +{ + checkDataTypeValidity(a_type); + checkDataTypeValidity(b_type); + checkDataTypeValidity(c_type); + a_type_ = a_type; + b_type_ = b_type; + c_type_ = c_type; + setComputeType(compute_type); +} + +template +void Gemm::setDefaultTypes() +{ + if (std::is_same::value) { + setTypes(TYPE_FP32, TYPE_FP32, TYPE_FP32, TYPE_FP32); + } + else if (std::is_same::value) { + setTypes(TYPE_FP16, TYPE_FP16, TYPE_FP16, TYPE_FP16); + } + else { + throw GemmNotSupportedException("Gemm supports float or half type."); + } +} + +void Gemm::loadGemmConfig(std::string config_file) +{ + if (cublas_algo_map_ != nullptr) { + delete cublas_algo_map_; // unload the previous cublas map. + } + cublas_algo_map_ = new cublasAlgoMap(config_file); +} + +void Gemm::gemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* input, + const DenseWeight& weight, + void* output, + const float alpha, + const float beta) +{ + gemm(transa, + transb, + m, + n, + k, + input, + a_type_, + (transa == GEMM_OP_N) ? k : m, + (const void*)weight.kernel, + b_type_, + (transb == GEMM_OP_N) ? n : k, + output, + c_type_, + n, + alpha, + beta); +} + +void Gemm::gemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* input, + const DenseWeight& weight, + void* output, + const float alpha, + const float beta) +{ + gemm(transa, + transb, + m, + n, + k, + input, + a_type_, + (transa == GEMM_OP_N) ? k : m, + (const void*)weight.kernel, + b_type_, + (transb == GEMM_OP_N) ? n : k, + output, + c_type_, + n, + alpha, + beta); +} + +void Gemm::gemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* A, + const void* B, + void* C, + const float alpha, + const float beta) +{ + size_t lda = (transa == GEMM_OP_N) ? k : m; + size_t ldb = (transb == GEMM_OP_N) ? n : k; + size_t ldc = n; + gemm(transa, transb, m, n, k, A, a_type_, lda, B, b_type_, ldb, C, c_type_, ldc, alpha, beta); +} + +void Gemm::gemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* A, + const size_t lda, + const void* B, + const size_t ldb, + void* C, + const size_t ldc, + const float alpha, + const float beta) +{ + gemm(transa, transb, m, n, k, A, a_type_, lda, B, b_type_, ldb, C, c_type_, ldc, alpha, beta); +} + +void Gemm::gemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* A, + const DataType Atype, + const size_t lda, + const void* B, + const DataType Btype, + const size_t ldb, + void* C, + const DataType Ctype, + const size_t ldc, + const float alpha, + const float beta) +{ + FT_LOG_TRACE("Gemm::gemm [m=%ld, n=%ld, k=%ld, lda=%ld, ldb=%ld, ldc=%ld]", m, n, k, lda, ldb, ldc); + + // Implementation copied from cublasMMWrapper::Gemm + // Switch A and B since both cublas and cublasLt assume a column major layout, + // while A and B are both row major layout. + const void* a_data_ptr = B; + const void* b_data_ptr = A; + + cublasOperation_t a_op = getCublasOperation(transb); + cublasOperation_t b_op = getCublasOperation(transa); + + cudaDataType_t a_type = getCublasDataType(Btype); + cudaDataType_t b_type = getCublasDataType(Atype); + cudaDataType_t c_type = getCublasDataType(Ctype); + + // swap m and n + const size_t _m = n; + const size_t _n = m; + + // swap lda and ldb; + const size_t _lda = ldb; + const size_t _ldb = lda; + + mutex_->lock(); + // Use cublas as default in FP32 and cublasLt as default in FP16 + bool is_fp16_compute_type = compute_type_ == TYPE_FP16; + bool using_cublasLt = Atype == TYPE_FP16; + int batch_count = 1; + + half h_alpha = (half)alpha; + half h_beta = (half)beta; + const void* alpha_ptr = + is_fp16_compute_type ? reinterpret_cast(&h_alpha) : reinterpret_cast(&alpha); + const void* beta_ptr = + is_fp16_compute_type ? reinterpret_cast(&h_beta) : reinterpret_cast(&beta); + + // TODO: unify CUBLAS_DATA_TYPE and DataType. + int findAlgo = + cublas_algo_map_->isExist(batch_count, _m, _n, k, (a_type == CUDA_R_16F) ? HALF_DATATYPE : FLOAT_DATATYPE); + cublasLtMatmulAlgo_info info = + cublas_algo_map_->getAlgo(batch_count, _m, _n, k, (a_type == CUDA_R_16F) ? HALF_DATATYPE : FLOAT_DATATYPE); + if (findAlgo) { + using_cublasLt = (info.stages != -1); + } + + if (using_cublasLt) { + const size_t a_rows = (a_op == getCublasOperation(GEMM_OP_N)) ? _m : k; + const size_t a_cols = (a_op == getCublasOperation(GEMM_OP_N)) ? k : _m; + const size_t b_rows = (b_op == getCublasOperation(GEMM_OP_N)) ? k : _n; + const size_t b_cols = (b_op == getCublasOperation(GEMM_OP_N)) ? _n : k; + + cublasLtMatmulDesc_t matmul_desc = NULL; + cublasLtMatrixLayout_t a_desc = NULL, b_desc = NULL, c_desc = NULL; + cudaDataType_t scale_type = getCublasDataType(compute_type_); + auto compute_type = getCublasComputeType(compute_type_); + + // -------------------------------------- + // Create descriptors for the original matrices + cublasLtMatrixLayoutCreate(&a_desc, a_type, a_rows, a_cols, _lda); + cublasLtMatrixLayoutCreate(&b_desc, b_type, b_rows, b_cols, _ldb); + cublasLtMatrixLayoutCreate(&c_desc, c_type, _m, _n, ldc); +#if (CUDART_VERSION >= 11000) + cublasLtMatmulDescCreate(&matmul_desc, compute_type, scale_type); +#else + cublasLtMatmulDescCreate(&matmul_desc, compute_type); +#endif + + cublasLtMatmulDescSetAttribute(matmul_desc, CUBLASLT_MATMUL_DESC_TRANSA, &a_op, sizeof(cublasOperation_t)); + cublasLtMatmulDescSetAttribute(matmul_desc, CUBLASLT_MATMUL_DESC_TRANSB, &b_op, sizeof(cublasOperation_t)); + + cublasLtMatmulAlgo_t algo; + void* workspace = workspace_; + int workspace_size = workspace_ == nullptr ? 0 : CUBLAS_WORKSPACE_SIZE; + if (findAlgo) { + if (info.workspaceSize > workspace_size) { + findAlgo = 0; + } + else { + cublasLtMatmulAlgoInit( + cublaslt_handle_, compute_type, scale_type, a_type, b_type, c_type, c_type, info.algoId, &algo); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &(info.customOption), sizeof(info.customOption)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_TILE_ID, &(info.tile), sizeof(info.tile)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &(info.splitK_val), sizeof(info.splitK_val)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &(info.swizzle), sizeof(info.swizzle)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &(info.reductionScheme), sizeof(int)); +#if (CUDART_VERSION >= 11000) + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &(info.stages), sizeof(info.stages)); +#endif + } + } + + cublasLtMatmul(cublaslt_handle_, + matmul_desc, + alpha_ptr, + a_data_ptr, + a_desc, + b_data_ptr, + b_desc, + beta_ptr, + C, + c_desc, + C, + c_desc, + (findAlgo == 1 ? (&algo) : NULL), + workspace, + workspace_size, + stream_); + + cublasLtMatmulDescDestroy(matmul_desc); + cublasLtMatrixLayoutDestroy(a_desc); + cublasLtMatrixLayoutDestroy(b_desc); + cublasLtMatrixLayoutDestroy(c_desc); + sync_check_cuda_error(); + } + else { + cudaDataType_t compute_type = getCublasDataType(compute_type_); + int cublas_algo = info.algoId; + check_cuda_error(cublasGemmEx(cublas_handle_, + a_op, + b_op, + _m, + _n, + k, + alpha_ptr, + a_data_ptr, + a_type, + _lda, + b_data_ptr, + b_type, + _ldb, + beta_ptr, + C, + c_type, + ldc, + compute_type, + static_cast(cublas_algo))); + sync_check_cuda_error(); + } + mutex_->unlock(); +} + +void Gemm::batchedGemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* const* A, + const void* const* B, + void* const* C, + const size_t batch_size, + const float alpha, + const float beta) +{ + size_t lda = (transa == GEMM_OP_N) ? k : m; + size_t ldb = (transb == GEMM_OP_N) ? n : k; + size_t ldc = n; + batchedGemm(transa, transb, m, n, k, A, a_type_, lda, B, b_type_, ldb, C, c_type_, ldc, batch_size, alpha, beta); +} + +void Gemm::batchedGemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* const* A, + const size_t lda, + const void* const* B, + const size_t ldb, + void* const* C, + const size_t ldc, + const size_t batch_size, + const float alpha, + const float beta) +{ + batchedGemm(transa, transb, m, n, k, A, a_type_, lda, B, b_type_, ldb, C, c_type_, ldc, batch_size, alpha, beta); +} + +void Gemm::batchedGemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* const* A, + const DataType Atype, + const size_t lda, + const void* const* B, + const DataType Btype, + const size_t ldb, + void* const* C, + const DataType Ctype, + const size_t ldc, + const size_t batch_size, + const float alpha, + const float beta) +{ + FT_LOG_TRACE( + "Gemm::batchedGemm [b=%ld m=%ld, n=%ld, k=%ld, lda=%ld, ldb=%ld, ldc=%ld]", batch_size, m, n, k, lda, ldb, ldc); + + // Switch A and B. + const void* const* a_data_ptr = B; + const void* const* b_data_ptr = A; + + cublasOperation_t a_op = getCublasOperation(transb); + cublasOperation_t b_op = getCublasOperation(transa); + + cudaDataType_t a_type = getCublasDataType(Btype); + cudaDataType_t b_type = getCublasDataType(Atype); + cudaDataType_t c_type = getCublasDataType(Ctype); + + // swap m and n, lda and ldb + const size_t _m = n; + const size_t _n = m; + const size_t _lda = ldb; + const size_t _ldb = lda; + + half h_alpha = (half)alpha; + half h_beta = (half)beta; + + mutex_->lock(); + bool is_fp16_compute_type = compute_type_ == TYPE_FP16; + const void* alpha_ptr = + is_fp16_compute_type ? reinterpret_cast(&h_alpha) : reinterpret_cast(&alpha); + const void* beta_ptr = + is_fp16_compute_type ? reinterpret_cast(&h_beta) : reinterpret_cast(&beta); + cublasLtMatmulAlgo_info info = + cublas_algo_map_->getAlgo(batch_size, m, n, k, (a_type == CUDA_R_16F) ? HALF_DATATYPE : FLOAT_DATATYPE); + + check_cuda_error(cublasGemmBatchedEx(cublas_handle_, + a_op, + b_op, + _m, + _n, + k, + alpha_ptr, + a_data_ptr, + a_type, + _lda, + b_data_ptr, + b_type, + _ldb, + beta_ptr, + C, + c_type, + ldc, + batch_size, + getCublasComputeType(compute_type_), + static_cast(info.algoId))); + mutex_->unlock(); +} + +void Gemm::stridedBatchedGemm(GemmOp transa, + GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* A, + const void* B, + void* C, + const size_t batch_size, + const float alpha, + const float beta) +{ + size_t lda = (transa == GEMM_OP_N) ? k : m; + size_t ldb = (transb == GEMM_OP_N) ? n : k; + size_t ldc = n; + int64_t stridea = m * k; + int64_t strideb = k * n; + int64_t stridec = m * n; + + stridedBatchedGemm(transa, + transb, + m, + n, + k, + A, + a_type_, + lda, + stridea, + B, + b_type_, + ldb, + strideb, + C, + c_type_, + ldc, + stridec, + batch_size, + compute_type_, + alpha, + beta); +} + +void Gemm::stridedBatchedGemm(GemmOp transa, + GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* A, + const int64_t strideA, + const void* B, + const int64_t strideB, + void* C, + const int64_t strideC, + const size_t batch_size, + const float alpha, + const float beta) +{ + size_t lda = (transa == GEMM_OP_N) ? k : m; + size_t ldb = (transb == GEMM_OP_N) ? n : k; + size_t ldc = n; + stridedBatchedGemm(transa, + transb, + m, + n, + k, + A, + a_type_, + lda, + strideA, + B, + b_type_, + ldb, + strideB, + C, + c_type_, + ldc, + strideC, + batch_size, + compute_type_, + alpha, + beta); +} + +void Gemm::stridedBatchedGemm(GemmOp transa, + GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* A, + const size_t lda, + const int64_t strideA, + const void* B, + const size_t ldb, + const int64_t strideB, + void* C, + const size_t ldc, + const int64_t strideC, + const size_t batch_size, + const float alpha, + const float beta) +{ + stridedBatchedGemm(transa, + transb, + m, + n, + k, + A, + a_type_, + lda, + strideA, + B, + b_type_, + ldb, + strideB, + C, + c_type_, + ldc, + strideC, + batch_size, + compute_type_, + alpha, + beta); +} + +void Gemm::stridedBatchedGemm(GemmOp transa, + GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* A, + DataType Atype, + const size_t lda, + const int64_t strideA, + const void* B, + DataType Btype, + const size_t ldb, + const int64_t strideB, + void* C, + DataType Ctype, + const size_t ldc, + const int64_t strideC, + const size_t batch_size, + DataType compute_type, + const float alpha, + const float beta) +{ + FT_LOG_TRACE("Gemm::stridedBatchedGemm [b=%ld, m=%ld, n=%ld, k=%ld, lda=%ld, ldb=%ld, ldc=%ld]", + batch_size, + m, + n, + k, + lda, + ldb, + ldc); + + // Switch A and B. + const void* a_data_ptr = B; + const void* b_data_ptr = A; + + cublasOperation_t a_op = getCublasOperation(transb); + cublasOperation_t b_op = getCublasOperation(transa); + + cudaDataType_t a_type = getCublasDataType(Btype); + cudaDataType_t b_type = getCublasDataType(Atype); + cudaDataType_t c_type = getCublasDataType(Ctype); + + // swap m and n, lda and ldb, stride A and B + const size_t _m = n; + const size_t _n = m; + const size_t _lda = ldb; + const size_t _ldb = lda; + const int64_t _stridea = strideB; + const int64_t _strideb = strideA; + + half h_alpha = (half)alpha; + half h_beta = (half)beta; + + mutex_->lock(); + bool is_fp16_compute_type = compute_type_ == TYPE_FP16; + const void* alpha_ptr = + is_fp16_compute_type ? reinterpret_cast(&h_alpha) : reinterpret_cast(&alpha); + const void* beta_ptr = + is_fp16_compute_type ? reinterpret_cast(&h_beta) : reinterpret_cast(&beta); + cublasLtMatmulAlgo_info info = + cublas_algo_map_->getAlgo(batch_size, m, n, k, (a_type == CUDA_R_16F) ? HALF_DATATYPE : FLOAT_DATATYPE); + + check_cuda_error(cublasGemmStridedBatchedEx(cublas_handle_, + a_op, + b_op, + _m, + _n, + k, + alpha_ptr, + a_data_ptr, + a_type, + _lda, + _stridea, + b_data_ptr, + b_type, + _ldb, + _strideb, + beta_ptr, + C, + c_type, + ldc, + strideC, + batch_size, + getCublasComputeType(compute_type), + static_cast(info.algoId))); + mutex_->unlock(); +} + +void Gemm::checkDataTypeValidity(const DataType& type) +{ + if (type != TYPE_FP32 && type != TYPE_FP16) { + throw GemmNotSupportedException("Gemm supports TYPE_FP16 or TYPE_FP32"); + } +} + +/* ************************* End of GEMM Impl **************************** */ + +// void Int8Gemm::gemm(Tensor& C, +// const GemmOp transa, +// const GemmOp transb, +// const Tensor& A, +// const Tensor& B, +// const float alpha, +// const float beta) +// { + +// } + +/* ************************* SpGEMM Impl *********************************** */ +#ifdef SPARSITY_ENABLED +SpGemm::SpGemm(IAllocator* allocator, cudaStream_t stream, std::string config_file, std::string spconfig_file): + Gemm(allocator, stream, config_file) +{ + CHECK_CUSPARSE(cusparseLtInit(&cusparselt_handle_)); + // TODO(jaedeokk): + // Let's make cublasAlgoMap load gemm/spgemm config separtely, + // allowing us to inherit Gemm's constructor. + // cublas_algo_map_.loadSpGemmConfig(spconfig_file); // enable this line later. + + a_type_ = TYPE_FP16; + b_type_ = TYPE_FP16; + c_type_ = TYPE_FP16; + compute_type_ = TYPE_FP16; +} + +SpGemm::~SpGemm() +{ + cusparseLtDestroy(&cusparselt_handle_); + // Need to destroy matmul description cache. + for (auto& kv : a_desc_map_) { // kv = (mark, a_desc) + cusparseLtMatDescriptorDestroy(&a_desc_map_[kv.first]); + } + for (auto& kv : b_desc_map_) { // kv = (mark, b_desc) + cusparseLtMatDescriptorDestroy(&b_desc_map_[kv.first]); + } + for (auto& kv : c_desc_map_) { // kv = (mark, c_desc) + cusparseLtMatDescriptorDestroy(&c_desc_map_[kv.first]); + } +} + +std::string SpGemm::toString() +{ + const char* a_type_str = a_type_ == TYPE_FP16 ? "FP16" : "FP32"; + const char* b_type_str = b_type_ == TYPE_FP16 ? "FP16" : "FP32"; + const char* c_type_str = c_type_ == TYPE_FP16 ? "FP16" : "FP32"; + const char* compute_type_str = compute_type_ == TYPE_FP16 ? "FP16" : "FP32"; + return fmtstr("SpGemm[a_type=%s, b_type=%s, c_type=%s, compute_type=%s]", + a_type_str, + b_type_str, + c_type_str, + compute_type_str); +} + +void SpGemm::loadGemmConfig(std::string config_file, std::string spconfig_file) +{ + if (cublas_algo_map_ != nullptr) { + delete cublas_algo_map_; // unload algo map. + } + cublas_algo_map_ = new cublasAlgoMap(config_file, spconfig_file); +} + +void SpGemm::checkDataTypeValidity(const DataType& type) +{ + if (type != TYPE_FP16) { + throw GemmNotSupportedException("Sparse GEMM only supports FP16 data type now."); + } +} + +bool SpGemm::useBaseGemm(size_t batch_size, size_t m, size_t n, size_t k) +{ + return !cublas_algo_map_->isUseSparse(batch_size, m, n, k); +} + +// Temporal gemm helper mtehod to use template T. +template +void SpGemm::weightGemmHelper(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* input, + const DenseWeight& weight, + void* output, + const float alpha, + const float beta) +{ + size_t lda = (transa == GEMM_OP_N) ? k : m; + size_t ldb = (transb == GEMM_OP_N) ? n : k; + size_t ldc = n; + if (useBaseGemm(1, m, n, k) || weight.sp_kernel == nullptr) { + Gemm::gemm(transa, + transb, + m, + n, + k, + input, + a_type_, + lda, + (const void*)weight.kernel, + b_type_, + ldb, + output, + c_type_, + ldc, + alpha, + beta); + } + else { + gemm(transa, + transb, + m, + n, + k, + input, + a_type_, + lda, + (const void*)weight.sp_kernel, + b_type_, + ldb, + output, + c_type_, + ldc, + alpha, + beta); + } +} + +void SpGemm::gemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* input, + const DenseWeight& weight, + void* output, + const float alpha, + const float beta) +{ + weightGemmHelper(transa, transb, m, n, k, input, weight, output, alpha, beta); +} +void SpGemm::gemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* input, + const DenseWeight& weight, + void* output, + const float alpha, + const float beta) +{ + weightGemmHelper(transa, transb, m, n, k, input, weight, output, alpha, beta); +} + +void SpGemm::gemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* A, + const DataType Atype, + const size_t lda, + const void* B, + const DataType Btype, + const size_t ldb, + void* C, + const DataType Ctype, + const size_t ldc, + const float alpha, + const float beta) +{ + FT_LOG_TRACE("SpGemm::gemm [m=%ld, n=%ld, k=%ld, lda=%ld, ldb=%ld, ldc=%ld]", m, n, k, lda, ldb, ldc); + checkDataTypeValidity(Atype); + checkDataTypeValidity(Btype); + checkDataTypeValidity(Ctype); + checkDataTypeValidity(compute_type_); + + if (useBaseGemm(1, m, n, k)) { + // Compute by the base GEMM. + Gemm::gemm(transa, transb, m, n, k, A, Atype, lda, B, Btype, ldb, C, Ctype, ldc, alpha, beta); + return; + } + + // Switch A/B due to column major layout in computation. + // Typical usecase of Gemm family is to compute Y = X * W where X is an + // input tensor and W is a kernel weight. Compression takes a lot time + // so only the kerenl weight (which is fixed in inference time) can be + // sparse. Using B as sparse seems not stable, unfortunately. + // (e.g. caching matrix descriptions is not correctly working.) + // Thus, SpGemm considers a column major layout in computation to make + // C^T = B^T * A^T, where a kernel weight "B" is located at the front. + const void* a_data = B; + const void* b_data = A; + + cusparseOrder_t order = CUSPARSE_ORDER_COL; + + cusparseOperation_t opA = getCusparseOperation(transb); + cusparseOperation_t opB = getCusparseOperation(transa); + + cudaDataType_t a_type = getCublasDataType(Btype); + cudaDataType_t b_type = getCublasDataType(Atype); + cudaDataType_t c_type = getCublasDataType(Ctype); + + const size_t _m = n; + const size_t _n = m; + const size_t _lda = ldb; + const size_t _ldb = lda; + + const size_t a_rows = (opA == CUSPARSE_OPERATION_NON_TRANSPOSE) ? _m : k; + const size_t a_cols = (opA == CUSPARSE_OPERATION_NON_TRANSPOSE) ? k : _m; + const size_t b_rows = (opB == CUSPARSE_OPERATION_NON_TRANSPOSE) ? k : _n; + const size_t b_cols = (opB == CUSPARSE_OPERATION_NON_TRANSPOSE) ? _n : k; + const size_t c_rows = _m; + const size_t c_cols = _n; + + const unsigned alignment = 16; + cusparseComputeType compute_type = getCusparseComputeType(compute_type_); + + cusparseLtMatmulDescriptor_t matmul; + cusparseLtMatmulAlgSelection_t alg_sel; + cusparseLtMatmulPlan_t plan; + + char mark[256]; + sprintf(mark, "%d_%ld_%ld_%ld_%s_%s", 1, m, n, k, getGemmOpString(transb).c_str(), getGemmOpString(transa).c_str()); + if (a_desc_map_.find(mark) != a_desc_map_.end()) { + CHECK_CUSPARSE(cusparseLtMatmulDescriptorInit(&cusparselt_handle_, + &matmul, + opA, + opB, + &a_desc_map_[mark], + &b_desc_map_[mark], + &c_desc_map_[mark], + &c_desc_map_[mark], + compute_type)); + } + else { + // initializing MatDesc takes a lot of time + cusparseLtMatDescriptor_t a_desc, b_desc, c_desc; + a_desc_map_[mark] = a_desc; + b_desc_map_[mark] = b_desc; + c_desc_map_[mark] = c_desc; + CHECK_CUSPARSE(cusparseLtStructuredDescriptorInit(&cusparselt_handle_, + &a_desc_map_[mark], + a_rows, + a_cols, + _lda, + alignment, + a_type, + order, + CUSPARSELT_SPARSITY_50_PERCENT)); + CHECK_CUSPARSE(cusparseLtDenseDescriptorInit( + &cusparselt_handle_, &b_desc_map_[mark], b_rows, b_cols, _ldb, alignment, b_type, order)); + CHECK_CUSPARSE(cusparseLtDenseDescriptorInit( + &cusparselt_handle_, &c_desc_map_[mark], c_rows, c_cols, ldc, alignment, c_type, order)); + CHECK_CUSPARSE(cusparseLtMatmulDescriptorInit(&cusparselt_handle_, + &matmul, + opA, + opB, + &a_desc_map_[mark], + &b_desc_map_[mark], + &c_desc_map_[mark], + &c_desc_map_[mark], + compute_type)); + } + + mutex_->lock(); + CHECK_CUSPARSE( + cusparseLtMatmulAlgSelectionInit(&cusparselt_handle_, &alg_sel, &matmul, CUSPARSELT_MATMUL_ALG_DEFAULT)); + int alg = cublas_algo_map_->getSpAlgo(1, a_rows, b_cols, a_cols); + CHECK_CUSPARSE(cusparseLtMatmulAlgSetAttribute( + &cusparselt_handle_, &alg_sel, CUSPARSELT_MATMUL_ALG_CONFIG_ID, &alg, sizeof(alg))); + size_t workspace_size; + CHECK_CUSPARSE(cusparseLtMatmulGetWorkspace(&cusparselt_handle_, &alg_sel, &workspace_size)); + CHECK_CUSPARSE(cusparseLtMatmulPlanInit(&cusparselt_handle_, &plan, &matmul, &alg_sel, workspace_size)); + + void* d_workspace = nullptr; // Can we use the workspace of the class? + int num_streams = 1; + cudaStream_t streams[1] = {stream_}; + CHECK_CUSPARSE(cusparseLtMatmul( + &cusparselt_handle_, &plan, &alpha, a_data, b_data, &beta, C, C, d_workspace, streams, num_streams)) + CHECK_CUSPARSE(cusparseLtMatmulPlanDestroy(&plan)) + mutex_->unlock(); + sync_check_cuda_error(); +} +#endif + +/* ************************* End of SpGEMM Impl ************************** */ + +/* ***************************** GEMM utils ****************************** */ + +std::shared_ptr createGemm(IAllocator* allocator, cudaStream_t stream, bool sparse, bool quantized) +{ + FT_LOG_TRACE( + "Create Gemm instance [sparse=%s, quantized=%s]", sparse ? "true" : "false", quantized ? "true" : "false"); + std::shared_ptr gemm; + if (!sparse) { + if (!quantized) { + gemm = std::make_shared(allocator, stream); + } + else { + throw GemmNotSupportedException("Int8 Gemm is not supported yet"); + } + } + else { +#ifdef SPARSITY_ENABLED + if (sparse && !quantized) { + gemm = std::make_shared(allocator, stream); + } + else { + throw GemmNotSupportedException("Int8 Sparse Gemm is not supported yet"); + } +#else + throw GemmNotSupportedException("Sparsity support is not enabled. To enabled sparisty, " + "please provide `-DSPARSITY_SUPPORT` flag for compliation."); +#endif + } + return gemm; +} + +cudaDataType_t getCublasDataType(DataType dtype) +{ + switch (dtype) { + case TYPE_FP16: + return CUDA_R_16F; + case TYPE_FP32: + return CUDA_R_32F; + default: + throw GemmNotSupportedException("Not supported data type."); + } +} + +#if (CUDART_VERSION >= 11000) +cublasComputeType_t getCublasComputeType(DataType ctype) +{ + switch (ctype) { + case TYPE_FP16: + return CUBLAS_COMPUTE_16F; + case TYPE_FP32: + return CUBLAS_COMPUTE_32F; + default: + throw GemmNotSupportedException("Not supported cublas compute type."); + } +} +#else +cudaDataType_t getCublasComputeType(DataType ctype) +{ + switch (ctype) { + case TYPE_FP16: + return CUDA_R_16F; + case TYPE_FP32: + return CUDA_R_32F; + default: + throw GemmNotSupportedException("Not supported cublas compute type."); + } +} +#endif + +cublasOperation_t getCublasOperation(GemmOp op) +{ + switch (op) { + case GEMM_OP_N: + return CUBLAS_OP_N; + case GEMM_OP_T: + return CUBLAS_OP_T; + default: + throw GemmNotSupportedException("Unknown GemmOp provided."); + } +} + +std::string getGemmOpString(const GemmOp& op) +{ + switch (op) { + case GEMM_OP_T: + return "T"; + case GEMM_OP_N: + return "N"; + } + throw GemmNotSupportedException("Unknown GemmOp provided."); +} + +#ifdef SPARSITY_ENABLED +cusparseOperation_t getCusparseOperation(GemmOp op) +{ + switch (op) { + case GEMM_OP_N: + return CUSPARSE_OPERATION_NON_TRANSPOSE; + case GEMM_OP_T: + return CUSPARSE_OPERATION_TRANSPOSE; + default: + throw GemmNotSupportedException("Unknown GemmOp provided."); + } +} + +cusparseComputeType getCusparseComputeType(DataType ctype) +{ + if (ctype != TYPE_FP16) { + throw GemmNotSupportedException("Sparse GEMM supports TYPE_FP16 compute type only."); + } + return CUSPARSE_COMPUTE_16F; +} + +void pruneMatrixB(void* data, const cudaStream_t& stream, const size_t k, const size_t n, const GemmOp trans) +{ + FT_LOG_TRACE("Prune matrix B [k=%ld, n=%ld, op=%s]", k, n, getGemmOpString(trans).c_str()); + + // Due to A/B switching, the matrix B will be used as a matrix A. + const cusparseOrder_t order = CUSPARSE_ORDER_COL; + const size_t rows = (trans == GEMM_OP_N) ? n : k; + const size_t cols = (trans == GEMM_OP_N) ? k : n; + const size_t ld = rows; + const unsigned alignment = 16; + + const cusparseLtPruneAlg_t prune_alg = CUSPARSELT_PRUNE_SPMMA_STRIP; + const cusparseOperation_t op = getCusparseOperation(trans); + const cudaDataType_t dtype = CUDA_R_16F; // fixed under cusparselt == 0.2.0. + + // 0: B is sparse, 1: A is sparse + // B matrix will be used as A matrix at the SpGemm::gemm. + const int is_sparse_a = 1; + + // TODO: Let the resource manager handle GPU-related resources later. + cusparseLtHandle_t handle; + CHECK_CUSPARSE(cusparseLtInit(&handle)); + cusparseLtMatDescriptor_t mat_desc; + CHECK_CUSPARSE(cusparseLtStructuredDescriptorInit( + &handle, &mat_desc, rows, cols, ld, alignment, dtype, order, CUSPARSELT_SPARSITY_50_PERCENT)); + CHECK_CUSPARSE(cusparseLtSpMMAPrune2(&handle, &mat_desc, is_sparse_a, op, data, data, prune_alg, stream)); + CHECK_CUSPARSE(cusparseLtMatDescriptorDestroy(&mat_desc)); + CHECK_CUSPARSE(cusparseLtDestroy(&handle)); +} + +size_t compressMatrixB(void** output, + IAllocator& allocator, + const cudaStream_t& stream, + const void* input, + const size_t k, + const size_t n, + const GemmOp trans) +{ + FT_LOG_TRACE("compressMatrix [k=%ld, n=%ld, dtype=FP16]", k, n); + + // swap A/B due to column/row major layout mismatch. + cusparseOrder_t order = CUSPARSE_ORDER_COL; + const size_t rows = (trans == GEMM_OP_N) ? n : k; + const size_t cols = (trans == GEMM_OP_N) ? k : n; + const size_t ld = rows; + + cudaDataType_t dtype = CUDA_R_16F; // fixed under cusparselt == 0.2.0. + cusparseLtSparsity_t sparsity = CUSPARSELT_SPARSITY_50_PERCENT; + cusparseOperation_t op = getCusparseOperation(trans); + cusparseLtMatDescriptor_t mat_desc; + const unsigned alignment = 16; + const int is_sparse_a = 1; // 0: B is sparse, 1: A is sparse + + cusparseLtHandle_t handle; + CHECK_CUSPARSE(cusparseLtInit(&handle)); + + CHECK_CUSPARSE( + cusparseLtStructuredDescriptorInit(&handle, &mat_desc, rows, cols, ld, alignment, dtype, order, sparsity)) + + size_t compressed_size = 0; + CHECK_CUSPARSE(cusparseLtSpMMACompressedSize2(&handle, &mat_desc, &compressed_size)); + if (compressed_size == 0) { + throw GemmInvalidException("Fail to compute correct compressed_size, got 0. This error may be " + "caused by a too small input matrix."); + } + + *output = allocator.malloc(compressed_size, false); + CHECK_CUSPARSE(cusparseLtSpMMACompress2(&handle, &mat_desc, is_sparse_a, op, input, *output, stream)) + + CHECK_CUSPARSE(cusparseLtMatDescriptorDestroy(&mat_desc)); + CHECK_CUSPARSE(cusparseLtDestroy(&handle)); + return compressed_size; +} + +#endif + +/* ************************* End of GEMM utils **************************** */ + +} // end of namespace fastertransformer diff --git a/src/fastertransformer/utils/gemm.h b/src/fastertransformer/utils/gemm.h new file mode 100644 index 000000000..ef2f49929 --- /dev/null +++ b/src/fastertransformer/utils/gemm.h @@ -0,0 +1,680 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include +#include +#include +#include +#include +#include +#include +#include + +// TODO: Need to remove the dependency of the layer module. +// e.g. refactor Weight class to some base module. +#include "src/fastertransformer/layers/DenseWeight.h" +#include "src/fastertransformer/utils/Tensor.h" +#include "src/fastertransformer/utils/allocator.h" +#include "src/fastertransformer/utils/cublasAlgoMap.h" +#include "src/fastertransformer/utils/cuda_utils.h" +#include "src/fastertransformer/utils/logger.h" +#include "src/fastertransformer/utils/memory_utils.h" + +#ifndef CUDART_VERSION +#error CUDART_VERSION Undefined! +#endif + +// cublas default workspace size: 32MB. Let me make this as a Gemm property. +#define WORKSPACE_SIZE 33554432 + +namespace fastertransformer { + +// A wrapper of cublas or cusparse matrix operator. +// - GEMM_OP_N = CUBLAS_OP_N or CUSPARSE_OP_N +// - GEMM_OP_T = CUBLAS_OP_T or CUSPARSE_OP_T +enum GemmOp { + GEMM_OP_N, + GEMM_OP_T +}; + +// A base class of the GEMM family. +// In the current version Gemm is as a base class as well as an interface. +class Gemm { + +public: + Gemm() = delete; // Disable a default constructor + /** + * A Gemm class. + * + * NOTE: + * A, B, C are assumed to have a row major layout, while a backend cuda libraries + * assumes a column major layout. However, a family of Gemm has already handled + * such discrepancy internally. Please use naively without a trick like switching + * inputs A and B that aligns the matrix layout. + * + * Restriction: Supported in/out data or compute types: TYPE_FP16, TYPE_FP32. + * + * TODO: + * Unify resource allocation/release from a singleton GPU resource managers. + * Thus, allocator, stream can be replaced by a resource handler later. + * E.g. Gemm(std::shared_ptr resource_manager), and + * stream_ = resource_manager.getCudaStream(); + * buffer = resource_manager.malloc(...); + * + * @param allocator Resource allocator. + * @param stream A CUDA stream. + * @param config_file A file path of a GEMM configuration. + */ + Gemm(IAllocator* allocator, cudaStream_t stream, std::string config_file = GEMM_CONFIG); + Gemm(Gemm const& other) = delete; + virtual ~Gemm(); + + virtual std::string toString(); + + /** + * @brief Set GEMM compute type. + * + * @param compute_type The data type of accumulation type inside GEMM computation. + * (Choices: TYPE_FP16, TYPE_FP32) + * + * @throw GemmNotSupportedException if a type is not TYPE_FP16 or TYPE_FP32. + * @throw std::runtime_error if any exception inside CUDA. + */ + void setComputeType(DataType compute_type); + + /** + * @brief Set matrix data types and compute precision. + * + * Supported data or compute types: TYPE_FP16, TYPE_FP32 + * + * @param a_type The data type of a matrix A. + * @param b_type The data type of a matrix B. + * @param c_type The data type of a matrix C. + * @param compute_type The data type of accumulation type inside GEMM computation. + * + * @throw GemmNotSupportedException if a type is not TYPE_FP16 or TYPE_FP32. + * @throw std::runtime_error if any exception inside CUDA. + */ + void setTypes(DataType a_type, DataType b_type, DataType c_type, DataType compute_type); + + /** + * @brief Set matrix data and compute types by default values. + * + * Default configs: + * - T=float : data type=TYPE_FP32, compute type=TYPE_FP32 + * - T=half : data type=TYPE_FP16, compute type=TYPE_FP32 + */ + template + void setDefaultTypes(); + + void loadGemmConfig(std::string config_file); + + void setAllocator(IAllocator* allocator); + void setCudaStream(cudaStream_t& stream); + + // Th APIs below are to see how the interface will change + // if it cooperates with Tensor. To enable it, we need to + // update the Tensor class. For instance, data is need to + // be of type (void*) rather than (const void*) to pass it + // as the output C of gemm. + // virtual void gemm(Tensor& C, + // const GemmOp transa, + // const GemmOp transb, + // const Tensor& A, + // const Tensor& B, + // const float alpha = 1.0f, + // const float beta = 0.0f); + // + // virtual void batchedMatmul(std::vector Carray, + // const GemmOp transa, + // const GemmOp transb, + // const std::vector Aarray, + // const std::vector Barray, + // const float alpha = 1.0f, + // const float beta = 0.0f); + // + // virtual void stridedBatchedGemm(Tensor& C, + // const GemmOp transa, + // const GemmOp transb, + // const Tensor& A, + // const Tensor& B, + // const float alpha = 1.0f, + // const float beta = 0.0f); + + // TODO: + // This function cooperates with a Weight object to simply Gemm calls + // inside layers, computing the following formula + // output(C) = input(A) * weight_kernel(B) + // where weight_kernel can be changed according to Gemm functions. + // DenseWeight is of a template struct, not allowing override the method. + // We temperally add an interface here for two cases float/half, + // but to finialze this function, we need an interface of a weight class + // which is not a template class. + virtual void gemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* input, + const DenseWeight& weight, + void* output, + const float alpha = 1.0f, + const float beta = 0.0f); + virtual void gemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* input, + const DenseWeight& weight, + void* output, + const float alpha = 1.0f, + const float beta = 0.0f); + + virtual void gemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* A, + const void* B, + void* C, + const float alpha = 1.0f, + const float beta = 0.0f); + + virtual void gemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* A, + const size_t lda, + const void* B, + const size_t ldb, + void* C, + const size_t ldc, + const float alpha = 1.0f, + const float beta = 0.0f); + /** + * @brief Compute the matrix multiplication `C = \alpha * op(A) * op(B) + \beta * C`. + * + * @param transa A transpose operation of a matrix A (GEMM_OP_N or GEMM_OP_T). + * @param transb A transpose operation of a matrix B (GEMM_OP_N or GEMM_OP_T). + * @param m A number of rows of a matrix op(A) and C. + * @param n A number of columns of a matrix op(B) or C. + * @param k A number of columns of op(A) and rows of op(B). + * @param A A device pointer of a matrix A of dimension (m x lda). + * @param Atype A data type of A (TYPE_FP16 or TYPE_FP32) + * @param lda A leading dimension of the matrix A. + * @param B A device pointer of a matrix B of dimension (k x ldb). + * @param Btype A data type of B (TYPE_FP16 or TYPE_FP32) + * @param ldb A leading dimension of the matrix B. + * @param C (Output) A device pointer of a matrix C of dimension (m x ldc). + * @param Ctype A data type of C (TYPE_FP16 or TYPE_FP32) + * @param ldc A leading dimension of the matrix C. + * @param alpha A scale factor for A*B (default: 1.0f). + * @param beta A scale factor for C (default: 0.0f). + * + * @throw GemmNotSupportedException if a type is not TYPE_FP16 or TYPE_FP32. + * @throw std::runtime_error if any exception inside CUDA. + */ + virtual void gemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* A, + const DataType Atype, + const size_t lda, + const void* B, + const DataType Btype, + const size_t ldb, + void* C, + const DataType Ctype, + const size_t ldc, + const float alpha = 1.0f, + const float beta = 0.0f); + + virtual void batchedGemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* const* A, + const void* const* B, + void* const* C, + const size_t batch_size, + const float alpha = 1.0f, + const float beta = 0.0f); + + virtual void batchedGemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* const* A, + const size_t lda, + const void* const* B, + const size_t ldb, + void* const* C, + const size_t ldc, + const size_t batch_size, + const float alpha = 1.0f, + const float beta = 0.0f); + + /** + * @brief Compute the matrix multiplication of batch of matrices As and Bs + * + * For input batch A[i]/B[i] and output batch C[i], i = 0, ..., batch_size - 1, + * `C[i] = \alpha * op(A[i]) * op(B[i]) + \beta * C[i]`. + * + * @param transa A transpose operation of a matrix A (GEMM_OP_N or GEMM_OP_T). + * @param transb A transpose operation of a matrix B (GEMM_OP_N or GEMM_OP_T). + * @param m A number of rows of a matrix op(A) and C. + * @param n A number of columns of a matrix op(B) or C. + * @param k A number of columns of op(A) and rows of op(B). + * @param A An array of device pointers of batch of input A matrices. + * @param Atype A data type of A (TYPE_FP16 or TYPE_FP32) + * @param lda A leading dimension of the matrix A. + * @param B An array of device pointers of batch of input B matrices. + * @param Btype A data type of B (TYPE_FP16 or TYPE_FP32) + * @param ldb A leading dimension of the matrix B. + * @param C (Output) An array of device pointers of batch of output C matrices. + * @param Ctype A data type of C (TYPE_FP16 or TYPE_FP32) + * @param ldc A leading dimension of the matrix C. + * @param alpha A scale factor for A*B (default: 1.0f). + * @param beta A scale factor for C (default: 0.0f). + * + * @throw GemmNotSupportedException if a type is not TYPE_FP16 or TYPE_FP32. + * @throw std::runtime_error if any exception inside CUDA. + */ + virtual void batchedGemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* const* A, + const DataType Atype, + const size_t lda, + const void* const* B, + const DataType Btype, + const size_t ldb, + void* const* C, + const DataType Ctype, + const size_t ldc, + const size_t batch_size, + const float alpha = 1.0f, + const float beta = 0.0f); + + virtual void stridedBatchedGemm(GemmOp transa, + GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* A, + const void* B, + void* C, + const size_t batch_size, + const float alpha = 1.0f, + const float beta = 0.0f); + + virtual void stridedBatchedGemm(GemmOp transa, + GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* A, + const int64_t strideA, + const void* B, + const int64_t strideB, + void* C, + const int64_t strideC, + const size_t batch_size, + const float alpha = 1.0f, + const float beta = 0.0f); + + virtual void stridedBatchedGemm(GemmOp transa, + GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* A, + const size_t lda, + const int64_t strideA, + const void* B, + const size_t ldb, + const int64_t strideB, + void* C, + const size_t ldc, + const int64_t strideC, + const size_t batch_size, + const float alpha = 1.0f, + const float beta = 0.0f); + /** + * @brief Compute the strided matrix multiplication of batch of matrices As and Bs + * + * For input batch A[i]/B[i] and output batch C[i], i = 0, ..., batch_size - 1, + * `C[i] = \alpha * op(A[i]) * op(B[i]) + \beta * C[i]`. + * + * @param transa A transpose operation of a matrix A (GEMM_OP_N or GEMM_OP_T). + * @param transb A transpose operation of a matrix B (GEMM_OP_N or GEMM_OP_T). + * @param m A number of rows of a matrix op(A) and C. + * @param n A number of columns of a matrix op(B) or C. + * @param k A number of columns of op(A) and rows of op(B). + * @param A An array of device pointers of batch of input A matrices. + * @param Atype A data type of A (TYPE_FP16 or TYPE_FP32) + * @param lda A leading dimension of the matrix A. + * @param strideA An offset in number of elements between matrix A[i] and A[i+1]. + * @param B An array of device pointers of batch of input B matrices. + * @param Btype A data type of B (TYPE_FP16 or TYPE_FP32) + * @param ldb A leading dimension of the matrix B. + * @param strideB An offset in number of elements between matrix B[i] and B[i+1]. + * @param C (Output) An array of device pointers of batch of output C matrices. + * @param Ctype A data type of C (TYPE_FP16 or TYPE_FP32) + * @param ldc A leading dimension of the matrix C. + * @param strideC An offset in number of elements between matrix C[i] and C[i+1]. + * @param compute_type An accumulation type of GEMM. + * @param alpha A scale factor for A*B (default: 1.0f). + * @param beta A scale factor for C (default: 0.0f). + * + * @throw GemmNotSupportedException if a type is not TYPE_FP16 or TYPE_FP32. + * @throw std::runtime_error if any exception inside CUDA. + */ + virtual void stridedBatchedGemm(GemmOp transa, + GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* A, + DataType Atype, + const size_t lda, + const int64_t strideA, + const void* B, + DataType Btype, + const size_t ldb, + const int64_t strideB, + void* C, + DataType Ctype, + const size_t ldc, + const int64_t strideC, + const size_t batch_size, + DataType compute_type, + const float alpha = 1.0f, + const float beta = 0.0f); + +protected: + IAllocator* allocator_ = nullptr; + cudaStream_t stream_; + std::mutex* mutex_ = nullptr; + cublasAlgoMap* cublas_algo_map_ = nullptr; + + cublasHandle_t cublas_handle_; + cublasLtHandle_t cublaslt_handle_; + void* workspace_ = nullptr; + + // use FP32 as default + DataType a_type_ = TYPE_FP32; + DataType b_type_ = TYPE_FP32; + DataType c_type_ = TYPE_FP32; + DataType compute_type_ = TYPE_FP32; + + // Check if data and inputs are valid in the Gemm class. + virtual void checkDataTypeValidity(const DataType& type); +}; + +// class Int8Gemm : public Gemm { + +// protected: +// bool use_ORDER_COL32_2R_4R4_; // what is this? +// }; + +#ifdef SPARSITY_ENABLED + +/** + * A Sparse Gemm class. + * + * NOTE: + * A, B, C are assumed to have a row major layout. + * There are two restrictions: + * - It supports the case when the matrix B is sparse. + * - Supported only TYPE_FP16 for in/out data or compute types. + */ +class SpGemm: public Gemm { + +protected: + cusparseLtHandle_t cusparselt_handle_; + std::map a_desc_map_; + std::map b_desc_map_; + std::map c_desc_map_; + bool useBaseGemm(size_t batch_size, size_t m, size_t n, size_t k); + +public: + using Gemm::setComputeType; + using Gemm::setTypes; + using Gemm::setDefaultTypes; + using Gemm::setAllocator; + using Gemm::setCudaStream; + using Gemm::gemm; + using Gemm::batchedGemm; + using Gemm::stridedBatchedGemm; + + /** + * @param allocator Resource allocator. + * @param stream A CUDA stream. + * @param config_file A file path of a GEMM configuration. + */ + // TODO: Let's unify algo map loading part. + SpGemm(IAllocator* allocator, + cudaStream_t stream, + std::string config_file = GEMM_CONFIG, + std::string spconfig_file = SPGEMM_CONFIG); + ~SpGemm(); + std::string toString() override; + void loadGemmConfig(std::string config_file, std::string spconfig_file); + + // Template method cannot be overrided. + void gemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* input, + const DenseWeight& weight, + void* output, + const float alpha = 1.0f, + const float beta = 0.0f) override; + void gemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* input, + const DenseWeight& weight, + void* output, + const float alpha = 1.0f, + const float beta = 0.0f) override; + + void gemm(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* A, + const DataType Atype, + const size_t lda, + const void* B, + const DataType Btype, + const size_t ldb, + void* C, + const DataType Ctype, + const size_t ldc, + const float alpha = 1.0f, + const float beta = 0.0f) override; + +private: + void checkDataTypeValidity(const DataType& type) override; + + // Temporal gemm helper mtehod to use template T. + template + void weightGemmHelper(const GemmOp transa, + const GemmOp transb, + const size_t m, + const size_t n, + const size_t k, + const void* input, + const DenseWeight& weight, + void* output, + const float alpha, + const float beta); +}; + +// class Int8SpGemm : public Int8Gemm, public SpGemm { + +// }; +#endif + +/* ***************************** GEMM Exceptions ******************************* */ + +class GemmInvalidShapeException: public std::exception { +private: + std::string msg_ = "Invalid matrix shapes."; + +public: + explicit GemmInvalidShapeException() = default; + + template + explicit GemmInvalidShapeException(const std::string format, const Args&... args): msg_(fmtstr(format, args...)) + { + } + + const char* what() const throw() + { + return msg_.c_str(); + } +}; + +class GemmNotSupportedException: public std::exception { +private: + std::string msg_ = "Not supported exception."; + +public: + explicit GemmNotSupportedException() = default; + + template + explicit GemmNotSupportedException(const std::string format, const Args&... args): msg_(fmtstr(format, args...)) + { + } + + const char* what() const throw() + { + return msg_.c_str(); + } +}; + +class GemmInvalidException: public std::exception { +private: + std::string msg_ = "Invalid use of gemm."; + +public: + explicit GemmInvalidException() = default; + + template + explicit GemmInvalidException(const std::string format, const Args&... args): msg_(fmtstr(format, args...)) + { + } + + const char* what() const throw() + { + return msg_.c_str(); + } +}; + +/* ************************ End of GEMM Exceptions ************************ */ + +/* ***************************** GEMM utils ******************************* */ + +/** + * @brief Create method for the Gemm family. + * + * @param allocator Resource allocator. + * @param stream A CUDA stream. + * @param sparse Whether to use sparse GEMM + * @param quantized Whether to use int8 quantized GEMM. + * @return A shared pointer of a GemmCls instance. + */ +std::shared_ptr +createGemm(IAllocator* allocator, cudaStream_t stream, bool sparse = false, bool quantized = false); + +cudaDataType_t getCublasDataType(DataType dtype); +#if (CUDART_VERSION >= 11000) +cublasComputeType_t getCublasComputeType(DataType dtype); +#else +cudaDataType_t getCublasComputeType(DataType dtype); +#endif +cublasOperation_t getCublasOperation(GemmOp op); +std::string getGemmOpString(const GemmOp& op); + +#ifdef SPARSITY_ENABLED +cusparseOperation_t getCusparseOperation(GemmOp op); +cusparseComputeType getCusparseComputeType(DataType dtype); + +/** + * @brief Prune a weight matrix (in-place). + * + * SpGemm supports a case when the sparse matrix is B in C=A*B. + * + * @param data A data pointer + * @param stream A cuda stream object. + * @param k A number of rows of op(B). + * @param n A number of columns of op(B). + * @param trans A transpose operation that will be applied to the matrix + * (default: GEMM_OP_N). + */ +void pruneMatrixB( + void* data, const cudaStream_t& stream, const size_t k, const size_t n, const GemmOp trans = GEMM_OP_N); + +/** + * @brief Compress the B matrix in a specific sparsity format. + * + * @param output A pointer where to allocate memory buffer to store a compressed matrix. + * @param alloactor A resource allocator. + * @param stream A cuda stream object. + * @param input An input matrix to compress. + * @param k A number of rows of op(B). + * @param n A number of columns of op(B). + * @param trans A transpose operation that will be applied to the matrix (default: GEMM_OP_N). + * + * @return A size of the allocated device buffer of the compressed matrix. + * + * @throw GemmInvalidException if the input matrix does not have 2:4 sparsity. + * or if fail to compute a correct buffer size to store the compressed matrix. + * @throw std::runtime_error if any exception inside CUDA. + */ +size_t compressMatrixB(void** output, + IAllocator& allocator, + const cudaStream_t& stream, + const void* input, + const size_t k, + const size_t n, + const GemmOp trans = GEMM_OP_N); + +#endif + +/* ************************* End of GEMM utils **************************** */ + +} // end of namespace fastertransformer diff --git a/src/fastertransformer/utils/gemm_test/CMakeLists.txt b/src/fastertransformer/utils/gemm_test/CMakeLists.txt index 4f66ee7c2..223b85dd2 100644 --- a/src/fastertransformer/utils/gemm_test/CMakeLists.txt +++ b/src/fastertransformer/utils/gemm_test/CMakeLists.txt @@ -1,4 +1,4 @@ -# Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -41,6 +41,14 @@ set(t5_gemm_func_files t5_gemm_func.cc ) +set(swin_igemm_func_files + swin_igemm_func.cc +) + +set(swin_gemm_func_files + swin_gemm_func.cc +) + add_library(gemm_func STATIC ${gemm_func_files}) target_link_libraries(gemm_func PUBLIC -lcublas -lcublasLt -lcudart) set_property(TARGET gemm_func PROPERTY POSITION_INDEPENDENT_CODE ON) @@ -56,7 +64,11 @@ set_property(TARGET encoder_gemm_func PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET encoder_gemm_func PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) add_library(encoder_igemm_func STATIC ${encoder_igemm_func_files}) +if (SPARSITY_SUPPORT) +target_link_libraries(encoder_igemm_func PUBLIC -lcublas -lcublasLt -lcudart -lcusparse -lcusparseLt) +else() target_link_libraries(encoder_igemm_func PUBLIC -lcublas -lcublasLt -lcudart) +endif() set_property(TARGET encoder_igemm_func PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET encoder_igemm_func PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) @@ -87,3 +99,13 @@ else() endif() set_property(TARGET t5_gemm_func PROPERTY POSITION_INDEPENDENT_CODE ON) set_property(TARGET t5_gemm_func PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) + +add_library(swin_igemm_func STATIC ${swin_igemm_func_files}) +target_link_libraries(swin_igemm_func PUBLIC -lcublas -lcublasLt -lcudart gemm_func encoder_igemm_func) +set_property(TARGET swin_igemm_func PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET swin_igemm_func PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) + +add_library(swin_gemm_func STATIC ${swin_gemm_func_files}) +target_link_libraries(swin_gemm_func PUBLIC -lcublas -lcublasLt -lcudart gemm_func) +set_property(TARGET swin_gemm_func PROPERTY POSITION_INDEPENDENT_CODE ON) +set_property(TARGET swin_gemm_func PROPERTY CUDA_RESOLVE_DEVICE_SYMBOLS ON) diff --git a/src/fastertransformer/utils/gemm_test/decoding_gemm_func.cc b/src/fastertransformer/utils/gemm_test/decoding_gemm_func.cc index e6540cd12..5962f2ba3 100644 --- a/src/fastertransformer/utils/gemm_test/decoding_gemm_func.cc +++ b/src/fastertransformer/utils/gemm_test/decoding_gemm_func.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -33,7 +33,12 @@ void generate_decoding_gemm_config(int batch_size, void* cublas_workspace; void* buffer; int workSpaceSize; + +#ifdef ENABLE_BF16 + if (std::is_same::value || std::is_same::value) { +#else if (std::is_same::value) { +#endif // ENABLE_BF16 // cublas_workspace_ should be the start pointer of cudaMalloc() // to ensure 16B alignemnet cublas_workspace = buffer_in; @@ -134,7 +139,9 @@ void generate_decoding_gemm_config(int batch_size, const int ites = 100; struct timeval start, end; - if (sizeof(T) == sizeof(float)) { + CublasDataType data_type; + if (std::is_same::value) { + data_type = FLOAT_DATATYPE; AType = CUDA_R_32F; BType = CUDA_R_32F; CType = CUDA_R_32F; @@ -142,17 +149,30 @@ void generate_decoding_gemm_config(int batch_size, startAlgo = (int)CUBLAS_GEMM_DEFAULT; endAlgo = (int)CUBLAS_GEMM_ALGO23; } - else { + else if (std::is_same::value) { + data_type = HALF_DATATYPE; AType = CUDA_R_16F; BType = CUDA_R_16F; CType = CUDA_R_16F; - computeType = CUDA_R_16F; + computeType = CUDA_R_32F; + startAlgo = (int)CUBLAS_GEMM_DEFAULT_TENSOR_OP; + endAlgo = (int)CUBLAS_GEMM_ALGO15_TENSOR_OP; + } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + data_type = BFLOAT16_DATATYPE; + AType = CUDA_R_16BF; + BType = CUDA_R_16BF; + CType = CUDA_R_16BF; + computeType = CUDA_R_32F; startAlgo = (int)CUBLAS_GEMM_DEFAULT_TENSOR_OP; endAlgo = (int)CUBLAS_GEMM_ALGO15_TENSOR_OP; } +#endif + using scaleT = typename ScaleTypeConverter::Type; - T alpha = (T)1.0f; - T beta = (T)0.0f; + scaleT alpha = (scaleT)1.0f; + scaleT beta = (scaleT)0.0f; printf("***Encoder Gemm Testing Begin***\n"); printf("***Cublas Gemm Testing Begin***\n"); @@ -211,38 +231,44 @@ void generate_decoding_gemm_config(int batch_size, } } printf("fast_algo %d costs %.3f ms\n", fast_algo, exec_time); - int is_fp16 = 0; - if (sizeof(T) == sizeof(half)) - is_fp16 = 1; - // for fp16, we compare cublasLt - if (is_fp16 == 1) { + // for fp16 and bf16, we compare cublasLt + if (data_type != FLOAT_DATATYPE) { printf("***cublasLt Gemm Testing Beign***\n"); // Let try a fixed number of combinations int ALGO_COMBINATIONS = 5000; customMatmulPerf_t perfResults[ALGO_COMBINATIONS]; - LtHgemmCustomFind(ltHandle, - batch_size * beam_width, - seq_len, - head_num, - size_per_head, - n, - m, - k, - &alpha, - d_B, - d_A, - &beta, - d_C, - cublas_workspace, - workSpaceSize, - fd, - perfResults, - ALGO_COMBINATIONS); + LtHgemmCustomFind(ltHandle, + batch_size * beam_width, + seq_len, + head_num, + size_per_head, + n, + m, + k, + &alpha, + d_B, + d_A, + &beta, + d_C, + cublas_workspace, + workSpaceSize, + fd, + perfResults, + ALGO_COMBINATIONS); if (perfResults[0].time < exec_time) { - printPerfStructure( - batch_size * beam_width, seq_len, head_num, size_per_head, n, m, k, perfResults[0], fd, is_fp16, 0); + printPerfStructure(batch_size * beam_width, + seq_len, + head_num, + size_per_head, + n, + m, + k, + perfResults[0], + fd, + data_type, + 0); } else { fprintf(fd, @@ -251,7 +277,7 @@ void generate_decoding_gemm_config(int batch_size, seq_len, head_num, size_per_head, - is_fp16 ? HALF_DATATYPE : FLOAT_DATATYPE, + data_type, batchCount[i], n, m, @@ -268,7 +294,7 @@ void generate_decoding_gemm_config(int batch_size, seq_len, head_num, size_per_head, - is_fp16 ? HALF_DATATYPE : FLOAT_DATATYPE, + data_type, batchCount[i], n, m, @@ -305,6 +331,19 @@ template void generate_decoding_gemm_config(int batch_size, void* buffer_in, bool isAppend); +#ifdef ENABLE_BF16 +template void generate_decoding_gemm_config<__nv_bfloat16>(int batch_size, + int beam_width, + int seq_len, + int head_num, + int size_per_head, + int inter_size, + int vocab_size, + int mem_hidden_units, + void* buffer_in, + bool isAppend); +#endif + size_t calDecodingGemmTestBufSizeInByte(int batch_size, int beam_width, int max_mem_seq_len, @@ -313,7 +352,7 @@ size_t calDecodingGemmTestBufSizeInByte(int batch_size, int inter_size, int memory_hidden_units, int vocab_size, - int is_fp16) + CublasDataType data_type) { size_t buf_size_in_byte = 0; const size_t tensor_para_size = 1; @@ -321,7 +360,8 @@ size_t calDecodingGemmTestBufSizeInByte(int batch_size, const size_t local_head_num = head_num / tensor_para_size; const size_t local_hidden_units = local_head_num * size_per_head; - int wordSize = (is_fp16 == 1 ? sizeof(half) : sizeof(float)); + // TODO need to add bfloat16 here + int wordSize = (data_type == FLOAT_DATATYPE ? sizeof(float) : sizeof(half)); size_t m = batch_size * beam_width; std::vector buff_size; @@ -343,7 +383,7 @@ size_t calDecodingGemmTestBufSizeInByte(int batch_size, buf_size_in_byte = buf_size_in_byte > t ? buf_size_in_byte : t; } buf_size_in_byte *= wordSize; - buf_size_in_byte += ((is_fp16 == 1) ? CUBLAS_WORKSPACE_SIZE : 0); + buf_size_in_byte += ((data_type == HALF_DATATYPE || data_type == BFLOAT16_DATATYPE) ? CUBLAS_WORKSPACE_SIZE : 0); return buf_size_in_byte; } diff --git a/src/fastertransformer/utils/gemm_test/decoding_gemm_func.h b/src/fastertransformer/utils/gemm_test/decoding_gemm_func.h index 6c4332985..178b3d9ce 100644 --- a/src/fastertransformer/utils/gemm_test/decoding_gemm_func.h +++ b/src/fastertransformer/utils/gemm_test/decoding_gemm_func.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,8 +17,10 @@ #pragma once #include "src/fastertransformer/utils/cublasAlgoMap.h" +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" #include "src/fastertransformer/utils/cuda_utils.h" #include "src/fastertransformer/utils/gemm_test/gemm_func.h" + #include #include #include @@ -51,6 +53,6 @@ size_t calDecodingGemmTestBufSizeInByte(int batch_size, int inter_size, int memory_hidden_units, int vocab_size, - int is_fp16); + CublasDataType data_type); } // namespace fastertransformer diff --git a/src/fastertransformer/utils/gemm_test/encoder_gemm_func.cc b/src/fastertransformer/utils/gemm_test/encoder_gemm_func.cc index 4c26be3e8..03c6947e0 100644 --- a/src/fastertransformer/utils/gemm_test/encoder_gemm_func.cc +++ b/src/fastertransformer/utils/gemm_test/encoder_gemm_func.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -18,20 +18,26 @@ namespace fastertransformer { -template -void generate_encoder_gemm_config(int batch_size, int seq_len, int head_num, - int size_per_head, void *buffer_in, - bool isAppend) { - void *cublas_workspace; - void *buffer; +template +void generate_encoder_gemm_config( + int batch_size, int seq_len, int head_num, int size_per_head, void* buffer_in, bool isAppend) +{ + void* cublas_workspace; + void* buffer; int workSpaceSize; + +#ifdef ENABLE_BF16 + if (std::is_same::value || std::is_same::value) { +#else if (std::is_same::value) { +#endif // ENABLE_BF16 // cublas_workspace_ should be the start pointer of cudaMalloc() // to ensure 16B alignemnet cublas_workspace = buffer_in; - buffer = (void *)((char *)cublas_workspace + CUBLAS_WORKSPACE_SIZE); + buffer = (void*)((char*)cublas_workspace + CUBLAS_WORKSPACE_SIZE); workSpaceSize = CUBLAS_WORKSPACE_SIZE; - } else { + } + else { cublas_workspace = nullptr; buffer = buffer_in; workSpaceSize = 0; @@ -42,11 +48,12 @@ void generate_encoder_gemm_config(int batch_size, int seq_len, int head_num, printf("Device %s\n", prop.name); // check config - FILE *fd; + FILE* fd; int line_count = 0; if (!isAppend) { fd = fopen(GEMM_CONFIG, "w+"); - } else { + } + else { fd = fopen(GEMM_CONFIG, "a+"); std::vector config; char line[1024]; @@ -54,9 +61,7 @@ void generate_encoder_gemm_config(int batch_size, int seq_len, int head_num, config.push_back(std::string(line)); } line_count = config.size(); - if (config.size() - >= (MAX_CONFIG_NUM * GEMM_NUM - + 1)) // 6 cublas/cublasLt, first row is not included + if (config.size() >= (MAX_CONFIG_NUM * GEMM_NUM + 1)) // 6 cublas/cublasLt, first row is not included { int startIdx = config.size() - ((MAX_CONFIG_NUM - 1) * GEMM_NUM); fclose(fd); @@ -126,32 +131,47 @@ void generate_encoder_gemm_config(int batch_size, int seq_len, int head_num, const int ites = 100; struct timeval start, end; - if (sizeof(T) == sizeof(float)) { + CublasDataType data_type; + if (std::is_same::value) { + data_type = FLOAT_DATATYPE; AType = CUDA_R_32F; BType = CUDA_R_32F; CType = CUDA_R_32F; computeType = CUDA_R_32F; startAlgo = (int)CUBLAS_GEMM_DEFAULT; endAlgo = (int)CUBLAS_GEMM_ALGO23; - } else { + } + else if (std::is_same::value) { + data_type = HALF_DATATYPE; AType = CUDA_R_16F; BType = CUDA_R_16F; CType = CUDA_R_16F; - computeType = CUDA_R_16F; + computeType = CUDA_R_32F; + startAlgo = (int)CUBLAS_GEMM_DEFAULT_TENSOR_OP; + endAlgo = (int)CUBLAS_GEMM_ALGO15_TENSOR_OP; + } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + data_type = BFLOAT16_DATATYPE; + AType = CUDA_R_16BF; + BType = CUDA_R_16BF; + CType = CUDA_R_16BF; + computeType = CUDA_R_32F; startAlgo = (int)CUBLAS_GEMM_DEFAULT_TENSOR_OP; endAlgo = (int)CUBLAS_GEMM_ALGO15_TENSOR_OP; } +#endif + using scaleT = typename ScaleTypeConverter::Type; - T alpha = (T)1.0f; - T beta = (T)0.0f; + scaleT alpha = (scaleT)1.0f; + scaleT beta = (scaleT)0.0f; printf("***Encoder Gemm Testing Begin***\n"); printf("***Cublas Gemm Testing Begin***\n"); if (line_count == 0) { - fprintf( - fd, - "batch_size, seq_len, head_num, size_per_head dataType ### batchCount, n, m, k, algoId, " - "customOption, tile, numSplitsK, swizzle, reductionScheme, workspaceSize, stages, exec_time\n"); + fprintf(fd, + "batch_size, seq_len, head_num, size_per_head dataType ### batchCount, n, m, k, algoId, " + "customOption, tile, numSplitsK, swizzle, reductionScheme, workspaceSize, stages, exec_time\n"); } for (int i = 0; i < gemm_num; ++i) { // if(i != 0 && i != 5) continue; @@ -159,34 +179,28 @@ void generate_encoder_gemm_config(int batch_size, int seq_len, int head_num, int m = M[i], n = N[i], k = K[i]; printf("\n-----------------------------\n"); printf("GEMM test %d: [M: %d, K: %d, N: %d] %s\n", i, m, k, n, mess[i]); - T *d_A = (T *)buffer; - T *d_B = d_A + m * k * batchCount[i]; - T *d_C = d_B + k * n * batchCount[i]; + T* d_A = (T*)buffer; + T* d_B = d_A + m * k * batchCount[i]; + T* d_C = d_B + k * n * batchCount[i]; // array of pointer for batchedGemm - T *harray[12]; - harray[0] = (T *)buffer; - harray[1] = (T *)((char *)buffer + sizeof(T) * m * k); - harray[2] = (T *)((char *)buffer + 2 * sizeof(T) * m * k); - harray[4] = (T *)((char *)buffer + 3 * sizeof(T) * m * k); - harray[5] = - (T *)((char *)buffer + 3 * sizeof(T) * m * k + sizeof(T) * k * n); - harray[6] = (T *)((char *)buffer + 3 * sizeof(T) * m * k - + 2 * sizeof(T) * k * n); - harray[8] = (T *)((char *)buffer + 3 * sizeof(T) * m * k - + 3 * sizeof(T) * k * n); - harray[9] = (T *)((char *)buffer + 3 * sizeof(T) * m * k - + 3 * sizeof(T) * k * n + sizeof(T) * m * n); - harray[10] = (T *)((char *)buffer + 3 * sizeof(T) * m * k - + 3 * sizeof(T) * k * n + 2 * sizeof(T) * m * n); + T* harray[12]; + harray[0] = (T*)buffer; + harray[1] = (T*)((char*)buffer + sizeof(T) * m * k); + harray[2] = (T*)((char*)buffer + 2 * sizeof(T) * m * k); + harray[4] = (T*)((char*)buffer + 3 * sizeof(T) * m * k); + harray[5] = (T*)((char*)buffer + 3 * sizeof(T) * m * k + sizeof(T) * k * n); + harray[6] = (T*)((char*)buffer + 3 * sizeof(T) * m * k + 2 * sizeof(T) * k * n); + harray[8] = (T*)((char*)buffer + 3 * sizeof(T) * m * k + 3 * sizeof(T) * k * n); + harray[9] = (T*)((char*)buffer + 3 * sizeof(T) * m * k + 3 * sizeof(T) * k * n + sizeof(T) * m * n); + harray[10] = (T*)((char*)buffer + 3 * sizeof(T) * m * k + 3 * sizeof(T) * k * n + 2 * sizeof(T) * m * n); - T **darray = 0; - check_cuda_error(cudaMalloc((void **)&darray, sizeof(T *) * 12)); - cudaMemcpy((void *)darray, (void *)harray, sizeof(T *) * 12, - cudaMemcpyHostToDevice); - T **dAarray = darray; - T **dBarray = darray + 4; - T **dCarray = darray + 8; + T** darray = 0; + check_cuda_error(cudaMalloc((void**)&darray, sizeof(T*) * 12)); + cudaMemcpy((void*)darray, (void*)harray, sizeof(T*) * 12, cudaMemcpyHostToDevice); + T** dAarray = darray; + T** dBarray = darray + 4; + T** dCarray = darray + 8; float exec_time = 99999.0f; int fast_algo = 0; @@ -196,42 +210,106 @@ void generate_encoder_gemm_config(int batch_size, int seq_len, int head_num, gettimeofday(&start, NULL); for (int ite = 0; ite < ites; ++ite) { if (i < 3) { - status = cublasGemmEx( - cublas_handle, CUBLAS_OP_N, CUBLAS_OP_N, n, m, k, - &alpha, d_B, BType, n, d_A, AType, k, &beta, d_C, CType, - n, computeType, static_cast(algo)); - } else if (i == 3) { - status = cublasGemmStridedBatchedEx( - cublas_handle, CUBLAS_OP_T, CUBLAS_OP_N, seq_len, - seq_len, size_per_head, &alpha, d_B, BType, - size_per_head, seq_len * size_per_head, d_A, AType, - size_per_head, seq_len * size_per_head, &beta, d_C, - CType, seq_len, seq_len * seq_len, - batch_size * head_num, computeType, - static_cast(algo)); - } else if (i == 4) { - status = cublasGemmStridedBatchedEx( - cublas_handle, CUBLAS_OP_N, CUBLAS_OP_N, size_per_head, - seq_len, seq_len, &alpha, d_B, BType, size_per_head, - seq_len * size_per_head, d_A, AType, seq_len, - seq_len * seq_len, &beta, d_C, CType, size_per_head, - seq_len * size_per_head, batch_size * head_num, - computeType, static_cast(algo)); - } else if (i == 5) { - status = cublasGemmBatchedEx( - cublas_handle, CUBLAS_OP_N, CUBLAS_OP_N, n, m, k, - &alpha, (const void *const *)dBarray, BType, n, - (const void *const *)dAarray, AType, k, &beta, - (void *const *)dCarray, CType, n, 3, computeType, - static_cast(algo)); + status = cublasGemmEx(cublas_handle, + CUBLAS_OP_N, + CUBLAS_OP_N, + n, + m, + k, + &alpha, + d_B, + BType, + n, + d_A, + AType, + k, + &beta, + d_C, + CType, + n, + computeType, + static_cast(algo)); + } + else if (i == 3) { + status = cublasGemmStridedBatchedEx(cublas_handle, + CUBLAS_OP_T, + CUBLAS_OP_N, + seq_len, + seq_len, + size_per_head, + &alpha, + d_B, + BType, + size_per_head, + seq_len * size_per_head, + d_A, + AType, + size_per_head, + seq_len * size_per_head, + &beta, + d_C, + CType, + seq_len, + seq_len * seq_len, + batch_size * head_num, + computeType, + static_cast(algo)); + } + else if (i == 4) { + status = cublasGemmStridedBatchedEx(cublas_handle, + CUBLAS_OP_N, + CUBLAS_OP_N, + size_per_head, + seq_len, + seq_len, + &alpha, + d_B, + BType, + size_per_head, + seq_len * size_per_head, + d_A, + AType, + seq_len, + seq_len * seq_len, + &beta, + d_C, + CType, + size_per_head, + seq_len * size_per_head, + batch_size * head_num, + computeType, + static_cast(algo)); + } + else if (i == 5) { + status = cublasGemmBatchedEx(cublas_handle, + CUBLAS_OP_N, + CUBLAS_OP_N, + n, + m, + k, + &alpha, + (const void* const*)dBarray, + BType, + n, + (const void* const*)dAarray, + AType, + k, + &beta, + (void* const*)dCarray, + CType, + n, + 3, + computeType, + static_cast(algo)); + } + if (status != CUBLAS_STATUS_SUCCESS) { + break; } - if (status != CUBLAS_STATUS_SUCCESS) break; } cudaDeviceSynchronize(); gettimeofday(&end, NULL); if (status == CUBLAS_STATUS_SUCCESS) { - printf("algo_%d costs %.3fms \n", algo, - diffTime(start, end) / ites); + printf("algo_%d costs %.3fms \n", algo, diffTime(start, end) / ites); if (diffTime(start, end) / ites < exec_time) { exec_time = diffTime(start, end) / ites; fast_algo = algo; @@ -239,40 +317,67 @@ void generate_encoder_gemm_config(int batch_size, int seq_len, int head_num, } } printf("fast_algo %d costs %.3f ms\n", fast_algo, exec_time); - int is_fp16 = 0; - if (sizeof(T) == sizeof(half)) is_fp16 = 1; - // for fp16, we compare cublasLt - if (i < 3 && is_fp16 == 1) { + // for fp16 and bf16, we compare cublasLt + if (i < 3 && data_type != FLOAT_DATATYPE) { printf("***cublasLt Gemm Testing Beign***\n"); // Let try a fixed number of combinations int ALGO_COMBINATIONS = 5000; customMatmulPerf_t perfResults[ALGO_COMBINATIONS]; - - LtHgemmCustomFind(ltHandle, batch_size, seq_len, head_num, - size_per_head, n, m, k, &alpha, d_B, d_A, - &beta, d_C, cublas_workspace, workSpaceSize, - fd, perfResults, ALGO_COMBINATIONS); + LtHgemmCustomFind(ltHandle, + batch_size, + seq_len, + head_num, + size_per_head, + n, + m, + k, + &alpha, + d_B, + d_A, + &beta, + d_C, + cublas_workspace, + workSpaceSize, + fd, + perfResults, + ALGO_COMBINATIONS); if (perfResults[0].time < exec_time) { - printPerfStructure(batch_size, seq_len, head_num, size_per_head, - n, m, k, perfResults[0], fd, is_fp16, 0); + printPerfStructure( + batch_size, seq_len, head_num, size_per_head, n, m, k, perfResults[0], fd, data_type, 0); exec_time = perfResults[0].time; - } else { - fprintf( - fd, - "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 %f\n", - batch_size, seq_len, head_num, size_per_head, - is_fp16 ? HALF_DATATYPE : FLOAT_DATATYPE, batchCount[i], n, - m, k, fast_algo, exec_time); + } + else { + fprintf(fd, + "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 %f\n", + batch_size, + seq_len, + head_num, + size_per_head, + data_type, + batchCount[i], + n, + m, + k, + fast_algo, + exec_time); } printf("***cublasLt Gemm Testing End***\n"); - } else { - fprintf( - fd, - "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 %f\n", - batch_size, seq_len, head_num, size_per_head, - is_fp16 ? HALF_DATATYPE : FLOAT_DATATYPE, batchCount[i], n, m, - k, fast_algo, exec_time); + } + else { + fprintf(fd, + "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 %f\n", + batch_size, + seq_len, + head_num, + size_per_head, + data_type, + batchCount[i], + n, + m, + k, + fast_algo, + exec_time); } exec_times[i] = exec_time; cudaFree(darray); @@ -292,7 +397,8 @@ void generate_encoder_gemm_config(int batch_size, int seq_len, int head_num, const int spgemm_num = 3; if (!isAppend) { fd = fopen(SPGEMM_CONFIG, "w+"); - } else { + } + else { fd = fopen(SPGEMM_CONFIG, "a+"); std::vector config; char line[1024]; @@ -300,9 +406,7 @@ void generate_encoder_gemm_config(int batch_size, int seq_len, int head_num, config.push_back(std::string(line)); } line_count = config.size(); - if (config.size() - >= (MAX_CONFIG_NUM * spgemm_num - + 1)) // 6 cublas/cublasLt, first row is not included + if (config.size() >= (MAX_CONFIG_NUM * spgemm_num + 1)) // 6 cublas/cublasLt, first row is not included { int startIdx = config.size() - ((MAX_CONFIG_NUM - 1) * spgemm_num); fclose(fd); @@ -329,7 +433,7 @@ void generate_encoder_gemm_config(int batch_size, int seq_len, int head_num, cudaStream_t stream = 0; float alpha2 = 1.0f; float beta2 = 0.0f; - for(int i = 0; i < spgemm_num; ++i) { + for (int i = 0; i < spgemm_num; ++i) { // to be compatable with spgemm wrapper, we let A be the weight matrix // so m and n are swapped // A: mxk B: kxn C:mxn @@ -342,16 +446,14 @@ void generate_encoder_gemm_config(int batch_size, int seq_len, int head_num, T* dA_compressed; { cusparseLtMatDescriptor_t matA; - CHECK_CUSPARSE( cusparseLtStructuredDescriptorInit( - &handle, &matA, m, - k, m, alignment, - CUDA_R_16F, order, - CUSPARSELT_SPARSITY_50_PERCENT) ) - CHECK_CUSPARSE( cusparseLtSpMMAPrune2(&handle, &matA, true, opA, d_A, d_A, CUSPARSELT_PRUNE_SPMMA_STRIP, stream) ) + CHECK_CUSPARSE(cusparseLtStructuredDescriptorInit( + &handle, &matA, m, k, m, alignment, CUDA_R_16F, order, CUSPARSELT_SPARSITY_50_PERCENT)) + CHECK_CUSPARSE( + cusparseLtSpMMAPrune2(&handle, &matA, true, opA, d_A, d_A, CUSPARSELT_PRUNE_SPMMA_STRIP, stream)) size_t compressed_size; - CHECK_CUSPARSE( cusparseLtSpMMACompressedSize2(&handle, &matA, &compressed_size) ) - check_cuda_error( cudaMalloc((void**) &dA_compressed, compressed_size) ); - CHECK_CUSPARSE( cusparseLtSpMMACompress2(&handle, &matA, true, opA, d_A, dA_compressed, stream) ) + CHECK_CUSPARSE(cusparseLtSpMMACompressedSize2(&handle, &matA, &compressed_size)) + check_cuda_error(cudaMalloc((void**)&dA_compressed, compressed_size)); + CHECK_CUSPARSE(cusparseLtSpMMACompress2(&handle, &matA, true, opA, d_A, dA_compressed, stream)) } float exec_time = 99999.0f; @@ -362,19 +464,10 @@ void generate_encoder_gemm_config(int batch_size, int seq_len, int head_num, void* d_workspace = nullptr; int num_streams = 1; cudaStream_t streams[1] = {stream}; - CHECK_CUSPARSE( cusparseLtStructuredDescriptorInit( - &handle, &matA, m, - k, m, alignment, - CUDA_R_16F, order, - CUSPARSELT_SPARSITY_50_PERCENT) ) - CHECK_CUSPARSE( cusparseLtDenseDescriptorInit( - &handle, &matB, k, - n, k, alignment, - CUDA_R_16F, order) ) - CHECK_CUSPARSE( cusparseLtDenseDescriptorInit( - &handle, &matC, m, - n, m, alignment, - CUDA_R_16F, order) ) + CHECK_CUSPARSE(cusparseLtStructuredDescriptorInit( + &handle, &matA, m, k, m, alignment, CUDA_R_16F, order, CUSPARSELT_SPARSITY_50_PERCENT)) + CHECK_CUSPARSE(cusparseLtDenseDescriptorInit(&handle, &matB, k, n, k, alignment, CUDA_R_16F, order)) + CHECK_CUSPARSE(cusparseLtDenseDescriptorInit(&handle, &matC, m, n, m, alignment, CUDA_R_16F, order)) gettimeofday(&start, NULL); for (int ite = 0; ite < ites; ++ite) { // initializing MatDesc takes a lot of time @@ -383,23 +476,27 @@ void generate_encoder_gemm_config(int batch_size, int seq_len, int head_num, cusparseLtMatmulDescriptor_t matmul; cusparseLtMatmulAlgSelection_t alg_sel; cusparseLtMatmulPlan_t plan; - CHECK_CUSPARSE( cusparseLtMatmulDescriptorInit( - &handle, &matmul, opA, opB, - &matA, &matB, &matC, &matC, - compute_type) ) - CHECK_CUSPARSE( cusparseLtMatmulAlgSelectionInit( - &handle, &alg_sel, &matmul, - CUSPARSELT_MATMUL_ALG_DEFAULT) ) - CHECK_CUSPARSE( cusparseLtMatmulAlgSetAttribute( - &handle, &alg_sel, - CUSPARSELT_MATMUL_ALG_CONFIG_ID, - &alg, sizeof(alg))) + CHECK_CUSPARSE(cusparseLtMatmulDescriptorInit( + &handle, &matmul, opA, opB, &matA, &matB, &matC, &matC, compute_type)) + CHECK_CUSPARSE( + cusparseLtMatmulAlgSelectionInit(&handle, &alg_sel, &matmul, CUSPARSELT_MATMUL_ALG_DEFAULT)) + CHECK_CUSPARSE(cusparseLtMatmulAlgSetAttribute( + &handle, &alg_sel, CUSPARSELT_MATMUL_ALG_CONFIG_ID, &alg, sizeof(alg))) size_t workspace_size; - CHECK_CUSPARSE( cusparseLtMatmulGetWorkspace(&handle, &alg_sel, &workspace_size) ) - CHECK_CUSPARSE( cusparseLtMatmulPlanInit(&handle, &plan, &matmul, &alg_sel, workspace_size) ) - CHECK_CUSPARSE( cusparseLtMatmul(&handle, &plan, &alpha2, dA_compressed, d_B, - &beta2, d_C, d_C, d_workspace, streams, num_streams) ) - CHECK_CUSPARSE( cusparseLtMatmulPlanDestroy(&plan) ) + CHECK_CUSPARSE(cusparseLtMatmulGetWorkspace(&handle, &alg_sel, &workspace_size)) + CHECK_CUSPARSE(cusparseLtMatmulPlanInit(&handle, &plan, &matmul, &alg_sel, workspace_size)) + CHECK_CUSPARSE(cusparseLtMatmul(&handle, + &plan, + &alpha2, + dA_compressed, + d_B, + &beta2, + d_C, + d_C, + d_workspace, + streams, + num_streams)) + CHECK_CUSPARSE(cusparseLtMatmulPlanDestroy(&plan)) } cudaDeviceSynchronize(); gettimeofday(&end, NULL); @@ -414,11 +511,22 @@ void generate_encoder_gemm_config(int batch_size, int seq_len, int head_num, fast_algo = -1; } printf("fast_algo %d\n", fast_algo); - fprintf(fd, "%d %d %d %d %d ### %d %d %d %d %d %f\n", - batch_size, seq_len, head_num, size_per_head, HALF_DATATYPE, batchCount[i], m, n, k, fast_algo, exec_time); + fprintf(fd, + "%d %d %d %d %d ### %d %d %d %d %d %f\n", + batch_size, + seq_len, + head_num, + size_per_head, + HALF_DATATYPE, + batchCount[i], + m, + n, + k, + fast_algo, + exec_time); cudaFree(dA_compressed); } - CHECK_CUSPARSE( cusparseLtDestroy(&handle) ) + CHECK_CUSPARSE(cusparseLtDestroy(&handle)) fclose(fd); printf("***cusparseLt Gemm Testing End***\n"); } @@ -426,13 +534,13 @@ void generate_encoder_gemm_config(int batch_size, int seq_len, int head_num, return; } -template void generate_encoder_gemm_config(int batch_size, int seq_len, - int head_num, - int size_per_head, - void *buffer, bool isAppend); -template void generate_encoder_gemm_config(int batch_size, int seq_len, - int head_num, - int size_per_head, - void *buffer, bool isAppend); +template void generate_encoder_gemm_config( + int batch_size, int seq_len, int head_num, int size_per_head, void* buffer, bool isAppend); +template void generate_encoder_gemm_config( + int batch_size, int seq_len, int head_num, int size_per_head, void* buffer, bool isAppend); +#ifdef ENABLE_BF16 +template void generate_encoder_gemm_config<__nv_bfloat16>( + int batch_size, int seq_len, int head_num, int size_per_head, void* buffer, bool isAppend); +#endif } // namespace fastertransformer diff --git a/src/fastertransformer/utils/gemm_test/encoder_gemm_func.h b/src/fastertransformer/utils/gemm_test/encoder_gemm_func.h index 094680d56..fd067b90b 100644 --- a/src/fastertransformer/utils/gemm_test/encoder_gemm_func.h +++ b/src/fastertransformer/utils/gemm_test/encoder_gemm_func.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,8 +17,10 @@ #pragma once #include "src/fastertransformer/utils/cublasAlgoMap.h" +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" #include "src/fastertransformer/utils/cuda_utils.h" #include "src/fastertransformer/utils/gemm_test/gemm_func.h" + #include #include #include diff --git a/src/fastertransformer/utils/gemm_test/encoder_igemm_func.cc b/src/fastertransformer/utils/gemm_test/encoder_igemm_func.cc index a969f6d57..36b3d904c 100644 --- a/src/fastertransformer/utils/gemm_test/encoder_igemm_func.cc +++ b/src/fastertransformer/utils/gemm_test/encoder_igemm_func.cc @@ -16,17 +16,20 @@ #include "encoder_igemm_func.h" -namespace fastertransformer{ +#ifndef CUDART_VERSION +#error CUDART_VERSION Undefined! +#endif + +namespace fastertransformer { int batch_size_; int seq_len_; int head_num_; int size_per_head_; -static const char *showStatus(cublasStatus_t error) +static const char* showStatus(cublasStatus_t error) { - switch (error) - { + switch (error) { case CUBLAS_STATUS_SUCCESS: return "CUBLAS_STATUS_SUCCESS"; @@ -62,194 +65,267 @@ static const char *showStatus(cublasStatus_t error) } // Utility function to print customMatmulPerf_t structure -int printPerfStructure(int m, int n, int k, const customMatmulPerf_t &perf, FILE* fout, int hasPrint) { +int printPerfStructure(int m, int n, int k, const customMatmulPerf_t& perf, FILE* fout, int hasPrint) +{ int algoId, tile, swizzle, customOption, numSplitsK, reductionScheme, stages; - - const cublasLtMatmulAlgo_t *matmulAlgo = &perf.algo; - cublasLtMatmulAlgoConfigGetAttribute( matmulAlgo, CUBLASLT_ALGO_CONFIG_ID, &algoId, sizeof(algoId), NULL); - cublasLtMatmulAlgoConfigGetAttribute( matmulAlgo, CUBLASLT_ALGO_CONFIG_TILE_ID, &tile, sizeof(tile), NULL); - cublasLtMatmulAlgoConfigGetAttribute( matmulAlgo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &numSplitsK, sizeof(numSplitsK), NULL); - cublasLtMatmulAlgoConfigGetAttribute( matmulAlgo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &reductionScheme, sizeof(reductionScheme), NULL); - cublasLtMatmulAlgoConfigGetAttribute( matmulAlgo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &swizzle, sizeof(swizzle), NULL); - cublasLtMatmulAlgoConfigGetAttribute( matmulAlgo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &customOption, sizeof(customOption), NULL); -#ifdef CUDA11_MODE - cublasLtMatmulAlgoConfigGetAttribute( matmulAlgo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &stages, sizeof(stages), NULL); + + const cublasLtMatmulAlgo_t* matmulAlgo = &perf.algo; + cublasLtMatmulAlgoConfigGetAttribute(matmulAlgo, CUBLASLT_ALGO_CONFIG_ID, &algoId, sizeof(algoId), NULL); + cublasLtMatmulAlgoConfigGetAttribute(matmulAlgo, CUBLASLT_ALGO_CONFIG_TILE_ID, &tile, sizeof(tile), NULL); + cublasLtMatmulAlgoConfigGetAttribute( + matmulAlgo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &numSplitsK, sizeof(numSplitsK), NULL); + cublasLtMatmulAlgoConfigGetAttribute( + matmulAlgo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &reductionScheme, sizeof(reductionScheme), NULL); + cublasLtMatmulAlgoConfigGetAttribute( + matmulAlgo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &swizzle, sizeof(swizzle), NULL); + cublasLtMatmulAlgoConfigGetAttribute( + matmulAlgo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &customOption, sizeof(customOption), NULL); +#if (CUDART_VERSION >= 11000) + cublasLtMatmulAlgoConfigGetAttribute(matmulAlgo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &stages, sizeof(stages), NULL); #else - stages=0; + stages = 0; #endif printf("algo={ Id=%d, tileIdx=%d (%s) splitK=%d reduc=%d swizzle=%d custom=%d stages=%d} status %d " - "time %f workspace=%d mathMode=%d waves=%f\n", - algoId, tile, matmulTileName[tile], - numSplitsK, reductionScheme, - swizzle, customOption, stages, - perf.status, - perf.time, - (int)perf.workspaceSize, - (int)perf.mathMode, - perf.wavesCount); - - //chose the fastest algo that does not need workspace - if ((int)perf.workspaceSize == 0 && hasPrint == 0){ - fprintf(fout, "%d %d %d %d %d ### 1 %d %d %d %d %d %d %d %d %d %d %d %f\n", batch_size_, seq_len_, head_num_, size_per_head_, INT8_DATATYPE, m, n, k, algoId, customOption, tile, numSplitsK, swizzle, reductionScheme, (int)perf.workspaceSize, stages, perf.time); - return 1; - } - else{ - return hasPrint; + "time %f workspace=%d mathMode=%d waves=%f\n", + algoId, + tile, + matmulTileName[tile], + numSplitsK, + reductionScheme, + swizzle, + customOption, + stages, + perf.status, + perf.time, + (int)perf.workspaceSize, + (int)perf.mathMode, + perf.wavesCount); + + // chose the fastest algo that does not need workspace + if ((int)perf.workspaceSize == 0 && hasPrint == 0) { + fprintf(fout, + "%d %d %d %d %d ### 1 %d %d %d %d %d %d %d %d %d %d %d %f\n", + batch_size_, + seq_len_, + head_num_, + size_per_head_, + INT8_DATATYPE, + m, + n, + k, + algoId, + customOption, + tile, + numSplitsK, + swizzle, + reductionScheme, + (int)perf.workspaceSize, + stages, + perf.time); + return 1; + } + else { + return hasPrint; } } -int printBatchPerfStructure(int batchCount, int m, int n, int k, const customMatmulPerf_t &perf, FILE *fout, int hasPrint) { +int printBatchPerfStructure( + int batchCount, int m, int n, int k, const customMatmulPerf_t& perf, FILE* fout, int hasPrint) +{ int algoId, tile, swizzle, customOption, numSplitsK, reductionScheme, stages; - - const cublasLtMatmulAlgo_t *matmulAlgo = &perf.algo; - cublasLtMatmulAlgoConfigGetAttribute( matmulAlgo, CUBLASLT_ALGO_CONFIG_ID, &algoId, sizeof(algoId), NULL); - cublasLtMatmulAlgoConfigGetAttribute( matmulAlgo, CUBLASLT_ALGO_CONFIG_TILE_ID, &tile, sizeof(tile), NULL); - cublasLtMatmulAlgoConfigGetAttribute( matmulAlgo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &numSplitsK, sizeof(numSplitsK), NULL); - cublasLtMatmulAlgoConfigGetAttribute( matmulAlgo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &reductionScheme, sizeof(reductionScheme), NULL); - cublasLtMatmulAlgoConfigGetAttribute( matmulAlgo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &swizzle, sizeof(swizzle), NULL); - cublasLtMatmulAlgoConfigGetAttribute( matmulAlgo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &customOption, sizeof(customOption), NULL); -#ifdef CUDA11_MODE - cublasLtMatmulAlgoConfigGetAttribute( matmulAlgo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &stages, sizeof(stages), NULL); + + const cublasLtMatmulAlgo_t* matmulAlgo = &perf.algo; + cublasLtMatmulAlgoConfigGetAttribute(matmulAlgo, CUBLASLT_ALGO_CONFIG_ID, &algoId, sizeof(algoId), NULL); + cublasLtMatmulAlgoConfigGetAttribute(matmulAlgo, CUBLASLT_ALGO_CONFIG_TILE_ID, &tile, sizeof(tile), NULL); + cublasLtMatmulAlgoConfigGetAttribute( + matmulAlgo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &numSplitsK, sizeof(numSplitsK), NULL); + cublasLtMatmulAlgoConfigGetAttribute( + matmulAlgo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &reductionScheme, sizeof(reductionScheme), NULL); + cublasLtMatmulAlgoConfigGetAttribute( + matmulAlgo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &swizzle, sizeof(swizzle), NULL); + cublasLtMatmulAlgoConfigGetAttribute( + matmulAlgo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &customOption, sizeof(customOption), NULL); +#if (CUDART_VERSION >= 11000) + cublasLtMatmulAlgoConfigGetAttribute(matmulAlgo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &stages, sizeof(stages), NULL); #else stages = 0; #endif printf("algo={ Id=%d, tileIdx=%d (%s) splitK=%d reduc=%d swizzle=%d custom=%d stages=%d} status %d " - "time %f workspace=%d mathMode=%d waves=%f\n", - algoId, tile, matmulTileName[tile], - numSplitsK, reductionScheme, - swizzle, customOption, stages, - perf.status, - perf.time, - (int)perf.workspaceSize, - (int)perf.mathMode, - perf.wavesCount); - - //chose the fastest algo that does not need workspace - if ((int)perf.workspaceSize == 0 && hasPrint == 0){ - fprintf(fout, "%d %d %d %d %d ### %d %d %d %d %d %d %d %d %d %d %d %d %f\n",batch_size_, seq_len_, head_num_, size_per_head_, INT8_DATATYPE, batchCount, m, n, k, algoId, customOption, tile, numSplitsK, swizzle, reductionScheme, (int)perf.workspaceSize, stages, perf.time); - return 1; - } - else{ - return hasPrint; + "time %f workspace=%d mathMode=%d waves=%f\n", + algoId, + tile, + matmulTileName[tile], + numSplitsK, + reductionScheme, + swizzle, + customOption, + stages, + perf.status, + perf.time, + (int)perf.workspaceSize, + (int)perf.mathMode, + perf.wavesCount); + + // chose the fastest algo that does not need workspace + if ((int)perf.workspaceSize == 0 && hasPrint == 0) { + fprintf(fout, + "%d %d %d %d %d ### %d %d %d %d %d %d %d %d %d %d %d %d %f\n", + batch_size_, + seq_len_, + head_num_, + size_per_head_, + INT8_DATATYPE, + batchCount, + m, + n, + k, + algoId, + customOption, + tile, + numSplitsK, + swizzle, + reductionScheme, + (int)perf.workspaceSize, + stages, + perf.time); + return 1; + } + else { + return hasPrint; } } -static inline bool -time_compare(const customMatmulPerf_t &perf_a, const customMatmulPerf_t &perf_b) { +static inline bool time_compare(const customMatmulPerf_t& perf_a, const customMatmulPerf_t& perf_b) +{ return ((perf_a.status == CUBLAS_STATUS_SUCCESS) && (perf_a.time < perf_b.time)); } -static cublasStatus_t -customMatmulRun(cublasLtHandle_t ltHandle, // to get the capabilities (required a GPU) - cublasLtMatmulDesc_t operationDesc, - const void *alpha, /* host or device pointer */ - const void *A, - cublasLtMatrixLayout_t Adesc, - const void *B, - cublasLtMatrixLayout_t Bdesc, - const void *beta, /* host or device pointer */ - const void *C, - cublasLtMatrixLayout_t Cdesc, - void *D, - cublasLtMatrixLayout_t Ddesc, - const cublasLtMatmulAlgo_t &algo, - int kernelRepeats, - void *workSpace, - size_t workSpaceSizeInBytes, - customMatmulPerf_t &perfResults, - cudaStream_t stream) +static cublasStatus_t customMatmulRun(cublasLtHandle_t ltHandle, // to get the capabilities (required a GPU) + cublasLtMatmulDesc_t operationDesc, + const void* alpha, /* host or device pointer */ + const void* A, + cublasLtMatrixLayout_t Adesc, + const void* B, + cublasLtMatrixLayout_t Bdesc, + const void* beta, /* host or device pointer */ + const void* C, + cublasLtMatrixLayout_t Cdesc, + void* D, + cublasLtMatrixLayout_t Ddesc, + const cublasLtMatmulAlgo_t& algo, + int kernelRepeats, + void* workSpace, + size_t workSpaceSizeInBytes, + customMatmulPerf_t& perfResults, + cudaStream_t stream) { cublasLtMatmulHeuristicResult_t heurResult; /* Looping over the Algo */ - int repeats = kernelRepeats; - cublasStatus_t algoStatus = cublasLtMatmulAlgoCheck( ltHandle, - operationDesc, - Adesc, - Bdesc, - Cdesc, - Ddesc, - &algo, - &heurResult); + int repeats = kernelRepeats; + cublasStatus_t algoStatus = + cublasLtMatmulAlgoCheck(ltHandle, operationDesc, Adesc, Bdesc, Cdesc, Ddesc, &algo, &heurResult); if (algoStatus == CUBLAS_STATUS_SUCCESS) { if (heurResult.workspaceSize <= workSpaceSizeInBytes) { - struct timeval start, end; - cublasStatus_t oneRunStatus; - cudaDeviceSynchronize(); - gettimeofday(&start, NULL); - for (int loop = 0; loop < repeats; loop++) { - oneRunStatus = cublasLtMatmul(ltHandle, - operationDesc, - alpha, - A, Adesc, - B, Bdesc, - beta, - C, Cdesc, - D, Ddesc, - &algo, - workSpace, - workSpaceSizeInBytes, - stream); - } - cudaDeviceSynchronize(); - gettimeofday(&end, NULL); - if (oneRunStatus != CUBLAS_STATUS_SUCCESS) { - algoStatus = oneRunStatus; - } - float time = diffTime(start, end); - // For the moment only add successful findings - if (algoStatus == CUBLAS_STATUS_SUCCESS) { - perfResults.algo = algo; - perfResults.time = time/repeats; - perfResults.workspaceSize = heurResult.workspaceSize; - perfResults.wavesCount = heurResult.wavesCount; - } + struct timeval start, end; + cublasStatus_t oneRunStatus; + cudaDeviceSynchronize(); + gettimeofday(&start, NULL); + for (int loop = 0; loop < repeats; loop++) { + oneRunStatus = cublasLtMatmul(ltHandle, + operationDesc, + alpha, + A, + Adesc, + B, + Bdesc, + beta, + C, + Cdesc, + D, + Ddesc, + &algo, + workSpace, + workSpaceSizeInBytes, + stream); + } + cudaDeviceSynchronize(); + gettimeofday(&end, NULL); + if (oneRunStatus != CUBLAS_STATUS_SUCCESS) { + algoStatus = oneRunStatus; + } + float time = diffTime(start, end); + // For the moment only add successful findings + if (algoStatus == CUBLAS_STATUS_SUCCESS) { + perfResults.algo = algo; + perfResults.time = time / repeats; + perfResults.workspaceSize = heurResult.workspaceSize; + perfResults.wavesCount = heurResult.wavesCount; + } } else { - //printf("not enough workspace! %ld\n", heurResult.workspaceSize); - algoStatus = CUBLAS_STATUS_NOT_SUPPORTED; //Not enough workspace - } + // printf("not enough workspace! %ld\n", heurResult.workspaceSize); + algoStatus = CUBLAS_STATUS_NOT_SUPPORTED; // Not enough workspace + } } - else{ - //printf("check fail!\n"); + else { + // printf("check fail!\n"); } return algoStatus; } -// Sample wrapper running through multiple algo and config attributes combination for INT8 gemm using cublasLt low-level API -int -LtIgemmCustomFind(cublasLtHandle_t ltHandle, - int m, - int n, - int k, - const int *alpha, /* host pointer */ - const int8_t *A, - const int8_t *B, - const int *beta, /* host pointer */ - int32_t *C, - void *workSpace, - size_t workSpaceSize, - FILE* fout) +// Sample wrapper running through multiple algo and config attributes combination for INT8 gemm using cublasLt low-level +// API +template +int LtIgemmCustomFind(cublasLtHandle_t ltHandle, + int m, + int n, + int k, + const scaleT* alpha, /* host pointer */ + const int8_t* A, + const int8_t* B, + const scaleT* beta, /* host pointer */ + T* C, + void* workSpace, + size_t workSpaceSize, + FILE* fout) { cublasStatus_t status = CUBLAS_STATUS_SUCCESS; - + cublasLtMatmulDesc_t operationDesc = NULL; cublasLtMatrixLayout_t Adesc = NULL, Bdesc = NULL, Cdesc = NULL; cudaStream_t stream = 0; // SplitK value that we are going to try when SplitK is supported for a given algo const int splitKSequenceA[] = {2, 3, 4, 5, 6, 8, 12, 16, 32}; - // Let try a fixed number of combinations - #define ALGO_COMBINATIONS 50000 + // Let try a fixed number of combinations +#define ALGO_COMBINATIONS 50000 int AlgoCombinations = ALGO_COMBINATIONS; int AlgoCount = 0; - int kernelRepeats = 100; //number of time the CUDA kernels will be run back to back + int kernelRepeats = 100; // number of time the CUDA kernels will be run back to back customMatmulPerf_t perfResults[ALGO_COMBINATIONS]; int nbAlgoIds = 0; - #define ALGO_IDS 100 +#define ALGO_IDS 100 int algoIdA[ALGO_IDS]; - cudaDataType_t scaleType = CUDA_R_32I, Atype = CUDA_R_8I, Btype = CUDA_R_8I, Ctype = CUDA_R_32I; -#ifdef CUDA11_MODE + + cudaDataType_t Atype, Btype, Ctype, scaleType; + Atype = CUDA_R_8I; + Btype = CUDA_R_8I; + + if (std::is_same::value && std::is_same::value) { + Ctype = CUDA_R_32I; + scaleType = CUDA_R_32I; + } + else if (std::is_same::value && std::is_same::value) { + Ctype = CUDA_R_8I; + scaleType = CUDA_R_32F; + } + else { + printf("[ERROR] of igemm is invalid\n"); + exit(-1); + } + +#if (CUDART_VERSION >= 11000) cublasComputeType_t computeType = CUBLAS_COMPUTE_32I; #else cudaDataType_t computeType = CUDA_R_32I; @@ -257,649 +333,832 @@ LtIgemmCustomFind(cublasLtHandle_t ltHandle, cublasOperation_t opTranspose = CUBLAS_OP_T; bool use_ORDER_COL32_2R_4R4 = false; -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) int device{-1}; cudaGetDevice(&device); cudaDeviceProp props; cudaGetDeviceProperties(&props, device); - if (props.major * 10 + props.minor >= 80){ - use_ORDER_COL32_2R_4R4 = true; + if (props.major * 10 + props.minor >= 80) { + use_ORDER_COL32_2R_4R4 = true; } -#endif - cublasLtOrder_t order_COL32 = CUBLASLT_ORDER_COL32; +#endif + cublasLtOrder_t order_COL32 = CUBLASLT_ORDER_COL32; cublasLtOrder_t order_matrixB; -#ifdef CUDA11_MODE - if (use_ORDER_COL32_2R_4R4) - order_matrixB = CUBLASLT_ORDER_COL32_2R_4R4; - else - order_matrixB = CUBLASLT_ORDER_COL4_4R2_8C; +#if (CUDART_VERSION >= 11000) + if (use_ORDER_COL32_2R_4R4) { + order_matrixB = CUBLASLT_ORDER_COL32_2R_4R4; + } + else { + order_matrixB = CUBLASLT_ORDER_COL4_4R2_8C; + } #else order_matrixB = CUBLASLT_ORDER_COL4_4R2_8C; #endif - + int ldaTransform = 32 * m; int ldbTransform; - if (use_ORDER_COL32_2R_4R4) - ldbTransform = 32 * ((n + 32 - 1) / 32) * 32; - else - ldbTransform = 32 * ((n + 8 - 1) / 8) * 8; + if (use_ORDER_COL32_2R_4R4) { + ldbTransform = 32 * ((n + 32 - 1) / 32) * 32; + } + else { + ldbTransform = 32 * ((n + 8 - 1) / 8) * 8; + } int ldcTransform = 32 * m; -#ifdef CUDA11_MODE - status = cublasLtMatmulDescCreate(&operationDesc, computeType, CUDA_R_32I); +#if (CUDART_VERSION >= 11000) + status = cublasLtMatmulDescCreate(&operationDesc, computeType, scaleType); #else - status = cublasLtMatmulDescCreate(&operationDesc, CUDA_R_32I); + status = cublasLtMatmulDescCreate(&operationDesc, scaleType); #endif - if (status != CUBLAS_STATUS_SUCCESS) goto CLEANUP; - cublasLtMatmulDescSetAttribute(operationDesc, CUBLASLT_MATMUL_DESC_TRANSB, &opTranspose, sizeof(cublasOperation_t)); - - // Create matrix descriptors. + if (status != CUBLAS_STATUS_SUCCESS) { + goto CLEANUP; + } + cublasLtMatmulDescSetAttribute(operationDesc, CUBLASLT_MATMUL_DESC_TRANSB, &opTranspose, sizeof(cublasOperation_t)); + + // Create matrix descriptors. status = cublasLtMatrixLayoutCreate(&Adesc, Atype, m, k, ldaTransform); - if (status != CUBLAS_STATUS_SUCCESS) goto CLEANUP; - status = cublasLtMatrixLayoutSetAttribute(Adesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_COL32, sizeof(order_COL32)); - if (status != CUBLAS_STATUS_SUCCESS) goto CLEANUP; + if (status != CUBLAS_STATUS_SUCCESS) { + goto CLEANUP; + } + status = cublasLtMatrixLayoutSetAttribute(Adesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_COL32, sizeof(order_COL32)); + if (status != CUBLAS_STATUS_SUCCESS) { + goto CLEANUP; + } status = cublasLtMatrixLayoutCreate(&Bdesc, Btype, n, k, ldbTransform); - if (status != CUBLAS_STATUS_SUCCESS) goto CLEANUP; - status = cublasLtMatrixLayoutSetAttribute(Bdesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_matrixB, sizeof(order_matrixB)); - if (status != CUBLAS_STATUS_SUCCESS) goto CLEANUP; + if (status != CUBLAS_STATUS_SUCCESS) { + goto CLEANUP; + } + status = + cublasLtMatrixLayoutSetAttribute(Bdesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_matrixB, sizeof(order_matrixB)); + if (status != CUBLAS_STATUS_SUCCESS) { + goto CLEANUP; + } status = cublasLtMatrixLayoutCreate(&Cdesc, Ctype, m, n, ldcTransform); - if (status != CUBLAS_STATUS_SUCCESS) goto CLEANUP; - status = cublasLtMatrixLayoutSetAttribute(Cdesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_COL32, sizeof(order_COL32)); - if (status != CUBLAS_STATUS_SUCCESS) goto CLEANUP; - - // Request AlgoId available for IGEMM - status = cublasLtMatmulAlgoGetIds(ltHandle, computeType, scaleType, Atype, Btype, Ctype, Ctype, ALGO_IDS, algoIdA, &nbAlgoIds); - if (status != CUBLAS_STATUS_SUCCESS) goto CLEANUP; - + if (status != CUBLAS_STATUS_SUCCESS) { + goto CLEANUP; + } + status = cublasLtMatrixLayoutSetAttribute(Cdesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_COL32, sizeof(order_COL32)); + if (status != CUBLAS_STATUS_SUCCESS) { + goto CLEANUP; + } + + // Request AlgoId available for IGEMM + status = cublasLtMatmulAlgoGetIds( + ltHandle, computeType, scaleType, Atype, Btype, Ctype, Ctype, ALGO_IDS, algoIdA, &nbAlgoIds); + if (status != CUBLAS_STATUS_SUCCESS) { + goto CLEANUP; + } + // Loop over the Algo IDs - for (int idx = 0; (idx < nbAlgoIds) && (AlgoCount < AlgoCombinations); idx++) { + for (int idx = 0; (idx < nbAlgoIds) && (AlgoCount < AlgoCombinations); idx++) { cublasLtMatmulAlgo_t algo; size_t sizeWritten = 0; /* Initialize algo structure with given Algp ID */ - status = cublasLtMatmulAlgoInit(ltHandle, computeType, scaleType, Atype, Btype, Ctype, Ctype, algoIdA[idx], &algo); + status = + cublasLtMatmulAlgoInit(ltHandle, computeType, scaleType, Atype, Btype, Ctype, Ctype, algoIdA[idx], &algo); if (status != CUBLAS_STATUS_SUCCESS) { continue; } // Query the tiles enums supported by that algo - cublasLtMatmulAlgoCapGetAttribute( &algo, CUBLASLT_ALGO_CAP_TILE_IDS, NULL, 0, &sizeWritten); - int nbTiles = int(sizeWritten/sizeof(int)); - int *tileA = new int[ nbTiles == 0 ? 1:nbTiles]; - if(nbTiles == 0){ + cublasLtMatmulAlgoCapGetAttribute(&algo, CUBLASLT_ALGO_CAP_TILE_IDS, NULL, 0, &sizeWritten); + int nbTiles = int(sizeWritten / sizeof(int)); + int* tileA = new int[nbTiles == 0 ? 1 : nbTiles]; + if (nbTiles == 0) { tileA[0] = CUBLASLT_MATMUL_TILE_UNDEFINED; nbTiles = 1; } -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) cublasLtMatmulAlgoCapGetAttribute(&algo, CUBLASLT_ALGO_CAP_STAGES_IDS, NULL, 0, &sizeWritten); - int nbStages = int(sizeWritten/sizeof(int)); + int nbStages = int(sizeWritten / sizeof(int)); std::vector stagesA(nbStages == 0 ? 1 : nbStages); if (nbStages == 0) { stagesA[0] = CUBLASLT_MATMUL_STAGES_UNDEFINED; nbStages = 1; - } else { - cublasLtMatmulAlgoCapGetAttribute(&algo, CUBLASLT_ALGO_CAP_STAGES_IDS, stagesA.data(), sizeof(int)*nbStages, &sizeWritten); + } + else { + cublasLtMatmulAlgoCapGetAttribute( + &algo, CUBLASLT_ALGO_CAP_STAGES_IDS, stagesA.data(), sizeof(int) * nbStages, &sizeWritten); } #endif int splitkSupport, redMask, swizzlingMax, customOptionMax; // Retrieve Algo Capabilities attributes to be able to setup loop over the different combinations - cublasLtMatmulAlgoCapGetAttribute(&algo, CUBLASLT_ALGO_CAP_TILE_IDS, tileA, sizeof(int)*nbTiles, &sizeWritten); - cublasLtMatmulAlgoCapGetAttribute(&algo, CUBLASLT_ALGO_CAP_SPLITK_SUPPORT, &splitkSupport, sizeof(splitkSupport), &sizeWritten); - cublasLtMatmulAlgoCapGetAttribute(&algo, CUBLASLT_ALGO_CAP_REDUCTION_SCHEME_MASK, &redMask, sizeof(redMask), &sizeWritten); - cublasLtMatmulAlgoCapGetAttribute(&algo, CUBLASLT_ALGO_CAP_CTA_SWIZZLING_SUPPORT, &swizzlingMax, sizeof(swizzlingMax), &sizeWritten); - cublasLtMatmulAlgoCapGetAttribute(&algo, CUBLASLT_ALGO_CAP_CUSTOM_OPTION_MAX, &customOptionMax, sizeof(customOptionMax), &sizeWritten); - /* Loop over the different tiles */ + cublasLtMatmulAlgoCapGetAttribute( + &algo, CUBLASLT_ALGO_CAP_TILE_IDS, tileA, sizeof(int) * nbTiles, &sizeWritten); + cublasLtMatmulAlgoCapGetAttribute( + &algo, CUBLASLT_ALGO_CAP_SPLITK_SUPPORT, &splitkSupport, sizeof(splitkSupport), &sizeWritten); + cublasLtMatmulAlgoCapGetAttribute( + &algo, CUBLASLT_ALGO_CAP_REDUCTION_SCHEME_MASK, &redMask, sizeof(redMask), &sizeWritten); + cublasLtMatmulAlgoCapGetAttribute( + &algo, CUBLASLT_ALGO_CAP_CTA_SWIZZLING_SUPPORT, &swizzlingMax, sizeof(swizzlingMax), &sizeWritten); + cublasLtMatmulAlgoCapGetAttribute( + &algo, CUBLASLT_ALGO_CAP_CUSTOM_OPTION_MAX, &customOptionMax, sizeof(customOptionMax), &sizeWritten); + /* Loop over the different tiles */ for (int tileIdx = 0; tileIdx < nbTiles; tileIdx++) { -#ifdef CUDA11_MODE - /* Loop over different stages count */ - for (int stagesIdx = 0; stagesIdx < nbStages; stagesIdx++) { - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &stagesA[stagesIdx], sizeof(stagesA[stagesIdx])); +#if (CUDART_VERSION >= 11000) + /* Loop over different stages count */ + for (int stagesIdx = 0; stagesIdx < nbStages; stagesIdx++) { + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &stagesA[stagesIdx], sizeof(stagesA[stagesIdx])); #endif - /* Loop over the different custom option if any */ - for (int customOption = 0; customOption <= customOptionMax; customOption++) { - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &customOption, sizeof(customOption)); - /* Loop over the CTAs swizzling support */ - for (int k = 0; k <= swizzlingMax; k++) { - int splitK_trial = 0; - if (splitkSupport) { - splitK_trial += sizeof(splitKSequenceA) / sizeof(splitKSequenceA[0]); - } - // Loop over the splitK value over a fixed sequence splitKSequenceA in addtion to the case where splitK is not enabled - for (int l = 0; (l < (1 + splitK_trial)) && (AlgoCount < AlgoCombinations); l++) { - /* Setup attribute of the algo to run */ - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_TILE_ID, &tileA[tileIdx], sizeof(tileA[tileIdx])); - int splitK_val = 0; - int redScheme = CUBLASLT_REDUCTION_SCHEME_NONE; - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &splitK_val, sizeof(splitK_val)); - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &k, sizeof(k)); - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &redScheme, sizeof(int)); - - if (l > 0) { // Split-K case - splitK_val = splitKSequenceA[l - 1]; - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &splitKSequenceA[l - 1], sizeof(splitKSequenceA[l - 1])); - /* Going over all the reduction scheme */ - for (redScheme = 1 ; redScheme <= (int)CUBLASLT_REDUCTION_SCHEME_MASK && (AlgoCount < AlgoCombinations); redScheme = redScheme << 1) { - if (redScheme & redMask) { - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &redScheme, sizeof(redScheme)); - status = customMatmulRun( ltHandle, - operationDesc, - alpha, /* host or device pointer */ - A, Adesc, - B, Bdesc, - beta, /* host or device pointer */ - C, Cdesc, - C, Cdesc, - algo, - kernelRepeats, - workSpace, - workSpaceSize, - perfResults[AlgoCount], - stream); + /* Loop over the different custom option if any */ + for (int customOption = 0; customOption <= customOptionMax; customOption++) { + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &customOption, sizeof(customOption)); + /* Loop over the CTAs swizzling support */ + for (int k = 0; k <= swizzlingMax; k++) { + int splitK_trial = 0; + if (splitkSupport) { + splitK_trial += sizeof(splitKSequenceA) / sizeof(splitKSequenceA[0]); + } + // Loop over the splitK value over a fixed sequence splitKSequenceA in addtion to the case where + // splitK is not enabled + for (int l = 0; (l < (1 + splitK_trial)) && (AlgoCount < AlgoCombinations); l++) { + /* Setup attribute of the algo to run */ + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_TILE_ID, &tileA[tileIdx], sizeof(tileA[tileIdx])); + int splitK_val = 0; + int redScheme = CUBLASLT_REDUCTION_SCHEME_NONE; + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &splitK_val, sizeof(splitK_val)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &k, sizeof(k)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &redScheme, sizeof(int)); + + if (l > 0) { // Split-K case + splitK_val = splitKSequenceA[l - 1]; + cublasLtMatmulAlgoConfigSetAttribute(&algo, + CUBLASLT_ALGO_CONFIG_SPLITK_NUM, + &splitKSequenceA[l - 1], + sizeof(splitKSequenceA[l - 1])); + /* Going over all the reduction scheme */ + for (redScheme = 1; + redScheme <= (int)CUBLASLT_REDUCTION_SCHEME_MASK && (AlgoCount < AlgoCombinations); + redScheme = redScheme << 1) { + if (redScheme & redMask) { + cublasLtMatmulAlgoConfigSetAttribute(&algo, + CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, + &redScheme, + sizeof(redScheme)); + status = customMatmulRun(ltHandle, + operationDesc, + alpha, /* host or device pointer */ + A, + Adesc, + B, + Bdesc, + beta, /* host or device pointer */ + C, + Cdesc, + C, + Cdesc, + algo, + kernelRepeats, + workSpace, + workSpaceSize, + perfResults[AlgoCount], + stream); + perfResults[AlgoCount].status = status; + if (status == CUBLAS_STATUS_SUCCESS) { + AlgoCount++; + } + } // end if + } // end for + } + else { // Non-splitK case + /* if user preference is ok with workspace */ + if (AlgoCount < AlgoCombinations) { + status = customMatmulRun(ltHandle, + operationDesc, + alpha, /* host or device pointer */ + A, + Adesc, + B, + Bdesc, + beta, /* host or device pointer */ + C, + Cdesc, + C, + Cdesc, + algo, + kernelRepeats, + workSpace, + workSpaceSize, + perfResults[AlgoCount], + stream); perfResults[AlgoCount].status = status; - if (status == CUBLAS_STATUS_SUCCESS) AlgoCount++; - } // end if - } // end for - } else { // Non-splitK case - /* if user preference is ok with workspace */ - if (AlgoCount < AlgoCombinations) { - status = customMatmulRun( ltHandle, - operationDesc, - alpha, /* host or device pointer */ - A, Adesc, - B, Bdesc, - beta, /* host or device pointer */ - C, Cdesc, - C, Cdesc, - algo, - kernelRepeats, - workSpace, - workSpaceSize, - perfResults[AlgoCount], - stream); - perfResults[AlgoCount].status = status; - if (status == CUBLAS_STATUS_SUCCESS) AlgoCount++; + if (status == CUBLAS_STATUS_SUCCESS) { + AlgoCount++; + } + } } - } - } // end l - } // end k - } //end customOption -#ifdef CUDA11_MODE - } // end stagesIdx -#endif - } // end tileIdx - delete [] tileA; - } // end idx - // Sort the results per run duration + } // end l + } // end k + } // end customOption +#if (CUDART_VERSION >= 11000) + } // end stagesIdx +#endif + } // end tileIdx + delete[] tileA; + } // end idx + // Sort the results per run duration std::sort(perfResults, perfResults + AlgoCount, time_compare); // Print timing and perf details - for (int i = 0, hasPrint = 0; i < AlgoCount; i++) { - printf( "result %03d : ", i); - hasPrint = printPerfStructure(m, n, k, perfResults[i], fout, hasPrint); + for (int i = 0, hasPrint = 0; i < AlgoCount; i++) { + printf("result %03d : ", i); + hasPrint = printPerfStructure(m, n, k, perfResults[i], fout, hasPrint); } CLEANUP: // Descriptors are no longer needed as all GPU work was already enqueued - if (Cdesc) cublasLtMatrixLayoutDestroy(Cdesc); - if (Bdesc) cublasLtMatrixLayoutDestroy(Bdesc); - if (Adesc) cublasLtMatrixLayoutDestroy(Adesc); - if (operationDesc) cublasLtMatmulDescDestroy(operationDesc); + if (Cdesc) { + cublasLtMatrixLayoutDestroy(Cdesc); + } + if (Bdesc) { + cublasLtMatrixLayoutDestroy(Bdesc); + } + if (Adesc) { + cublasLtMatrixLayoutDestroy(Adesc); + } + if (operationDesc) { + cublasLtMatmulDescDestroy(operationDesc); + } return status == CUBLAS_STATUS_SUCCESS ? 0 : 1; } -int -LtBatchIgemmCustomFind(cublasLtHandle_t ltHandle, - int batchCount, - int m, - int n, - int k, - const int *alpha, /* host pointer */ - const int8_t *A, - const int8_t *B, - const int *beta, /* host pointer */ - int32_t *C, - void *workSpace, - size_t workSpaceSize, - FILE *fout) +template int LtIgemmCustomFind(cublasLtHandle_t ltHandle, + int m, + int n, + int k, + const int* alpha, /* host pointer */ + const int8_t* A, + const int8_t* B, + const int* beta, /* host pointer */ + int32_t* C, + void* workSpace, + size_t workSpaceSize, + FILE* fout); + +template int LtIgemmCustomFind(cublasLtHandle_t ltHandle, + int m, + int n, + int k, + const float* alpha, /* host pointer */ + const int8_t* A, + const int8_t* B, + const float* beta, /* host pointer */ + int8_t* C, + void* workSpace, + size_t workSpaceSize, + FILE* fout); + +template +int LtBatchIgemmCustomFind(cublasLtHandle_t ltHandle, + int batchCount, + int m, + int n, + int k, + const scaleT* alpha, /* host pointer */ + const int8_t* A, + const int8_t* B, + const scaleT* beta, /* host pointer */ + T* C, + void* workSpace, + size_t workSpaceSize, + FILE* fout) { cublasStatus_t status = CUBLAS_STATUS_SUCCESS; - + cublasLtMatmulDesc_t operationDesc = NULL; cublasLtMatrixLayout_t Adesc = NULL, Bdesc = NULL, Cdesc = NULL; cudaStream_t stream = 0; // SplitK value that we are going to try when SplitK is supported for a given algo const int splitKSequenceA[] = {2, 3, 4, 5, 6, 8, 12, 16, 32}; - // Let try a fixed number of combinations - #define ALGO_COMBINATIONS 50000 + // Let try a fixed number of combinations +#define ALGO_COMBINATIONS 50000 int AlgoCombinations = ALGO_COMBINATIONS; int AlgoCount = 0; - int kernelRepeats = 100; //number of time the CUDA kernels will be run back to back + int kernelRepeats = 100; // number of time the CUDA kernels will be run back to back customMatmulPerf_t perfResults[ALGO_COMBINATIONS]; int nbAlgoIds = 0; - #define ALGO_IDS 100 +#define ALGO_IDS 100 int algoIdA[ALGO_IDS]; - cudaDataType_t scaleType = CUDA_R_32I, Atype = CUDA_R_8I, Btype = CUDA_R_8I, Ctype = CUDA_R_32I; -#ifdef CUDA11_MODE - cublasComputeType_t computeType = CUBLAS_COMPUTE_32I; + + cudaDataType_t Atype, Btype, Ctype, scaleType; + Atype = CUDA_R_8I; + Btype = CUDA_R_8I; + + if (std::is_same::value && std::is_same::value) { + Ctype = CUDA_R_32I; + scaleType = CUDA_R_32I; + } + else if (std::is_same::value && std::is_same::value) { + Ctype = CUDA_R_8I; + scaleType = CUDA_R_32F; + } + else { + printf("[ERROR] of igemm is invalid\n"); + exit(-1); + } + +#if (CUDART_VERSION >= 11000) + cublasComputeType_t computeType = CUBLAS_COMPUTE_32I; #else cudaDataType_t computeType = CUDA_R_32I; #endif cublasOperation_t opTranspose = CUBLAS_OP_T; bool use_ORDER_COL32_2R_4R4 = false; -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) int device{-1}; cudaGetDevice(&device); cudaDeviceProp props; cudaGetDeviceProperties(&props, device); - if (props.major * 10 + props.minor >= 80){ - use_ORDER_COL32_2R_4R4 = true; + if (props.major * 10 + props.minor >= 80) { + use_ORDER_COL32_2R_4R4 = true; } -#endif - cublasLtOrder_t order_COL32 = CUBLASLT_ORDER_COL32; +#endif + cublasLtOrder_t order_COL32 = CUBLASLT_ORDER_COL32; cublasLtOrder_t order_matrixB; -#ifdef CUDA11_MODE - if (use_ORDER_COL32_2R_4R4) - order_matrixB = CUBLASLT_ORDER_COL32_2R_4R4; - else - order_matrixB = CUBLASLT_ORDER_COL4_4R2_8C; +#if (CUDART_VERSION >= 11000) + if (use_ORDER_COL32_2R_4R4) { + order_matrixB = CUBLASLT_ORDER_COL32_2R_4R4; + } + else { + order_matrixB = CUBLASLT_ORDER_COL4_4R2_8C; + } #else order_matrixB = CUBLASLT_ORDER_COL4_4R2_8C; #endif - + int ldaTransform = 32 * m; int ldbTransform; - if (use_ORDER_COL32_2R_4R4) - ldbTransform = 32 * ((n + 32 - 1) / 32) * 32; - else - ldbTransform = 32 * ((n + 8 - 1) / 8) * 8; + if (use_ORDER_COL32_2R_4R4) { + ldbTransform = 32 * ((n + 32 - 1) / 32) * 32; + } + else { + ldbTransform = 32 * ((n + 8 - 1) / 8) * 8; + } int ldcTransform = 32 * m; int64_t stridea, strideb, stridec; - stridea = m*k; - strideb = n*k; - stridec = m*n; + stridea = m * k; + strideb = n * k; + stridec = m * n; -#ifdef CUDA11_MODE - status = cublasLtMatmulDescCreate(&operationDesc, computeType, CUDA_R_32I); +#if (CUDART_VERSION >= 11000) + status = cublasLtMatmulDescCreate(&operationDesc, computeType, scaleType); #else - status = cublasLtMatmulDescCreate(&operationDesc, CUDA_R_32I); + status = cublasLtMatmulDescCreate(&operationDesc, scaleType); #endif - if (status != CUBLAS_STATUS_SUCCESS) goto CLEANUP; - cublasLtMatmulDescSetAttribute(operationDesc, CUBLASLT_MATMUL_DESC_TRANSB, &opTranspose, sizeof(cublasOperation_t)); - - // Create matrix descriptors. + if (status != CUBLAS_STATUS_SUCCESS) { + goto CLEANUP; + } + cublasLtMatmulDescSetAttribute(operationDesc, CUBLASLT_MATMUL_DESC_TRANSB, &opTranspose, sizeof(cublasOperation_t)); + + // Create matrix descriptors. status = cublasLtMatrixLayoutCreate(&Adesc, Atype, m, k, ldaTransform); - if (status != CUBLAS_STATUS_SUCCESS) goto CLEANUP; - status = cublasLtMatrixLayoutSetAttribute(Adesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_COL32, sizeof(order_COL32)); - if (status != CUBLAS_STATUS_SUCCESS) goto CLEANUP; - cublasLtMatrixLayoutSetAttribute(Adesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount)); + if (status != CUBLAS_STATUS_SUCCESS) { + goto CLEANUP; + } + status = cublasLtMatrixLayoutSetAttribute(Adesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_COL32, sizeof(order_COL32)); + if (status != CUBLAS_STATUS_SUCCESS) { + goto CLEANUP; + } + cublasLtMatrixLayoutSetAttribute(Adesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount)); cublasLtMatrixLayoutSetAttribute(Adesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &stridea, sizeof(stridea)); - - + status = cublasLtMatrixLayoutCreate(&Bdesc, Btype, n, k, ldbTransform); - if (status != CUBLAS_STATUS_SUCCESS) goto CLEANUP; - status = cublasLtMatrixLayoutSetAttribute(Bdesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_matrixB, sizeof(order_matrixB)); - if (status != CUBLAS_STATUS_SUCCESS) goto CLEANUP; - cublasLtMatrixLayoutSetAttribute(Bdesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount)); + if (status != CUBLAS_STATUS_SUCCESS) { + goto CLEANUP; + } + status = + cublasLtMatrixLayoutSetAttribute(Bdesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_matrixB, sizeof(order_matrixB)); + if (status != CUBLAS_STATUS_SUCCESS) { + goto CLEANUP; + } + cublasLtMatrixLayoutSetAttribute(Bdesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount)); cublasLtMatrixLayoutSetAttribute(Bdesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &strideb, sizeof(strideb)); - + status = cublasLtMatrixLayoutCreate(&Cdesc, Ctype, m, n, ldcTransform); - if (status != CUBLAS_STATUS_SUCCESS) goto CLEANUP; - status = cublasLtMatrixLayoutSetAttribute(Cdesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_COL32, sizeof(order_COL32)); - if (status != CUBLAS_STATUS_SUCCESS) goto CLEANUP; + if (status != CUBLAS_STATUS_SUCCESS) { + goto CLEANUP; + } + status = cublasLtMatrixLayoutSetAttribute(Cdesc, CUBLASLT_MATRIX_LAYOUT_ORDER, &order_COL32, sizeof(order_COL32)); + if (status != CUBLAS_STATUS_SUCCESS) { + goto CLEANUP; + } cublasLtMatrixLayoutSetAttribute(Cdesc, CUBLASLT_MATRIX_LAYOUT_BATCH_COUNT, &batchCount, sizeof(batchCount)); cublasLtMatrixLayoutSetAttribute(Cdesc, CUBLASLT_MATRIX_LAYOUT_STRIDED_BATCH_OFFSET, &stridec, sizeof(stridec)); - - // Request AlgoId available for IGEMM - status = cublasLtMatmulAlgoGetIds(ltHandle, computeType, scaleType, Atype, Btype, Ctype, Ctype, ALGO_IDS, algoIdA, &nbAlgoIds); - if (status != CUBLAS_STATUS_SUCCESS) goto CLEANUP; - + + // Request AlgoId available for IGEMM + status = cublasLtMatmulAlgoGetIds( + ltHandle, computeType, scaleType, Atype, Btype, Ctype, Ctype, ALGO_IDS, algoIdA, &nbAlgoIds); + if (status != CUBLAS_STATUS_SUCCESS) { + goto CLEANUP; + } + // Loop over the Algo IDs - for (int idx = 0; (idx < nbAlgoIds) && (AlgoCount < AlgoCombinations); idx++) { + for (int idx = 0; (idx < nbAlgoIds) && (AlgoCount < AlgoCombinations); idx++) { cublasLtMatmulAlgo_t algo; size_t sizeWritten = 0; /* Initialize algo structure with given Algp ID */ - status = cublasLtMatmulAlgoInit(ltHandle, computeType, scaleType, Atype, Btype, Ctype, Ctype, algoIdA[idx], &algo); + status = + cublasLtMatmulAlgoInit(ltHandle, computeType, scaleType, Atype, Btype, Ctype, Ctype, algoIdA[idx], &algo); if (status != CUBLAS_STATUS_SUCCESS) { continue; } // Query the tiles enums supported by that algo - cublasLtMatmulAlgoCapGetAttribute( &algo, CUBLASLT_ALGO_CAP_TILE_IDS, NULL, 0, &sizeWritten); - int nbTiles = int(sizeWritten/sizeof(int)); - int *tileA = new int[ nbTiles == 0 ? 1:nbTiles]; - if(nbTiles == 0){ + cublasLtMatmulAlgoCapGetAttribute(&algo, CUBLASLT_ALGO_CAP_TILE_IDS, NULL, 0, &sizeWritten); + int nbTiles = int(sizeWritten / sizeof(int)); + int* tileA = new int[nbTiles == 0 ? 1 : nbTiles]; + if (nbTiles == 0) { tileA[0] = CUBLASLT_MATMUL_TILE_UNDEFINED; nbTiles = 1; } -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) cublasLtMatmulAlgoCapGetAttribute(&algo, CUBLASLT_ALGO_CAP_STAGES_IDS, NULL, 0, &sizeWritten); - int nbStages = int(sizeWritten/sizeof(int)); + int nbStages = int(sizeWritten / sizeof(int)); std::vector stagesA(nbStages == 0 ? 1 : nbStages); if (nbStages == 0) { stagesA[0] = CUBLASLT_MATMUL_STAGES_UNDEFINED; nbStages = 1; - } else { - cublasLtMatmulAlgoCapGetAttribute(&algo, CUBLASLT_ALGO_CAP_STAGES_IDS, stagesA.data(), sizeof(int)*nbStages, &sizeWritten); + } + else { + cublasLtMatmulAlgoCapGetAttribute( + &algo, CUBLASLT_ALGO_CAP_STAGES_IDS, stagesA.data(), sizeof(int) * nbStages, &sizeWritten); } #endif int splitkSupport, redMask, swizzlingMax, customOptionMax; // Retrieve Algo Capabilities attributes to be able to setup loop over the different combinations - cublasLtMatmulAlgoCapGetAttribute(&algo, CUBLASLT_ALGO_CAP_TILE_IDS, tileA, sizeof(int)*nbTiles, &sizeWritten); - cublasLtMatmulAlgoCapGetAttribute(&algo, CUBLASLT_ALGO_CAP_SPLITK_SUPPORT, &splitkSupport, sizeof(splitkSupport), &sizeWritten); - cublasLtMatmulAlgoCapGetAttribute(&algo, CUBLASLT_ALGO_CAP_REDUCTION_SCHEME_MASK, &redMask, sizeof(redMask), &sizeWritten); - cublasLtMatmulAlgoCapGetAttribute(&algo, CUBLASLT_ALGO_CAP_CTA_SWIZZLING_SUPPORT, &swizzlingMax, sizeof(swizzlingMax), &sizeWritten); - cublasLtMatmulAlgoCapGetAttribute(&algo, CUBLASLT_ALGO_CAP_CUSTOM_OPTION_MAX, &customOptionMax, sizeof(customOptionMax), &sizeWritten); - /* Loop over the different tiles */ + cublasLtMatmulAlgoCapGetAttribute( + &algo, CUBLASLT_ALGO_CAP_TILE_IDS, tileA, sizeof(int) * nbTiles, &sizeWritten); + cublasLtMatmulAlgoCapGetAttribute( + &algo, CUBLASLT_ALGO_CAP_SPLITK_SUPPORT, &splitkSupport, sizeof(splitkSupport), &sizeWritten); + cublasLtMatmulAlgoCapGetAttribute( + &algo, CUBLASLT_ALGO_CAP_REDUCTION_SCHEME_MASK, &redMask, sizeof(redMask), &sizeWritten); + cublasLtMatmulAlgoCapGetAttribute( + &algo, CUBLASLT_ALGO_CAP_CTA_SWIZZLING_SUPPORT, &swizzlingMax, sizeof(swizzlingMax), &sizeWritten); + cublasLtMatmulAlgoCapGetAttribute( + &algo, CUBLASLT_ALGO_CAP_CUSTOM_OPTION_MAX, &customOptionMax, sizeof(customOptionMax), &sizeWritten); + /* Loop over the different tiles */ for (int tileIdx = 0; tileIdx < nbTiles; tileIdx++) { -#ifdef CUDA11_MODE - /* Loop over different stages count */ - for (int stagesIdx = 0; stagesIdx < nbStages; stagesIdx++) { - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &stagesA[stagesIdx], sizeof(stagesA[stagesIdx])); +#if (CUDART_VERSION >= 11000) + /* Loop over different stages count */ + for (int stagesIdx = 0; stagesIdx < nbStages; stagesIdx++) { + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &stagesA[stagesIdx], sizeof(stagesA[stagesIdx])); #endif - /* Loop over the different custom option if any */ - for (int customOption = 0; customOption <= customOptionMax; customOption++) { - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &customOption, sizeof(customOption)); - /* Loop over the CTAs swizzling support */ - for (int k = 0; k <= swizzlingMax; k++) { - int splitK_trial = 0; - if (splitkSupport) { - splitK_trial += sizeof(splitKSequenceA) / sizeof(splitKSequenceA[0]); - } - // Loop over the splitK value over a fixed sequence splitKSequenceA in addtion to the case where splitK is not enabled - for (int l = 0; (l < (1 + splitK_trial)) && (AlgoCount < AlgoCombinations); l++) { - /* Setup attribute of the algo to run */ - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_TILE_ID, &tileA[tileIdx], sizeof(tileA[tileIdx])); - int splitK_val = 0; - int redScheme = CUBLASLT_REDUCTION_SCHEME_NONE; - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &splitK_val, sizeof(splitK_val)); - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &k, sizeof(k)); - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &redScheme, sizeof(int)); - - if (l > 0) { // Split-K case - splitK_val = splitKSequenceA[l - 1]; - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &splitKSequenceA[l - 1], sizeof(splitKSequenceA[l - 1])); - /* Going over all the reduction scheme */ - for (redScheme = 1 ; redScheme <= (int)CUBLASLT_REDUCTION_SCHEME_MASK && (AlgoCount < AlgoCombinations); redScheme = redScheme << 1) { - if (redScheme & redMask) { - cublasLtMatmulAlgoConfigSetAttribute(&algo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &redScheme, sizeof(redScheme)); - status = customMatmulRun( ltHandle, - operationDesc, - alpha, /* host or device pointer */ - A, Adesc, - B, Bdesc, - beta, /* host or device pointer */ - C, Cdesc, - C, Cdesc, - algo, - kernelRepeats, - workSpace, - workSpaceSize, - perfResults[AlgoCount], - stream); + /* Loop over the different custom option if any */ + for (int customOption = 0; customOption <= customOptionMax; customOption++) { + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &customOption, sizeof(customOption)); + /* Loop over the CTAs swizzling support */ + for (int k = 0; k <= swizzlingMax; k++) { + int splitK_trial = 0; + if (splitkSupport) { + splitK_trial += sizeof(splitKSequenceA) / sizeof(splitKSequenceA[0]); + } + // Loop over the splitK value over a fixed sequence splitKSequenceA in addtion to the case where + // splitK is not enabled + for (int l = 0; (l < (1 + splitK_trial)) && (AlgoCount < AlgoCombinations); l++) { + /* Setup attribute of the algo to run */ + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_TILE_ID, &tileA[tileIdx], sizeof(tileA[tileIdx])); + int splitK_val = 0; + int redScheme = CUBLASLT_REDUCTION_SCHEME_NONE; + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_SPLITK_NUM, &splitK_val, sizeof(splitK_val)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &k, sizeof(k)); + cublasLtMatmulAlgoConfigSetAttribute( + &algo, CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, &redScheme, sizeof(int)); + + if (l > 0) { // Split-K case + splitK_val = splitKSequenceA[l - 1]; + cublasLtMatmulAlgoConfigSetAttribute(&algo, + CUBLASLT_ALGO_CONFIG_SPLITK_NUM, + &splitKSequenceA[l - 1], + sizeof(splitKSequenceA[l - 1])); + /* Going over all the reduction scheme */ + for (redScheme = 1; + redScheme <= (int)CUBLASLT_REDUCTION_SCHEME_MASK && (AlgoCount < AlgoCombinations); + redScheme = redScheme << 1) { + if (redScheme & redMask) { + cublasLtMatmulAlgoConfigSetAttribute(&algo, + CUBLASLT_ALGO_CONFIG_REDUCTION_SCHEME, + &redScheme, + sizeof(redScheme)); + status = customMatmulRun(ltHandle, + operationDesc, + alpha, /* host or device pointer */ + A, + Adesc, + B, + Bdesc, + beta, /* host or device pointer */ + C, + Cdesc, + C, + Cdesc, + algo, + kernelRepeats, + workSpace, + workSpaceSize, + perfResults[AlgoCount], + stream); + perfResults[AlgoCount].status = status; + if (status == CUBLAS_STATUS_SUCCESS) { + AlgoCount++; + } + } // end if + } // end for + } + else { // Non-splitK case + /* if user preference is ok with workspace */ + if (AlgoCount < AlgoCombinations) { + status = customMatmulRun(ltHandle, + operationDesc, + alpha, /* host or device pointer */ + A, + Adesc, + B, + Bdesc, + beta, /* host or device pointer */ + C, + Cdesc, + C, + Cdesc, + algo, + kernelRepeats, + workSpace, + workSpaceSize, + perfResults[AlgoCount], + stream); perfResults[AlgoCount].status = status; - if (status == CUBLAS_STATUS_SUCCESS) AlgoCount++; - } // end if - } // end for - } else { // Non-splitK case - /* if user preference is ok with workspace */ - if (AlgoCount < AlgoCombinations) { - status = customMatmulRun( ltHandle, - operationDesc, - alpha, /* host or device pointer */ - A, Adesc, - B, Bdesc, - beta, /* host or device pointer */ - C, Cdesc, - C, Cdesc, - algo, - kernelRepeats, - workSpace, - workSpaceSize, - perfResults[AlgoCount], - stream); - perfResults[AlgoCount].status = status; - if (status == CUBLAS_STATUS_SUCCESS) AlgoCount++; + if (status == CUBLAS_STATUS_SUCCESS) { + AlgoCount++; + } + } } - } - } // end l - } // end k - } //end customOption -#ifdef CUDA11_MODE - } // end stagesIdx + } // end l + } // end k + } // end customOption +#if (CUDART_VERSION >= 11000) + } // end stagesIdx #endif - } // end tileIdx - delete [] tileA; - } // end idx - // Sort the results per run duration + } // end tileIdx + delete[] tileA; + } // end idx + // Sort the results per run duration std::sort(perfResults, perfResults + AlgoCount, time_compare); - // Print timing and perf details - for (int i = 0, hasPrint = 0; i < AlgoCount; i++) { - printf( "result %03d : ", i); - hasPrint = printBatchPerfStructure(batchCount, m, n, k, perfResults[i], fout, hasPrint); + // Print timing and perf details + for (int i = 0, hasPrint = 0; i < AlgoCount; i++) { + printf("result %03d : ", i); + hasPrint = printBatchPerfStructure(batchCount, m, n, k, perfResults[i], fout, hasPrint); } CLEANUP: // Descriptors are no longer needed as all GPU work was already enqueued - if (Cdesc) cublasLtMatrixLayoutDestroy(Cdesc); - if (Bdesc) cublasLtMatrixLayoutDestroy(Bdesc); - if (Adesc) cublasLtMatrixLayoutDestroy(Adesc); - if (operationDesc) cublasLtMatmulDescDestroy(operationDesc); + if (Cdesc) { + cublasLtMatrixLayoutDestroy(Cdesc); + } + if (Bdesc) { + cublasLtMatrixLayoutDestroy(Bdesc); + } + if (Adesc) { + cublasLtMatrixLayoutDestroy(Adesc); + } + if (operationDesc) { + cublasLtMatmulDescDestroy(operationDesc); + } return status == CUBLAS_STATUS_SUCCESS ? 0 : 1; } +template int LtBatchIgemmCustomFind(cublasLtHandle_t ltHandle, + int batchCount, + int m, + int n, + int k, + const int* alpha, /* host pointer */ + const int8_t* A, + const int8_t* B, + const int* beta, /* host pointer */ + int32_t* C, + void* workSpace, + size_t workSpaceSize, + FILE* fout); + +template int LtBatchIgemmCustomFind(cublasLtHandle_t ltHandle, + int batchCount, + int m, + int n, + int k, + const float* alpha, /* host pointer */ + const int8_t* A, + const int8_t* B, + const float* beta, /* host pointer */ + int8_t* C, + void* workSpace, + size_t workSpaceSize, + FILE* fout); + // initialize matrix in column-major -void matInit(int rows, int cols, int8_t *p, int ld) +void matInit(int rows, int cols, int8_t* p, int ld) { - srand(time(NULL)); + srand(time(NULL)); - for (int c=0; c= 7.5 + + // ensure program running on SM >= 7.5 struct cudaDeviceProp prop; check_cuda_error(cudaGetDeviceProperties(&prop, 0)); - if (!(prop.major >= 8 || (prop.major >= 7 && prop.minor >= 5))) - { - printf("[ERROR] INT8 mode > 0 is only supported on device with sm >= 7.5\n "); - exit(-1); + if (!(prop.major >= 8 || (prop.major >= 7 && prop.minor >= 5))) { + printf("[ERROR] INT8 mode > 0 is only supported on device with sm >= 7.5\n "); + exit(-1); } printf("Device %s\n", prop.name); - - //check config - FILE *fout; - if (!isAppend) - { - fout = fopen(IGEMM_CONFIG, "w+"); - fprintf(fout, "batch_size seq_len head_num size_per_head dataType ### batchCount m n k algoId customOption tile splitK_val swizzle reductionScheme workspaceSize stages exec_time\n"); - } - else - { - fout = fopen(IGEMM_CONFIG, "a+"); - std::vector config; - char line[1024]; - while (fgets(line, 1024, fout) != NULL){ - config.push_back(std::string(line)); - } - if (config.size() >= MAX_CONFIG_NUM*GEMM_NUM) - { - int startIdx = config.size() - (MAX_CONFIG_NUM - 1)*GEMM_NUM; - fclose(fout); + + // check config + FILE* fout; + if (!isAppend) { fout = fopen(IGEMM_CONFIG, "w+"); - for (int i = startIdx ; i < (int)config.size() ; i++) - { - fprintf(fout, "%s", config[i].c_str()); + fprintf( + fout, + "batch_size seq_len head_num size_per_head dataType ### batchCount m n k algoId customOption tile splitK_val swizzle reductionScheme workspaceSize stages exec_time\n"); + } + else { + fout = fopen(IGEMM_CONFIG, "a+"); + std::vector config; + char line[1024]; + while (fgets(line, 1024, fout) != NULL) { + config.push_back(std::string(line)); + } + if (config.size() >= MAX_CONFIG_NUM * GEMM_NUM) { + int startIdx = config.size() - (MAX_CONFIG_NUM - 1) * GEMM_NUM; + fclose(fout); + fout = fopen(IGEMM_CONFIG, "w+"); + for (int i = startIdx; i < (int)config.size(); i++) { + fprintf(fout, "%s", config[i].c_str()); + } } - } } - + batch_size_ = batch_size; seq_len_ = seq_len; head_num_ = head_num; - size_per_head_ = size_per_head; - int m = batch_size*seq_len; - int n = head_num*size_per_head; + size_per_head_ = size_per_head; + int m = batch_size * seq_len; + int n = head_num * size_per_head; int k = n; int batchCount; - + printf("***Encoder IGemm Testing Begin***\n"); printf("\n-----------------------------\n"); - + batchCount = 3; - m = batch_size*seq_len; - k = head_num*size_per_head; + m = batch_size * seq_len; + k = head_num * size_per_head; n = k; - if (n%32 != 0 || k%32 != 0) - { - printf("[WARNING] For INT8 gemm test, n, k should be multiples of 32 (n = %d, k = %d)\n", n, k); - } - else - { - batch_igemm_config(batchCount,m,n,k,fout,buffer); - } - + if (n % 32 != 0 || k % 32 != 0) { + printf("[WARNING] For INT8 gemm test, n, k should be multiples of 32 (n = %d, k = %d)\n", n, k); + } + else { + batch_igemm_config(batchCount, m, n, k, fout, buffer); + } + printf("\n-----------------------------\n"); m = seq_len; n = seq_len; k = size_per_head; - batchCount = batch_size*head_num; - if (n%32 != 0 || k%32 != 0) - { - printf("[WARNING] For INT8 gemm test, n, k should be multiples of 32 (n = %d, k = %d)\n", n, k); + batchCount = batch_size * head_num; + if (n % 32 != 0 || k % 32 != 0) { + printf("[WARNING] For INT8 gemm test, n, k should be multiples of 32 (n = %d, k = %d)\n", n, k); } - else - { - batch_igemm_config(batchCount,m,n,k,fout,buffer); + else { + batch_igemm_config(batchCount, m, n, k, fout, buffer); } - printf("\n-----------------------------\n"); m = seq_len; n = size_per_head; k = seq_len; - batchCount = batch_size*head_num; - if (n%32 != 0 || k%32 != 0) - { - printf("[WARNING] For INT8 gemm test, n, k should be multiples of 32 (n = %d, k = %d)\n", n, k); + batchCount = batch_size * head_num; + if (n % 32 != 0 || k % 32 != 0) { + printf("[WARNING] For INT8 gemm test, n, k should be multiples of 32 (n = %d, k = %d)\n", n, k); } - else - { - batch_igemm_config(batchCount,m,n,k,fout,buffer); + else { + batch_igemm_config(batchCount, m, n, k, fout, buffer); } - printf("\n-----------------------------\n"); - m = batch_size*seq_len; - n = head_num*size_per_head; - k = head_num*size_per_head; - if (n%32 != 0 || k%32 != 0) - { - printf("[WARNING] For INT8 gemm test, n, k should be multiples of 32 (n = %d, k = %d)\n", n, k); + m = batch_size * seq_len; + n = head_num * size_per_head; + k = head_num * size_per_head; + if (n % 32 != 0 || k % 32 != 0) { + printf("[WARNING] For INT8 gemm test, n, k should be multiples of 32 (n = %d, k = %d)\n", n, k); } - else - { - igemm_config(m,n,k,fout,buffer); + else { + igemm_config(m, n, k, fout, buffer); } - printf("\n-----------------------------\n"); - n = 4*n; - if (n%32 != 0 || k%32 != 0) - { - printf("[WARNING] For INT8 gemm test, n, k should be multiples of 32 (n = %d, k = %d)\n", n, k); + n = 4 * n; + if (n % 32 != 0 || k % 32 != 0) { + printf("[WARNING] For INT8 gemm test, n, k should be multiples of 32 (n = %d, k = %d)\n", n, k); + } + else { + igemm_config(m, n, k, fout, buffer); } - else - { - igemm_config(m,n,k,fout,buffer); - } - printf("\n-----------------------------\n"); n = k; - k = 4*n; - if (n%32 != 0 || k%32 != 0) - { - printf("[WARNING] For INT8 gemm test, n, k should be multiples of 32 (n = %d, k = %d)\n", n, k); + k = 4 * n; + if (n % 32 != 0 || k % 32 != 0) { + printf("[WARNING] For INT8 gemm test, n, k should be multiples of 32 (n = %d, k = %d)\n", n, k); } - else - { - igemm_config(m,n,k,fout,buffer); + else { + igemm_config(m, n, k, fout, buffer); } fclose(fout); printf("\n-----------------------------\n"); printf("***Encoder IGemm Testing End***\n"); - #ifdef SPARSITY_ENABLED bool do_sparse_test = false; if (prop.major == 8 && (prop.minor == 0 || prop.minor == 6)) { @@ -908,13 +1167,14 @@ int generate_encoder_igemm_config(int batch_size, int seq_len, int head_num, int if (do_sparse_test) { printf("***cusparseLt Gemm Testing Begin***\n"); const int spgemm_num = 3; - FILE *fd; + FILE* fd; int line_count = 0; const int ites = 100; struct timeval start, end; if (!isAppend) { fd = fopen(SPIGEMM_CONFIG, "w+"); - } else { + } + else { fd = fopen(SPIGEMM_CONFIG, "a+"); std::vector config; char line[1024]; @@ -922,9 +1182,7 @@ int generate_encoder_igemm_config(int batch_size, int seq_len, int head_num, int config.push_back(std::string(line)); } line_count = config.size(); - if (config.size() - >= (MAX_CONFIG_NUM * spgemm_num - + 1)) // 6 cublas/cublasLt, first row is not included + if (config.size() >= (MAX_CONFIG_NUM * spgemm_num + 1)) // 6 cublas/cublasLt, first row is not included { int startIdx = config.size() - ((MAX_CONFIG_NUM - 1) * spgemm_num); fclose(fd); @@ -969,29 +1227,27 @@ int generate_encoder_igemm_config(int batch_size, int seq_len, int head_num, int cudaStream_t stream = 0; float alpha2 = 1.0f; float beta2 = 0.0f; - for(int i = 0; i < spgemm_num; ++i) { + for (int i = 0; i < spgemm_num; ++i) { // to be compatable with spgemm wrapper, we let A be the weight matrix // so m and n are swapped // A: mxk B: kxn C:mxn int m = N[i], n = M[i], k = K[i]; printf("\n-----------------------------\n"); printf("GEMM test %d: [M: %d, K: %d, N: %d]\n", i, m, k, n); - int8_t *d_A = (int8_t*)buffer; - int8_t *d_B = d_A + m * k; - int8_t *d_C = d_B + k * n; - int8_t *dA_compressed; + int8_t* d_A = (int8_t*)buffer; + int8_t* d_B = d_A + m * k; + int8_t* d_C = d_B + k * n; + int8_t* dA_compressed; { cusparseLtMatDescriptor_t matA; - CHECK_CUSPARSE( cusparseLtStructuredDescriptorInit( - &handle, &matA, m, - k, k, alignment, - CUDA_R_8I, row_order, - CUSPARSELT_SPARSITY_50_PERCENT) ) - CHECK_CUSPARSE( cusparseLtSpMMAPrune2(&handle, &matA, true, opA, d_A, d_A, CUSPARSELT_PRUNE_SPMMA_STRIP, stream) ) + CHECK_CUSPARSE(cusparseLtStructuredDescriptorInit( + &handle, &matA, m, k, k, alignment, CUDA_R_8I, row_order, CUSPARSELT_SPARSITY_50_PERCENT)) + CHECK_CUSPARSE( + cusparseLtSpMMAPrune2(&handle, &matA, true, opA, d_A, d_A, CUSPARSELT_PRUNE_SPMMA_STRIP, stream)) size_t compressed_size; - CHECK_CUSPARSE( cusparseLtSpMMACompressedSize2(&handle, &matA, &compressed_size) ) - check_cuda_error( cudaMalloc((void**) &dA_compressed, compressed_size) ); - CHECK_CUSPARSE( cusparseLtSpMMACompress2(&handle, &matA, true, opA, d_A, dA_compressed, stream) ) + CHECK_CUSPARSE(cusparseLtSpMMACompressedSize2(&handle, &matA, &compressed_size)) + check_cuda_error(cudaMalloc((void**)&dA_compressed, compressed_size)); + CHECK_CUSPARSE(cusparseLtSpMMACompress2(&handle, &matA, true, opA, d_A, dA_compressed, stream)) } cudaDeviceSynchronize(); cudaError_t result = cudaGetLastError(); @@ -1007,19 +1263,10 @@ int generate_encoder_igemm_config(int batch_size, int seq_len, int head_num, int void* d_workspace = nullptr; int num_streams = 1; cudaStream_t streams[1] = {stream}; - CHECK_CUSPARSE( cusparseLtStructuredDescriptorInit( - &handle, &matA, m, - k, k, alignment, - CUDA_R_8I, row_order, - CUSPARSELT_SPARSITY_50_PERCENT) ) - CHECK_CUSPARSE( cusparseLtDenseDescriptorInit( - &handle, &matB, k, - n, k, alignment, - CUDA_R_8I, col_order) ) - CHECK_CUSPARSE( cusparseLtDenseDescriptorInit( - &handle, &matC, m, - n, m, alignment, - CUDA_R_8I, col_order) ) + CHECK_CUSPARSE(cusparseLtStructuredDescriptorInit( + &handle, &matA, m, k, k, alignment, CUDA_R_8I, row_order, CUSPARSELT_SPARSITY_50_PERCENT)) + CHECK_CUSPARSE(cusparseLtDenseDescriptorInit(&handle, &matB, k, n, k, alignment, CUDA_R_8I, col_order)) + CHECK_CUSPARSE(cusparseLtDenseDescriptorInit(&handle, &matC, m, n, m, alignment, CUDA_R_8I, col_order)) gettimeofday(&start, NULL); for (int ite = 0; ite < ites; ++ite) { // initializing MatDesc takes a lot of time @@ -1028,23 +1275,27 @@ int generate_encoder_igemm_config(int batch_size, int seq_len, int head_num, int cusparseLtMatmulDescriptor_t matmul; cusparseLtMatmulAlgSelection_t alg_sel; cusparseLtMatmulPlan_t plan; - CHECK_CUSPARSE( cusparseLtMatmulDescriptorInit( - &handle, &matmul, opA, opB, - &matA, &matB, &matC, &matC, - compute_type) ) - CHECK_CUSPARSE( cusparseLtMatmulAlgSelectionInit( - &handle, &alg_sel, &matmul, - CUSPARSELT_MATMUL_ALG_DEFAULT) ) - CHECK_CUSPARSE( cusparseLtMatmulAlgSetAttribute( - &handle, &alg_sel, - CUSPARSELT_MATMUL_ALG_CONFIG_ID, - &alg, sizeof(alg))) + CHECK_CUSPARSE(cusparseLtMatmulDescriptorInit( + &handle, &matmul, opA, opB, &matA, &matB, &matC, &matC, compute_type)) + CHECK_CUSPARSE( + cusparseLtMatmulAlgSelectionInit(&handle, &alg_sel, &matmul, CUSPARSELT_MATMUL_ALG_DEFAULT)) + CHECK_CUSPARSE(cusparseLtMatmulAlgSetAttribute( + &handle, &alg_sel, CUSPARSELT_MATMUL_ALG_CONFIG_ID, &alg, sizeof(alg))) size_t workspace_size; - CHECK_CUSPARSE( cusparseLtMatmulGetWorkspace(&handle, &alg_sel, &workspace_size) ) - CHECK_CUSPARSE( cusparseLtMatmulPlanInit(&handle, &plan, &matmul, &alg_sel, workspace_size) ) - CHECK_CUSPARSE( cusparseLtMatmul(&handle, &plan, &alpha2, dA_compressed, d_B, - &beta2, d_C, d_C, d_workspace, streams, num_streams) ) - CHECK_CUSPARSE( cusparseLtMatmulPlanDestroy(&plan) ) + CHECK_CUSPARSE(cusparseLtMatmulGetWorkspace(&handle, &alg_sel, &workspace_size)) + CHECK_CUSPARSE(cusparseLtMatmulPlanInit(&handle, &plan, &matmul, &alg_sel, workspace_size)) + CHECK_CUSPARSE(cusparseLtMatmul(&handle, + &plan, + &alpha2, + dA_compressed, + d_B, + &beta2, + d_C, + d_C, + d_workspace, + streams, + num_streams)) + CHECK_CUSPARSE(cusparseLtMatmulPlanDestroy(&plan)) } cudaDeviceSynchronize(); gettimeofday(&end, NULL); @@ -1056,11 +1307,21 @@ int generate_encoder_igemm_config(int batch_size, int seq_len, int head_num, int } exec_time /= ites; printf("fast_algo %d\n", fast_algo); - fprintf(fd, "%d %d %d %d %d ### 1 %d %d %d %d %f\n", - batch_size, seq_len, head_num, size_per_head, HALF_DATATYPE, m, n, k, fast_algo, exec_time); + fprintf(fd, + "%d %d %d %d %d ### 1 %d %d %d %d %f\n", + batch_size, + seq_len, + head_num, + size_per_head, + HALF_DATATYPE, + m, + n, + k, + fast_algo, + exec_time); cudaFree(dA_compressed); } - CHECK_CUSPARSE( cusparseLtDestroy(&handle) ) + CHECK_CUSPARSE(cusparseLtDestroy(&handle)) fclose(fd); printf("***cusparseLt Gemm Testing End***\n"); } @@ -1068,4 +1329,4 @@ int generate_encoder_igemm_config(int batch_size, int seq_len, int head_num, int return 0; } -} +} // namespace fastertransformer diff --git a/src/fastertransformer/utils/gemm_test/encoder_igemm_func.h b/src/fastertransformer/utils/gemm_test/encoder_igemm_func.h index 08f79ddf0..ce23ca582 100644 --- a/src/fastertransformer/utils/gemm_test/encoder_igemm_func.h +++ b/src/fastertransformer/utils/gemm_test/encoder_igemm_func.h @@ -29,7 +29,6 @@ #include #include - namespace fastertransformer { /* CAUTION : must match cublasLtMatmulTile_t */ @@ -42,4 +41,40 @@ const char* const matmulTileName[] = { int generate_encoder_igemm_config( int batch_size, int seq_len, int head_num, int size_per_head, void* buffer, bool isAppend = true); +int printPerfStructure(int m, int n, int k, const customMatmulPerf_t& perf, FILE* fout, int hasPrint); + +int printBatchPerfStructure( + int batchCount, int m, int n, int k, const customMatmulPerf_t& perf, FILE* fout, int hasPrint); + +template +int LtIgemmCustomFind(cublasLtHandle_t ltHandle, + int m, + int n, + int k, + const scaleT* alpha, /* host pointer */ + const int8_t* A, + const int8_t* B, + const scaleT* beta, /* host pointer */ + T* C, + void* workSpace, + size_t workSpaceSize, + FILE* fout); + +template +int LtBatchIgemmCustomFind(cublasLtHandle_t ltHandle, + int batchCount, + int m, + int n, + int k, + const scaleT* alpha, /* host pointer */ + const int8_t* A, + const int8_t* B, + const scaleT* beta, /* host pointer */ + T* C, + void* workSpace, + size_t workSpaceSize, + FILE* fout); + +void matInit(int rows, int cols, int8_t* p, int ld); + } // namespace fastertransformer diff --git a/src/fastertransformer/utils/gemm_test/gemm_func.cc b/src/fastertransformer/utils/gemm_test/gemm_func.cc index a10e905c0..edbfc40ad 100644 --- a/src/fastertransformer/utils/gemm_test/gemm_func.cc +++ b/src/fastertransformer/utils/gemm_test/gemm_func.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -16,6 +16,10 @@ #include "encoder_gemm_func.h" +#ifndef CUDART_VERSION +#error CUDART_VERSION Undefined! +#endif + namespace fastertransformer { // Utility function to print customMatmulPerf_t structure @@ -28,7 +32,7 @@ int printPerfStructure(int batch_size, int k, const customMatmulPerf_t& perf, FILE* fout, - int is_fp16, + CublasDataType data_type, int hasPrint) { int algoId, tile, swizzle, customOption, numSplitsK, reductionScheme, stages; @@ -44,7 +48,7 @@ int printPerfStructure(int batch_size, matmulAlgo, CUBLASLT_ALGO_CONFIG_CTA_SWIZZLING, &swizzle, sizeof(swizzle), NULL); cublasLtMatmulAlgoConfigGetAttribute( matmulAlgo, CUBLASLT_ALGO_CONFIG_CUSTOM_OPTION, &customOption, sizeof(customOption), NULL); -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) cublasLtMatmulAlgoConfigGetAttribute(matmulAlgo, CUBLASLT_ALGO_CONFIG_STAGES_ID, &stages, sizeof(stages), NULL); #else stages = 0; @@ -73,7 +77,7 @@ int printPerfStructure(int batch_size, seq_len, head_num, size_per_head, - is_fp16 ? HALF_DATATYPE : FLOAT_DATATYPE, + data_type, 1, m, n, @@ -199,7 +203,7 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, cublasStatus_t status = CUBLAS_STATUS_SUCCESS; cudaEvent_t startEvent; cudaEvent_t stopEvent; - int is_fp16 = (sizeof(T) == sizeof(half) ? 1 : 0); + CublasDataType data_type; cublasLtMatmulDesc_t operationDesc = NULL; cublasLtMatrixLayout_t Adesc = NULL, Bdesc = NULL, Cdesc = NULL; @@ -221,22 +225,30 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, int algoIdA[ALGO_IDS]; // Array containing the algorithm IDs returned by // cublasLtMatmulAlgoGetIds function. cudaDataType_t Atype, Btype, Ctype, scaleType; -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) cublasComputeType_t computeType; #else cudaDataType_t computeType; #endif - if (sizeof(T) == sizeof(float)) { + if (std::is_same::value) { + data_type = FLOAT_DATATYPE; Atype = CUDA_R_32F, Btype = CUDA_R_32F, Ctype = CUDA_R_32F; } - else { + else if (std::is_same::value) { + data_type = HALF_DATATYPE; Atype = CUDA_R_16F, Btype = CUDA_R_16F, Ctype = CUDA_R_16F; } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + data_type = BFLOAT16_DATATYPE; + Atype = CUDA_R_16BF, Btype = CUDA_R_16BF, Ctype = CUDA_R_16BF; + } +#endif if (sizeof(scaleT) == sizeof(float)) { scaleType = CUDA_R_32F; -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) computeType = CUBLAS_COMPUTE_32F; #else computeType = CUDA_R_32F; @@ -244,7 +256,7 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, } else { scaleType = CUDA_R_16F; -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) computeType = CUBLAS_COMPUTE_16F; #else computeType = CUDA_R_16F; @@ -254,27 +266,31 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, // Create operation descriptor; see cublasLtMatmulDescAttributes_t for // details about defaults; here we just need to set the transforms for A and // B -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) status = cublasLtMatmulDescCreate(&operationDesc, computeType, scaleType); // creates a matrix multiply descriptor #else status = cublasLtMatmulDescCreate(&operationDesc, computeType); #endif - if (status != CUBLAS_STATUS_SUCCESS) + if (status != CUBLAS_STATUS_SUCCESS) { goto CLEANUP; + } // Create matrix descriptors. We are good with the details here so no need // to set any extra attributes status = cublasLtMatrixLayoutCreate(&Adesc, Atype, m, k, m); - if (status != CUBLAS_STATUS_SUCCESS) + if (status != CUBLAS_STATUS_SUCCESS) { goto CLEANUP; + } status = cublasLtMatrixLayoutCreate(&Bdesc, Btype, k, n, k); - if (status != CUBLAS_STATUS_SUCCESS) + if (status != CUBLAS_STATUS_SUCCESS) { goto CLEANUP; + } status = cublasLtMatrixLayoutCreate(&Cdesc, Ctype, m, n, m); - if (status != CUBLAS_STATUS_SUCCESS) + if (status != CUBLAS_STATUS_SUCCESS) { goto CLEANUP; + } // Create CUDA event to time the execution time of each algo if (cudaEventCreate(&startEvent, cudaEventBlockingSync) != cudaSuccess) { @@ -287,8 +303,9 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, // Request the 100 first AlgoId available status = cublasLtMatmulAlgoGetIds( ltHandle, computeType, scaleType, Atype, Btype, Ctype, Ctype, ALGO_IDS, algoIdA, &nbAlgoIds); - if (status != CUBLAS_STATUS_SUCCESS) + if (status != CUBLAS_STATUS_SUCCESS) { goto CLEANUP; + } // Loop over the Algo IDs for (int idx = 0; (idx < nbAlgoIds) && (AlgoCount < AlgoCombinations); idx++) { @@ -308,7 +325,7 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, tileA[0] = CUBLASLT_MATMUL_TILE_UNDEFINED; nbTiles = 1; } -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) cublasLtMatmulAlgoCapGetAttribute(&algo, CUBLASLT_ALGO_CAP_STAGES_IDS, NULL, 0, &sizeWritten); int nbStages = int(sizeWritten / sizeof(int)); std::vector stagesA(nbStages == 0 ? 1 : nbStages); @@ -337,7 +354,7 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, /* Loop over the different tiles */ for (int tileIdx = 0; tileIdx < nbTiles; tileIdx++) { -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) /* Loop over different stages count */ for (int stagesIdx = 0; stagesIdx < nbStages; stagesIdx++) { cublasLtMatmulAlgoConfigSetAttribute( @@ -431,7 +448,7 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, } // end l } // end k } // end customOption -#ifdef CUDA11_MODE +#if (CUDART_VERSION >= 11000) } // end stagesIdx #endif } // end tileIdx @@ -512,8 +529,9 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, startEvent, stopEvent); perfResults[AlgoCount].status = status; - if (status == CUBLAS_STATUS_SUCCESS) + if (status == CUBLAS_STATUS_SUCCESS) { AlgoCount++; + } } } @@ -541,8 +559,9 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, startEvent, stopEvent); perfResults[AlgoCount].status = status; - if (status == CUBLAS_STATUS_SUCCESS) + if (status == CUBLAS_STATUS_SUCCESS) { AlgoCount++; + } } } @@ -552,23 +571,29 @@ int LtHgemmCustomFind(cublasLtHandle_t ltHandle, for (int i = 0, hasPrint = 1; i < AlgoCount; i++) { printf("result %03d : ", i); hasPrint = printPerfStructure( - batch_size, seq_len, head_num, size_per_head, m, n, k, perfResults[i], fout, is_fp16, hasPrint); + batch_size, seq_len, head_num, size_per_head, m, n, k, perfResults[i], fout, data_type, hasPrint); } CLEANUP: // Descriptors are no longer needed as all GPU work was already enqueued - if (Cdesc) + if (Cdesc) { cublasLtMatrixLayoutDestroy(Cdesc); - if (Bdesc) + } + if (Bdesc) { cublasLtMatrixLayoutDestroy(Bdesc); - if (Adesc) + } + if (Adesc) { cublasLtMatrixLayoutDestroy(Adesc); - if (operationDesc) + } + if (operationDesc) { cublasLtMatmulDescDestroy(operationDesc); - if (startEvent) + } + if (startEvent) { cudaEventDestroy(startEvent); - if (stopEvent) + } + if (stopEvent) { cudaEventDestroy(stopEvent); + } return status == CUBLAS_STATUS_SUCCESS ? 0 : 1; } @@ -610,6 +635,27 @@ template int LtHgemmCustomFind(cublasLtHandle_t ltHandle, customMatmulPerf_t perfResults[], int AlgoCombinations); +#ifdef ENABLE_BF16 +template int LtHgemmCustomFind(cublasLtHandle_t ltHandle, + int batch_size, + int seq_len, + int head_num, + int size_per_head, + int m, + int n, + int k, + const float* alpha, /* host pointer */ + const __nv_bfloat16* A, + const __nv_bfloat16* B, + const float* beta, /* host pointer */ + __nv_bfloat16* C, + void* workSpace, + size_t workSpaceSize, + FILE* fout, + customMatmulPerf_t perfResults[], + int AlgoCombinations); +#endif + template int LtHgemmCustomFind(cublasLtHandle_t ltHandle, int batch_size, int seq_len, @@ -636,7 +682,7 @@ size_t calGemmTestBufSizeInByte(int batch_size, int inter_size, int vocab_size, int int8_mode, - int is_fp16) + CublasDataType data_type) { size_t buf_size_in_byte; if (int8_mode > 0) { @@ -662,7 +708,8 @@ size_t calGemmTestBufSizeInByte(int batch_size, int m = batch_size * seq_len; int n = head_num * size_per_head; int k = n; - int wordSize = (is_fp16 == 1 ? sizeof(half) : sizeof(float)); + // TODO need to add bfloat16 here + int wordSize = (data_type == FLOAT_DATATYPE ? sizeof(float) : sizeof(half)); size_t size1 = 3 * (m * k + k * n + m * n) * wordSize; size_t size2 = batch_size * head_num * (seq_len * seq_len + seq_len * size_per_head + seq_len * size_per_head) * wordSize; @@ -671,7 +718,8 @@ size_t calGemmTestBufSizeInByte(int batch_size, buf_size_in_byte = size1 > size2 ? size1 : size2; buf_size_in_byte = buf_size_in_byte > size3 ? buf_size_in_byte : size3; buf_size_in_byte = buf_size_in_byte > size4 ? buf_size_in_byte : size4; - buf_size_in_byte += ((is_fp16 == 1) ? CUBLAS_WORKSPACE_SIZE : 0); + buf_size_in_byte += + ((data_type == HALF_DATATYPE || data_type == BFLOAT16_DATATYPE) ? CUBLAS_WORKSPACE_SIZE : 0); } return buf_size_in_byte; } diff --git a/src/fastertransformer/utils/gemm_test/gemm_func.h b/src/fastertransformer/utils/gemm_test/gemm_func.h index 49210cd26..577aa6fac 100644 --- a/src/fastertransformer/utils/gemm_test/gemm_func.h +++ b/src/fastertransformer/utils/gemm_test/gemm_func.h @@ -31,6 +31,18 @@ namespace fastertransformer { +// Scale Type Converter +// is_fp16_compute_type is only valid when T = half +template +struct ScaleTypeConverter { + using Type = float; +}; + +template<> +struct ScaleTypeConverter { + using Type = half; +}; + template int LtHgemmCustomFind(cublasLtHandle_t ltHandle, int batch_size, @@ -58,7 +70,7 @@ size_t calGemmTestBufSizeInByte(int batch_size, int inter_size, int vocab_size, int int8_mode, - int is_fp16); + CublasDataType data_type); size_t calGemmTestBufSizeInByteXlnet( int batch_size, int seq_len, int head_num, int size_per_head, int inter_size, int hidden_units, int is_fp16); @@ -72,7 +84,7 @@ int printPerfStructure(int batch_size, int k, const customMatmulPerf_t& perf, FILE* fout, - int is_fp16, + CublasDataType data_type, int hasPrint); } // namespace fastertransformer diff --git a/src/fastertransformer/utils/gemm_test/gpt_gemm_func.cc b/src/fastertransformer/utils/gemm_test/gpt_gemm_func.cc index f083e6376..0c3575057 100644 --- a/src/fastertransformer/utils/gemm_test/gpt_gemm_func.cc +++ b/src/fastertransformer/utils/gemm_test/gpt_gemm_func.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -18,7 +18,8 @@ namespace fastertransformer { -bool isSparseGemmAvailable(size_t m, size_t n, size_t k) { +bool isSparseGemmAvailable(size_t m, size_t n, size_t k) +{ return m % 8 == 0 && n % 8 == 0 && k % 8 == 0; } @@ -38,7 +39,11 @@ void generate_gpt_gemm_config(int batch_size, void* cublas_workspace; void* buffer; int workSpaceSize; +#ifdef ENABLE_BF16 + if (std::is_same::value || std::is_same::value) { +#else if (std::is_same::value) { +#endif // ENABLE_BF16 // cublas_workspace_ should be the start pointer of cudaMalloc() // to ensure 16B alignemnet cublas_workspace = buffer_in; @@ -182,9 +187,10 @@ void generate_gpt_gemm_config(int batch_size, int startAlgo, endAlgo; const int ites = 100; struct timeval start, end; - int is_fp16 = (sizeof(T) == sizeof(half)) ? 1 : 0; - if (sizeof(T) == sizeof(float)) { + CublasDataType data_type; + if (std::is_same::value) { + data_type = FLOAT_DATATYPE; AType = CUDA_R_32F; BType = CUDA_R_32F; CType = CUDA_R_32F; @@ -192,15 +198,26 @@ void generate_gpt_gemm_config(int batch_size, startAlgo = (int)CUBLAS_GEMM_DEFAULT; endAlgo = (int)CUBLAS_GEMM_ALGO23; } - else { + else if (std::is_same::value) { + data_type = HALF_DATATYPE; AType = CUDA_R_16F; BType = CUDA_R_16F; CType = CUDA_R_16F; - computeType = CUDA_R_32F; // Use fp32 computeType to prevent overflow in gpt + computeType = CUDA_R_32F; startAlgo = (int)CUBLAS_GEMM_DEFAULT_TENSOR_OP; endAlgo = (int)CUBLAS_GEMM_ALGO15_TENSOR_OP; } - +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + data_type = BFLOAT16_DATATYPE; + AType = CUDA_R_16BF; + BType = CUDA_R_16BF; + CType = CUDA_R_16BF; + computeType = CUDA_R_32F; + startAlgo = (int)CUBLAS_GEMM_DEFAULT_TENSOR_OP; + endAlgo = (int)CUBLAS_GEMM_ALGO15_TENSOR_OP; + } +#endif float alpha = (float)1.0f; float beta = (float)0.0f; @@ -246,7 +263,7 @@ void generate_gpt_gemm_config(int batch_size, max_input_len * size_per_head, &beta, d_C, - CUDA_R_32F, // CType, + CUDA_R_32F, // CType, max_input_len, max_input_len * max_input_len, batchCount[i], @@ -278,6 +295,27 @@ void generate_gpt_gemm_config(int batch_size, computeType, static_cast(algo)); } + else if (i == 10) { + status = cublasGemmEx(cublas_handle, + CUBLAS_OP_T, + CUBLAS_OP_N, + n, + m, + k, + &alpha, + d_B, + BType, + k, + d_A, + AType, + k, + &beta, + d_C, + CType, + n, + computeType, + static_cast(algo)); + } else { status = cublasGemmEx(cublas_handle, CUBLAS_OP_N, @@ -300,8 +338,9 @@ void generate_gpt_gemm_config(int batch_size, static_cast(algo)); } - if (status != CUBLAS_STATUS_SUCCESS) + if (status != CUBLAS_STATUS_SUCCESS) { break; + } } cudaDeviceSynchronize(); gettimeofday(&end, NULL); @@ -317,14 +356,14 @@ void generate_gpt_gemm_config(int batch_size, printf("fast_algo %d costs %.3f ms\n", fast_algo, exec_time); - // for fp16, we compare cublasLt - if (is_fp16 == 1 && i != 1 && i != 2) { + // for fp16 and bf16, we compare cublasLt + if (data_type != FLOAT_DATATYPE && i != 1 && i != 2 && i != 10) { printf("***cublasLt Gemm Testing Beign***\n"); // Let try a fixed number of combinations int ALGO_COMBINATIONS = 5000; customMatmulPerf_t perfResults[ALGO_COMBINATIONS]; - //for gpt, computeType & scaleType should be FP32 + // for gpt, computeType & scaleType should be FP32 LtHgemmCustomFind(ltHandle, batch_size * beam_width, i == 1 || i == 2 ? max_input_len : 1, @@ -344,8 +383,17 @@ void generate_gpt_gemm_config(int batch_size, perfResults, ALGO_COMBINATIONS); if (perfResults[0].time < exec_time) { - printPerfStructure( - batch_size * beam_width, seq_len, head_num, size_per_head, n, m, k, perfResults[0], fd, is_fp16, 0); + printPerfStructure(batch_size * beam_width, + seq_len, + head_num, + size_per_head, + n, + m, + k, + perfResults[0], + fd, + data_type, + 0); } else { fprintf(fd, @@ -354,7 +402,7 @@ void generate_gpt_gemm_config(int batch_size, seq_len, head_num, size_per_head, - is_fp16 ? HALF_DATATYPE : FLOAT_DATATYPE, + data_type, batchCount[i], n, m, @@ -363,14 +411,15 @@ void generate_gpt_gemm_config(int batch_size, exec_time); } printf("***cublasLt Gemm Testing End***\n"); - } else { + } + else { fprintf(fd, "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 %f\n", batch_size * beam_width, seq_len, head_num, size_per_head, - is_fp16 ? HALF_DATATYPE : FLOAT_DATATYPE, + data_type, batchCount[i], n, m, @@ -386,8 +435,7 @@ void generate_gpt_gemm_config(int batch_size, #ifdef SPARSITY_ENABLED bool do_sparse_test = false; - if (prop.major == 8 && (prop.minor == 0 || prop.minor == 6) && - sizeof(T) == sizeof(half)) { + if (prop.major == 8 && (prop.minor == 0 || prop.minor == 6) && sizeof(T) == sizeof(half)) { do_sparse_test = true; } if (do_sparse_test) { @@ -397,7 +445,8 @@ void generate_gpt_gemm_config(int batch_size, const int spgemm_num = 8; if (!isAppend) { fd = fopen(SPGEMM_CONFIG, "w+"); - } else { + } + else { fd = fopen(SPGEMM_CONFIG, "a+"); std::vector config; char line[1024]; @@ -435,7 +484,7 @@ void generate_gpt_gemm_config(int batch_size, cudaStream_t stream = 0; float alpha2 = 1.0f; float beta2 = 0.0f; - for(int i = 0; i < gemm_num; ++i) { + for (int i = 0; i < gemm_num; ++i) { // skip qk or attn or logit gemms. if (i == 1 || i == 2 || i == 10) { continue; @@ -450,6 +499,11 @@ void generate_gpt_gemm_config(int batch_size, int m = N[i], n = M[i], k = K[i]; printf("\n-----------------------------\n"); printf("GEMM test %d: [M: %d, K: %d, N: %d]\n", i, m, k, n); + + if (n % 8 != 0) { + n = div_up(n, 8) * 8; // pad n to be multiple of 8 as FT does. + } + T* d_A = (T*)buffer; T* d_B = d_A + m * k * batchCount[i]; T* d_C = d_B + k * n * batchCount[i]; @@ -457,16 +511,13 @@ void generate_gpt_gemm_config(int batch_size, { cusparseLtMatDescriptor_t matA; CHECK_CUSPARSE(cusparseLtStructuredDescriptorInit( - &handle, &matA, m, k, m, alignment, - CUDA_R_16F, order, CUSPARSELT_SPARSITY_50_PERCENT) ) - CHECK_CUSPARSE(cusparseLtSpMMAPrune2( - &handle, &matA, true, opA, d_A, d_A, CUSPARSELT_PRUNE_SPMMA_STRIP, stream)) + &handle, &matA, m, k, m, alignment, CUDA_R_16F, order, CUSPARSELT_SPARSITY_50_PERCENT)) + CHECK_CUSPARSE( + cusparseLtSpMMAPrune2(&handle, &matA, true, opA, d_A, d_A, CUSPARSELT_PRUNE_SPMMA_STRIP, stream)) size_t compressed_size; - CHECK_CUSPARSE(cusparseLtSpMMACompressedSize2( - &handle, &matA, &compressed_size)) - check_cuda_error(cudaMalloc((void**) &dA_compressed, compressed_size)); - CHECK_CUSPARSE(cusparseLtSpMMACompress2( - &handle, &matA, true, opA, d_A, dA_compressed, stream)) + CHECK_CUSPARSE(cusparseLtSpMMACompressedSize2(&handle, &matA, &compressed_size)) + check_cuda_error(cudaMalloc((void**)&dA_compressed, compressed_size)); + CHECK_CUSPARSE(cusparseLtSpMMACompress2(&handle, &matA, true, opA, d_A, dA_compressed, stream)) } float exec_time = 99999.0f; @@ -479,12 +530,9 @@ void generate_gpt_gemm_config(int batch_size, int num_streams = 1; cudaStream_t streams[1] = {stream}; CHECK_CUSPARSE(cusparseLtStructuredDescriptorInit( - &handle, &matA, m, k, m, alignment, - CUDA_R_16F, order, CUSPARSELT_SPARSITY_50_PERCENT) ) - CHECK_CUSPARSE(cusparseLtDenseDescriptorInit( - &handle, &matB, k, n, k, alignment, CUDA_R_16F, order) ) - CHECK_CUSPARSE(cusparseLtDenseDescriptorInit( - &handle, &matC, m, n, m, alignment, CUDA_R_16F, order) ) + &handle, &matA, m, k, m, alignment, CUDA_R_16F, order, CUSPARSELT_SPARSITY_50_PERCENT)) + CHECK_CUSPARSE(cusparseLtDenseDescriptorInit(&handle, &matB, k, n, k, alignment, CUDA_R_16F, order)) + CHECK_CUSPARSE(cusparseLtDenseDescriptorInit(&handle, &matC, m, n, m, alignment, CUDA_R_16F, order)) cudaDeviceSynchronize(); gettimeofday(&start, NULL); for (int ite = 0; ite < ites; ++ite) { @@ -495,21 +543,25 @@ void generate_gpt_gemm_config(int batch_size, cusparseLtMatmulAlgSelection_t alg_sel; cusparseLtMatmulPlan_t plan; CHECK_CUSPARSE(cusparseLtMatmulDescriptorInit( - &handle, &matmul, opA, opB, - &matA, &matB, &matC, &matC, compute_type)) - CHECK_CUSPARSE(cusparseLtMatmulAlgSelectionInit( - &handle, &alg_sel, &matmul, CUSPARSELT_MATMUL_ALG_DEFAULT)) + &handle, &matmul, opA, opB, &matA, &matB, &matC, &matC, compute_type)) + CHECK_CUSPARSE( + cusparseLtMatmulAlgSelectionInit(&handle, &alg_sel, &matmul, CUSPARSELT_MATMUL_ALG_DEFAULT)) CHECK_CUSPARSE(cusparseLtMatmulAlgSetAttribute( - &handle, &alg_sel, CUSPARSELT_MATMUL_ALG_CONFIG_ID, - &alg, sizeof(alg))) + &handle, &alg_sel, CUSPARSELT_MATMUL_ALG_CONFIG_ID, &alg, sizeof(alg))) size_t workspace_size; - CHECK_CUSPARSE(cusparseLtMatmulGetWorkspace( - &handle, &alg_sel, &workspace_size)) - CHECK_CUSPARSE(cusparseLtMatmulPlanInit( - &handle, &plan, &matmul, &alg_sel, workspace_size)) - CHECK_CUSPARSE(cusparseLtMatmul( - &handle, &plan, &alpha2, dA_compressed, d_B, &beta2, d_C, d_C, - d_workspace, streams, num_streams)) + CHECK_CUSPARSE(cusparseLtMatmulGetWorkspace(&handle, &alg_sel, &workspace_size)) + CHECK_CUSPARSE(cusparseLtMatmulPlanInit(&handle, &plan, &matmul, &alg_sel, workspace_size)) + CHECK_CUSPARSE(cusparseLtMatmul(&handle, + &plan, + &alpha2, + dA_compressed, + d_B, + &beta2, + d_C, + d_C, + d_workspace, + streams, + num_streams)) CHECK_CUSPARSE(cusparseLtMatmulPlanDestroy(&plan)) } cudaDeviceSynchronize(); @@ -526,14 +578,22 @@ void generate_gpt_gemm_config(int batch_size, fast_algo = -1; } printf("fast_algo %d\n", fast_algo); - fprintf(fd, "%d %d %d %d %d ### %d %d %d %d %d %f\n", - batch_size * beam_width, seq_len, head_num, size_per_head, - is_fp16 ? HALF_DATATYPE : FLOAT_DATATYPE, - batchCount[i], m, n, k, - fast_algo, exec_time); + fprintf(fd, + "%d %d %d %d %d ### %d %d %d %d %d %f\n", + batch_size * beam_width, + seq_len, + head_num, + size_per_head, + data_type, + batchCount[i], + m, + n, + k, + fast_algo, + exec_time); cudaFree(dA_compressed); } - CHECK_CUSPARSE( cusparseLtDestroy(&handle) ) + CHECK_CUSPARSE(cusparseLtDestroy(&handle)) fclose(fd); printf("***cusparseLt Gemm Testing End***\n"); } @@ -565,6 +625,19 @@ template void generate_gpt_gemm_config(int batch_size, void* buffer_in, bool isAppend); +#ifdef ENABLE_BF16 +template void generate_gpt_gemm_config<__nv_bfloat16>(int batch_size, + int beam_width, + int max_input_len, + int head_num, + int size_per_head, + int inter_size, + int vocab_size, + int tensor_para_size, + void* buffer_in, + bool isAppend); +#endif + size_t calGptGemmTestBufSizeInByte(int batch_size, int beam_width, int max_input_len, @@ -573,21 +646,23 @@ size_t calGptGemmTestBufSizeInByte(int batch_size, int inter_size, int vocab_size, int tensor_para_size, - int is_fp16) + CublasDataType data_type) { size_t buf_size_in_byte = 0; const size_t hidden_units = head_num * size_per_head; const size_t local_head_num = head_num / tensor_para_size; const size_t local_hidden_units = local_head_num * size_per_head; - int wordSize = (is_fp16 == 1 ? sizeof(half) : sizeof(float)); + // TODO add bfloat16 + int wordSize = (data_type == FLOAT_DATATYPE ? sizeof(float) : sizeof(half)); size_t m = batch_size * beam_width * max_input_len; std::vector buff_size; // for context qkv gemm buff_size.push_back(m * hidden_units + hidden_units * 3 * local_hidden_units + m * 3 * local_hidden_units); // for context batch gemm - buff_size.push_back(m * local_hidden_units + m * local_hidden_units + batch_size * beam_width * head_num * max_input_len * max_input_len); + buff_size.push_back(m * local_hidden_units + m * local_hidden_units + + batch_size * beam_width * head_num * max_input_len * max_input_len); // for context ffn gemm buff_size.push_back(m * inter_size / tensor_para_size + hidden_units * inter_size / tensor_para_size + m * hidden_units); @@ -599,7 +674,7 @@ size_t calGptGemmTestBufSizeInByte(int batch_size, buf_size_in_byte = buf_size_in_byte > t ? buf_size_in_byte : t; } buf_size_in_byte *= wordSize; - buf_size_in_byte += ((is_fp16 == 1) ? CUBLAS_WORKSPACE_SIZE : 0); + buf_size_in_byte += ((data_type == HALF_DATATYPE || data_type == BFLOAT16_DATATYPE) ? CUBLAS_WORKSPACE_SIZE : 0); return buf_size_in_byte; } diff --git a/src/fastertransformer/utils/gemm_test/gpt_gemm_func.h b/src/fastertransformer/utils/gemm_test/gpt_gemm_func.h index aaaac6e51..08996e1c8 100644 --- a/src/fastertransformer/utils/gemm_test/gpt_gemm_func.h +++ b/src/fastertransformer/utils/gemm_test/gpt_gemm_func.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,8 +17,10 @@ #pragma once #include "src/fastertransformer/utils/cublasAlgoMap.h" +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" #include "src/fastertransformer/utils/cuda_utils.h" #include "src/fastertransformer/utils/gemm_test/gemm_func.h" + #include #include #include @@ -51,6 +53,6 @@ size_t calGptGemmTestBufSizeInByte(int batch_size, int inter_size, int vocab_size, int tensor_para_size, - int is_fp16); + CublasDataType data_type); } // namespace fastertransformer diff --git a/src/fastertransformer/utils/gemm_test/swin_gemm_func.cc b/src/fastertransformer/utils/gemm_test/swin_gemm_func.cc new file mode 100644 index 000000000..227902448 --- /dev/null +++ b/src/fastertransformer/utils/gemm_test/swin_gemm_func.cc @@ -0,0 +1,389 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "src/fastertransformer/utils/gemm_test/swin_gemm_func.h" + +namespace fastertransformer { + +template +void generate_swin_gemm_config( + int batch_size, int seq_len, int head_num, int size_per_head, void* buffer_in, bool isAppend) +{ + void* cublas_workspace; + void* buffer; + int workSpaceSize; +#ifdef ENABLE_BF16 + if (std::is_same::value || std::is_same::value) { +#else + if (std::is_same::value) { +#endif // ENABLE_BF16 + // cublas_workspace_ should be the start pointer of cudaMalloc() + // to ensure 16B alignemnet + cublas_workspace = buffer_in; + buffer = (void*)((char*)cublas_workspace + CUBLAS_WORKSPACE_SIZE); + workSpaceSize = CUBLAS_WORKSPACE_SIZE; + } + else { + cublas_workspace = nullptr; + buffer = buffer_in; + workSpaceSize = 0; + } + + struct cudaDeviceProp prop; + check_cuda_error(cudaGetDeviceProperties(&prop, 0)); + printf("Device %s\n", prop.name); + + // check config + FILE* fd; + int line_count = 0; + if (!isAppend) { + fd = fopen(GEMM_CONFIG, "w+"); + fprintf( + fd, + "batch_size seq_len head_num size_per_head dataType ### batchCount n m k algoId customOption tile splitK_val swizzle reductionScheme workspaceSize stages exec_time\n"); + } + else { + fd = fopen(GEMM_CONFIG, "a+"); + std::vector config; + char line[1024]; + while (fgets(line, 1024, fd) != NULL) { + config.push_back(std::string(line)); + } + line_count = config.size(); + if (config.size() >= (MAX_CONFIG_NUM * GEMM_NUM + 1)) // 6 cublas/cublasLt, first row is not included + { + int startIdx = config.size() - ((MAX_CONFIG_NUM - 1) * GEMM_NUM); + fclose(fd); + fd = fopen(GEMM_CONFIG, "w+"); + fprintf(fd, "%s", config[0].c_str()); + for (uint i = startIdx; i < config.size(); i++) { + fprintf(fd, "%s", config[i].c_str()); + } + line_count = config.size() - (GEMM_NUM + 3); + } + } + + const int gemm_num = 7; + const int NUM_OF_BASIC_LAYERS = 4; + int M[gemm_num]; + int N[gemm_num]; + int K[gemm_num]; + int batchCount[gemm_num] = {1, 1, 1, 1, 1, 1, 1}; + char mess[gemm_num][256]; + float exec_times[gemm_num]; + + printf("***Encoder Gemm Testing Begin***\n"); + printf("***Cublas Gemm Testing Begin***\n"); + for (int basic_layer = 0; basic_layer < NUM_OF_BASIC_LAYERS; basic_layer++) { + // gemm1 + M[0] = batch_size * seq_len; + K[0] = head_num * size_per_head; + N[0] = 3 * K[0]; + strcpy(mess[0], "from_tensor * weightQ/K/V"); + + // gemm2 + M[1] = M[0]; + K[1] = K[0]; + N[1] = K[0]; + strcpy(mess[1], "attr * output_kernel"); + + // gemm3 + M[2] = M[0]; + K[2] = K[0]; + N[2] = 4 * K[0]; + strcpy(mess[2], "attr_output * inter_kernel"); + + // gemm3 + M[3] = M[0]; + K[3] = 4 * K[0]; + N[3] = K[0]; + strcpy(mess[3], "inter_matmul * output_kernel"); + + M[4] = M[0] / 4; + K[4] = 4 * K[0]; + N[4] = 2 * K[0]; + strcpy(mess[4], "patchMerge gemm"); + + M[5] = seq_len; + N[5] = seq_len; + K[5] = size_per_head; + batchCount[5] = batch_size * head_num; + strcpy(mess[5], "attention batched Gemm1"); + + M[6] = seq_len; + N[6] = size_per_head; + K[6] = seq_len; + batchCount[6] = batch_size * head_num; + strcpy(mess[6], "attention batched Gemm2"); + + cublasHandle_t cublas_handle; + check_cuda_error(cublasCreate(&cublas_handle)); + cublasLtHandle_t ltHandle; + check_cuda_error(cublasLtCreate(<Handle)); + + cudaDataType_t AType; + cudaDataType_t BType; + cudaDataType_t CType; + cudaDataType_t computeType; + int startAlgo, endAlgo; + const int ites = 100; + struct timeval start, end; + + CublasDataType data_type; + if (std::is_same::value) { + data_type = FLOAT_DATATYPE; + AType = CUDA_R_32F; + BType = CUDA_R_32F; + CType = CUDA_R_32F; + computeType = CUDA_R_32F; + startAlgo = (int)CUBLAS_GEMM_DEFAULT; + endAlgo = (int)CUBLAS_GEMM_ALGO23; + } + else if (std::is_same::value) { + data_type = HALF_DATATYPE; + AType = CUDA_R_16F; + BType = CUDA_R_16F; + CType = CUDA_R_16F; + computeType = CUDA_R_32F; + startAlgo = (int)CUBLAS_GEMM_DEFAULT_TENSOR_OP; + endAlgo = (int)CUBLAS_GEMM_ALGO15_TENSOR_OP; + } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + data_type = BFLOAT16_DATATYPE; + AType = CUDA_R_16BF; + BType = CUDA_R_16BF; + CType = CUDA_R_16BF; + computeType = CUDA_R_32F; + startAlgo = (int)CUBLAS_GEMM_DEFAULT_TENSOR_OP; + endAlgo = (int)CUBLAS_GEMM_ALGO15_TENSOR_OP; + } +#endif + using scaleT = typename ScaleTypeConverter::Type; + + scaleT alpha = (scaleT)1.0f; + scaleT beta = (scaleT)0.0f; + + for (int i = 0; i < gemm_num; ++i) { + // if(i != 0 && i != 5) continue; + + int m = M[i], n = N[i], k = K[i]; + printf("\n-----------------------------\n"); + printf("GEMM test %d: [M: %d, K: %d, N: %d] %s\n", i, m, k, n, mess[i]); + T* d_A = (T*)buffer; + T* d_B = d_A + m * k * batchCount[i]; + T* d_C = d_B + k * n * batchCount[i]; + + // array of pointer for batchedGemm + T* harray[12]; + harray[0] = (T*)buffer; + harray[1] = (T*)((char*)buffer + sizeof(T) * m * k); + harray[2] = (T*)((char*)buffer + 2 * sizeof(T) * m * k); + harray[4] = (T*)((char*)buffer + 3 * sizeof(T) * m * k); + harray[5] = (T*)((char*)buffer + 3 * sizeof(T) * m * k + sizeof(T) * k * n); + harray[6] = (T*)((char*)buffer + 3 * sizeof(T) * m * k + 2 * sizeof(T) * k * n); + harray[8] = (T*)((char*)buffer + 3 * sizeof(T) * m * k + 3 * sizeof(T) * k * n); + harray[9] = (T*)((char*)buffer + 3 * sizeof(T) * m * k + 3 * sizeof(T) * k * n + sizeof(T) * m * n); + harray[10] = (T*)((char*)buffer + 3 * sizeof(T) * m * k + 3 * sizeof(T) * k * n + 2 * sizeof(T) * m * n); + + T** darray = 0; + check_cuda_error(cudaMalloc((void**)&darray, sizeof(T*) * 12)); + cudaMemcpy((void*)darray, (void*)harray, sizeof(T*) * 12, cudaMemcpyHostToDevice); + T** dAarray = darray; + T** dBarray = darray + 4; + T** dCarray = darray + 8; + + float exec_time = 99999.0f; + int fast_algo = 0; + for (int algo = startAlgo; algo <= endAlgo; algo++) { + cublasStatus_t status; + cudaDeviceSynchronize(); + gettimeofday(&start, NULL); + for (int ite = 0; ite < ites; ++ite) { + if (i < 5) { + status = cublasGemmEx(cublas_handle, + CUBLAS_OP_N, + CUBLAS_OP_N, + n, + m, + k, + &alpha, + d_B, + BType, + n, + d_A, + AType, + k, + &beta, + d_C, + CType, + n, + computeType, + static_cast(algo)); + } + else if (i == 5) { + status = cublasGemmStridedBatchedEx(cublas_handle, + CUBLAS_OP_T, + CUBLAS_OP_N, + seq_len, + seq_len, + size_per_head, + &alpha, + d_B, + BType, + size_per_head, + seq_len * size_per_head, + d_A, + AType, + size_per_head, + seq_len * size_per_head, + &beta, + d_C, + CType, + seq_len, + seq_len * seq_len, + batch_size * head_num, + computeType, + static_cast(algo)); + } + else if (i == 6) { + status = cublasGemmStridedBatchedEx(cublas_handle, + CUBLAS_OP_N, + CUBLAS_OP_N, + size_per_head, + seq_len, + seq_len, + &alpha, + d_B, + BType, + size_per_head, + seq_len * size_per_head, + d_A, + AType, + seq_len, + seq_len * seq_len, + &beta, + d_C, + CType, + size_per_head, + seq_len * size_per_head, + batch_size * head_num, + computeType, + static_cast(algo)); + } + if (status != CUBLAS_STATUS_SUCCESS) { + break; + } + } + cudaDeviceSynchronize(); + gettimeofday(&end, NULL); + if (status == CUBLAS_STATUS_SUCCESS) { + printf("algo_%d costs %.3fms \n", algo, diffTime(start, end) / ites); + if (diffTime(start, end) / ites < exec_time) { + exec_time = diffTime(start, end) / ites; + fast_algo = algo; + } + } + } + printf("fast_algo %d costs %.3f ms\n", fast_algo, exec_time); + + // for fp16 and bf16, we compare cublasLt + if (i < 5 && data_type != FLOAT_DATATYPE) { + printf("***cublasLt Gemm Testing Beign***\n"); + // Let try a fixed number of combinations + int ALGO_COMBINATIONS = 5000; + customMatmulPerf_t perfResults[ALGO_COMBINATIONS]; + + LtHgemmCustomFind(ltHandle, + batch_size, + seq_len, + head_num, + size_per_head, + n, + m, + k, + &alpha, + d_B, + d_A, + &beta, + d_C, + cublas_workspace, + workSpaceSize, + fd, + perfResults, + ALGO_COMBINATIONS); + if (perfResults[0].time < exec_time) { + printPerfStructure( + batch_size, seq_len, head_num, size_per_head, n, m, k, perfResults[0], fd, data_type, 0); + exec_time = perfResults[0].time; + } + else { + fprintf(fd, + "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 %f\n", + batch_size, + seq_len, + head_num, + size_per_head, + data_type, + batchCount[i], + n, + m, + k, + fast_algo, + exec_time); + } + printf("***cublasLt Gemm Testing End***\n"); + } + else { + fprintf(fd, + "%d %d %d %d %d ### %d %d %d %d %d -1 -1 -1 -1 -1 -1 -1 %f\n", + batch_size, + seq_len, + head_num, + size_per_head, + data_type, + batchCount[i], + n, + m, + k, + fast_algo, + exec_time); + } + exec_times[i] = exec_time; + cudaFree(darray); + } + + if (basic_layer != NUM_OF_BASIC_LAYERS - 1) { + batch_size = batch_size / 4; + head_num = head_num * 2; + } + } + printf("***cublas Gemm Testing End***\n\n"); + fclose(fd); + printf("***Encoder Gemm Testing End***\n"); + return; +} + +template void generate_swin_gemm_config( + int batch_size, int seq_len, int head_num, int size_per_head, void* buffer, bool isAppend); +template void generate_swin_gemm_config( + int batch_size, int seq_len, int head_num, int size_per_head, void* buffer, bool isAppend); +#ifdef ENABLE_BF16 +template void generate_swin_gemm_config<__nv_bfloat16>( + int batch_size, int seq_len, int head_num, int size_per_head, void* buffer, bool isAppend); +#endif + +} // namespace fastertransformer diff --git a/src/fastertransformer/utils/gemm_test/swin_gemm_func.h b/src/fastertransformer/utils/gemm_test/swin_gemm_func.h new file mode 100644 index 000000000..da8f03d43 --- /dev/null +++ b/src/fastertransformer/utils/gemm_test/swin_gemm_func.h @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/utils/cublasAlgoMap.h" +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" +#include "src/fastertransformer/utils/cuda_utils.h" +#include "src/fastertransformer/utils/gemm_test/gemm_func.h" + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +namespace fastertransformer { + +template +void generate_swin_gemm_config( + int batch_size, int seq_len, int head_num, int size_per_head, void* buffer, bool isAppend = true); + +} // namespace fastertransformer diff --git a/src/fastertransformer/utils/gemm_test/swin_igemm_func.cc b/src/fastertransformer/utils/gemm_test/swin_igemm_func.cc new file mode 100644 index 000000000..182c2b9a2 --- /dev/null +++ b/src/fastertransformer/utils/gemm_test/swin_igemm_func.cc @@ -0,0 +1,281 @@ +/* + * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "swin_igemm_func.h" + +namespace fastertransformer { + +static const char* showStatus(cublasStatus_t error) +{ + switch (error) { + case CUBLAS_STATUS_SUCCESS: + return "CUBLAS_STATUS_SUCCESS"; + + case CUBLAS_STATUS_NOT_INITIALIZED: + return "CUBLAS_STATUS_NOT_INITIALIZED"; + + case CUBLAS_STATUS_ALLOC_FAILED: + return "CUBLAS_STATUS_ALLOC_FAILED"; + + case CUBLAS_STATUS_INVALID_VALUE: + return "CUBLAS_STATUS_INVALID_VALUE"; + + case CUBLAS_STATUS_ARCH_MISMATCH: + return "CUBLAS_STATUS_ARCH_MISMATCH"; + + case CUBLAS_STATUS_MAPPING_ERROR: + return "CUBLAS_STATUS_MAPPING_ERROR"; + + case CUBLAS_STATUS_EXECUTION_FAILED: + return "CUBLAS_STATUS_EXECUTION_FAILED"; + + case CUBLAS_STATUS_INTERNAL_ERROR: + return "CUBLAS_STATUS_INTERNAL_ERROR"; + + case CUBLAS_STATUS_NOT_SUPPORTED: + return "CUBLAS_STATUS_NOT_SUPPORTED"; + + case CUBLAS_STATUS_LICENSE_ERROR: + return "CUBLAS_STATUS_LICENSE_ERROR"; + } + + return ""; +} + +static inline bool time_compare(const customMatmulPerf_t& perf_a, const customMatmulPerf_t& perf_b) +{ + return ((perf_a.status == CUBLAS_STATUS_SUCCESS) && (perf_a.time < perf_b.time)); +} + +static cublasStatus_t customMatmulRun(cublasLtHandle_t ltHandle, // to get the capabilities (required a GPU) + cublasLtMatmulDesc_t operationDesc, + const void* alpha, /* host or device pointer */ + const void* A, + cublasLtMatrixLayout_t Adesc, + const void* B, + cublasLtMatrixLayout_t Bdesc, + const void* beta, /* host or device pointer */ + const void* C, + cublasLtMatrixLayout_t Cdesc, + void* D, + cublasLtMatrixLayout_t Ddesc, + const cublasLtMatmulAlgo_t& algo, + int kernelRepeats, + void* workSpace, + size_t workSpaceSizeInBytes, + customMatmulPerf_t& perfResults, + cudaStream_t stream) +{ + cublasLtMatmulHeuristicResult_t heurResult; + /* Looping over the Algo */ + int repeats = kernelRepeats; + cublasStatus_t algoStatus = + cublasLtMatmulAlgoCheck(ltHandle, operationDesc, Adesc, Bdesc, Cdesc, Ddesc, &algo, &heurResult); + if (algoStatus == CUBLAS_STATUS_SUCCESS) { + if (heurResult.workspaceSize <= workSpaceSizeInBytes) { + struct timeval start, end; + cublasStatus_t oneRunStatus; + cudaDeviceSynchronize(); + gettimeofday(&start, NULL); + for (int loop = 0; loop < repeats; loop++) { + oneRunStatus = cublasLtMatmul(ltHandle, + operationDesc, + alpha, + A, + Adesc, + B, + Bdesc, + beta, + C, + Cdesc, + D, + Ddesc, + &algo, + workSpace, + workSpaceSizeInBytes, + stream); + } + cudaDeviceSynchronize(); + gettimeofday(&end, NULL); + if (oneRunStatus != CUBLAS_STATUS_SUCCESS) { + algoStatus = oneRunStatus; + } + float time = diffTime(start, end); + // For the moment only add successful findings + if (algoStatus == CUBLAS_STATUS_SUCCESS) { + perfResults.algo = algo; + perfResults.time = time / repeats; + perfResults.workspaceSize = heurResult.workspaceSize; + perfResults.wavesCount = heurResult.wavesCount; + } + } + else { + // printf("not enough workspace! %ld\n", heurResult.workspaceSize); + algoStatus = CUBLAS_STATUS_NOT_SUPPORTED; // Not enough workspace + } + } + else { + // printf("check fail!\n"); + } + return algoStatus; +} + +int igemm_config_INT8IO(int m, int n, int k, FILE* fout, void* buffer) +{ + printf("batchCount %d m %d n %d k %d\n", 1, m, n, k); + float alpha = 1.0f; + float beta = 0.0f; + + int8_t* d_A = (int8_t*)buffer; // m * k, stored in column-major + int8_t* d_B = d_A + m * k; // k * n, stored in column-major + int8_t* d_C = (int8_t*)(d_B + k * n); // m * n, stored in column-major + + cublasLtHandle_t ltHandle; + cublasLtCreate(<Handle); + + LtIgemmCustomFind(ltHandle, + m, + n, + k, + &alpha, /* host pointer */ + d_A, + d_B, + &beta, /* host pointer */ + d_C, + NULL, + 0, + fout); + + cublasLtDestroy(ltHandle); + return 0; +} + +int generate_swin_igemm_config( + int batch_size, int seq_len, int head_num, int size_per_head, void* buffer, bool isAppend) +{ + + // ensure program running on SM >= 7.5 + struct cudaDeviceProp prop; + check_cuda_error(cudaGetDeviceProperties(&prop, 0)); + if (!(prop.major >= 8 || (prop.major >= 7 && prop.minor >= 5))) { + printf("[ERROR] INT8 mode > 0 is only supported on device with sm >= 7.5\n "); + exit(-1); + } + printf("Device %s\n", prop.name); + + // check config + FILE* fout; + if (!isAppend) { + fout = fopen(IGEMM_CONFIG, "w+"); + fprintf( + fout, + "batch_size seq_len head_num size_per_head dataType ### batchCount m n k algoId customOption tile splitK_val swizzle reductionScheme workspaceSize stages exec_time\n"); + } + else { + fout = fopen(IGEMM_CONFIG, "a+"); + std::vector config; + char line[1024]; + while (fgets(line, 1024, fout) != NULL) { + config.push_back(std::string(line)); + } + if (config.size() >= MAX_CONFIG_NUM * GEMM_NUM) { + int startIdx = config.size() - (MAX_CONFIG_NUM - 1) * GEMM_NUM; + fclose(fout); + fout = fopen(IGEMM_CONFIG, "w+"); + for (int i = startIdx; i < (int)config.size(); i++) { + fprintf(fout, "%s", config[i].c_str()); + } + } + } + + int m = batch_size * seq_len; + int n = head_num * size_per_head; + int k = n; + int batchCount; + const int NUM_OF_BASIC_LAYERS = 4; + + printf("***Swin IGemm Testing Begin***\n"); + + for (int basic_layer = 0; basic_layer < NUM_OF_BASIC_LAYERS; basic_layer++) { + printf("\n-----------------------------\n"); + batchCount = 1; + m = batch_size * seq_len; + k = head_num * size_per_head; + n = 3 * head_num * size_per_head; + if (n % 32 != 0 || k % 32 != 0) { + printf("[WARNING] For INT8 gemm test, n, k should be multiples of 32 (n = %d, k = %d)\n", n, k); + } + else { + igemm_config_INT8IO(m, n, k, fout, buffer); + } + + printf("\n-----------------------------\n"); + m = batch_size * seq_len; + n = head_num * size_per_head; + k = head_num * size_per_head; + if (n % 32 != 0 || k % 32 != 0) { + printf("[WARNING] For INT8 gemm test, n, k should be multiples of 32 (n = %d, k = %d)\n", n, k); + } + else { + igemm_config_INT8IO(m, n, k, fout, buffer); + } + + printf("\n-----------------------------\n"); + m = batch_size * seq_len; + n = 4 * head_num * size_per_head; + k = head_num * size_per_head; + if (n % 32 != 0 || k % 32 != 0) { + printf("[WARNING] For INT8 gemm test, n, k should be multiples of 32 (n = %d, k = %d)\n", n, k); + } + else { + igemm_config_INT8IO(m, n, k, fout, buffer); + } + + printf("\n-----------------------------\n"); + m = batch_size * seq_len; + n = head_num * size_per_head; + k = 4 * head_num * size_per_head; + if (n % 32 != 0 || k % 32 != 0) { + printf("[WARNING] For INT8 gemm test, n, k should be multiples of 32 (n = %d, k = %d)\n", n, k); + } + else { + igemm_config_INT8IO(m, n, k, fout, buffer); + } + + if (basic_layer != NUM_OF_BASIC_LAYERS - 1) { + printf("\n-----------------------------\n"); + batch_size = batch_size / 4; + head_num = head_num * 2; + m = batch_size * seq_len; + n = head_num * size_per_head; + k = 2 * head_num * size_per_head; + if (n % 32 != 0 || k % 32 != 0) { + printf("[WARNING] For INT8 gemm test, n, k should be multiples of 32 (n = %d, k = %d)\n", n, k); + } + else { + igemm_config_INT8IO(m, n, k, fout, buffer); + } + } + printf("\n-----------------------------\n"); + } + + fclose(fout); + printf("\n-----------------------------\n"); + printf("***Swin IGemm Testing End***\n"); + return 0; +} + +} // namespace fastertransformer diff --git a/src/fastertransformer/utils/gemm_test/swin_igemm_func.h b/src/fastertransformer/utils/gemm_test/swin_igemm_func.h new file mode 100644 index 000000000..7067c08de --- /dev/null +++ b/src/fastertransformer/utils/gemm_test/swin_igemm_func.h @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "src/fastertransformer/utils/cublasAlgoMap.h" +#include "src/fastertransformer/utils/cuda_utils.h" +#include "src/fastertransformer/utils/gemm_test/encoder_igemm_func.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +namespace fastertransformer { + +/* CAUTION : must match cublasLtMatmulTile_t */ +// const char* const matmulTileName[] = { +// "UNDEF", "8x8", "8x16", "16x8", "8x32", "16x16", "32x8", "8x64", "16x32", +// "32x16", "64x8", "32x32", "32x64", "64x32", "32x128", "64x64", "128x32", "64x128", +// "128x64", "64x256", "128x128", "256x64", "64x512", "128x256", "256x128", "512x64", +// }; + +int generate_swin_igemm_config( + int batch_size, int seq_len, int head_num, int size_per_head, void* buffer, bool isAppend = true); + +} // namespace fastertransformer diff --git a/src/fastertransformer/utils/gemm_test/t5_gemm_func.cc b/src/fastertransformer/utils/gemm_test/t5_gemm_func.cc index 5e155db4b..ea8856dc7 100644 --- a/src/fastertransformer/utils/gemm_test/t5_gemm_func.cc +++ b/src/fastertransformer/utils/gemm_test/t5_gemm_func.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -47,7 +47,11 @@ void generate_t5_gemm_config(int batch_size, void* cublas_workspace; void* buffer; int workSpaceSize; +#ifdef ENABLE_BF16 + if (std::is_same::value || std::is_same::value) { +#else if (std::is_same::value) { +#endif // ENABLE_BF16 // cublas_workspace_ should be the start pointer of cudaMalloc() // to ensure 16B alignemnet cublas_workspace = buffer_in; @@ -171,8 +175,7 @@ void generate_t5_gemm_config(int batch_size, // gemm 10 size_t decoder_vocab_size_padded = ((size_t)ceil(decoder_vocab_size / 1. / tensor_para_size) * tensor_para_size); - int is_fp16 = std::is_same::value ? 1 : 0; - if (is_fp16) { + if (!std::is_same::value) { decoder_vocab_size_padded = ((size_t)ceil(decoder_vocab_size_padded / 8.) * 8); } M[10] = batch_size * beam_width; @@ -181,7 +184,7 @@ void generate_t5_gemm_config(int batch_size, batchCount[10] = 1; strcpy(mess[10], "logits gemm"); - // gemm 11 + // gemm 11 M[11] = batch_size * max_mem_seq_len; K[11] = encoder_d_model; N[11] = encoder_head_num / tensor_para_size * encoder_size_per_head; @@ -201,7 +204,9 @@ void generate_t5_gemm_config(int batch_size, const int ites = 100; struct timeval start, end; - if (sizeof(T) == sizeof(float)) { + CublasDataType data_type; + if (std::is_same::value) { + data_type = FLOAT_DATATYPE; AType = CUDA_R_32F; BType = CUDA_R_32F; CType = CUDA_R_32F; @@ -209,15 +214,26 @@ void generate_t5_gemm_config(int batch_size, startAlgo = (int)CUBLAS_GEMM_DEFAULT; endAlgo = (int)CUBLAS_GEMM_ALGO23; } - else { + else if (std::is_same::value) { + data_type = HALF_DATATYPE; AType = CUDA_R_16F; BType = CUDA_R_16F; CType = CUDA_R_16F; - computeType = is_fp16_compute_type ? CUDA_R_16F : CUDA_R_32F; + computeType = CUDA_R_32F; startAlgo = (int)CUBLAS_GEMM_DEFAULT_TENSOR_OP; endAlgo = (int)CUBLAS_GEMM_ALGO15_TENSOR_OP; } - +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + data_type = BFLOAT16_DATATYPE; + AType = CUDA_R_16BF; + BType = CUDA_R_16BF; + CType = CUDA_R_16BF; + computeType = CUDA_R_32F; + startAlgo = (int)CUBLAS_GEMM_DEFAULT_TENSOR_OP; + endAlgo = (int)CUBLAS_GEMM_ALGO15_TENSOR_OP; + } +#endif float f_alpha = (float)1.0f; float f_beta = (float)0.0f; @@ -247,29 +263,23 @@ void generate_t5_gemm_config(int batch_size, T* d_C = d_B + k * n * batchCount[i]; // array of pointer for batchedGemm - T *harray[12]; - harray[0] = (T *)buffer; - harray[1] = (T *)((char *)buffer + sizeof(T) * m * k); - harray[2] = (T *)((char *)buffer + 2 * sizeof(T) * m * k); - harray[4] = (T *)((char *)buffer + 3 * sizeof(T) * m * k); - harray[5] = - (T *)((char *)buffer + 3 * sizeof(T) * m * k + sizeof(T) * k * n); - harray[6] = (T *)((char *)buffer + 3 * sizeof(T) * m * k - + 2 * sizeof(T) * k * n); - harray[8] = (T *)((char *)buffer + 3 * sizeof(T) * m * k - + 3 * sizeof(T) * k * n); - harray[9] = (T *)((char *)buffer + 3 * sizeof(T) * m * k - + 3 * sizeof(T) * k * n + sizeof(T) * m * n); - harray[10] = (T *)((char *)buffer + 3 * sizeof(T) * m * k - + 3 * sizeof(T) * k * n + 2 * sizeof(T) * m * n); - - T **darray = 0; - check_cuda_error(cudaMalloc((void **)&darray, sizeof(T *) * 12)); - cudaMemcpy((void *)darray, (void *)harray, sizeof(T *) * 12, - cudaMemcpyHostToDevice); - T **dAarray = darray; - T **dBarray = darray + 4; - T **dCarray = darray + 8; + T* harray[12]; + harray[0] = (T*)buffer; + harray[1] = (T*)((char*)buffer + sizeof(T) * m * k); + harray[2] = (T*)((char*)buffer + 2 * sizeof(T) * m * k); + harray[4] = (T*)((char*)buffer + 3 * sizeof(T) * m * k); + harray[5] = (T*)((char*)buffer + 3 * sizeof(T) * m * k + sizeof(T) * k * n); + harray[6] = (T*)((char*)buffer + 3 * sizeof(T) * m * k + 2 * sizeof(T) * k * n); + harray[8] = (T*)((char*)buffer + 3 * sizeof(T) * m * k + 3 * sizeof(T) * k * n); + harray[9] = (T*)((char*)buffer + 3 * sizeof(T) * m * k + 3 * sizeof(T) * k * n + sizeof(T) * m * n); + harray[10] = (T*)((char*)buffer + 3 * sizeof(T) * m * k + 3 * sizeof(T) * k * n + 2 * sizeof(T) * m * n); + + T** darray = 0; + check_cuda_error(cudaMalloc((void**)&darray, sizeof(T*) * 12)); + cudaMemcpy((void*)darray, (void*)harray, sizeof(T*) * 12, cudaMemcpyHostToDevice); + T** dAarray = darray; + T** dBarray = darray + 4; + T** dCarray = darray + 8; float exec_time = 99999.0f; int fast_algo = 0; @@ -350,6 +360,27 @@ void generate_t5_gemm_config(int batch_size, computeType, static_cast(algo)); } + else if (i == 10) { + status = cublasGemmEx(cublas_handle, + CUBLAS_OP_T, + CUBLAS_OP_N, + n, + m, + k, + alpha, + d_B, + BType, + k, + d_A, + AType, + k, + beta, + d_C, + CType, + n, + computeType, + static_cast(algo)); + } else { status = cublasGemmEx(cublas_handle, CUBLAS_OP_N, @@ -372,8 +403,9 @@ void generate_t5_gemm_config(int batch_size, static_cast(algo)); } - if (status != CUBLAS_STATUS_SUCCESS) + if (status != CUBLAS_STATUS_SUCCESS) { break; + } } cudaDeviceSynchronize(); gettimeofday(&end, NULL); @@ -389,15 +421,45 @@ void generate_t5_gemm_config(int batch_size, printf("fast_algo %d costs %.3f ms\n", fast_algo, exec_time); - // for fp16, we compare cublasLt - if (is_fp16 == 1 && i != 1 && i != 2 && i != 0) { + using scaleT = float; + + if (is_fp16_compute_type) { + using scaleT = typename ScaleTypeConverter::Type; + } + + // for fp16 and bf16, we compare cublasLt + if (data_type != FLOAT_DATATYPE && i != 1 && i != 2 && i != 0 && i != 10) { printf("***cublasLt Gemm Testing Beign***\n"); // Let try a fixed number of combinations int ALGO_COMBINATIONS = 5000; customMatmulPerf_t perfResults[ALGO_COMBINATIONS]; // for t5, computeType & scaleType should be FP32 - if (is_fp16 && !is_fp16_compute_type) { + if (is_fp16_compute_type) { + using scaleT = typename ScaleTypeConverter::Type; + scaleT alpha_scale = (scaleT)1.0f; + scaleT beta_scale = (scaleT)0.0f; + + LtHgemmCustomFind(ltHandle, + m, + seq_len, + head_num, + size_per_head, + n, + m, + k, + &(alpha_scale), + d_B, + d_A, + &(beta_scale), + d_C, + cublas_workspace, + workSpaceSize, + fd, + perfResults, + ALGO_COMBINATIONS); + } + else { LtHgemmCustomFind(ltHandle, m, seq_len, @@ -406,10 +468,10 @@ void generate_t5_gemm_config(int batch_size, n, m, k, - &f_alpha, + &(f_alpha), d_B, d_A, - &f_beta, + &(f_beta), d_C, cublas_workspace, workSpaceSize, @@ -417,29 +479,19 @@ void generate_t5_gemm_config(int batch_size, perfResults, ALGO_COMBINATIONS); } - else { - LtHgemmCustomFind(ltHandle, - m, - seq_len, - head_num, - size_per_head, - n, - m, - k, - (T*)alpha, - d_B, - d_A, - (T*)beta, - d_C, - cublas_workspace, - workSpaceSize, - fd, - perfResults, - ALGO_COMBINATIONS); - } + if (perfResults[0].time < exec_time) { - printPerfStructure( - batch_size * (i <= 5 || i == 1 ? 1 : beam_width), seq_len, head_num, size_per_head, n, m, k, perfResults[0], fd, is_fp16, 0); + printPerfStructure(batch_size * (i <= 5 || i == 1 ? 1 : beam_width), + seq_len, + head_num, + size_per_head, + n, + m, + k, + perfResults[0], + fd, + data_type, + 0); } else { fprintf(fd, @@ -448,7 +500,7 @@ void generate_t5_gemm_config(int batch_size, seq_len, head_num, size_per_head, - is_fp16 ? HALF_DATATYPE : FLOAT_DATATYPE, + data_type, batchCount[i], n, m, @@ -465,7 +517,7 @@ void generate_t5_gemm_config(int batch_size, seq_len, head_num, size_per_head, - is_fp16 ? HALF_DATATYPE : FLOAT_DATATYPE, + data_type, batchCount[i], n, m, @@ -627,7 +679,7 @@ void generate_t5_gemm_config(int batch_size, seq_len, head_num, size_per_head, - is_fp16 ? HALF_DATATYPE : FLOAT_DATATYPE, + data_type, batchCount[i], m, n, @@ -680,6 +732,25 @@ template void generate_t5_gemm_config(int batch_size, bool isAppend, bool is_fp16_compute_type); +#ifdef ENABLE_BF16 +template void generate_t5_gemm_config<__nv_bfloat16>(int batch_size, + int beam_width, + int max_mem_seq_len, + int encoder_d_model, + int encoder_head_num, + int encoder_size_per_head, + int encoder_inter_size, + int decoder_d_model, + int decoder_head_num, + int decoder_size_per_head, + int decoder_inter_size, + int decoder_vocab_size, + int tensor_para_size, + void* buffer_in, + bool isAppend, + bool is_fp16_compute_type); +#endif + size_t calT5GemmTestBufSizeInByte(int batch_size, int beam_width, int max_mem_seq_len, @@ -693,7 +764,7 @@ size_t calT5GemmTestBufSizeInByte(int batch_size, int decoder_inter_size, int decoder_vocab_size, int tensor_para_size, - int is_fp16) + CublasDataType data_type) { const size_t local_encoder_head_num = encoder_head_num / tensor_para_size; const size_t local_encoder_hidden_units = local_encoder_head_num * encoder_size_per_head; @@ -727,19 +798,19 @@ size_t calT5GemmTestBufSizeInByte(int batch_size, + m * decoder_d_model); // decoder vocab gemm size_t decoder_vocab_size_padded = ((size_t)ceil(decoder_vocab_size / 1. / tensor_para_size) * tensor_para_size); - if (is_fp16) { + if (data_type != FLOAT_DATATYPE) { decoder_vocab_size_padded = ((size_t)ceil(decoder_vocab_size_padded / 8.) * 8); } buff_size.push_back(m * decoder_d_model + decoder_d_model * decoder_vocab_size_padded / tensor_para_size + m * decoder_vocab_size_padded / tensor_para_size); size_t buf_size_in_byte = 0; - int wordSize = (is_fp16 == 1 ? sizeof(half) : sizeof(float)); + int wordSize = (data_type == FLOAT_DATATYPE ? sizeof(float) : sizeof(half)); for (auto t : buff_size) { buf_size_in_byte = buf_size_in_byte > t ? buf_size_in_byte : t; } buf_size_in_byte *= wordSize; - buf_size_in_byte += ((is_fp16 == 1) ? CUBLAS_WORKSPACE_SIZE : 0); + buf_size_in_byte += ((data_type == HALF_DATATYPE || data_type == BFLOAT16_DATATYPE) ? CUBLAS_WORKSPACE_SIZE : 0); return buf_size_in_byte; } diff --git a/src/fastertransformer/utils/gemm_test/t5_gemm_func.h b/src/fastertransformer/utils/gemm_test/t5_gemm_func.h index def11d1d8..56b8ba18d 100644 --- a/src/fastertransformer/utils/gemm_test/t5_gemm_func.h +++ b/src/fastertransformer/utils/gemm_test/t5_gemm_func.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,8 +17,10 @@ #pragma once #include "src/fastertransformer/utils/cublasAlgoMap.h" +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" #include "src/fastertransformer/utils/cuda_utils.h" #include "src/fastertransformer/utils/gemm_test/gemm_func.h" + #include #include #include @@ -62,6 +64,6 @@ size_t calT5GemmTestBufSizeInByte(int batch_size, int decoder_inter_size, int decoder_vocab_size, int tensor_para_size, - int is_fp16); + CublasDataType data_type); } // namespace fastertransformer diff --git a/src/fastertransformer/utils/gemm_test/xlnet_gemm_func.cc b/src/fastertransformer/utils/gemm_test/xlnet_gemm_func.cc index 26adb7495..977b108cc 100644 --- a/src/fastertransformer/utils/gemm_test/xlnet_gemm_func.cc +++ b/src/fastertransformer/utils/gemm_test/xlnet_gemm_func.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -32,11 +32,11 @@ void generate_xlnet_gemm_config(int batch_size, void* buffer; int workSpaceSize; - int is_fp16 = 0; - if (sizeof(T) == sizeof(half)) - is_fp16 = 1; - +#ifdef ENABLE_BF16 + if (std::is_same::value || std::is_same::value) { +#else if (std::is_same::value) { +#endif // ENABLE_BF16 // cublas_workspace_ should be the start pointer of cudaMalloc() // to ensure 16B alignemnet cublas_workspace = buffer_in; @@ -227,7 +227,9 @@ void generate_xlnet_gemm_config(int batch_size, const int ites = 100; struct timeval start, end; - if (sizeof(T) == sizeof(float)) { + CublasDataType data_type; + if (std::is_same::value) { + data_type = FLOAT_DATATYPE; AType = CUDA_R_32F; BType = CUDA_R_32F; CType = CUDA_R_32F; @@ -235,17 +237,31 @@ void generate_xlnet_gemm_config(int batch_size, startAlgo = (int)CUBLAS_GEMM_DEFAULT; endAlgo = (int)CUBLAS_GEMM_ALGO23; } - else { + else if (std::is_same::value) { + data_type = HALF_DATATYPE; AType = CUDA_R_16F; BType = CUDA_R_16F; CType = CUDA_R_16F; - computeType = CUDA_R_16F; + computeType = CUDA_R_32F; + startAlgo = (int)CUBLAS_GEMM_DEFAULT_TENSOR_OP; + endAlgo = (int)CUBLAS_GEMM_ALGO15_TENSOR_OP; + } +#ifdef ENABLE_BF16 + else if (std::is_same::value) { + data_type = BFLOAT16_DATATYPE; + AType = CUDA_R_16BF; + BType = CUDA_R_16BF; + CType = CUDA_R_16BF; + computeType = CUDA_R_32F; startAlgo = (int)CUBLAS_GEMM_DEFAULT_TENSOR_OP; endAlgo = (int)CUBLAS_GEMM_ALGO15_TENSOR_OP; } +#endif + + using scaleT = typename ScaleTypeConverter::Type; - T alpha = (T)1.0f; - T beta = (T)0.0f; + scaleT alpha = (scaleT)1.0f; + scaleT beta = (scaleT)0.0f; printf("***Xlnet Gemm Testing Begin***\n"); printf("***Cublas Gemm Testing Begin***\n"); @@ -317,8 +333,9 @@ void generate_xlnet_gemm_config(int batch_size, computeType, static_cast(algo)); } - if (status != CUBLAS_STATUS_SUCCESS) + if (status != CUBLAS_STATUS_SUCCESS) { break; + } } cudaDeviceSynchronize(); gettimeofday(&end, NULL); @@ -333,36 +350,33 @@ void generate_xlnet_gemm_config(int batch_size, printf("fast_algo %d costs %.3f ms\n", fast_algo, exec_time); - int is_fp16 = 0; - if (sizeof(T) == sizeof(half)) - is_fp16 = 1; - if ((i == 1 || i == 7 || i == 8 || i == 9) && is_fp16 == 1) { + if ((i == 1 || i == 7 || i == 8 || i == 9) && data_type != FLOAT_DATATYPE) { printf("***cublasLt Gemm Testing Beign***\n"); // Let try a fixed number of combinations int ALGO_COMBINATIONS = 5000; customMatmulPerf_t perfResults[ALGO_COMBINATIONS]; - LtHgemmCustomFind(ltHandle, - batch_size, - seq_len, - head_num, - size_per_head, - n, - m, - k, - &alpha, - d_B, - d_A, - &beta, - d_C, - cublas_workspace, - workSpaceSize, - fd, - perfResults, - ALGO_COMBINATIONS); + LtHgemmCustomFind(ltHandle, + batch_size, + seq_len, + head_num, + size_per_head, + n, + m, + k, + &alpha, + d_B, + d_A, + &beta, + d_C, + cublas_workspace, + workSpaceSize, + fd, + perfResults, + ALGO_COMBINATIONS); if (perfResults[0].time < exec_time) { printPerfStructure( - batch_size, seq_len, head_num, size_per_head, n, m, k, perfResults[0], fd, is_fp16, 0); + batch_size, seq_len, head_num, size_per_head, n, m, k, perfResults[0], fd, data_type, 0); exec_time = perfResults[0].time; } else { @@ -372,7 +386,7 @@ void generate_xlnet_gemm_config(int batch_size, seq_len, head_num, size_per_head, - is_fp16 ? HALF_DATATYPE : FLOAT_DATATYPE, + data_type, batchCount[i], n, m, @@ -389,7 +403,7 @@ void generate_xlnet_gemm_config(int batch_size, seq_len, head_num, size_per_head, - is_fp16 ? HALF_DATATYPE : FLOAT_DATATYPE, + data_type, batchCount[i], n, m, @@ -421,4 +435,15 @@ template void generate_xlnet_gemm_config(int batch_size, int inter_size_, void* buffer_in, bool isAppend); +#ifdef ENABLE_BF16 +template void generate_xlnet_gemm_config<__nv_bfloat16>(int batch_size, + int seq_len, + int head_num, + int size_per_head, + int hidden_units_, + int inter_size_, + void* buffer_in, + bool isAppend); +#endif + } // namespace fastertransformer diff --git a/src/fastertransformer/utils/gemm_test/xlnet_gemm_func.h b/src/fastertransformer/utils/gemm_test/xlnet_gemm_func.h index c5fdc0ca3..6e290102f 100644 --- a/src/fastertransformer/utils/gemm_test/xlnet_gemm_func.h +++ b/src/fastertransformer/utils/gemm_test/xlnet_gemm_func.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -17,8 +17,10 @@ #pragma once #include "src/fastertransformer/utils/cublasAlgoMap.h" +#include "src/fastertransformer/utils/cuda_bf16_wrapper.h" #include "src/fastertransformer/utils/cuda_utils.h" #include "src/fastertransformer/utils/gemm_test/gemm_func.h" + #include #include #include diff --git a/src/fastertransformer/utils/logger.h b/src/fastertransformer/utils/logger.h index 49bed7767..bcdf8fa6c 100644 --- a/src/fastertransformer/utils/logger.h +++ b/src/fastertransformer/utils/logger.h @@ -1,7 +1,11 @@ +#pragma once + #include #include #include +#include "src/fastertransformer/utils/string_utils.h" + namespace fastertransformer { class Logger { @@ -15,34 +19,38 @@ class Logger { ERROR = 40 }; - static Logger& getLogger() { + static Logger& getLogger() + { static Logger instance; return instance; } Logger(Logger const&) = delete; - void operator=(Logger const&) = delete; + void operator=(Logger const&) = delete; template - void log(const Level level, const std::string format, const Args&... args) { + void log(const Level level, const std::string format, const Args&... args) + { if (level_ <= level) { std::string fmt = getPrefix(level) + format + "\n"; FILE* out = level_ < WARNING ? stdout : stderr; - fprintf(out, fmt.c_str(), args...); + std::string logstr = fmtstr(fmt, args...); + fprintf(out, "%s", logstr.c_str()); } } template - void log(const Level level, const int rank, - const std::string format, const Args&... args) + void log(const Level level, const int rank, const std::string format, const Args&... args) { if (level_ <= level) { std::string fmt = getPrefix(level, rank) + format + "\n"; FILE* out = level_ < WARNING ? stdout : stderr; - fprintf(stdout, fmt.c_str(), args...); + std::string logstr = fmtstr(fmt, args...); + fprintf(out, "%s", logstr.c_str()); } } - void setLevel(const Level level) { + void setLevel(const Level level) + { level_ = level; log(INFO, "Set logger level by %s", getLevelName(level).c_str()); } @@ -50,12 +58,7 @@ class Logger { private: const std::string PREFIX = "[FT]"; std::map level_name_ = { - {TRACE, "TRACE"}, - {DEBUG, "DEBUG"}, - {INFO, "INFO"}, - {WARNING, "WARNING"}, - {ERROR, "ERROR"} - }; + {TRACE, "TRACE"}, {DEBUG, "DEBUG"}, {INFO, "INFO"}, {WARNING, "WARNING"}, {ERROR, "ERROR"}}; #ifndef NDEBUG const Level DEFAULT_LOG_LEVEL = DEBUG; @@ -64,7 +67,8 @@ class Logger { #endif Level level_ = DEFAULT_LOG_LEVEL; - Logger() { + Logger() + { char* level_name = std::getenv("FT_LOG_LEVEL"); if (level_name != nullptr) { std::map name_to_level = { @@ -77,25 +81,30 @@ class Logger { auto level = name_to_level.find(level_name); if (level != name_to_level.end()) { setLevel(level->second); - } else { + } + else { fprintf(stderr, "[FT][WARNING] Invalid logger level FT_LOG_LEVEL=%s. " "Ignore the environment variable and use a default " - "logging level.\n", level_name); + "logging level.\n", + level_name); level_name = nullptr; } } } - inline std::string getLevelName(const Level level) { + inline std::string getLevelName(const Level level) + { return level_name_[level]; } - inline std::string getPrefix(const Level level) { + inline std::string getPrefix(const Level level) + { return PREFIX + "[" + getLevelName(level) + "] "; } - inline std::string getPrefix(const Level level, const int rank) { + inline std::string getPrefix(const Level level, const int rank) + { return PREFIX + "[" + getLevelName(level) + "][" + std::to_string(rank) + "] "; } }; @@ -106,4 +115,4 @@ class Logger { #define FT_LOG_INFO(...) FT_LOG(fastertransformer::Logger::INFO, __VA_ARGS__) #define FT_LOG_WARNING(...) FT_LOG(fastertransformer::Logger::WARNING, __VA_ARGS__) #define FT_LOG_ERROR(...) FT_LOG(fastertransformer::Logger::ERROR, __VA_ARGS__) -} +} // namespace fastertransformer diff --git a/src/fastertransformer/utils/memory_utils.cu b/src/fastertransformer/utils/memory_utils.cu index c80531b84..f47b2dd51 100644 --- a/src/fastertransformer/utils/memory_utils.cu +++ b/src/fastertransformer/utils/memory_utils.cu @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -14,9 +14,9 @@ * limitations under the License. */ -#include #include "src/fastertransformer/utils/logger.h" #include "src/fastertransformer/utils/memory_utils.h" +#include namespace fastertransformer { @@ -31,6 +31,10 @@ void deviceMalloc(T** ptr, int size, bool is_random_initialize) template void deviceMalloc(float** ptr, int size, bool is_random_initialize); template void deviceMalloc(half** ptr, int size, bool is_random_initialize); +#ifdef ENABLE_BF16 +template void deviceMalloc(__nv_bfloat16** ptr, int size, bool is_random_initialize); +#endif +template void deviceMalloc(uint16_t** ptr, int size, bool is_random_initialize); template void deviceMalloc(int** ptr, int size, bool is_random_initialize); template void deviceMalloc(bool** ptr, int size, bool is_random_initialize); template void deviceMalloc(char** ptr, int size, bool is_random_initialize); @@ -45,6 +49,7 @@ void deviceMemSetZero(T* ptr, int size) template void deviceMemSetZero(float* ptr, int size); template void deviceMemSetZero(half* ptr, int size); template void deviceMemSetZero(int* ptr, int size); +template void deviceMemSetZero(uint32_t* ptr, int size); template void deviceMemSetZero(bool* ptr, int size); template @@ -58,6 +63,10 @@ void deviceFree(T*& ptr) template void deviceFree(float*& ptr); template void deviceFree(half*& ptr); +#ifdef ENABLE_BF16 +template void deviceFree(__nv_bfloat16*& ptr); +#endif +template void deviceFree(unsigned short*& ptr); template void deviceFree(int*& ptr); template void deviceFree(bool*& ptr); template void deviceFree(char*& ptr); @@ -74,6 +83,9 @@ void deviceFill(T* devptr, int size, T value) template void deviceFill(float* devptr, int size, float value); template void deviceFill(half* devptr, int size, half value); +#ifdef ENABLE_BF16 +template void deviceFill(__nv_bfloat16* devptr, int size, __nv_bfloat16 value); +#endif template void deviceFill(int* devptr, int size, int value); template @@ -84,6 +96,9 @@ void cudaD2Hcpy(T* tgt, const T* src, const int size) template void cudaD2Hcpy(float* tgt, const float* src, int size); template void cudaD2Hcpy(half* tgt, const half* src, int size); +#ifdef ENABLE_BF16 +template void cudaD2Hcpy(__nv_bfloat16* tgt, const __nv_bfloat16* src, int size); +#endif template void cudaD2Hcpy(int* tgt, const int* src, int size); template void cudaD2Hcpy(bool* tgt, const bool* src, int size); @@ -95,6 +110,9 @@ void cudaH2Dcpy(T* tgt, const T* src, const int size) template void cudaH2Dcpy(float* tgt, const float* src, int size); template void cudaH2Dcpy(half* tgt, const half* src, int size); +#ifdef ENABLE_BF16 +template void cudaH2Dcpy(__nv_bfloat16* tgt, const __nv_bfloat16* src, int size); +#endif template void cudaH2Dcpy(int* tgt, const int* src, int size); template void cudaH2Dcpy(bool* tgt, const bool* src, int size); @@ -106,6 +124,9 @@ void cudaD2Dcpy(T* tgt, const T* src, const int size) template void cudaD2Dcpy(float* tgt, const float* src, int size); template void cudaD2Dcpy(half* tgt, const half* src, int size); +#ifdef ENABLE_BF16 +template void cudaD2Dcpy(__nv_bfloat16* tgt, const __nv_bfloat16* src, int size); +#endif template void cudaD2Dcpy(int* tgt, const int* src, int size); template void cudaD2Dcpy(bool* tgt, const bool* src, int size); template void cudaD2Dcpy(int8_t* tgt, const int8_t* src, int size); @@ -115,7 +136,7 @@ __global__ void cuda_random_uniform_kernel(T* buffer, const int size) { const int idx = blockIdx.x * blockDim.x + threadIdx.x; curandState_t local_state; - curand_init((T)1337.f, idx, 0, &local_state); + curand_init((unsigned long long int)1337, idx, 0, &local_state); for (int index = idx; index < size; index += blockDim.x * gridDim.x) { buffer[index] = (T)(curand_uniform(&local_state) * 0.2f - 0.1f); } @@ -156,62 +177,140 @@ void cudaRandomUniform(T* buffer, const int size) template void cudaRandomUniform(float* buffer, const int size); template void cudaRandomUniform(half* buffer, const int size); +#ifdef ENABLE_BF16 +template void cudaRandomUniform(__nv_bfloat16* buffer, const int size); +#endif template void cudaRandomUniform(int* buffer, const int size); template void cudaRandomUniform(bool* buffer, const int size); template void cudaRandomUniform(char* buffer, const int size); -template -int loadWeightFromBin(T* ptr, std::vector shape, std::string filename) +template +inline T_OUT convert_to_type(T_IN val) +{ + return (T_OUT)val; +} + +#ifdef ENABLE_BF16 +template<> +inline __nv_bfloat16 convert_to_type(float val) +{ + return __float2bfloat16(val); +} + +template<> +inline __nv_bfloat16 convert_to_type(half val) +{ + return __float2bfloat16(__half2float(val)); +} + +template<> +inline float convert_to_type<__nv_bfloat16, float>(__nv_bfloat16 val) +{ + return __bfloat162float(val); +} + +template<> +inline half convert_to_type<__nv_bfloat16, half>(__nv_bfloat16 val) +{ + return __float2half(__bfloat162float(val)); +} +#endif // ENABLE_BF16 + +template +int loadWeightFromBinFunc(T* ptr, std::vector shape, std::string filename) { if (shape.size() > 2) { printf("[ERROR] shape should have less than two dims \n"); return -1; } - int dim0 = shape[0], dim1 = 1; + size_t dim0 = shape[0], dim1 = 1; if (shape.size() == 2) { dim1 = shape[1]; } size_t size = dim0 * dim1; - - std::vector host_array(size); - + std::vector host_array(size); std::ifstream in(filename, std::ios::in | std::ios::binary); if (!in.is_open()) { - printf("[WARNING] file %s cannot be opened, loading model fails! \n", filename.c_str()); + FT_LOG_WARNING("file %s cannot be opened, loading model fails! \n", filename.c_str()); return 0; } - size_t float_data_size = sizeof(float) * size; + size_t loaded_data_size = sizeof(T_IN) * size; in.seekg(0, in.end); - // FT_CHECK(in.tellg() == float_data_size); in.seekg(0, in.beg); - FT_LOG_DEBUG("Read " + std::to_string(float_data_size) + " bytes from " + filename); - in.read((char*)host_array.data(), float_data_size); + FT_LOG_DEBUG("Read " + std::to_string(loaded_data_size) + " bytes from " + filename); + in.read((char*)host_array.data(), loaded_data_size); size_t in_get_size = in.gcount(); - if (in_get_size != float_data_size) { - printf("[WARNING] file %s only has %ld, but request %ld, loading model fails! \n", - filename.c_str(), - in_get_size, - float_data_size); + if (in_get_size != loaded_data_size) { + FT_LOG_WARNING("file %s only has %ld, but request %ld, loading model fails! \n", + filename.c_str(), + in_get_size, + loaded_data_size); return 0; } - if (std::is_same::value == true) + if (std::is_same::value == true) { cudaH2Dcpy(ptr, (T*)host_array.data(), size); + } else { std::vector host_array_2(size); for (size_t i = 0; i < size; i++) { - host_array_2[i] = __float2half(host_array[i]); + host_array_2[i] = convert_to_type(host_array[i]); } cudaH2Dcpy(ptr, (T*)host_array_2.data(), size); } + in.close(); + return 0; +} + +template int loadWeightFromBinFunc(float* ptr, std::vector shape, std::string filename); +template int loadWeightFromBinFunc(half* ptr, std::vector shape, std::string filename); +#ifdef ENABLE_BF16 +template int +loadWeightFromBinFunc<__nv_bfloat16, float>(__nv_bfloat16* ptr, std::vector shape, std::string filename); +#endif +template int loadWeightFromBinFunc(float* ptr, std::vector shape, std::string filename); +template int loadWeightFromBinFunc(half* ptr, std::vector shape, std::string filename); +#ifdef ENABLE_BF16 +template int +loadWeightFromBinFunc<__nv_bfloat16, half>(__nv_bfloat16* ptr, std::vector shape, std::string filename); +template int loadWeightFromBinFunc(float* ptr, std::vector shape, std::string filename); +template int loadWeightFromBinFunc(half* ptr, std::vector shape, std::string filename); +template int +loadWeightFromBinFunc<__nv_bfloat16, __nv_bfloat16>(__nv_bfloat16* ptr, std::vector shape, std::string filename); +#endif // ENABLE_BF16 + +template +int loadWeightFromBin(T* ptr, std::vector shape, std::string filename, FtCudaDataType model_file_type) +{ + switch (model_file_type) { + case FtCudaDataType::FP32: + loadWeightFromBinFunc(ptr, shape, filename); + break; + case FtCudaDataType::FP16: + loadWeightFromBinFunc(ptr, shape, filename); + break; +#ifdef ENABLE_BF16 + case FtCudaDataType::BF16: + loadWeightFromBinFunc(ptr, shape, filename); + break; +#endif + default: + FT_LOG_ERROR("Does not support FtCudaDataType=%d", model_file_type); + FT_CHECK(false); + } return 0; } -template int loadWeightFromBin(float* ptr, std::vector shape, std::string filename); -template int loadWeightFromBin(half* ptr, std::vector shape, std::string filename); +template int +loadWeightFromBin(float* ptr, std::vector shape, std::string filename, FtCudaDataType model_file_type); +template int loadWeightFromBin(half* ptr, std::vector shape, std::string filename, FtCudaDataType model_file_type); +#ifdef ENABLE_BF16 +template int +loadWeightFromBin(__nv_bfloat16* ptr, std::vector shape, std::string filename, FtCudaDataType model_file_type); +#endif __global__ void cudaD2DcpyHalf2Float(float* dst, half* src, const int size) { diff --git a/src/fastertransformer/utils/memory_utils.h b/src/fastertransformer/utils/memory_utils.h index 6ba4d6d05..27b3aaa26 100644 --- a/src/fastertransformer/utils/memory_utils.h +++ b/src/fastertransformer/utils/memory_utils.h @@ -45,7 +45,10 @@ template void cudaRandomUniform(T* buffer, const int size); template -int loadWeightFromBin(T* ptr, std::vector shape, std::string filename); +int loadWeightFromBin(T* ptr, + std::vector shape, + std::string filename, + FtCudaDataType model_file_type = FtCudaDataType::FP32); void invokeCudaD2DcpyHalf2Float(float* dst, half* src, const int size, cudaStream_t stream); void invokeCudaD2DcpyFloat2Half(half* dst, float* src, const int size, cudaStream_t stream); diff --git a/src/fastertransformer/utils/mpi_utils.h b/src/fastertransformer/utils/mpi_utils.h index ff6c6d75a..755e52fb1 100644 --- a/src/fastertransformer/utils/mpi_utils.h +++ b/src/fastertransformer/utils/mpi_utils.h @@ -16,8 +16,8 @@ #pragma once -#include #include "mpi.h" +#include namespace fastertransformer { diff --git a/src/fastertransformer/utils/nccl_utils.cc b/src/fastertransformer/utils/nccl_utils.cc index 2dc535490..2bddda1dc 100644 --- a/src/fastertransformer/utils/nccl_utils.cc +++ b/src/fastertransformer/utils/nccl_utils.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -20,115 +20,136 @@ namespace fastertransformer { template -void ftNcclAllReduceSum(const T* send_buf, T* recv_buf, const int data_size, ncclComm_t comm, cudaStream_t stream) +void ftNcclAllReduceSum(const T* send_buf, T* recv_buf, const int data_size, NcclParam nccl_param, cudaStream_t stream) { - ncclDataType_t nccl_data_type; - if (std::is_same::value) { - nccl_data_type = ncclFloat; - } - else if (std::is_same::value) { - nccl_data_type = ncclHalf; - } - else if (std::is_same::value) { - nccl_data_type = ncclInt; - } - else { - printf("[ERROR] reduce sum only support float, half and int. \n"); - exit(-1); - } +#ifdef BUILD_MULTI_GPU + ncclDataType_t nccl_data_type = getNcclDataType(); NCCLCHECK(ncclGroupStart()); - NCCLCHECK(ncclAllReduce((const void*)send_buf, (void*)recv_buf, data_size, nccl_data_type, ncclSum, comm, stream)); + NCCLCHECK(ncclAllReduce( + (const void*)send_buf, (void*)recv_buf, data_size, nccl_data_type, ncclSum, nccl_param.nccl_comm_, stream)); NCCLCHECK(ncclGroupEnd()); +#endif } template void ftNcclAllGather( - const T* send_buf, T* recv_buf, const int data_size, const int rank, ncclComm_t comm, cudaStream_t stream) + const T* send_buf, T* recv_buf, const int data_size, const int rank, NcclParam nccl_param, cudaStream_t stream) { - ncclDataType_t nccl_data_type; - if (std::is_same::value) { - nccl_data_type = ncclFloat; - } - else if (std::is_same::value) { - nccl_data_type = ncclHalf; - } - else if (std::is_same::value) { - nccl_data_type = ncclInt; - } - else { - printf("[ERROR] all2all gather only support float, half and int. \n"); - exit(-1); - } +#ifdef BUILD_MULTI_GPU + ncclDataType_t nccl_data_type = getNcclDataType(); NCCLCHECK(ncclGroupStart()); - NCCLCHECK(ncclAllGather(send_buf + rank * data_size, recv_buf, data_size, nccl_data_type, comm, stream)); + NCCLCHECK( + ncclAllGather(send_buf + rank * data_size, recv_buf, data_size, nccl_data_type, nccl_param.nccl_comm_, stream)); NCCLCHECK(ncclGroupEnd()); +#endif } template -void ftNcclSend(const T* send_buf, const int data_size, const int peer, ncclComm_t comm, cudaStream_t stream) +void ftNcclSend(const T* send_buf, const int data_size, const int peer, NcclParam nccl_param, cudaStream_t stream) { - ncclDataType_t nccl_data_type; - if (std::is_same::value) { - nccl_data_type = ncclFloat; - } - else if (std::is_same::value) { - nccl_data_type = ncclHalf; - } - else if (std::is_same::value) { - nccl_data_type = ncclInt; - } - else if (std::is_same::value) { - nccl_data_type = ncclInt8; - } - else { - printf("[ERROR] ftNcclSend only support float, half, int and bool. \n"); - exit(-1); - } - NCCLCHECK(ncclSend(send_buf, data_size, nccl_data_type, peer, comm, stream)); - // cudaDeviceSynchronize(); +#ifdef BUILD_MULTI_GPU + ncclDataType_t nccl_data_type = getNcclDataType(); + NCCLCHECK(ncclSend(send_buf, data_size, nccl_data_type, peer, nccl_param.nccl_comm_, stream)); +#endif } template void -ftNcclSend(const float* send_buf, const int data_size, const int peer, ncclComm_t comm, cudaStream_t stream); +ftNcclSend(const float* send_buf, const int data_size, const int peer, NcclParam nccl_param, cudaStream_t stream); template void -ftNcclSend(const half* send_buf, const int data_size, const int peer, ncclComm_t comm, cudaStream_t stream); +ftNcclSend(const half* send_buf, const int data_size, const int peer, NcclParam nccl_param, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void ftNcclSend( + const __nv_bfloat16* send_buf, const int data_size, const int peer, NcclParam nccl_param, cudaStream_t stream); +#endif template void -ftNcclSend(const int* send_buf, const int data_size, const int peer, ncclComm_t comm, cudaStream_t stream); +ftNcclSend(const int* send_buf, const int data_size, const int peer, NcclParam nccl_param, cudaStream_t stream); template void -ftNcclSend(const bool* send_buf, const int data_size, const int peer, ncclComm_t comm, cudaStream_t stream); +ftNcclSend(const bool* send_buf, const int data_size, const int peer, NcclParam nccl_param, cudaStream_t stream); template -void ftNcclRecv(T* recv_buf, const int data_size, const int peer, ncclComm_t comm, cudaStream_t stream) +void ftNcclRecv(T* recv_buf, const int data_size, const int peer, NcclParam nccl_param, cudaStream_t stream) { - ncclDataType_t nccl_data_type; - if (std::is_same::value) { - nccl_data_type = ncclFloat; - } - else if (std::is_same::value) { - nccl_data_type = ncclHalf; - } - else if (std::is_same::value) { - nccl_data_type = ncclInt; - } - else if (std::is_same::value) { - nccl_data_type = ncclInt8; - } - else { - printf("[ERROR] ncclRecv only support float, half, int and bool. \n"); - exit(-1); - } - NCCLCHECK(ncclRecv(recv_buf, data_size, nccl_data_type, peer, comm, stream)); - // cudaDeviceSynchronize(); +#ifdef BUILD_MULTI_GPU + ncclDataType_t nccl_data_type = getNcclDataType(); + NCCLCHECK(ncclRecv(recv_buf, data_size, nccl_data_type, peer, nccl_param.nccl_comm_, stream)); +#endif +} + +template void +ftNcclRecv(float* recv_buf, const int data_size, const int peer, NcclParam nccl_param, cudaStream_t stream); +template void +ftNcclRecv(half* recv_buf, const int data_size, const int peer, NcclParam nccl_param, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void +ftNcclRecv(__nv_bfloat16* recv_buf, const int data_size, const int peer, NcclParam nccl_param, cudaStream_t stream); +#endif +template void ftNcclRecv(int* recv_buf, const int data_size, const int peer, NcclParam nccl_param, cudaStream_t stream); +template void +ftNcclRecv(bool* recv_buf, const int data_size, const int peer, NcclParam nccl_param, cudaStream_t stream); + +template +void ftNcclBroadCast(T* buff, const int data_size, const int root, NcclParam nccl_param, cudaStream_t stream) +{ +#ifdef BUILD_MULTI_GPU + ncclDataType_t nccl_data_type = getNcclDataType(); + NCCLCHECK(ncclBcast(buff, data_size, nccl_data_type, root, nccl_param.nccl_comm_, stream)); +#endif } -template void ftNcclRecv(float* recv_buf, const int data_size, const int peer, ncclComm_t comm, cudaStream_t stream); -template void ftNcclRecv(half* recv_buf, const int data_size, const int peer, ncclComm_t comm, cudaStream_t stream); -template void ftNcclRecv(int* recv_buf, const int data_size, const int peer, ncclComm_t comm, cudaStream_t stream); -template void ftNcclRecv(bool* recv_buf, const int data_size, const int peer, ncclComm_t comm, cudaStream_t stream); +template void +ftNcclBroadCast(bool* buff, const int data_size, const int root, NcclParam nccl_param, cudaStream_t stream); +template void +ftNcclBroadCast(int* buff, const int data_size, const int root, NcclParam nccl_param, cudaStream_t stream); +template void +ftNcclBroadCast(float* buff, const int data_size, const int root, NcclParam nccl_param, cudaStream_t stream); +template void +ftNcclBroadCast(half* buff, const int data_size, const int root, NcclParam nccl_param, cudaStream_t stream); +#ifdef ENABLE_BF16 +template void +ftNcclBroadCast(__nv_bfloat16* buff, const int data_size, const int root, NcclParam nccl_param, cudaStream_t stream); +#endif + +template void ftNcclAllReduceSum( + const float* send_buf, float* recv_buf, const int data_size, NcclParam nccl_param, cudaStream_t stream); + +template void ftNcclAllReduceSum( + const half* send_buf, half* recv_buf, const int data_size, NcclParam nccl_param, cudaStream_t stream); + +#ifdef ENABLE_BF16 +template void ftNcclAllReduceSum(const __nv_bfloat16* send_buf, + __nv_bfloat16* recv_buf, + const int data_size, + NcclParam nccl_param, + cudaStream_t stream); +#endif + +template void ftNcclAllGather(const float* send_buf, + float* recv_buf, + const int data_size, + const int rank, + NcclParam nccl_param, + cudaStream_t stream); + +template void ftNcclAllGather(const half* send_buf, + half* recv_buf, + const int data_size, + const int rank, + NcclParam nccl_param, + cudaStream_t stream); + +#ifdef ENABLE_BF16 +template void ftNcclAllGather(const __nv_bfloat16* send_buf, + __nv_bfloat16* recv_buf, + const int data_size, + const int rank, + NcclParam nccl_param, + cudaStream_t stream); +#endif template -void ftNcclBroadCast(T* buff, const int data_size, const int root, ncclComm_t comm, cudaStream_t stream) +ncclDataType_t getNcclDataType() { +#ifdef BUILD_MULTI_GPU ncclDataType_t nccl_data_type; if (std::is_same::value) { nccl_data_type = ncclFloat; @@ -136,6 +157,11 @@ void ftNcclBroadCast(T* buff, const int data_size, const int root, ncclComm_t co else if (std::is_same::value) { nccl_data_type = ncclHalf; } +#if defined(ENABLE_BF16) && defined(ENABLE_BF16_NCCL) + else if (std::is_same::value) { + nccl_data_type = ncclBfloat16; + } +#endif else if (std::is_same::value) { nccl_data_type = ncclInt; } @@ -143,30 +169,13 @@ void ftNcclBroadCast(T* buff, const int data_size, const int root, ncclComm_t co nccl_data_type = ncclInt8; } else { - printf("[ERROR] ftNcclBroadCast only support bool and int. \n"); + printf("[ERROR] NCCL only support float, half, bfloat16, int and bool. \n"); exit(-1); } - NCCLCHECK(ncclBcast(buff, data_size, nccl_data_type, root, comm, stream)); - // cudaDeviceSynchronize(); + return nccl_data_type; +#endif } -template void ftNcclBroadCast(bool* buff, const int data_size, const int root, ncclComm_t comm, cudaStream_t stream); -template void ftNcclBroadCast(int* buff, const int data_size, const int root, ncclComm_t comm, cudaStream_t stream); -template void ftNcclBroadCast(float* buff, const int data_size, const int root, ncclComm_t comm, cudaStream_t stream); -template void ftNcclBroadCast(half* buff, const int data_size, const int root, ncclComm_t comm, cudaStream_t stream); - -template void -ftNcclAllReduceSum(const float* send_buf, float* recv_buf, const int data_size, ncclComm_t comm, cudaStream_t stream); - -template void -ftNcclAllReduceSum(const half* send_buf, half* recv_buf, const int data_size, ncclComm_t comm, cudaStream_t stream); - -template void ftNcclAllGather( - const float* send_buf, float* recv_buf, const int data_size, const int rank, ncclComm_t comm, cudaStream_t stream); - -template void ftNcclAllGather( - const half* send_buf, half* recv_buf, const int data_size, const int rank, ncclComm_t comm, cudaStream_t stream); - size_t getLocalBatchSize(const size_t batch_size, const size_t seq_len, const size_t pipeline_para_size) { size_t local_batch_size = batch_size; @@ -176,7 +185,7 @@ size_t getLocalBatchSize(const size_t batch_size, const size_t seq_len, const si if (local_batch_size % pipeline_para_size == 0) { local_batch_size /= pipeline_para_size; } - while (local_batch_size * seq_len > 2048 && local_batch_size % 2 == 0) { + while (local_batch_size * seq_len > 8192 && local_batch_size % 2 == 0) { local_batch_size /= 2; } return local_batch_size; diff --git a/src/fastertransformer/utils/nccl_utils.h b/src/fastertransformer/utils/nccl_utils.h index d8e1f72b9..0fa845fcc 100644 --- a/src/fastertransformer/utils/nccl_utils.h +++ b/src/fastertransformer/utils/nccl_utils.h @@ -20,6 +20,10 @@ #include "nccl.h" #include +#if defined(NCCL_VERSION_CODE) && (NCCL_VERSION_CODE >= 21003) +#define ENABLE_BF16_NCCL +#endif + namespace fastertransformer { #define NCCLCHECK(cmd) \ @@ -34,7 +38,12 @@ namespace fastertransformer { struct NcclParam { int rank_{0}; int world_size_{1}; - ncclComm_t nccl_comm_; + ncclComm_t nccl_comm_ = nullptr; + + NcclParam(): rank_(0), world_size_(1), nccl_comm_(nullptr){}; + NcclParam(int rank, int world_size, ncclComm_t comm): rank_(rank), world_size_(world_size), nccl_comm_(comm){}; + NcclParam(NcclParam const& param): + rank_(param.rank_), world_size_(param.world_size_), nccl_comm_(param.nccl_comm_){}; // int layers_per_group{0}; // bool is_valid(int i) @@ -47,21 +56,25 @@ struct NcclParam { // int local_batch_size{-1}; }; +// New APIs template -void ftNcclAllReduceSum(const T* send_buf, T* recv_buf, const int data_size, ncclComm_t comm, cudaStream_t stream); +void ftNcclAllReduceSum(const T* send_buf, T* recv_buf, const int data_size, NcclParam nccl_param, cudaStream_t stream); template void ftNcclAllGather( - const T* send_buf, T* recv_buf, const int data_size, const int rank, ncclComm_t comm, cudaStream_t stream); + const T* send_buf, T* recv_buf, const int data_size, const int rank, NcclParam nccl_param, cudaStream_t stream); + +template +void ftNcclBroadCast(T* buff, const int data_size, const int root, NcclParam nccl_param, cudaStream_t stream); template -void ftNcclBroadCast(T* buff, const int data_size, const int root, ncclComm_t comm, cudaStream_t stream); +void ftNcclRecv(T* recv_buf, const int data_size, const int peer, NcclParam nccl_param, cudaStream_t stream); template -void ftNcclRecv(T* recv_buf, const int data_size, const int peer, ncclComm_t comm, cudaStream_t stream); +void ftNcclSend(const T* send_buf, const int data_size, const int peer, NcclParam nccl_param, cudaStream_t stream); template -void ftNcclSend(const T* send_buf, const int data_size, const int peer, ncclComm_t comm, cudaStream_t stream); +ncclDataType_t getNcclDataType(); size_t getLocalBatchSize(const size_t batch_size, const size_t seq_len, const size_t pipeline_para_size); diff --git a/src/fastertransformer/utils/nvtx_utils.cc b/src/fastertransformer/utils/nvtx_utils.cc index 140f3a0e1..8b108c61b 100644 --- a/src/fastertransformer/utils/nvtx_utils.cc +++ b/src/fastertransformer/utils/nvtx_utils.cc @@ -1,25 +1,39 @@ /* -* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. -* -* Licensed under the Apache License, Version 2.0 (the "License"); -* you may not use this file except in compliance with the License. -* You may obtain a copy of the License at -* -* http://www.apache.org/licenses/LICENSE-2.0 -* -* Unless required by applicable law or agreed to in writing, software -* distributed under the License is distributed on an "AS IS" BASIS, -* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -* See the License for the specific language governing permissions and -* limitations under the License. -*/ + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #include "nvtx_utils.h" -namespace nvtx +namespace nvtx { +std::string getScope() { - std::string getScope(){ return scope;} - void addScope(std::string name){ scope = scope + name + "/"; return;} - void setScope(std::string name){ scope = name + "/"; return;} - void resetScope(){ scope = ""; return;} + return scope; } +void addScope(std::string name) +{ + scope = scope + name + "/"; + return; +} +void setScope(std::string name) +{ + scope = name + "/"; + return; +} +void resetScope() +{ + scope = ""; + return; +} +} // namespace nvtx diff --git a/src/fastertransformer/utils/nvtx_utils.h b/src/fastertransformer/utils/nvtx_utils.h index 49e1e5a3b..6cda6022e 100644 --- a/src/fastertransformer/utils/nvtx_utils.h +++ b/src/fastertransformer/utils/nvtx_utils.h @@ -1,18 +1,18 @@ /* -* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. -* -* Licensed under the Apache License, Version 2.0 (the "License"); -* you may not use this file except in compliance with the License. -* You may obtain a copy of the License at -* -* http://www.apache.org/licenses/LICENSE-2.0 -* -* Unless required by applicable law or agreed to in writing, software -* distributed under the License is distributed on an "AS IS" BASIS, -* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -* See the License for the specific language governing permissions and -* limitations under the License. -*/ + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ #pragma once @@ -21,30 +21,31 @@ extern bool NVTX_ON; -namespace nvtx -{ - static std::string scope; - std::string getScope(); - void addScope(std::string name); - void setScope(std::string name); - void resetScope(); -} +namespace nvtx { +static std::string scope; +std::string getScope(); +void addScope(std::string name); +void setScope(std::string name); +void resetScope(); +} // namespace nvtx #ifdef USE_NVTX -#define PUSH_RANGE(name) {\ - if(NVTX_ON == true) {\ - cudaDeviceSynchronize();\ - nvtxRangePush((nvtx::getScope() + name).c_str());\ - }\ -} - -#define POP_RANGE {\ - if(NVTX_ON == true) {\ - cudaDeviceSynchronize();\ - nvtxRangePop();\ - }\ -} +#define PUSH_RANGE(name) \ + { \ + if (NVTX_ON == true) { \ + cudaDeviceSynchronize(); \ + nvtxRangePush((nvtx::getScope() + name).c_str()); \ + } \ + } + +#define POP_RANGE \ + { \ + if (NVTX_ON == true) { \ + cudaDeviceSynchronize(); \ + nvtxRangePop(); \ + } \ + } #else diff --git a/src/fastertransformer/utils/string_utils.h b/src/fastertransformer/utils/string_utils.h new file mode 100644 index 000000000..28e6897ec --- /dev/null +++ b/src/fastertransformer/utils/string_utils.h @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include // std::make_unique +#include // std::stringstream +#include +#include + +template +inline std::string fmtstr(const std::string& format, Args... args) +{ + // This function came from a code snippet in stackoverflow under cc-by-1.0 + // https://stackoverflow.com/questions/2342162/stdstring-formatting-like-sprintf + + // Disable format-security warning in this function. +#if defined(_MSC_VER) // for visual studio +#pragma warning(push) +#pragma warning(warning(disable : 4996)) +#elif defined(__GNUC__) || defined(__clang__) // for gcc or clang +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wformat-security" +#endif + int size_s = std::snprintf(nullptr, 0, format.c_str(), args...) + 1; // Extra space for '\0' + if (size_s <= 0) { + throw std::runtime_error("Error during formatting."); + } + auto size = static_cast(size_s); + auto buf = std::make_unique(size); + std::snprintf(buf.get(), size, format.c_str(), args...); +#if defined(_MSC_VER) +#pragma warning(pop) +#elif defined(__GNUC__) || defined(__clang__) +#pragma GCC diagnostic pop +#endif + return std::string(buf.get(), buf.get() + size - 1); // We don't want the '\0' inside +} + +inline std::string vec2str(std::vector vec) +{ + std::stringstream ss; + ss << "("; + if (!vec.empty()) { + for (size_t i = 0; i < vec.size() - 1; ++i) { + ss << vec[i] << ", "; + } + ss << vec.back(); + } + ss << ")"; + return ss.str(); +} diff --git a/src/fastertransformer/utils/word_list.cc b/src/fastertransformer/utils/word_list.cc new file mode 100644 index 000000000..cfbeb1496 --- /dev/null +++ b/src/fastertransformer/utils/word_list.cc @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "word_list.h" +#include "memory_utils.h" + +#include "assert.h" + +namespace fastertransformer { + +int read_word_list(const std::string& filename, std::vector& file_data) +{ + std::ifstream word_list_file(filename, std::ios::in); + + std::string line_buf; + int line_count = 0; + size_t id_counts[2] = {0, 0}; + while (std::getline(word_list_file, line_buf)) { + + std::stringstream line_stream(line_buf); + std::string vals; + while (std::getline(line_stream, vals, ',')) { + file_data.push_back(std::stoi(vals)); + id_counts[line_count]++; + } + line_count++; + + if (line_count > 1) { + break; + } + } + assert(id_counts[0] == id_counts[1]); + + return 0; +} + +} // namespace fastertransformer diff --git a/src/fastertransformer/utils/word_list.h b/src/fastertransformer/utils/word_list.h new file mode 100644 index 000000000..97f856169 --- /dev/null +++ b/src/fastertransformer/utils/word_list.h @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#pragma once + +#include "Tensor.h" +#include "stdlib.h" + +namespace fastertransformer { + +int read_word_list(const std::string& filename, std::vector& tensor_data); + +} diff --git a/tests/CMakeLists.txt b/tests/CMakeLists.txt new file mode 100644 index 000000000..c85d6fd22 --- /dev/null +++ b/tests/CMakeLists.txt @@ -0,0 +1,15 @@ +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +add_subdirectory(unittests) diff --git a/tests/bert/tf_bert_unit_test.py b/tests/bert/tf_bert_unit_test.py index 7bfc1211f..922d3ab3c 100644 --- a/tests/bert/tf_bert_unit_test.py +++ b/tests/bert/tf_bert_unit_test.py @@ -49,7 +49,7 @@ def test_batch_fp32(self): for batch in [1, 8, 64, 128]: args_dict['batch_size'] = batch tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = bert_example(args_dict) @@ -62,7 +62,7 @@ def test_batch_fp16(self): for batch in [1, 8, 64, 128]: args_dict['batch_size'] = batch tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = bert_example(args_dict) @@ -75,9 +75,9 @@ def test_size_fp32(self): for size in [32, 40, 64, 120, 128]: args_dict['size_per_head'] = size - args_dict['inter_size'] = 8 * size * 4 + args_dict['inter_size'] = args_dict['head_number'] * size * 4 tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = bert_example(args_dict) @@ -90,9 +90,9 @@ def test_size_fp16(self): for size in [32, 40, 64, 120, 128]: args_dict['size_per_head'] = size - args_dict['inter_size'] = 8 * size * 4 + args_dict['inter_size'] = args_dict['head_number'] * size * 4 tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = bert_example(args_dict) @@ -105,9 +105,9 @@ def test_head_fp32(self): for h in [8, 12, 17, 24, 29, 32]: args_dict['head_number'] = h - args_dict['inter_size'] = h * 64 * 4 + args_dict['inter_size'] = h * args_dict['size_per_head'] * 4 tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = bert_example(args_dict) @@ -120,9 +120,9 @@ def test_head_fp16(self): for h in [8, 12, 17, 24, 29, 32]: args_dict['head_number'] = h - args_dict['inter_size'] = h * 64 * 4 + args_dict['inter_size'] = h * args_dict['size_per_head'] * 4 tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = bert_example(args_dict) @@ -137,7 +137,7 @@ def test_hidden_fp32(self): args_dict['size_per_head'] = p[1] args_dict['inter_size'] = p[0] * p[1] * 4 tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = bert_example(args_dict) @@ -152,7 +152,7 @@ def test_hidden_fp16(self): args_dict['size_per_head'] = p[1] args_dict['inter_size'] = p[0] * p[1] * 4 tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = bert_example(args_dict) @@ -165,7 +165,7 @@ def test_seqlen_fp32(self): for seqlen in [32, 130, 511, 1024, 1536]: args_dict['max_seq_len'] = seqlen tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = bert_example(args_dict) @@ -178,7 +178,7 @@ def test_seqlen_fp16(self): for seqlen in [32, 130, 511, 1024, 1536]: args_dict['max_seq_len'] = seqlen tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = bert_example(args_dict) @@ -194,7 +194,7 @@ def test_large_model_fp32(self): args_dict['size_per_head'] = p[1] args_dict['inter_size'] = p[0] * p[1] * 4 tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = bert_example(args_dict) @@ -211,7 +211,7 @@ def test_large_model_fp16(self): args_dict['size_per_head'] = p[1] args_dict['inter_size'] = p[0] * p[1] * 4 tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = bert_example(args_dict) diff --git a/tests/bert/tf_encoder_unit_test.py b/tests/bert/tf_encoder_unit_test.py index f762ffc00..2f5390952 100644 --- a/tests/bert/tf_encoder_unit_test.py +++ b/tests/bert/tf_encoder_unit_test.py @@ -49,7 +49,7 @@ def test_batch_fp32(self): for batch in [1, 8, 64, 128]: args_dict['batch_size'] = batch tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = encoder_example(args_dict) @@ -62,7 +62,7 @@ def test_batch_fp16(self): for batch in [1, 8, 64, 128]: args_dict['batch_size'] = batch tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = encoder_example(args_dict) @@ -77,7 +77,7 @@ def test_size_fp32(self): args_dict['size_per_head'] = size args_dict['inter_size'] = 8 * size * 4 tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = encoder_example(args_dict) @@ -92,7 +92,7 @@ def test_size_fp16(self): args_dict['size_per_head'] = size args_dict['inter_size'] = 8 * size * 4 tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = encoder_example(args_dict) @@ -107,7 +107,7 @@ def test_head_fp32(self): args_dict['head_number'] = h args_dict['inter_size'] = h * 64 * 4 tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = encoder_example(args_dict) @@ -122,7 +122,7 @@ def test_head_fp32(self): args_dict['head_number'] = h args_dict['inter_size'] = h * 64 * 4 tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = encoder_example(args_dict) @@ -137,7 +137,7 @@ def test_hidden_fp32(self): args_dict['size_per_head'] = p[1] args_dict['inter_size'] = p[0] * p[1] * 4 tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = encoder_example(args_dict) @@ -152,7 +152,7 @@ def test_hidden_fp16(self): args_dict['size_per_head'] = p[1] args_dict['inter_size'] = p[0] * p[1] * 4 tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = encoder_example(args_dict) @@ -165,7 +165,7 @@ def test_seqlen_fp32(self): for seqlen in [32, 130, 511, 1024, 1536]: args_dict['max_seq_len'] = seqlen tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = encoder_example(args_dict) @@ -178,7 +178,7 @@ def test_seqlen_fp16(self): for seqlen in [32, 130, 511, 1024, 1536]: args_dict['max_seq_len'] = seqlen tf.reset_default_graph() - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['max_seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['max_seq_len'], args_dict['head_number'], args_dict['size_per_head'], args_dict['data_type'] == 'fp16')) max_diff = encoder_example(args_dict) diff --git a/tests/bert/th_bert_unit_test.py b/tests/bert/th_bert_unit_test.py index 2b9b00456..571a9b95b 100644 --- a/tests/bert/th_bert_unit_test.py +++ b/tests/bert/th_bert_unit_test.py @@ -16,7 +16,7 @@ import unittest import os import copy -os.environ['TF_CPP_MIN_LOG_LEVEL'] = '3' +os.environ['NVIDIA_TF32_OVERRIDE'] = '0' import sys dir_path = os.path.dirname(os.path.realpath(__file__)) sys.path.append(dir_path + "/../..") @@ -49,7 +49,7 @@ def test_batch_fp32(self): for batch in [1, 8, 64, 128]: args_dict['batch_size'] = batch - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['seq_len'], args_dict['head_num'], args_dict['head_size'], args_dict['fp16'] == True)) max_diff = bert_example(args_dict) @@ -62,7 +62,7 @@ def test_batch_fp16(self): for batch in [1, 8, 64, 128]: args_dict['batch_size'] = batch - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['seq_len'], args_dict['head_num'], args_dict['head_size'], args_dict['fp16'] == True)) max_diff = bert_example(args_dict) @@ -76,7 +76,7 @@ def test_hidden_fp32(self): args_dict['head_size'] = p[1] args_dict['inter_size'] = p[0] * p[1] * 4 - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['seq_len'], args_dict['head_num'], args_dict['head_size'], args_dict['fp16'] == True)) max_diff = bert_example(args_dict) @@ -91,7 +91,7 @@ def test_hidden_fp16(self): args_dict['head_size'] = p[1] args_dict['inter_size'] = p[0] * p[1] * 4 - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['seq_len'], args_dict['head_num'], args_dict['head_size'], args_dict['fp16'] == True)) max_diff = bert_example(args_dict) @@ -102,8 +102,10 @@ def test_seqlen_fp32(self): for seqlen in [32, 130, 511, 1024, 1536]: args_dict['seq_len'] = seqlen + if seqlen == 1536: + args_dict['layer_num'] = 6 - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['seq_len'], args_dict['head_num'], args_dict['head_size'], args_dict['fp16'] == True)) max_diff = bert_example(args_dict) @@ -115,8 +117,10 @@ def test_seqlen_fp16(self): for seqlen in [32, 130, 511, 1024, 1536]: args_dict['seq_len'] = seqlen - - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['seq_len'], + if seqlen == 1536: + args_dict['layer_num'] = 6 + + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['seq_len'], args_dict['head_num'], args_dict['head_size'], args_dict['fp16'] == True)) max_diff = bert_example(args_dict) diff --git a/tests/bert/th_encoder_unit_test.py b/tests/bert/th_encoder_unit_test.py index ba8ead0a4..b44789ecf 100644 --- a/tests/bert/th_encoder_unit_test.py +++ b/tests/bert/th_encoder_unit_test.py @@ -16,7 +16,7 @@ import unittest import os import copy -os.environ['TF_CPP_MIN_LOG_LEVEL'] = '3' +os.environ['NVIDIA_TF32_OVERRIDE'] = '0' import sys dir_path = os.path.dirname(os.path.realpath(__file__)) sys.path.append(dir_path + "/../..") @@ -49,7 +49,7 @@ def test_batch_fp32(self): for batch in [1, 8, 64, 128]: args_dict['batch_size'] = batch - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['seq_len'], args_dict['head_num'], args_dict['head_size'], args_dict['fp16'] == True)) max_diff = encoder_example(args_dict) @@ -62,7 +62,7 @@ def test_batch_fp16(self): for batch in [1, 8, 64, 128]: args_dict['batch_size'] = batch - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['seq_len'], args_dict['head_num'], args_dict['head_size'], args_dict['fp16'] == True)) max_diff = encoder_example(args_dict) @@ -76,7 +76,7 @@ def test_hidden_fp32(self): args_dict['head_size'] = p[1] args_dict['inter_size'] = p[0] * p[1] * 4 - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['seq_len'], args_dict['head_num'], args_dict['head_size'], args_dict['fp16'] == True)) max_diff = encoder_example(args_dict) @@ -91,7 +91,7 @@ def test_hidden_fp16(self): args_dict['head_size'] = p[1] args_dict['inter_size'] = p[0] * p[1] * 4 - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['seq_len'], args_dict['head_num'], args_dict['head_size'], args_dict['fp16'] == True)) max_diff = encoder_example(args_dict) @@ -103,7 +103,7 @@ def test_seqlen_fp32(self): for seqlen in [32, 130, 511, 1024, 1536]: args_dict['seq_len'] = seqlen - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['seq_len'], args_dict['head_num'], args_dict['head_size'], args_dict['fp16'] == True)) max_diff = encoder_example(args_dict) @@ -116,7 +116,7 @@ def test_seqlen_fp16(self): for seqlen in [32, 130, 511, 1024, 1536]: args_dict['seq_len'] = seqlen - os.system("./bin/bert_gemm {} {} {} {} {} 0".format(args_dict['batch_size'], args_dict['seq_len'], + os.system("./bin/bert_gemm {} {} {} {} {} 0 > .tmp.gemm.log && cat .tmp.gemm.log".format(args_dict['batch_size'], args_dict['seq_len'], args_dict['head_num'], args_dict['head_size'], args_dict['fp16'] == True)) max_diff = encoder_example(args_dict) diff --git a/tests/decoding/tf_decoding_unit_test.py b/tests/decoding/tf_decoding_unit_test.py index 654fb1547..654200b46 100644 --- a/tests/decoding/tf_decoding_unit_test.py +++ b/tests/decoding/tf_decoding_unit_test.py @@ -1,4 +1,4 @@ -# Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -43,7 +43,8 @@ class TestDecoding(unittest.TestCase): 'target_vocabulary': "../examples/tensorflow/decoding/utils/translation/wmtende.vocab", 'source': "../examples/tensorflow/decoding/utils/translation/test.en", 'target': "../examples/tensorflow/decoding/utils/translation/test.de", - "remove_padding": "True" + "remove_padding": "True", + "max_iteration": 10, } def check_result(self, beam_width, datatype, test_time, topk=4, topp=0.0, batch_size=-1): @@ -78,51 +79,51 @@ def run_translate(self, beam_width, datatype, test_time, topk=4, topp=0.0, batch result.value = 0 def test_decoding_beamsearch_fp32(self): - os.system("./bin/decoding_gemm 32 4 8 64 2048 32001 128 512 0") + os.system("./bin/decoding_gemm 32 4 8 64 2048 32001 128 512 0 > .tmp.gemm.log && cat .tmp.gemm.log") self.check_result(4, 'fp32', '012', batch_size=32) def test_decoding_beamsearch_fp16(self): - os.system("./bin/decoding_gemm 32 4 8 64 2048 32001 128 512 1") + os.system("./bin/decoding_gemm 32 4 8 64 2048 32001 128 512 1 > .tmp.gemm.log && cat .tmp.gemm.log") self.check_result(4, 'fp16', '012', batch_size=32) def test_decoding_beamsearch_fp32_2(self): - os.system("./bin/decoding_gemm 16 32 8 64 2048 32001 128 512 0") + os.system("./bin/decoding_gemm 16 32 8 64 2048 32001 128 512 0 > .tmp.gemm.log && cat .tmp.gemm.log") self.check_result(32, 'fp32', '012', batch_size=16) def test_decoding_beamsearch_fp16_2(self): - os.system("./bin/decoding_gemm 16 32 8 64 2048 32001 128 512 1") + os.system("./bin/decoding_gemm 16 32 8 64 2048 32001 128 512 1 > .tmp.gemm.log && cat .tmp.gemm.log") self.check_result(32, 'fp16', '012', batch_size=16) def test_decoding_topk_sampling_fp32(self): - os.system("./bin/decoding_gemm 128 1 8 64 2048 32001 128 512 0") + os.system("./bin/decoding_gemm 128 1 8 64 2048 32001 128 512 0 > .tmp.gemm.log && cat .tmp.gemm.log") self.check_result(1, 'fp32', '345', 4, 0.0) def test_decoding_topk_sampling_fp16(self): - os.system("./bin/decoding_gemm 128 1 8 64 2048 32001 128 512 1") + os.system("./bin/decoding_gemm 128 1 8 64 2048 32001 128 512 1 > .tmp.gemm.log && cat .tmp.gemm.log") self.check_result(1, 'fp16', '345', 4, 0.0) def test_decoding_topk_sampling_fp32_2(self): - os.system("./bin/decoding_gemm 128 1 8 64 2048 32001 128 512 0") + os.system("./bin/decoding_gemm 128 1 8 64 2048 32001 128 512 0 > .tmp.gemm.log && cat .tmp.gemm.log") self.check_result(1, 'fp32', '345', 64, 0.0) def test_decoding_topk_sampling_fp16_2(self): - os.system("./bin/decoding_gemm 128 1 8 64 2048 32001 128 512 1") + os.system("./bin/decoding_gemm 128 1 8 64 2048 32001 128 512 1 > .tmp.gemm.log && cat .tmp.gemm.log") self.check_result(1, 'fp16', '345', 64, 0.0) def test_decoding_topp_sampling_fp32(self): - os.system("./bin/decoding_gemm 128 1 8 64 2048 32001 128 512 0") + os.system("./bin/decoding_gemm 128 1 8 64 2048 32001 128 512 0 > .tmp.gemm.log && cat .tmp.gemm.log") self.check_result(1, 'fp32', '345', 0, 0.5) def test_decoding_topp_sampling_fp16(self): - os.system("./bin/decoding_gemm 128 1 8 64 2048 32001 128 512 1") + os.system("./bin/decoding_gemm 128 1 8 64 2048 32001 128 512 1 > .tmp.gemm.log && cat .tmp.gemm.log") self.check_result(1, 'fp16', '345', 0, 0.5) def test_decoding_topp_sampling_fp32_2(self): - os.system("./bin/decoding_gemm 128 1 8 64 2048 32001 128 512 0") + os.system("./bin/decoding_gemm 128 1 8 64 2048 32001 128 512 0 > .tmp.gemm.log && cat .tmp.gemm.log") self.check_result(1, 'fp32', '345', 0, 0.9) def test_decoding_topp_sampling_fp16_2(self): - os.system("./bin/decoding_gemm 128 1 8 64 2048 32001 128 512 1") + os.system("./bin/decoding_gemm 128 1 8 64 2048 32001 128 512 1 > .tmp.gemm.log && cat .tmp.gemm.log") self.check_result(1, 'fp16', '345', 0, 0.9) if __name__ == "__main__": diff --git a/tests/decoding/tf_fused_self_multihead_attention_unit_test.py b/tests/decoding/tf_fused_self_multihead_attention_unit_test.py index 25006ef63..5c21f865a 100644 --- a/tests/decoding/tf_fused_self_multihead_attention_unit_test.py +++ b/tests/decoding/tf_fused_self_multihead_attention_unit_test.py @@ -1,4 +1,4 @@ -# Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/tests/unittests/CMakeLists.txt b/tests/unittests/CMakeLists.txt new file mode 100644 index 000000000..31d42fb7d --- /dev/null +++ b/tests/unittests/CMakeLists.txt @@ -0,0 +1,27 @@ +# Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +add_executable(test_gemm test_gemm.cu) +target_link_libraries(test_gemm PUBLIC -lcublas -lcudart -lcurand gemm cublasMMWrapper) + +add_executable(test_sampling test_sampling.cu) +target_link_libraries(test_sampling PUBLIC + -lcublas -lcublasLt -lcudart + cublasMMWrapper memory_utils + DynamicDecodeLayer TopKSamplingLayer TopPSamplingLayer TopKTopPSamplingLayer) + +add_executable(test_logprob_kernels test_logprob_kernels.cu) +target_link_libraries(test_logprob_kernels PUBLIC + -lcublas -lcublasLt -lcudart + logprob_kernels memory_utils) diff --git a/tests/unittests/test_gemm.cu b/tests/unittests/test_gemm.cu new file mode 100644 index 000000000..13719f7ff --- /dev/null +++ b/tests/unittests/test_gemm.cu @@ -0,0 +1,909 @@ +#include +#include +#include +#include +#include +#include +#include + +#include "src/fastertransformer/layers/DenseWeight.h" +#include "src/fastertransformer/utils/allocator.h" +#include "src/fastertransformer/utils/cublasMMWrapper.h" +#include "src/fastertransformer/utils/cuda_utils.h" +#include "src/fastertransformer/utils/gemm.h" +#include "src/fastertransformer/utils/logger.h" +#include "src/fastertransformer/utils/memory_utils.h" + +using namespace fastertransformer; + +// Can be replaced by the function provided by a test framework + +class TestFailureError : public std::exception { +private: + std::string msg_; +public: + explicit TestFailureError() = default; + explicit TestFailureError(std::string name, std::string msg = "") { + msg_ = fmtstr("TEST FAIL [%s] %s", name.c_str(), msg.c_str()); + } + const char* what () const throw () { + return msg_.c_str(); + } +}; + +#define EXPECT_TRUE(cond) \ + do { if(!(cond)) { \ + FT_LOG_ERROR("TEST FAIL [%s] at %s:%d", \ + __func__, __FILE__, __LINE__); \ + throw TestFailureError(__func__); \ + } } while(false) + +#define EXPECT_ALMOST_EQUAL(name, dtype, ctype, out, ref) \ + do { \ + bool is_ok = checkResult(name, out, ref); \ + if(!is_ok) { \ + FT_LOG_ERROR("TEST FAIL [%s] at %s:%d", \ + __func__, __FILE__, __LINE__); \ + throw TestFailureError(__func__); \ + } \ + } while(false) + +//////////////////////////////////////////////////////////////////////////////////// + +// TensorWrapper is to handle a tensor object as well as its memory buffer, +// because tensor.data is const we cannot set values. +class TensorWrapper { +private: + IAllocator* allocator; + +public: + std::vector shape; + DataType type; + Tensor* tensor; + void* data; + + TensorWrapper(IAllocator* allocator, DataType dtype, std::vector shape, bool zero_init = false) + { + this->allocator = allocator; + this->type = dtype; + this->shape = shape; + + size_t tensor_memsize = this->memsize(); + this->data = this->allocator->malloc(tensor_memsize, false); + if (zero_init) { + check_cuda_error(cudaMemset(data, 0x0, tensor_memsize)); + } else { + setRandomValues(); + } + this->tensor = new Tensor(MEMORY_GPU, dtype, shape, data); + } + + TensorWrapper(TensorWrapper const& other) + : allocator(other.allocator), shape(other.shape), type(other.type), data(other.data), tensor(other.tensor) + { + FT_LOG_DEBUG("TensorWrapper copy: this=%p other=%p", data, other.data); + } + ~TensorWrapper() + { + delete tensor; + allocator->free(data); + } + + void setInvalidValues() + { + size_t type_size = tensor->type == TYPE_FP32 ? sizeof(float) : sizeof(half); + size_t tensor_size = type_size * tensor->size(); + // Fill by a random number to guarantee invalid values + check_cuda_error(cudaMemset(data, 0xdc, tensor_size)); + } + + void setRandomValues() { + // random initialization + size_t num_elements = this->size(); + switch (this->type) { + case TYPE_FP32: + cudaRandomUniform((float*)data, num_elements); + break; + case TYPE_FP16: + cudaRandomUniform((half*)data, num_elements); + break; + default: + // Will be added more if needed. + throw std::runtime_error("Not supported data type"); + } + } + + size_t size() { + size_t n_elements = 1; + for (size_t s : this->shape) { + n_elements *= s; + } + return n_elements; + } + + size_t memsize() { + size_t type_size = 0; + switch (this->type) { + case TYPE_FP32: + type_size = sizeof(float); + break; + case TYPE_FP16: + type_size = sizeof(half); + break; + default: + throw std::runtime_error("Not supported data type."); + } + return type_size * this->size(); + } +}; + +template +void computeReference(GemmOp transa, + GemmOp transb, + TensorWrapper& C, + TensorWrapper& A, + TensorWrapper& B, + float alpha = 1.0f, + float beta = 0.0f) +{ + size_t m = C.shape[0]; + size_t n = C.shape[1]; + size_t k = A.shape[1]; + + size_t lda = (transa == GEMM_OP_N) ? k : m; + size_t ldb = (transb == GEMM_OP_N) ? n : k; + size_t ldc = n; + + cudaDataType_t atype = (A.type == TYPE_FP16) ? CUDA_R_16F : CUDA_R_32F; + cudaDataType_t btype = (B.type == TYPE_FP16) ? CUDA_R_16F : CUDA_R_32F; + cudaDataType_t ctype = (C.type == TYPE_FP16) ? CUDA_R_16F : CUDA_R_32F; + cudaDataType_t compute_type = (computeType == TYPE_FP16) ? CUDA_R_16F : CUDA_R_32F; + + cublasHandle_t cublas_handle; + check_cuda_error(cublasCreate(&cublas_handle)); + + half h_alpha = (half)alpha; + half h_beta = (half)beta; + const void* _alpha = (computeType == TYPE_FP16) ? (const void*)&h_alpha : (const void*)α + const void* _beta = (computeType == TYPE_FP16) ? (const void*)&h_beta : (const void*)β + + check_cuda_error(cublasGemmEx(cublas_handle, + getCublasOperation(transb), + getCublasOperation(transa), + n, m, k, + _alpha, + (const void*)B.data, btype, ldb, + (const void*)A.data, atype, lda, + _beta, + (void*)C.data, ctype, ldc, + compute_type, + CUBLAS_GEMM_DEFAULT)); + check_cuda_error(cublasDestroy(cublas_handle)); + cudaDeviceSynchronize(); +} + +bool almostEqual(float a, float b, float atol = 1e-5, float rtol = 1e-8) +{ + // Params: a = value to compare and b = reference + // This function follows implementation of numpy.isclose(), which checks + // abs(a - b) <= (atol + rtol * abs(b)). + // Note that the inequality above is asymmetric where b is considered as + // a reference value. To account into both absolute/relative errors, it + // uses absolute tolerance and relative tolerance at the same time. The + // default values of atol and rtol borrowed from numpy.isclose(). For the + // case of nan value, the result will be true. + if (isnan(a) && isnan(b)) { + return true; + } + return fabs(a - b) <= (atol + rtol * fabs(b)); +} + +template +bool _checkResult(std::string name, TensorWrapper& out, TensorWrapper& ref, float atol, float rtol) { + assert(out.type == ref.type); + + size_t out_size = out.size(); + size_t ref_size = ref.size(); + T* h_out = reinterpret_cast(malloc(sizeof(T) * out_size)); + T* h_ref = reinterpret_cast(malloc(sizeof(T) * ref_size)); + + cudaMemcpy(h_out, out.data, sizeof(T) * out_size, cudaMemcpyDeviceToHost); + cudaMemcpy(h_ref, ref.data, sizeof(T) * ref_size, cudaMemcpyDeviceToHost); + cudaDeviceSynchronize(); + + size_t failures = 0; + for (size_t i = 0; i < out_size; ++i) { + // The values for the output and the reference. + float a = (float)h_out[i]; + float b = (float)h_ref[i]; + + bool ok = almostEqual(a, b, atol, rtol); + // Print the error. + if( !ok && failures < 4 ) { + FT_LOG_ERROR(">> invalid result for i=%lu:", i); + FT_LOG_ERROR(">> found......: %10.6f", a); + FT_LOG_ERROR(">> expected...: %10.6f", b); + FT_LOG_ERROR(">> error......: %.6f", fabsf(a - b)); + FT_LOG_ERROR(">> tol........: %.6f", atol + rtol * fabs(b)); + } + + // Update the number of failures. + failures += ok ? 0 : 1; + } + + // Allow not matched up to 1% elements. + size_t tol_failures = (size_t)(0.01 * out_size); + FT_LOG_INFO("check....... %30s : %s (failures: %.2f%% atol: %.2e rtol: %.2e)", + name.c_str(), failures <= tol_failures ? "OK" : "FAILED", + 100. * failures / out_size, atol, rtol); + return failures <= tol_failures; +} + +template +bool checkResult(std::string name, TensorWrapper& out, TensorWrapper& ref) { + float atol = (computeType == TYPE_FP32) ? 1e-6f : 1e-3f; + float rtol = (computeType == TYPE_FP32) ? 1e-4f : 1e-1f; + bool is_ok = false; + if (sizeof(T) == 4) { + is_ok = _checkResult(name, out, ref, atol, rtol); + } else { + is_ok = _checkResult(name, out, ref, atol, rtol); + } + return is_ok; +} + +template +bool checkResult(TensorWrapper& out, TensorWrapper& ref) { + return checkResult("", out, ref); +} + +template +std::string toString() { + std::string str = "dtype="; + str += std::is_same::value ? "FP32" : "FP16"; + return str; +} + +template +std::string toString() { + std::string str = "dtype="; + str += std::is_same::value ? "FP32" : "FP16"; + str += ", compute_type="; + str += (ctype == TYPE_FP32) ? "FP32" : "FP16"; + return str; +} + +std::string toString(GemmOp op) { + return op == GEMM_OP_N ? "N" : "T"; +} + +struct GemmOpPair { + GemmOp transa; + GemmOp transb; +}; + +static const std::vector op_pairs {{GEMM_OP_N, GEMM_OP_N}, + {GEMM_OP_N, GEMM_OP_T}, + {GEMM_OP_T, GEMM_OP_N}, + {GEMM_OP_T, GEMM_OP_T}}; + +static inline std::string getTestName(const char* func_name, GemmOp transa, GemmOp transb, + size_t m, size_t n, size_t k) +{ + return fmtstr("%s [opA=%s, opB=%s, m=%ld, n=%ld, k=%ld]", + func_name, getGemmOpString(transa).c_str(), getGemmOpString(transb).c_str(), + m, n, k); +} + +static inline std::string getTestName(const char* func_name, GemmOpPair op_pairs, + size_t m, size_t n, size_t k) +{ + return getTestName(func_name, op_pairs.transa, op_pairs.transb, m, n, k); +} + + +/////////////////////////////////// Unittests ////////////////////////////////////////// + +template +void testGemmCorrectnessMatmul(size_t m, size_t n, size_t k) { + FT_LOG_INFO("Matmul function correctness test [m=%ld, n=%ld, k=%ld, %s]", + m, n, k, toString().c_str()); + cudaStream_t stream; + check_cuda_error(cudaStreamCreate(&stream)); + + Allocator allocator(getDevice()); + + DataType dtype = getTensorType(); + TensorWrapper a_tensor(&allocator, dtype, {m, k}, false); + TensorWrapper b_tensor(&allocator, dtype, {k, n}, false); + TensorWrapper c_tensor(&allocator, dtype, {m, n}, true); + TensorWrapper expected(&allocator, dtype, {m, n}, true); + + std::shared_ptr gemm = createGemm(&allocator, stream, false, false); + gemm->setTypes(a_tensor.type, b_tensor.type, c_tensor.type, computeType); + + for (auto &op_pair : op_pairs) { + std::string tc_name = getTestName(__func__, op_pair, m, n, k); + FT_LOG_DEBUG(tc_name); + computeReference(op_pair.transa, op_pair.transb, + expected, a_tensor, b_tensor); + + size_t lda = (op_pair.transa == GEMM_OP_N) ? k : m; + size_t ldb = (op_pair.transb == GEMM_OP_N) ? n : k; + size_t ldc = n; + + c_tensor.setInvalidValues(); // to guarantee C has invalid data + gemm->gemm(op_pair.transa, op_pair.transb, m, n, k, + a_tensor.data, a_tensor.type, lda, + b_tensor.data, b_tensor.type, ldb, + c_tensor.data, c_tensor.type, ldc); + EXPECT_ALMOST_EQUAL(tc_name + " api1", T, computeType, c_tensor, expected); + + c_tensor.setInvalidValues(); + gemm->gemm(op_pair.transa, op_pair.transb, m, n, k, + a_tensor.data, lda, + b_tensor.data, ldb, + c_tensor.data, ldc); + EXPECT_ALMOST_EQUAL(tc_name + " api2", T, computeType, c_tensor, expected); + + c_tensor.setInvalidValues(); + gemm->gemm(op_pair.transa, op_pair.transb, m, n, k, + a_tensor.data, b_tensor.data, c_tensor.data); + EXPECT_ALMOST_EQUAL(tc_name + " api3", T, computeType, c_tensor, expected); + + c_tensor.setInvalidValues(); + gemm->gemm(op_pair.transa, op_pair.transb, m, n, k, + a_tensor.data, DenseWeight{(const T*)b_tensor.data, nullptr, nullptr}, c_tensor.data); + EXPECT_ALMOST_EQUAL(tc_name + " api4", T, computeType, c_tensor, expected); + } + check_cuda_error(cudaStreamDestroy(stream)); +} + +template +void testGemmConsistencyMatmul(size_t m, size_t n, size_t k) { + // Test if Gemm is consistent with cublasWrapper + FT_LOG_INFO("Matmul function consistency test [m=%ld, n=%ld, k=%ld, %s]", + m, n, k, toString().c_str()); + + Allocator allocator(getDevice()); + cudaStream_t stream; + check_cuda_error(cudaStreamCreate(&stream)); + + DataType dtype = getTensorType(); + TensorWrapper a_tensor(&allocator, dtype, {m, k}, false); + TensorWrapper b_tensor(&allocator, dtype, {k, n}, false); + TensorWrapper c_tensor(&allocator, dtype, {m, n}, true); + TensorWrapper expected(&allocator, dtype, {m, n}, true); + + cublasHandle_t cublas_handle; + cublasLtHandle_t cublaslt_handle; + check_cuda_error(cublasCreate(&cublas_handle)); + check_cuda_error(cublasLtCreate(&cublaslt_handle)); + check_cuda_error(cublasSetStream(cublas_handle, stream)); + cublasAlgoMap cublas_algo_map(GEMM_CONFIG); + std::mutex* cublas_wrapper_mutex = new std::mutex(); + cublasMMWrapper cublas_wrapper(cublas_handle, + cublaslt_handle, + stream, + &cublas_algo_map, + cublas_wrapper_mutex, + &allocator); + + cudaDataType_t cuda_dtype = std::is_same::value ? CUDA_R_32F : CUDA_R_16F; + cudaDataType_t cuda_ctype = (DataType::TYPE_FP32 == computeType) ? CUDA_R_32F : CUDA_R_16F; + cublas_wrapper.setGemmConfig(cuda_dtype, cuda_dtype, cuda_dtype, cuda_ctype); + + std::shared_ptr gemm = createGemm(&allocator, stream, false, false); + gemm->setTypes(a_tensor.type, b_tensor.type, c_tensor.type, computeType); + + for (auto &op_pair : op_pairs) { + std::string tc_name = getTestName(__func__, op_pair, m, n, k); + + // Switch A/B because Gemm expects column major layout as cublas does. + size_t lda = (op_pair.transa == GEMM_OP_N) ? k : m; + size_t ldb = (op_pair.transb == GEMM_OP_N) ? n : k; + size_t ldc = n; + cublas_wrapper.Gemm(getCublasOperation(op_pair.transb), + getCublasOperation(op_pair.transa), + n, m, k, + b_tensor.data, ldb, + a_tensor.data, lda, + expected.data, ldc); + + c_tensor.setInvalidValues(); // to guarantee C has invalid data + gemm->gemm(op_pair.transa, op_pair.transb, m, n, k, + a_tensor.data, a_tensor.type, lda, + b_tensor.data, b_tensor.type, ldb, + c_tensor.data, c_tensor.type, ldc); + EXPECT_ALMOST_EQUAL(tc_name + " api1", T, computeType, c_tensor, expected); + + c_tensor.setInvalidValues(); + gemm->gemm(op_pair.transa, op_pair.transb, m, n, k, + a_tensor.data, lda, + b_tensor.data, ldb, + c_tensor.data, ldc); + EXPECT_ALMOST_EQUAL(tc_name + " api2", T, computeType, c_tensor, expected); + + c_tensor.setInvalidValues(); + gemm->gemm(op_pair.transa, op_pair.transb, m, n, k, + a_tensor.data, b_tensor.data, c_tensor.data); + EXPECT_ALMOST_EQUAL(tc_name + " api3", T, computeType, c_tensor, expected); + + c_tensor.setInvalidValues(); + gemm->gemm(op_pair.transa, op_pair.transb, m, n, k, + a_tensor.data, DenseWeight{(const T*)b_tensor.data, nullptr, nullptr}, c_tensor.data); + EXPECT_ALMOST_EQUAL(tc_name + " api4", T, computeType, c_tensor, expected); + } + + delete cublas_wrapper_mutex; + check_cuda_error(cublasLtDestroy(cublaslt_handle)); + check_cuda_error(cublasDestroy(cublas_handle)); + check_cuda_error(cudaStreamDestroy(stream)); +} + +template +void testGemmConsistencyBatchedMatmul(size_t m, size_t n, size_t k) { + // Test if Gemm is consistent with cublasWrapper + FT_LOG_INFO("Batched gemm function consistency test [m=%ld, n=%ld, k=%ld, %s]", + m, n, k, toString().c_str()); + + Allocator allocator(getDevice()); + cudaStream_t stream; + check_cuda_error(cudaStreamCreate(&stream)); + + // batch of in/out tensors + DataType a_type = getTensorType(); + DataType b_type = getTensorType(); + DataType c_type = getTensorType(); + std::vector a_tensors; + std::vector b_tensors; + std::vector c_tensors; + std::vector expecteds; + const size_t batch_size = 3; + for (size_t i = 0; i < batch_size; ++i) { + a_tensors.push_back(new TensorWrapper(&allocator, a_type, {m, k}, false)); + b_tensors.push_back(new TensorWrapper(&allocator, b_type, {k, n}, false)); + c_tensors.push_back(new TensorWrapper(&allocator, c_type, {m, n}, true)); + expecteds.push_back(new TensorWrapper(&allocator, c_type, {m, n}, true)); + } + + const T* hA[]{(const T*)a_tensors[0]->data, + (const T*)a_tensors[1]->data, + (const T*)a_tensors[2]->data, + nullptr, // for memory alignment. + (const T*)b_tensors[0]->data, + (const T*)b_tensors[1]->data, + (const T*)b_tensors[2]->data, + nullptr, // for memory alignment. + (const T*)c_tensors[0]->data, + (const T*)c_tensors[1]->data, + (const T*)c_tensors[2]->data, + nullptr, // for memory alignment. + (const T*)expecteds[0]->data, + (const T*)expecteds[1]->data, + (const T*)expecteds[2]->data}; + + T** batch_tensor_ptrs = reinterpret_cast(allocator.malloc(sizeof(T*) * 16, false)); + check_cuda_error(cudaMemcpyAsync( + (void*)batch_tensor_ptrs, hA, sizeof(T*) * 16, cudaMemcpyHostToDevice, stream)); + const void* const* batch_a = reinterpret_cast(batch_tensor_ptrs); + const void* const* batch_b = reinterpret_cast(batch_tensor_ptrs + 4); + void* const* batch_c = reinterpret_cast(batch_tensor_ptrs + 8); + void* const* batch_expected = reinterpret_cast(batch_tensor_ptrs + 12); + + cublasHandle_t cublas_handle; + cublasLtHandle_t cublaslt_handle; + check_cuda_error(cublasCreate(&cublas_handle)); + check_cuda_error(cublasLtCreate(&cublaslt_handle)); + check_cuda_error(cublasSetStream(cublas_handle, stream)); + cublasAlgoMap cublas_algo_map(GEMM_CONFIG); + std::mutex* cublas_wrapper_mutex = new std::mutex(); + cublasMMWrapper cublas_wrapper(cublas_handle, + cublaslt_handle, + stream, + &cublas_algo_map, + cublas_wrapper_mutex, + &allocator); + + cudaDataType_t dtype = std::is_same::value ? CUDA_R_32F : CUDA_R_16F; + cudaDataType_t ctype = (computeType == DataType::TYPE_FP32) ? CUDA_R_32F : CUDA_R_16F; + cublas_wrapper.setGemmConfig(dtype, dtype, dtype, ctype); + + std::shared_ptr gemm = createGemm(&allocator, stream, false, false); + gemm->setTypes(a_type, b_type, c_type, computeType); + + for (auto &op_pair : op_pairs) { + std::string tc_name = getTestName(__func__, op_pair, m, n, k); + FT_LOG_DEBUG(tc_name); + + size_t lda = (op_pair.transa == GEMM_OP_N) ? k : m; + size_t ldb = (op_pair.transb == GEMM_OP_N) ? n : k; + size_t ldc = n; + + // Switch A/B because Gemm expects column major layout as cublas does. + cublas_wrapper.batchedGemm(getCublasOperation(op_pair.transb), // N + getCublasOperation(op_pair.transa), // T + n, + m, + k, + (const void* const*)batch_b, ldb, + (const void* const*)batch_a, lda, + (void* const*)batch_expected, ldc, + batch_size); + + gemm->batchedGemm(op_pair.transa, op_pair.transb, m, n, k, + batch_a, a_type, lda, + batch_b, b_type, ldb, + batch_c, c_type, ldc, + batch_size); + for (size_t i = 0; i < batch_size; ++i) { + EXPECT_ALMOST_EQUAL(tc_name + " api1 batch" + std::to_string(i), + T, computeType, *c_tensors[i], *expecteds[i]); + } + + for (size_t i = 0; i < batch_size; ++i) { + c_tensors[i]->setInvalidValues(); + } + gemm->batchedGemm(op_pair.transa, op_pair.transb, m, n, k, + batch_a, lda, + batch_b, ldb, + batch_c, ldc, + batch_size); + for (size_t i = 0; i < batch_size; ++i) { + EXPECT_ALMOST_EQUAL(tc_name + " api2 batch" + std::to_string(i), + T, computeType, *c_tensors[i], *expecteds[i]); + } + + for (size_t i = 0; i < batch_size; ++i) { + c_tensors[i]->setInvalidValues(); + } + gemm->batchedGemm(op_pair.transa, op_pair.transb, m, n, k, + batch_a, batch_b, batch_c, batch_size); + for (size_t i = 0; i < batch_size; ++i) { + EXPECT_ALMOST_EQUAL(tc_name + " api3 batch" + std::to_string(i), + T, computeType, *c_tensors[i], *expecteds[i]); + } + } + a_tensors.clear(); + b_tensors.clear(); + c_tensors.clear(); + expecteds.clear(); + delete cublas_wrapper_mutex; + check_cuda_error(cublasLtDestroy(cublaslt_handle)); + check_cuda_error(cublasDestroy(cublas_handle)); + check_cuda_error(cudaStreamDestroy(stream)); +} + + +template +void testGemmConsistencyStridedBatchedMatmul(size_t batch_size, size_t m, size_t n, size_t k) { + // Test if Gemm is consistent with cublasWrapper + FT_LOG_INFO("Strided batched gemm function consistency test [bsz=%ld, m=%ld, n=%ld, k=%ld, %s]", + batch_size, m, n, k, toString().c_str()); + + Allocator allocator(getDevice()); + cudaStream_t stream; + check_cuda_error(cudaStreamCreate(&stream)); + + DataType data_type = getTensorType(); + TensorWrapper a_tensor(&allocator, data_type, {batch_size, m, k}, false); + TensorWrapper b_tensor(&allocator, data_type, {batch_size, k, n}, false); + TensorWrapper c_tensor(&allocator, data_type, {batch_size, m, n}, true); + TensorWrapper expected(&allocator, data_type, {batch_size, m, n}, true); + + cublasHandle_t cublas_handle; + cublasLtHandle_t cublaslt_handle; + check_cuda_error(cublasCreate(&cublas_handle)); + check_cuda_error(cublasLtCreate(&cublaslt_handle)); + check_cuda_error(cublasSetStream(cublas_handle, stream)); + cublasAlgoMap cublas_algo_map(GEMM_CONFIG); + std::mutex* cublas_wrapper_mutex = new std::mutex(); + cublasMMWrapper cublas_wrapper(cublas_handle, + cublaslt_handle, + stream, + &cublas_algo_map, + cublas_wrapper_mutex, + &allocator); + + cudaDataType_t dtype = std::is_same::value ? CUDA_R_32F : CUDA_R_16F; + cudaDataType_t ctype = (computeType == DataType::TYPE_FP32) ? CUDA_R_32F : CUDA_R_16F; + cublas_wrapper.setGemmConfig(dtype, dtype, dtype, ctype); + + std::shared_ptr gemm = createGemm(&allocator, stream, false, false); + gemm->setTypes(a_tensor.type, b_tensor.type, c_tensor.type, computeType); + + for (auto &op_pair : op_pairs) { + std::string tc_name = getTestName(__func__, op_pair, m, n, k); + + // Switch A/B because Gemm expects column major layout as cublas does. + size_t lda = (op_pair.transa == GEMM_OP_N) ? k : m; + size_t ldb = (op_pair.transb == GEMM_OP_N) ? n : k; + size_t ldc = n; + + int64_t stridea = m * k; + int64_t strideb = k * n; + int64_t stridec = m * n; + + float alpha = 1.0f; + float beta = 0.0f; + + cublas_wrapper.stridedBatchedGemm(getCublasOperation(op_pair.transb), + getCublasOperation(op_pair.transa), + n, + m, + k, + alpha, + b_tensor.data, + getCublasDataType(b_tensor.type), + ldb, + strideb, + a_tensor.data, + getCublasDataType(a_tensor.type), + lda, + stridea, + beta, + expected.data, + getCublasDataType(expected.type), + ldc, + stridec, + batch_size, + getCublasDataType(computeType)); + + c_tensor.setInvalidValues(); // to guarantee C has invalid data + gemm->stridedBatchedGemm(op_pair.transa, op_pair.transb, m, n, k, + a_tensor.data, a_tensor.type, lda, stridea, + b_tensor.data, b_tensor.type, ldb, strideb, + c_tensor.data, c_tensor.type, ldc, stridec, + batch_size, computeType, alpha, beta); + EXPECT_ALMOST_EQUAL(tc_name + " api1", T, computeType, c_tensor, expected); + + c_tensor.setInvalidValues(); + gemm->stridedBatchedGemm(op_pair.transa, op_pair.transb, m, n, k, + a_tensor.data, lda, stridea, + b_tensor.data, ldb, strideb, + c_tensor.data, ldc, stridec, + batch_size, alpha, beta); + EXPECT_ALMOST_EQUAL(tc_name + " api2", T, computeType, c_tensor, expected); + + c_tensor.setInvalidValues(); + gemm->stridedBatchedGemm(op_pair.transa, op_pair.transb, m, n, k, + a_tensor.data, stridea, + b_tensor.data, strideb, + c_tensor.data, stridec, + batch_size, alpha, beta); + EXPECT_ALMOST_EQUAL(tc_name + " api3", T, computeType, c_tensor, expected); + + c_tensor.setInvalidValues(); + gemm->stridedBatchedGemm(op_pair.transa, op_pair.transb, m, n, k, + a_tensor.data, + b_tensor.data, + c_tensor.data, + batch_size, alpha, beta); + EXPECT_ALMOST_EQUAL(tc_name + " api4", T, computeType, c_tensor, expected); + } + + delete cublas_wrapper_mutex; + check_cuda_error(cublasLtDestroy(cublaslt_handle)); + check_cuda_error(cublasDestroy(cublas_handle)); + check_cuda_error(cudaStreamDestroy(stream)); +} + +#ifdef SPARSITY_ENABLED +// The current SpGemm only supports TYPE_FP16 for T, computeType, +// but let us keep these template variables for later use. +template +void testSpGemmCorrectnessMatmul(size_t m, size_t n, size_t k) { + FT_LOG_INFO("Sparse gemm function correctness test [m=%ld, n=%ld, k=%ld, %s]", + m, n, k, toString().c_str()); + cudaStream_t stream; + check_cuda_error(cudaStreamCreate(&stream)); + + Allocator allocator(getDevice()); + + DataType dtype = getTensorType(); + TensorWrapper a_tensor(&allocator, dtype, {m, k}, false); + TensorWrapper b_tensor(&allocator, dtype, {k, n}, false); + TensorWrapper c_tensor(&allocator, dtype, {m, n}, true); + TensorWrapper expected(&allocator, dtype, {m, n}, true); + + std::shared_ptr gemm = createGemm(&allocator, stream, true, false); + gemm->setTypes(a_tensor.type, b_tensor.type, c_tensor.type, computeType); + + for (auto &op_pair : op_pairs) { + // A/B will be switched in SpGemm. + std::string tc_name = getTestName(__func__, op_pair, m, n, k); + FT_LOG_DEBUG(tc_name); + + b_tensor.setRandomValues(); + pruneMatrixB(b_tensor.data, stream, + b_tensor.shape[0], b_tensor.shape[1], op_pair.transb); + computeReference(op_pair.transa, op_pair.transb, + expected, a_tensor, b_tensor); + + void* b_compressed; + compressMatrixB(&b_compressed, allocator, stream, + b_tensor.data, b_tensor.shape[0], b_tensor.shape[1], + op_pair.transb); + + size_t lda = (op_pair.transa == GEMM_OP_N) ? k : m; + size_t ldb = (op_pair.transb == GEMM_OP_N) ? n : k; + size_t ldc = n; + + c_tensor.setInvalidValues(); // to guarantee C has invalid data + gemm->gemm(op_pair.transa, op_pair.transb, m, n, k, + a_tensor.data, a_tensor.type, lda, + b_compressed, b_tensor.type, ldb, + c_tensor.data, c_tensor.type, ldc); + EXPECT_ALMOST_EQUAL(tc_name + " api1", T, computeType, c_tensor, expected); + + c_tensor.setInvalidValues(); + gemm->gemm(op_pair.transa, op_pair.transb, m, n, k, + a_tensor.data, lda, + b_compressed, ldb, + c_tensor.data, ldc); + EXPECT_ALMOST_EQUAL(tc_name + " api2", T, computeType, c_tensor, expected); + + c_tensor.setInvalidValues(); + gemm->gemm(op_pair.transa, op_pair.transb, m, n, k, + a_tensor.data, b_compressed, c_tensor.data); + EXPECT_ALMOST_EQUAL(tc_name + " api3", T, computeType, c_tensor, expected); + + c_tensor.setInvalidValues(); + gemm->gemm(op_pair.transa, op_pair.transb, m, n, k, + a_tensor.data, + DenseWeight{(const T*)b_tensor.data, nullptr, (const T*)b_compressed}, + c_tensor.data); + EXPECT_ALMOST_EQUAL(tc_name + " api4", T, computeType, c_tensor, expected); + + allocator.free(b_compressed); + } + check_cuda_error(cudaStreamDestroy(stream)); +} + +template +void testSpGemmConsistencyMatmul(size_t m, size_t n, size_t k) { + // Test if Gemm is consistent with cublasWrapper + FT_LOG_INFO("Sparse Matmul function consistency test [m=%ld, n=%ld, k=%ld, %s]", + m, n, k, toString().c_str()); + + Allocator allocator(getDevice()); + cudaStream_t stream; + check_cuda_error(cudaStreamCreate(&stream)); + + DataType dtype = getTensorType(); + TensorWrapper a_tensor(&allocator, dtype, {m, k}, false); + TensorWrapper b_tensor(&allocator, dtype, {k, n}, false); + TensorWrapper c_tensor(&allocator, dtype, {m, n}, true); + TensorWrapper expected(&allocator, dtype, {m, n}, true); + + cublasHandle_t cublas_handle; + cublasLtHandle_t cublaslt_handle; + check_cuda_error(cublasCreate(&cublas_handle)); + check_cuda_error(cublasLtCreate(&cublaslt_handle)); + check_cuda_error(cublasSetStream(cublas_handle, stream)); + cublasAlgoMap cublas_algo_map(GEMM_CONFIG); + std::mutex* cublas_wrapper_mutex = new std::mutex(); + cublasMMWrapper cublas_wrapper(cublas_handle, + cublaslt_handle, + stream, + &cublas_algo_map, + cublas_wrapper_mutex, + &allocator); + + cudaDataType_t cu_dtype = std::is_same::value ? CUDA_R_32F : CUDA_R_16F; + cudaDataType_t cu_ctype = (DataType::TYPE_FP32 == computeType) ? CUDA_R_32F : CUDA_R_16F; + cublas_wrapper.setGemmConfig(cu_dtype, cu_dtype, cu_dtype, cu_ctype); + + std::shared_ptr gemm = createGemm(&allocator, stream, true, false); + gemm->setTypes(a_tensor.type, b_tensor.type, c_tensor.type, computeType); + + for (auto &op_pair : op_pairs) { + std::string tc_name = getTestName(__func__, op_pair, m, n, k); + FT_LOG_DEBUG(tc_name); + + b_tensor.setRandomValues(); + pruneMatrixB(b_tensor.data, stream, + b_tensor.shape[0], b_tensor.shape[1], op_pair.transb); + + // Switch A/B because Gemm expects column major layout as cublas does. + size_t lda = (op_pair.transa == GEMM_OP_N) ? k : m; + size_t ldb = (op_pair.transb == GEMM_OP_N) ? n : k; + size_t ldc = n; + cublas_wrapper.Gemm(getCublasOperation(op_pair.transb), + getCublasOperation(op_pair.transa), + n, + m, + k, + b_tensor.data, ldb, + a_tensor.data, lda, + expected.data, ldc); + + void* b_compressed; + compressMatrixB(&b_compressed, allocator, stream, + b_tensor.data, b_tensor.shape[0], b_tensor.shape[1], + op_pair.transb); + + c_tensor.setInvalidValues(); // to guarantee C has invalid data + gemm->gemm(op_pair.transa, op_pair.transb, m, n, k, + a_tensor.data, a_tensor.type, lda, + b_compressed, b_tensor.type, ldb, + c_tensor.data, c_tensor.type, ldc); + EXPECT_ALMOST_EQUAL(tc_name + " api1", T, computeType, c_tensor, expected); + + c_tensor.setInvalidValues(); + gemm->gemm(op_pair.transa, op_pair.transb, m, n, k, + a_tensor.data, lda, + b_compressed, ldb, + c_tensor.data, ldc); + EXPECT_ALMOST_EQUAL(tc_name + " api1", T, computeType, c_tensor, expected); + + c_tensor.setInvalidValues(); + gemm->gemm(op_pair.transa, op_pair.transb, m, n, k, + a_tensor.data, b_compressed, c_tensor.data); + EXPECT_ALMOST_EQUAL(tc_name + " api3", T, computeType, c_tensor, expected); + } + + delete cublas_wrapper_mutex; + check_cuda_error(cublasLtDestroy(cublaslt_handle)); + check_cuda_error(cublasDestroy(cublas_handle)); + check_cuda_error(cudaStreamDestroy(stream)); +} +#endif + +int main(int argc, char* argv[]) { + // testGemmCreate(); + using testcase_t = std::tuple; + + std::vector testcases = {{16, 32, 64}, + {255, 255, 255}, + {1041, 2047, 9999}, + {1041, 1, 9999}, + {1041, 999, 1}}; + + // Computation correctness tests + for (testcase_t &tc : testcases) { + size_t m = std::get<0>(tc); + size_t n = std::get<1>(tc); + size_t k = std::get<2>(tc); + + testGemmCorrectnessMatmul(m, n, k); + testGemmCorrectnessMatmul(m, n, k); + testGemmCorrectnessMatmul(m, n, k); + + testGemmConsistencyMatmul(m, n, k); + testGemmConsistencyMatmul(m, n, k); + testGemmConsistencyMatmul(m, n, k); + + testGemmConsistencyBatchedMatmul(m, n, k); + testGemmConsistencyBatchedMatmul(m, n, k); + testGemmConsistencyBatchedMatmul(m, n, k); + + testGemmConsistencyStridedBatchedMatmul(7, m, n, k); + testGemmConsistencyStridedBatchedMatmul(7, m, n, k); + testGemmConsistencyStridedBatchedMatmul(7, m, n, k); + } + +#ifdef SPARSITY_ENABLED + // Reset for SpGemm test. + testcases.clear(); + testcases.insert(testcases.end(), + {{8, 32, 32}, // minimum possible example. + {8, 32, 64}, + {64, 64, 64}, + {16, 32, 64}, + {1024, 32, 1024}, + {1024, 1024, 32}, + {16, 1024, 1024}, + {1024, 1024, 1024}}); + + for (testcase_t &tc : testcases) { + size_t m = std::get<0>(tc); + size_t n = std::get<1>(tc); + size_t k = std::get<2>(tc); + testSpGemmCorrectnessMatmul(m, n, k); + testSpGemmConsistencyMatmul(m, n, k); + } +#endif + FT_LOG_INFO("Test done"); + return 0; +} diff --git a/tests/unittests/test_logprob_kernels.cu b/tests/unittests/test_logprob_kernels.cu new file mode 100644 index 000000000..83d6ce672 --- /dev/null +++ b/tests/unittests/test_logprob_kernels.cu @@ -0,0 +1,454 @@ +#include +#include +#include +#include +#include +#include +#include + +#include "src/fastertransformer/kernels/logprob_kernels.h" +#include "src/fastertransformer/utils/allocator.h" +#include "src/fastertransformer/utils/cuda_utils.h" +#include "src/fastertransformer/utils/logger.h" +#include "src/fastertransformer/utils/memory_utils.h" + +using namespace fastertransformer; + +#define PRINT_LIMIT 16 +#define EPSILON (1e-20) + +// Can be replaced by the function provided by a test framework + +class TestFailureError : public std::exception { +private: + std::string msg_; +public: + explicit TestFailureError() = default; + explicit TestFailureError(std::string name, std::string msg = "") { + msg_ = fmtstr("TEST FAIL [%s] %s", name.c_str(), msg.c_str()); + } + const char* what () const throw () { + return msg_.c_str(); + } +}; + +#define EXPECT_TRUE(cond) \ + do { if(!(cond)) { \ + FT_LOG_ERROR("TEST FAIL [%s] at %s:%d", \ + __func__, __FILE__, __LINE__); \ + throw TestFailureError(__func__); \ + } } while(false) + +#define EXPECT_ALMOST_EQUAL(name, dtype, ctype, out, ref) \ + do { \ + bool is_ok = checkResult(name, out, ref); \ + if(!is_ok) { \ + FT_LOG_ERROR("TEST FAIL [%s] at %s:%d", \ + __func__, __FILE__, __LINE__); \ + throw TestFailureError(__func__); \ + } \ + } while(false) + +//////////////////////////////////////////////////////////////////////////////////// + +struct TestCase { + std::string name; + size_t max_input_length; + size_t batch_size; + size_t vocab_size; + size_t beam_width; + + std::string toString() { + char buf[100]; + snprintf(buf, sizeof(buf), + "TestCase[name=%s, max_input_length=%ld, batch=%ld, vocab=%ld, beam_width=%ld]", + name.c_str(), max_input_length, batch_size, vocab_size, beam_width); + return buf; + } + + void print() { + FT_LOG_INFO(toString()); + } +}; + +template +void computeCumLogProbs(float* cum_log_probs, + float* log_probs, + const T* logits, + const int* input_ids, + const int* input_lengths, + const size_t max_input_length, + const size_t batch_size, + const size_t vocab_size, + const size_t vocab_size_padded) +{ + for (size_t step = 0; step < max_input_length; ++step) { + size_t step_offset = step * batch_size * vocab_size_padded; + for (size_t i = 0; i < batch_size; ++i) { + if ((int)step < input_lengths[i]) { + const T* vec = logits + step_offset + i * vocab_size_padded; + float max_logits = -FLT_MAX; + for (size_t v = 0; v < vocab_size; ++v) { + float val = static_cast(vec[v]); + if (val > max_logits) { + max_logits = val; + } + } + float sum = 0.0f; + for (size_t v = 0; v < vocab_size; ++v) { + sum += expf(static_cast(vec[v]) - max_logits); + } + int token_id = input_ids[step * batch_size + i]; + float log_prob = static_cast(vec[token_id]) - max_logits - log(sum); + if (log_probs != nullptr) { + log_probs[step * batch_size + i] = log_prob; + } + cum_log_probs[i] += log_prob; + } + } + } +} + +template +void computeCumLogProbsBatchFirst(float* cum_log_probs, + float* log_probs, + const T* logits, + const int* input_ids, + const int* input_lengths, + const size_t max_input_length, + const size_t batch_size, + const size_t vocab_size, + const size_t vocab_size_padded) +{ + for (size_t i = 0; i < batch_size; ++i) { + size_t batch_offset = i * max_input_length * vocab_size_padded; + for (size_t step = 0; step < max_input_length; ++step) { + if ((int)step < input_lengths[i]) { + const T* vec = logits + batch_offset + step * vocab_size_padded; + float max_logits = -FLT_MAX; + for (size_t v = 0; v < vocab_size; ++v) { + float val = static_cast(vec[v]); + if (val > max_logits) { + max_logits = val; + } + } + float sum = 0.0f; + for (size_t v = 0; v < vocab_size; ++v) { + sum += expf(static_cast(vec[v]) - max_logits); + } + int token_id = input_ids[i * max_input_length + step]; + float log_prob = static_cast(vec[token_id]) - max_logits - log(sum); + if (log_probs != nullptr) { + log_probs[i * max_input_length + step] = log_prob; + } + cum_log_probs[i] += log_prob; + } + } + } +} + +bool almostEqual(float a, float b, float atol = 1e-5, float rtol = 1e-8) +{ + // Params: a = value to compare and b = reference + // This function follows implementation of numpy.isclose(), which checks + // abs(a - b) <= (atol + rtol * abs(b)). + // Note that the inequality above is asymmetric where b is considered as + // a reference value. To account into both absolute/relative errors, it + // uses absolute tolerance and relative tolerance at the same time. The + // default values of atol and rtol borrowed from numpy.isclose(). For the + // case of nan value, the result will be true. + if (isnan(a) && isnan(b)) { + return true; + } + return fabs(a - b) <= (atol + rtol * fabs(b)); +} + +template +bool checkResult(std::string name, T* out, T*ref, size_t size, float atol, float rtol) { + size_t failures = 0; + float relative_gap = 0.0f; + + T* h_out = reinterpret_cast(malloc(sizeof(T) * size)); + check_cuda_error(cudaMemcpy(h_out, out, sizeof(T) * size, cudaMemcpyDeviceToHost)); + + for (size_t i = 0; i < size; ++i) { + // The values for the output and the reference. + float a = (float)h_out[i]; + float b = (float)ref[i]; + + bool ok = almostEqual(a, b, atol, rtol); + // Print the error. + if (!ok && failures < 4) { + FT_LOG_ERROR(">> invalid result for i=%lu:", i); + FT_LOG_ERROR(">> found......: %10.6f", a); + FT_LOG_ERROR(">> expected...: %10.6f", b); + FT_LOG_ERROR(">> error......: %.6f", fabsf(a - b)); + FT_LOG_ERROR(">> tol........: %.6f", atol + rtol * fabs(b)); + } + // Update the number of failures. + failures += ok ? 0 : 1; + // Update the relative gap. + relative_gap += fabsf(a - b) / (fabsf(b) + EPSILON); + } + + relative_gap /= size; + + // Allow not matched up to 1% elements. + size_t tol_failures = (size_t)(0.01 * size); + FT_LOG_INFO("check.......%-30s : %s (failures: %.2f%% atol: %.2e rtol: %.2e rel_gap: %.2e%%)", + name.c_str(), failures <= tol_failures ? "OK" : "FAILED", + 100. * failures / size, atol, rtol, 100. * relative_gap); + return failures <= tol_failures; +} + +template +bool checkResult(std::string name, T* out, T* ref, size_t size) { + bool is_fp32 = sizeof(T) == 4; + float atol = is_fp32 ? 1e-6f : 1e-3f; + float rtol = is_fp32 ? 1e-4f : 1e-1f; + bool is_ok = checkResult(name, out, ref, size, atol, rtol); + return is_ok; +} + +template +void initRandom(T* ptr, size_t size, float minval, float maxval) { + for (size_t i = 0; i < size; ++i) { + float val = static_cast(rand()) / static_cast(RAND_MAX); + val *= (maxval - minval); + ptr[i] = static_cast(minval + val); + } +} + +void initRandomInt(int* ptr, size_t size, int minval, int maxval) { + assert(minval < maxval); + int mod = maxval - minval; + for (size_t i = 0; i < size; ++i) { + ptr[i] = minval + rand() % mod; + } +} + +template +static inline void printMatrixScientificFormat(T* ptr, int m, int k, int stride, bool is_device_ptr) +{ + T* tmp; + if (is_device_ptr) { + // k < stride ; stride = col-dimension. + tmp = reinterpret_cast(malloc(m * stride * sizeof(T))); + check_cuda_error(cudaMemcpy(tmp, ptr, sizeof(T) * m * stride, cudaMemcpyDeviceToHost)); + cudaDeviceSynchronize(); + } + else { + tmp = ptr; + } + + for (int ii = -1; ii < m; ++ii) { + if (ii >= 0) { + printf("%02d ", ii); + } + else { + printf(" "); + } + + for (int jj = 0; jj < k; jj += 1) { + if (ii >= 0) { + printf("%11.4e ", (float)tmp[ii * stride + jj]); + } + else { + printf("%11d ", jj); + } + } + printf("\n"); + } + if (is_device_ptr) { + free(tmp); + } +} + +template +static inline void printMatrixWithLimit(T* ptr, int m, int k, int stride, bool is_device_ptr) { + printMatrixScientificFormat(ptr, std::min(PRINT_LIMIT, m), std::min(PRINT_LIMIT, k), stride, is_device_ptr); +} + + +/////////////////////////////////// Unittests ////////////////////////////////////////// + +template +void testCumLogProbCorrectness(TestCase tc) { + size_t max_input_length = tc.max_input_length; + size_t batchxbeam = tc.batch_size * tc.beam_width; + size_t vocab_size = tc.vocab_size; + // Make mulitple of 8 as GPT does. + size_t vocab_size_padded = static_cast(ceil(vocab_size / 8.f) * 8); + + cudaStream_t stream; + check_cuda_error(cudaStreamCreate(&stream)); + Allocator allocator(getDevice()); + + // input values + T* h_logits = reinterpret_cast(malloc(sizeof(T) * max_input_length * batchxbeam * vocab_size)); + int* h_input_ids = reinterpret_cast(malloc(sizeof(int) * max_input_length * batchxbeam)); + int* h_input_lengths = reinterpret_cast(malloc(sizeof(int) * batchxbeam)); + + // outupt buffers + float* expected_cum_log_probs = reinterpret_cast(malloc(sizeof(float) * batchxbeam)); + + // initialize host buffers + initRandom(h_logits, max_input_length * batchxbeam * vocab_size, -10.0f / vocab_size, -1.0f); + initRandomInt(h_input_ids, max_input_length * batchxbeam, 0, vocab_size); + initRandomInt(h_input_lengths, batchxbeam, 1, max_input_length + 1); + memset(expected_cum_log_probs, 0, sizeof(float) * batchxbeam); + + // device buffers + T* d_logits = reinterpret_cast(allocator.malloc(sizeof(T) * max_input_length * batchxbeam * vocab_size)); + int *d_input_ids = reinterpret_cast(allocator.malloc(sizeof(int) * max_input_length * batchxbeam)); + int *d_input_lengths = reinterpret_cast(allocator.malloc(sizeof(int) * batchxbeam)); + float* d_cum_log_probs = reinterpret_cast(allocator.malloc(sizeof(float) * batchxbeam)); + + // initialize device buffers + cudaH2Dcpy(d_logits, h_logits, max_input_length * batchxbeam * vocab_size); + cudaH2Dcpy(d_input_ids, h_input_ids, max_input_length * batchxbeam); + cudaH2Dcpy(d_input_lengths, h_input_lengths, batchxbeam); + check_cuda_error(cudaMemset(d_cum_log_probs, 0, sizeof(float) * batchxbeam)); + + size_t workspace_size = sizeof(float) * max_input_length * batchxbeam; + void* workspace = allocator.malloc(workspace_size); + invokeLogProbFromLogits(d_cum_log_probs, + d_logits, + d_input_ids, + d_input_lengths, + max_input_length, + batchxbeam, + vocab_size, + vocab_size_padded, + workspace, + workspace_size, + stream, + false); + computeCumLogProbs(expected_cum_log_probs, + nullptr, + h_logits, + h_input_ids, + h_input_lengths, + max_input_length, + batchxbeam, + vocab_size, + vocab_size_padded); + checkResult(tc.toString().c_str(), d_cum_log_probs, expected_cum_log_probs, batchxbeam); + + FT_LOG_DEBUG("free host buffers"); + free(expected_cum_log_probs); + free(h_input_lengths); + free(h_input_ids); + free(h_logits); + + FT_LOG_DEBUG("free device buffers"); + allocator.free(d_cum_log_probs); + allocator.free(d_input_lengths); + allocator.free(d_input_ids); + allocator.free(d_logits); + check_cuda_error(cudaStreamDestroy(stream)); +} + +template +void testBatchFirstCumLogProbCorrectness(TestCase tc) { + size_t max_input_length = tc.max_input_length; + size_t batchxbeam = tc.batch_size * tc.beam_width; + size_t vocab_size = tc.vocab_size; + // Make mulitple of 8 as GPT does. + size_t vocab_size_padded = static_cast(ceil(vocab_size / 8.f) * 8); + + cudaStream_t stream; + check_cuda_error(cudaStreamCreate(&stream)); + Allocator allocator(getDevice()); + + // input values + T* h_logits = reinterpret_cast(malloc(sizeof(T) * max_input_length * batchxbeam * vocab_size_padded)); + int* h_input_ids = reinterpret_cast(malloc(sizeof(int) * max_input_length * batchxbeam)); + int* h_input_lengths = reinterpret_cast(malloc(sizeof(int) * batchxbeam)); + + // outupt buffers + float* expected_cum_log_probs = reinterpret_cast(malloc(sizeof(float) * batchxbeam)); + + // initialize host buffers + initRandom(h_logits, max_input_length * batchxbeam * vocab_size_padded, -10.0f / vocab_size, -1.0f); + initRandomInt(h_input_ids, max_input_length * batchxbeam, 0, vocab_size); + initRandomInt(h_input_lengths, batchxbeam, 1, max_input_length + 1); + memset(expected_cum_log_probs, 0, sizeof(float) * batchxbeam); + + // device buffers + T* d_logits = reinterpret_cast(allocator.malloc(sizeof(T) * max_input_length * batchxbeam * vocab_size_padded)); + int *d_input_ids = reinterpret_cast(allocator.malloc(sizeof(int) * max_input_length * batchxbeam)); + int *d_input_lengths = reinterpret_cast(allocator.malloc(sizeof(int) * batchxbeam)); + float* d_cum_log_probs = reinterpret_cast(allocator.malloc(sizeof(float) * batchxbeam)); + + // initialize device buffers + cudaH2Dcpy(d_logits, h_logits, max_input_length * batchxbeam * vocab_size_padded); + cudaH2Dcpy(d_input_ids, h_input_ids, max_input_length * batchxbeam); + cudaH2Dcpy(d_input_lengths, h_input_lengths, batchxbeam); + check_cuda_error(cudaMemset(d_cum_log_probs, 0, sizeof(float) * batchxbeam)); + + size_t workspace_size = sizeof(float) * max_input_length * batchxbeam; + void* workspace = allocator.malloc(workspace_size); + invokeLogProbFromLogits(d_cum_log_probs, + d_logits, + d_input_ids, + d_input_lengths, + max_input_length, + batchxbeam, + vocab_size, + vocab_size_padded, + workspace, + workspace_size, + stream, + true); + + computeCumLogProbsBatchFirst(expected_cum_log_probs, + nullptr, + h_logits, + h_input_ids, + h_input_lengths, + max_input_length, + batchxbeam, + vocab_size, + vocab_size_padded); + checkResult(tc.toString().c_str(), d_cum_log_probs, expected_cum_log_probs, batchxbeam); + + FT_LOG_DEBUG("free host buffers"); + free(expected_cum_log_probs); + free(h_input_lengths); + free(h_input_ids); + free(h_logits); + + FT_LOG_DEBUG("free device buffers"); + allocator.free(d_cum_log_probs); + allocator.free(d_input_lengths); + allocator.free(d_input_ids); + allocator.free(d_logits); + check_cuda_error(cudaStreamDestroy(stream)); +} + +int main(int argc, char* argv[]) { + std::vector test_cases { + // TC: name / max_input_seq / batch / vocab / beam + TestCase{"cum_logprob test", 1, 32, 16, 1}, + TestCase{"cum_logprob test", 129, 8, 50211, 1}, + TestCase{"cum_logprob test", 255, 8, 51200, 1}, + TestCase{"cum_logprob test", 500, 8, 51200, 1}, + TestCase{"cum_logprob test", 1023, 8, 51200, 1}, + }; + + for (auto &tc : test_cases) { + testCumLogProbCorrectness(tc); + testCumLogProbCorrectness(tc); + } + FT_LOG_INFO("Test Done"); + + for (auto &tc : test_cases) { + tc.name = "batch first test"; + testBatchFirstCumLogProbCorrectness(tc); + testBatchFirstCumLogProbCorrectness(tc); + } + FT_LOG_INFO("Test Done"); + + return 0; +} diff --git a/tests/unittests/test_sampling.cu b/tests/unittests/test_sampling.cu new file mode 100644 index 000000000..aa8359b54 --- /dev/null +++ b/tests/unittests/test_sampling.cu @@ -0,0 +1,420 @@ +#include // std::min, std::max +#include // snprintf +#include // expf, log +#include // rand +#include // std::string +#include // std::vector + +#include +#include +#include + +#include "src/fastertransformer/layers/DynamicDecodeLayer.h" +#include "src/fastertransformer/layers/sampling_layers/TopKSamplingLayer.h" +#include "src/fastertransformer/utils/cublasMMWrapper.h" +#include "src/fastertransformer/utils/cuda_utils.h" +#include "src/fastertransformer/utils/memory_utils.h" +#include "src/fastertransformer/utils/Tensor.h" + +// namespace ft = fastertransformer; +using namespace fastertransformer; + + +#define PRINT_LIMIT 16 +#define EPSILON (1e-20) +#define EPSILON_FP16 (1e-10) + +struct TestCase { + std::string name; + size_t batch_size; + size_t vocab_size; + size_t beam_width; + size_t top_k; + float top_p; + size_t output_len; + + std::string toString() { + char buf[100]; + snprintf(buf, sizeof(buf), + "TestCase[name=%s, batch=%ld, vocab=%ld, beam=%ld, k=%ld, p=%3.1f, output_len=%ld]", + name.c_str(), batch_size, vocab_size, beam_width, top_k, top_p, output_len); + return buf; + } + + void print() { + FT_LOG_INFO(toString()); + } +}; + +bool almostEqual(float a, float b, float atol = 1e-5, float rtol = 1e-8) +{ + // Params: a = value to compare and b = reference + // This function follows implementation of numpy.isclose(), which checks + // abs(a - b) <= (atol + rtol * abs(b)). + // Note that the inequality above is asymmetric where b is considered as + // a reference value. To account into both absolute/relative errors, it + // uses absolute tolerance and relative tolerance at the same time. The + // default values of atol and rtol borrowed from numpy.isclose(). For the + // case of nan value, the result will be true. + if (isnan(a) && isnan(b)) { + return true; + } + return fabs(a - b) <= (atol + rtol * fabs(b)); +} + +template +bool checkResult(std::string name, T* out, T*ref, size_t size, float atol, float rtol) { + size_t failures = 0; + float relative_gap = 0.0f; + + T* h_out = reinterpret_cast(malloc(sizeof(T) * size)); + cudaMemcpy(h_out, out, sizeof(T) * size, cudaMemcpyDeviceToHost); + + for (size_t i = 0; i < size; ++i) { + // The values for the output and the reference. + float a = (float)h_out[i]; + float b = (float)ref[i]; + + bool ok = almostEqual(a, b, atol, rtol); + // Print the error. + if (!ok && failures < 4) { + FT_LOG_ERROR(">> invalid result for i=%lu:", i); + FT_LOG_ERROR(">> found......: %10.6f", a); + FT_LOG_ERROR(">> expected...: %10.6f", b); + FT_LOG_ERROR(">> error......: %.6f", fabsf(a - b)); + FT_LOG_ERROR(">> tol........: %.6f", atol + rtol * fabs(b)); + } + // Update the number of failures. + failures += ok ? 0 : 1; + // Update the relative gap. + relative_gap += fabsf(a - b) / (fabsf(b) + EPSILON); + } + + relative_gap /= size; + + // Allow not matched up to 1% elements. + size_t tol_failures = (size_t)(0.01 * size); + FT_LOG_INFO("check.......%-30s : %s (failures: %.2f%% atol: %.2e rtol: %.2e rel_gap: %.2e%%)", + name.c_str(), failures <= tol_failures ? "OK" : "FAILED", + 100. * failures / size, atol, rtol, 100. * relative_gap); + return failures <= tol_failures; +} + +template +bool checkResult(std::string name, T* out, T* ref, size_t size) { + bool is_fp32 = sizeof(T) == 4; + // float atol = is_fp32 ? 1e-6f : 1e-3f; + // float rtol = is_fp32 ? 1e-4f : 1e-1f; + float atol = is_fp32 ? 1e-4f : 1e-3f; + float rtol = is_fp32 ? 1e-2f : 1e-1f; + bool is_ok = checkResult(name, out, ref, size, atol, rtol); + return is_ok; +} + +template +void initRandom(T* ptr, size_t size, float minval, float maxval) { + for (size_t i = 0; i < size; ++i) { + float val = static_cast(rand()) / static_cast(RAND_MAX); + val *= (maxval - minval); + ptr[i] = static_cast(minval + val); + } +} + +template +void computeProb(T* probs, T* logits, int batch_size, int vocab_size) { + // Compute the log probability from logits. + // logits = batch_size x vocab_size vector. + // logprobs = log(softmax(logits)) (softmax along with vocab dimension) + for (int bidx = 0; bidx < batch_size; ++bidx) { + float sum = 0.0f; + for (int i = 0; i < vocab_size; ++i) { + sum += expf((float)logits[bidx * vocab_size + i]); + } + for (int i = 0; i < vocab_size; ++i) { + int idx = bidx * vocab_size + i; + probs[idx] = static_cast(expf((float)logits[idx]) / (sum + EPSILON)); + } + } +} + +template +void computeLogProb(T* logprobs, T* logits, int batch_size, int vocab_size) { + // Compute the log probability from logits. + // logits = batch_size x vocab_size vector. + // logprobs = log(softmax(logits)) (softmax along with vocab dimension) + for (int bidx = 0; bidx < batch_size; ++bidx) { + float sum = 0.0f; + for (int i = 0; i < vocab_size; ++i) { + sum += expf(logits[bidx * vocab_size + i]); + } + for (int i = 0; i < vocab_size; ++i) { + int idx = bidx * vocab_size + i; + logprobs[idx] = static_cast(logf(expf(logits[idx]) / (sum + EPSILON) + EPSILON)); + } + } +} + +template +static inline void printMatrixHightPrecision(T* ptr, int m, int k, int stride, bool is_device_ptr) +{ + T* tmp; + if (is_device_ptr) { + // k < stride ; stride = col-dimension. + tmp = reinterpret_cast(malloc(m * stride * sizeof(T))); + check_cuda_error(cudaMemcpy(tmp, ptr, sizeof(T) * m * stride, cudaMemcpyDeviceToHost)); + cudaDeviceSynchronize(); + } + else { + tmp = ptr; + } + + for (int ii = -1; ii < m; ++ii) { + if (ii >= 0) { + printf("%02d ", ii); + } + else { + printf(" "); + } + + for (int jj = 0; jj < k; jj += 1) { + if (ii >= 0) { + printf("%9.6f ", (float)tmp[ii * stride + jj]); + } + else { + printf("%9d ", jj); + } + } + printf("\n"); + } + if (is_device_ptr) { + free(tmp); + } +} + +template +static inline void printMatrixWithLimit(T* ptr, int m, int k, int stride, bool is_device_ptr) { + printMatrixHightPrecision(ptr, std::min(PRINT_LIMIT, m), std::min(PRINT_LIMIT, k), stride, is_device_ptr); +} + +template +void testDynamicDecoingLayer(TestCase tc) { + + bool is_fp32 = std::is_same::value; + + size_t beam_width = tc.beam_width; + size_t top_k = tc.top_k; + float top_p = tc.top_p; + unsigned long long seed = 0; + // use default values having no effect. + float temperature = 1.0f; + float len_penalty = 1.0f; + float repetition_penalty = 1.0f; + + size_t batch_size = tc.batch_size; + size_t vocab_size = tc.vocab_size; + int end_id = 3; + size_t max_input_len = 0; // has no effect. + size_t max_output_len = tc.output_len; + size_t max_seq_len = max_input_len + max_output_len; + + struct cudaDeviceProp prop; + check_cuda_error(cudaGetDeviceProperties(&prop, 0)); + + cudaStream_t stream; + cublasHandle_t cublas_handle; + cublasLtHandle_t cublaslt_handle; + check_cuda_error(cudaStreamCreate(&stream)); + check_cuda_error(cublasCreate(&cublas_handle)); + check_cuda_error(cublasLtCreate(&cublaslt_handle)); + check_cuda_error(cublasSetStream(cublas_handle, stream)); + + cublasAlgoMap cublas_algo_map(GEMM_CONFIG); + Allocator * allocator = new Allocator(getDevice()); + allocator->setStream(stream); + + std::mutex* cublas_wrapper_mutex = new std::mutex(); + cublasMMWrapper *cublas_wrapper = new cublasMMWrapper(cublas_handle, + cublaslt_handle, + stream, + &cublas_algo_map, + cublas_wrapper_mutex, + allocator); + + DynamicDecodeLayer dynamic_decode_layer(vocab_size, + vocab_size, + end_id, + stream, + cublas_wrapper, + allocator, + false, // is_free_buffer_after_forward + &prop); // cuda_device_prop + + const DataType data_type = getTensorType(); + size_t logits_size = batch_size * beam_width * vocab_size; + T* logits_buf = reinterpret_cast(allocator->malloc(sizeof(T) * logits_size, true)); + + // Logit values in the host of shape ((batch_size x beam) x vocab_size) where beam = 1. + T* h_logits = reinterpret_cast(malloc(sizeof(T) * batch_size * beam_width * vocab_size)); + T* h_probs = reinterpret_cast(malloc(sizeof(T) * batch_size * beam_width * vocab_size)); + T* h_log_probs = reinterpret_cast(malloc(sizeof(T) * batch_size * beam_width * vocab_size)); + float* h_cum_log_probs = reinterpret_cast(malloc(sizeof(float) * batch_size * beam_width)); + float* h_output_log_probs = reinterpret_cast( + malloc(sizeof(float) * max_output_len * batch_size * beam_width)); + float* expected_cum_log_probs = reinterpret_cast(malloc(sizeof(float) * batch_size * beam_width)); + initRandom(h_logits, batch_size * beam_width * vocab_size, -10.0f / vocab_size, -1.0f); + computeProb(h_probs, h_logits, batch_size * beam_width, vocab_size); + computeLogProb(h_log_probs, h_logits, batch_size * beam_width, vocab_size); + memset(expected_cum_log_probs, 0, sizeof(float) * batch_size * beam_width); + +#ifndef NDEBUG + FT_LOG_DEBUG("logit values"); + printMatrixWithLimit(h_logits, batch_size * beam_width, vocab_size, vocab_size, false); + FT_LOG_DEBUG("\nprob values"); + printMatrixWithLimit(h_probs, batch_size * beam_width, vocab_size, vocab_size, false); + FT_LOG_DEBUG("\nlog-prob values"); + printMatrixWithLimit(h_log_probs, batch_size * beam_width, vocab_size, vocab_size, false); +#endif + + int* tiled_input_lengths_buf = reinterpret_cast(allocator->malloc(sizeof(int) * batch_size * beam_width)); + float* cum_log_probs = reinterpret_cast(allocator->malloc(sizeof(float) * batch_size * beam_width)); + float* output_log_probs = reinterpret_cast( + allocator->malloc(sizeof(float) * max_output_len * batch_size * beam_width)); + bool has_diff_runtime_args = false; + bool is_initialize_random_table = true; + + int* output_ids = reinterpret_cast(allocator->malloc(sizeof(int) * max_seq_len * batch_size * beam_width)); + int* h_output_ids = reinterpret_cast(malloc(sizeof(int) * batch_size * beam_width)); + + // Init by zero. + cudaMemset(cum_log_probs, 0, sizeof(float) * batch_size * beam_width); + cudaMemset(output_log_probs, 0, sizeof(float) * max_output_len * batch_size * beam_width); + cudaMemset(output_ids, 0, sizeof(int) * max_seq_len * batch_size * beam_width); + + for (size_t step = max_input_len; step < max_output_len; ++step) { + uint ite = 0; + seed += step; + + // Reset by the test value since the sampling layer internally update the logit buffer (making it log-prob). + cudaH2Dcpy(logits_buf, h_logits, logits_size); + std::unordered_map dynamic_decode_input_tensors{ + {"logits", Tensor{MEMORY_GPU, TYPE_FP32, {batch_size, beam_width, vocab_size}, logits_buf}}, + {"embedding_bias", Tensor{MEMORY_GPU, data_type, {vocab_size}, nullptr}}, + {"step", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &step}}, + {"max_input_length", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &max_input_len}}, + {"input_lengths", + Tensor{MEMORY_GPU, TYPE_INT32, {batch_size, beam_width}, tiled_input_lengths_buf}}, + {"ite", Tensor{MEMORY_CPU, TYPE_UINT32, {1}, &ite}}, + {"has_diff_runtime_args", Tensor{MEMORY_CPU, TYPE_BOOL, {1}, &has_diff_runtime_args}}, + {"local_batch_size", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &batch_size}}, + {"is_initialize_random_table", Tensor{MEMORY_CPU, TYPE_BOOL, {1}, &is_initialize_random_table}}, + {"end_id", Tensor{MEMORY_CPU, TYPE_INT32, {1}, &end_id}}, + {"random_seed", {MEMORY_CPU, TYPE_INT32, {1}, &seed}}, + {"runtime_top_k", {MEMORY_CPU, TYPE_INT32, {1}, &top_k}}, + {"runtime_top_p", {MEMORY_CPU, TYPE_FP32, {1}, &top_p}}, + {"temperature", Tensor{MEMORY_CPU, TYPE_FP32, {1}, &temperature}}, + {"len_penalty", Tensor{MEMORY_CPU, TYPE_FP32, {1}, &len_penalty}}, + {"repetition_penalty", Tensor{MEMORY_CPU, TYPE_FP32, {1}, &repetition_penalty}} + }; + + // common outputs + std::unordered_map dynamic_decode_output_tensors{ + {"output_ids", Tensor{MEMORY_GPU, TYPE_INT32, {max_seq_len, batch_size, beam_width}, output_ids}}, + {"finished", Tensor{MEMORY_GPU, TYPE_BOOL, {batch_size * beam_width}, nullptr}}, + {"cum_log_probs", Tensor{MEMORY_GPU, TYPE_FP32, {batch_size * beam_width}, cum_log_probs}}, + {"output_log_probs", + Tensor{MEMORY_GPU, TYPE_FP32, {max_seq_len, batch_size, beam_width}, output_log_probs}}, + {"parent_ids", Tensor{MEMORY_GPU, TYPE_INT32, {max_seq_len, batch_size, beam_width}, nullptr}}, + {"sequence_length", Tensor{MEMORY_GPU, TYPE_INT32, {batch_size * beam_width}, nullptr}}, + // necessary for beam search. + {"tgt_cache_indirection", + Tensor{MEMORY_GPU, TYPE_INT32, {batch_size, beam_width, max_output_len}, nullptr}}}; + + dynamic_decode_layer.forward(&dynamic_decode_output_tensors, + &dynamic_decode_input_tensors); + + FT_LOG_DEBUG("Step %2d generated ids", step); + cudaD2Hcpy(h_output_ids, + (int*)dynamic_decode_output_tensors + .at("output_ids") + .getPtrWithOffset(step * (batch_size * beam_width)), + batch_size * beam_width); + cudaD2Hcpy(h_cum_log_probs, cum_log_probs, batch_size * beam_width); + cudaD2Hcpy(h_output_log_probs, output_log_probs, max_output_len * batch_size * beam_width); + for (size_t i = 0; i < batch_size * beam_width; ++i) { + int idx = i * vocab_size + h_output_ids[i]; + expected_cum_log_probs[i] += (float)h_log_probs[idx]; + FT_LOG_DEBUG( + "| step %2d batch %2d idx %7d id %6d | log-prob %9.4f (expt: %9.4f) " + "| cum-log-prob %9.4f (expt: %9.4f) | prob %9.4e", + (int)step, (int)i, (int)idx, (int)h_output_ids[i], + h_output_log_probs[step * batch_size * beam_width + i], (float)h_log_probs[idx], + h_cum_log_probs[i], expected_cum_log_probs[i], (float)h_probs[idx]); + } + FT_LOG_DEBUG(""); + +#ifndef NDEBUG + // print output ids + for (size_t s = max_input_len; s < max_seq_len; ++s) { + cudaD2Hcpy(h_output_ids, + (int*)dynamic_decode_output_tensors + .at("output_ids") + .getPtrWithOffset(s * (batch_size * beam_width)), + batch_size * beam_width); + printf("%02d ", (int)s); + for (size_t b = 0; b < batch_size; ++b) { + printf("%3d ", (int)h_output_ids[b]); + } + printf("\n"); + } +#endif + } + std::string tag = tc.toString() + (is_fp32 ? " (fp32)" : " (fp16)"); + checkResult(tag, cum_log_probs, expected_cum_log_probs, batch_size * beam_width); + + free(expected_cum_log_probs); + free(h_output_log_probs); + free(h_cum_log_probs); + free(h_logits); + free(h_log_probs); + free(h_probs); + free(h_output_ids); + allocator->free(tiled_input_lengths_buf); + allocator->free(cum_log_probs); + allocator->free(output_ids); + allocator->free(logits_buf); + allocator->free(output_log_probs); + + delete cublas_wrapper; + delete allocator; + check_cuda_error(cudaStreamDestroy(stream)); + check_cuda_error(cublasDestroy(cublas_handle)); + check_cuda_error(cublasLtDestroy(cublaslt_handle)); +} + +int main() { + std::vector test_cases { + // TC: name / batch / vocab / beam / k / p / outlen + TestCase{"topk", 6, 4, 1, 1, 0.0f, 4}, + TestCase{"topk", 6, 4, 1, 4, 0.0f, 4}, + TestCase{"topk", 6, 51200, 1, 31, 0.0f, 16}, + TestCase{"topk", 32, 51200, 1, 63, 0.0f, 16}, + TestCase{"topk", 32, 51200, 1, 64, 0.0f, 16}, + TestCase{"topp", 6, 4, 1, 0, 0.8f, 4}, + TestCase{"topp", 6, 4, 1, 0, 1.0f, 4}, + TestCase{"topp", 6, 51200, 1, 0, 0.8f, 16}, + TestCase{"topp", 32, 51200, 1, 0, 0.8f, 16}, + TestCase{"topp", 32, 51200, 1, 0, 1.0f, 16}, + TestCase{"topk_topp", 6, 4, 1, 1, 0.8f, 16}, + TestCase{"topk_topp", 6, 4, 1, 4, 1.0f, 16}, + TestCase{"topk_topp", 6, 51200, 1, 31, 0.8f, 16}, + TestCase{"topk_topp", 32, 51200, 1, 63, 0.8f, 16}, + TestCase{"topk_topp", 32, 51200, 1, 64, 1.0f, 16}, + }; + + for (auto &tc : test_cases) { + testDynamicDecoingLayer(tc); + testDynamicDecoingLayer(tc); // T5 model uses DynamicDecodingLayer. + } + FT_LOG_INFO("Test Done"); + return 0; +}