diff --git a/debugtools/DDR_VM/data/superset-constants.dat b/debugtools/DDR_VM/data/superset-constants.dat index b3958c75cbb..7d9f12263cd 100644 --- a/debugtools/DDR_VM/data/superset-constants.dat +++ b/debugtools/DDR_VM/data/superset-constants.dat @@ -2736,34 +2736,6 @@ C|J9PORT_INFO_SHSEM_STAT_PASSED C|J9PORT_INVALID_FD C|J9PORT_MAJOR_VERSION_NUMBER C|J9PORT_MINOR_VERSION_NUMBER -C|J9PORT_PPC_FEATURE_32 -C|J9PORT_PPC_FEATURE_601_INSTR -C|J9PORT_PPC_FEATURE_64 -C|J9PORT_PPC_FEATURE_ARCH_2_05 -C|J9PORT_PPC_FEATURE_ARCH_2_06 -C|J9PORT_PPC_FEATURE_BOOKE -C|J9PORT_PPC_FEATURE_CELL_BE -C|J9PORT_PPC_FEATURE_HAS_4xxMAC -C|J9PORT_PPC_FEATURE_HAS_ALTIVEC -C|J9PORT_PPC_FEATURE_HAS_DFP -C|J9PORT_PPC_FEATURE_HAS_EFP_DOUBLE -C|J9PORT_PPC_FEATURE_HAS_EFP_SINGLE -C|J9PORT_PPC_FEATURE_HAS_FPU -C|J9PORT_PPC_FEATURE_HAS_MMU -C|J9PORT_PPC_FEATURE_HAS_SPE -C|J9PORT_PPC_FEATURE_HAS_VSX -C|J9PORT_PPC_FEATURE_ICACHE_SNOOP -C|J9PORT_PPC_FEATURE_NO_TB -C|J9PORT_PPC_FEATURE_PA6T -C|J9PORT_PPC_FEATURE_POWER4 -C|J9PORT_PPC_FEATURE_POWER5 -C|J9PORT_PPC_FEATURE_POWER5_PLUS -C|J9PORT_PPC_FEATURE_POWER6_EXT -C|J9PORT_PPC_FEATURE_PPC_LE -C|J9PORT_PPC_FEATURE_PSERIES_PERFMON_COMPAT -C|J9PORT_PPC_FEATURE_SMT -C|J9PORT_PPC_FEATURE_TRUE_LE -C|J9PORT_PPC_FEATURE_UNIFIED_CACHE C|J9PORT_PROCESS_CREATE_NEW_PROCESS_GROUP C|J9PORT_PROCESS_DO_NOT_CLOSE_STREAMS C|J9PORT_PROCESS_IGNORE_OUTPUT @@ -2776,34 +2748,6 @@ C|J9PORT_PROCESS_REDIRECT_STDERR_TO_STDOUT C|J9PORT_PROCESS_STDERR C|J9PORT_PROCESS_STDIN C|J9PORT_PROCESS_STDOUT -C|J9PORT_S390_FEATURE_DFP -C|J9PORT_S390_FEATURE_ESAN3 -C|J9PORT_S390_FEATURE_ETF3_ENHANCEMENT -C|J9PORT_S390_FEATURE_EXTENDED_IMMEDIATE -C|J9PORT_S390_FEATURE_EXTENDED_TRANSLATION_3 -C|J9PORT_S390_FEATURE_GENERAL_INSTRUCTIONS_EXTENSIONS -C|J9PORT_S390_FEATURE_GUARDED_STORAGE -C|J9PORT_S390_FEATURE_HIGH_GPRS -C|J9PORT_S390_FEATURE_HPAGE -C|J9PORT_S390_FEATURE_LOAD_AND_ZERO_RIGHTMOST_BYTE -C|J9PORT_S390_FEATURE_LOAD_STORE_ON_CONDITION_1 -C|J9PORT_S390_FEATURE_LOAD_STORE_ON_CONDITION_2 -C|J9PORT_S390_FEATURE_LONG_DISPLACEMENT -C|J9PORT_S390_FEATURE_MISCELLANEOUS_INSTRUCTION_EXTENSION -C|J9PORT_S390_FEATURE_MISCELLANEOUS_INSTRUCTION_EXTENSION_2 -C|J9PORT_S390_FEATURE_MSA -C|J9PORT_S390_FEATURE_MSA_EXTENSION3 -C|J9PORT_S390_FEATURE_MSA_EXTENSION4 -C|J9PORT_S390_FEATURE_MSA_EXTENSION_5 -C|J9PORT_S390_FEATURE_MSA_EXTENSION_8 -C|J9PORT_S390_FEATURE_SEMAPHORE_ASSIST -C|J9PORT_S390_FEATURE_SIDE_EFFECT_ACCESS -C|J9PORT_S390_FEATURE_STFLE -C|J9PORT_S390_FEATURE_TE -C|J9PORT_S390_FEATURE_VECTOR_FACILITY -C|J9PORT_S390_FEATURE_VECTOR_FACILITY_ENHANCEMENT_1 -C|J9PORT_S390_FEATURE_VECTOR_PACKED_DECIMAL -C|J9PORT_S390_FEATURE_ZARCH C|J9PORT_SHMEM_EYECATCHER_LENGTH C|J9PORT_SHSEM_MODE_DEFAULT C|J9PORT_SHSEM_MODE_NOWAIT @@ -2814,38 +2758,6 @@ C|J9PORT_SYSINFO_GET_HW_INFO_MODEL C|J9PORT_SYSINFO_GET_HW_INFO_NOT_AVAILABLE C|J9PORT_SYSINFO_GET_HW_INFO_SUCCESS C|J9PORT_SYSINFO_HW_INFO_MODEL_BUF_LENGTH -C|J9PORT_X86_FEATURE_10 -C|J9PORT_X86_FEATURE_20 -C|J9PORT_X86_FEATURE_30 -C|J9PORT_X86_FEATURE_ACPI -C|J9PORT_X86_FEATURE_APIC -C|J9PORT_X86_FEATURE_CLFSH -C|J9PORT_X86_FEATURE_CMOV -C|J9PORT_X86_FEATURE_CX8 -C|J9PORT_X86_FEATURE_DE -C|J9PORT_X86_FEATURE_DS -C|J9PORT_X86_FEATURE_FPU -C|J9PORT_X86_FEATURE_FXSR -C|J9PORT_X86_FEATURE_HTT -C|J9PORT_X86_FEATURE_MCA -C|J9PORT_X86_FEATURE_MCE -C|J9PORT_X86_FEATURE_MMX -C|J9PORT_X86_FEATURE_MSR -C|J9PORT_X86_FEATURE_MTRR -C|J9PORT_X86_FEATURE_PAE -C|J9PORT_X86_FEATURE_PAT -C|J9PORT_X86_FEATURE_PBE -C|J9PORT_X86_FEATURE_PGE -C|J9PORT_X86_FEATURE_PSE -C|J9PORT_X86_FEATURE_PSE_36 -C|J9PORT_X86_FEATURE_PSN -C|J9PORT_X86_FEATURE_SEP -C|J9PORT_X86_FEATURE_SS -C|J9PORT_X86_FEATURE_SSE -C|J9PORT_X86_FEATURE_SSE2 -C|J9PORT_X86_FEATURE_TM -C|J9PORT_X86_FEATURE_TSC -C|J9PORT_X86_FEATURE_VME C|J9SHMEM_NO_FLAGS C|J9SHMEM_OPEN_DO_NOT_CREATE C|J9SHMEM_OPEN_FOR_DESTROY @@ -2959,34 +2871,6 @@ C|J9PORT_INFO_SHSEM_STAT_PASSED C|J9PORT_INVALID_FD C|J9PORT_MAJOR_VERSION_NUMBER C|J9PORT_MINOR_VERSION_NUMBER -C|J9PORT_PPC_FEATURE_32 -C|J9PORT_PPC_FEATURE_601_INSTR -C|J9PORT_PPC_FEATURE_64 -C|J9PORT_PPC_FEATURE_ARCH_2_05 -C|J9PORT_PPC_FEATURE_ARCH_2_06 -C|J9PORT_PPC_FEATURE_BOOKE -C|J9PORT_PPC_FEATURE_CELL_BE -C|J9PORT_PPC_FEATURE_HAS_4xxMAC -C|J9PORT_PPC_FEATURE_HAS_ALTIVEC -C|J9PORT_PPC_FEATURE_HAS_DFP -C|J9PORT_PPC_FEATURE_HAS_EFP_DOUBLE -C|J9PORT_PPC_FEATURE_HAS_EFP_SINGLE -C|J9PORT_PPC_FEATURE_HAS_FPU -C|J9PORT_PPC_FEATURE_HAS_MMU -C|J9PORT_PPC_FEATURE_HAS_SPE -C|J9PORT_PPC_FEATURE_HAS_VSX -C|J9PORT_PPC_FEATURE_ICACHE_SNOOP -C|J9PORT_PPC_FEATURE_NO_TB -C|J9PORT_PPC_FEATURE_PA6T -C|J9PORT_PPC_FEATURE_POWER4 -C|J9PORT_PPC_FEATURE_POWER5 -C|J9PORT_PPC_FEATURE_POWER5_PLUS -C|J9PORT_PPC_FEATURE_POWER6_EXT -C|J9PORT_PPC_FEATURE_PPC_LE -C|J9PORT_PPC_FEATURE_PSERIES_PERFMON_COMPAT -C|J9PORT_PPC_FEATURE_SMT -C|J9PORT_PPC_FEATURE_TRUE_LE -C|J9PORT_PPC_FEATURE_UNIFIED_CACHE C|J9PORT_PROCESS_CREATE_NEW_PROCESS_GROUP C|J9PORT_PROCESS_DO_NOT_CLOSE_STREAMS C|J9PORT_PROCESS_IGNORE_OUTPUT @@ -2999,34 +2883,6 @@ C|J9PORT_PROCESS_REDIRECT_STDERR_TO_STDOUT C|J9PORT_PROCESS_STDERR C|J9PORT_PROCESS_STDIN C|J9PORT_PROCESS_STDOUT -C|J9PORT_S390_FEATURE_DFP -C|J9PORT_S390_FEATURE_ESAN3 -C|J9PORT_S390_FEATURE_ETF3_ENHANCEMENT -C|J9PORT_S390_FEATURE_EXTENDED_IMMEDIATE -C|J9PORT_S390_FEATURE_EXTENDED_TRANSLATION_3 -C|J9PORT_S390_FEATURE_GENERAL_INSTRUCTIONS_EXTENSIONS -C|J9PORT_S390_FEATURE_GUARDED_STORAGE -C|J9PORT_S390_FEATURE_HIGH_GPRS -C|J9PORT_S390_FEATURE_HPAGE -C|J9PORT_S390_FEATURE_LOAD_AND_ZERO_RIGHTMOST_BYTE -C|J9PORT_S390_FEATURE_LOAD_STORE_ON_CONDITION_1 -C|J9PORT_S390_FEATURE_LOAD_STORE_ON_CONDITION_2 -C|J9PORT_S390_FEATURE_LONG_DISPLACEMENT -C|J9PORT_S390_FEATURE_MISCELLANEOUS_INSTRUCTION_EXTENSION -C|J9PORT_S390_FEATURE_MISCELLANEOUS_INSTRUCTION_EXTENSION_2 -C|J9PORT_S390_FEATURE_MSA -C|J9PORT_S390_FEATURE_MSA_EXTENSION3 -C|J9PORT_S390_FEATURE_MSA_EXTENSION4 -C|J9PORT_S390_FEATURE_MSA_EXTENSION_5 -C|J9PORT_S390_FEATURE_MSA_EXTENSION_8 -C|J9PORT_S390_FEATURE_SEMAPHORE_ASSIST -C|J9PORT_S390_FEATURE_SIDE_EFFECT_ACCESS -C|J9PORT_S390_FEATURE_STFLE -C|J9PORT_S390_FEATURE_TE -C|J9PORT_S390_FEATURE_VECTOR_FACILITY -C|J9PORT_S390_FEATURE_VECTOR_FACILITY_ENHANCEMENT_1 -C|J9PORT_S390_FEATURE_VECTOR_PACKED_DECIMAL -C|J9PORT_S390_FEATURE_ZARCH C|J9PORT_SHMEM_EYECATCHER_LENGTH C|J9PORT_SHSEM_MODE_DEFAULT C|J9PORT_SHSEM_MODE_NOWAIT @@ -3037,38 +2893,6 @@ C|J9PORT_SYSINFO_GET_HW_INFO_MODEL C|J9PORT_SYSINFO_GET_HW_INFO_NOT_AVAILABLE C|J9PORT_SYSINFO_GET_HW_INFO_SUCCESS C|J9PORT_SYSINFO_HW_INFO_MODEL_BUF_LENGTH -C|J9PORT_X86_FEATURE_10 -C|J9PORT_X86_FEATURE_20 -C|J9PORT_X86_FEATURE_30 -C|J9PORT_X86_FEATURE_ACPI -C|J9PORT_X86_FEATURE_APIC -C|J9PORT_X86_FEATURE_CLFSH -C|J9PORT_X86_FEATURE_CMOV -C|J9PORT_X86_FEATURE_CX8 -C|J9PORT_X86_FEATURE_DE -C|J9PORT_X86_FEATURE_DS -C|J9PORT_X86_FEATURE_FPU -C|J9PORT_X86_FEATURE_FXSR -C|J9PORT_X86_FEATURE_HTT -C|J9PORT_X86_FEATURE_MCA -C|J9PORT_X86_FEATURE_MCE -C|J9PORT_X86_FEATURE_MMX -C|J9PORT_X86_FEATURE_MSR -C|J9PORT_X86_FEATURE_MTRR -C|J9PORT_X86_FEATURE_PAE -C|J9PORT_X86_FEATURE_PAT -C|J9PORT_X86_FEATURE_PBE -C|J9PORT_X86_FEATURE_PGE -C|J9PORT_X86_FEATURE_PSE -C|J9PORT_X86_FEATURE_PSE_36 -C|J9PORT_X86_FEATURE_PSN -C|J9PORT_X86_FEATURE_SEP -C|J9PORT_X86_FEATURE_SS -C|J9PORT_X86_FEATURE_SSE -C|J9PORT_X86_FEATURE_SSE2 -C|J9PORT_X86_FEATURE_TM -C|J9PORT_X86_FEATURE_TSC -C|J9PORT_X86_FEATURE_VME C|J9SHMEM_NO_FLAGS C|J9SHMEM_OPEN_DO_NOT_CREATE C|J9SHMEM_OPEN_FOR_DESTROY @@ -3354,53 +3178,6 @@ C|J9InitCopyLongs C|J9InitCopyLongsW C|J9InitCopySingles C|J9InitCopySinglesW -S|J9ProcessorArchitecture|J9ProcessorArchitecturePointer| -C|PROCESSOR_DUMMY -C|PROCESSOR_PPC_7XX -C|PROCESSOR_PPC_GP -C|PROCESSOR_PPC_GR -C|PROCESSOR_PPC_NSTAR -C|PROCESSOR_PPC_P6 -C|PROCESSOR_PPC_P7 -C|PROCESSOR_PPC_P8 -C|PROCESSOR_PPC_P9 -C|PROCESSOR_PPC_PULSAR -C|PROCESSOR_PPC_PWR403 -C|PROCESSOR_PPC_PWR405 -C|PROCESSOR_PPC_PWR440 -C|PROCESSOR_PPC_PWR601 -C|PROCESSOR_PPC_PWR602 -C|PROCESSOR_PPC_PWR603 -C|PROCESSOR_PPC_PWR604 -C|PROCESSOR_PPC_PWR620 -C|PROCESSOR_PPC_PWR630 -C|PROCESSOR_PPC_RIOS1 -C|PROCESSOR_PPC_RIOS2 -C|PROCESSOR_PPC_UNKNOWN -C|PROCESSOR_S390_GP10 -C|PROCESSOR_S390_GP11 -C|PROCESSOR_S390_GP12 -C|PROCESSOR_S390_GP13 -C|PROCESSOR_S390_GP6 -C|PROCESSOR_S390_GP7 -C|PROCESSOR_S390_GP8 -C|PROCESSOR_S390_GP9 -C|PROCESSOR_S390_UNKNOWN -C|PROCESSOR_UNDEFINED -C|PROCESSOR_X86_AMDATHLONDURON -C|PROCESSOR_X86_AMDK5 -C|PROCESSOR_X86_AMDK6 -C|PROCESSOR_X86_AMDOPTERON -C|PROCESSOR_X86_INTELCORE2 -C|PROCESSOR_X86_INTELHASWELL -C|PROCESSOR_X86_INTELNEHALEM -C|PROCESSOR_X86_INTELP6 -C|PROCESSOR_X86_INTELPENTIUM -C|PROCESSOR_X86_INTELPENTIUM4 -C|PROCESSOR_X86_INTELSANDYBRIDGE -C|PROCESSOR_X86_INTELTULSA -C|PROCESSOR_X86_INTELWESTMERE -C|PROCESSOR_X86_UNKNOWN S|J9RASdumpAgent|J9RASdumpAgentPointer| C|J9RAS_DUMP_DO_ATTACH_THREAD C|J9RAS_DUMP_DO_COMPACT_HEAP diff --git a/runtime/gc_modron_startup/mminit.cpp b/runtime/gc_modron_startup/mminit.cpp index 90dc4b2719a..3bd54aa7018 100644 --- a/runtime/gc_modron_startup/mminit.cpp +++ b/runtime/gc_modron_startup/mminit.cpp @@ -3036,12 +3036,12 @@ gcInitializeDefaults(J9JavaVM* vm) extensions->concurrentScavenger = true; if (LOADED == (FIND_DLL_TABLE_ENTRY(J9_JIT_DLL_NAME)->loadFlags & LOADED)) { - - /* Check for supported hardware */ - J9ProcessorDesc processorDesc; - j9sysinfo_get_processor_description(&processorDesc); - bool hwSupported = j9sysinfo_processor_has_feature(&processorDesc, J9PORT_S390_FEATURE_GUARDED_STORAGE) && - j9sysinfo_processor_has_feature(&processorDesc, J9PORT_S390_FEATURE_SIDE_EFFECT_ACCESS); + /* Check for supported hardware. */ + OMRPORT_ACCESS_FROM_J9PORT(PORTLIB); + OMRProcessorDesc processorDesc; + omrsysinfo_get_processor_description(&processorDesc); + bool hwSupported = omrsysinfo_processor_has_feature(&processorDesc, OMR_FEATURE_S390_GUARDED_STORAGE) + && omrsysinfo_processor_has_feature(&processorDesc, OMR_FEATURE_S390_SIDE_EFFECT_ACCESS); if (hwSupported) { /* diff --git a/runtime/jcl/common/sun_misc_Unsafe.cpp b/runtime/jcl/common/sun_misc_Unsafe.cpp index 97b7a397729..0626ace3931 100644 --- a/runtime/jcl/common/sun_misc_Unsafe.cpp +++ b/runtime/jcl/common/sun_misc_Unsafe.cpp @@ -887,19 +887,19 @@ Java_jdk_internal_misc_Unsafe_writebackMemory(JNIEnv *env, jobject receiver, jlo VM_AtomicSupport::readWriteBarrier(); switch (vm->cpuCacheWritebackCapabilities) { - case J9PORT_X86_FEATURE_CLWB: + case OMR_FEATURE_X86_CLWB: do { cacheLine += cacheLineSize; asm volatile("clwb %0" : "+m" (*(U_8 *)cacheLine)); } while (lastCacheLine != cacheLine); break; - case J9PORT_X86_FEATURE_CLFLUSHOPT: + case OMR_FEATURE_X86_CLFLUSHOPT: do { cacheLine += cacheLineSize; asm volatile("clflushopt %0" : "+m" (*(U_8 *)cacheLine)); } while (lastCacheLine != cacheLine); break; - case J9PORT_X86_FEATURE_CLFSH: + case OMR_FEATURE_X86_CLFSH: do { cacheLine += cacheLineSize; asm volatile("clflush %0" : "+m" (*(U_8 *)cacheLine)); @@ -937,9 +937,9 @@ Java_jdk_internal_misc_Unsafe_isWritebackEnabled(JNIEnv *env, jclass clazz) J9JavaVM *vm = currentThread->javaVM; if (vm->dCacheLineSize > 0) { switch (vm->cpuCacheWritebackCapabilities) { - case J9PORT_X86_FEATURE_CLWB: - case J9PORT_X86_FEATURE_CLFLUSHOPT: - case J9PORT_X86_FEATURE_CLFSH: + case OMR_FEATURE_X86_CLFLUSHOPT: + case OMR_FEATURE_X86_CLFSH: + case OMR_FEATURE_X86_CLWB: result = JNI_TRUE; break; default: diff --git a/runtime/oti/j9port.h b/runtime/oti/j9port.h index 4d5d99abfc5..79f64049191 100644 --- a/runtime/oti/j9port.h +++ b/runtime/oti/j9port.h @@ -22,6 +22,7 @@ #if !defined(OTI_J9PORT_H_) #define OTI_J9PORT_H_ + /* @ddr_namespace: map_to_type=J9PortLibrary */ /* NOTE: j9port_generated.h include is at the bottom of this file until its dependencies on this file can be relaxed */ @@ -338,355 +339,6 @@ typedef struct J9GuestMemoryUsage { int64_t maxMemLimit; } J9GuestMemoryUsage; -/* j9sysinfo_get_processor_description - */ -typedef enum J9ProcessorArchitecture { - - PROCESSOR_UNDEFINED, - - PROCESSOR_S390_UNKNOWN, - PROCESSOR_S390_GP6, - PROCESSOR_S390_GP7, - PROCESSOR_S390_GP8, - PROCESSOR_S390_GP9, - PROCESSOR_S390_GP10, - PROCESSOR_S390_GP11, - PROCESSOR_S390_GP12, - PROCESSOR_S390_GP13, - PROCESSOR_S390_GP14, - - PROCESSOR_PPC_UNKNOWN, - PROCESSOR_PPC_7XX, - PROCESSOR_PPC_GP, - PROCESSOR_PPC_GR, - PROCESSOR_PPC_NSTAR, - PROCESSOR_PPC_PULSAR, - PROCESSOR_PPC_PWR403, - PROCESSOR_PPC_PWR405, - PROCESSOR_PPC_PWR440, - PROCESSOR_PPC_PWR601, - PROCESSOR_PPC_PWR602, - PROCESSOR_PPC_PWR603, - PROCESSOR_PPC_PWR604, - PROCESSOR_PPC_PWR620, - PROCESSOR_PPC_PWR630, - PROCESSOR_PPC_RIOS1, - PROCESSOR_PPC_RIOS2, - PROCESSOR_PPC_P6, - PROCESSOR_PPC_P7, - PROCESSOR_PPC_P8, - PROCESSOR_PPC_P9, - PROCESSOR_PPC_P10, - - PROCESSOR_X86_UNKNOWN, - PROCESSOR_X86_INTELPENTIUM, - PROCESSOR_X86_INTELP6, - PROCESSOR_X86_INTELPENTIUM4, - PROCESSOR_X86_INTELCORE2, - PROCESSOR_X86_INTELTULSA, - PROCESSOR_X86_INTELNEHALEM, - PROCESSOR_X86_INTELWESTMERE, - PROCESSOR_X86_INTELSANDYBRIDGE, - PROCESSOR_X86_INTELHASWELL, - PROCESSOR_X86_AMDK5, - PROCESSOR_X86_AMDK6, - PROCESSOR_X86_AMDATHLONDURON, - PROCESSOR_X86_AMDOPTERON, - - PROCESSOR_RISCV64_UNKNOWN, - - PROCESSOR_AARCH64_UNKNOWN, - - PROCESSOR_DUMMY = 0x40000000 /* force wide enums */ - -} J9ProcessorArchitecture; - -/* Holds processor type and features used with j9sysinfo_get_processor_description - * and j9sysinfo_processor_has_feature - */ -#define J9PORT_SYSINFO_FEATURES_SIZE 5 -typedef struct J9ProcessorDesc { - J9ProcessorArchitecture processor; - J9ProcessorArchitecture physicalProcessor; - uint32_t features[J9PORT_SYSINFO_FEATURES_SIZE]; -} J9ProcessorDesc; - -/* PowerPC features - * Auxiliary Vector Hardware Capability (AT_HWCAP) features for PowerPC. - */ -#define J9PORT_PPC_FEATURE_32 31 /* 32-bit mode. */ -#define J9PORT_PPC_FEATURE_64 30 /* 64-bit mode. */ -#define J9PORT_PPC_FEATURE_601_INSTR 29 /* 601 chip, Old POWER ISA. */ -#define J9PORT_PPC_FEATURE_HAS_ALTIVEC 28 /* SIMD/Vector Unit. */ -#define J9PORT_PPC_FEATURE_HAS_FPU 27 /* Floating Point Unit. */ -#define J9PORT_PPC_FEATURE_HAS_MMU 26 /* Memory Management Unit. */ -#define J9PORT_PPC_FEATURE_HAS_4xxMAC 25 /* 4xx Multiply Accumulator. */ -#define J9PORT_PPC_FEATURE_UNIFIED_CACHE 24 /* Unified I/D cache. */ -#define J9PORT_PPC_FEATURE_HAS_SPE 23 /* Signal Processing ext. */ -#define J9PORT_PPC_FEATURE_HAS_EFP_SINGLE 22 /* SPE Float. */ -#define J9PORT_PPC_FEATURE_HAS_EFP_DOUBLE 21 /* SPE Double. */ -#define J9PORT_PPC_FEATURE_NO_TB 20 /* 601/403gx have no timebase. */ -#define J9PORT_PPC_FEATURE_POWER4 19 /* POWER4 ISA 2.01. */ -#define J9PORT_PPC_FEATURE_POWER5 18 /* POWER5 ISA 2.02. */ -#define J9PORT_PPC_FEATURE_POWER5_PLUS 17 /* POWER5+ ISA 2.03. */ -#define J9PORT_PPC_FEATURE_CELL_BE 16 /* CELL Broadband Engine */ -#define J9PORT_PPC_FEATURE_BOOKE 15 /* ISA Embedded Category. */ -#define J9PORT_PPC_FEATURE_SMT 14 /* Simultaneous Multi-Threading. */ -#define J9PORT_PPC_FEATURE_ICACHE_SNOOP 13 -#define J9PORT_PPC_FEATURE_ARCH_2_05 12 /* ISA 2.05. */ -#define J9PORT_PPC_FEATURE_PA6T 11 /* PA Semi 6T Core. */ -#define J9PORT_PPC_FEATURE_HAS_DFP 10 /* Decimal FP Unit. */ -#define J9PORT_PPC_FEATURE_POWER6_EXT 9 /* P6 + mffgpr/mftgpr. */ -#define J9PORT_PPC_FEATURE_ARCH_2_06 8 /* ISA 2.06. */ -#define J9PORT_PPC_FEATURE_HAS_VSX 7 /* P7 Vector Scalar Extension. */ -#define J9PORT_PPC_FEATURE_PSERIES_PERFMON_COMPAT 6 /* Has ISA >= 2.05 PMU basic subset support. */ -#define J9PORT_PPC_FEATURE_TRUE_LE 1 /* Processor in true Little Endian mode. */ -#define J9PORT_PPC_FEATURE_PPC_LE 0 /* Processor emulates Little Endian Mode. */ - -#define J9PORT_PPC_FEATURE_ARCH_2_07 32 + 31 -#define J9PORT_PPC_FEATURE_HTM 32 + 30 -#define J9PORT_PPC_FEATURE_DSCR 32 + 29 -#define J9PORT_PPC_FEATURE_EBB 32 + 28 -#define J9PORT_PPC_FEATURE_ISEL 32 + 27 -#define J9PORT_PPC_FEATURE_TAR 32 + 26 - -/* s390 features - * z/Architecture Principles of Operation 4-69 - * STORE FACILITY LIST EXTENDED (STFLE) - */ -#define J9PORT_S390_FEATURE_ESAN3 0 /* STFLE bit 0 */ -#define J9PORT_S390_FEATURE_ZARCH 1 /* STFLE bit 2 */ -#define J9PORT_S390_FEATURE_STFLE 2 /* STFLE bit 7 */ -#define J9PORT_S390_FEATURE_MSA 3 /* STFLE bit 17 */ -#define J9PORT_S390_FEATURE_DFP 6 /* STFLE bit 42 & 44 */ -#define J9PORT_S390_FEATURE_HPAGE 7 -#define J9PORT_S390_FEATURE_TE 10 /* STFLE bit 50 & 73 */ -#define J9PORT_S390_FEATURE_MSA_EXTENSION3 11 /* STFLE bit 76 */ -#define J9PORT_S390_FEATURE_MSA_EXTENSION4 12 /* STFLE bit 77 */ - -#define J9PORT_S390_FEATURE_COMPARE_AND_SWAP_AND_STORE 32 + 0 /* STFLE bit 32 */ -#define J9PORT_S390_FEATURE_COMPARE_AND_SWAP_AND_STORE2 32 + 1 /* STFLE bit 33 */ -#define J9PORT_S390_FEATURE_EXECUTE_EXTENSIONS 32 + 3 /* STFLE bit 35 */ -#define J9PORT_S390_FEATURE_FPE 32 + 9 /* STFLE bit 41 */ - -#define J9PORT_S390_FEATURE_RI 64 + 0 /* STFLE bit 64 */ - -/* z990 facilities */ - -/* STFLE bit 19 - Long-displacement facility */ -#define J9PORT_S390_FEATURE_LONG_DISPLACEMENT 19 - -/* z9 facilities */ - -/* STFLE bit 21 - Extended-immediate facility */ -#define J9PORT_S390_FEATURE_EXTENDED_IMMEDIATE 21 - -/* STFLE bit 22 - Extended-translation facility 3 */ -#define J9PORT_S390_FEATURE_EXTENDED_TRANSLATION_3 22 - -/* STFLE bit 30 - ETF3-enhancement facility */ -#define J9PORT_S390_FEATURE_ETF3_ENHANCEMENT 30 - -/* z10 facilities */ - -/* STFLE bit 34 - General-instructions-extension facility */ -#define J9PORT_S390_FEATURE_GENERAL_INSTRUCTIONS_EXTENSIONS 34 - -/* z196 facilities */ - -/* STFLE bit 45 - High-word facility */ -#define J9PORT_S390_FEATURE_HIGH_WORD 45 - -/* STFLE bit 45 - Load/store-on-condition facility 1 */ -#define J9PORT_S390_FEATURE_LOAD_STORE_ON_CONDITION_1 45 - -/* zEC12 facilities */ - -/* STFLE bit 49 - Miscellaneous-instruction-extension facility */ -#define J9PORT_S390_FEATURE_MISCELLANEOUS_INSTRUCTION_EXTENSION 49 - -/* z13 facilities */ - -/* STFLE bit 53 - Load/store-on-condition facility 2 */ -#define J9PORT_S390_FEATURE_LOAD_STORE_ON_CONDITION_2 53 - -/* STFLE bit 53 - Load-and-zero-rightmost-byte facility */ -#define J9PORT_S390_FEATURE_LOAD_AND_ZERO_RIGHTMOST_BYTE 53 - -/* STFLE bit 129 - Vector facility */ -#define J9PORT_S390_FEATURE_VECTOR_FACILITY 129 - -/* z14 facilities */ - -/* STFLE bit 58 - Miscellaneous-instruction-extensions facility 2 */ -#define J9PORT_S390_FEATURE_MISCELLANEOUS_INSTRUCTION_EXTENSION_2 58 - -/* STFLE bit 59 - Semaphore-assist facility */ -#define J9PORT_S390_FEATURE_SEMAPHORE_ASSIST 59 - -/* STFLE bit 131 - Side-effect-access facility */ -#define J9PORT_S390_FEATURE_SIDE_EFFECT_ACCESS 131 - -/* STFLE bit 133 - Guarded-storage facility */ -#define J9PORT_S390_FEATURE_GUARDED_STORAGE 133 - -/* STFLE bit 134 - Vector packed decimal facility */ -#define J9PORT_S390_FEATURE_VECTOR_PACKED_DECIMAL 134 - -/* STFLE bit 135 - Vector enhancements facility 1 */ -#define J9PORT_S390_FEATURE_VECTOR_FACILITY_ENHANCEMENT_1 135 - -/* STFLE bit 146 - Message-security-assist-extension-8 facility */ -#define J9PORT_S390_FEATURE_MSA_EXTENSION_8 146 - -/* STFLE bit 57 - Message-security-assist-extension-5 facility */ -#define J9PORT_S390_FEATURE_MSA_EXTENSION_5 57 - -/* z15 facilities */ - -/* STFLE bit 61 - Miscellaneous-instruction-extensions facility 3 */ -#define J9PORT_S390_FEATURE_MISCELLANEOUS_INSTRUCTION_EXTENSION_3 61 - -/* STFLE bit 148 - Vector enhancements facility 2 */ -#define J9PORT_S390_FEATURE_VECTOR_FACILITY_ENHANCEMENT_2 148 - -/* STFLE bit 152 - Vector packed decimal enhancement facility */ -#define J9PORT_S390_FEATURE_VECTOR_PACKED_DECIMAL_ENHANCEMENT_FACILITY 152 - - -/* Linux on Z features - * Auxiliary Vector Hardware Capability (AT_HWCAP) features for Linux on Z. - * Obtained from: https://github.com/torvalds/linux/blob/050cdc6c9501abcd64720b8cc3e7941efee9547d/arch/s390/include/asm/elf.h#L94-L109. - * If new facility support is required, then it must be defined there (and here), before we can check for it consistently. - * - * The linux kernel will use the defines in the above link to set HWCAP features. This is done inside "setup_hwcaps(void)" routine found - * in arch/s390/kernel/setup.c in the linux kernel source tree. - */ -#define J9PORT_HWCAP_S390_ESAN3 0x1 -#define J9PORT_HWCAP_S390_ZARCH 0x2 -#define J9PORT_HWCAP_S390_STFLE 0x4 -#define J9PORT_HWCAP_S390_MSA 0x8 -#define J9PORT_HWCAP_S390_LDISP 0x10 -#define J9PORT_HWCAP_S390_EIMM 0x20 -#define J9PORT_HWCAP_S390_DFP 0x40 -#define J9PORT_HWCAP_S390_HPAGE 0x80 -#define J9PORT_HWCAP_S390_ETF3EH 0x100 -#define J9PORT_HWCAP_S390_HIGH_GPRS 0x200 -#define J9PORT_HWCAP_S390_TE 0x400 -#define J9PORT_HWCAP_S390_VXRS 0x800 -#define J9PORT_HWCAP_S390_VXRS_BCD 0x1000 -#define J9PORT_HWCAP_S390_VXRS_EXT 0x2000 -#define J9PORT_HWCAP_S390_GS 0x4000 - -/* x86 features - * INTEL INSTRUCTION SET REFERENCE, A-M - * 3-170 Vol. 2A Table 3-21. More on Feature Information Returned in the EDX Register - */ -#define J9PORT_X86_FEATURE_FPU 0 /* Floating Point Unit On-Chip. */ -#define J9PORT_X86_FEATURE_VME 1 /* Virtual 8086 Mode Enhancements. */ -#define J9PORT_X86_FEATURE_DE 2 /* DE Debugging Extensions. */ -#define J9PORT_X86_FEATURE_PSE 3 /* Page Size Extension. */ -#define J9PORT_X86_FEATURE_TSC 4 /* Time Stamp Counter. */ -#define J9PORT_X86_FEATURE_MSR 5 /* Model Specific Registers RDMSR and WRMSR Instructions. */ -#define J9PORT_X86_FEATURE_PAE 6 /* Physical Address Extension. */ -#define J9PORT_X86_FEATURE_MCE 7 /* Machine Check Exception. */ -#define J9PORT_X86_FEATURE_CX8 8 /* Compare-and-exchange 8 bytes (64 bits) instruction */ -#define J9PORT_X86_FEATURE_APIC 9 /* APIC On-Chip. */ -#define J9PORT_X86_FEATURE_10 10 /* Reserved */ -#define J9PORT_X86_FEATURE_SEP 11 /* SYSENTER and SYSEXIT Instructions. */ -#define J9PORT_X86_FEATURE_MTRR 12 /* Memory Type Range Registers. */ -#define J9PORT_X86_FEATURE_PGE 13 /* Page Global Bit. */ -#define J9PORT_X86_FEATURE_MCA 14 /* Machine Check Architecture. */ -#define J9PORT_X86_FEATURE_CMOV 15 /* Conditional Move Instructions. */ -#define J9PORT_X86_FEATURE_PAT 16 /* Page Attribute Table. */ -#define J9PORT_X86_FEATURE_PSE_36 17 /* 36-Bit Page Size Extension. */ -#define J9PORT_X86_FEATURE_PSN 18 /* Processor Serial Number. */ -#define J9PORT_X86_FEATURE_CLFSH 19 /* CLFLUSH Instruction. */ -#define J9PORT_X86_FEATURE_20 20 /* Reserved */ -#define J9PORT_X86_FEATURE_DS 21 /* Debug Store. */ -#define J9PORT_X86_FEATURE_ACPI 22 /* Thermal Monitor and Software Controlled Clock Facilities. */ -#define J9PORT_X86_FEATURE_MMX 23 /* Intel MMX Technology. */ -#define J9PORT_X86_FEATURE_FXSR 24 /* FXSAVE and FXRSTOR Instructions. */ -#define J9PORT_X86_FEATURE_SSE 25 /* The processor supports the SSE extensions. */ -#define J9PORT_X86_FEATURE_SSE2 26 /* The processor supports the SSE2 extensions. */ -#define J9PORT_X86_FEATURE_SS 27 /* Self Snoop. */ -#define J9PORT_X86_FEATURE_HTT 28 /* Hyper Threading. */ -#define J9PORT_X86_FEATURE_TM 29 /* Thermal Monitor. */ -#define J9PORT_X86_FEATURE_30 30 /* Reserved */ -#define J9PORT_X86_FEATURE_PBE 31 /* Pending Break Enable. */ - -/* INTEL INSTRUCTION SET REFERENCE, A-M - * Vol. 2A 3-167 Table 3-20. Feature Information Returned in the ECX Register - */ -#define J9PORT_X86_FEATURE_SSE3 32 + 0 /* Streaming SIMD Extensions 3 */ -#define J9PORT_X86_FEATURE_PCLMULQDQ 32 + 1 /* PCLMULQDQ. */ -#define J9PORT_X86_FEATURE_DTES64 32 + 2 /* 64-bit DS Area. */ -#define J9PORT_X86_FEATURE_MONITOR 32 + 3 /* MONITOR/MWAIT. */ -#define J9PORT_X86_FEATURE_DS_CPL 32 + 4 /* CPL Qualified Debug Store. */ -#define J9PORT_X86_FEATURE_VMX 32 + 5 /* Virtual Machine Extensions. */ -#define J9PORT_X86_FEATURE_SMX 32 + 6 /* Safer Mode Extensions. */ -#define J9PORT_X86_FEATURE_EIST 32 + 7 /* Enhanced Intel SpeedStep technology. */ -#define J9PORT_X86_FEATURE_TM2 32 + 8 /* Thermal Monitor 2. */ -#define J9PORT_X86_FEATURE_SSSE3 32 + 9 /* Supplemental Streaming SIMD Extensions 3 */ -#define J9PORT_X86_FEATURE_CNXT_ID 32 + 10 /* L1 Context ID. */ -#define J9PORT_X86_FEATURE_11 32 + 11 /* Reserved */ -#define J9PORT_X86_FEATURE_FMA 32 + 12 /* FMA extensions using YMM state. */ -#define J9PORT_X86_FEATURE_CMPXCHG16B 32 + 13 /* CMPXCHG16B Available. */ -#define J9PORT_X86_FEATURE_XTPR 32 + 14 /* xTPR Update Control. */ -#define J9PORT_X86_FEATURE_PDCM 32 + 15 /* Perfmon and Debug Capability. */ -#define J9PORT_X86_FEATURE_16 32 + 16 /* Reserved. */ -#define J9PORT_X86_FEATURE_PCID 32 + 17 /* Process-context identifiers. */ -#define J9PORT_X86_FEATURE_DCA 32 + 18 /* Processor supports the ability to prefetch data from a memory mapped device. */ -#define J9PORT_X86_FEATURE_SSE4_1 32 + 19 /* Processor supports SSE4.1. */ -#define J9PORT_X86_FEATURE_SSE4_2 32 + 20 /* Processor supports SSE4.2. */ -#define J9PORT_X86_FEATURE_X2APIC 32 + 21 /* Processor supports x2APIC feature. */ -#define J9PORT_X86_FEATURE_MOVBE 32 + 22 /* Processor supports MOVBE instruction. */ -#define J9PORT_X86_FEATURE_POPCNT 32 + 23 /* Processor supports the POPCNT instruction. */ -#define J9PORT_X86_FEATURE_TSC_DEADLINE 32 + 24 /* Processor's local APIC timer supports one-shot operation using a TSC deadline value. */ -#define J9PORT_X86_FEATURE_AESNI 32 + 25 /* Processor supports the AESNI instruction extensions. */ -#define J9PORT_X86_FEATURE_XSAVE 32 + 26 /* Processor supports the XSAVE/XRSTOR processor extended states. */ -#define J9PORT_X86_FEATURE_OSXSAVE 32 + 27 /* OS has enabled XSETBV/XGETBV instructions to access XCR0, and support for processor extended state management using XSAVE/XRSTOR. */ -#define J9PORT_X86_FEATURE_AVX 32 + 28 /* Processor supports the AVX instruction extensions. */ -#define J9PORT_X86_FEATURE_F16C 32 + 29 /* 16-bit floating-point conversion instructions. */ -#define J9PORT_X86_FEATURE_RDRAND 32 + 30 /* Processor supports RDRAND instruction. */ - - -/* INTEL INSTRUCTION SET REFERENCE, A-L May 2019 - * Vol. 2 3-197 Table 3-8. Structured Feature Information Returned in the EBX Register by CPUID instruction - */ -#define J9PORT_X86_FEATURE_FSGSBASE 96 + 0 /* fsgsbase instructions support */ -#define J9PORT_X86_FEATURE_IA32_TSC_ADJUST 96 + 1 /* IA32_TSC_ADJUST MSR support */ -#define J9PORT_X86_FEATURE_SGX 96 + 2 /* Intel Software Guard Extensions */ -#define J9PORT_X86_FEATURE_BMI1 96 + 3 /* Bit Manipulation Instructions 1 */ -#define J9PORT_X86_FEATURE_HLE 96 + 4 /* Hardware Lock Elison */ -#define J9PORT_X86_FEATURE_AVX2 96 + 5 /* AVX2 support */ -#define J9PORT_X86_FEATURE_FDP_EXCPTN_ONLY 96 + 6 /* x87 FPU data pointer updated only on exceptions */ -#define J9PORT_X86_FEATURE_SMEP 96 + 7 /* Supervsior-Mode Execution Prevention */ -#define J9PORT_X86_FEATURE_BMI2 96 + 8 /* Bit Manipulation Instructions 2 */ -#define J9PORT_X86_FEATURE_ERMSB 96 + 9 /* Enhanced REP MOVSB/STOSB */ -#define J9PORT_X86_FEATURE_INVPCID 96 + 10 /* Invalidate Process-Context Identifier instruction */ -#define J9PORT_X86_FEATURE_RTM 96 + 11 /* Restricted Transactional Memory */ -#define J9PORT_X86_FEATURE_RDT_M 96 + 12 /* Intel RDT Monitoring */ -#define J9PORT_X86_FEATURE_DEPRECATE_FPUCS 96 + 13 /* Deprecates FPU CS and FPU DS when set */ -#define J9PORT_X86_FEATURE_MPX 96 + 14 /* Intel Memory Protextion Extensions */ -#define J9PORT_X86_FEATURE_RDT_A 96 + 15 /* Intel RDT Allocation */ -#define J9PORT_X86_FEATURE_AVX512F 96 + 16 /* AVX512 Foundation */ -#define J9PORT_X86_FEATURE_AVX512DQ 96 + 17 /* AVX512 Doubleword & Quadword */ -#define J9PORT_X86_FEATURE_RDSEED 96 + 18 /* RDSEED instruction support */ -#define J9PORT_X86_FEATURE_ADX 96 + 19 /* Intel ADX (multi-precision arithmetic) */ -#define J9PORT_X86_FEATURE_SMAP 96 + 20 /* Supervisor-Mode Access Prevention */ -#define J9PORT_X86_FEATURE_AVX512_IFMA 96 + 21 /* AVX512 Integer Fused Multiply Add */ -#define J9PORT_X86_FEATURE_22 96 + 22 /* reserved */ -#define J9PORT_X86_FEATURE_CLFLUSHOPT 96 + 23 /* cache flush optimized */ -#define J9PORT_X86_FEATURE_CLWB 96 + 24 /* cache line write back */ -#define J9PORT_X86_FEATURE_IPT 96 + 25 /* Intel Processor Trace */ -#define J9PORT_X86_FEATURE_AVX512PF 96 + 26 /* AVX512 Prefetch */ -#define J9PORT_X86_FEATURE_AVX512ER 96 + 27 /* AVX512 Exponential and Reciprocal */ -#define J9PORT_X86_FEATURE_AVX512CD 96 + 28 /* AVX512 Conflict Detection */ -#define J9PORT_X86_FEATURE_SHA 96 + 29 /* Intel SHA Extensions */ -#define J9PORT_X86_FEATURE_AVX512BW 96 + 30 /* AVX512 Byte and Word */ -#define J9PORT_X86_FEATURE_AVX512VL 96 + 31 /* AVX512 Vector Length */ - /* cache types */ #define J9PORT_CACHEINFO_ICACHE 0x01 #define J9PORT_CACHEINFO_DCACHE 0x02 diff --git a/runtime/oti/j9port_generated.h b/runtime/oti/j9port_generated.h index fdba90d894c..6ddb4ff050c 100644 --- a/runtime/oti/j9port_generated.h +++ b/runtime/oti/j9port_generated.h @@ -164,10 +164,6 @@ typedef struct J9PortLibrary { void ( *sysinfo_shutdown)(struct J9PortLibrary *portLibrary) ; /** see @ref j9sysinfo.c::j9sysinfo_get_classpathSeparator "j9sysinfo_get_classpathSeparator"*/ uint16_t ( *sysinfo_get_classpathSeparator)(struct J9PortLibrary *portLibrary ) ; - /** see @ref j9sysinfo.c::j9sysinfo_get_processor_description "j9sysinfo_get_processor_description"*/ - intptr_t ( *sysinfo_get_processor_description)(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc) ; - /** see @ref j9sysinfo.c::j9sysinfo_processor_has_feature "j9sysinfo_processor_has_feature"*/ - BOOLEAN ( *sysinfo_processor_has_feature)(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc, uint32_t feature) ; /** see @ref j9sysinfo.c::j9sysinfo_get_hw_info "j9sysinfo_get_hw_info"*/ int32_t ( *sysinfo_get_hw_info)(struct J9PortLibrary *portLibrary, uint32_t infoType, char * buf, uint32_t bufLen); /** see @ref j9sysinfo.c::j9sysinfo_get_cache_info "j9sysinfo_get_cache_info"*/ @@ -518,8 +514,6 @@ extern J9_CFUNC int32_t j9port_isCompatible(struct J9PortLibraryVersion *expecte #define j9sysinfo_env_iterator_init(param1,param2,param3) OMRPORT_FROM_J9PORT(privatePortLibrary)->sysinfo_env_iterator_init(OMRPORT_FROM_J9PORT(privatePortLibrary),param1,param2,param3) #define j9sysinfo_env_iterator_hasNext(param1) OMRPORT_FROM_J9PORT(privatePortLibrary)->sysinfo_env_iterator_hasNext(OMRPORT_FROM_J9PORT(privatePortLibrary),param1) #define j9sysinfo_env_iterator_next(param1,param2) OMRPORT_FROM_J9PORT(privatePortLibrary)->sysinfo_env_iterator_next(OMRPORT_FROM_J9PORT(privatePortLibrary),param1,param2) -#define j9sysinfo_get_processor_description(param1) privatePortLibrary->sysinfo_get_processor_description(privatePortLibrary,param1) -#define j9sysinfo_processor_has_feature(param1,param2) privatePortLibrary->sysinfo_processor_has_feature(privatePortLibrary,param1,param2) #define j9sysinfo_get_hw_info(param1,param2,param3) privatePortLibrary->sysinfo_get_hw_info(privatePortLibrary,param1,param2,param3) #define j9sysinfo_get_cache_info(param1) privatePortLibrary->sysinfo_get_cache_info(privatePortLibrary,param1) #define j9file_startup() OMRPORT_FROM_J9PORT(privatePortLibrary)->file_startup(OMRPORT_FROM_J9PORT(privatePortLibrary)) diff --git a/runtime/port/common/j9port.c b/runtime/port/common/j9port.c index 0254562a133..df24142ab11 100644 --- a/runtime/port/common/j9port.c +++ b/runtime/port/common/j9port.c @@ -46,8 +46,6 @@ static J9PortLibrary MainPortLibraryTable = { j9sysinfo_startup, j9sysinfo_shutdown, j9sysinfo_get_classpathSeparator, /* sysinfo_get_classpathSeparator */ - j9sysinfo_get_processor_description, /* sysinfo_get_processor_description */ - j9sysinfo_processor_has_feature, /* sysinfo_processor_has_feature */ j9sysinfo_get_hw_info, /* sysinfo_get_hw_info */ j9sysinfo_get_cache_info, /* sysinfo_get_cache_info */ j9sock_startup, /* sock_startup */ diff --git a/runtime/port/common/j9sysinfo.c b/runtime/port/common/j9sysinfo.c index 8475d0da57b..dd68b75d3c8 100644 --- a/runtime/port/common/j9sysinfo.c +++ b/runtime/port/common/j9sysinfo.c @@ -28,7 +28,6 @@ #include "j9port.h" #include - /** * Determine if DLPAR (i.e. the ability to change number of CPUs and amount of memory dynamically) * is enabled on this platform. @@ -51,7 +50,7 @@ j9sysinfo_DLPAR_enabled(struct J9PortLibrary *portLibrary) * @return the classpathSeparator character. */ uint16_t -j9sysinfo_get_classpathSeparator(struct J9PortLibrary *portLibrary ) +j9sysinfo_get_classpathSeparator(struct J9PortLibrary *portLibrary) { return ';'; } @@ -93,7 +92,7 @@ j9sysinfo_startup(struct J9PortLibrary *portLibrary) /** * Determine if the platform has weak memory consistency behaviour. - * + * * @param[in] portLibrary The port library. * * @return 1 if weak memory consistency, 0 otherwise. @@ -103,12 +102,13 @@ j9sysinfo_weak_memory_consistency(struct J9PortLibrary *portLibrary) { return FALSE; } + /** * Determine the maximum number of CPUs on this platform * * @param[in] portLibrary The port library. * - * @return The maximum number of supported CPUs.. + * @return The maximum number of supported CPUs. */ uintptr_t j9sysinfo_DLPAR_max_CPUs(struct J9PortLibrary *portLibrary) @@ -133,47 +133,17 @@ j9sysinfo_get_processing_capacity(struct J9PortLibrary *portLibrary) } /** - * Determine CPU type and features. - * - * @param[in] portLibrary The port library. - * @param[out] desc pointer to the struct that will contain the CPU type and features. - * - desc will still be initialized if there is a failure. - * - * @return 0 on success, -1 on failure - */ -intptr_t -j9sysinfo_get_processor_description(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc) -{ - return -1; -} - -/** - * Determine if a CPU feature is present. - * - * @param[in] portLibrary The port library. - * @param[in] desc The struct that will contain the CPU type and features. - * @param[in] feature The feature to check (see j9port.h for list of features J9PORT_{PPC,S390,PPC}_FEATURE_*) - * - * @return TRUE if feature is present, FALSE otherwise. - */ -BOOLEAN -j9sysinfo_processor_has_feature(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc, uint32_t feature) -{ - return FALSE; -} - -/** - * Retrieve hardware information such as model. The information is returned in + * Retrieve hardware information such as model. The information is returned in * an ASCII string. * * @param portLibrary instance of port library - * @param infoType A number representing the information that is being + * @param infoType A number representing the information that is being * requested (e.g., J9PORT_SYSINFO_GET_HW_INFO_MODEL for hw model) - * @param buf buffer where string containing the information requested will + * @param buf buffer where string containing the information requested will * be written to * @param bufLen Length of buf * - * @return J9PORT_SYSINFO_GET_HW_INFO_SUCCESS in case of success. Any other + * @return J9PORT_SYSINFO_GET_HW_INFO_SUCCESS in case of success. Any other * value represents a failure. */ int32_t @@ -183,7 +153,6 @@ j9sysinfo_get_hw_info(struct J9PortLibrary *portLibrary, uint32_t infoType, return J9PORT_SYSINFO_GET_HW_INFO_NOT_AVAILABLE; } - /** * Return information about the CPU caches, such as number of levels, cache sizes and types, lines size, etc. * @param[in] portLibrary The Port Library instance @@ -191,6 +160,7 @@ j9sysinfo_get_hw_info(struct J9PortLibrary *portLibrary, uint32_t infoType, * @return requested information: may be integer or bit-map data. */ IDATA -j9sysinfo_get_cache_info(struct J9PortLibrary *portLibrary, struct const J9CacheInfoQuery * query) { +j9sysinfo_get_cache_info(struct J9PortLibrary *portLibrary, struct const J9CacheInfoQuery * query) +{ return J9PORT_ERROR_SYSINFO_NOT_SUPPORTED; } diff --git a/runtime/port/common/j9sysinfo_helpers.c b/runtime/port/common/j9sysinfo_helpers.c index e685b3f6dff..2c31a961182 100644 --- a/runtime/port/common/j9sysinfo_helpers.c +++ b/runtime/port/common/j9sysinfo_helpers.c @@ -27,7 +27,7 @@ */ #include "j9sysinfo_helpers.h" - + #include "j9port.h" #include "j9porterror.h" #include "portnls.h" @@ -38,134 +38,8 @@ #include #endif /* defined(WIN32) */ -/* defines for the CPUID instruction */ -#define CPUID_VENDOR_INFO 0 -#define CPUID_FAMILY_INFO 1 -#define CPUID_STRUCTURED_EXTENDED_FEATURE_INFO 7 - -#define CPUID_VENDOR_INTEL "GenuineIntel" -#define CPUID_VENDOR_AMD "AuthenticAMD" -#define CPUID_VENDOR_LENGTH 12 - -#define CPUID_SIGNATURE_FAMILY 0x00000F00 -#define CPUID_SIGNATURE_MODEL 0x000000F0 -#define CPUID_SIGNATURE_EXTENDEDMODEL 0x000F0000 - -#define CPUID_SIGNATURE_FAMILY_SHIFT 8 -#define CPUID_SIGNATURE_MODEL_SHIFT 4 -#define CPUID_SIGNATURE_EXTENDEDMODEL_SHIFT 12 - -#define CPUID_FAMILYCODE_INTELPENTIUM 0x05 -#define CPUID_FAMILYCODE_INTELCORE 0x06 -#define CPUID_FAMILYCODE_INTELPENTIUM4 0x0F - -#define CPUID_MODELCODE_INTELHASWELL 0x3A -#define CPUID_MODELCODE_SANDYBRIDGE 0x2A -#define CPUID_MODELCODE_INTELWESTMERE 0x25 -#define CPUID_MODELCODE_INTELNEHALEM 0x1E -#define CPUID_MODELCODE_INTELCORE2 0x0F - -#define CPUID_FAMILYCODE_AMDKSERIES 0x05 -#define CPUID_FAMILYCODE_AMDATHLON 0x06 -#define CPUID_FAMILYCODE_AMDOPTERON 0x0F - -#define CPUID_MODELCODE_AMDK5 0x04 /** - * @internal - * Populates J9ProcessorDesc *desc on Windows and Linux (x86) - * - * @param[in] desc pointer to the struct that will contain the CPU type and features. - * - * @return 0 on success, -1 on failure - */ -intptr_t -getX86Description(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc) -{ - uint32_t CPUInfo[4] = {0}; - char vendor[12]; - uint32_t familyCode = 0; - uint32_t processorSignature = 0; - - desc->processor = PROCESSOR_X86_UNKNOWN; - - /* vendor */ - getX86CPUID(CPUID_VENDOR_INFO, CPUInfo); - memcpy(vendor + 0, &CPUInfo[1], sizeof(uint32_t)); - memcpy(vendor + 4, &CPUInfo[3], sizeof(uint32_t)); - memcpy(vendor + 8, &CPUInfo[2], sizeof(uint32_t)); - - /* family and model */ - getX86CPUID(CPUID_FAMILY_INFO, CPUInfo); - processorSignature = CPUInfo[0]; - familyCode = (processorSignature & CPUID_SIGNATURE_FAMILY) >> CPUID_SIGNATURE_FAMILY_SHIFT; - if (0 == strncmp(vendor, CPUID_VENDOR_INTEL, CPUID_VENDOR_LENGTH)) { - switch (familyCode) { - case CPUID_FAMILYCODE_INTELPENTIUM: - desc->processor = PROCESSOR_X86_INTELPENTIUM; - break; - case CPUID_FAMILYCODE_INTELCORE: - { - uint32_t modelCode = (processorSignature & CPUID_SIGNATURE_MODEL) >> CPUID_SIGNATURE_MODEL_SHIFT; - uint32_t extendedModelCode = (processorSignature & CPUID_SIGNATURE_EXTENDEDMODEL) >> CPUID_SIGNATURE_EXTENDEDMODEL_SHIFT; - uint32_t totalModelCode = modelCode + extendedModelCode; - - if (totalModelCode > CPUID_MODELCODE_INTELHASWELL) { - desc->processor = PROCESSOR_X86_INTELHASWELL; - } else if (totalModelCode >= CPUID_MODELCODE_SANDYBRIDGE) { - desc->processor = PROCESSOR_X86_INTELSANDYBRIDGE; - } else if (totalModelCode >= CPUID_MODELCODE_INTELWESTMERE) { - desc->processor = PROCESSOR_X86_INTELWESTMERE; - } else if (totalModelCode >= CPUID_MODELCODE_INTELNEHALEM) { - desc->processor = PROCESSOR_X86_INTELNEHALEM; - } else if (totalModelCode == CPUID_MODELCODE_INTELCORE2) { - desc->processor = PROCESSOR_X86_INTELCORE2; - } else { - desc->processor = PROCESSOR_X86_INTELP6; - } - break; - } - case CPUID_FAMILYCODE_INTELPENTIUM4: - desc->processor = PROCESSOR_X86_INTELPENTIUM4; - break; - } - } else if (0 == strncmp(vendor, CPUID_VENDOR_AMD, CPUID_VENDOR_LENGTH)) { - switch (familyCode) { - case CPUID_FAMILYCODE_AMDKSERIES: - { - uint32_t modelCode = (processorSignature & CPUID_SIGNATURE_FAMILY) >> CPUID_SIGNATURE_MODEL_SHIFT; - if (modelCode < CPUID_MODELCODE_AMDK5) { - desc->processor = PROCESSOR_X86_AMDK5; - } - desc->processor = PROCESSOR_X86_AMDK6; - break; - } - case CPUID_FAMILYCODE_AMDATHLON: - desc->processor = PROCESSOR_X86_AMDATHLONDURON; - break; - case CPUID_FAMILYCODE_AMDOPTERON: - desc->processor = PROCESSOR_X86_AMDOPTERON; - break; - } - } - - desc->physicalProcessor = desc->processor; - - /* features */ - desc->features[0] = CPUInfo[3]; /* Feature info flags in EDX */ - desc->features[1] = CPUInfo[2]; /* Feature info flags in ECX */ - desc->features[2] = CPUInfo[1]; /* EBX register, cache line size info in bits 8-15 */ - - /* extended features */ - getX86CPUIDext(CPUID_STRUCTURED_EXTENDED_FEATURE_INFO, 0, CPUInfo); /* 0x0 is the only valid subleaf value for this leaf */ - desc->features[3] = CPUInfo[1]; /* Structured Extended Feature Flags in EBX */ - - desc->features[4] = 0; /* reserved for future expansion */ - - return 0; -} - -/** - * Assembly code to get the register data from CPUID instruction + * Assembly code to get the register data from CPUID instruction. * This function executes the CPUID instruction based on which we can detect * if the environment is virtualized or not, and also get the Hypervisor Vendor * Name based on the same instruction. The leaf value specifies what information @@ -175,13 +49,13 @@ getX86Description(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc) * in EAX when CPUID is called. A value of 0x1 returns basic * information including feature support. * @param[out] cpuInfo Reference to the an integer array which holds the data - * of EAX,EBX,ECX and EDX registers. + * of EAX, EBX, ECX and EDX registers. * cpuInfo[0] To hold the EAX register data, value in this register at * the time of CPUID tells what information to return - * EAX=0x1,returns the processor Info and feature bits - * in EBX,ECX,EDX registers. - * EAX=0x40000000 returns the Hypervisor Vendor Names - * in the EBX,ECX,EDX registers. + * EAX = 0x1, returns the processor Info and feature bits + * in EBX, ECX, EDX registers. + * EAX = 0x40000000 returns the Hypervisor Vendor Names + * in the EBX, ECX, EDX registers. * cpuInfo[1] For EAX = 0x40000000 hold first 4 characters of the * Hypervisor Vendor String * cpuInfo[2] For EAX = 0x1, the 31st bit of ECX tells if its @@ -189,76 +63,32 @@ getX86Description(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc) * 4 characters of the Hypervisor Vendor String * cpuInfo[3] For EAX = 0x40000000 hold the last 4 characters of the * Hypervisor Vendor String - * */ void getX86CPUID(uint32_t leaf, uint32_t *cpuInfo) { cpuInfo[0] = leaf; -/* Implemented for x86 & x86_64 bit platforms */ +/* Implement for x86 & x86_64 platforms. */ #if defined(WIN32) - /* Specific CPUID instruction available in Windows */ + /* Specific CPUID instruction available on Windows. */ __cpuid(cpuInfo, cpuInfo[0]); - -#elif defined(LINUX) || defined(OSX) +#elif defined(LINUX) || defined(OSX) /* defined(WIN32) */ #if defined(J9X86) - __asm volatile - ("mov %%ebx, %%edi;" + __asm volatile( + "mov %%ebx, %%edi;" "cpuid;" "mov %%ebx, %%esi;" "mov %%edi, %%ebx;" - :"+a" (cpuInfo[0]), "=S" (cpuInfo[1]), "=c" (cpuInfo[2]), "=d" (cpuInfo[3]) - : :"edi"); - -#elif defined(J9HAMMER) - __asm volatile( - "cpuid;" - :"+a" (cpuInfo[0]), "=b" (cpuInfo[1]), "=c" (cpuInfo[2]), "=d" (cpuInfo[3]) - ); -#endif -#endif -} - -/** - * Similar to getX86CPUID() above, but with a second subleaf parameter for the - * leaves returned by the 'cpuid' instruction which are further divided into - * subleaves. - * - * @param[in] leaf Value in EAX when cpuid is called to determine what info - * is returned. - * subleaf Value in ECX when cpuid is called which is needed by some - * leafs returned in order to further specify what is returned - * @param[out] cpuInfo Reference to the an integer array which holds the data - * of EAX,EBX,ECX and EDX registers returned by cpuid. - * cpuInfo[0] holds EAX and cpuInfo[4] holds EDX. - */ -void -getX86CPUIDext(uint32_t leaf, uint32_t subleaf, uint32_t *cpuInfo) -{ - cpuInfo[0] = leaf; - cpuInfo[2] = subleaf; - -/* Implemented for x86 & x86_64 bit platforms */ -#if defined(WIN32) - /* Specific CPUID instruction available in Windows */ - __cpuidex(cpuInfo, cpuInfo[0], cpuInfo[2]); + : "+a" (cpuInfo[0]), "=S" (cpuInfo[1]), "=c" (cpuInfo[2]), "=d" (cpuInfo[3]) + : + : "edi"); -#elif defined(LINUX) || defined(OSX) -#if defined(J9X86) - __asm volatile - ("mov %%ebx, %%edi;" +#elif defined(J9HAMMER) /* defined(J9X86) */ + __asm volatile( "cpuid;" - "mov %%ebx, %%esi;" - "mov %%edi, %%ebx;" - :"+a" (cpuInfo[0]), "=S" (cpuInfo[1]), "+c" (cpuInfo[2]), "=d" (cpuInfo[3]) - : :"edi"); - -#elif defined(J9HAMMER) - __asm volatile( - "cpuid;" - :"+a" (cpuInfo[0]), "=b" (cpuInfo[1]), "+c" (cpuInfo[2]), "=d" (cpuInfo[3]) - ); -#endif -#endif + : "+a" (cpuInfo[0]), "=b" (cpuInfo[1]), "=c" (cpuInfo[2]), "=d" (cpuInfo[3]) + ); +#endif /* defined(J9X86) */ +#endif /* defined(WIN32) */ } diff --git a/runtime/port/common/j9sysinfo_helpers.h b/runtime/port/common/j9sysinfo_helpers.h index d754a9b52fb..f5dbd37771f 100644 --- a/runtime/port/common/j9sysinfo_helpers.h +++ b/runtime/port/common/j9sysinfo_helpers.h @@ -33,10 +33,4 @@ extern void getX86CPUID(uint32_t leaf, uint32_t *cpuInfo); -extern void -getX86CPUIDext(uint32_t leaf, uint32_t subleaf, uint32_t *cpuInfo); - -extern intptr_t -getX86Description(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc); - #endif /* SYSINFOHELPERS_H_ */ diff --git a/runtime/port/portpriv.h b/runtime/port/portpriv.h index 04aae78c4ae..589c116a6e1 100644 --- a/runtime/port/portpriv.h +++ b/runtime/port/portpriv.h @@ -234,10 +234,6 @@ extern J9_CFUNC void j9sysinfo_shutdown (struct J9PortLibrary *portLibrary); extern J9_CFUNC uint16_t j9sysinfo_get_classpathSeparator (struct J9PortLibrary *portLibrary ); -extern J9_CFUNC intptr_t -j9sysinfo_get_processor_description(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc); -extern J9_CFUNC BOOLEAN -j9sysinfo_processor_has_feature(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc, uint32_t feature); extern J9_CFUNC int32_t j9sysinfo_get_hw_info(struct J9PortLibrary *portLibrary, uint32_t infoType, char * buf, uint32_t bufLen); extern J9_CFUNC int32_t diff --git a/runtime/port/unix/j9sysinfo.c b/runtime/port/unix/j9sysinfo.c index 605a520a852..30d7c83415d 100644 --- a/runtime/port/unix/j9sysinfo.c +++ b/runtime/port/unix/j9sysinfo.c @@ -47,7 +47,7 @@ #include #if defined(J9OS_I5) #include "Xj9I5OSInterface.H" -#endif +#endif /* defined(J9OS_I5) */ #if !defined(J9ZOS390) #include #endif /* !defined(J9ZOS390) */ @@ -59,17 +59,18 @@ #define USER_HZ HZ #endif /* !defined(USER_HZ) && !defined(J9ZTPF) */ -#if (defined(J9X86) || defined(J9HAMMER) || defined(S390) || defined(J9ZOS390)) +#if defined(J9X86) || defined(J9HAMMER) || defined(S390) || defined(J9ZOS390) #include "j9sysinfo_helpers.h" -#endif +#endif /* defined(J9X86) || defined(J9HAMMER) || defined(S390) || defined(J9ZOS390) */ + #if defined(J9ZOS390) #include "j9csrsi.h" #endif /* defined(J9ZOS390) */ -#if (defined(LINUXPPC) || (defined(S390) && defined(LINUX) && !defined(J9ZTPF))) +#if defined(LINUXPPC) || (defined(S390) && defined(LINUX) && !defined(J9ZTPF)) #include "auxv.h" #include -#endif /* (defined(LINUXPPC) || (defined(S390) && defined(LINUX) && !defined(J9ZTPF))) */ +#endif /* defined(LINUXPPC) || (defined(S390) && defined(LINUX) && !defined(J9ZTPF)) */ #if defined(AIXPPC) #include @@ -80,42 +81,43 @@ /* Start copy from j9filetext.c */ /* __STDC_ISO_10646__ indicates that the platform wchar_t encoding is Unicode */ /* but older versions of libc fail to set the flag, even though they are Unicode */ -#if defined(__STDC_ISO_10646__) || defined (LINUX) +#if defined(__STDC_ISO_10646__) || defined(LINUX) #define J9VM_USE_MBTOWC -#else +#else /* defined(__STDC_ISO_10646__) || defined(LINUX) */ #include "omriconvhelpers.h" -#endif +#endif /* defined(__STDC_ISO_10646__) || defined(LINUX) */ /* a2e overrides nl_langinfo to return ASCII strings. We need the native EBCDIC string */ -#if defined(J9ZOS390) && defined (nl_langinfo) +#if defined(J9ZOS390) && defined(nl_langinfo) #undef nl_langinfo -#endif +#endif /* defined(J9ZOS390) && defined(nl_langinfo) */ /* End copy from j9filetext.c */ -#ifdef AIXPPC +#if defined(AIXPPC) #if defined(J9OS_I5) /* The PASE compiler does not support libperfstat.h */ -#else +#else /* defined(J9OS_I5) */ #include -#endif +#endif /* defined(J9OS_I5) */ + #include /* j9sysinfo_get_number_CPUs_by_type */ #include #include -#endif +#endif /* defined(AIXPPC) */ -#ifdef RS6000 +#if defined(RS6000) #include #include #include -#if defined( OMR_ENV_DATA64 ) +#if defined(OMR_ENV_DATA64) #define LIBC_NAME "/usr/lib/libc.a(shr_64.o)" -#else +#else /* defined(OMR_ENV_DATA64) */ #define LIBC_NAME "/usr/lib/libc.a(shr.o)" -#endif +#endif /* defined(OMR_ENV_DATA64) */ /* ********** These definitions were copied from sys/dr.h in AIX 5.3, because this functionality does not @@ -165,7 +167,6 @@ typedef struct lpar_info_format2_t { } lpar_info_format2_t; - /* ********** These definitions were copied from sys/dr.h in AIX 6.1, because this functionality does not exist on AIX5.2. The code that uses these definitions does a runtime lookup to see if the @@ -190,8 +191,7 @@ typedef struct wpar_info_format_t { char pad1[32]; /* Reserved for future use */ } wpar_info_format_t; - -#endif +#endif /* defined(RS6000) */ #if defined(LINUX) && !defined(J9ZTPF) #include @@ -213,89 +213,20 @@ typedef struct wpar_info_format_t { #if !defined(PATH_MAX) /* This is a somewhat arbitrarily selected fixed buffer size. */ #define PATH_MAX 1024 -#endif -#endif +#endif /* !defined(PATH_MAX) */ +#endif /* defined(J9ZOS390) */ #define JIFFIES 100 #define USECS_PER_SEC 1000000 #define TICKS_TO_USEC ((uint64_t)(USECS_PER_SEC/JIFFIES)) -static int32_t getCacheSize(J9PortLibrary *portLibrary, const int32_t cpu, const int32_t level, - const int32_t cacheType, const J9CacheQueryCommand query); - -#if defined(LINUXPPC) -static intptr_t getLinuxPPCDescription(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc); - -#if !defined(AT_HWCAP2) -#define AT_HWCAP2 26 /* needed until glibc 2.17 */ -#endif /* !defined(AT_HWCAP2) */ - -#elif defined(AIXPPC) -static intptr_t getAIXPPCDescription(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc); - -#if !defined(__power_8) -#define POWER_8 0x10000 /* Power 8 class CPU */ -#define __power_8() (_system_configuration.implementation == POWER_8) -#if !defined(J9OS_I5_V6R1) -#define PPI8_1 0x4B -#define PPI8_2 0x4D -#define __phy_proc_imp_8() (_system_configuration.phys_implementation == PPI8_1 || _system_configuration.phys_implementation == PPI8_2) -#endif /* !defined(J9OS_I5_V6R1) */ -#endif /* !defined(__power_8) */ - -#if !defined(__power_9) -#define POWER_9 0x20000 /* Power 9 class CPU */ -#define __power_9() (_system_configuration.implementation == POWER_9) -#if defined(J9OS_I5) && !defined(J9OS_I5_V6R1) -#define PPI9 0x4E -#define __phy_proc_imp_9() (_system_configuration.phys_implementation == PPI9) -#endif /* defined(J9OS_I5) && !defined(J9OS_I5_V6R1) */ -#endif /* !defined(__power_9) */ - -#if !defined(__power_10) -#define POWER_10 0x40000 /* Power 10 class CPU */ -#define __power_10() (_system_configuration.implementation == POWER_10) -#endif /* !defined(__power_10) */ - -#if defined(J9OS_I5_V6R1) /* vmx_version id only available since TL4 */ -#define __power_vsx() (_system_configuration.vmx_version > 1) -#endif -#if !defined(J9OS_I5_V7R2) && !defined(J9OS_I5_V6R1) -/* both i 7.1 and i 7.2 do not support this function */ -#if !defined(SC_TM_VER) -#define SC_TM_VER 59 -#endif /* !defined(SC_TM_VER) */ - -#if !defined(__power_tm) -#define __power_tm() ((long)getsystemcfg(SC_TM_VER) > 0) /* taken from AIX 7.1 sys/systemcfg.h */ -#endif /* !defined(__power_tm) */ -#endif /* !defined(J9OS_I5_V7R2) && !defined(J9OS_I5_V6R1) */ - -#elif (defined(S390) || defined(J9ZOS390) || defined(J9ZTPF)) -static BOOLEAN testSTFLE(struct J9PortLibrary *portLibrary, uint64_t stfleBit); -static intptr_t getS390Description(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc); -#endif /* defined(S390) || defined(J9ZOS390) || defined(J9ZTPF) */ - -#if defined(RISCV64) -static intptr_t getRISCV64Description(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc); -#endif /* defined(RISCV64) */ - -#if defined(J9AARCH64) -static intptr_t getAArch64Description(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc); -#endif /* defined(J9AARCH64) */ - -#if (defined(LINUXPPC) || defined(AIXPPC)) -static J9ProcessorArchitecture mapPPCProcessor(const char *processorName); -static void setFeature(J9ProcessorDesc *desc, uint32_t feature); -#endif /* (defined(LINUXPPC) || defined(AIXPPC)) */ - static int32_t getCacheLevels(struct J9PortLibrary *portLibrary, const int32_t cpu); static int32_t getCacheTypes(struct J9PortLibrary *portLibrary, const int32_t cpu, const int32_t level); static int32_t getCacheSize(struct J9PortLibrary *portLibrary, const int32_t cpu, const int32_t level, const int32_t cacheType, const J9CacheQueryCommand query); uint16_t -j9sysinfo_get_classpathSeparator(struct J9PortLibrary *portLibrary ) +j9sysinfo_get_classpathSeparator(struct J9PortLibrary *portLibrary) { return ':'; } @@ -308,16 +239,16 @@ j9sysinfo_DLPAR_enabled(struct J9PortLibrary *portLibrary) /* variables for use with WPAR Mobility query */ wpar_info_format_t info; int rc = -1; - uintptr_t handle; + uintptr_t handle = 0; int (*func)(int command, void *buffer, size_t bufsize); - if (getenv( "NO_LPAR_RECONFIGURATION" ) == NULL) { + if (NULL == getenv("NO_LPAR_RECONFIGURATION")) { struct getlpar_info lpar_info; - char local_lpar_name; + char local_lpar_name = '\0'; lpar_info.lpar_flags = 0; lpar_info.lpar_namesz = 0; lpar_info.lpar_name = &local_lpar_name; - if (sysconfig(SYS_GETLPAR_INFO, &lpar_info, sizeof(struct getlpar_info)) == 0) { + if (0 == sysconfig(SYS_GETLPAR_INFO, &lpar_info, sizeof(lpar_info))) { if ((lpar_info.lpar_flags & LPAR_ENABLED) && __DR_CPU_ADD()) { return TRUE; } @@ -329,7 +260,7 @@ j9sysinfo_DLPAR_enabled(struct J9PortLibrary *portLibrary) /* look for lpar_get_info in libc */ if (0 == omrsl_open_shared_library(LIBC_NAME, &handle, 0)) { if (0 == omrsl_lookup_name(handle, "lpar_get_info", (uintptr_t *)&func, "IIPi")) { - rc = func( WPAR_INFO_FORMAT, &info, sizeof( info )); + rc = func(WPAR_INFO_FORMAT, &info, sizeof(info)); } omrsl_close_shared_library(handle); } @@ -340,11 +271,10 @@ j9sysinfo_DLPAR_enabled(struct J9PortLibrary *portLibrary) return TRUE; } } -#endif +#endif /* defined(RS6000) && !defined(J9OS_I5) */ return FALSE; } - uintptr_t j9sysinfo_weak_memory_consistency(struct J9PortLibrary *portLibrary) { @@ -354,62 +284,60 @@ j9sysinfo_weak_memory_consistency(struct J9PortLibrary *portLibrary) void j9sysinfo_shutdown(struct J9PortLibrary *portLibrary) { -#if (defined(S390) || defined(J9ZOS390)) +#if defined(S390) || defined(J9ZOS390) PPG_stfleCache.lastDoubleWord = -1; #endif } - int32_t j9sysinfo_startup(struct J9PortLibrary *portLibrary) { -#if (defined(S390) || defined(J9ZOS390)) +#if defined(S390) || defined(J9ZOS390) PPG_stfleCache.lastDoubleWord = -1; -#endif -#if !(defined(RS6000) || defined (LINUXPPC) || defined (PPC) || defined(S390) || defined(J9ZOS390)) +#elif !(defined(RS6000) || defined(LINUXPPC) || defined(PPC)) /* defined(S390) || defined(J9ZOS390) */ PPG_sysL1DCacheLineSize = -1; -#endif +#endif /* defined(S390) || defined(J9ZOS390) */ return 0; } uintptr_t j9sysinfo_DLPAR_max_CPUs(struct J9PortLibrary *portLibrary) { -#ifdef RS6000 +#if defined(RS6000) /* Ensure that when DLAR or mobility feature of WPAR is enabled that we return at least 2 CPUs for the max. * Why 2? * On a DLPAR system the max_ncpus will in fact be correct. However, on a WPAR system there * is no way to tell how many CPUs there could be on the system we will be going to as that * system may not even exist yet. So we choose 2 to make sure that any users of this function * understand that they have the potential of eventually being in an SMP environment. We could - * return 10 to accomplish the same thing, but 2 was the agreed upon value. */ + * return 10 to accomplish the same thing, but 2 was the agreed upon value. + */ if (_system_configuration.max_ncpus > 1) { return _system_configuration.max_ncpus; - } else if(portLibrary->sysinfo_DLPAR_enabled(portLibrary)) { + } else if (portLibrary->sysinfo_DLPAR_enabled(portLibrary)) { return 2; } return _system_configuration.max_ncpus; -#else +#else /* defined(RS6000) */ OMRPORT_ACCESS_FROM_J9PORT(portLibrary); return omrsysinfo_get_number_CPUs_by_type(J9PORT_CPU_ONLINE); -#endif +#endif /* defined(RS6000) */ } uintptr_t j9sysinfo_get_processing_capacity(struct J9PortLibrary *portLibrary) { OMRPORT_ACCESS_FROM_J9PORT(portLibrary); -#if defined( RS6000 ) - +#if defined(RS6000) lpar_info_format2_t info; int rc = -1; - uintptr_t handle; + uintptr_t handle = 0; int (*func)(int command, void *buffer, size_t bufsize); #if defined(J9OS_I5) /* Temp code due to unsupported syscall lpar_get_info for J9OS_I5 */ return Xj9GetEntitledProcessorCapacity(); -#else +#else /* defined(J9OS_I5) */ /* look for lpar_get_info in libc */ if (0 == omrsl_open_shared_library(LIBC_NAME, &handle, 0)) { if (0 == omrsl_lookup_name(handle, "lpar_get_info", (uintptr_t *)&func, "IIPi")) { @@ -424,859 +352,10 @@ j9sysinfo_get_processing_capacity(struct J9PortLibrary *portLibrary) } return info.entitled_capacity; -#endif -#else +#endif /* defined(J9OS_I5) */ +#else /* defined(RS6000) */ return omrsysinfo_get_number_CPUs_by_type(J9PORT_CPU_ONLINE) * 100; -#endif -} - -intptr_t -j9sysinfo_get_processor_description(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc) -{ - intptr_t rc = -1; - Trc_PRT_sysinfo_get_processor_description_Entered(desc); - - if (NULL != desc) { - memset(desc, 0, sizeof(J9ProcessorDesc)); - -#if (defined(J9X86) || defined(J9HAMMER)) - rc = getX86Description(portLibrary, desc); -#elif defined(LINUXPPC) - rc = getLinuxPPCDescription(portLibrary, desc); -#elif defined(AIXPPC) - rc = getAIXPPCDescription(portLibrary, desc); -#elif (defined(S390) || defined(J9ZOS390)) - rc = getS390Description(portLibrary, desc); -#elif defined(RISCV64) - rc = getRISCV64Description(portLibrary, desc); -#elif defined(J9AARCH64) - rc = getAArch64Description(portLibrary, desc); -#endif - } - - Trc_PRT_sysinfo_get_processor_description_Exit(rc); - return rc; -} - -/** - * @internal - * Helper to set appropriate feature field in a J9ProcessorDesc struct. - * - * @param[in] desc pointer to the struct that contains the CPU type and features. - * @param[in] feature to set - * - */ -static void -setFeature(J9ProcessorDesc *desc, uint32_t feature) -{ - if ((NULL != desc) - && (feature < (J9PORT_SYSINFO_FEATURES_SIZE * 32)) - ) { - uint32_t featureIndex = feature / 32; - uint32_t featureShift = feature % 32; - - desc->features[featureIndex] = (desc->features[featureIndex] | (1 << (featureShift))); - } -} - -#if defined(LINUXPPC) -/** - * @internal - * Populates J9ProcessorDesc *desc on Linux PPC - * - * @param[in] desc pointer to the struct that will contain the CPU type and features. - * - * @return 0 on success, -1 on failure - */ -static intptr_t -getLinuxPPCDescription(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc) -{ - char* platform = NULL; - char* base_platform = NULL; - - /* initialize auxv prior to querying the auxv */ - if (prefetch_auxv()) { -_error: - desc->processor = PROCESSOR_PPC_UNKNOWN; - desc->physicalProcessor = PROCESSOR_PPC_UNKNOWN; - desc->features[0] = 0; - desc->features[1] = 0; - return -1; - } - - /* Linux PPC processor */ - platform = (char *) query_auxv(AT_PLATFORM); - if ((NULL == platform) || (((char *) -1) == platform)) { - goto _error; - } - desc->processor = mapPPCProcessor(platform); - - /* Linux PPC physical processor */ - base_platform = (char *) query_auxv(AT_BASE_PLATFORM); - if ((NULL == base_platform) || (((char *) -1) == base_platform)) { - /* AT_PLATFORM is known from call above. Default BASE to unknown */ - desc->physicalProcessor = PROCESSOR_PPC_UNKNOWN; - } else { - desc->physicalProcessor = mapPPCProcessor(base_platform); - } - - /* Linux PPC features: - * Can't error check these calls as both 0 & -1 are valid - * bit fields that could be returned by this query. - */ - desc->features[0] = query_auxv(AT_HWCAP); - desc->features[1] = query_auxv(AT_HWCAP2); - - return 0; -} - -/** - * @internal - * Maps a PPC processor string to the J9ProcessorArchitecture enum. - * - * @param[in] processorName - * - * @return A J9ProcessorArchitecture PROCESSOR_PPC_* found otherwise PROCESSOR_PPC_UNKNOWN. - */ -static J9ProcessorArchitecture -mapPPCProcessor(const char *processorName) -{ - J9ProcessorArchitecture rc = PROCESSOR_PPC_UNKNOWN; - - if (0 == strncasecmp(processorName, "ppc403", 6)) { - rc = PROCESSOR_PPC_PWR403; - } else if (0 == strncasecmp(processorName, "ppc405", 6)) { - rc = PROCESSOR_PPC_PWR405; - } else if (0 == strncasecmp(processorName, "ppc440gp", 8)) { - rc = PROCESSOR_PPC_PWR440; - } else if (0 == strncasecmp(processorName, "ppc601", 6)) { - rc = PROCESSOR_PPC_PWR601; - } else if (0 == strncasecmp(processorName, "ppc603", 6)) { - rc = PROCESSOR_PPC_PWR603; - } else if (0 == strncasecmp(processorName, "ppc604", 6)) { - rc = PROCESSOR_PPC_PWR604; - } else if (0 == strncasecmp(processorName, "ppc7400", 7)) { - rc = PROCESSOR_PPC_PWR603; - } else if (0 == strncasecmp(processorName, "ppc750", 6)) { - rc = PROCESSOR_PPC_7XX; - } else if (0 == strncasecmp(processorName, "rs64", 4)) { - rc = PROCESSOR_PPC_PULSAR; - } else if (0 == strncasecmp(processorName, "ppc970", 6)) { - rc = PROCESSOR_PPC_GP; - } else if (0 == strncasecmp(processorName, "power3", 6)) { - rc = PROCESSOR_PPC_PWR630; - } else if (0 == strncasecmp(processorName, "power4", 6)) { - rc = PROCESSOR_PPC_GP; - } else if (0 == strncasecmp(processorName, "power5", 6)) { - rc = PROCESSOR_PPC_GR; - } else if (0 == strncasecmp(processorName, "power6", 6)) { - rc = PROCESSOR_PPC_P6; - } else if (0 == strncasecmp(processorName, "power7", 6)) { - rc = PROCESSOR_PPC_P7; - } else if (0 == strncasecmp(processorName, "power8", 6)) { - rc = PROCESSOR_PPC_P8; - } else if (0 == strncasecmp(processorName, "power9", 6)) { - rc = PROCESSOR_PPC_P9; - } else if (0 == strncasecmp(processorName, "power10", 7)) { - rc = PROCESSOR_PPC_P10; - } - - return rc; -} -#endif /* defined(LINUXPPC) */ - -#if defined(AIXPPC) -/** - * @internal - * Populates J9ProcessorDesc *desc on AIX - * - * @param[in] desc pointer to the struct that will contain the CPU type and features. - * - * @return 0 on success, -1 on failure - */ -static intptr_t -getAIXPPCDescription(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc) -{ - /* AIX processor */ - if (__power_rs1() || __power_rsc()) { - desc->processor = PROCESSOR_PPC_RIOS1; - } else if (__power_rs2()) { - desc->processor = PROCESSOR_PPC_RIOS2; - } else if (__power_601()) { - desc->processor = PROCESSOR_PPC_PWR601; - } else if (__power_603()) { - desc->processor = PROCESSOR_PPC_PWR603; - } else if (__power_604()) { - desc->processor = PROCESSOR_PPC_PWR604; - } else if (__power_620()) { - desc->processor = PROCESSOR_PPC_PWR620; - } else if (__power_630()) { - desc->processor = PROCESSOR_PPC_PWR630; - } else if (__power_A35()) { - desc->processor = PROCESSOR_PPC_NSTAR; - } else if (__power_RS64II()) { - desc->processor = PROCESSOR_PPC_NSTAR; - } else if (__power_RS64III()) { - desc->processor = PROCESSOR_PPC_PULSAR; - } else if (__power_4()) { - desc->processor = PROCESSOR_PPC_GP; - } else if (__power_5()) { - desc->processor = PROCESSOR_PPC_GR; - } else if (__power_6()) { - desc->processor = PROCESSOR_PPC_P6; - } else if (__power_7()) { - desc->processor = PROCESSOR_PPC_P7; - } else if (__power_8()) { - desc->processor = PROCESSOR_PPC_P8; - } else if (__power_9()) { - desc->processor = PROCESSOR_PPC_P9; - } else if (__power_10()) { - desc->processor = PROCESSOR_PPC_P10; - } else { - desc->processor = PROCESSOR_PPC_UNKNOWN; - } -#if !defined(J9OS_I5_V6R1) - /* AIX physical processor */ - if (__phy_proc_imp_4()) { - desc->physicalProcessor = PROCESSOR_PPC_GP; - } else if (__phy_proc_imp_5()) { - desc->physicalProcessor = PROCESSOR_PPC_GR; - } else if (__phy_proc_imp_6()) { - desc->physicalProcessor = PROCESSOR_PPC_P6; - } else if (__phy_proc_imp_7()) { - desc->physicalProcessor = PROCESSOR_PPC_P7; - } else if (__phy_proc_imp_8()) { - desc->physicalProcessor = PROCESSOR_PPC_P8; - } -#if defined(J9OS_I5) - else if (__phy_proc_imp_9()) { - desc->physicalProcessor = PROCESSOR_PPC_P9; - } -#endif - else { - desc->physicalProcessor = desc->processor; - } -#else - desc->physicalProcessor = desc->processor; -#endif /* !defined(J9OS_I5_V6R1) */ - /* AIX Features */ - if (__power_64()) { - setFeature(desc, J9PORT_PPC_FEATURE_64); - } - if (__power_vmx()) { - setFeature(desc, J9PORT_PPC_FEATURE_HAS_ALTIVEC); - } - if (__power_dfp()) { - setFeature(desc, J9PORT_PPC_FEATURE_HAS_DFP); - } - if (__power_vsx()) { - setFeature(desc, J9PORT_PPC_FEATURE_HAS_VSX); - } -#if !defined(J9OS_I5_V6R1) - if (__phy_proc_imp_6()) { - setFeature(desc, J9PORT_PPC_FEATURE_ARCH_2_05); - } - if (__phy_proc_imp_4()) { - setFeature(desc, J9PORT_PPC_FEATURE_POWER4); - } -#endif /* !defined(J9OS_I5_V6R1) */ -#if !defined(J9OS_I5_V7R2) && !defined(J9OS_I5_V6R1) - if (__power_tm()) { - setFeature(desc, J9PORT_PPC_FEATURE_HTM); - } -#endif /* !defined(J9OS_I5_V7R2) && !defined(J9OS_I5_V6R1) */ - - return 0; -} -#endif /* defined(AIXPPC) */ - - -#if (defined(S390) || defined(J9ZOS390)) - -#define LAST_DOUBLE_WORD 2 -/** - * @internal - * Check if a specific bit is set from STFLE instruction on z/OS and zLinux. - * STORE FACILITY LIST EXTENDED stores a variable number of doublewords containing facility bits. - * see z/Architecture Principles of Operation 4-69 - * - * @param[in] stfleBit bit to check - * - * @return TRUE if bit is 1, FALSE otherwise. - */ -static BOOLEAN -testSTFLE(struct J9PortLibrary *portLibrary, uint64_t stfleBit) -{ - BOOLEAN rc = FALSE; - - STFLEFacilities *mem = &(PPG_stfleCache.facilities); - uintptr_t *stfleRead = &(PPG_stfleCache.lastDoubleWord); - - /* If it is the first time, read stfle and cache it */ - if (-1 == *stfleRead) { - *stfleRead = getstfle(LAST_DOUBLE_WORD, (uint64_t*)mem); - } - - if (stfleBit < 64 && *stfleRead >= 0) { - rc = (0 != (mem->dw1 & ((J9CONST_U64(1)) << (63 - stfleBit)))); - } else if (stfleBit < 128 && *stfleRead >= 1) { - rc = (0 != (mem->dw2 & ((J9CONST_U64(1)) << (127 - stfleBit)))); - } else if (stfleBit < 192 && *stfleRead >= 2) { - rc = (0 != (mem->dw3 & ((J9CONST_U64(1)) << (191 - stfleBit)))); - } - - return rc; -} - -#ifdef J9ZOS390 -#ifdef _LP64 -typedef struct pcb_t -{ - char pcbeye[8]; /* pcbeye = "CEEPCB" */ - char dummy[336]; /* Ignore the rest to get to flag6 field */ - unsigned char ceepcb_flags6; -} pcb_t; -typedef struct ceecaa_t -{ - char dummy[912]; /* pcb is at offset 912 in 64bit */ - pcb_t *pcb_addr; -} ceecaa_t; -#else -typedef struct pcb_t -{ - char pcbeye[8]; /* pcbeye = "CEEPCB" */ - char dummy[76]; /* Ignore the rest to get to flag6 field */ - unsigned char ceepcb_flags6; -} pcb_t; -typedef struct ceecaa_t -{ - char dummy[756]; /* pcb is at offset 756 in 32bit */ - pcb_t *pcb_addr; -} ceecaa_t; -#endif /* ifdef _LP64 */ - -/** @internal - * Check if z/OS supports the Vector Extension Facility (SIMD) by checking whether both the OS and LE support vector - * registers. We use the CVTVEF (0x80) bit in the CVT structure for the OS check and bit 0x08 of CEEPCB_FLAG6 field in - * the PCB for the LE check. - * - * @return TRUE if VEF is supported; FALSE otherwise. - */ -static BOOLEAN -getS390zOS_supportsVectorExtensionFacility(void) -{ - /* FLCCVT is an ADDRESS off the PSA structure - * https://www.ibm.com/support/knowledgecenter/en/SSLTBW_2.3.0/com.ibm.zos.v2r3.iead300/PSA-map.htm */ - uint8_t* CVT = (uint8_t*)(*(uint32_t*)0x10); - - /* CVTFLAG5 is a BITSTRING off the CVT structure containing the CVTVEF (0x80) bit - * https://www.ibm.com/support/knowledgecenter/en/SSLTBW_2.3.0/com.ibm.zos.v2r3.iead100/CVT-map.htm */ - uint8_t CVTFLAG5 = *(CVT + 0x0F4); - - ceecaa_t* CAA = (ceecaa_t *)_gtca(); - - if (J9_ARE_ALL_BITS_SET(CVTFLAG5, 0x80)) { - if (NULL != CAA) { - return J9_ARE_ALL_BITS_SET(CAA->pcb_addr->ceepcb_flags6, 0x08); - } - } - - return FALSE; -} - -/** @internal - * Check if z/OS supports the Transactional Execution Facility (TX). We use the CVTTX (0x08) and CVTTXC (0x04) bits in - * the CVT structure for the OS check. - * - * @return TRUE if TX is supported; FALSE otherwise. - */ -static BOOLEAN -getS390zOS_supportsTransactionalExecutionFacility(void) -{ - /* FLCCVT is an ADDRESS off the PSA structure - * https://www.ibm.com/support/knowledgecenter/en/SSLTBW_2.3.0/com.ibm.zos.v2r3.iead300/PSA-map.htm */ - uint8_t* CVT = (uint8_t*)(*(uint32_t*)0x10); - - /* CVTFLAG4 is a BITSTRING off the CVT structure containing the CVTTX (0x08), CVTTXC (0x04), and CVTRI (0x02) bits - * https://www.ibm.com/support/knowledgecenter/en/SSLTBW_2.3.0/com.ibm.zos.v2r3.iead100/CVT-map.htm */ - uint8_t CVTFLAG4 = *(CVT + 0x17B); - - /* Note we check for both constrained and non-constrained transaction support */ - return J9_ARE_ALL_BITS_SET(CVTFLAG4, 0x0C); -} - -/** @internal - * Check if z/OS supports the Runtime Instrumentation Facility (RI). We use the CVTRI (0x02) bit in the CVT structure - * for the OS check. - * - * @return TRUE if RI is supported; FALSE otherwise. - */ -static BOOLEAN -getS390zOS_supportsRuntimeInstrumentationFacility(void) -{ - /* FLCCVT is an ADDRESS off the PSA structure - * https://www.ibm.com/support/knowledgecenter/en/SSLTBW_2.3.0/com.ibm.zos.v2r3.iead300/PSA-map.htm */ - uint8_t* CVT = (uint8_t*)(*(uint32_t*)0x10); - - /* CVTFLAG4 is a BITSTRING off the CVT structure containing the CVTTX (0x08), CVTTXC (0x04), and CVTRI (0x02) bits - * https://www.ibm.com/support/knowledgecenter/en/SSLTBW_2.3.0/com.ibm.zos.v2r3.iead100/CVT-map.htm */ - uint8_t CVTFLAG4 = *(CVT + 0x17B); - - return J9_ARE_ALL_BITS_SET(CVTFLAG4, 0x02); -} - -/** @internal - * Check if z/OS supports the Guarded Storage Facility (GS). We use the CVTGSF (0x01) bit in the CVT structure - * for the OS check. - * - * @return TRUE if GS is supported; FALSE otherwise. - */ -static BOOLEAN -getS390zOS_supportsGuardedStorageFacility(void) -{ - /* FLCCVT is an ADDRESS off the PSA structure - * https://www.ibm.com/support/knowledgecenter/en/SSLTBW_2.3.0/com.ibm.zos.v2r3.iead300/PSA-map.htm */ - uint8_t* CVT = (uint8_t*)(*(uint32_t*)0x10); - - /* CVTFLAG3 is a BITSTRING off the CVT structure containing the CVTGSF (0x01) bit - * https://www.ibm.com/support/knowledgecenter/en/SSLTBW_2.3.0/com.ibm.zos.v2r3.iead100/CVT-map.htm */ - uint8_t CVTFLAG3 = *(CVT + 0x17A); - - return J9_ARE_ALL_BITS_SET(CVTFLAG3, 0x01); -} -#endif /* ifdef J9ZOS390 */ - -/** - * @internal - * Populates J9ProcessorDesc *desc on z/OS and zLinux - * - * @param[in] desc pointer to the struct that will contain the CPU type and features. - * - * @return 0 on success, -1 on failure - */ -static intptr_t -getS390Description(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc) -{ -/* Check hardware and OS (z/OS only) support for GS (guarded storage), RI (runtime instrumentation) and TE (transactional memory) */ -#if defined(J9ZOS390) -#define S390_STFLE_BIT (0x80000000 >> 7) - /* s390 feature detection requires the store-facility-list-extended (STFLE) instruction which was introduced in z9 - * Location 200 is architected such that bit 7 is ON if STFLE instruction is installed */ - if (J9_ARE_NO_BITS_SET(*(int*) 200, S390_STFLE_BIT)) { - return -1; - } -#elif defined(J9ZTPF) /* defined(J9ZOS390) */ - /* - * z/TPF requires OS support for some of the Hardware Capabilities. - * Setting the auxvFeatures capabilities flag directly to mimic the query_auxv call in Linux. - */ - unsigned long auxvFeatures = J9PORT_HWCAP_S390_HIGH_GPRS|J9PORT_S390_FEATURE_ESAN3|J9PORT_HWCAP_S390_ZARCH| - J9PORT_HWCAP_S390_STFLE|J9PORT_HWCAP_S390_MSA|J9PORT_HWCAP_S390_DFP| - J9PORT_HWCAP_S390_LDISP|J9PORT_HWCAP_S390_EIMM|J9PORT_HWCAP_S390_ETF3EH; - -#elif defined(LINUX) /* defined(J9ZTPF) */ - /* Some s390 features require OS support on Linux, querying auxv for AT_HWCAP bit-mask of processor capabilities. */ - unsigned long auxvFeatures = query_auxv(AT_HWCAP); -#endif /* defined(LINUX) */ - -#if (defined(S390) && defined(LINUX)) - /* OS Support of HPAGE on Linux on Z */ - if (J9_ARE_ALL_BITS_SET(auxvFeatures, J9PORT_HWCAP_S390_HPAGE)){ - setFeature(desc, J9PORT_S390_FEATURE_HPAGE); - } -#endif /* defined(S390) && defined(LINUX) */ - - /* Miscellaneous facility detection */ - - if (testSTFLE(portLibrary, 0)) { -#if (defined(S390) && defined(LINUX)) - /* OS Support for Linux on Z */ - if (J9_ARE_ALL_BITS_SET(auxvFeatures, J9PORT_HWCAP_S390_ESAN3)) -#endif /* defined(S390) && defined(LINUX)*/ - { - setFeature(desc, J9PORT_S390_FEATURE_ESAN3); - } - } - - if (testSTFLE(portLibrary, 2)) { -#if (defined(S390) && defined(LINUX)) - /* OS Support for Linux on Z */ - if (J9_ARE_ALL_BITS_SET(auxvFeatures, J9PORT_HWCAP_S390_ZARCH)) -#endif /* defined(S390) && defined(LINUX)*/ - { - setFeature(desc, J9PORT_S390_FEATURE_ZARCH); - } - } - - if (testSTFLE(portLibrary, 7)) { -#if (defined(S390) && defined(LINUX)) - /* OS Support for Linux on Z */ - if (J9_ARE_ALL_BITS_SET(auxvFeatures, J9PORT_HWCAP_S390_STFLE)) -#endif /* defined(S390) && defined(LINUX)*/ - { - setFeature(desc, J9PORT_S390_FEATURE_STFLE); - } - } - - if (testSTFLE(portLibrary, 17)) { -#if (defined(S390) && defined(LINUX)) - /* OS Support for Linux on Z */ - if (J9_ARE_ALL_BITS_SET(auxvFeatures, J9PORT_HWCAP_S390_MSA)) -#endif /* defined(S390) && defined(LINUX)*/ - { - setFeature(desc, J9PORT_S390_FEATURE_MSA); - } - } - - if (testSTFLE(portLibrary, 42) && testSTFLE(portLibrary, 44)) { -#if (defined(S390) && defined(LINUX)) - /* OS Support for Linux on Z */ - if (J9_ARE_ALL_BITS_SET(auxvFeatures, J9PORT_HWCAP_S390_DFP)) -#endif /* defined(S390) && defined(LINUX) */ - { - setFeature(desc, J9PORT_S390_FEATURE_DFP); - } - } - - if (testSTFLE(portLibrary, 32)) { - setFeature(desc, J9PORT_S390_FEATURE_COMPARE_AND_SWAP_AND_STORE); - } - - if (testSTFLE(portLibrary, 33)) { - setFeature(desc, J9PORT_S390_FEATURE_COMPARE_AND_SWAP_AND_STORE2); - } - - if (testSTFLE(portLibrary, 35)) { - setFeature(desc, J9PORT_S390_FEATURE_EXECUTE_EXTENSIONS); - } - - if (testSTFLE(portLibrary, 41)) { - setFeature(desc, J9PORT_S390_FEATURE_FPE); - } - - if (testSTFLE(portLibrary, 49)) { - setFeature(desc, J9PORT_S390_FEATURE_MISCELLANEOUS_INSTRUCTION_EXTENSION); - } - - if (testSTFLE(portLibrary, 76)) { - setFeature(desc, J9PORT_S390_FEATURE_MSA_EXTENSION3); - } - - if (testSTFLE(portLibrary, 77)) { - setFeature(desc, J9PORT_S390_FEATURE_MSA_EXTENSION4); - } - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_MSA_EXTENSION_5)) { - setFeature(desc, J9PORT_S390_FEATURE_MSA_EXTENSION_5); - } - - /* Assume an unknown processor ID unless we determine otherwise */ - desc->processor = PROCESSOR_S390_UNKNOWN; - - /* z990 facility and processor detection */ - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_LONG_DISPLACEMENT)) { -#if (defined(S390) && defined(LINUX)) - /* OS Support for Linux on Z */ - if (J9_ARE_ALL_BITS_SET(auxvFeatures, J9PORT_HWCAP_S390_LDISP)) -#endif /* defined(S390) && defined(LINUX) */ - { - setFeature(desc, J9PORT_S390_FEATURE_LONG_DISPLACEMENT); - - desc->processor = PROCESSOR_S390_GP6; - } - } - - /* z9 facility and processor detection */ - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_EXTENDED_IMMEDIATE)) { -#if (defined(S390) && defined(LINUX)) - /* OS Support for Linux on Z */ - if (J9_ARE_ALL_BITS_SET(auxvFeatures, J9PORT_HWCAP_S390_EIMM)) -#endif /* defined(S390) && defined(LINUX) */ - { - setFeature(desc, J9PORT_S390_FEATURE_EXTENDED_IMMEDIATE); - } - } - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_EXTENDED_TRANSLATION_3)) { - setFeature(desc, J9PORT_S390_FEATURE_EXTENDED_TRANSLATION_3); - } - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_ETF3_ENHANCEMENT)) { -#if (defined(S390) && defined(LINUX)) - /* OS Support for Linux on Z */ - if (J9_ARE_ALL_BITS_SET(auxvFeatures, J9PORT_HWCAP_S390_ETF3EH)) -#endif /* defined(S390) && defined(LINUX) */ - { - setFeature(desc, J9PORT_S390_FEATURE_ETF3_ENHANCEMENT); - } - } - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_EXTENDED_IMMEDIATE) && - testSTFLE(portLibrary, J9PORT_S390_FEATURE_EXTENDED_TRANSLATION_3) && - testSTFLE(portLibrary, J9PORT_S390_FEATURE_ETF3_ENHANCEMENT)) { - desc->processor = PROCESSOR_S390_GP7; - } - - /* z10 facility and processor detection */ - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_GENERAL_INSTRUCTIONS_EXTENSIONS)) { - setFeature(desc, J9PORT_S390_FEATURE_GENERAL_INSTRUCTIONS_EXTENSIONS); - - desc->processor = PROCESSOR_S390_GP8; - } - - /* z196 facility and processor detection */ - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_HIGH_WORD)) { -#if (defined(S390) && defined(LINUX)) - /* OS Support for Linux on Z */ - if (J9_ARE_ALL_BITS_SET(auxvFeatures, J9PORT_HWCAP_S390_HIGH_GPRS)) -#endif /* defined(S390) && defined(LINUX)*/ - { - setFeature(desc, J9PORT_S390_FEATURE_HIGH_WORD); - } - - desc->processor = PROCESSOR_S390_GP9; - } - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_LOAD_STORE_ON_CONDITION_1)) { - setFeature(desc, J9PORT_S390_FEATURE_LOAD_STORE_ON_CONDITION_1); - - desc->processor = PROCESSOR_S390_GP9; - } - - /* zEC12 facility and processor detection */ - - /* TE/TX hardware support */ - if (testSTFLE(portLibrary, 50) && testSTFLE(portLibrary, 73)) { -#if defined(J9ZOS390) - if (getS390zOS_supportsTransactionalExecutionFacility()) -#elif defined(LINUX) /* LINUX S390 */ - if (J9_ARE_ALL_BITS_SET(auxvFeatures, J9PORT_HWCAP_S390_TE)) -#endif /* defined(J9ZOS390) */ - { - setFeature(desc, J9PORT_S390_FEATURE_TE); - } - } - - /* RI hardware support */ - if (testSTFLE(portLibrary, 64)) { -#if defined(J9ZOS390) - if (getS390zOS_supportsRuntimeInstrumentationFacility()) -#endif /* defined(J9ZOS390) */ - { -#if !defined(J9ZTPF) - setFeature(desc, J9PORT_S390_FEATURE_RI); -#endif /* !defined(J9ZTPF) */ - } - } - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_MISCELLANEOUS_INSTRUCTION_EXTENSION)) { - setFeature(desc, J9PORT_S390_FEATURE_MISCELLANEOUS_INSTRUCTION_EXTENSION); - - desc->processor = PROCESSOR_S390_GP10; - } - - /* z13 facility and processor detection */ - - if (testSTFLE(portLibrary, 129)) { -#if defined(J9ZOS390) - /* Vector facility requires hardware and OS support */ - if (getS390zOS_supportsVectorExtensionFacility()) -#elif defined(LINUX) /* LINUX S390 */ - /* Vector facility requires hardware and OS support */ - if (J9_ARE_ALL_BITS_SET(auxvFeatures, J9PORT_HWCAP_S390_VXRS)) -#endif - { - setFeature(desc, J9PORT_S390_FEATURE_VECTOR_FACILITY); - desc->processor = PROCESSOR_S390_GP11; - } - } - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_LOAD_STORE_ON_CONDITION_2)) { - setFeature(desc, J9PORT_S390_FEATURE_LOAD_STORE_ON_CONDITION_2); - - desc->processor = PROCESSOR_S390_GP11; - } - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_LOAD_AND_ZERO_RIGHTMOST_BYTE)) { - setFeature(desc, J9PORT_S390_FEATURE_LOAD_AND_ZERO_RIGHTMOST_BYTE); - - desc->processor = PROCESSOR_S390_GP11; - } - - /* z14 facility and processor detection */ - - /* GS hardware support */ - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_GUARDED_STORAGE)) { -#if defined(J9ZOS390) - if (getS390zOS_supportsGuardedStorageFacility()) -#elif defined(LINUX) /* defined(J9ZOS390) */ - if (J9_ARE_ALL_BITS_SET(auxvFeatures, J9PORT_HWCAP_S390_GS)) -#endif /* defined(LINUX) */ - { - setFeature(desc, J9PORT_S390_FEATURE_GUARDED_STORAGE); - - desc->processor = PROCESSOR_S390_GP12; - } - } - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_MISCELLANEOUS_INSTRUCTION_EXTENSION_2)) { - setFeature(desc, J9PORT_S390_FEATURE_MISCELLANEOUS_INSTRUCTION_EXTENSION_2); - - desc->processor = PROCESSOR_S390_GP12; - } - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_SEMAPHORE_ASSIST)) { - setFeature(desc, J9PORT_S390_FEATURE_SEMAPHORE_ASSIST); - - desc->processor = PROCESSOR_S390_GP12; - } - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_VECTOR_PACKED_DECIMAL)) { -#if defined(J9ZOS390) - /* Vector packed decimal requires hardware and OS support (for OS, checking for VEF is sufficient) */ - if (getS390zOS_supportsVectorExtensionFacility()) -#elif (defined(S390) && defined(LINUX)) /* defined(J9ZOS390) */ - /* OS Support for Linux on Z */ - if (J9_ARE_ALL_BITS_SET(auxvFeatures, J9PORT_HWCAP_S390_VXRS_BCD)) -#endif /* defined(S390) && defined(LINUX) */ - { - setFeature(desc, J9PORT_S390_FEATURE_VECTOR_PACKED_DECIMAL); - - desc->processor = PROCESSOR_S390_GP12; - } - } - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_VECTOR_FACILITY_ENHANCEMENT_1)) { -#if defined(J9ZOS390) - /* Vector facility enhancement 1 requires hardware and OS support (for OS, checking for VEF is sufficient) */ - if (getS390zOS_supportsVectorExtensionFacility()) -#elif (defined(S390) && defined(LINUX)) /* defined(J9ZOS390) */ - /* OS Support for Linux on Z */ - if (J9_ARE_ALL_BITS_SET(auxvFeatures, J9PORT_HWCAP_S390_VXRS_EXT)) -#endif /* defined(S390) && defined(LINUX) */ - { - setFeature(desc, J9PORT_S390_FEATURE_VECTOR_FACILITY_ENHANCEMENT_1); - - desc->processor = PROCESSOR_S390_GP12; - } - } - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_MSA_EXTENSION_8)) { - setFeature(desc, J9PORT_S390_FEATURE_MSA_EXTENSION_8); - - desc->processor = PROCESSOR_S390_GP12; - } - - /* z15 facility and processor detection */ - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_MISCELLANEOUS_INSTRUCTION_EXTENSION_3)) { - setFeature(desc, J9PORT_S390_FEATURE_MISCELLANEOUS_INSTRUCTION_EXTENSION_3); - - desc->processor = PROCESSOR_S390_GP13; - } - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_VECTOR_FACILITY_ENHANCEMENT_2)) { -#if defined(J9ZOS390) - if (getS390zOS_supportsVectorExtensionFacility()) -#elif defined(LINUX) && !defined(J9ZTPF) /* defined(J9ZOS390) */ - if (J9_ARE_ALL_BITS_SET(auxvFeatures, J9PORT_HWCAP_S390_VXRS)) -#endif /* defined(LINUX) && !defined(J9ZTPF) */ - { - setFeature(desc, J9PORT_S390_FEATURE_VECTOR_FACILITY_ENHANCEMENT_2); - - desc->processor = PROCESSOR_S390_GP13; - } - } - - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_VECTOR_PACKED_DECIMAL_ENHANCEMENT_FACILITY)) { -#if defined(J9ZOS390) - if (getS390zOS_supportsVectorExtensionFacility()) -#elif defined(LINUX) && !defined(J9ZTPF) /* defined(J9ZOS390) */ - if (J9_ARE_ALL_BITS_SET(auxvFeatures, J9PORT_HWCAP_S390_VXRS)) -#endif /* defined(LINUX) && !defined(J9ZTPF) */ - { - setFeature(desc, J9PORT_S390_FEATURE_VECTOR_PACKED_DECIMAL_ENHANCEMENT_FACILITY); - - desc->processor = PROCESSOR_S390_GP13; - } - } - - /* Set Side Effect Facility without setting GP12. This is because - * this GP12-only STFLE bit can also be enabled on zEC12 (GP10) - */ - if (testSTFLE(portLibrary, J9PORT_S390_FEATURE_SIDE_EFFECT_ACCESS)) { - setFeature(desc, J9PORT_S390_FEATURE_SIDE_EFFECT_ACCESS); - } - - desc->physicalProcessor = desc->processor; - - return 0; -} -#endif /* (defined(S390) || defined(J9ZOS390)) */ - -#if defined(RISCV64) -/** - * @internal - * Populates J9ProcessorDesc *desc on RISC-V - * - * @param[in] desc pointer to the struct that will contain the CPU type and features. - * - * @return 0 on success, -1 on failure - */ -static intptr_t -getRISCV64Description(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc) -{ - desc->processor = PROCESSOR_RISCV64_UNKNOWN; - desc->physicalProcessor = desc->processor; - return 0; -} -#endif /* defined(RISCV64) */ - -#if defined(J9AARCH64) -static intptr_t -getAArch64Description(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc) -{ - desc->processor = PROCESSOR_AARCH64_UNKNOWN; - desc->physicalProcessor = desc->processor; - return 0; -} -#endif /* defined(J9AARCH64) */ - -BOOLEAN -j9sysinfo_processor_has_feature(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc, uint32_t feature) -{ - BOOLEAN rc = FALSE; - Trc_PRT_sysinfo_processor_has_feature_Entered(desc, feature); - -#if defined(J9OS_I5) -#if defined(J9OS_I5_V5R4) - if ((J9PORT_PPC_FEATURE_HAS_VSX == feature) || (J9PORT_PPC_FEATURE_HAS_ALTIVEC == feature) || (J9PORT_PPC_FEATURE_HTM == feature)) { - Trc_PRT_sysinfo_processor_has_feature_Exit((UDATA)rc); - return rc; - } -#elif defined(J9OS_I5_V6R1) || defined(J9OS_I5_V7R2) - if (J9PORT_PPC_FEATURE_HTM == feature) { - Trc_PRT_sysinfo_processor_has_feature_Exit((UDATA)rc); - return rc; - } -#endif -#endif - - if ((NULL != desc) - && (feature < (J9PORT_SYSINFO_FEATURES_SIZE * 32)) - ) { - uint32_t featureIndex = feature / 32; - uint32_t featureShift = feature % 32; - - rc = J9_ARE_ALL_BITS_SET(desc->features[featureIndex], 1 << featureShift); - } - - Trc_PRT_sysinfo_processor_has_feature_Exit((uintptr_t)rc); - return rc; +#endif /* defined(RS6000) */ } int32_t @@ -1310,6 +389,7 @@ j9sysinfo_get_hw_info(struct J9PortLibrary *portLibrary, uint32_t infoType, } #define PATH_ELEMENT_LENGTH 32 + /** * Concatenate a filename onto a directory path, open the file, read it into a buffer, * null terminate the contents, and close the file. @@ -1330,8 +410,8 @@ j9sysinfo_get_hw_info(struct J9PortLibrary *portLibrary, uint32_t infoType, * @return J9PORT_ERROR_FILE_OPFAILED if the file could not be opened or read */ static int32_t -openAndReadInfo(struct J9PortLibrary *portLibrary, char* pathBuffer, size_t pathBufferLength, char* fileNameInsertionPoint, - const char* fileName, char* readBuffer, size_t readBufferLength) +openAndReadInfo(struct J9PortLibrary *portLibrary, char *pathBuffer, size_t pathBufferLength, char *fileNameInsertionPoint, + const char *fileName, char *readBuffer, size_t readBufferLength) { OMRPORT_ACCESS_FROM_J9PORT(portLibrary); intptr_t fd = -1; @@ -1359,7 +439,7 @@ openAndReadInfo(struct J9PortLibrary *portLibrary, char* pathBuffer, size_t path return status; } -#if (defined(J9X86) || defined(J9HAMMER) || defined(RISCV64)) +#if defined(J9X86) || defined(J9HAMMER) || defined(RISCV64) char const *cpuPathPattern = "/sys/devices/system/cpu/cpu%d/cache/"; char const *indexPattern = "index%d/"; @@ -1367,7 +447,8 @@ char const *indexPattern = "index%d/"; /* leave room for terminating null */ #define READ_BUFFER_SIZE 32 /* * must be large enough to hold the content of the "size", "coherency_line_size" - * "level" or "type" files */ + * "level" or "type" files + */ /** * Scan the /sys filesystem for the correct descriptor and read it. @@ -1451,7 +532,7 @@ getCacheSize(struct J9PortLibrary *portLibrary, portLibrary, pathBuffer, sizeof(pathBuffer), infoBuffer, infoFile, readBuffer, sizeof(readBuffer) ); - if (0 != status){ + if (0 != status) { result = status; break; } @@ -1570,7 +651,7 @@ getCacheLevels(struct J9PortLibrary *portLibrary, const int32_t cpu) int32_t indexCursor = 0; int32_t cpuPathLength = 0; char *indexBuffer = NULL; - BOOLEAN finish = FALSE; + BOOLEAN finish = FALSE; cpuPathLength = omrstr_printf(pathBuffer, sizeof(pathBuffer), cpuPathPattern, cpu); indexBuffer = pathBuffer+cpuPathLength; @@ -1587,10 +668,10 @@ getCacheLevels(struct J9PortLibrary *portLibrary, const int32_t cpu) portLibrary, pathBuffer, sizeof(pathBuffer), infoBuffer, "level", readBuffer, sizeof(readBuffer) ); - if (J9PORT_ERROR_FILE_OPFAILED == status){ + if (J9PORT_ERROR_FILE_OPFAILED == status) { /* came to the end of the list of cache entries. This error is expected. */ finish = TRUE; - } else if (status < 0){ /* unexpected error */ + } else if (status < 0) { /* unexpected error */ result = status; finish = TRUE; } else { @@ -1602,20 +683,19 @@ getCacheLevels(struct J9PortLibrary *portLibrary, const int32_t cpu) } while (!finish); return result; } -/* (defined(J9X86) || defined(J9HAMMER) || defined(RISCV64)) */ -#elif defined(AIXPPC) +#elif defined(AIXPPC) /* defined(J9X86) || defined(J9HAMMER) || defined(RISCV64) */ static int32_t getCacheLevels(struct J9PortLibrary *portLibrary, const int32_t cpu) { return 2; } + /* getsystemcfg() isn't supported on i 7.1 so there's no need to define the * functions `getCacheTypes` & `getCacheSize` on the i-series platforms */ #if !defined(J9OS_I5_V6R1) - static int32_t getCacheTypes(struct J9PortLibrary *portLibrary, const int32_t cpu, const int32_t level) @@ -1643,22 +723,22 @@ getCacheSize(struct J9PortLibrary *portLibrary, case 1: { /* Note: AIX has split I/D level 1 cache. Querying UCACHE is invalid. */ switch (query) { - case J9PORT_CACHEINFO_QUERY_CACHESIZE: { + case J9PORT_CACHEINFO_QUERY_CACHESIZE: if (J9_ARE_ANY_BITS_SET(cacheType, J9PORT_CACHEINFO_DCACHE)) { result = getsystemcfg(SC_L1C_DSZ); } else if (J9_ARE_ANY_BITS_SET(cacheType, J9PORT_CACHEINFO_ICACHE)) { result = getsystemcfg(SC_L1C_ISZ); } - } - break; - case J9PORT_CACHEINFO_QUERY_LINESIZE: { + break; + case J9PORT_CACHEINFO_QUERY_LINESIZE: if (J9_ARE_ANY_BITS_SET(cacheType, J9PORT_CACHEINFO_DCACHE)) { result = getsystemcfg(SC_L1C_DLS); } else if (J9_ARE_ANY_BITS_SET(cacheType, J9PORT_CACHEINFO_ICACHE)) { result = getsystemcfg(SC_L1C_ILS); } - } - default: break; + break; + default: + break; } break; } @@ -1673,19 +753,19 @@ getCacheSize(struct J9PortLibrary *portLibrary, result = getsystemcfg(SC_L1C_ILS); } } - break; - default: break; + break; + default: + break; } return result; } #endif /* defined(J9OS_I5_V6R1) */ -#endif /* defined(AIXPPC) */ +#endif /* defined(J9X86) || defined(J9HAMMER) || defined(RISCV64) */ /* * Cache information is organized as a set of "index" directories in /sys/devices/system/cpu/cpu/cache/. * In each index directory is a file containing the cache level and another file containing the cache type. */ - int32_t j9sysinfo_get_cache_info(struct J9PortLibrary *portLibrary, const J9CacheInfoQuery * query) { @@ -1700,7 +780,7 @@ j9sysinfo_get_cache_info(struct J9PortLibrary *portLibrary, const J9CacheInfoQue * class objects even if the -XX:-RestrictContended option is specified on the * command line. */ - DIR* cacheDir = opendir("/sys/devices/system/cpu/cpu0/cache"); + DIR *cacheDir = opendir("/sys/devices/system/cpu/cpu0/cache"); if (NULL != cacheDir) { closedir(cacheDir); } else { @@ -1708,7 +788,7 @@ j9sysinfo_get_cache_info(struct J9PortLibrary *portLibrary, const J9CacheInfoQue return result; } } -#endif +#endif /* defined(RISCV64) */ #if defined(OSX) OMRPORT_ACCESS_FROM_J9PORT(portLibrary); @@ -1717,14 +797,14 @@ j9sysinfo_get_cache_info(struct J9PortLibrary *portLibrary, const J9CacheInfoQue /* ignore the cache type and level, since there is only one line size on MacOS */ omrcpu_get_cache_line_size(&result); break; - case J9PORT_CACHEINFO_QUERY_CACHESIZE: /* FALLTHROUGH */ - case J9PORT_CACHEINFO_QUERY_TYPES: /* FALLTHROUGH */ - case J9PORT_CACHEINFO_QUERY_LEVELS: /* FALLTHROUGH */ + case J9PORT_CACHEINFO_QUERY_CACHESIZE: + case J9PORT_CACHEINFO_QUERY_TYPES: + case J9PORT_CACHEINFO_QUERY_LEVELS: default: result = J9PORT_ERROR_SYSINFO_NOT_SUPPORTED; break; } -#elif defined(J9OS_I5_V6R1) +#elif defined(J9OS_I5_V6R1) /* defined(OSX) */ switch (query->cmd) { case J9PORT_CACHEINFO_QUERY_LEVELS: result = getCacheLevels(portLibrary, query->cpu); @@ -1736,21 +816,21 @@ j9sysinfo_get_cache_info(struct J9PortLibrary *portLibrary, const J9CacheInfoQue result = J9PORT_ERROR_SYSINFO_NOT_SUPPORTED; break; } -#elif (defined(J9X86) || defined(J9HAMMER) || defined(AIXPPC) || defined(RISCV64)) +#elif defined(J9X86) || defined(J9HAMMER) || defined(AIXPPC) || defined(RISCV64) /* defined(J9OS_I5_V6R1) */ switch (query->cmd) { case J9PORT_CACHEINFO_QUERY_LINESIZE: case J9PORT_CACHEINFO_QUERY_CACHESIZE: result = getCacheSize(portLibrary, query->cpu, query->level, query->cacheType, query->cmd); #if defined(RISCV64) - /* The L1 data cache at "cache/index1" is set up from "/sys/devices/system/cpu/cpu1" on some Linux distro - * (e.g. Debian_riscv) rather than "/sys/devices/system/cpu/cpu0" in which "cache/index1" doesn't exist. - * Note: this is a temporary solution specific to Debian_riscv which won't be used or simply - * removed once we confirm "cpu0/cache/index1" does exist on the latest version of Debian_riscv. - */ - if (result < 0) { - result = getCacheSize(portLibrary, query->cpu + 1, query->level, query->cacheType, query->cmd); - } + /* The L1 data cache at "cache/index1" is set up from "/sys/devices/system/cpu/cpu1" on some Linux distro + * (e.g. Debian_riscv) rather than "/sys/devices/system/cpu/cpu0" in which "cache/index1" doesn't exist. + * Note: this is a temporary solution specific to Debian_riscv which won't be used or simply + * removed once we confirm "cpu0/cache/index1" does exist on the latest version of Debian_riscv. + */ + if (result < 0) { + result = getCacheSize(portLibrary, query->cpu + 1, query->level, query->cacheType, query->cmd); + } #endif /* defined(RISCV64) */ break; case J9PORT_CACHEINFO_QUERY_TYPES: @@ -1763,20 +843,21 @@ j9sysinfo_get_cache_info(struct J9PortLibrary *portLibrary, const J9CacheInfoQue result = J9PORT_ERROR_SYSINFO_NOT_SUPPORTED; break; } -#elif defined (LINUXPPC) || defined (PPC) || defined(S390) || defined(J9ZOS390) - if ((1 == query->level) && - (J9_ARE_ANY_BITS_SET(query->cacheType, J9PORT_CACHEINFO_DCACHE | J9PORT_CACHEINFO_UCACHE))) { +#elif defined(LINUXPPC) || defined(PPC) || defined(S390) || defined(J9ZOS390) /* defined(J9X86) || defined(J9HAMMER) || defined(AIXPPC) || defined(RISCV64) */ + if ((1 == query->level) + && (J9_ARE_ANY_BITS_SET(query->cacheType, J9PORT_CACHEINFO_DCACHE | J9PORT_CACHEINFO_UCACHE)) + ) { #if defined(S390) || defined(J9ZOS390) - result = 256; -#else - OMRPORT_ACCESS_FROM_J9PORT(portLibrary); - omrcpu_get_cache_line_size(&result); -#endif - } -#elif defined(LINUX) && defined(J9AARCH64) + result = 256; +#else /* defined(S390) || defined(J9ZOS390) */ + OMRPORT_ACCESS_FROM_J9PORT(portLibrary); + omrcpu_get_cache_line_size(&result); +#endif /* defined(S390) || defined(J9ZOS390) */ + } +#elif defined(LINUX) && defined(J9AARCH64) /* defined(LINUXPPC) || defined(PPC) || defined(S390) || defined(J9ZOS390) */ if ((query->cmd == J9PORT_CACHEINFO_QUERY_LINESIZE) - && (query->cacheType == J9PORT_CACHEINFO_DCACHE) - && (query->level == 1) + && (query->cacheType == J9PORT_CACHEINFO_DCACHE) + && (query->level == 1) ) { /* L1 data cache line size */ int32_t rc = (int32_t)sysconf(_SC_LEVEL1_DCACHE_LINESIZE); @@ -1791,7 +872,7 @@ j9sysinfo_get_cache_info(struct J9PortLibrary *portLibrary, const J9CacheInfoQue result = 64; } } -#endif +#endif /* defined(OSX) */ Trc_PRT_sysinfo_get_cache_info_exit(result); return result; } diff --git a/runtime/port/win32/j9sysinfo.c b/runtime/port/win32/j9sysinfo.c index 350c6a8ba20..83ae6abff39 100644 --- a/runtime/port/win32/j9sysinfo.c +++ b/runtime/port/win32/j9sysinfo.c @@ -45,7 +45,7 @@ * @return the classpathSeparator character. */ uint16_t -j9sysinfo_get_classpathSeparator(struct J9PortLibrary *portLibrary ) +j9sysinfo_get_classpathSeparator(struct J9PortLibrary *portLibrary) { return ';'; } @@ -144,40 +144,6 @@ j9sysinfo_get_processing_capacity(struct J9PortLibrary *portLibrary) return omrsysinfo_get_number_CPUs_by_type(J9PORT_CPU_ONLINE) * 100; } -intptr_t -j9sysinfo_get_processor_description(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc) -{ - intptr_t rc = -1; - Trc_PRT_sysinfo_get_processor_description_Entered(desc); - - if (NULL != desc) { - memset(desc, 0, sizeof(J9ProcessorDesc)); - rc = getX86Description(portLibrary, desc); - } - - Trc_PRT_sysinfo_get_processor_description_Exit(rc); - return rc; -} - -BOOLEAN -j9sysinfo_processor_has_feature(struct J9PortLibrary *portLibrary, J9ProcessorDesc *desc, uint32_t feature) -{ - BOOLEAN rc = FALSE; - Trc_PRT_sysinfo_processor_has_feature_Entered(desc, feature); - - if ((NULL != desc) - && (feature < (J9PORT_SYSINFO_FEATURES_SIZE * 32)) - ) { - uint32_t featureIndex = feature / 32; - uint32_t featureShift = feature % 32; - - rc = J9_ARE_ALL_BITS_SET(desc->features[featureIndex], 1 << featureShift); - } - - Trc_PRT_sysinfo_processor_has_feature_Exit((uintptr_t)rc); - return rc; -} - int32_t j9sysinfo_get_hw_info(struct J9PortLibrary *portLibrary, uint32_t infoType, char * buf, uint32_t bufLen) @@ -195,36 +161,37 @@ j9sysinfo_get_hw_info(struct J9PortLibrary *portLibrary, uint32_t infoType, * @param [in] cacheType which type of cache level to query. * @return cache descriptor */ -static CACHE_DESCRIPTOR const* +static CACHE_DESCRIPTOR const * findCacheForTypeAndLevel(struct J9PortLibrary *portLibrary, SYSTEM_LOGICAL_PROCESSOR_INFORMATION *procInfoPtr, - uint32_t procInfoLength, int32_t const cacheLevel, const int32_t cacheType) + uint32_t procInfoLength, int32_t const cacheLevel, const int32_t cacheType) { SYSTEM_LOGICAL_PROCESSOR_INFORMATION *cursor = procInfoPtr; CACHE_DESCRIPTOR *cacheDesc = NULL; - SYSTEM_LOGICAL_PROCESSOR_INFORMATION *endInfo = (SYSTEM_LOGICAL_PROCESSOR_INFORMATION *) (((U_8 *) procInfoPtr) + procInfoLength); + SYSTEM_LOGICAL_PROCESSOR_INFORMATION *endInfo = (SYSTEM_LOGICAL_PROCESSOR_INFORMATION *)(((U_8 *)procInfoPtr) + procInfoLength); - while ((NULL == cacheDesc) && (cursor < endInfo)) { + while ((NULL == cacheDesc) && (cursor < endInfo)) { CACHE_DESCRIPTOR *temp = &(cursor->Cache); if ((temp->Level == cacheLevel) && (temp->LineSize > 0)) { - switch (temp->Type) { - case CacheUnified: { + switch (temp->Type) { + case CacheUnified: if (J9_ARE_ANY_BITS_SET(cacheType, - J9PORT_CACHEINFO_DCACHE | J9PORT_CACHEINFO_ICACHE | J9PORT_CACHEINFO_UCACHE)) { + J9PORT_CACHEINFO_DCACHE | J9PORT_CACHEINFO_ICACHE | J9PORT_CACHEINFO_UCACHE) + ) { cacheDesc = temp; } break; - case CacheInstruction: + case CacheInstruction: if (J9_ARE_ANY_BITS_SET(cacheType, J9PORT_CACHEINFO_ICACHE)) { cacheDesc = temp; } break; - case CacheData: + case CacheData: if (J9_ARE_ANY_BITS_SET(cacheType, J9PORT_CACHEINFO_DCACHE)) { cacheDesc = temp; } break; - case CacheTrace: + case CacheTrace: if (J9_ARE_ANY_BITS_SET(cacheType, J9PORT_CACHEINFO_TCACHE)) { cacheDesc = temp; } @@ -232,8 +199,6 @@ findCacheForTypeAndLevel(struct J9PortLibrary *portLibrary, default: break; } - break; - } } ++cursor; } @@ -255,7 +220,7 @@ getCacheTypes(struct J9PortLibrary *portLibrary, SYSTEM_LOGICAL_PROCESSOR_INFORM { SYSTEM_LOGICAL_PROCESSOR_INFORMATION *cursor = procInfoPtr; uint32_t result = 0; - SYSTEM_LOGICAL_PROCESSOR_INFORMATION *endInfo = (SYSTEM_LOGICAL_PROCESSOR_INFORMATION *) (((U_8 *) procInfoPtr) + procInfoLength); + SYSTEM_LOGICAL_PROCESSOR_INFORMATION *endInfo = (SYSTEM_LOGICAL_PROCESSOR_INFORMATION *)(((U_8 *)procInfoPtr) + procInfoLength); while (cursor < endInfo) { CACHE_DESCRIPTOR *temp = &(cursor->Cache); @@ -268,16 +233,16 @@ getCacheTypes(struct J9PortLibrary *portLibrary, SYSTEM_LOGICAL_PROCESSOR_INFORM PPG_sysL1DCacheLineSize = temp->LineSize; } break; - case CacheInstruction: + case CacheInstruction: result |= J9PORT_CACHEINFO_ICACHE; break; - case CacheData: + case CacheData: result |= J9PORT_CACHEINFO_DCACHE; if (1 == temp->Level) { PPG_sysL1DCacheLineSize = temp->LineSize; } break; - case CacheTrace: + case CacheTrace: result |= J9PORT_CACHEINFO_TCACHE; break; } @@ -301,7 +266,7 @@ getCacheLevels(struct J9PortLibrary *portLibrary, SYSTEM_LOGICAL_PROCESSOR_INFOR { SYSTEM_LOGICAL_PROCESSOR_INFORMATION *cursor = procInfoPtr; uint32_t result = 0; - SYSTEM_LOGICAL_PROCESSOR_INFORMATION *endInfo = (SYSTEM_LOGICAL_PROCESSOR_INFORMATION *) (((U_8 *) procInfoPtr) + procInfoLength); + SYSTEM_LOGICAL_PROCESSOR_INFORMATION *endInfo = (SYSTEM_LOGICAL_PROCESSOR_INFORMATION *)(((U_8 *)procInfoPtr) + procInfoLength); while (cursor < endInfo) { CACHE_DESCRIPTOR *temp = &(cursor->Cache); @@ -314,7 +279,7 @@ getCacheLevels(struct J9PortLibrary *portLibrary, SYSTEM_LOGICAL_PROCESSOR_INFOR } int32_t -j9sysinfo_get_cache_info(struct J9PortLibrary *portLibrary, const J9CacheInfoQuery * query) +j9sysinfo_get_cache_info(struct J9PortLibrary *portLibrary, const J9CacheInfoQuery *query) { OMRPORT_ACCESS_FROM_J9PORT(portLibrary); int32_t result = J9PORT_ERROR_SYSINFO_NOT_SUPPORTED; @@ -323,15 +288,16 @@ j9sysinfo_get_cache_info(struct J9PortLibrary *portLibrary, const J9CacheInfoQue DWORD procInfoLength = sizeof(procInfoBuff); Trc_PRT_sysinfo_get_cache_info_enter(query->cmd, query->cpu, query->level, query->cacheType); - if ((1 == query->level) && J9_ARE_ANY_BITS_SET(query->cacheType, J9PORT_CACHEINFO_DCACHE) && - (J9PORT_CACHEINFO_QUERY_LINESIZE == query->cmd) && (PPG_sysL1DCacheLineSize > 0)) { + if ((1 == query->level) + && J9_ARE_ANY_BITS_SET(query->cacheType, J9PORT_CACHEINFO_DCACHE) + && (J9PORT_CACHEINFO_QUERY_LINESIZE == query->cmd) + && (PPG_sysL1DCacheLineSize > 0) + ) { return PPG_sysL1DCacheLineSize; } - if (!GetLogicalProcessorInformation( - procInfoPtr, - &procInfoLength) + if (!GetLogicalProcessorInformation(procInfoPtr, &procInfoLength) && (GetLastError() == ERROR_INSUFFICIENT_BUFFER) - ) { + ) { procInfoPtr = omrmem_allocate_memory(procInfoLength, OMRMEM_CATEGORY_PORT_LIBRARY); Trc_PRT_sysinfo_get_cache_info_allocate(procInfoLength); @@ -341,7 +307,7 @@ j9sysinfo_get_cache_info(struct J9PortLibrary *portLibrary, const J9CacheInfoQue if (!GetLogicalProcessorInformation( procInfoPtr, &procInfoLength) - ) { + ) { if (procInfoBuff != procInfoPtr) { omrmem_free_memory(procInfoPtr); } @@ -351,7 +317,7 @@ j9sysinfo_get_cache_info(struct J9PortLibrary *portLibrary, const J9CacheInfoQue switch (query->cmd) { case J9PORT_CACHEINFO_QUERY_LINESIZE: { - CACHE_DESCRIPTOR const* cacheDesc = findCacheForTypeAndLevel(portLibrary, + CACHE_DESCRIPTOR const *cacheDesc = findCacheForTypeAndLevel(portLibrary, procInfoPtr, procInfoLength, query->level, @@ -362,7 +328,7 @@ j9sysinfo_get_cache_info(struct J9PortLibrary *portLibrary, const J9CacheInfoQue } break; case J9PORT_CACHEINFO_QUERY_CACHESIZE: { - CACHE_DESCRIPTOR const* cacheDesc = findCacheForTypeAndLevel(portLibrary, procInfoPtr, procInfoLength, + CACHE_DESCRIPTOR const *cacheDesc = findCacheForTypeAndLevel(portLibrary, procInfoPtr, procInfoLength, query->level, query->cacheType); if (NULL != cacheDesc) { @@ -383,8 +349,10 @@ j9sysinfo_get_cache_info(struct J9PortLibrary *portLibrary, const J9CacheInfoQue if (procInfoBuff != procInfoPtr) { omrmem_free_memory(procInfoPtr); } - if ((1 == query->level) && J9_ARE_ANY_BITS_SET(query->cacheType, J9PORT_CACHEINFO_DCACHE) && - (J9PORT_CACHEINFO_QUERY_LINESIZE == query->cmd)) { + if ((1 == query->level) + && J9_ARE_ANY_BITS_SET(query->cacheType, J9PORT_CACHEINFO_DCACHE) + && (J9PORT_CACHEINFO_QUERY_LINESIZE == query->cmd) + ) { PPG_sysL1DCacheLineSize = result; } Trc_PRT_sysinfo_get_cache_info_exit(result); diff --git a/runtime/tests/port/si.c b/runtime/tests/port/si.c index e2d58f8441a..e2f9d7916d4 100644 --- a/runtime/tests/port/si.c +++ b/runtime/tests/port/si.c @@ -20,7 +20,6 @@ * SPDX-License-Identifier: EPL-2.0 OR Apache-2.0 OR GPL-2.0-only WITH Classpath-exception-2.0 OR GPL-2.0-only WITH OpenJDK-assembly-exception-1.0 *******************************************************************************/ - /* * $RCSfile: si.c,v $ * $Revision: 1.64 $ @@ -930,58 +929,6 @@ int j9sysinfo_test_sysinfo_get_limit_FILE_DESCRIPTORS(J9PortLibrary* portLibrary } #endif /* !(defined(WIN32) || defined(WIN64)) */ -/** - * - * Test j9sysinfo_test_sysinfo_get_processor_description - * - */ -int j9sysinfo_test_sysinfo_get_processor_description(J9PortLibrary* portLibrary) -{ - PORT_ACCESS_FROM_PORT(portLibrary); - const char* testName = "j9sysinfo_test_sysinfo_get_processor_description"; - IDATA rc = 0; - int i = 0; - - J9ProcessorDesc desc; - - rc = j9sysinfo_get_processor_description(&desc); - -#if (defined(J9X86) || defined(J9HAMMER)) - if (desc.processor < PROCESSOR_X86_UNKNOWN) { - outputErrorMessage(PORTTEST_ERROR_ARGS, "j9sysinfo_test_sysinfo_get_processor_description() processor detection failed.\n"); - } - if (desc.physicalProcessor < PROCESSOR_X86_UNKNOWN) { - outputErrorMessage(PORTTEST_ERROR_ARGS, "j9sysinfo_test_sysinfo_get_processor_description() physical processor detection failed.\n"); - } -#elif (defined(AIXPPC) || defined(LINUXPPC)) - if ((desc.processor < PROCESSOR_PPC_UNKNOWN) || (desc.processor >= PROCESSOR_X86_UNKNOWN)) { - outputErrorMessage(PORTTEST_ERROR_ARGS, "j9sysinfo_test_sysinfo_get_processor_description() processor detection failed.\n"); - } - if ((desc.physicalProcessor < PROCESSOR_PPC_UNKNOWN) || (desc.physicalProcessor >= PROCESSOR_X86_UNKNOWN)) { - outputErrorMessage(PORTTEST_ERROR_ARGS, "j9sysinfo_test_sysinfo_get_processor_description() physical processor detection failed.\n"); - } -#elif (defined(S390) || defined(J9ZOS390)) - if (desc.processor >= (PROCESSOR_PPC_UNKNOWN)) { - outputErrorMessage(PORTTEST_ERROR_ARGS, "j9sysinfo_test_sysinfo_get_processor_description() processor detection failed.\n"); - } - if (desc.physicalProcessor >= (PROCESSOR_PPC_UNKNOWN)) { - outputErrorMessage(PORTTEST_ERROR_ARGS, "j9sysinfo_test_sysinfo_get_processor_description() physical processor detection failed.\n"); - } -#endif - - for (i = 0; i < J9PORT_SYSINFO_FEATURES_SIZE * 32; i++) { - BOOLEAN feature = j9sysinfo_processor_has_feature(&desc, i); - if ((TRUE != feature) - && (FALSE != feature)) { - outputErrorMessage(PORTTEST_ERROR_ARGS, "j9sysinfo_test_sysinfo_get_processor_description() feature %d detection failed: %d\n", i, feature); - } - } - - return reportTestExit(portLibrary, testName); -} - - - /* Since the processor and memory usage port library APIs are not available on zOS (neither * 31-bit not 64-bit) yet, so we exclude these tests from running on zOS. When the zOS * implementation is available, we must remove these guards so that they are built and @@ -2319,7 +2266,6 @@ j9sysinfo_runTests(struct J9PortLibrary *portLibrary, char *argv0) rc |= j9sysinfo_get_OS_type_test(portLibrary); rc |= j9sysinfo_test_sysinfo_ulimit_iterator(portLibrary); rc |= j9sysinfo_test_sysinfo_env_iterator(portLibrary); - rc |= j9sysinfo_test_sysinfo_get_processor_description(portLibrary); #if !(defined(WIN32) || defined(WIN64)) #if !(defined(AIXPPC) || defined(J9ZOS390) || defined(OSX)) /* unable to set RLIMIT_AS on AIX, z/OS, OSX */ @@ -2378,6 +2324,6 @@ j9sysinfo_runTests(struct J9PortLibrary *portLibrary, char *argv0) /* Output results */ j9tty_printf(PORTLIB, "\nSysinfo test done%s\n\n", rc == TEST_PASS ? "." : ", failures detected."); return TEST_PASS == rc ? 0 : -1; - + return 0; } diff --git a/runtime/vm/guardedstorage.c b/runtime/vm/guardedstorage.c index cccf273b885..750c773b1da 100644 --- a/runtime/vm/guardedstorage.c +++ b/runtime/vm/guardedstorage.c @@ -51,11 +51,13 @@ j9gs_initializeThread(J9VMThread *vmThread) BOOLEAN supportsGuardedStorageFacility = FALSE; J9JavaVM *vm = vmThread->javaVM; J9MemoryManagerFunctions *mmFuncs = vm->memoryManagerFunctions; - J9ProcessorDesc processorDesc; - j9sysinfo_get_processor_description(&processorDesc); - if (j9sysinfo_processor_has_feature(&processorDesc, J9PORT_S390_FEATURE_GUARDED_STORAGE) && - j9sysinfo_processor_has_feature(&processorDesc, J9PORT_S390_FEATURE_SIDE_EFFECT_ACCESS) && - !mmFuncs->j9gc_software_read_barrier_enabled(vm)) { + OMRPORT_ACCESS_FROM_J9PORT(PORTLIB); + OMRProcessorDesc processorDesc; + omrsysinfo_get_processor_description(&processorDesc); + if (omrsysinfo_processor_has_feature(&processorDesc, OMR_FEATURE_S390_GUARDED_STORAGE) + && omrsysinfo_processor_has_feature(&processorDesc, OMR_FEATURE_S390_SIDE_EFFECT_ACCESS) + && !mmFuncs->j9gc_software_read_barrier_enabled(vm) + ) { supportsGuardedStorageFacility = TRUE; } @@ -65,7 +67,7 @@ j9gs_initializeThread(J9VMThread *vmThread) /* Determine the shift value */ J9JavaVM * javaVM = vmThread->javaVM; int32_t compressedRefShift = javaVM->memoryManagerFunctions->j9gc_objaccess_compressedPointersShift(vmThread); - + /* Default parameters */ gsControlBlock->reserved = 0; gsControlBlock->designationRegister = 0; @@ -75,7 +77,7 @@ j9gs_initializeThread(J9VMThread *vmThread) /* Initialize the parameters */ j9gs_params_init(&vmThread->gsParameters, gsControlBlock); - + /* Initialize the current thread */ if (TRUE == supportsGuardedStorageFacility) { @@ -83,7 +85,7 @@ j9gs_initializeThread(J9VMThread *vmThread) } else { success = 1; } - + /* Check to see if initialization was a success */ if (0 == success) { j9mem_free_memory(gsControlBlock); @@ -91,7 +93,7 @@ j9gs_initializeThread(J9VMThread *vmThread) } } } - + return success; } @@ -103,11 +105,13 @@ j9gs_deinitializeThread(J9VMThread *vmThread) BOOLEAN supportsGuardedStorageFacility = FALSE; J9JavaVM *vm = vmThread->javaVM; J9MemoryManagerFunctions *mmFuncs = vm->memoryManagerFunctions; - J9ProcessorDesc processorDesc; - j9sysinfo_get_processor_description(&processorDesc); - if (j9sysinfo_processor_has_feature(&processorDesc, J9PORT_S390_FEATURE_GUARDED_STORAGE) && - j9sysinfo_processor_has_feature(&processorDesc, J9PORT_S390_FEATURE_SIDE_EFFECT_ACCESS) && - !mmFuncs->j9gc_software_read_barrier_enabled(vm)) { + OMRPORT_ACCESS_FROM_J9PORT(PORTLIB); + OMRProcessorDesc processorDesc; + omrsysinfo_get_processor_description(&processorDesc); + if (omrsysinfo_processor_has_feature(&processorDesc, OMR_FEATURE_S390_GUARDED_STORAGE) + && omrsysinfo_processor_has_feature(&processorDesc, OMR_FEATURE_S390_SIDE_EFFECT_ACCESS) + && !mmFuncs->j9gc_software_read_barrier_enabled(vm) + ) { supportsGuardedStorageFacility = TRUE; } @@ -128,8 +132,8 @@ j9gs_deinitializeThread(J9VMThread *vmThread) (vmThread->gsParameters).controlBlock = NULL; } } - + return success; } -#endif /* OMR_GC_CONCURRENT_SCAVENGER */ +#endif /* defined(OMR_GC_CONCURRENT_SCAVENGER) && defined(J9VM_ARCH_S390) */ diff --git a/runtime/vm/jvminit.c b/runtime/vm/jvminit.c index 4f7edf6e5e0..9a6afecb62d 100644 --- a/runtime/vm/jvminit.c +++ b/runtime/vm/jvminit.c @@ -1207,23 +1207,27 @@ initializeJavaVM(void * osMainThread, J9JavaVM ** vmPtr, J9CreateJavaVMParams *c } #endif /* J9VM_OPT_JITSERVER */ - /* * Disable AVX+ vector register preservation on x86 due to a large performance regression. * Issue: #15716 */ #if defined(J9HAMMER) && (JAVA_SPEC_VERSION >= 17) && 0 - J9ProcessorDesc desc; - j9sysinfo_get_processor_description(&desc); +{ + OMRPORT_ACCESS_FROM_J9PORT(PORTLIB); + OMRProcessorDesc desc; + omrsysinfo_get_processor_description(&desc); - if (j9sysinfo_processor_has_feature(&desc, J9PORT_X86_FEATURE_AVX512F) && j9sysinfo_processor_has_feature(&desc, J9PORT_X86_FEATURE_AVX512BW)) { + if (omrsysinfo_processor_has_feature(&desc, OMR_FEATURE_X86_AVX512F) + && omrsysinfo_processor_has_feature(&desc, OMR_FEATURE_X86_AVX512BW) + ) { vm->extendedRuntimeFlags |= J9_EXTENDED_RUNTIME_USE_VECTOR_REGISTERS; vm->extendedRuntimeFlags |= J9_EXTENDED_RUNTIME_USE_EXTENDED_VECTOR_REGISTERS; - } else if (j9sysinfo_processor_has_feature(&desc, J9PORT_X86_FEATURE_AVX512F)) { + } else if (omrsysinfo_processor_has_feature(&desc, OMR_FEATURE_X86_AVX512F)) { vm->extendedRuntimeFlags |= J9_EXTENDED_RUNTIME_USE_EXTENDED_VECTOR_REGISTERS; - } else if (j9sysinfo_processor_has_feature(&desc, J9PORT_X86_FEATURE_AVX)) { + } else if (omrsysinfo_processor_has_feature(&desc, OMR_FEATURE_X86_AVX)) { vm->extendedRuntimeFlags |= J9_EXTENDED_RUNTIME_USE_VECTOR_REGISTERS; } +} #endif /* defined(J9HAMMER) && (JAVA_SPEC_VERSION >= 17) && 0 */ initArgs.j2seVersion = createParams->j2seVersion; @@ -7275,16 +7279,17 @@ protectedInitializeJavaVM(J9PortLibrary* portLibrary, void * userData) #if defined(J9X86) || defined(J9HAMMER) { - J9ProcessorDesc desc; - j9sysinfo_get_processor_description(&desc); + OMRPORT_ACCESS_FROM_J9PORT(PORTLIB); + OMRProcessorDesc desc; + omrsysinfo_get_processor_description(&desc); /* cache line size in bytes is the value of bits 8-15 * 8 */ vm->dCacheLineSize = ((desc.features[2] & 0xFF00) >> 8) * 8; - if (j9sysinfo_processor_has_feature(&desc, J9PORT_X86_FEATURE_CLWB)) { - vm->cpuCacheWritebackCapabilities = J9PORT_X86_FEATURE_CLWB; - } else if (j9sysinfo_processor_has_feature(&desc, J9PORT_X86_FEATURE_CLFLUSHOPT)) { - vm->cpuCacheWritebackCapabilities = J9PORT_X86_FEATURE_CLFLUSHOPT; - } else if (j9sysinfo_processor_has_feature(&desc, J9PORT_X86_FEATURE_CLFSH)) { - vm->cpuCacheWritebackCapabilities = J9PORT_X86_FEATURE_CLFSH; + if (omrsysinfo_processor_has_feature(&desc, OMR_FEATURE_X86_CLWB)) { + vm->cpuCacheWritebackCapabilities = OMR_FEATURE_X86_CLWB; + } else if (omrsysinfo_processor_has_feature(&desc, OMR_FEATURE_X86_CLFLUSHOPT)) { + vm->cpuCacheWritebackCapabilities = OMR_FEATURE_X86_CLFLUSHOPT; + } else if (omrsysinfo_processor_has_feature(&desc, OMR_FEATURE_X86_CLFSH)) { + vm->cpuCacheWritebackCapabilities = OMR_FEATURE_X86_CLFSH; } } #endif /* x86 */