diff --git a/src/emu/cpu/i386/i386.c b/src/emu/cpu/i386/i386.c index 2bc61b2a9d..a2d54d66fa 100644 --- a/src/emu/cpu/i386/i386.c +++ b/src/emu/cpu/i386/i386.c @@ -107,7 +107,7 @@ static void i386_set_descriptor_accessed(i386_state *cpustate, UINT16 selector) UINT8 rights; if(!(selector & ~3)) return; - + if ( selector & 0x4 ) base = cpustate->ldtr.base; else @@ -458,8 +458,8 @@ static void i386_sreg_load(i386_state *cpustate, UINT16 selector, UINT8 reg, boo i386_load_segment_descriptor(cpustate, reg); if(fault) *fault = false; return; - } - + } + if(fault) *fault = true; if(reg == SS) { @@ -1030,7 +1030,7 @@ static void i286_task_switch(i386_state *cpustate, UINT16 selector, UINT8 nested WRITE16(cpustate,tss+0x28,cpustate->sreg[DS].selector); old_task = cpustate->task.segment; - + /* Load task register with the selector of the incoming task */ cpustate->task.segment = selector; memset(&seg, 0, sizeof(seg)); diff --git a/src/emu/cpu/powerpc/ppc.h b/src/emu/cpu/powerpc/ppc.h index f8078b928a..ddf1deede9 100644 --- a/src/emu/cpu/powerpc/ppc.h +++ b/src/emu/cpu/powerpc/ppc.h @@ -152,7 +152,7 @@ struct _powerpc_config { UINT32 bus_frequency; read32_device_func dcr_read_func; - write32_device_func dcr_write_func; + write32_device_func dcr_write_func; }; diff --git a/src/emu/cpu/powerpc/ppccom.h b/src/emu/cpu/powerpc/ppccom.h index af4366d0b9..3e70d536ea 100644 --- a/src/emu/cpu/powerpc/ppccom.h +++ b/src/emu/cpu/powerpc/ppccom.h @@ -567,7 +567,7 @@ struct _powerpc_state ppcimp_state * impstate; read32_device_func dcr_read_func; - write32_device_func dcr_write_func; + write32_device_func dcr_write_func; }; diff --git a/src/emu/device.h b/src/emu/device.h index a1a4cafec7..ad22bd601e 100644 --- a/src/emu/device.h +++ b/src/emu/device.h @@ -631,8 +631,8 @@ class device_t::shared_ptr_array_finder protected: // internal state - shared_ptr_type *m_array[_Count]; - astring m_tag[_Count]; + shared_ptr_type *m_array[_Count+1]; + astring m_tag[_Count+1]; }; // optional shared pointer array finder diff --git a/src/emu/info.c b/src/emu/info.c index e6b49bf88e..62fe531e09 100644 --- a/src/emu/info.c +++ b/src/emu/info.c @@ -690,10 +690,10 @@ void info_xml_creator::output_display(device_t &device, const char *root_tag) { astring newtag(screendev->tag()), oldtag(":"); newtag.substr(newtag.find(oldtag.cat(root_tag)) + oldtag.len()); - + fprintf(m_output, "\t\tscreen_type()) { case SCREEN_TYPE_RASTER: fprintf(m_output, " type=\"raster\""); break; @@ -701,7 +701,7 @@ void info_xml_creator::output_display(device_t &device, const char *root_tag) case SCREEN_TYPE_LCD: fprintf(m_output, " type=\"lcd\""); break; default: fprintf(m_output, " type=\"unknown\""); break; } - + // output the orientation as a string switch (m_drivlist.driver().flags & ORIENTATION_MASK) { @@ -730,7 +730,7 @@ void info_xml_creator::output_display(device_t &device, const char *root_tag) fprintf(m_output, " rotate=\"0\""); break; } - + // output width and height only for games that are not vector if (screendev->screen_type() != SCREEN_TYPE_VECTOR) { @@ -738,16 +738,16 @@ void info_xml_creator::output_display(device_t &device, const char *root_tag) fprintf(m_output, " width=\"%d\"", visarea.width()); fprintf(m_output, " height=\"%d\"", visarea.height()); } - + // output refresh rate fprintf(m_output, " refresh=\"%f\"", ATTOSECONDS_TO_HZ(screendev->refresh_attoseconds())); - + // output raw video parameters only for games that are not vector // and had raw parameters specified if (screendev->screen_type() != SCREEN_TYPE_VECTOR && !screendev->oldstyle_vblank_supplied()) { int pixclock = screendev->width() * screendev->height() * ATTOSECONDS_TO_HZ(screendev->refresh_attoseconds()); - + fprintf(m_output, " pixclock=\"%d\"", pixclock); fprintf(m_output, " htotal=\"%d\"", screendev->width()); fprintf(m_output, " hbend=\"%d\"", screendev->visible_area().min_x); diff --git a/src/emu/ioport.c b/src/emu/ioport.c index e7ecb2b434..380e23c3b4 100644 --- a/src/emu/ioport.c +++ b/src/emu/ioport.c @@ -992,7 +992,7 @@ natural_keyboard::natural_keyboard(running_machine &machine) m_timer(NULL), m_current_rate(attotime::zero) { - m_queue_chars = ioport_queue_chars_delegate(); + m_queue_chars = ioport_queue_chars_delegate(); m_accept_char = ioport_accept_char_delegate(); m_charqueue_empty = ioport_charqueue_empty_delegate(); @@ -1833,10 +1833,10 @@ ioport_type_class ioport_field::type_class() const unicode_char ioport_field::keyboard_code(int which) const { unicode_char ch; - + if (which >= ARRAY_LENGTH(m_chars)) throw emu_fatalerror("Tried to access keyboard_code with out-of-range index %d\n", which); - + ch = m_chars[which]; // special hack to allow for PORT_CODE('\xA3') @@ -3849,8 +3849,8 @@ void ioport_configurer::field_add_char(unicode_char ch) m_curfield->m_chars[index] = ch; return; } - - throw emu_fatalerror("PORT_CHAR(%d) could not be added - maximum amount exceeded\n", ch); + + throw emu_fatalerror("PORT_CHAR(%d) could not be added - maximum amount exceeded\n", ch); } @@ -3875,7 +3875,7 @@ void ioport_configurer::setting_alloc(ioport_value value, const char *name) throw emu_fatalerror("alloc_setting called with no active field (value=%X name=%s)\n", value, name); m_cursetting = global_alloc(ioport_setting(*m_curfield, value & m_curfield->mask(), string_from_token(name))); - // append a new setting + // append a new setting m_curfield->m_settinglist.append(*m_cursetting); } diff --git a/src/emu/ioport.h b/src/emu/ioport.h index 29c1d601fc..6a3655b542 100644 --- a/src/emu/ioport.h +++ b/src/emu/ioport.h @@ -833,7 +833,7 @@ class natural_keyboard natural_keyboard(running_machine &machine); void initialize(); - + // getters and queries running_machine &machine() const { return m_machine; } bool empty() const { return (m_bufbegin == m_bufend); } diff --git a/src/emu/machine/68681.c b/src/emu/machine/68681.c index e1d4391c49..2774c40482 100644 --- a/src/emu/machine/68681.c +++ b/src/emu/machine/68681.c @@ -660,7 +660,7 @@ WRITE8_DEVICE_HANDLER(duart68681_w) rate = attotime::from_hz(2*device->clock()/(2*16*16*0x10000)); } } - + //hz = ATTOSECONDS_TO_HZ(rate.attoseconds); duart68681->duart_timer->adjust(rate, 0, rate); diff --git a/src/emu/rendlay.c b/src/emu/rendlay.c index 8c906795c7..12cb156db6 100644 --- a/src/emu/rendlay.c +++ b/src/emu/rendlay.c @@ -821,7 +821,7 @@ void layout_element::component::draw(running_machine &machine, bitmap_argb32 &de case CTYPE_DOTMATRIXDOT: draw_dotmatrix(1, dest, bounds, state); break; - + case CTYPE_SIMPLECOUNTER: draw_simplecounter(machine, dest, bounds, state); break; diff --git a/src/emu/rendlay.h b/src/emu/rendlay.h index 756bb0a453..b802084239 100644 --- a/src/emu/rendlay.h +++ b/src/emu/rendlay.h @@ -122,7 +122,7 @@ class layout_element CTYPE_LED16SEGSC, CTYPE_DOTMATRIX, CTYPE_DOTMATRIX5DOT, - CTYPE_DOTMATRIXDOT, + CTYPE_DOTMATRIXDOT, CTYPE_SIMPLECOUNTER, CTYPE_REEL, CTYPE_MAX diff --git a/src/emu/sound/pokey.c b/src/emu/sound/pokey.c index 1800cc381a..db0fc24be4 100644 --- a/src/emu/sound/pokey.c +++ b/src/emu/sound/pokey.c @@ -59,1216 +59,104 @@ #include "emu.h" #include "pokey.h" -/* - * Defining this produces much more (about twice as much) - * but also more efficient code. Ideally this should be set - * for processors with big code cache and for healthy compilers :) - */ -#ifndef BIG_SWITCH -#ifndef HEAVY_MACRO_USAGE -#define HEAVY_MACRO_USAGE 1 -#endif -#else -#define HEAVY_MACRO_USAGE BIG_SWITCH -#endif - -#define SUPPRESS_INAUDIBLE 1 - -/* Four channels with a range of 0..32767 and volume 0..15 */ -//#define POKEY_DEFAULT_GAIN (32767/15/4) - -/* - * But we raise the gain and risk clipping, the old Pokey did - * this too. It defined POKEY_DEFAULT_GAIN 6 and this was - * 6 * 15 * 4 = 360, 360/256 = 1.40625 - * I use 15/11 = 1.3636, so this is a little lower. - */ -#define POKEY_DEFAULT_GAIN (32767/11/4) - -#define VERBOSE 1 -#define VERBOSE_SOUND 0 -#define VERBOSE_TIMER 1 -#define VERBOSE_POLY 0 -#define VERBOSE_RAND 0 - -#define LOG(x) do { if (VERBOSE) logerror x; } while (0) - -#define LOG_SOUND(x) do { if (VERBOSE_SOUND) logerror x; } while (0) - -#define LOG_TIMER(x) do { if (VERBOSE_TIMER) logerror x; } while (0) - -#define LOG_POLY(x) do { if (VERBOSE_POLY) logerror x; } while (0) - -#define LOG_RAND(x) do { if (VERBOSE_RAND) logerror x; } while (0) - -#define CHAN1 0 -#define CHAN2 1 -#define CHAN3 2 -#define CHAN4 3 - -#define TIMER1 0 -#define TIMER2 1 -#define TIMER4 2 - -/* values to add to the divisors for the different modes */ -#define DIVADD_LOCLK 1 -#define DIVADD_HICLK 4 -#define DIVADD_HICLK_JOINED 7 - -/* AUDCx */ -#define NOTPOLY5 0x80 /* selects POLY5 or direct CLOCK */ -#define POLY4 0x40 /* selects POLY4 or POLY17 */ -#define PURE 0x20 /* selects POLY4/17 or PURE tone */ -#define VOLUME_ONLY 0x10 /* selects VOLUME OUTPUT ONLY */ -#define VOLUME_MASK 0x0f /* volume mask */ - -/* AUDCTL */ -#define POLY9 0x80 /* selects POLY9 or POLY17 */ -#define CH1_HICLK 0x40 /* selects 1.78979 MHz for Ch 1 */ -#define CH3_HICLK 0x20 /* selects 1.78979 MHz for Ch 3 */ -#define CH12_JOINED 0x10 /* clocks channel 1 w/channel 2 */ -#define CH34_JOINED 0x08 /* clocks channel 3 w/channel 4 */ -#define CH1_FILTER 0x04 /* selects channel 1 high pass filter */ -#define CH2_FILTER 0x02 /* selects channel 2 high pass filter */ -#define CLK_15KHZ 0x01 /* selects 15.6999 kHz or 63.9211 kHz */ - -/* IRQEN (D20E) */ -#define IRQ_BREAK 0x80 /* BREAK key pressed interrupt */ -#define IRQ_KEYBD 0x40 /* keyboard data ready interrupt */ -#define IRQ_SERIN 0x20 /* serial input data ready interrupt */ -#define IRQ_SEROR 0x10 /* serial output register ready interrupt */ -#define IRQ_SEROC 0x08 /* serial output complete interrupt */ -#define IRQ_TIMR4 0x04 /* timer channel #4 interrupt */ -#define IRQ_TIMR2 0x02 /* timer channel #2 interrupt */ -#define IRQ_TIMR1 0x01 /* timer channel #1 interrupt */ - -/* SKSTAT (R/D20F) */ -#define SK_FRAME 0x80 /* serial framing error */ -#define SK_OVERRUN 0x40 /* serial overrun error */ -#define SK_KBERR 0x20 /* keyboard overrun error */ -#define SK_SERIN 0x10 /* serial input high */ -#define SK_SHIFT 0x08 /* shift key pressed */ -#define SK_KEYBD 0x04 /* keyboard key pressed */ -#define SK_SEROUT 0x02 /* serial output active */ - -/* SKCTL (W/D20F) */ -#define SK_BREAK 0x80 /* serial out break signal */ -#define SK_BPS 0x70 /* bits per second */ -#define SK_FM 0x08 /* FM mode */ -#define SK_PADDLE 0x04 /* fast paddle a/d conversion */ -#define SK_RESET 0x03 /* reset serial/keyboard interface */ - -#define DIV_64 28 /* divisor for 1.78979 MHz clock to 63.9211 kHz */ -#define DIV_15 114 /* divisor for 1.78979 MHz clock to 15.6999 kHz */ - -typedef struct _pokey_state pokey_state; -struct _pokey_state -{ - INT32 clock_cnt[3]; /* clock counters */ - INT32 borrow_cnt[4]; /* borrow counters */ - - INT32 counter[4]; /* channel counter */ - INT32 divisor[4]; /* channel divisor (modulo value) */ - UINT32 volume[4]; /* channel volume - derived */ - UINT8 output[4]; /* channel output signal (1 active, 0 inactive) */ - UINT8 filter_sample[4]; /* hi-pass filter sample */ - UINT32 p4; /* poly4 index */ - UINT32 p5; /* poly5 index */ - UINT32 p9; /* poly9 index */ - UINT32 p17; /* poly17 index */ - UINT32 r9; /* rand9 index */ - UINT32 r17; /* rand17 index */ - UINT32 clockmult; /* clock multiplier */ - device_t *device; - sound_stream * m_stream; /* streams channel */ - emu_timer *timer[3]; /* timers for channel 1,2 and 4 events */ - attotime timer_period[3]; /* computed periods for these timers */ - int timer_param[3]; /* computed parameters for these timers */ - emu_timer *rtimer; /* timer for calculating the random offset */ - emu_timer *ptimer[8]; /* pot timers */ - devcb_resolved_read8 pot_r[8]; - devcb_resolved_read8 allpot_r; - devcb_resolved_read8 serin_r; - devcb_resolved_write8 serout_w; - void (*interrupt_cb)(device_t *device, int mask); - UINT8 AUDF[4]; /* AUDFx (D200, D202, D204, D206) */ - UINT8 AUDC[4]; /* AUDCx (D201, D203, D205, D207) */ - UINT8 POTx[8]; /* POTx (R/D200-D207) */ - UINT8 AUDCTL; /* AUDCTL (W/D208) */ - UINT8 ALLPOT; /* ALLPOT (R/D208) */ - UINT8 KBCODE; /* KBCODE (R/D209) */ - UINT8 RANDOM; /* RANDOM (R/D20A) */ - UINT8 SERIN; /* SERIN (R/D20D) */ - UINT8 SEROUT; /* SEROUT (W/D20D) */ - UINT8 IRQST; /* IRQST (R/D20E) */ - UINT8 IRQEN; /* IRQEN (W/D20E) */ - UINT8 SKSTAT; /* SKSTAT (R/D20F) */ - UINT8 SKCTL; /* SKCTL (W/D20F) */ - pokey_interface intf; - attotime clock_period; - attotime ad_time_fast; - attotime ad_time_slow; - - UINT8 poly4[0x0f]; - UINT8 poly5[0x1f]; - UINT8 poly9[0x1ff]; - UINT8 poly17[0x1ffff]; - - UINT8 rand9[0x1ff]; - UINT8 rand17[0x1ffff]; -}; - - -#define P4(chip) chip->poly4[chip->p4] -#define P5(chip) chip->poly5[chip->p5] -#define P9(chip) chip->poly9[chip->p9] -#define P17(chip) chip->poly17[chip->p17] - -static TIMER_CALLBACK( pokey_timer_expire ); -static TIMER_CALLBACK( pokey_pot_trigger ); - -#define CLK_1 0 -#define CLK_28 1 -#define CLK_114 2 - -static const int clock_divisors[3] = {1, 28, 114}; - -INLINE pokey_state *get_safe_token(device_t *device) -{ - assert(device != NULL); -#ifdef OLDDEVICE_FOR_MESS - assert(device->type() == POKEY); -#endif - return (pokey_state *)downcast(device)->token(); -} - -INLINE void reset_channel(pokey_state *chip, int ch) -{ - chip->counter[ch] = chip->AUDF[ch] ^ 0xff; -} - - -INLINE void process_channel(pokey_state *chip, int ch) -{ - int toggle = 0; - - if( (chip->AUDC[ch] & NOTPOLY5) || P5(chip) ) - { - if( chip->AUDC[ch] & PURE ) - toggle = 1; - else - if( chip->AUDC[ch] & POLY4 ) - toggle = chip->output[ch] == !P4(chip); - else - if( chip->AUDCTL & POLY9 ) - toggle = chip->output[ch] == !P9(chip); - else - toggle = chip->output[ch] == !P17(chip); - } - if( toggle ) - { - chip->output[ch] ^= 1; - } -} - -/* - * http://www.atariage.com/forums/topic/3328-sio-protocol/page__st__100#entry1680190: - * I noticed that the Pokey counters have clocked carry (actually, "borrow") positions that delay the - * counter by 3 cycles, plus the 1 reset clock. So 16 bit mode has 6 carry delays and a reset clock. - * I'm sure this was done because the propagation delays limited the number of cells the subtraction could ripple though. - * - */ - -INLINE void inc_chan(pokey_state *chip, int ch) -{ - chip->counter[ch] = (chip->counter[ch] + 1) & 0xff; - if (chip->counter[ch] == 0 && chip->borrow_cnt[ch] == 0) - chip->borrow_cnt[ch] = 3; -} - -INLINE int check_borrow(pokey_state *chip, int ch) -{ - if (chip->borrow_cnt[ch] > 0) - { - chip->borrow_cnt[ch]--; - return (chip->borrow_cnt[ch] == 0); - } - return 0; -} - -static STREAM_UPDATE( pokey_update ) -{ - pokey_state *chip = (pokey_state *)param; - stream_sample_t *buffer = outputs[0]; - int base_clock = (chip->AUDCTL & CLK_15KHZ) ? CLK_114 : CLK_28; - - while( samples > 0 ) - { - int ch, clk; - UINT32 sum = 0; - int clock_triggered[3] = {0,0,0}; - - for (clk = 0; clk < 3; clk++) - { - chip->clock_cnt[clk]++; - if (chip->clock_cnt[clk] >= clock_divisors[clk]) - { - chip->clock_cnt[clk] = 0; - clock_triggered[clk] = 1; - } - } - - chip->p4 = (chip->p4 + 1) % 0x0000f; - chip->p5 = (chip->p5 + 1) % 0x0001f; - chip->p9 = (chip->p9 + 1) % 0x001ff; - chip->p17 = (chip->p17 + 1 ) % 0x1ffff; - - - clk = (chip->AUDCTL & CH1_HICLK) ? CLK_1 : base_clock; - if (clock_triggered[clk]) - inc_chan(chip, CHAN1); - - clk = (chip->AUDCTL & CH3_HICLK) ? CLK_1 : base_clock; - if (clock_triggered[clk]) - inc_chan(chip, CHAN3); - - if (clock_triggered[base_clock]) - { - if (!(chip->AUDCTL & CH12_JOINED)) - inc_chan(chip, CHAN2); - if (!(chip->AUDCTL & CH34_JOINED)) - inc_chan(chip, CHAN4); - } - - /* do CHAN2 before CHAN1 because CHAN1 may set borrow! */ - if (check_borrow(chip, CHAN2)) - { - int isJoined = (chip->AUDCTL & CH12_JOINED); - if (isJoined) - reset_channel(chip, CHAN1); - reset_channel(chip, CHAN2); - process_channel(chip, CHAN2); - } - - if (check_borrow(chip, CHAN1)) - { - int isJoined = (chip->AUDCTL & CH12_JOINED); - if (isJoined) - inc_chan(chip, CHAN2); - else - reset_channel(chip, CHAN1); - process_channel(chip, CHAN1); - } - - /* do CHAN4 before CHAN3 because CHAN3 may set borrow! */ - if (check_borrow(chip, CHAN4)) - { - int isJoined = (chip->AUDCTL & CH34_JOINED); - if (isJoined) - reset_channel(chip, CHAN3); - reset_channel(chip, CHAN4); - process_channel(chip, CHAN4); - /* is this a filtering channel (3/4) and is the filter active? */ - if (chip->AUDCTL & CH2_FILTER) - chip->filter_sample[CHAN2] = chip->output[CHAN2]; - else - chip->filter_sample[CHAN2] = 1; - } - - if (check_borrow(chip, CHAN3)) - { - int isJoined = (chip->AUDCTL & CH34_JOINED); - if (isJoined) - inc_chan(chip, CHAN4); - else - reset_channel(chip, CHAN3); - process_channel(chip, CHAN3); - /* is this a filtering channel (3/4) and is the filter active? */ - if (chip->AUDCTL & CH1_FILTER) - chip->filter_sample[CHAN1] = chip->output[CHAN1]; - else - chip->filter_sample[CHAN1] = 1; - } - - for (ch = 0; ch < 4; ch++) - { - sum += (((chip->output[ch] ^ chip->filter_sample[ch]) || (chip->AUDC[ch] & VOLUME_ONLY)) ? chip->volume[ch] : 0 ); - } - - /* store sum of output signals into the buffer */ - *buffer++ = (sum > 0x7fff) ? 0x7fff : sum; - samples--; - - } - chip->rtimer->adjust(attotime::never); - -} - - -static void poly_init(UINT8 *poly, int size, int left, int right, int add) -{ - int mask = (1 << size) - 1; - int i, x = 0; - - LOG_POLY(("poly %d\n", size)); - for( i = 0; i < mask; i++ ) - { - *poly++ = x & 1; - LOG_POLY(("%05x: %d\n", x, x&1)); - /* calculate next bit */ - x = ((x << left) + (x >> right) + add) & mask; - } -} - -static void rand_init(UINT8 *rng, int size, int left, int right, int add) -{ - int mask = (1 << size) - 1; - int i; - UINT32 lfsr = 0; - - LOG_RAND(("rand %d\n", size)); - - if (size == 17) - { - for( i = 0; i < mask; i++ ) - { - /* calculate next bit @ 7 */ - int in8 = !((lfsr >> 8) & 1) ^ ((lfsr >> 13) & 1); - int in = (lfsr & 1); - lfsr = lfsr >> 1; - lfsr = (lfsr & 0xff7f) | (in8 << 7); - lfsr = (in << 16) | lfsr; - *rng = (lfsr >> 8) & 0xff; /* use bits 0..7 */ - LOG_RAND(("%05x: %02x\n", lfsr, *rng)); - rng++; - } - } - else - { - for( i = 0; i < mask; i++ ) - { - /* calculate next bit */ - int in = !((lfsr >> 0) & 1) ^ ((lfsr >> 5) & 1); - lfsr = lfsr >> 1; - lfsr = (in << 8) | lfsr; - *rng = lfsr & 0xff; /* use bits 0..7 */ - LOG_RAND(("%05x: %02x\n", lfsr, *rng)); - rng++; - } - } - -} - - -static void register_for_save(pokey_state *chip, device_t *device) -{ - device->save_item(NAME(chip->counter)); - device->save_item(NAME(chip->divisor)); - device->save_item(NAME(chip->volume)); - device->save_item(NAME(chip->output)); - device->save_item(NAME(chip->filter_sample)); - device->save_item(NAME(chip->clock_cnt)); - device->save_item(NAME(chip->p4)); - device->save_item(NAME(chip->p5)); - device->save_item(NAME(chip->p9)); - device->save_item(NAME(chip->p17)); - device->save_item(NAME(chip->r9)); - device->save_item(NAME(chip->r17)); - device->save_item(NAME(chip->clockmult)); - device->save_item(NAME(chip->timer_period[0])); - device->save_item(NAME(chip->timer_period[1])); - device->save_item(NAME(chip->timer_period[2])); - device->save_item(NAME(chip->timer_param)); - device->save_item(NAME(chip->AUDF)); - device->save_item(NAME(chip->AUDC)); - device->save_item(NAME(chip->POTx)); - device->save_item(NAME(chip->AUDCTL)); - device->save_item(NAME(chip->ALLPOT)); - device->save_item(NAME(chip->KBCODE)); - device->save_item(NAME(chip->RANDOM)); - device->save_item(NAME(chip->SERIN)); - device->save_item(NAME(chip->SEROUT)); - device->save_item(NAME(chip->IRQST)); - device->save_item(NAME(chip->IRQEN)); - device->save_item(NAME(chip->SKSTAT)); - device->save_item(NAME(chip->SKCTL)); -} - - -static DEVICE_START( pokey ) -{ - pokey_state *chip = get_safe_token(device); - int sample_rate = device->clock(); - int i; - - if (device->static_config()) - memcpy(&chip->intf, device->static_config(), sizeof(pokey_interface)); - chip->device = device; - chip->clock_period = attotime::from_hz(device->clock()); - - /* calculate the A/D times - * In normal, slow mode (SKCTL bit SK_PADDLE is clear) the conversion - * takes N scanlines, where N is the paddle value. A single scanline - * takes approximately 64us to finish (1.78979MHz clock). - * In quick mode (SK_PADDLE set) the conversion is done very fast - * (takes two scanlines) but the result is not as accurate. - */ - chip->ad_time_fast = (attotime::from_nsec(64000*2/228) * FREQ_17_EXACT) / device->clock(); - chip->ad_time_slow = (attotime::from_nsec(64000 ) * FREQ_17_EXACT) / device->clock(); - - /* initialize the poly counters */ - poly_init(chip->poly4, 4, 3, 1, 0x00004); - poly_init(chip->poly5, 5, 3, 2, 0x00008); - poly_init(chip->poly9, 9, 8, 1, 0x00180); - poly_init(chip->poly17, 17,16, 1, 0x1c000); - - /* initialize the random arrays */ - rand_init(chip->rand9, 9, 8, 1, 0x00180); - rand_init(chip->rand17, 17,16, 1, 0x1c000); - - chip->divisor[CHAN1] = 4; - chip->divisor[CHAN2] = 4; - chip->divisor[CHAN3] = 4; - chip->divisor[CHAN4] = 4; - - chip->clockmult = DIV_64; - chip->KBCODE = 0x09; /* Atari 800 'no key' */ - chip->SKCTL = SK_RESET; /* let the RNG run after reset */ - chip->rtimer = device->machine().scheduler().timer_alloc(FUNC_NULL); - - chip->timer[0] = device->machine().scheduler().timer_alloc(FUNC(pokey_timer_expire), chip); - chip->timer[1] = device->machine().scheduler().timer_alloc(FUNC(pokey_timer_expire), chip); - chip->timer[2] = device->machine().scheduler().timer_alloc(FUNC(pokey_timer_expire), chip); - - for (i=0; i<8; i++) - { - chip->ptimer[i] = device->machine().scheduler().timer_alloc(FUNC(pokey_pot_trigger), chip); - chip->pot_r[i].resolve(chip->intf.pot_r[i], *device); - } - chip->allpot_r.resolve(chip->intf.allpot_r, *device); - chip->serin_r.resolve(chip->intf.serin_r, *device); - chip->serout_w.resolve(chip->intf.serout_w, *device); - chip->interrupt_cb = chip->intf.interrupt_cb; - - chip->m_stream = device->machine().sound().stream_alloc(*device, 0, 1, sample_rate, chip, pokey_update); - - register_for_save(chip, device); -} - -static TIMER_CALLBACK( pokey_timer_expire ) -{ - pokey_state *p = (pokey_state *)ptr; - int timers = param; - - LOG_TIMER(("POKEY #%p timer %d with IRQEN $%02x\n", p, timers, p->IRQEN)); - - /* check if some of the requested timer interrupts are enabled */ - timers &= p->IRQEN; - - if( timers ) - { - /* set the enabled timer irq status bits */ - p->IRQST |= timers; - /* call back an application supplied function to handle the interrupt */ - if( p->interrupt_cb ) - (*p->interrupt_cb)(p->device, timers); - } -} - -static char *audc2str(int val) -{ - static char buff[80]; - if( val & NOTPOLY5 ) - { - if( val & PURE ) - strcpy(buff,"pure"); - else - if( val & POLY4 ) - strcpy(buff,"poly4"); - else - strcpy(buff,"poly9/17"); - } - else - { - if( val & PURE ) - strcpy(buff,"poly5"); - else - if( val & POLY4 ) - strcpy(buff,"poly4+poly5"); - else - strcpy(buff,"poly9/17+poly5"); - } - return buff; -} - -static char *audctl2str(int val) -{ - static char buff[80]; - if( val & POLY9 ) - strcpy(buff,"poly9"); - else - strcpy(buff,"poly17"); - if( val & CH1_HICLK ) - strcat(buff,"+ch1hi"); - if( val & CH3_HICLK ) - strcat(buff,"+ch3hi"); - if( val & CH12_JOINED ) - strcat(buff,"+ch1/2"); - if( val & CH34_JOINED ) - strcat(buff,"+ch3/4"); - if( val & CH1_FILTER ) - strcat(buff,"+ch1filter"); - if( val & CH2_FILTER ) - strcat(buff,"+ch2filter"); - if( val & CLK_15KHZ ) - strcat(buff,"+clk15"); - return buff; -} - -static TIMER_CALLBACK( pokey_serin_ready_cb ) -{ - pokey_state *p = (pokey_state *)ptr; - if( p->IRQEN & IRQ_SERIN ) - { - /* set the enabled timer irq status bits */ - p->IRQST |= IRQ_SERIN; - /* call back an application supplied function to handle the interrupt */ - if( p->interrupt_cb ) - (*p->interrupt_cb)(p->device, IRQ_SERIN); - } -} - -static TIMER_CALLBACK( pokey_serout_ready_cb ) -{ - pokey_state *p = (pokey_state *)ptr; - if( p->IRQEN & IRQ_SEROR ) - { - p->IRQST |= IRQ_SEROR; - if( p->interrupt_cb ) - (*p->interrupt_cb)(p->device, IRQ_SEROR); - } -} - -static TIMER_CALLBACK( pokey_serout_complete ) -{ - pokey_state *p = (pokey_state *)ptr; - if( p->IRQEN & IRQ_SEROC ) - { - p->IRQST |= IRQ_SEROC; - if( p->interrupt_cb ) - (*p->interrupt_cb)(p->device, IRQ_SEROC); - } -} - -static TIMER_CALLBACK( pokey_pot_trigger ) -{ - pokey_state *p = (pokey_state *)ptr; - int pot = param; - LOG(("POKEY #%p POT%d triggers after %dus\n", p, pot, (int)(1000000 * p->ptimer[pot]->elapsed().as_double()))); - p->ALLPOT &= ~(1 << pot); /* set the enabled timer irq status bits */ -} - -#define AD_TIME ((p->SKCTL & SK_PADDLE) ? p->ad_time_fast : p->ad_time_slow) - -static void pokey_potgo(pokey_state *p) -{ - int pot; - - LOG(("POKEY #%p pokey_potgo\n", p)); - - p->ALLPOT = 0xff; - - for( pot = 0; pot < 8; pot++ ) - { - p->POTx[pot] = 0xff; - if( !p->pot_r[pot].isnull() ) - { - int r = p->pot_r[pot](pot); - - LOG(("POKEY %s pot_r(%d) returned $%02x\n", p->device->tag(), pot, r)); - if( r != -1 ) - { - if (r > 228) - r = 228; - - /* final value */ - p->POTx[pot] = r; - p->ptimer[pot]->adjust(AD_TIME * r, pot); - } - } - } -} - -READ8_DEVICE_HANDLER( pokey_r ) -{ - pokey_state *p = get_safe_token(device); - int data = 0, pot; - UINT32 adjust = 0; - - switch (offset & 15) - { - case POT0_C: case POT1_C: case POT2_C: case POT3_C: - case POT4_C: case POT5_C: case POT6_C: case POT7_C: - pot = offset & 7; - if( !p->pot_r[pot].isnull() ) - { - /* - * If the conversion is not yet finished (ptimer running), - * get the current value by the linear interpolation of - * the final value using the elapsed time. - */ - if( p->ALLPOT & (1 << pot) ) - { - data = p->ptimer[pot]->elapsed().attoseconds / AD_TIME.attoseconds; - LOG(("POKEY '%s' read POT%d (interpolated) $%02x\n", p->device->tag(), pot, data)); - } - else - { - data = p->POTx[pot]; - LOG(("POKEY '%s' read POT%d (final value) $%02x\n", p->device->tag(), pot, data)); - } - } - else - logerror("%s: warning - read '%s' POT%d\n", p->device->machine().describe_context(), p->device->tag(), pot); - break; - - case ALLPOT_C: - /**************************************************************** - * If the 2 least significant bits of SKCTL are 0, the ALLPOTs - * are disabled (SKRESET). Thanks to MikeJ for pointing this out. - ****************************************************************/ - if( (p->SKCTL & SK_RESET) == 0) - { - data = 0; - LOG(("POKEY '%s' ALLPOT internal $%02x (reset)\n", p->device->tag(), data)); - } - else if( !p->allpot_r.isnull() ) - { - data = p->allpot_r(offset); - LOG(("POKEY '%s' ALLPOT callback $%02x\n", p->device->tag(), data)); - } - else - { - data = p->ALLPOT; - LOG(("POKEY '%s' ALLPOT internal $%02x\n", p->device->tag(), data)); - } - break; - - case KBCODE_C: - data = p->KBCODE; - break; - - case RANDOM_C: - /**************************************************************** - * If the 2 least significant bits of SKCTL are 0, the random - * number generator is disabled (SKRESET). Thanks to Eric Smith - * for pointing out this critical bit of info! If the random - * number generator is enabled, get a new random number. Take - * the time gone since the last read into account and read the - * new value from an appropriate offset in the rand17 table. - ****************************************************************/ - if( p->SKCTL & SK_RESET ) - { - adjust = p->rtimer->elapsed().as_double() / p->clock_period.as_double(); - p->r9 = (p->r9 + adjust) % 0x001ff; - p->r17 = (p->r17 + adjust) % 0x1ffff; - } - else - { - adjust = 1; - p->r9 = 0; - p->r17 = 0; - LOG_RAND(("POKEY '%s' rand17 frozen (SKCTL): $%02x\n", p->device->tag(), p->RANDOM)); - } - if( p->AUDCTL & POLY9 ) - { - p->RANDOM = p->rand9[p->r9]; - LOG_RAND(("POKEY '%s' adjust %u rand9[$%05x]: $%02x\n", p->device->tag(), adjust, p->r9, p->RANDOM)); - } - else - { - p->RANDOM = p->rand17[p->r17]; - LOG_RAND(("POKEY '%s' adjust %u rand17[$%05x]: $%02x\n", p->device->tag(), adjust, p->r17, p->RANDOM)); - } - if (adjust > 0) - p->rtimer->adjust(attotime::never); - data = p->RANDOM ^ 0xff; - break; - - case SERIN_C: - if( !p->serin_r.isnull() ) - p->SERIN = p->serin_r(offset); - data = p->SERIN; - LOG(("POKEY '%s' SERIN $%02x\n", p->device->tag(), data)); - break; - - case IRQST_C: - /* IRQST is an active low input port; we keep it active high */ - /* internally to ease the (un-)masking of bits */ - data = p->IRQST ^ 0xff; - LOG(("POKEY '%s' IRQST $%02x\n", p->device->tag(), data)); - break; - - case SKSTAT_C: - /* SKSTAT is also an active low input port */ - data = p->SKSTAT ^ 0xff; - LOG(("POKEY '%s' SKSTAT $%02x\n", p->device->tag(), data)); - break; - - default: - LOG(("POKEY '%s' register $%02x\n", p->device->tag(), offset)); - break; - } - return data; -} - -READ8_HANDLER( quad_pokey_r ) -{ - static const char *const devname[4] = { "pokey1", "pokey2", "pokey3", "pokey4" }; - int pokey_num = (offset >> 3) & ~0x04; - int control = (offset & 0x20) >> 2; - int pokey_reg = (offset % 8) | control; - - return pokey_r(space->machine().device(devname[pokey_num]), pokey_reg); -} - - -WRITE8_DEVICE_HANDLER( pokey_w ) -{ - pokey_state *p = get_safe_token(device); - int ch_mask = 0, new_val; - - p->m_stream->update(); - - /* determine which address was changed */ - switch (offset & 15) - { - case AUDF1_C: - if( data == p->AUDF[CHAN1] ) - return; - LOG_SOUND(("POKEY '%s' AUDF1 $%02x\n", p->device->tag(), data)); - p->AUDF[CHAN1] = data; - ch_mask = 1 << CHAN1; - if( p->AUDCTL & CH12_JOINED ) /* if ch 1&2 tied together */ - ch_mask |= 1 << CHAN2; /* then also change on ch2 */ - break; - - case AUDC1_C: - if( data == p->AUDC[CHAN1] ) - return; - LOG_SOUND(("POKEY '%s' AUDC1 $%02x (%s)\n", p->device->tag(), data, audc2str(data))); - p->AUDC[CHAN1] = data; - ch_mask = 1 << CHAN1; - break; - - case AUDF2_C: - if( data == p->AUDF[CHAN2] ) - return; - LOG_SOUND(("POKEY '%s' AUDF2 $%02x\n", p->device->tag(), data)); - p->AUDF[CHAN2] = data; - ch_mask = 1 << CHAN2; - break; - - case AUDC2_C: - if( data == p->AUDC[CHAN2] ) - return; - LOG_SOUND(("POKEY '%s' AUDC2 $%02x (%s)\n", p->device->tag(), data, audc2str(data))); - p->AUDC[CHAN2] = data; - ch_mask = 1 << CHAN2; - break; - - case AUDF3_C: - if( data == p->AUDF[CHAN3] ) - return; - LOG_SOUND(("POKEY '%s' AUDF3 $%02x\n", p->device->tag(), data)); - p->AUDF[CHAN3] = data; - ch_mask = 1 << CHAN3; - - if( p->AUDCTL & CH34_JOINED ) /* if ch 3&4 tied together */ - ch_mask |= 1 << CHAN4; /* then also change on ch4 */ - break; - - case AUDC3_C: - if( data == p->AUDC[CHAN3] ) - return; - LOG_SOUND(("POKEY '%s' AUDC3 $%02x (%s)\n", p->device->tag(), data, audc2str(data))); - p->AUDC[CHAN3] = data; - ch_mask = 1 << CHAN3; - break; - - case AUDF4_C: - if( data == p->AUDF[CHAN4] ) - return; - LOG_SOUND(("POKEY '%s' AUDF4 $%02x\n", p->device->tag(), data)); - p->AUDF[CHAN4] = data; - ch_mask = 1 << CHAN4; - break; - - case AUDC4_C: - if( data == p->AUDC[CHAN4] ) - return; - LOG_SOUND(("POKEY '%s' AUDC4 $%02x (%s)\n", p->device->tag(), data, audc2str(data))); - p->AUDC[CHAN4] = data; - ch_mask = 1 << CHAN4; - break; - - case AUDCTL_C: - if( data == p->AUDCTL ) - return; - LOG_SOUND(("POKEY '%s' AUDCTL $%02x (%s)\n", p->device->tag(), data, audctl2str(data))); - p->AUDCTL = data; - ch_mask = 15; /* all channels */ - /* determine the base multiplier for the 'div by n' calculations */ - p->clockmult = (p->AUDCTL & CLK_15KHZ) ? DIV_15 : DIV_64; - break; - - case STIMER_C: - /* first remove any existing timers */ - LOG_TIMER(("POKEY '%s' STIMER $%02x\n", p->device->tag(), data)); - - p->timer[TIMER1]->adjust(attotime::never, p->timer_param[TIMER1]); - p->timer[TIMER2]->adjust(attotime::never, p->timer_param[TIMER2]); - p->timer[TIMER4]->adjust(attotime::never, p->timer_param[TIMER4]); - - /* reset all counters to zero (side effect) */ - - reset_channel(p, CHAN1); - reset_channel(p, CHAN2); - reset_channel(p, CHAN3); - reset_channel(p, CHAN4); - /* From the pokey documentation */ - p->output[CHAN1] = 0; - p->output[CHAN2] = 0; - p->output[CHAN3] = 0; - p->output[CHAN4] = 0; - p->filter_sample[CHAN1] = 1; - p->filter_sample[CHAN2] = 1; - p->filter_sample[CHAN3] = 0; - p->filter_sample[CHAN4] = 0; - - /* joined chan#1 and chan#2 ? */ - if( p->AUDCTL & CH12_JOINED ) - { - if( p->divisor[CHAN2] > 4 ) - { - LOG_TIMER(("POKEY '%s' timer1+2 after %d clocks\n", p->device->tag(), p->divisor[CHAN2])); - /* set timer #1 _and_ #2 event after timer_div clocks of joined CHAN1+CHAN2 */ - p->timer_period[TIMER2] = p->clock_period * p->divisor[CHAN2]; - p->timer_param[TIMER2] = IRQ_TIMR2|IRQ_TIMR1; - p->timer[TIMER2]->adjust(p->timer_period[TIMER2], p->timer_param[TIMER2], p->timer_period[TIMER2]); - } - } - else - { - if( p->divisor[CHAN1] > 4 ) - { - LOG_TIMER(("POKEY '%s' timer1 after %d clocks\n", p->device->tag(), p->divisor[CHAN1])); - /* set timer #1 event after timer_div clocks of CHAN1 */ - p->timer_period[TIMER1] = p->clock_period * p->divisor[CHAN1]; - p->timer_param[TIMER1] = IRQ_TIMR1; - p->timer[TIMER1]->adjust(p->timer_period[TIMER1], p->timer_param[TIMER1], p->timer_period[TIMER1]); - } - - if( p->divisor[CHAN2] > 4 ) - { - LOG_TIMER(("POKEY '%s' timer2 after %d clocks\n", p->device->tag(), p->divisor[CHAN2])); - /* set timer #2 event after timer_div clocks of CHAN2 */ - p->timer_period[TIMER2] = p->clock_period * p->divisor[CHAN2]; - p->timer_param[TIMER2] = IRQ_TIMR2; - p->timer[TIMER2]->adjust(p->timer_period[TIMER2], p->timer_param[TIMER2], p->timer_period[TIMER2]); - } - } - - /* Note: p[chip] does not have a timer #3 */ - - if( p->AUDCTL & CH34_JOINED ) - { - /* not sure about this: if audc4 == 0000xxxx don't start timer 4 ? */ - if( p->AUDC[CHAN4] & 0xf0 ) - { - if( p->divisor[CHAN4] > 4 ) - { - LOG_TIMER(("POKEY '%s' timer4 after %d clocks\n", p->device->tag(), p->divisor[CHAN4])); - /* set timer #4 event after timer_div clocks of CHAN4 */ - p->timer_period[TIMER4] = p->clock_period * p->divisor[CHAN4]; - p->timer_param[TIMER4] = IRQ_TIMR4; - p->timer[TIMER4]->adjust(p->timer_period[TIMER4], p->timer_param[TIMER4], p->timer_period[TIMER4]); - } - } - } - else - { - if( p->divisor[CHAN4] > 4 ) - { - LOG_TIMER(("POKEY '%s' timer4 after %d clocks\n", p->device->tag(), p->divisor[CHAN4])); - /* set timer #4 event after timer_div clocks of CHAN4 */ - p->timer_period[TIMER4] = p->clock_period * p->divisor[CHAN4]; - p->timer_param[TIMER4] = IRQ_TIMR4; - p->timer[TIMER4]->adjust(p->timer_period[TIMER4], p->timer_param[TIMER4], p->timer_period[TIMER4]); - } - } - - p->timer[TIMER1]->enable(p->IRQEN & IRQ_TIMR1); - p->timer[TIMER2]->enable(p->IRQEN & IRQ_TIMR2); - p->timer[TIMER4]->enable(p->IRQEN & IRQ_TIMR4); - break; - - case SKREST_C: - /* reset SKSTAT */ - LOG(("POKEY '%s' SKREST $%02x\n", p->device->tag(), data)); - p->SKSTAT &= ~(SK_FRAME|SK_OVERRUN|SK_KBERR); - break; - - case POTGO_C: - LOG(("POKEY '%s' POTGO $%02x\n", p->device->tag(), data)); - pokey_potgo(p); - break; - - case SEROUT_C: - LOG(("POKEY '%s' SEROUT $%02x\n", p->device->tag(), data)); - p->serout_w(offset, data); - p->SKSTAT |= SK_SEROUT; - /* - * These are arbitrary values, tested with some custom boot - * loaders from Ballblazer and Escape from Fractalus - * The real times are unknown - */ - device->machine().scheduler().timer_set(attotime::from_usec(200), FUNC(pokey_serout_ready_cb), 0, p); - /* 10 bits (assumption 1 start, 8 data and 1 stop bit) take how long? */ - device->machine().scheduler().timer_set(attotime::from_usec(2000), FUNC(pokey_serout_complete), 0, p); - break; - - case IRQEN_C: - LOG(("POKEY '%s' IRQEN $%02x\n", p->device->tag(), data)); - - /* acknowledge one or more IRQST bits ? */ - if( p->IRQST & ~data ) - { - /* reset IRQST bits that are masked now */ - p->IRQST &= data; - } - else - { - /* enable/disable timers now to avoid unneeded - breaking of the CPU cores for masked timers */ - if( p->timer[TIMER1] && ((p->IRQEN^data) & IRQ_TIMR1) ) - p->timer[TIMER1]->enable(data & IRQ_TIMR1); - if( p->timer[TIMER2] && ((p->IRQEN^data) & IRQ_TIMR2) ) - p->timer[TIMER2]->enable(data & IRQ_TIMR2); - if( p->timer[TIMER4] && ((p->IRQEN^data) & IRQ_TIMR4) ) - p->timer[TIMER4]->enable(data & IRQ_TIMR4); - } - /* store irq enable */ - p->IRQEN = data; - break; - - case SKCTL_C: - if( data == p->SKCTL ) - return; - LOG(("POKEY '%s' SKCTL $%02x\n", p->device->tag(), data)); - p->SKCTL = data; - if( !(data & SK_RESET) ) - { - pokey_w(device, IRQEN_C, 0); - pokey_w(device, SKREST_C, 0); - } - break; - } - - /************************************************************ - * As defined in the manual, the exact counter values are - * different depending on the frequency and resolution: - * 64 kHz or 15 kHz - AUDF + 1 - * 1.79 MHz, 8-bit - AUDF + 4 - * 1.79 MHz, 16-bit - AUDF[CHAN1]+256*AUDF[CHAN2] + 7 - ************************************************************/ - - /* only reset the channels that have changed */ - - if( ch_mask & (1 << CHAN1) ) - { - /* process channel 1 frequency */ - if( p->AUDCTL & CH1_HICLK ) - new_val = p->AUDF[CHAN1] + DIVADD_HICLK; - else - new_val = (p->AUDF[CHAN1] + DIVADD_LOCLK) * p->clockmult; - - LOG_SOUND(("POKEY '%s' chan1 %d\n", p->device->tag(), new_val)); - - p->volume[CHAN1] = (p->AUDC[CHAN1] & VOLUME_MASK) * POKEY_DEFAULT_GAIN; - p->divisor[CHAN1] = new_val; - if( p->interrupt_cb && p->timer[TIMER1] ) - p->timer[TIMER1]->adjust(p->clock_period * new_val, p->timer_param[TIMER1], p->timer_period[TIMER1]); - } - - if( ch_mask & (1 << CHAN2) ) - { - /* process channel 2 frequency */ - if( p->AUDCTL & CH12_JOINED ) - { - if( p->AUDCTL & CH1_HICLK ) - new_val = p->AUDF[CHAN2] * 256 + p->AUDF[CHAN1] + DIVADD_HICLK_JOINED; - else - new_val = (p->AUDF[CHAN2] * 256 + p->AUDF[CHAN1] + DIVADD_LOCLK) * p->clockmult; - LOG_SOUND(("POKEY '%s' chan1+2 %d\n", p->device->tag(), new_val)); - } - else - { - new_val = (p->AUDF[CHAN2] + DIVADD_LOCLK) * p->clockmult; - LOG_SOUND(("POKEY '%s' chan2 %d\n", p->device->tag(), new_val)); - } - - p->volume[CHAN2] = (p->AUDC[CHAN2] & VOLUME_MASK) * POKEY_DEFAULT_GAIN; - p->divisor[CHAN2] = new_val; - if( p->interrupt_cb && p->timer[TIMER2] ) - p->timer[TIMER2]->adjust(p->clock_period * new_val, p->timer_param[TIMER2], p->timer_period[TIMER2]); - } - - if( ch_mask & (1 << CHAN3) ) - { - /* process channel 3 frequency */ - if( p->AUDCTL & CH3_HICLK ) - new_val = p->AUDF[CHAN3] + DIVADD_HICLK; - else - new_val = (p->AUDF[CHAN3] + DIVADD_LOCLK) * p->clockmult; - - LOG_SOUND(("POKEY '%s' chan3 %d\n", p->device->tag(), new_val)); - - p->volume[CHAN3] = (p->AUDC[CHAN3] & VOLUME_MASK) * POKEY_DEFAULT_GAIN; - p->divisor[CHAN3] = new_val; - /* channel 3 does not have a timer associated */ - } - - if( ch_mask & (1 << CHAN4) ) - { - /* process channel 4 frequency */ - if( p->AUDCTL & CH34_JOINED ) - { - if( p->AUDCTL & CH3_HICLK ) - new_val = p->AUDF[CHAN4] * 256 + p->AUDF[CHAN3] + DIVADD_HICLK_JOINED; - else - new_val = (p->AUDF[CHAN4] * 256 + p->AUDF[CHAN3] + DIVADD_LOCLK) * p->clockmult; - LOG_SOUND(("POKEY '%s' chan3+4 %d\n", p->device->tag(), new_val)); - } - else - { - new_val = (p->AUDF[CHAN4] + DIVADD_LOCLK) * p->clockmult; - LOG_SOUND(("POKEY '%s' chan4 %d\n", p->device->tag(), new_val)); - } - - p->volume[CHAN4] = (p->AUDC[CHAN4] & VOLUME_MASK) * POKEY_DEFAULT_GAIN; - p->divisor[CHAN4] = new_val; - if( p->interrupt_cb && p->timer[TIMER4] ) - p->timer[TIMER4]->adjust(p->clock_period * new_val, p->timer_param[TIMER4], p->timer_period[TIMER4]); - } -} - -WRITE8_HANDLER( quad_pokey_w ) -{ - static const char *const devname[4] = { "pokey1", "pokey2", "pokey3", "pokey4" }; - int pokey_num = (offset >> 3) & ~0x04; - int control = (offset & 0x20) >> 2; - int pokey_reg = (offset % 8) | control; - - pokey_w(space->machine().device(devname[pokey_num]), pokey_reg, data); -} - -void pokey_serin_ready(device_t *device, int after) -{ - pokey_state *p = get_safe_token(device); - device->machine().scheduler().timer_set(p->clock_period * after, FUNC(pokey_serin_ready_cb), 0, p); -} - -void pokey_break_w(device_t *device, int shift) -{ - pokey_state *p = get_safe_token(device); - if( shift ) /* shift code ? */ - p->SKSTAT |= SK_SHIFT; - else - p->SKSTAT &= ~SK_SHIFT; - /* check if the break IRQ is enabled */ - if( p->IRQEN & IRQ_BREAK ) - { - /* set break IRQ status and call back the interrupt handler */ - p->IRQST |= IRQ_BREAK; - if( p->interrupt_cb ) - (*p->interrupt_cb)(device, IRQ_BREAK); - } -} +/* Four channels with a range of 0..32767 and volume 0..15 */ +//#define POKEY_DEFAULT_GAIN (32767/15/4) -void pokey_kbcode_w(device_t *device, int kbcode, int make) -{ - pokey_state *p = get_safe_token(device); - /* make code ? */ - if( make ) - { - p->KBCODE = kbcode; - p->SKSTAT |= SK_KEYBD; - if( kbcode & 0x40 ) /* shift code ? */ - p->SKSTAT |= SK_SHIFT; - else - p->SKSTAT &= ~SK_SHIFT; +/* + * But we raise the gain and risk clipping, the old Pokey did + * this too. It defined POKEY_DEFAULT_GAIN 6 and this was + * 6 * 15 * 4 = 360, 360/256 = 1.40625 + * I use 15/11 = 1.3636, so this is a little lower. + */ - if( p->IRQEN & IRQ_KEYBD ) - { - /* last interrupt not acknowledged ? */ - if( p->IRQST & IRQ_KEYBD ) - p->SKSTAT |= SK_KBERR; - p->IRQST |= IRQ_KEYBD; - if( p->interrupt_cb ) - (*p->interrupt_cb)(device, IRQ_KEYBD); - } - } - else - { - p->KBCODE = kbcode; - p->SKSTAT &= ~SK_KEYBD; - } -} +#define POKEY_DEFAULT_GAIN (32767/11/4) +#define VERBOSE 1 +#define VERBOSE_SOUND 0 +#define VERBOSE_TIMER 1 +#define VERBOSE_POLY 0 +#define VERBOSE_RAND 0 +#define LOG(x) do { if (VERBOSE) logerror x; } while (0) +#define LOG_SOUND(x) do { if (VERBOSE_SOUND) logerror x; } while (0) -/************************************************************************** - * Generic get_info - **************************************************************************/ +#define LOG_TIMER(x) do { if (VERBOSE_TIMER) logerror x; } while (0) -DEVICE_GET_INFO( pokey ) -{ - switch (state) - { - /* --- the following bits of info are returned as 64-bit signed integers --- */ - case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(pokey_state); break; - - /* --- the following bits of info are returned as pointers to data or functions --- */ - case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( pokey ); break; - case DEVINFO_FCT_STOP: /* Nothing */ break; - case DEVINFO_FCT_RESET: /* Nothing */ break; - - /* --- the following bits of info are returned as NULL-terminated strings --- */ - case DEVINFO_STR_NAME: strcpy(info->s, "POKEY"); break; - case DEVINFO_STR_FAMILY: strcpy(info->s, "Atari custom"); break; - case DEVINFO_STR_VERSION: strcpy(info->s, "4.6"); break; - case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; - case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break; - } -} +#define LOG_POLY(x) do { if (VERBOSE_POLY) logerror x; } while (0) -#ifdef OLDDEVICE_FOR_MESS +#define LOG_RAND(x) do { if (VERBOSE_RAND) logerror x; } while (0) -DEFINE_LEGACY_SOUND_DEVICE(POKEY, pokey); +#define CHAN1 0 +#define CHAN2 1 +#define CHAN3 2 +#define CHAN4 3 -#endif +#define TIMER1 0 +#define TIMER2 1 +#define TIMER4 2 +/* values to add to the divisors for the different modes */ +#define DIVADD_LOCLK 1 +#define DIVADD_HICLK 4 +#define DIVADD_HICLK_JOINED 7 +/* AUDCx */ +#define NOTPOLY5 0x80 /* selects POLY5 or direct CLOCK */ +#define POLY4 0x40 /* selects POLY4 or POLY17 */ +#define PURE 0x20 /* selects POLY4/17 or PURE tone */ +#define VOLUME_ONLY 0x10 /* selects VOLUME OUTPUT ONLY */ +#define VOLUME_MASK 0x0f /* volume mask */ +/* AUDCTL */ +#define POLY9 0x80 /* selects POLY9 or POLY17 */ +#define CH1_HICLK 0x40 /* selects 1.78979 MHz for Ch 1 */ +#define CH3_HICLK 0x20 /* selects 1.78979 MHz for Ch 3 */ +#define CH12_JOINED 0x10 /* clocks channel 1 w/channel 2 */ +#define CH34_JOINED 0x08 /* clocks channel 3 w/channel 4 */ +#define CH1_FILTER 0x04 /* selects channel 1 high pass filter */ +#define CH2_FILTER 0x02 /* selects channel 2 high pass filter */ +#define CLK_15KHZ 0x01 /* selects 15.6999 kHz or 63.9211 kHz */ +/* IRQEN (D20E) */ +#define IRQ_BREAK 0x80 /* BREAK key pressed interrupt */ +#define IRQ_KEYBD 0x40 /* keyboard data ready interrupt */ +#define IRQ_SERIN 0x20 /* serial input data ready interrupt */ +#define IRQ_SEROR 0x10 /* serial output register ready interrupt */ +#define IRQ_SEROC 0x08 /* serial output complete interrupt */ +#define IRQ_TIMR4 0x04 /* timer channel #4 interrupt */ +#define IRQ_TIMR2 0x02 /* timer channel #2 interrupt */ +#define IRQ_TIMR1 0x01 /* timer channel #1 interrupt */ +/* SKSTAT (R/D20F) */ +#define SK_FRAME 0x80 /* serial framing error */ +#define SK_OVERRUN 0x40 /* serial overrun error */ +#define SK_KBERR 0x20 /* keyboard overrun error */ +#define SK_SERIN 0x10 /* serial input high */ +#define SK_SHIFT 0x08 /* shift key pressed */ +#define SK_KEYBD 0x04 /* keyboard key pressed */ +#define SK_SEROUT 0x02 /* serial output active */ +/* SKCTL (W/D20F) */ +#define SK_BREAK 0x80 /* serial out break signal */ +#define SK_BPS 0x70 /* bits per second */ +#define SK_FM 0x08 /* FM mode */ +#define SK_PADDLE 0x04 /* fast paddle a/d conversion */ +#define SK_RESET 0x03 /* reset serial/keyboard interface */ +#define DIV_64 28 /* divisor for 1.78979 MHz clock to 63.9211 kHz */ +#define DIV_15 114 /* divisor for 1.78979 MHz clock to 15.6999 kHz */ +#define P4(chip) chip->poly4[chip->p4] +#define P5(chip) chip->poly5[chip->p5] +#define P9(chip) chip->poly9[chip->p9] +#define P17(chip) chip->poly17[chip->p17] +#define CLK_1 0 +#define CLK_28 1 +#define CLK_114 2 +static const int clock_divisors[3] = {1, 28, 114}; @@ -1344,16 +232,9 @@ void pokeyn_device::device_start() m_timer[2] = timer_alloc(1); /* reset more internal state */ - for (i=0; i<4; i++) + for (i=0; i<3; i++) { - m_AUDC[i] = 0; - m_AUDF[i] = 0; - m_volume[i] = 0; - m_borrow_cnt[i] = 0; - m_counter[i] = 0; - if (i<3) m_clock_cnt[i] = 0; - m_filter_sample[i] = 0; - m_output[i] = 0; + m_clock_cnt[i] = 0; } for (i=0; i<8; i++) @@ -1368,13 +249,18 @@ void pokeyn_device::device_start() m_stream = stream_alloc(0, 1, clock()); - save_item(NAME(m_counter)); + for (i=0; i 0x7fff) ? 0x7fff : sum; - samples--; + *buffer++ = (sum > 0x7fff) ? 0x7fff : sum; + samples--; } m_rtimer->adjust(attotime::never); @@ -1791,44 +664,44 @@ void pokeyn_device::write(offs_t offset, UINT8 data) switch (offset & 15) { case AUDF1_C: - if( data == m_AUDF[CHAN1] ) + if( data == m_channel[CHAN1].m_AUDF ) return; LOG_SOUND(("POKEY '%s' AUDF1 $%02x\n", tag(), data)); - m_AUDF[CHAN1] = data; + m_channel[CHAN1].m_AUDF = data; ch_mask = 1 << CHAN1; if( m_AUDCTL & CH12_JOINED ) /* if ch 1&2 tied together */ ch_mask |= 1 << CHAN2; /* then also change on ch2 */ break; case AUDC1_C: - if( data == m_AUDC[CHAN1] ) + if( data == m_channel[CHAN1].m_AUDC ) return; LOG_SOUND(("POKEY '%s' AUDC1 $%02x (%s)\n", tag(), data, audc2str(data))); - m_AUDC[CHAN1] = data; + m_channel[CHAN1].m_AUDC = data; ch_mask = 1 << CHAN1; break; case AUDF2_C: - if( data == m_AUDF[CHAN2] ) + if( data == m_channel[CHAN2].m_AUDF ) return; LOG_SOUND(("POKEY '%s' AUDF2 $%02x\n", tag(), data)); - m_AUDF[CHAN2] = data; + m_channel[CHAN2].m_AUDF = data; ch_mask = 1 << CHAN2; break; case AUDC2_C: - if( data == m_AUDC[CHAN2] ) + if( data == m_channel[CHAN2].m_AUDC ) return; LOG_SOUND(("POKEY '%s' AUDC2 $%02x (%s)\n", tag(), data, audc2str(data))); - m_AUDC[CHAN2] = data; + m_channel[CHAN2].m_AUDC = data; ch_mask = 1 << CHAN2; break; case AUDF3_C: - if( data == m_AUDF[CHAN3] ) + if( data == m_channel[CHAN3].m_AUDF ) return; LOG_SOUND(("POKEY '%s' AUDF3 $%02x\n", tag(), data)); - m_AUDF[CHAN3] = data; + m_channel[CHAN3].m_AUDF = data; ch_mask = 1 << CHAN3; if( m_AUDCTL & CH34_JOINED ) /* if ch 3&4 tied together */ @@ -1836,26 +709,26 @@ void pokeyn_device::write(offs_t offset, UINT8 data) break; case AUDC3_C: - if( data == m_AUDC[CHAN3] ) + if( data == m_channel[CHAN3].m_AUDC ) return; LOG_SOUND(("POKEY '%s' AUDC3 $%02x (%s)\n", tag(), data, audc2str(data))); - m_AUDC[CHAN3] = data; + m_channel[CHAN3].m_AUDC = data; ch_mask = 1 << CHAN3; break; case AUDF4_C: - if( data == m_AUDF[CHAN4] ) + if( data == m_channel[CHAN4].m_AUDF ) return; LOG_SOUND(("POKEY '%s' AUDF4 $%02x\n", tag(), data)); - m_AUDF[CHAN4] = data; + m_channel[CHAN4].m_AUDF = data; ch_mask = 1 << CHAN4; break; case AUDC4_C: - if( data == m_AUDC[CHAN4] ) + if( data == m_channel[CHAN4].m_AUDC ) return; LOG_SOUND(("POKEY '%s' AUDC4 $%02x (%s)\n", tag(), data, audc2str(data))); - m_AUDC[CHAN4] = data; + m_channel[CHAN4].m_AUDC = data; ch_mask = 1 << CHAN4; break; @@ -1877,21 +750,16 @@ void pokeyn_device::write(offs_t offset, UINT8 data) m_timer[TIMER2]->adjust(attotime::never, m_timer_param[TIMER2]); m_timer[TIMER4]->adjust(attotime::never, m_timer_param[TIMER4]); - /* reset all counters to zero (side effect) */ - reset_channel(CHAN1); - reset_channel(CHAN2); - reset_channel(CHAN3); - reset_channel(CHAN4); /* From the pokey documentation */ - m_output[CHAN1] = 0; - m_output[CHAN2] = 0; - m_output[CHAN3] = 0; - m_output[CHAN4] = 0; - m_filter_sample[CHAN1] = 1; - m_filter_sample[CHAN2] = 1; - m_filter_sample[CHAN3] = 0; - m_filter_sample[CHAN4] = 0; - /* joined chan#1 and chan#2 ? */ + /* reset all counters to zero (side effect) */ + for (int i = 0; i < POKEY_CHANNELS; i++) + { + m_channel[i].reset_channel(); + m_channel[i].m_output = 0; + m_channel[i].m_filter_sample = (i<2 ? 1 : 0); + } + + /* joined chan#1 and chan#2 ? */ if( m_AUDCTL & CH12_JOINED ) { if( m_divisor[CHAN2] > 4 ) @@ -1929,7 +797,7 @@ void pokeyn_device::write(offs_t offset, UINT8 data) if( m_AUDCTL & CH34_JOINED ) { /* not sure about this: if audc4 == 0000xxxx don't start timer 4 ? */ - if( m_AUDC[CHAN4] & 0xf0 ) + if( m_channel[CHAN4].m_AUDC & 0xf0 ) { if( m_divisor[CHAN4] > 4 ) { @@ -2034,13 +902,13 @@ void pokeyn_device::write(offs_t offset, UINT8 data) { /* process channel 1 frequency */ if( m_AUDCTL & CH1_HICLK ) - new_val = m_AUDF[CHAN1] + DIVADD_HICLK; + new_val = m_channel[CHAN1].m_AUDF + DIVADD_HICLK; else - new_val = (m_AUDF[CHAN1] + DIVADD_LOCLK) * m_clockmult; + new_val = (m_channel[CHAN1].m_AUDF + DIVADD_LOCLK) * m_clockmult; LOG_SOUND(("POKEY '%s' chan1 %d\n", tag(), new_val)); - m_volume[CHAN1] = (m_AUDC[CHAN1] & VOLUME_MASK) * POKEY_DEFAULT_GAIN; + m_channel[CHAN1].m_volume = (m_channel[CHAN1].m_AUDC & VOLUME_MASK) * POKEY_DEFAULT_GAIN; m_divisor[CHAN1] = new_val; if( m_interrupt_cb && m_timer[TIMER1] ) m_timer[TIMER1]->adjust(m_clock_period * new_val, m_timer_param[TIMER1], m_timer_period[TIMER1]); @@ -2052,18 +920,18 @@ void pokeyn_device::write(offs_t offset, UINT8 data) if( m_AUDCTL & CH12_JOINED ) { if( m_AUDCTL & CH1_HICLK ) - new_val = m_AUDF[CHAN2] * 256 + m_AUDF[CHAN1] + DIVADD_HICLK_JOINED; + new_val = m_channel[CHAN2].m_AUDF * 256 + m_channel[CHAN1].m_AUDF + DIVADD_HICLK_JOINED; else - new_val = (m_AUDF[CHAN2] * 256 + m_AUDF[CHAN1] + DIVADD_LOCLK) * m_clockmult; + new_val = (m_channel[CHAN2].m_AUDF * 256 + m_channel[CHAN1].m_AUDF + DIVADD_LOCLK) * m_clockmult; LOG_SOUND(("POKEY '%s' chan1+2 %d\n", tag(), new_val)); } else { - new_val = (m_AUDF[CHAN2] + DIVADD_LOCLK) * m_clockmult; + new_val = (m_channel[CHAN2].m_AUDF + DIVADD_LOCLK) * m_clockmult; LOG_SOUND(("POKEY '%s' chan2 %d\n", tag(), new_val)); } - m_volume[CHAN2] = (m_AUDC[CHAN2] & VOLUME_MASK) * POKEY_DEFAULT_GAIN; + m_channel[CHAN2].m_volume = (m_channel[CHAN2].m_AUDC & VOLUME_MASK) * POKEY_DEFAULT_GAIN; m_divisor[CHAN2] = new_val; if( m_interrupt_cb && m_timer[TIMER2] ) m_timer[TIMER2]->adjust(m_clock_period * new_val, m_timer_param[TIMER2], m_timer_period[TIMER2]); @@ -2073,13 +941,13 @@ void pokeyn_device::write(offs_t offset, UINT8 data) { /* process channel 3 frequency */ if( m_AUDCTL & CH3_HICLK ) - new_val = m_AUDF[CHAN3] + DIVADD_HICLK; + new_val = m_channel[CHAN3].m_AUDF + DIVADD_HICLK; else - new_val = (m_AUDF[CHAN3] + DIVADD_LOCLK) * m_clockmult; + new_val = (m_channel[CHAN3].m_AUDF + DIVADD_LOCLK) * m_clockmult; LOG_SOUND(("POKEY '%s' chan3 %d\n", tag(), new_val)); - m_volume[CHAN3] = (m_AUDC[CHAN3] & VOLUME_MASK) * POKEY_DEFAULT_GAIN; + m_channel[CHAN3].m_volume = (m_channel[CHAN3].m_AUDC & VOLUME_MASK) * POKEY_DEFAULT_GAIN; m_divisor[CHAN3] = new_val; /* channel 3 does not have a timer associated */ } @@ -2090,18 +958,18 @@ void pokeyn_device::write(offs_t offset, UINT8 data) if( m_AUDCTL & CH34_JOINED ) { if( m_AUDCTL & CH3_HICLK ) - new_val = m_AUDF[CHAN4] * 256 + m_AUDF[CHAN3] + DIVADD_HICLK_JOINED; + new_val = m_channel[CHAN4].m_AUDF * 256 + m_channel[CHAN3].m_AUDF + DIVADD_HICLK_JOINED; else - new_val = (m_AUDF[CHAN4] * 256 + m_AUDF[CHAN3] + DIVADD_LOCLK) * m_clockmult; + new_val = (m_channel[CHAN4].m_AUDF * 256 + m_channel[CHAN3].m_AUDF + DIVADD_LOCLK) * m_clockmult; LOG_SOUND(("POKEY '%s' chan3+4 %d\n", tag(), new_val)); } else { - new_val = (m_AUDF[CHAN4] + DIVADD_LOCLK) * m_clockmult; + new_val = (m_channel[CHAN4].m_AUDF + DIVADD_LOCLK) * m_clockmult; LOG_SOUND(("POKEY '%s' chan4 %d\n", tag(), new_val)); } - m_volume[CHAN4] = (m_AUDC[CHAN4] & VOLUME_MASK) * POKEY_DEFAULT_GAIN; + m_channel[CHAN4].m_volume = (m_channel[CHAN4].m_AUDC & VOLUME_MASK) * POKEY_DEFAULT_GAIN; m_divisor[CHAN4] = new_val; if( m_interrupt_cb && m_timer[TIMER4] ) m_timer[TIMER4]->adjust(m_clock_period * new_val, m_timer_param[TIMER4], m_timer_period[TIMER4]); @@ -2168,58 +1036,28 @@ inline void pokeyn_device::process_channel(int ch) { int toggle = 0; - if( (m_AUDC[ch] & NOTPOLY5) || (m_poly5[m_p5] & 1) ) + if( (m_channel[ch].m_AUDC & NOTPOLY5) || (m_poly5[m_p5] & 1) ) { - if( m_AUDC[ch] & PURE ) + if( m_channel[ch].m_AUDC & PURE ) toggle = 1; else - if( m_AUDC[ch] & POLY4 ) - toggle = m_output[ch] == !(m_poly4[m_p4] & 1); + if( m_channel[ch].m_AUDC & POLY4 ) + toggle = m_channel[ch].m_output == !(m_poly4[m_p4] & 1); else if( m_AUDCTL & POLY9 ) - toggle = m_output[ch] == !(m_poly9[m_p9] & 1); + toggle = m_channel[ch].m_output == !(m_poly9[m_p9] & 1); else - toggle = m_output[ch] == !(m_poly17[m_p17] & 1); + toggle = m_channel[ch].m_output == !(m_poly17[m_p17] & 1); } if( toggle ) { - m_output[ch] ^= 1; + m_channel[ch].m_output ^= 1; } - /* is this a filtering channel (3/4) and is the filter active? */ - - if( m_AUDCTL & ((CH1_FILTER|CH2_FILTER) & (0x10 >> ch)) ) - { - if( ch >= 2) - { - m_filter_sample[ch-2] = m_output[ch-2]; - } - } - } -inline void pokeyn_device::reset_channel(int ch) -{ - m_counter[ch] = m_AUDF[ch] ^ 0xff; -} -inline void pokeyn_device::inc_chan(int ch) -{ - m_counter[ch] = (m_counter[ch] + 1) & 0xff; - if (m_counter[ch] == 0 && m_borrow_cnt[ch] == 0) - m_borrow_cnt[ch] = 3; -} - -inline int pokeyn_device::check_borrow(int ch) -{ - if (m_borrow_cnt[ch] > 0) - { - m_borrow_cnt[ch]--; - return (m_borrow_cnt[ch] == 0); - } - return 0; -} void pokeyn_device::pokey_potgo(void) { @@ -2309,6 +1147,67 @@ void pokeyn_device::poly_init_9_17(UINT32 *poly, int size) } +char *pokeyn_device::audc2str(int val) +{ + static char buff[80]; + if( val & NOTPOLY5 ) + { + if( val & PURE ) + strcpy(buff,"pure"); + else + if( val & POLY4 ) + strcpy(buff,"poly4"); + else + strcpy(buff,"poly9/17"); + } + else + { + if( val & PURE ) + strcpy(buff,"poly5"); + else + if( val & POLY4 ) + strcpy(buff,"poly4+poly5"); + else + strcpy(buff,"poly9/17+poly5"); + } + return buff; +} + +char *pokeyn_device::audctl2str(int val) +{ + static char buff[80]; + if( val & POLY9 ) + strcpy(buff,"poly9"); + else + strcpy(buff,"poly17"); + if( val & CH1_HICLK ) + strcat(buff,"+ch1hi"); + if( val & CH3_HICLK ) + strcat(buff,"+ch3hi"); + if( val & CH12_JOINED ) + strcat(buff,"+ch1/2"); + if( val & CH34_JOINED ) + strcat(buff,"+ch3/4"); + if( val & CH1_FILTER ) + strcat(buff,"+ch1filter"); + if( val & CH2_FILTER ) + strcat(buff,"+ch2filter"); + if( val & CLK_15KHZ ) + strcat(buff,"+clk15"); + return buff; +} + +pokeyn_device::pokey_channel::pokey_channel() + : m_AUDF(0), + m_AUDC(0), + m_borrow_cnt(0), + m_counter(0), + m_volume(0), + m_output(0), + m_filter_sample(0) +{ +} + //------------------------------------------------- // Quad Pokey support - should be in game drivers, really //------------------------------------------------- diff --git a/src/emu/sound/pokey.h b/src/emu/sound/pokey.h index d626339f6c..16ccfae624 100644 --- a/src/emu/sound/pokey.h +++ b/src/emu/sound/pokey.h @@ -30,38 +30,6 @@ /* CONSTANT DEFINITIONS */ -/* POKEY WRITE LOGICALS */ -#define AUDF1_C 0x00 -#define AUDC1_C 0x01 -#define AUDF2_C 0x02 -#define AUDC2_C 0x03 -#define AUDF3_C 0x04 -#define AUDC3_C 0x05 -#define AUDF4_C 0x06 -#define AUDC4_C 0x07 -#define AUDCTL_C 0x08 -#define STIMER_C 0x09 -#define SKREST_C 0x0A -#define POTGO_C 0x0B -#define SEROUT_C 0x0D -#define IRQEN_C 0x0E -#define SKCTL_C 0x0F - -/* POKEY READ LOGICALS */ -#define POT0_C 0x00 -#define POT1_C 0x01 -#define POT2_C 0x02 -#define POT3_C 0x03 -#define POT4_C 0x04 -#define POT5_C 0x05 -#define POT6_C 0x06 -#define POT7_C 0x07 -#define ALLPOT_C 0x08 -#define KBCODE_C 0x09 -#define RANDOM_C 0x0A -#define SERIN_C 0x0D -#define IRQST_C 0x0E -#define SKSTAT_C 0x0F /* exact 1.79 MHz clock freq (of the Atari 800 that is) */ #define FREQ_17_EXACT 1789790 @@ -75,6 +43,8 @@ * New function pointers for serial input/output and a interrupt callback. *****************************************************************************/ +class pokeyn_device; + typedef struct _pokey_interface pokey_interface; struct _pokey_interface { @@ -82,24 +52,9 @@ struct _pokey_interface devcb_read8 allpot_r; devcb_read8 serin_r; devcb_write8 serout_w; - void (*interrupt_cb)(device_t *device, int mask); + void (*interrupt_cb)(pokeyn_device *device, int mask); }; -#ifdef OLDDEVICE_FOR_MESS -READ8_DEVICE_HANDLER( pokey_r ); -WRITE8_DEVICE_HANDLER( pokey_w ); - -/* fix me: eventually this should be a single device with pokey subdevices */ -READ8_HANDLER( quad_pokey_r ); -WRITE8_HANDLER( quad_pokey_w ); - -void pokey_serin_ready (device_t *device, int after); -void pokey_break_w (device_t *device, int shift); -void pokey_kbcode_w (device_t *device, int kbcode, int make); - -DECLARE_LEGACY_SOUND_DEVICE(POKEY, pokey); - -#endif //************************************************************************** // TYPE DEFINITIONS @@ -114,6 +69,46 @@ class pokeyn_device : public device_t, #endif { public: + + enum + { + /* POKEY WRITE LOGICALS */ + AUDF1_C = 0x00, + AUDC1_C = 0x01, + AUDF2_C = 0x02, + AUDC2_C = 0x03, + AUDF3_C = 0x04, + AUDC3_C = 0x05, + AUDF4_C = 0x06, + AUDC4_C = 0x07, + AUDCTL_C = 0x08, + STIMER_C = 0x09, + SKREST_C = 0x0A, + POTGO_C = 0x0B, + SEROUT_C = 0x0D, + IRQEN_C = 0x0E, + SKCTL_C = 0x0F + }; + + enum + { + /* POKEY READ LOGICALS */ + POT0_C = 0x00, + POT1_C = 0x01, + POT2_C = 0x02, + POT3_C = 0x03, + POT4_C = 0x04, + POT5_C = 0x05, + POT6_C = 0x06, + POT7_C = 0x07, + ALLPOT_C = 0x08, + KBCODE_C = 0x09, + RANDOM_C = 0x0A, + SERIN_C = 0x0D, + IRQST_C = 0x0E, + SKSTAT_C = 0x0F + }; + // construction/destruction pokeyn_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); @@ -150,25 +145,54 @@ class pokeyn_device : public device_t, private: + + class pokey_channel + { + public: + pokey_channel(); + UINT8 m_AUDF; /* AUDFx (D200, D202, D204, D206) */ + UINT8 m_AUDC; /* AUDCx (D201, D203, D205, D207) */ + INT32 m_borrow_cnt; /* borrow counter */ + INT32 m_counter; /* channel counter */ + UINT32 m_volume; /* channel volume - derived */ + UINT8 m_output; /* channel output signal (1 active, 0 inactive) */ + UINT8 m_filter_sample; /* high-pass filter sample */ + + inline void sample(void) { m_filter_sample = m_output; } + inline void reset_channel(void) { m_counter = m_AUDF ^ 0xff; } + inline void inc_chan(void) + { + m_counter = (m_counter + 1) & 0xff; + if (m_counter == 0 && m_borrow_cnt == 0) + m_borrow_cnt = 3; + } + inline int check_borrow() + { + if (m_borrow_cnt > 0) + { + m_borrow_cnt--; + return (m_borrow_cnt == 0); + } + return 0; + } + }; + + static const int POKEY_CHANNELS = 4; + void poly_init_4_5(UINT32 *poly, int size, int xorbit, int invert); void poly_init_9_17(UINT32 *poly, int size); inline void process_channel(int ch); - inline void reset_channel(int ch); - inline void inc_chan(int ch); - inline int check_borrow(int ch); void pokey_potgo(void); + char *audc2str(int val); + char *audctl2str(int val); // internal state sound_stream* m_stream; - INT32 m_clock_cnt[3]; /* clock counters */ - INT32 m_borrow_cnt[4]; /* borrow counters */ + pokey_channel m_channel[POKEY_CHANNELS]; - INT32 m_counter[4]; /* channel counter */ INT32 m_divisor[4]; /* channel divisor (modulo value) */ - UINT32 m_volume[4]; /* channel volume - derived */ - UINT8 m_output[4]; /* channel output signal (1 active, 0 inactive) */ - UINT8 m_filter_sample[4]; /* hi-pass filter sample */ + INT32 m_clock_cnt[3]; /* clock counters */ UINT32 m_p4; /* poly4 index */ UINT32 m_p5; /* poly5 index */ UINT32 m_p9; /* poly9 index */ @@ -185,9 +209,7 @@ class pokeyn_device : public device_t, devcb_resolved_read8 m_allpot_r; devcb_resolved_read8 m_serin_r; devcb_resolved_write8 m_serout_w; - void (*m_interrupt_cb)(device_t *device, int mask); - UINT8 m_AUDF[4]; /* AUDFx (D200, D202, D204, D206) */ - UINT8 m_AUDC[4]; /* AUDCx (D201, D203, D205, D207) */ + void (*m_interrupt_cb)(pokeyn_device *device, int mask); UINT8 m_POTx[8]; /* POTx (R/D200-D207) */ UINT8 m_AUDCTL; /* AUDCTL (W/D208) */ UINT8 m_ALLPOT; /* ALLPOT (R/D208) */ diff --git a/src/emu/sound/tc8830f.c b/src/emu/sound/tc8830f.c index 7426d88999..cf855c8ee0 100644 --- a/src/emu/sound/tc8830f.c +++ b/src/emu/sound/tc8830f.c @@ -2,7 +2,7 @@ tc8830f.c - Toshiba TC8830F, CMOS voice recording/reproducing LSI 1-bit ADM (Adaptive Delta Modulation), similar to TC8801 and T6668. - + Very preliminary... TODO: @@ -36,7 +36,7 @@ void tc8830f_device::device_start() m_mem_base = (UINT8 *)device().machine().root_device().memregion(":tc8830f")->base(); m_mem_mask = device().machine().root_device().memregion(":tc8830f")->bytes() - 1; - + // register for savestates save_item(NAME(m_playing)); save_item(NAME(m_address)); @@ -46,7 +46,7 @@ void tc8830f_device::device_start() save_item(NAME(m_command)); save_item(NAME(m_cmd_rw)); save_item(NAME(m_phrase)); - + reset(); } @@ -81,7 +81,7 @@ void tc8830f_device::sound_stream_update(sound_stream &stream, stream_sample_t * if (m_address == m_stop_address) m_playing = false; } - + // compute sample // this is a placeholder until ADM is implemented mix = bit * 0x7fff; @@ -111,7 +111,7 @@ void tc8830f_device::write_p(UINT8 data) { m_stream->update(); data &= 0xf; - + if (m_cmd_rw == 0) { // select command @@ -138,13 +138,13 @@ void tc8830f_device::write_p(UINT8 data) case 0x8: case 0x9: case 0xa: case 0xb: logerror("tc8830f: Unemulated command %X\n", m_command); break; - + default: logerror("tc8830f: Invalid command %X\n", m_command); break; } } - + else { // write command @@ -170,14 +170,14 @@ void tc8830f_device::write_p(UINT8 data) m_cmd_rw = -1; } break; - + case 0x6: // CNDT: d0-d1: bitrate, d2: enable overflow m_bitrate = data & 3; device_clock_changed(); m_cmd_rw = -1; break; - + case 0x7: // LABEL: set phrase if (m_cmd_rw == 1) @@ -199,7 +199,7 @@ void tc8830f_device::write_p(UINT8 data) m_cmd_rw = -1; } break; - + default: m_cmd_rw = -1; break; diff --git a/src/emu/sound/tc8830f.h b/src/emu/sound/tc8830f.h index 2320093831..193dfda038 100644 --- a/src/emu/sound/tc8830f.h +++ b/src/emu/sound/tc8830f.h @@ -54,7 +54,7 @@ class tc8830f_device : public device_t, UINT8 m_command; int m_cmd_rw; UINT8 m_phrase; - + UINT8 *m_mem_base; UINT32 m_mem_mask; }; diff --git a/src/emu/timer.c b/src/emu/timer.c index 607e4eaad3..191377610f 100644 --- a/src/emu/timer.c +++ b/src/emu/timer.c @@ -199,10 +199,10 @@ void timer_device::device_validity_check(validity_checker &valid) const mame_printf_warning("Scanline timer specified parameters for a periodic timer\n"); if (m_param != 0) mame_printf_warning("Scanline timer specified parameter which is ignored\n"); -// if (m_first_vpos < 0) -// mame_printf_error("Scanline timer specified invalid initial position\n"); -// if (m_increment < 0) -// mame_printf_error("Scanline timer specified invalid increment\n"); +// if (m_first_vpos < 0) +// mame_printf_error("Scanline timer specified invalid initial position\n"); +// if (m_increment < 0) +// mame_printf_error("Scanline timer specified invalid increment\n"); break; default: diff --git a/src/ldplayer/ldplayer.c b/src/ldplayer/ldplayer.c index 95c052e5e5..f2af0b4578 100644 --- a/src/ldplayer/ldplayer.c +++ b/src/ldplayer/ldplayer.c @@ -402,7 +402,7 @@ void pr8210_state::device_timer(emu_timer &timer, device_timer_id id, int param, // if we have bits, process if (bitsleft != 0) { - // assert the line and set a timer for deassertion + // assert the line and set a timer for deassertion m_laserdisc->control_w(ASSERT_LINE); timer_set(attotime::from_usec(250), TIMER_ID_BIT_OFF); @@ -437,7 +437,7 @@ void pr8210_state::device_timer(emu_timer &timer, device_timer_id id, int param, void pr8210_state::machine_start() { ldplayer_state::machine_start(); - m_bit_timer = timer_alloc(TIMER_ID_BIT); + m_bit_timer = timer_alloc(TIMER_ID_BIT); } void pr8210_state::machine_reset() diff --git a/src/mame/drivers/bzone.c b/src/mame/drivers/bzone.c index 004d12b3a7..6b7cdee261 100644 --- a/src/mame/drivers/bzone.c +++ b/src/mame/drivers/bzone.c @@ -309,7 +309,7 @@ static ADDRESS_MAP_START( bzone_map, AS_PROGRAM, 8, bzone_state ) AM_RANGE(0x1800, 0x1800) AM_DEVREAD_LEGACY("mathbox", mathbox_status_r) AM_RANGE(0x1810, 0x1810) AM_DEVREAD_LEGACY("mathbox", mathbox_lo_r) AM_RANGE(0x1818, 0x1818) AM_DEVREAD_LEGACY("mathbox", mathbox_hi_r) -// AM_RANGE(0x1820, 0x182f) AM_DEVREADWRITE_LEGACY("pokey", pokey_r, pokey_w) +// AM_RANGE(0x1820, 0x182f) AM_DEVREADWRITE_LEGACY("pokey", pokey_r, pokey_w) AM_RANGE(0x1820, 0x182f) AM_DEVREADWRITE("pokey", pokeyn_device, read, write) AM_RANGE(0x1840, 0x1840) AM_DEVWRITE_LEGACY("discrete", bzone_sounds_w) AM_RANGE(0x1860, 0x187f) AM_DEVWRITE_LEGACY("mathbox", mathbox_go_w) diff --git a/src/mame/drivers/chance32.c b/src/mame/drivers/chance32.c index 3450730808..5bbfb4f8d5 100644 --- a/src/mame/drivers/chance32.c +++ b/src/mame/drivers/chance32.c @@ -1,22 +1,27 @@ -/* +/********************************************************* -Chance 32 - Poker Game by PAL Company + Chance 32 -1x HD46505SP / HD6845SP -1x Z84C0008PEC + PAL System Co, Ltd. + Osaka, Japan. -XTAL: 12.000 Mhz + Driver by David Haywood, Angelo Salese & Roberto Fresca. - todo, fix tilemaps, colours, inputs, hook up oki, add CRTC device + 1x HD46505SP / HD6845SP + 1x Z84C0008PEC -*/ + XTAL: 12.000 Mhz + + +*********************************************************/ #include "emu.h" #include "cpu/z80/z80.h" #include "sound/okim6295.h" #include "video/mc6845.h" +#include "chance32.lh" class chance32_state : public driver_device @@ -42,6 +47,7 @@ class chance32_state : public driver_device } DECLARE_WRITE8_MEMBER(mux_w); + DECLARE_WRITE8_MEMBER(muxout_w); DECLARE_READ8_MEMBER(mux_r); tilemap_t *m_fg_tilemap; @@ -53,6 +59,7 @@ class chance32_state : public driver_device UINT8 mux_data; }; + static TILE_GET_INFO( get_fg_tile_info ) { chance32_state *state = machine.driver_data(); @@ -91,6 +98,7 @@ VIDEO_START( chance32 ) state->m_bg_tilemap->set_flip(TILE_FLIPX|TILE_FLIPY); } + SCREEN_UPDATE_IND16( chance32 ) { chance32_state *state = screen.machine().driver_data(); @@ -108,16 +116,6 @@ SCREEN_UPDATE_IND16( chance32 ) } -static ADDRESS_MAP_START( chance32_map, AS_PROGRAM, 8, chance32_state ) - AM_RANGE(0x0000, 0xcfff) AM_ROM - AM_RANGE(0xd800, 0xdfff) AM_RAM - - AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(paletteram_xGGGGGRRRRRBBBBB_byte_le_w) AM_SHARE("paletteram") - - AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(chance32_fgram_w) AM_SHARE("fgram") - AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(chance32_bgram_w) AM_SHARE("bgram") -ADDRESS_MAP_END - WRITE8_MEMBER(chance32_state::mux_w) { mux_data = data; @@ -138,9 +136,79 @@ READ8_MEMBER(chance32_state::mux_r) return res; } + +WRITE8_MEMBER(chance32_state::muxout_w) +{ +/* Muxed Lamps + + There are 2 groups of 7 output lines muxed in port 60h + The first bit is the group/mux selector. + + - bits - + 7654 3210 + ---- ---x Mux selector. + ---- --x- Small / Big lamps. + ---- -x-- Big / Small lamps. + ---- x--- Hold 5 lamp. + ---x ---- Hold 4 lamp. + --x- ---- Hold 3 lamp. + -x-- ---- Hold 2 lamp. + x--- ---- Hold 1 lamp. + + (alt state) + + - bits - + 7654 3210 + ---- ---x Mux selector. + ---- --x- unknown... + ---- -x-- Fever lamp + ---- x--- Cancel lamp. + ---x ---- D-Up / Take lamps. + --x- ---- Take / D-Up lamps. + -x-- ---- Deal lamp. + x--- ---- Bet lamp. + +*/ + if (data & 1) // bit 0 is the mux selector. + + { + output_set_lamp_value(0, (data >> 1) & 1); /* Lamp 0 - Small / Big */ + output_set_lamp_value(1, (data >> 2) & 1); /* Lamp 1 - Big / Small */ + output_set_lamp_value(2, (data >> 3) & 1); /* Lamp 2 - Hold 5 */ + output_set_lamp_value(3, (data >> 4) & 1); /* Lamp 3 - Hold 4 */ + output_set_lamp_value(4, (data >> 5) & 1); /* Lamp 4 - Hold 3 */ + output_set_lamp_value(5, (data >> 6) & 1); /* Lamp 5 - Hold 2 */ + output_set_lamp_value(6, (data >> 7) & 1); /* Lamp 6 - Hold 1 */ + + logerror("Lamps A: %02x\n", data); + } + + else + { + // bit 1 is unknown... + output_set_lamp_value(7, (data >> 2) & 1); /* Lamp 7 - Fever! */ + output_set_lamp_value(8, (data >> 3) & 1); /* Lamp 8 - Cancel */ + output_set_lamp_value(9, (data >> 4) & 1); /* Lamp 9 - D-Up / Take */ + output_set_lamp_value(10, (data >> 5) & 1); /* Lamp 10 - Take / D-Up */ + output_set_lamp_value(11, (data >> 6) & 1); /* Lamp 11 - Deal */ + output_set_lamp_value(12, (data >> 7) & 1); /* Lamp 12 - Bet */ + + logerror("Lamps B: %02x\n", data); + } +} + + +static ADDRESS_MAP_START( chance32_map, AS_PROGRAM, 8, chance32_state ) + AM_RANGE(0x0000, 0xcfff) AM_ROM + AM_RANGE(0xd800, 0xdfff) AM_RAM + AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(paletteram_xGGGGGRRRRRBBBBB_byte_le_w) AM_SHARE("paletteram") + AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(chance32_fgram_w) AM_SHARE("fgram") + AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(chance32_bgram_w) AM_SHARE("bgram") +ADDRESS_MAP_END + static ADDRESS_MAP_START( chance32_portmap, AS_IO, 8, chance32_state ) ADDRESS_MAP_GLOBAL_MASK(0xff) - //AM_RANGE(0x10, 0x10) AM_WRITENOP // ? + AM_RANGE(0x10, 0x10) AM_WRITENOP // writting bit3 constantly... watchdog? AM_RANGE(0x13, 0x13) AM_WRITE(mux_w) AM_RANGE(0x20, 0x20) AM_READ_PORT("DSW0") AM_RANGE(0x21, 0x21) AM_READ_PORT("DSW1") @@ -148,18 +216,15 @@ static ADDRESS_MAP_START( chance32_portmap, AS_IO, 8, chance32_state ) AM_RANGE(0x23, 0x23) AM_READ_PORT("DSW3") AM_RANGE(0x24, 0x24) AM_READ_PORT("DSW4") AM_RANGE(0x25, 0x25) AM_READ(mux_r) -// AM_RANGE(0x26, 0x26) AM_READ_PORT("UNK") // vblank? + AM_RANGE(0x26, 0x26) AM_READ_PORT("UNK") // vblank (other bits are checked for different reasons) AM_RANGE(0x30, 0x30) AM_DEVWRITE("crtc", mc6845_device, address_w) AM_RANGE(0x31, 0x31) AM_DEVWRITE("crtc", mc6845_device, register_w) AM_RANGE(0x50, 0x50) AM_DEVREADWRITE("oki", okim6295_device, read, write) -// AM_RANGE(0x60, 0x60) AM_WRITENOP // lamps - + AM_RANGE(0x60, 0x60) AM_WRITE(muxout_w) ADDRESS_MAP_END - static INPUT_PORTS_START( chance32 ) - PORT_START("UNK") PORT_START("DSW0") PORT_DIPNAME( 0x01, 0x00, "DSW0" ) @@ -168,10 +233,10 @@ static INPUT_PORTS_START( chance32 ) PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x02, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) + PORT_DIPNAME( 0x04, 0x00, "Auto Max Bet" ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x04, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) + PORT_DIPNAME( 0x08, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x08, DEF_STR( On ) ) PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) @@ -180,12 +245,11 @@ static INPUT_PORTS_START( chance32 ) PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x20, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x40, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x80, DEF_STR( On ) ) + PORT_DIPNAME( 0xc0, 0x00, "Maximum Bet" ) + PORT_DIPSETTING( 0x00, "10" ) + PORT_DIPSETTING( 0x40, "20" ) + PORT_DIPSETTING( 0x80, "30" ) + PORT_DIPSETTING( 0xc0, "50" ) PORT_START("DSW1") PORT_DIPNAME( 0x01, 0x00, "DSW1" ) @@ -206,33 +270,33 @@ static INPUT_PORTS_START( chance32 ) PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x20, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x40, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x80, DEF_STR( On ) ) + PORT_DIPNAME( 0x40, 0x00, "Auto Hold" ) + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x00, "Double-Up Type" ) + PORT_DIPSETTING( 0x00, "Holds" ) + PORT_DIPSETTING( 0x80, "Big/Small" ) PORT_START("DSW2") - PORT_DIPNAME( 0x01, 0x00, "DSW2" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x01, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x02, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x04, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x08, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x10, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x20, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) + PORT_DIPNAME( 0x07, 0x00, "Remote" ) + PORT_DIPSETTING( 0x00, "5" ) + PORT_DIPSETTING( 0x01, "10" ) + PORT_DIPSETTING( 0x02, "20" ) + PORT_DIPSETTING( 0x03, "25" ) + PORT_DIPSETTING( 0x04, "40" ) + PORT_DIPSETTING( 0x05, "50" ) + PORT_DIPSETTING( 0x06, "60" ) + PORT_DIPSETTING( 0x07, "100" ) + PORT_DIPNAME( 0x38, 0x00, "A-B Coinage Multiplier" ) + PORT_DIPSETTING( 0x00, "x1" ) + PORT_DIPSETTING( 0x08, "x2" ) + PORT_DIPSETTING( 0x10, "x4" ) + PORT_DIPSETTING( 0x18, "x5" ) + PORT_DIPSETTING( 0x20, "x6" ) + PORT_DIPSETTING( 0x28, "x10" ) + PORT_DIPSETTING( 0x30, "x25" ) + PORT_DIPSETTING( 0x38, "x50" ) + PORT_DIPNAME( 0x40, 0x00, "DSW2" ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x40, DEF_STR( On ) ) PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) @@ -269,12 +333,11 @@ static INPUT_PORTS_START( chance32 ) PORT_DIPNAME( 0x01, 0x00, "DSW4" ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x01, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x02, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x04, DEF_STR( On ) ) + PORT_DIPNAME( 0x06, 0x00, "Bet Limit" ) + PORT_DIPSETTING( 0x00, "5000" ) + PORT_DIPSETTING( 0x02, "10000" ) + PORT_DIPSETTING( 0x04, "20000" ) + PORT_DIPSETTING( 0x06, "30000" ) PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x08, DEF_STR( On ) ) @@ -291,10 +354,8 @@ static INPUT_PORTS_START( chance32 ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x80, DEF_STR( On ) ) - PORT_START("IN0") - PORT_DIPNAME( 0x01, 0x00, "0" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x01, DEF_STR( On ) ) + PORT_START("UNK") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen") /* Otherwise is a 'Freeze' DIP switch */ PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x02, DEF_STR( On ) ) @@ -317,85 +378,48 @@ static INPUT_PORTS_START( chance32 ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x80, DEF_STR( On ) ) + PORT_START("IN0") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_POKER_CANCEL ) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_GAMBLE_DEAL ) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_GAMBLE_D_UP ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_GAMBLE_BOOK ) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_POKER_BET ) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_START("IN1") - PORT_DIPNAME( 0x01, 0x00, "1" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x01, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x02, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x04, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x08, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x10, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x20, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x40, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x80, DEF_STR( On ) ) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_POKER_HOLD1 ) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_POKER_HOLD2 ) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_POKER_HOLD3 ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_POKER_HOLD4 ) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_POKER_HOLD5 ) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN ) PORT_START("IN2") - PORT_DIPNAME( 0x01, 0x00, "2" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x01, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x02, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x04, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x08, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x10, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x20, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x40, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x80, DEF_STR( On ) ) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_GAMBLE_LOW ) PORT_NAME("Small / DIP Test (In Book Mode)") + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_GAMBLE_PAYOUT ) // payout (hopper jam) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_GAMBLE_TAKE ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_GAMBLE_HIGH ) PORT_NAME("Big") + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN ) PORT_START("IN3") - PORT_DIPNAME( 0x01, 0x00, "3" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x01, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x02, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x04, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x08, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x10, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x20, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x40, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x80, DEF_STR( On ) ) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Coin A") + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CODE(KEYCODE_R) PORT_NAME("Reset") + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(3) PORT_NAME("Coin B") + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CODE(KEYCODE_8) PORT_NAME("Flip Screen 1") /* unknown purpose */ + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CODE(KEYCODE_9) PORT_NAME("Flip Screen 2") /* unknown purpose */ + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_GAMBLE_KEYIN) INPUT_PORTS_END + static const gfx_layout tiles8x8_layout = { 16,8, @@ -413,7 +437,6 @@ static GFXDECODE_START( chance32 ) GFXDECODE_END - static MACHINE_START( chance32 ) { @@ -424,6 +447,7 @@ static MACHINE_RESET( chance32 ) } + static const mc6845_interface mc6845_intf = { "screen", /* screen we are acting on */ @@ -452,13 +476,14 @@ static MACHINE_CONFIG_START( chance32, chance32_state ) /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) - MCFG_SCREEN_REFRESH_RATE(60) + MCFG_SCREEN_REFRESH_RATE(52.786) +// MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) MCFG_SCREEN_SIZE(40*16, 32*8) MCFG_SCREEN_VISIBLE_AREA(0, 35*16-1, 0, 29*8-1) MCFG_SCREEN_UPDATE_STATIC(chance32) - MCFG_MC6845_ADD("crtc", H46505, 12000000/14, mc6845_intf) /* hand tuned to get ~60 fps */ + MCFG_MC6845_ADD("crtc", H46505, 12000000/16, mc6845_intf) /* 52.786 Hz (similar to Major Poker) */ MCFG_GFXDECODE(chance32) MCFG_PALETTE_LENGTH(0x800) @@ -468,12 +493,12 @@ static MACHINE_CONFIG_START( chance32, chance32_state ) /* sound hardware */ MCFG_SPEAKER_STANDARD_MONO("mono") - MCFG_OKIM6295_ADD("oki", 12000000/12, OKIM6295_PIN7_HIGH) // clock frequency & pin 7 not verified + /* clock at 1050 kHz match the 8000 Hz samples stored inside the ROM */ + MCFG_OKIM6295_ADD("oki", XTAL_1_056MHz, OKIM6295_PIN7_HIGH) // clock frequency & pin 7 not verified MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) MACHINE_CONFIG_END - ROM_START( chance32 ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "0.u52", 0x00000, 0x10000, CRC(331048b2) SHA1(deb4da570b3efe6e15deefb6351f925b642b4614) ) @@ -508,7 +533,9 @@ ROM_START( chance32 ) ROM_END +/************************* +* Game Drivers * +*************************/ - - -GAME( 19??, chance32, 0, chance32, chance32, 0, ROT0, "Pal Company", "Chance Thirty Two", GAME_NOT_WORKING ) +/* YEAR NAME PARENT MACHINE INPUT INIT ROT COMPANY FULLNAME FLAGS LAYOUT */ +GAMEL( 19??, chance32, 0, chance32, chance32, 0, ROT0, "PAL System Co, Ltd.", "Chance Thirty Two", 0, layout_chance32 ) diff --git a/src/mame/drivers/cps2.c b/src/mame/drivers/cps2.c index 24ec18d759..a71c220bb3 100644 --- a/src/mame/drivers/cps2.c +++ b/src/mame/drivers/cps2.c @@ -9148,10 +9148,10 @@ ROM_START( xmvsfu1d ) ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */ ROM_LOAD16_WORD_SWAP( "xvsud.03h", 0x000000, 0x80000, CRC(4e2e76b7) SHA1(812ebe4063a1c5d8c86200a51e6ab00e57e02869) ) ROM_LOAD16_WORD_SWAP( "xvsud.04h", 0x080000, 0x80000, CRC(290c61a7) SHA1(f0d409048c9d477ee98e6df92febcd4492a291ee) ) -// ROM_LOAD16_WORD_SWAP( "xvsd.05a", 0x100000, 0x80000, CRC(de347b11) SHA1(297ae207811df9a4973de1df00b2efaa14a0137d) ) // bad dump? +// ROM_LOAD16_WORD_SWAP( "xvsd.05a", 0x100000, 0x80000, CRC(de347b11) SHA1(297ae207811df9a4973de1df00b2efaa14a0137d) ) // bad dump? ROM_LOAD16_WORD_SWAP( "xvs.05a", 0x100000, 0x80000, CRC(7db6025d) SHA1(2d74f48f83f45359bfaca28ab686625766af12ee) ) ROM_LOAD16_WORD_SWAP( "xvs.06a", 0x180000, 0x80000, CRC(e8e2c75c) SHA1(929408cb5d98e95cec75ea58e4701b0cbdbcd016) ) -// ROM_LOAD16_WORD_SWAP( "xvsd.07", 0x200000, 0x80000, CRC(f761ded7) SHA1(e49277398734dea044e7c8ec16800db196905e6f) ) // bad dump ? +// ROM_LOAD16_WORD_SWAP( "xvsd.07", 0x200000, 0x80000, CRC(f761ded7) SHA1(e49277398734dea044e7c8ec16800db196905e6f) ) // bad dump ? ROM_LOAD16_WORD_SWAP( "xvs.07", 0x200000, 0x80000, CRC(08f0abed) SHA1(ef16c376232dba63b0b9bc3aa0640f9001ccb68a) ) ROM_LOAD16_WORD_SWAP( "xvs.08", 0x280000, 0x80000, CRC(81929675) SHA1(19cf7afbc1daaefec40195e40ba74970f3906a1c) ) ROM_LOAD16_WORD_SWAP( "xvs.09", 0x300000, 0x80000, CRC(9641f36b) SHA1(dcba3482d1ba37ccfb30d402793ee063c6621aed) ) diff --git a/src/mame/drivers/crimfght.c b/src/mame/drivers/crimfght.c index 0010c612bd..35f2bebd92 100644 --- a/src/mame/drivers/crimfght.c +++ b/src/mame/drivers/crimfght.c @@ -26,7 +26,7 @@ static KONAMI_SETLINES_CALLBACK( crimfght_banking ); static INTERRUPT_GEN( crimfght_interrupt ) { crimfght_state *state = device->machine().driver_data(); - + if (k051960_is_irq_enabled(state->m_k051960)) device_set_input_line(device, KONAMI_IRQ_LINE, HOLD_LINE); } diff --git a/src/mame/drivers/csplayh5.c b/src/mame/drivers/csplayh5.c index 7c449de657..47c4471f12 100644 --- a/src/mame/drivers/csplayh5.c +++ b/src/mame/drivers/csplayh5.c @@ -9,7 +9,7 @@ - fix h8 CPU core bugs, it trips various unhandled opcodes - Implement DVD routing and YUV decoding; - game timings seem busted, could be due of missing DVD hook-up - - csplayh8: inputs doesn't work at all, slower than the others too + - csplayh1: inputs doesn't work at all, slower than the others too ***************************************************************************/ @@ -713,7 +713,7 @@ ROM_START( csplayh1 ) ROM_LOAD16_BYTE( "8.bin", 0x000001, 0x080000, CRC(a8567f1b) SHA1(2a854ef8b1988ad097bbcbeddc4b275ad738e1e1) ) DISK_REGION( "dvd" ) - DISK_IMAGE( "csplayh8", 0, SHA1(d6514882c2626e62c5079df9ac68ecb70fc33209) ) + DISK_IMAGE( "csplayh1", 0, SHA1(d6514882c2626e62c5079df9ac68ecb70fc33209) ) ROM_REGION( 0x1000, "gal", ROMREGION_ERASE00 ) ROM_LOAD( "gal16v8b.ic8", 0x000000, 0x0008c1, NO_DUMP ) diff --git a/src/mame/drivers/decocass.c b/src/mame/drivers/decocass.c index 1d931d50a2..8830e43154 100644 --- a/src/mame/drivers/decocass.c +++ b/src/mame/drivers/decocass.c @@ -28,7 +28,7 @@ The actual cassettes use a custom player hooked to the BIO board, and are roughly microcassette form factor, but are larger and will not fit in a conventional microcassette player. Each cassette has two tracks on it: a clock track and a data track, for a form of synchronous serial. The data is stored in blocks with headers and checksums. - + ***********************************************************************/ @@ -1080,7 +1080,7 @@ ROM_START( cdsteljn ) // version 4-A-3 ROM_LOAD( "a-0061.dgl", 0x0000, 0x0020, CRC(1bc9fccb) SHA1(ffc59c7660d5c87a8deca294f80260b6bc7c3027) ) /* Should be dp-1144a?? */ ROM_REGION( 0x10000, "cassette", 0 ) /* (max) 64k for cassette image */ - ROM_LOAD( "dt-1144-a3.cas", 0x000000, 0x007300, CRC(1336a912) SHA1(0c64e069713b411da38b43f14306953621726d35) ) + ROM_LOAD( "dt-1144-a3.cas", 0x000000, 0x007300, CRC(1336a912) SHA1(0c64e069713b411da38b43f14306953621726d35) ) ROM_END /* 15 Lucky Poker */ @@ -1567,7 +1567,7 @@ static DRIVER_INIT( decocrom ) /* 12 */ // 1981.08 Flash Boy/DECO Kid /* 13 */ GAME( 1981, cprogolf, decocass, cprogolf, cprogolf, decocass, ROT270, "Data East Corporation", "Tournament Pro Golf (DECO Cassette)", 0 ) GAME( 1981, cprogolfj, cprogolf, cprogolfj,cprogolf, decocass, ROT270, "Data East Corporation", "Tournament Pro Golf (DECO Cassette, Japan)", 0 ) -/* 14 */ GAME( 1981, cdsteljn, decocass, cdsteljn, decocass, decocass, ROT270, "Data East Corporation", "DS Telejan (DECO Cassette, Japan)", 0) +/* 14 */ GAME( 1981, cdsteljn, decocass, cdsteljn, decocass, decocass, ROT270, "Data East Corporation", "DS Telejan (DECO Cassette, Japan)", 0) /* 15 */ GAME( 1981, cluckypo, decocass, cluckypo, decocass, decocass, ROT270, "Data East Corporation", "Lucky Poker (DECO Cassette)", 0 ) /* 16 */ GAME( 1981, ctisland, decocass, ctisland, decocass, decocrom, ROT270, "Data East Corporation", "Treasure Island (DECO Cassette, set 1)", 0 ) GAME( 1981, ctisland2, ctisland, ctisland, decocass, decocrom, ROT270, "Data East Corporation", "Treasure Island (DECO Cassette, set 2)", 0 ) diff --git a/src/mame/drivers/fortecar.c b/src/mame/drivers/fortecar.c index 3a8a4778d8..e2165f9567 100644 --- a/src/mame/drivers/fortecar.c +++ b/src/mame/drivers/fortecar.c @@ -448,7 +448,7 @@ static READ8_DEVICE_HANDLER( ppi0_portc_r ) static I8255A_INTERFACE( ppi8255_intf ) { /* Init with 0x9a... A, B and high C as input - Serial Eprom connected to Port C */ + Serial Eprom connected to Port C */ DEVCB_INPUT_PORT("SYSTEM"), /* Port A read */ DEVCB_NULL, /* Port A write */ DEVCB_INPUT_PORT("INPUT"), /* Port B read */ diff --git a/src/mame/drivers/gei.c b/src/mame/drivers/gei.c index 412a0a38ce..3ecc364d54 100644 --- a/src/mame/drivers/gei.c +++ b/src/mame/drivers/gei.c @@ -1059,7 +1059,7 @@ static I8255A_INTERFACE( getrivia_ppi8255_0_intf ) DEVCB_NULL, /* Port C read */ DEVCB_HANDLER(sound_w) /* Port C write */ }; - + static I8255A_INTERFACE( getrivia_ppi8255_1_intf ) { DEVCB_INPUT_PORT("IN1"), /* Port A read */ @@ -1069,7 +1069,7 @@ static I8255A_INTERFACE( getrivia_ppi8255_1_intf ) DEVCB_NULL, /* Port C read */ DEVCB_HANDLER(lamps2_w) /* Port C write */ }; - + static I8255A_INTERFACE( gselect_ppi8255_0_intf ) { DEVCB_INPUT_PORT("DSWA"), /* Port A read */ @@ -1079,7 +1079,7 @@ static I8255A_INTERFACE( gselect_ppi8255_0_intf ) DEVCB_NULL, /* Port C read */ DEVCB_HANDLER(sound2_w) /* Port C write */ }; - + static I8255A_INTERFACE( gselect_ppi8255_1_intf ) { DEVCB_INPUT_PORT("IN1"), /* Port A read */ @@ -1089,7 +1089,7 @@ static I8255A_INTERFACE( gselect_ppi8255_1_intf ) DEVCB_INPUT_PORT("IN2"), /* Port C read */ DEVCB_HANDLER(nmi_w) /* Port C write */ }; - + static I8255A_INTERFACE( findout_ppi8255_1_intf ) { DEVCB_INPUT_PORT("IN1"), /* Port A read */ @@ -1099,7 +1099,7 @@ static I8255A_INTERFACE( findout_ppi8255_1_intf ) DEVCB_HANDLER(portC_r), /* Port C read */ DEVCB_NULL /* Port C write */ }; - + static INTERRUPT_GEN( vblank_irq ) { diff --git a/src/mame/drivers/igs017.c b/src/mame/drivers/igs017.c index c2bd99174d..d1f18f86a5 100644 --- a/src/mame/drivers/igs017.c +++ b/src/mame/drivers/igs017.c @@ -1978,7 +1978,7 @@ WRITE16_MEMBER(igs017_state::lhzb2a_prot_w) ( BIT(~x, 1) << 2 ) | ( BIT( x, 0) << 1 ) | ( bit0 << 0 ) ; - + logerror("%s: exec bitswap - mode_3 %02x, mode_f %02x, xor0 %x, val %04x -> %04x\n", machine().describe_context(), m_prot_m3, m_prot_mf, xor0, x, m_prot_val); break; @@ -2148,7 +2148,7 @@ static ADDRESS_MAP_START( lhzb2a, AS_PROGRAM, 16, igs017_state ) AM_RANGE(0x000000, 0x07ffff) AM_ROM AM_RANGE(0x500000, 0x503fff) AM_RAM -// AM_RANGE(0x910000, 0x910003) accesses appear to be from leftover code where the final checks were disabled +// AM_RANGE(0x910000, 0x910003) accesses appear to be from leftover code where the final checks were disabled AM_RANGE(0xb02000, 0xb02fff) AM_READWRITE( spriteram_lsb_r, spriteram_lsb_w ) AM_SHARE("spriteram") AM_RANGE(0xb03000, 0xb037ff) AM_RAM_WRITE( lhzb2a_paletteram_w ) AM_SHARE("paletteram") AM_RANGE(0xb04024, 0xb04025) AM_WRITE( video_disable_lsb_w ) diff --git a/src/mame/drivers/megasys1.c b/src/mame/drivers/megasys1.c index 2bc71ca901..c62ff97ebc 100644 --- a/src/mame/drivers/megasys1.c +++ b/src/mame/drivers/megasys1.c @@ -4020,7 +4020,7 @@ READ16_MEMBER(megasys1_state::monkelf_input_r) static DRIVER_INIT( monkelf ) { DRIVER_INIT_CALL(avspirit); - + megasys1_state *state = machine.driver_data(); UINT16 *ROM = (UINT16*)state->memregion("maincpu")->base(); ROM[0x00744/2] = 0x4e71; // weird check, 0xe000e R is a port-based trap? diff --git a/src/mame/drivers/midyunit.c b/src/mame/drivers/midyunit.c index 142954fd51..f885a9daf8 100644 --- a/src/mame/drivers/midyunit.c +++ b/src/mame/drivers/midyunit.c @@ -742,6 +742,12 @@ static INPUT_PORTS_START( mkla4 ) PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN ) INPUT_PORTS_END +static INPUT_PORTS_START( mkyawdim ) + PORT_INCLUDE( mkla4 ) + + PORT_MODIFY("IN1") + PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNUSED ) // no ADPCM in these bootlegs +INPUT_PORTS_END static INPUT_PORTS_START( term2 ) PORT_START("IN0") @@ -2747,8 +2753,8 @@ GAME( 1992, mkyturbo, mk, yunit_adpcm_6bit_fast, mkla4, mkyturbo, ROT GAME( 1992, mkyturboe,mk, yunit_adpcm_6bit_fast, mkla4, mkyturbo, ROT0, "hack", "Mortal Kombat (Turbo 3.0 08/31/92, hack)", GAME_SUPPORTS_SAVE ) GAME( 1992, mknifty, mk, yunit_adpcm_6bit_fast, mkla4, mkyturbo, ROT0, "hack", "Mortal Kombat (Nifty Kombo, hack)", GAME_SUPPORTS_SAVE ) GAME( 1992, mknifty666, mk, yunit_adpcm_6bit_fast, mkla4, mkyturbo, ROT0, "hack", "Mortal Kombat (Nifty Kombo 666, hack)", GAME_SUPPORTS_SAVE ) -GAME( 1992, mkyawdim, mk, mkyawdim, mkla4, mkyawdim, ROT0, "bootleg (Yawdim)", "Mortal Kombat (Yawdim bootleg, set 1)", GAME_SUPPORTS_SAVE ) -GAME( 1992, mkyawdim2,mk, mkyawdim, mkla4, mkyawdim, ROT0, "bootleg (Yawdim)", "Mortal Kombat (Yawdim bootleg, set 2)", GAME_SUPPORTS_SAVE | GAME_NO_SOUND ) +GAME( 1992, mkyawdim, mk, mkyawdim, mkyawdim, mkyawdim, ROT0, "bootleg (Yawdim)", "Mortal Kombat (Yawdim bootleg, set 1)", GAME_SUPPORTS_SAVE ) +GAME( 1992, mkyawdim2,mk, mkyawdim, mkyawdim, mkyawdim, ROT0, "bootleg (Yawdim)", "Mortal Kombat (Yawdim bootleg, set 2)", GAME_SUPPORTS_SAVE | GAME_NO_SOUND ) GAME( 1992, totcarn, 0, yunit_adpcm_6bit_fast, totcarn, totcarn, ROT0, "Midway", "Total Carnage (rev LA1 03/10/92)", GAME_SUPPORTS_SAVE ) GAME( 1992, totcarnp, totcarn, yunit_adpcm_6bit_fast, totcarn, totcarn, ROT0, "Midway", "Total Carnage (prototype, rev 1.0 01/25/92)", GAME_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/naomi.c b/src/mame/drivers/naomi.c index b8baebb4a5..4693c953e8 100644 --- a/src/mame/drivers/naomi.c +++ b/src/mame/drivers/naomi.c @@ -5549,7 +5549,7 @@ ROM_START( ninjaslt ) ROM_LOAD( "nja3-key.bin", 0x000000, 0x000004, CRC(e6997eb0) SHA1(c866a5069e28939be5a8fc867bc14791decac3c8) ) ROM_REGION( 0x20000, "jyu_io", 0 ) // H8/3334-based I/O board ROM, eventually should be separated out - ROM_LOAD( "jyu1_prg0a.ic3", 0x000000, 0x020000, CRC(aec4dbc1) SHA1(bddd4f345baf7f594998a39c09da18b3834f0ac2) ) + ROM_LOAD( "jyu1_prg0a.ic3", 0x000000, 0x020000, CRC(aec4dbc1) SHA1(bddd4f345baf7f594998a39c09da18b3834f0ac2) ) ROM_END // this one's weird: the rom test checksum for IC 1 matches a screenshot from h/w, but on h/w it says ---- instead of BAD. diff --git a/src/mame/drivers/neodrvr.c b/src/mame/drivers/neodrvr.c index 3c58363985..55b779bece 100644 --- a/src/mame/drivers/neodrvr.c +++ b/src/mame/drivers/neodrvr.c @@ -547,11 +547,11 @@ Unofficial pcb's from NG:DEV.TEAM: - + MVS CHA: GIGA CHAR Board 1.0 GIGA CHAR Board 1.5 - + MVS PROG: GIGA PROG Board 1.0 GIGA PROG Board 1.5 @@ -646,7 +646,7 @@ ***************************************************************************** - Neo-Geo bios + Neo-Geo bios ***************************************************************************** @@ -817,7 +817,7 @@ /**************************************************************************** - Official sets + Official sets ***************************************************************************** @@ -7511,12 +7511,12 @@ ROM_END /* Some info about the 2nd AES release of Samurai Shodown 5 Special (samsh5sph): - The fixed carts have a small round neogeo sticker applied to the front side of the cart (top right near cart sticker). - SNK Playmore had authorized a recall of all Samurai Shodown V Special (Samurai Spirits 0 Special) home cartridges. This recall involved bug fixes - and the addition of fatalities. (The fatalities were originally removed at the last minute due to the Nagasaki incident, a murder caused by a child killing her classmate by knife.) - Bug fixes: Improvements on Voice, Back Ground Music, and Practice mode. - Fatalities: SNK PLAYMORE modified the game program by including the removed "Zetumei Ougi" in a modified version. - This new version does not show the complete fatalities, they are instead replaced by what SNK PLAYMORE refers to as "lessened fatalities". + The fixed carts have a small round neogeo sticker applied to the front side of the cart (top right near cart sticker). + SNK Playmore had authorized a recall of all Samurai Shodown V Special (Samurai Spirits 0 Special) home cartridges. This recall involved bug fixes + and the addition of fatalities. (The fatalities were originally removed at the last minute due to the Nagasaki incident, a murder caused by a child killing her classmate by knife.) + Bug fixes: Improvements on Voice, Back Ground Music, and Practice mode. + Fatalities: SNK PLAYMORE modified the game program by including the removed "Zetumei Ougi" in a modified version. + This new version does not show the complete fatalities, they are instead replaced by what SNK PLAYMORE refers to as "lessened fatalities". */ @@ -7596,7 +7596,7 @@ ROM_END /**************************************************************************** - BrezzaSoft games, licensed? + BrezzaSoft games, licensed? ****************************************************************************/ @@ -7711,7 +7711,7 @@ ROM_END /**************************************************************************** - Vektorlogic games, unlicensed + Vektorlogic games, unlicensed ****************************************************************************/ @@ -7753,7 +7753,7 @@ ROM_END /**************************************************************************** - Jamma PCB sets + Jamma PCB sets ****************************************************************************/ @@ -7924,7 +7924,7 @@ ROM_END /**************************************************************************** - Bootleg sets + Bootleg sets ****************************************************************************/ @@ -8953,7 +8953,7 @@ ROM_END /**************************************************************************** - Game specific input definitions + Game specific input definitions ****************************************************************************/ @@ -9253,7 +9253,7 @@ INPUT_PORTS_END /**************************************************************************** - Game specific inits + Game specific inits ****************************************************************************/ @@ -9924,7 +9924,7 @@ static DRIVER_INIT(sbp ) /**************************************************************************** - Softlist stuff + Softlist stuff ****************************************************************************/ diff --git a/src/mame/drivers/pacman.c b/src/mame/drivers/pacman.c index 4ab99008bf..cf0c9b6072 100644 --- a/src/mame/drivers/pacman.c +++ b/src/mame/drivers/pacman.c @@ -4050,7 +4050,7 @@ ROM_START( mspacii ) ROM_REGION( 0x2000, "gfx1", 0 ) ROM_LOAD( "p1.5e", 0x0000, 0x1000, CRC(04333722) SHA1(bb179d5302b26b815b5d7eff14865e7b4f8a6880) ) - ROM_LOAD( "p2.5f", 0x1000, 0x1000, CRC(615af909) SHA1(fd6a1dde780b39aea76bf1c4befa5882573c2ef4) ) + ROM_LOAD( "p2.5f", 0x1000, 0x1000, CRC(615af909) SHA1(fd6a1dde780b39aea76bf1c4befa5882573c2ef4) ) ROM_REGION( 0x0120, "proms", 0 ) ROM_LOAD( "82s123.7f", 0x0000, 0x0020, CRC(2fc650bd) SHA1(8d0268dee78e47c712202b0ec4f1f51109b1f2a5) ) @@ -4073,7 +4073,7 @@ ROM_START( mspacii2 ) ROM_REGION( 0x2000, "gfx1", 0 ) ROM_LOAD( "p7.bin", 0x0000, 0x1000, CRC(04333722) SHA1(bb179d5302b26b815b5d7eff14865e7b4f8a6880) ) - ROM_LOAD( "p8.bin", 0x1000, 0x1000, CRC(615af909) SHA1(fd6a1dde780b39aea76bf1c4befa5882573c2ef4) ) + ROM_LOAD( "p8.bin", 0x1000, 0x1000, CRC(615af909) SHA1(fd6a1dde780b39aea76bf1c4befa5882573c2ef4) ) ROM_REGION( 0x0120, "proms", 0 ) ROM_LOAD( "82s123.7f", 0x0000, 0x0020, CRC(2fc650bd) SHA1(8d0268dee78e47c712202b0ec4f1f51109b1f2a5) ) diff --git a/src/mame/drivers/quantum.c b/src/mame/drivers/quantum.c index 7aebb5ff7f..b3d65cbcc1 100644 --- a/src/mame/drivers/quantum.c +++ b/src/mame/drivers/quantum.c @@ -80,13 +80,13 @@ READ16_MEMBER(quantum_state::trackball_r) static READ8_DEVICE_HANDLER( input_1_r ) { - return (device->machine().root_device().ioport("DSW0")->read() << (7 - (offset - POT0_C))) & 0x80; + return (device->machine().root_device().ioport("DSW0")->read() << (7 - (offset - pokeyn_device::POT0_C))) & 0x80; } static READ8_DEVICE_HANDLER( input_2_r ) { - return (device->machine().root_device().ioport("DSW1")->read() << (7 - (offset - POT0_C))) & 0x80; + return (device->machine().root_device().ioport("DSW1")->read() << (7 - (offset - pokeyn_device::POT0_C))) & 0x80; } diff --git a/src/mame/drivers/r2dx_v33.c b/src/mame/drivers/r2dx_v33.c index ffac7541d3..705d7500f9 100644 --- a/src/mame/drivers/r2dx_v33.c +++ b/src/mame/drivers/r2dx_v33.c @@ -867,11 +867,11 @@ ROM_START( nzeroteam ) ROM_REGION( 0x400000, "gfx2", 0 ) /* background gfx */ ROM_LOAD( "back-1", 0x000000, 0x100000, CRC(8b7f9219) SHA1(3412b6f8a4fe245e521ddcf185a53f2f4520eb57) ) /* Same as "MUSHA BACK-1" of other Zero Team sets */ - ROM_LOAD( "back-2", 0x100000, 0x080000, CRC(ce61c952) SHA1(52a843c8ba428b121fab933dd3b313b2894d80ac) ) /* Same as "MUSHA BACK-1" of other Zero Team sets */ + ROM_LOAD( "back-2", 0x100000, 0x080000, CRC(ce61c952) SHA1(52a843c8ba428b121fab933dd3b313b2894d80ac) ) /* Same as "MUSHA BACK-2" of other Zero Team sets */ ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (encrypted) */ ROM_LOAD32_WORD( "obj-1", 0x000000, 0x200000, CRC(45be8029) SHA1(adc164f9dede9a86b96a4d709e9cba7d2ad0e564) ) /* Same as "MUSHA OBJ-1" of other Zero Team sets */ - ROM_LOAD32_WORD( "obj-2", 0x000002, 0x200000, CRC(cb61c19d) SHA1(151a2ce9c32f3321a974819e9b165dddc31c8153) ) /* Same as "MUSHA OBJ-1" of other Zero Team sets */ + ROM_LOAD32_WORD( "obj-2", 0x000002, 0x200000, CRC(cb61c19d) SHA1(151a2ce9c32f3321a974819e9b165dddc31c8153) ) /* Same as "MUSHA OBJ-2" of other Zero Team sets */ ROM_REGION( 0x100000, "oki", 0 ) /* ADPCM samples */ ROM_LOAD( "6.pcm", 0x00000, 0x40000, CRC(48be32b1) SHA1(969d2191a3c46871ee8bf93088b3cecce3eccf0c) ) /* Same as other Zero Team sets */ diff --git a/src/mame/drivers/segas32.c b/src/mame/drivers/segas32.c index 0eb62c2ec5..deee799003 100644 --- a/src/mame/drivers/segas32.c +++ b/src/mame/drivers/segas32.c @@ -3136,6 +3136,35 @@ ROM_START( orunnersu ) ROM_LOAD( "mpr15552.bin", 0x200000, 0x200000, CRC(1c4b5e73) SHA1(50a8e9a200575a3522a51bf094aa0e87b90bb0a3) ) ROM_END +ROM_START( orunnersj ) + ROM_REGION( 0x200000, "maincpu", 0 ) /* v60 code */ + ROM_LOAD32_WORD_x4( "epr15616.37", 0x000000, 0x020000, CRC(fb550545) SHA1(2f2c36843b115f5417e1f2ccd4a34ebf91265190) ) /* Need to verify the EPR numbers */ + ROM_LOAD32_WORD_x4( "epr15617.40", 0x000002, 0x020000, CRC(6bb741e0) SHA1(d92087a2c0b6de4287e569eecf9758615a85d1eb) ) /* Need to verify the EPR numbers */ + ROM_LOAD32_WORD( "mpr15538.bin", 0x100000, 0x080000, CRC(93958820) SHA1(e19b6f18a5707dbb64ae009d63c05eac5bac4a81) ) + ROM_LOAD32_WORD( "mpr15539.bin", 0x100002, 0x080000, CRC(219760fa) SHA1(bd62a83de9c9542f6da454a87dc4947492f65c52) ) + + ROM_REGION( 0x180000, "soundcpu", 0 ) /* sound CPU */ + ROM_LOAD( "epr15550.bin", 0x100000, 0x80000, CRC(0205d2ed) SHA1(3475479e1a45fe96eefbe53842758898db7accbf) ) + + ROM_REGION( 0x400000, "gfx1", 0 ) /* tiles */ + ROM_LOAD16_BYTE( "mpr15548.bin", 0x000000, 0x200000, CRC(b6470a66) SHA1(e1544590c02d41f62f82a4d771b893fb0f2734c7) ) + ROM_LOAD16_BYTE( "mpr15549.bin", 0x000001, 0x200000, CRC(81d12520) SHA1(1555893941e832f00ad3d0b3ad0c34a0d3a1c58a) ) + + ROM_REGION32_BE( 0x1000000, "gfx2", 0 ) /* sprites */ + ROMX_LOAD( "mpr15540.bin", 0x000000, 0x200000, CRC(a10d72b4) SHA1(6d9d5e20be6721b53ce49df4d5a1bbd91f5b3aed) , ROM_SKIP(6)|ROM_GROUPWORD ) + ROMX_LOAD( "mpr15542.bin", 0x000002, 0x200000, CRC(40952374) SHA1(c669ef52508bc2f49cf812dc86ac98fb535471fa) , ROM_SKIP(6)|ROM_GROUPWORD ) + ROMX_LOAD( "mpr15544.bin", 0x000004, 0x200000, CRC(39e3df45) SHA1(38a7b21617b45613b05509dda388f8f7770b186c) , ROM_SKIP(6)|ROM_GROUPWORD ) + ROMX_LOAD( "mpr15546.bin", 0x000006, 0x200000, CRC(e3fcc12c) SHA1(1cf7e05c7873f68789a27a91cddf471df40d7907) , ROM_SKIP(6)|ROM_GROUPWORD ) + ROMX_LOAD( "mpr15541.bin", 0x800000, 0x200000, CRC(a2003c2d) SHA1(200a2c7d78d3f5f28909267fdcdbddd58c5f5fa2) , ROM_SKIP(6)|ROM_GROUPWORD ) + ROMX_LOAD( "mpr15543.bin", 0x800002, 0x200000, CRC(933e8e7b) SHA1(0d53286f524f47851a483569dc37e9f6d34cc5f4) , ROM_SKIP(6)|ROM_GROUPWORD ) + ROMX_LOAD( "mpr15545.bin", 0x800004, 0x200000, CRC(53dd0235) SHA1(4aee5ae1820ff933b6bd8a54bdbf989c0bc95c1a) , ROM_SKIP(6)|ROM_GROUPWORD ) + ROMX_LOAD( "mpr15547.bin", 0x800006, 0x200000, CRC(edcb2a43) SHA1(f0bcfcc749ca0267f85bf9838164869912944d00) , ROM_SKIP(6)|ROM_GROUPWORD ) + + ROM_REGION( 0x400000, "sega", 0 ) /* Sega PCM sound data */ + ROM_LOAD( "mpr15551.bin", 0x000000, 0x200000, CRC(4894bc73) SHA1(351f5c03fb430fd87df915dfe3a377b5ada622c4) ) + ROM_LOAD( "mpr15552.bin", 0x200000, 0x200000, CRC(1c4b5e73) SHA1(50a8e9a200575a3522a51bf094aa0e87b90bb0a3) ) +ROM_END + /************************************************************************************************************************** ************************************************************************************************************************** @@ -4294,6 +4323,7 @@ GAME( 1994, harddunk, 0, multi32, harddunk, harddunk, ROT0, "Sega", GAME( 1994, harddunkj,harddunk, multi32, harddunk, harddunk, ROT0, "Sega", "Hard Dunk (Japan)", GAME_IMPERFECT_GRAPHICS ) GAME( 1992, orunners, 0, multi32, orunners, orunners, ROT0, "Sega", "OutRunners (World)", GAME_IMPERFECT_GRAPHICS ) GAME( 1992, orunnersu,orunners, multi32, orunners, orunners, ROT0, "Sega", "OutRunners (US)", GAME_IMPERFECT_GRAPHICS ) +GAME( 1992, orunnersj,orunners, multi32, orunners, orunners, ROT0, "Sega", "OutRunners (Japan)", GAME_IMPERFECT_GRAPHICS ) GAME( 1992, scross, 0, multi32, scross, scross, ROT0, "Sega", "Stadium Cross (World)", GAME_IMPERFECT_GRAPHICS ) GAME( 1992, scrossu, scross, multi32, scross, scross, ROT0, "Sega", "Stadium Cross (US)", GAME_IMPERFECT_GRAPHICS ) GAME( 1992, titlef, 0, multi32, titlef, titlef, ROT0, "Sega", "Title Fight (World)", GAME_IMPERFECT_GRAPHICS ) diff --git a/src/mame/drivers/statriv2.c b/src/mame/drivers/statriv2.c index c73ced440d..a050e7daf3 100644 --- a/src/mame/drivers/statriv2.c +++ b/src/mame/drivers/statriv2.c @@ -273,8 +273,8 @@ static WRITE8_DEVICE_HANDLER( ppi_portc_hi_w ) static I8255A_INTERFACE( ppi8255_intf ) { /* PPI 8255 group A & B set to Mode 0. - Port A, B and lower 4 bits of C set as Input. - High 4 bits of C set as Output */ + Port A, B and lower 4 bits of C set as Input. + High 4 bits of C set as Output */ DEVCB_INPUT_PORT("IN0"), /* Port A read */ DEVCB_NULL, /* Port A write */ DEVCB_INPUT_PORT("IN1"), /* Port B read */ diff --git a/src/mame/drivers/tecmo.c b/src/mame/drivers/tecmo.c index 99acdc0a0d..d41cc352ad 100644 --- a/src/mame/drivers/tecmo.c +++ b/src/mame/drivers/tecmo.c @@ -1078,7 +1078,7 @@ ROM_START( backfirt ) ROM_LOAD( "b14-s3.bin", 0x30000, 0x08000, CRC(4d29637a) SHA1(28e85925138256b8ce5a1c4a5df5b219b1b6b197) ) /* tiles #2 */ // half size is correct, rom type 27256 ROM_REGION( 0x8000, "adpcm", ROMREGION_ERASE00 ) /* ADPCM samples */ -// ROM_LOAD( "silkworm.1", 0x0000, 0x8000, CRC(5b553644) SHA1(5d39d2251094c17f7b732b4861401b3516fce9b1) ) +// ROM_LOAD( "silkworm.1", 0x0000, 0x8000, CRC(5b553644) SHA1(5d39d2251094c17f7b732b4861401b3516fce9b1) ) ROM_END ROM_START( gemini ) diff --git a/src/mame/drivers/timeplt.c b/src/mame/drivers/timeplt.c index d0396f50a2..c6bfd5e273 100644 --- a/src/mame/drivers/timeplt.c +++ b/src/mame/drivers/timeplt.c @@ -97,13 +97,13 @@ READ8_MEMBER(timeplt_state::psurge_protection_r) static WRITE8_DEVICE_HANDLER(chkun_sound_w) { timeplt_state *state = device->machine().driver_data(); - + // d0-d3: P0-P3 // d5: /R (unused?) // d6: /W if (~data & 0x40) state->m_tc8830f->write_p(data & 0xf); - + // d4 (or d7?): /ACL if (~data & 0x10) state->m_tc8830f->reset(); diff --git a/src/mame/drivers/twincobr.c b/src/mame/drivers/twincobr.c index 3a2e5bb85c..35a3102d47 100644 --- a/src/mame/drivers/twincobr.c +++ b/src/mame/drivers/twincobr.c @@ -277,7 +277,7 @@ Shark Zame static ADDRESS_MAP_START( main_program_map, AS_PROGRAM, 16, twincobr_state ) AM_RANGE(0x000000, 0x02ffff) AM_ROM AM_RANGE(0x030000, 0x033fff) AM_RAM /* 68K and DSP shared RAM */ - AM_RANGE(0x040000, 0x040fff) AM_RAM AM_SHARE("spriteram") + AM_RANGE(0x040000, 0x040fff) AM_RAM AM_SHARE("spriteram16") AM_RANGE(0x050000, 0x050dff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_word_w) AM_SHARE("paletteram") AM_RANGE(0x060000, 0x060001) AM_DEVWRITE8("crtc", mc6845_device, address_w, 0x00ff) AM_RANGE(0x060002, 0x060003) AM_DEVWRITE8("crtc", mc6845_device, register_w, 0x00ff) @@ -583,12 +583,12 @@ static MACHINE_CONFIG_START( twincobr, twincobr_state ) MCFG_MC6845_ADD("crtc", HD6845, XTAL_28MHz/8, twincobr_mc6845_intf) /* 3.5MHz measured on CLKin */ MCFG_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK) - MCFG_BUFFERED_SPRITERAM16_ADD("spriteram") + MCFG_BUFFERED_SPRITERAM16_ADD("spriteram16") MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_RAW_PARAMS(XTAL_28MHz/4, 446, 0, 320, 286, 0, 240) MCFG_SCREEN_UPDATE_STATIC(toaplan0) - MCFG_SCREEN_VBLANK_DEVICE("spriteram", buffered_spriteram16_device, vblank_copy_rising) + MCFG_SCREEN_VBLANK_DEVICE("spriteram16", buffered_spriteram16_device, vblank_copy_rising) MCFG_GFXDECODE(twincobr) MCFG_PALETTE_LENGTH(1792) diff --git a/src/mame/drivers/wardner.c b/src/mame/drivers/wardner.c index e6b0e4f85f..ab6f91bb80 100644 --- a/src/mame/drivers/wardner.c +++ b/src/mame/drivers/wardner.c @@ -205,7 +205,7 @@ static ADDRESS_MAP_START( main_program_map, AS_PROGRAM, 8, wardner_state ) AM_RANGE(0x8000, 0xffff) AM_ROMBANK("bank1") /* Overlapped RAM/Banked ROM - See below */ - AM_RANGE(0x8000, 0x8fff) AM_WRITE(wardner_sprite_w) AM_SHARE("spriteram") + AM_RANGE(0x8000, 0x8fff) AM_WRITE(wardner_sprite_w) AM_SHARE("spriteram8") AM_RANGE(0x9000, 0x9fff) AM_ROM AM_RANGE(0xa000, 0xadff) AM_WRITE(paletteram_xBBBBBGGGGGRRRRR_byte_le_w) AM_SHARE("paletteram") AM_RANGE(0xae00, 0xafff) AM_RAM AM_SHARE("rambase_ae00") @@ -430,12 +430,12 @@ static MACHINE_CONFIG_START( wardner, wardner_state ) MCFG_MC6845_ADD("crtc", HD6845, XTAL_14MHz/4, twincobr_mc6845_intf) /* 3.5MHz measured on CLKin */ MCFG_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK) - MCFG_BUFFERED_SPRITERAM16_ADD("spriteram") + MCFG_BUFFERED_SPRITERAM8_ADD("spriteram8") MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_RAW_PARAMS(XTAL_14MHz/2, 446, 0, 320, 286, 0, 240) MCFG_SCREEN_UPDATE_STATIC(toaplan0) - MCFG_SCREEN_VBLANK_DEVICE("spriteram", buffered_spriteram16_device, vblank_copy_rising) + MCFG_SCREEN_VBLANK_DEVICE("spriteram8", buffered_spriteram8_device, vblank_copy_rising) MCFG_GFXDECODE(wardner) MCFG_PALETTE_LENGTH(1792) diff --git a/src/mame/includes/atari.h b/src/mame/includes/atari.h index 53c6e1e753..af682e843e 100644 --- a/src/mame/includes/atari.h +++ b/src/mame/includes/atari.h @@ -13,6 +13,7 @@ #define ATARI_H #include "machine/6821pia.h" +#include "sound/pokey.h" /*----------- defined in machine/atari.c -----------*/ @@ -30,7 +31,7 @@ void atari_machine_start(running_machine &machine); MACHINE_START( atarixl ); -void atari_interrupt_cb(device_t *device, int mask); +void atari_interrupt_cb(pokeyn_device *device, int mask); void a800_handle_keyboard(running_machine &machine); void a5200_handle_keypads(running_machine &machine); diff --git a/src/mame/includes/twincobr.h b/src/mame/includes/twincobr.h index 022e96901f..f3387b6334 100644 --- a/src/mame/includes/twincobr.h +++ b/src/mame/includes/twincobr.h @@ -14,7 +14,8 @@ class twincobr_state : public driver_device twincobr_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_sharedram(*this, "sharedram"), - m_spriteram(*this, "spriteram"){ } + m_spriteram8(*this, "spriteram8"), + m_spriteram16(*this, "spriteram16"){ } int m_toaplan_main_cpu; int m_wardner_membank; @@ -51,7 +52,8 @@ class twincobr_state : public driver_device tilemap_t *m_bg_tilemap; tilemap_t *m_fg_tilemap; tilemap_t *m_tx_tilemap; - required_device m_spriteram; + optional_device m_spriteram8; + optional_device m_spriteram16; DECLARE_WRITE16_MEMBER(twincobr_dsp_addrsel_w); DECLARE_READ16_MEMBER(twincobr_dsp_r); DECLARE_WRITE16_MEMBER(twincobr_dsp_w); diff --git a/src/mame/machine/atari.c b/src/mame/machine/atari.c index 52b8fd561a..175763420e 100644 --- a/src/mame/machine/atari.c +++ b/src/mame/machine/atari.c @@ -24,7 +24,7 @@ static void a600xl_mmu(running_machine &machine, UINT8 new_mmu); static void pokey_reset(running_machine &machine); -void atari_interrupt_cb(device_t *device, int mask) +void atari_interrupt_cb(pokeyn_device *device, int mask) { if (VERBOSE_POKEY) diff --git a/src/mame/machine/mega32x.c b/src/mame/machine/mega32x.c index fd3139358a..c6f2bceeb7 100644 --- a/src/mame/machine/mega32x.c +++ b/src/mame/machine/mega32x.c @@ -195,7 +195,7 @@ GFX check (these don't explicitly fails): #161 Runlength Mode */ - + #include "includes/megadriv.h" diff --git a/src/mame/machine/megavdp.c b/src/mame/machine/megavdp.c index 983d7274f1..f9668a8e70 100644 --- a/src/mame/machine/megavdp.c +++ b/src/mame/machine/megavdp.c @@ -2936,4 +2936,4 @@ void megadriv_reset_vdp(void) megadrive_visible_scanlines = 224; megadrive_irq6_scanline = 224; megadrive_z80irq_scanline = 226; -} +} diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 04e04a6c3c..a28c158171 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -4445,9 +4445,9 @@ slipstrm // 1995.?? Slip Stream (Capcom) slipstrmh // Sega Multi System 32 games - // 1993.05 Outrunners (Japan) orunners // 1993.?? Outrunners (World) orunnersu // 1993.06 Outrunners (US) +orunnersj // 1993.05 Outrunners (Japan) harddunkj // 1994.04 Hard Dunk 3on3 (Japan) harddunk // 1994.?? Hard Dunk 3on3 (World) // 1993.03 Title Fight (Japan) @@ -5227,7 +5227,7 @@ clocknch // 11 1981.04 Lock'n'Chase // 12 1981.08 Flash Boy/DECO Kid cprogolf // 13 1981.08 Tournament Pro Golf cprogolfj // 13 1981.08 Tournament Pro Golf (Japan) -cdsteljn // 14 1981.06 DS Telejan +cdsteljn // 14 1981.06 DS Telejan cluckypo // 15 1981.?? Lucky Poker ctisland // 16 1982.02 Treasure Island ctisland2 // 16 @@ -5243,7 +5243,7 @@ cptennis // 22 1982.06 Pro Tennis // 24 1982.07 Tsumego Kaisyou // 25 1982.10 Angler Dangler? (fishing) cbtime // 26 1982.08 Hamburger/Burger Time -chamburger // 26 1982.08 Hamburger (Japan) +chamburger // 26 1982.08 Hamburger (Japan) cburnrub // 27 1982.11 Burnin' Rubber cburnrub2 // 27 cbnj // 27 Bump 'n' Jump diff --git a/src/mame/mame.mak b/src/mame/mame.mak index 1e8a490be2..67ff4f1101 100644 --- a/src/mame/mame.mak +++ b/src/mame/mame.mak @@ -1972,6 +1972,8 @@ $(DRIVERS)/cardline.o: $(LAYOUT)/cardline.lh $(DRIVERS)/cdi.o: $(LAYOUT)/cdi.lh +$(DRIVERS)/chance32.o: $(LAYOUT)/chance32.lh + $(DRIVERS)/changela.o: $(LAYOUT)/changela.lh $(DRIVERS)/chqflag.o: $(LAYOUT)/chqflag.lh diff --git a/src/mame/video/bfm_dm01.c b/src/mame/video/bfm_dm01.c index 7d5e68cce9..50865b9a1f 100644 --- a/src/mame/video/bfm_dm01.c +++ b/src/mame/video/bfm_dm01.c @@ -58,7 +58,7 @@ typedef struct _dm01 int data_avail, control, xcounter, - segbuffer[65], + segbuffer[65], busy; UINT8 scanline[DM_BYTESPERROW], @@ -152,13 +152,13 @@ static WRITE8_HANDLER( mux_w ) { UINT8 d = dm01.scanline[p]; - + for (int bitpos=0; bitpos <8; bitpos++) { if (((p*8)+bitpos) <65) { if (d & 1<<(7-bitpos)) dm01.segbuffer[(p*8)+bitpos]=1; - else dm01.segbuffer[(p*8)+bitpos]=0; + else dm01.segbuffer[(p*8)+bitpos]=0; } } p++; @@ -167,7 +167,7 @@ static WRITE8_HANDLER( mux_w ) for (int pos=0;pos<65;pos++) { output_set_indexed_value("dotmatrix", pos +(65*row), dm01.segbuffer[(pos)]); - } + } } } } diff --git a/src/mame/video/twincobr.c b/src/mame/video/twincobr.c index c76574550b..9d2aed92e0 100644 --- a/src/mame/video/twincobr.c +++ b/src/mame/video/twincobr.c @@ -352,13 +352,14 @@ WRITE8_MEMBER(twincobr_state::wardner_videoram_w) READ8_MEMBER(twincobr_state::wardner_sprite_r) { + UINT16 *spriteram16 = reinterpret_cast(m_spriteram8->live()); int shift = (offset & 1) * 8; - return m_spriteram->live()[offset/2] >> shift; + return spriteram16[offset/2] >> shift; } WRITE8_MEMBER(twincobr_state::wardner_sprite_w) { - UINT16 *spriteram16 = m_spriteram->live(); + UINT16 *spriteram16 = reinterpret_cast(m_spriteram8->live()); if (offset & 1) spriteram16[offset/2] = (spriteram16[offset/2] & 0x00ff) | (data << 8); else @@ -376,7 +377,7 @@ static void wardner_sprite_priority_hack(running_machine &machine) twincobr_state *state = machine.driver_data(); if (state->m_fgscrollx != state->m_bgscrollx) { - UINT16 *buffered_spriteram16 = state->m_spriteram->buffer(); + UINT16 *buffered_spriteram16 = reinterpret_cast(state->m_spriteram8->buffer()); if ((state->m_fgscrollx==0x1c9) || (state->m_flip_screen && (state->m_fgscrollx==0x17a))) { /* in the shop ? */ int wardner_hack = buffered_spriteram16[0x0b04/2]; /* sprite position 0x6300 to 0x8700 -- hero on shop keeper (normal) */ @@ -453,8 +454,19 @@ static void draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const r if (state->m_display_on) { - UINT16 *buffered_spriteram16 = state->m_spriteram->buffer(); - for (offs = 0;offs < state->m_spriteram->bytes()/2;offs += 4) + UINT16 *buffered_spriteram16; + UINT32 bytes; + if (state->m_spriteram16 != NULL) + { + buffered_spriteram16 = state->m_spriteram16->buffer(); + bytes = state->m_spriteram16->bytes(); + } + else + { + buffered_spriteram16 = reinterpret_cast(state->m_spriteram8->buffer()); + bytes = state->m_spriteram8->bytes(); + } + for (offs = 0;offs < bytes/2;offs += 4) { int attribute,sx,sy,flipx,flipy; int sprite, color; diff --git a/src/mess/drivers/cxhumax.c b/src/mess/drivers/cxhumax.c index bafd3b7a75..95f7348de4 100644 --- a/src/mess/drivers/cxhumax.c +++ b/src/mess/drivers/cxhumax.c @@ -1,13 +1,13 @@ /*************************************************************************** - HUMAX HDCI-2000 ( Conexant CX2417x ) - - http://www.humaxdigital.com/global/products/product_stb_satellite_hdci2000.asp - - Running on Nucleus PLUS - ARM7TDMI ADS v. 1.14 - some Conexant/Nucleus goodies may be found at http://code.google.com/p/cherices/ - - runs up to frame 280 or so... - + HUMAX HDCI-2000 ( Conexant CX2417x ) + + http://www.humaxdigital.com/global/products/product_stb_satellite_hdci2000.asp + + Running on Nucleus PLUS - ARM7TDMI ADS v. 1.14 + some Conexant/Nucleus goodies may be found at http://code.google.com/p/cherices/ + + runs up to frame 280 or so... + ****************************************************************************/ #include "emu.h" @@ -32,23 +32,23 @@ READ32_MEMBER ( cxhumax_state::cx_gxa_r ) { UINT32 res = m_gxa_cmd_regs[offset]; verboselog( machine(), 9, "(GXA) %08X -> %08X\n", 0xE0600000 + (offset << 2), res); -/* UINT8 gxa_command_number = (offset >> 9) & 0x7F; - verboselog( machine(), 9, " Command: %08X\n", gxa_command_number); - switch (gxa_command_number) { - case GXA_CMD_RW_REGISTER: - switch(offset) { - case GXA_CFG2_REG: - break; - default: - verboselog( machine(), 9, " Unimplemented register - TODO?\n"); - break; - } - break; - default: - // do we need it? - verboselog( machine(), 9, " Unimplemented read command - TODO?\n"); - break; - }*/ +/* UINT8 gxa_command_number = (offset >> 9) & 0x7F; + verboselog( machine(), 9, " Command: %08X\n", gxa_command_number); + switch (gxa_command_number) { + case GXA_CMD_RW_REGISTER: + switch(offset) { + case GXA_CFG2_REG: + break; + default: + verboselog( machine(), 9, " Unimplemented register - TODO?\n"); + break; + } + break; + default: + // do we need it? + verboselog( machine(), 9, " Unimplemented read command - TODO?\n"); + break; + }*/ return res; } @@ -89,7 +89,7 @@ WRITE32_MEMBER( cxhumax_state::cx_gxa_w ) m_gxa_cmd_regs[GXA_CMD_REG] = (m_gxa_cmd_regs[GXA_CMD_REG] & 0x3ffff) | (data<<24) | ((data&0x10)?1<<23:0); /* QMARK command has completed */ - m_gxa_cmd_regs[GXA_CFG2_REG] |= (1< %08X\n", 0xE0400024 + (offset << 2), data); - + if((cpu_get_pc(m_maincpu)==0xF0003BB8) || (cpu_get_pc(m_maincpu)==0x01003724) || (cpu_get_pc(m_maincpu)==0x00005d8c)) { // HDCI-2000 //we're in disabled debug_printf unsigned char* buf = (unsigned char *)alloca(200); @@ -157,7 +157,7 @@ READ32_MEMBER( cxhumax_state::cx_scratch_r ) address_space *program = m_maincpu->memory().space(AS_PROGRAM); memset(buf,0,200); - + int i = 0; while ((temp=program->read_byte(cpu_get_reg(m_maincpu, ARM7_R0)+i))) { buf[i++]=temp; @@ -379,7 +379,7 @@ WRITE32_MEMBER( cxhumax_state::cx_timers_w ) case TIMER_TIMEBASE: COMBINE_DATA(&m_timer_regs.timer[index].timebase); break; } - /* A timer will hold an interrupt active until any one of that timer’s registers is written. */ + /* A timer will hold an interrupt active until any one of that timer?s registers is written. */ if(m_timer_regs.timer_irq & (1<write(space, 0, data); - + /* Transmitter Idle Interrupt Enable */ if(m_uart2_regs[UART_IRQE_REG]&UART_IRQE_TIDE_BIT) { /* Signal pending INT */ m_intctrl_regs[INTREG(INTGROUP1, INTIRQ)] |= INT_UART2_BIT; m_intctrl_regs[INTREG(INTGROUP1, INTSTATCLR)] |= INT_UART2_BIT; m_intctrl_regs[INTREG(INTGROUP1, INTSTATSET)] |= INT_UART2_BIT; - + /* If INT is enabled at INT Ctrl raise it */ if(m_intctrl_regs[INTREG(INTGROUP1, INTENABLE)]&INT_UART2_BIT) { device_set_input_line(machine().device("maincpu"), ARM7_IRQ_LINE, ASSERT_LINE); @@ -494,13 +494,13 @@ WRITE32_MEMBER( cxhumax_state::cx_intctrl_w ) switch(offset & 7) { case INTSTATCLR: // ITC_INTSTATCLR_REG Group 1 /* - Bits 15 (PWM), 14 (PIO103) of Group 1 are the logical OR of their lower level interrupt - status bits down within the interrupting module and are not registered. - - The source registers must be cleared to clear these interrupt bits. - */ + Bits 15 (PWM), 14 (PIO103) of Group 1 are the logical OR of their lower level interrupt + status bits down within the interrupting module and are not registered. + + The source registers must be cleared to clear these interrupt bits. + */ data &= ~(INT_PWM_BIT|INT_PIO103_BIT); - + m_intctrl_regs[INTREG(INTGROUP1, INTSTATCLR)] &= ~data; m_intctrl_regs[INTREG(INTGROUP1, INTSTATSET)] &= ~data; m_intctrl_regs[INTREG(INTGROUP1, INTIRQ)] &= ~data; @@ -514,17 +514,17 @@ WRITE32_MEMBER( cxhumax_state::cx_intctrl_w ) switch(offset & 7) { case INTSTATCLR: // ITC_INTSTATCLR_REG Group 2 /* - The timer interrupt service routine must write to one of the timer - registers before clearing the corresponding Interrupt Controller ISR timer - interrupt bit. - - Bit 7 (Timers) of Group 2 is the logical OR of its lower level interrupt - status bits down within the interrupting module and are not registered. - - The source registers must be cleared to clear these interrupt bits. - */ + The timer interrupt service routine must write to one of the timer + registers before clearing the corresponding Interrupt Controller ISR timer + interrupt bit. + + Bit 7 (Timers) of Group 2 is the logical OR of its lower level interrupt + status bits down within the interrupting module and are not registered. + + The source registers must be cleared to clear these interrupt bits. + */ if(m_timer_regs.timer_irq) data &= ~INT_TIMER_BIT; - + m_intctrl_regs[INTREG(INTGROUP2, INTSTATCLR)] &= ~data; m_intctrl_regs[INTREG(INTGROUP2, INTSTATSET)] &= ~data; m_intctrl_regs[INTREG(INTGROUP2, INTIRQ)] &= ~data; @@ -537,7 +537,7 @@ WRITE32_MEMBER( cxhumax_state::cx_intctrl_w ) default: break; } - + if(m_i2c1_regs[I2C_STAT_REG]&I2C_INT_BIT) { m_intctrl_regs[INTREG(INTGROUP1, INTIRQ)] |= 1<<7; @@ -551,7 +551,7 @@ WRITE32_MEMBER( cxhumax_state::cx_intctrl_w ) device_set_input_line(machine().device("maincpu"), ARM7_IRQ_LINE, ASSERT_LINE); else device_set_input_line(machine().device("maincpu"), ARM7_IRQ_LINE, CLEAR_LINE); - + } READ32_MEMBER( cxhumax_state::cx_ss_r ) @@ -724,11 +724,11 @@ WRITE32_MEMBER( cxhumax_state::cx_i2c1_w ) if(data&0x20) {// STOP i2cmem_stop(machine().device("eeprom")); } - + /* The interrupt status bit is set at the end of an I2C read or write operation. */ m_i2c1_regs[I2C_STAT_REG] |= I2C_INT_BIT; m_i2c1_regs[I2C_STAT_REG] |= I2C_WACK_BIT; - + m_intctrl_regs[INTREG(INTGROUP1, INTIRQ)] |= 1<<7; m_intctrl_regs[INTREG(INTGROUP1, INTSTATCLR)] |= 1<<7; m_intctrl_regs[INTREG(INTGROUP1, INTSTATSET)] |= 1<<7; @@ -891,7 +891,7 @@ INLINE UINT32 ycc_to_rgb(UINT32 ycc) } static SCREEN_UPDATE_RGB32( cxhumax ) -{ +{ int i, j; cxhumax_state *state = screen.machine().driver_data(); @@ -917,16 +917,16 @@ static SCREEN_UPDATE_RGB32( cxhumax ) UINT32 ydisp_last = (y_position_and_region_alpha >> 12) & 0x7ff; UINT32 ydisp_start = y_position_and_region_alpha & 0x7ff; - /* UINT32 first_x = state->m_drm0_regs[DRM_ACTIVE_X_REG] & 0xffff; - UINT32 last_x = (state->m_drm0_regs[DRM_ACTIVE_X_REG] >> 16) & 0xffff; + /* UINT32 first_x = state->m_drm0_regs[DRM_ACTIVE_X_REG] & 0xffff; + UINT32 last_x = (state->m_drm0_regs[DRM_ACTIVE_X_REG] >> 16) & 0xffff; - UINT32 first_y = state->m_drm0_regs[DRM_ACTIVE_Y_REG] & 0xfff; - UINT32 last_y = (state->m_drm0_regs[DRM_ACTIVE_Y_REG] >> 16) & 0xfff;*/ + UINT32 first_y = state->m_drm0_regs[DRM_ACTIVE_Y_REG] & 0xfff; + UINT32 last_y = (state->m_drm0_regs[DRM_ACTIVE_Y_REG] >> 16) & 0xfff;*/ for (j=ydisp_start; j <= ydisp_last; j++) { - UINT32 *bmp = &bitmap.pix32(j); - + UINT32 *bmp = &bitmap.pix32(j); + for (i=xdisp_start; i <= (xdisp_start + xdisp_width); i++) { if ((i <= (xdisp_start + ximg_width)) && (j <= (ydisp_start + yimg_height))) { @@ -1014,14 +1014,14 @@ static MACHINE_RESET( cxhumax ) 0 << 30 | /* 0=using SC1 (TDA8004) 1=not using SC1 */ 1 << 31; /* 0=Ext clk for boot 1=Int PLL for boot OK */ state->m_chipcontrol_regs[SREG_MODE_REG] = 0x0000020F; - + memset(state->m_isaromdescr_regs,0,sizeof(state->m_isaromdescr_regs)); memset(state->m_isadescr_regs,0,sizeof(state->m_isadescr_regs)); state->m_rommode_reg=0; state->m_xoemask_reg=0; memset(state->m_extdesc_regs,0,sizeof(state->m_extdesc_regs)); - state->m_pll_regs[SREG_MPG_0_INTFRAC_REG] = (0x1A << 25) /* integer */ | 0x5D1764 /* fraction */; + state->m_pll_regs[SREG_MPG_0_INTFRAC_REG] = (0x1A << 25) /* integer */ | 0x5D1764 /* fraction */; state->m_pll_regs[SREG_MPG_1_INTFRAC_REG] = (0x1A << 25) /* integer */ | 0x5D1764 /* fraction */; state->m_pll_regs[SREG_ARM_INTFRAC_REG] = (0x28 << 25) /* integer */ | 0xCEDE62 /* fraction */; state->m_pll_regs[SREG_MEM_INTFRAC_REG] = (0x13 << 25) /* integer */ | 0xC9B26D /* fraction */; @@ -1042,13 +1042,13 @@ static MACHINE_RESET( cxhumax ) // UART2 state->m_uart2_regs[UART_FIFC_REG] = 0x30; - + // Clear SS TX FIFO memset(state->m_ss_tx_fifo,0,sizeof(state->m_ss_tx_fifo)); state->m_ss_regs[SS_BAUD_REG] = 1; // Default SS clock = 13,5MHz memset(state->m_intctrl_regs,0,sizeof(state->m_intctrl_regs)); - + memset(state->m_hdmi_regs,0,sizeof(state->m_hdmi_regs)); memset(state->m_gxa_cmd_regs,0,sizeof(state->m_gxa_cmd_regs)); @@ -1086,7 +1086,7 @@ static MACHINE_CONFIG_START( cxhumax, cxhumax_state ) MCFG_PALETTE_INIT(black_and_white) MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf) - + MCFG_VIDEO_START(cxhumax) MACHINE_CONFIG_END @@ -1100,4 +1100,4 @@ ROM_START( hxhdci2k ) ROM_END /* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */ -SYST( 2008, hxhdci2k, 0, 0, cxhumax, cxhumax, 0, "HUMAX", "HUMAX HDCI-2000", GAME_NOT_WORKING | GAME_NO_SOUND) +SYST( 2008, hxhdci2k, 0, 0, cxhumax, cxhumax, 0, "HUMAX", "HUMAX HDCI-2000", GAME_NOT_WORKING | GAME_NO_SOUND) diff --git a/src/mess/drivers/dm7000.c b/src/mess/drivers/dm7000.c index 02972e9e55..435c8e3b85 100644 --- a/src/mess/drivers/dm7000.c +++ b/src/mess/drivers/dm7000.c @@ -156,9 +156,9 @@ WRITE8_MEMBER( dm7000_state::dm7000_scp0_w ) 400b 000x iic 400c 000x scp 400d 000x modem - + STBx25xx - + 4000 000x Serial1 Controller 4001 000x Serial2 Controller 4002 00xx Smart Card Interface 0 @@ -169,9 +169,9 @@ WRITE8_MEMBER( dm7000_state::dm7000_scp0_w ) 4007 00xx Smart Card Interface 1 400c 000x Serial Controller Port 400d 00xx Synchronous Serial Port - + STB04xxx - + 4000 00xx Serial1/Infrared Controller 4001 00xx Universal Serial Bus 4002 00xx Smart Card Interface 0 @@ -185,19 +185,19 @@ WRITE8_MEMBER( dm7000_state::dm7000_scp0_w ) 400d 00xx Synchronous Serial Port 400e 000x Serial2/UART750 Controller 400f 0xxx IDE Controller - + */ static ADDRESS_MAP_START( dm7000_mem, AS_PROGRAM, 32, dm7000_state ) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x00000000, 0x01ffffff) AM_RAM // RAM page 0 - 32MB AM_RANGE(0x20000000, 0x21ffffff) AM_RAM // RAM page 1 - 32MB - + AM_RANGE(0x40030000, 0x4003000f) AM_READWRITE8(dm7000_iic0_r, dm7000_iic0_w, 0xffffffff) AM_RANGE(0x40040000, 0x40040007) AM_READWRITE8(dm7000_scc0_r, dm7000_scc0_w, 0xffffffff) AM_RANGE(0x40060000, 0x40060047) AM_READWRITE8(dm7000_gpio0_r, dm7000_gpio0_w, 0xffffffff) AM_RANGE(0x400b0000, 0x400b000f) AM_READWRITE8(dm7000_iic1_r, dm7000_iic1_w, 0xffffffff) AM_RANGE(0x400c0000, 0x400c0007) AM_READWRITE8(dm7000_scp0_r, dm7000_scp0_w, 0xffffffff) - + AM_RANGE(0x7f800000, 0x7ffdffff) AM_ROM AM_REGION("user2",0) AM_RANGE(0x7ffe0000, 0x7fffffff) AM_ROM AM_REGION("user1",0) //AM_RANGE(0xfffe0000, 0xffffffff) AM_ROM AM_REGION("user1",0) @@ -211,7 +211,7 @@ INPUT_PORTS_END static MACHINE_RESET(dm7000) { dm7000_state *state = machine.driver_data(); - + state->dcr[DCRSTB045_CICVCR] = 0x00000001; state->dcr[DCRSTB045_SCCR] = 0x00420080 /* default for serial divs */ | 0x3f /* undocumented?? used to print clocks */; state->dcr[DCRSTB045_VIDEO_CNTL] = 0x00009000; @@ -279,7 +279,7 @@ static MACHINE_CONFIG_START( dm7000, dm7000_state ) MCFG_PALETTE_LENGTH(2) MCFG_PALETTE_INIT(black_and_white) - + MCFG_GENERIC_TERMINAL_ADD(TERMINAL_TAG, terminal_intf) MCFG_VIDEO_START(dm7000) diff --git a/src/mess/drivers/e01.c b/src/mess/drivers/e01.c index 868827c6b8..93ce8a2191 100644 --- a/src/mess/drivers/e01.c +++ b/src/mess/drivers/e01.c @@ -39,16 +39,16 @@ TODO: - - centronics strobe - - VIA CB2 -> econet rx/tx clock terminator + - centronics strobe + - VIA CB2 -> econet rx/tx clock terminator - ADLC interrupts - ECONET device - artwork - hard disk - E20: Rodime RO652 (-chs 306,4,17,512) - E40S: - E60S: + E20: Rodime RO652 (-chs 306,4,17,512) + E40S: + E60S: */ @@ -135,9 +135,9 @@ WRITE8_MEMBER( e01_state::floppy_w ) 5 floppy master reset 6 floppy test 7 mode LED - - */ - + + */ + // floppy 1 select if (!BIT(data, 0)) wd17xx_set_drive(m_fdc, 0); @@ -215,7 +215,7 @@ WRITE8_MEMBER( e01_state::network_irq_enable_w ) READ8_MEMBER( e01_state::hdc_data_r ) { UINT8 data = scsi_data_r(m_scsibus, 0); - + scsi_ack_w(m_scsibus, 0); return data; @@ -241,19 +241,19 @@ WRITE8_MEMBER( e01_state::hdc_data_w ) READ8_MEMBER( e01_state::hdc_status_r ) { /* - - bit description - - 0 MSG - 1 BSY - 2 0 - 3 0 - 4 NIRQ - 5 REQ - 6 I/O - 7 C/D - - */ + + bit description + + 0 MSG + 1 BSY + 2 0 + 3 0 + 4 NIRQ + 5 REQ + 6 I/O + 7 C/D + + */ UINT8 data = 0; @@ -391,7 +391,7 @@ WRITE_LINE_MEMBER( e01_state::rtc_irq_w ) update_interrupts(); } -static mc146818_interface rtc_intf = +static mc146818_interface rtc_intf = { DEVCB_DRIVER_LINE_MEMBER(e01_state, rtc_irq_w) }; @@ -535,7 +535,7 @@ static const SCSIBus_interface scsi_intf = // centronics_interface e01_centronics_intf //------------------------------------------------- -static centronics_interface e01_centronics_intf = +static centronics_interface e01_centronics_intf = { DEVCB_DEVICE_LINE_MEMBER(R6522_TAG, via6522_device, write_ca1), DEVCB_NULL, diff --git a/src/mess/drivers/esq5505.c b/src/mess/drivers/esq5505.c index e47b02b6ab..27992836d2 100644 --- a/src/mess/drivers/esq5505.c +++ b/src/mess/drivers/esq5505.c @@ -4,11 +4,11 @@ Ensoniq VFX, EPS-16 Plus, and SQ-1 (VFX-SD, SD-1, SQ-1 Plus, SQ-2, and KS-32 are known to also be this architecture). - + The Taito sound system in taito_en.c is directly derived from the SQ-1. - + Driver by R. Belmont - + 00 - harsh piano 01 - bells/chimes 04 - organ @@ -28,7 +28,7 @@ 73 - orch hit with strings 74 - bell tone 80 - drums - + ***************************************************************************/ #include "emu.h" @@ -199,7 +199,7 @@ static ADDRESS_MAP_START( vfx_map, AS_PROGRAM, 16, esq5505_state ) AM_RANGE(0x000000, 0x03ffff) AM_RAM AM_SHARE("osram") AM_RANGE(0x200000, 0x20001f) AM_DEVREADWRITE_LEGACY("ensoniq", es5505_r, es5505_w) AM_RANGE(0x260000, 0x2601ff) AM_READWRITE(es5510_dsp_r, es5510_dsp_w) - AM_RANGE(0x280000, 0x28001f) AM_DEVREADWRITE8_LEGACY("duart", duart68681_r, duart68681_w, 0x00ff) + AM_RANGE(0x280000, 0x28001f) AM_DEVREADWRITE8_LEGACY("duart", duart68681_r, duart68681_w, 0x00ff) AM_RANGE(0xc00000, 0xc1ffff) AM_ROM AM_REGION("osrom", 0) AM_RANGE(0xfc0000, 0xffffff) AM_RAM AM_SHARE("osram") ADDRESS_MAP_END @@ -207,7 +207,7 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( eps16_map, AS_PROGRAM, 16, esq5505_state ) AM_RANGE(0x000000, 0x03ffff) AM_RAM AM_SHARE("osram") AM_RANGE(0x200000, 0x20001f) AM_DEVREADWRITE_LEGACY("ensoniq", es5505_r, es5505_w) - AM_RANGE(0x280000, 0x28001f) AM_DEVREADWRITE8_LEGACY("duart", duart68681_r, duart68681_w, 0x00ff) + AM_RANGE(0x280000, 0x28001f) AM_DEVREADWRITE8_LEGACY("duart", duart68681_r, duart68681_w, 0x00ff) AM_RANGE(0x580000, 0x77ffff) AM_RAM // sample RAM (2 MB max represented here) AM_RANGE(0xc00000, 0xc0ffff) AM_ROM AM_REGION("osrom", 0) ADDRESS_MAP_END @@ -350,28 +350,28 @@ INPUT_PORTS_END ROM_START( vfx ) ROM_REGION(0x20000, "osrom", 0) - ROM_LOAD16_BYTE( "vfx210b-low.bin", 0x000000, 0x010000, CRC(c51b19cd) SHA1(2a125b92ffa02ae9d7fb88118d525491d785e87e) ) - ROM_LOAD16_BYTE( "vfx210b-high.bin", 0x000001, 0x010000, CRC(59853be8) SHA1(8e07f69d53f80885d15f624e0b912aeaf3212ee4) ) + ROM_LOAD16_BYTE( "vfx210b-low.bin", 0x000000, 0x010000, CRC(c51b19cd) SHA1(2a125b92ffa02ae9d7fb88118d525491d785e87e) ) + ROM_LOAD16_BYTE( "vfx210b-high.bin", 0x000001, 0x010000, CRC(59853be8) SHA1(8e07f69d53f80885d15f624e0b912aeaf3212ee4) ) ROM_REGION(0x200000, "waverom", ROMREGION_ERASE00) - ROM_LOAD( "vfx-waves-1.bin", 0x000000, 0x080000, NO_DUMP ) - ROM_LOAD( "vfx-waves-2.bin", 0x100000, 0x080000, NO_DUMP ) + ROM_LOAD( "vfx-waves-1.bin", 0x000000, 0x080000, NO_DUMP ) + ROM_LOAD( "vfx-waves-2.bin", 0x100000, 0x080000, NO_DUMP ) ROM_END ROM_START( sq1 ) ROM_REGION(0x20000, "osrom", 0) - ROM_LOAD16_BYTE( "esq5505lo.bin", 0x000000, 0x010000, CRC(b004cf05) SHA1(567b0dae2e35b06e39da108f9c041fd9bc38fa35) ) - ROM_LOAD16_BYTE( "esq5505up.bin", 0x000001, 0x010000, CRC(2e927873) SHA1(06a948cb71fa254b23f4b9236f29035d10778da1) ) + ROM_LOAD16_BYTE( "esq5505lo.bin", 0x000000, 0x010000, CRC(b004cf05) SHA1(567b0dae2e35b06e39da108f9c041fd9bc38fa35) ) + ROM_LOAD16_BYTE( "esq5505up.bin", 0x000001, 0x010000, CRC(2e927873) SHA1(06a948cb71fa254b23f4b9236f29035d10778da1) ) ROM_REGION(0x200000, "waverom", 0) - ROM_LOAD16_BYTE( "sq1-u25.bin", 0x000001, 0x080000, CRC(26312451) SHA1(9f947a11592fd8420fc581914bf16e7ade75390c) ) - ROM_LOAD16_BYTE( "sq1-u26.bin", 0x100001, 0x080000, CRC(2edaa9dc) SHA1(72fead505c4f44e5736ff7d545d72dfa37d613e2) ) + ROM_LOAD16_BYTE( "sq1-u25.bin", 0x000001, 0x080000, CRC(26312451) SHA1(9f947a11592fd8420fc581914bf16e7ade75390c) ) + ROM_LOAD16_BYTE( "sq1-u26.bin", 0x100001, 0x080000, CRC(2edaa9dc) SHA1(72fead505c4f44e5736ff7d545d72dfa37d613e2) ) ROM_END ROM_START( eps16 ) ROM_REGION(0x10000, "osrom", 0) - ROM_LOAD16_BYTE( "eps-l.bin", 0x000000, 0x008000, CRC(382beac1) SHA1(110e31edb03fcf7bbde3e17423b21929e5b32db2) ) - ROM_LOAD16_BYTE( "eps-h.bin", 0x000001, 0x008000, CRC(d8747420) SHA1(460597751386eb5f08465699b61381c4acd78065) ) + ROM_LOAD16_BYTE( "eps-l.bin", 0x000000, 0x008000, CRC(382beac1) SHA1(110e31edb03fcf7bbde3e17423b21929e5b32db2) ) + ROM_LOAD16_BYTE( "eps-h.bin", 0x000001, 0x008000, CRC(d8747420) SHA1(460597751386eb5f08465699b61381c4acd78065) ) ROM_REGION(0x200000, "waverom", ROMREGION_ERASE00) // did the EPS-16 have ROM sounds or is it a pure sampler? ROM_END diff --git a/src/mess/drivers/m20.c b/src/mess/drivers/m20.c index 85f1da3b69..676bb8d4d7 100644 --- a/src/mess/drivers/m20.c +++ b/src/mess/drivers/m20.c @@ -212,7 +212,7 @@ static ADDRESS_MAP_START(m20_io, AS_IO, 16, m20_state) AM_RANGE(0x120, 0x127) AM_DEVREADWRITE8_LEGACY("pit8253", pit8253_r, pit8253_w, 0x00ff) AM_RANGE(0x140, 0x143) AM_READWRITE(m20_i8259_r, m20_i8259_w) -// AM_RANGE(0x140, 0x143) AM_DEVREADWRITE8_LEGACY("i8259", pic8259_r, pic8259_w, 0xffff) +// AM_RANGE(0x140, 0x143) AM_DEVREADWRITE8_LEGACY("i8259", pic8259_r, pic8259_w, 0xffff) // 0x21?? / 0x21? - fdc ... seems to control the screen colors??? ADDRESS_MAP_END diff --git a/src/mess/drivers/test_t400.c b/src/mess/drivers/test_t400.c index 558da51df1..49a40d7f5f 100644 --- a/src/mess/drivers/test_t400.c +++ b/src/mess/drivers/test_t400.c @@ -1,8 +1,8 @@ /* - T400 uController test suite for COP410/420 series CPUs + T400 uController test suite for COP410/420 series CPUs - http://opencores.org/project,t400 + http://opencores.org/project,t400 */ diff --git a/src/mess/drivers/vic20.c b/src/mess/drivers/vic20.c index cb604cb37f..985300eb22 100644 --- a/src/mess/drivers/vic20.c +++ b/src/mess/drivers/vic20.c @@ -433,7 +433,7 @@ READ8_MEMBER( vic20_state::via0_pa_r ) PA4 JOY 2 PA5 LITE PEN PA6 CASS SWITCH - PA7 + PA7 */ @@ -468,13 +468,13 @@ WRITE8_MEMBER( vic20_state::via0_pa_w ) bit description - PA0 - PA1 - PA2 - PA3 - PA4 - PA5 - PA6 + PA0 + PA1 + PA2 + PA3 + PA4 + PA5 + PA6 PA7 SERIAL ATN OUT */ diff --git a/src/mess/drivers/vidbrain.c b/src/mess/drivers/vidbrain.c index f3b8c777ba..1ad1de6bab 100644 --- a/src/mess/drivers/vidbrain.c +++ b/src/mess/drivers/vidbrain.c @@ -16,9 +16,9 @@ TODO: - - video interrupts - - R-2R ladder DAC - - reset on cartridge unload + - video interrupts + - R-2R ladder DAC + - reset on cartridge unload - use machine/f3853.h - joystick scan timer 555 - expander 1 (cassette, RS-232) @@ -122,8 +122,8 @@ WRITE8_MEMBER( vidbrain_state::sound_w ) 2 3 4 sound clock - 5 accessory jack pin 5 - 6 accessory jack pin 1 + 5 accessory jack pin 5 + 6 accessory jack pin 1 7 joystick enable */ @@ -423,7 +423,7 @@ WRITE_LINE_MEMBER( vidbrain_state::hblank_w ) // C = 0.003uF // t = 1.1 * R * C double t = 1.1 * (RES_K(3.9) + RES_K(joydata)) * 3; - + timer_set(attotime::from_nsec(t), TIMER_JOYSTICK); } } @@ -494,7 +494,7 @@ void vidbrain_state::machine_start() { // register IRQ callback device_set_irq_callback(m_maincpu, vidbrain_int_ack); - + // allocate timers m_timer_ne555 = timer_alloc(TIMER_JOYSTICK); @@ -537,7 +537,7 @@ static MACHINE_CONFIG_START( vidbrain, vidbrain_state ) // video hardware MCFG_UV201_ADD(UV201_TAG, SCREEN_TAG, XTAL_14_31818MHz, uv_intf) - + // sound hardware MCFG_SPEAKER_STANDARD_MONO("mono") diff --git a/src/mess/includes/cxhumax.h b/src/mess/includes/cxhumax.h index daa91d1fa3..ab0d0ff089 100644 --- a/src/mess/includes/cxhumax.h +++ b/src/mess/includes/cxhumax.h @@ -41,7 +41,7 @@ class cxhumax_state : public driver_device DECLARE_WRITE32_MEMBER ( flash_w ); DECLARE_READ32_MEMBER ( flash_r ); - + DECLARE_WRITE32_MEMBER ( cx_hsx_w ); DECLARE_READ32_MEMBER ( cx_hsx_r ); @@ -87,30 +87,30 @@ class cxhumax_state : public driver_device DECLARE_WRITE32_MEMBER ( cx_ss_w ); DECLARE_READ32_MEMBER ( cx_ss_r ); - + DECLARE_WRITE32_MEMBER ( cx_i2c0_w ); DECLARE_READ32_MEMBER ( cx_i2c0_r ); DECLARE_WRITE32_MEMBER ( cx_i2c1_w ); DECLARE_READ32_MEMBER ( cx_i2c1_r ); DECLARE_WRITE32_MEMBER ( cx_i2c2_w ); DECLARE_READ32_MEMBER ( cx_i2c2_r ); - + DECLARE_WRITE32_MEMBER ( cx_mc_cfg_w ); DECLARE_READ32_MEMBER ( cx_mc_cfg_r ); - + DECLARE_WRITE32_MEMBER ( cx_drm0_w ); DECLARE_READ32_MEMBER ( cx_drm0_r ); DECLARE_WRITE32_MEMBER ( cx_drm1_w ); DECLARE_READ32_MEMBER ( cx_drm1_r ); - + DECLARE_WRITE32_MEMBER ( cx_hdmi_w ); DECLARE_READ32_MEMBER ( cx_hdmi_r ); - + DECLARE_WRITE32_MEMBER ( cx_gxa_w ); DECLARE_READ32_MEMBER ( cx_gxa_r ); DECLARE_READ32_MEMBER ( dummy_flash_r ); - + UINT32 m_romdescr_reg; UINT32 m_isaromdescr_regs[0x0C/4]; UINT32 m_isadescr_regs[0x10/4]; @@ -129,7 +129,7 @@ class cxhumax_state : public driver_device UINT32 m_pllprescale_reg; UINT32 m_intctrl_regs[0x38/4]; - + UINT32 m_ss_regs[0x18/4]; UINT8 m_ss_tx_fifo[8]; // 8 entries (size hardcoded to 8 bits per entry - TODO) @@ -141,25 +141,25 @@ class cxhumax_state : public driver_device UINT32 m_mccfg_regs[0x0C/4]; UINT32 m_chipcontrol_regs[0x74/4]; - + UINT32 m_drm0_regs[0xfc/4]; UINT32 m_drm1_regs[0xfc/4]; - + UINT32 m_hdmi_regs[0x400/4]; - + UINT32 m_gxa_cmd_regs[0x130/4]; }; #define INTDEST 0 // Interrupt destination (1=IRQ, 0=FIQ) #define INTENABLE 1 // Enables the interrupt generation -#define INTIRQ 2 // Normal interrupt +#define INTIRQ 2 // Normal interrupt #define INTFIQ 3 // Fast interrupt #define INTSTATCLR 4 // Read: interrupt status, Write: clear pending interrupt #define INTSTATSET 5 // Read: interrupt status, Write: sets a pending interrupt #define INTGROUP1 0 #define INTGROUP2 1 -#define INTREG(group, index) (((group) << 3) | (index)) +#define INTREG(group, index) (((group) << 3) | (index)) #define GXA_CMD_RW_REGISTER 0x00 #define GXA_CMD_QMARK 0x02 diff --git a/src/mess/includes/dm7000.h b/src/mess/includes/dm7000.h index 9112245395..9bbe00b51e 100644 --- a/src/mess/includes/dm7000.h +++ b/src/mess/includes/dm7000.h @@ -15,24 +15,24 @@ class dm7000_state : public driver_device required_device m_maincpu; required_device m_terminal; - + DECLARE_WRITE8_MEMBER ( dm7000_iic0_w ); DECLARE_READ8_MEMBER ( dm7000_iic0_r ); DECLARE_WRITE8_MEMBER ( dm7000_iic1_w ); DECLARE_READ8_MEMBER ( dm7000_iic1_r ); - + DECLARE_WRITE8_MEMBER ( dm7000_scc0_w ); DECLARE_READ8_MEMBER ( dm7000_scc0_r ); UINT8 m_scc0_lcr; UINT8 m_scc0_lsr; - + DECLARE_WRITE8_MEMBER ( dm7000_gpio0_w ); DECLARE_READ8_MEMBER ( dm7000_gpio0_r ); - + DECLARE_WRITE8_MEMBER ( dm7000_scp0_w ); DECLARE_READ8_MEMBER ( dm7000_scp0_r ); - - UINT32 dcr[1024]; + + UINT32 dcr[1024]; }; /* */ diff --git a/src/mess/includes/vidbrain.h b/src/mess/includes/vidbrain.h index 5fbe2595a8..938ed48caa 100644 --- a/src/mess/includes/vidbrain.h +++ b/src/mess/includes/vidbrain.h @@ -68,7 +68,7 @@ class vidbrain_state : public driver_device int m_sound_clk; // timers - emu_timer *m_timer_ne555; + emu_timer *m_timer_ne555; }; //----------- defined in video/vidbrain.c ----------- diff --git a/src/mess/machine/8530scc.c b/src/mess/machine/8530scc.c index b215f6868b..c1c7091fea 100644 --- a/src/mess/machine/8530scc.c +++ b/src/mess/machine/8530scc.c @@ -226,7 +226,7 @@ UINT8 scc8530_t::getareg() rv |= (ourCh->txUnderrun) ? 0x40 : 0; rv |= (ourCh->syncHunt) ? 0x10 : 0; - rv |= channel[0].reg_val[0] & 0x05; // pick up TXBE and RXBF bits + rv |= channel[0].reg_val[0] & 0x05; // pick up TXBE and RXBF bits return rv; } @@ -257,7 +257,7 @@ UINT8 scc8530_t::getbreg() rv |= (ourCh->txUnderrun) ? 0x40 : 0; rv |= (ourCh->syncHunt) ? 0x10 : 0; - rv |= channel[1].reg_val[0] & 0x05; // pick up TXBE and RXBF bits + rv |= channel[1].reg_val[0] & 0x05; // pick up TXBE and RXBF bits return rv; } diff --git a/src/mess/machine/c64_cpm.c b/src/mess/machine/c64_cpm.c index e7e14da774..4885893ebb 100644 --- a/src/mess/machine/c64_cpm.c +++ b/src/mess/machine/c64_cpm.c @@ -11,9 +11,9 @@ /* - TODO: + TODO: - - Z80 clock speed + - Z80 clock speed */ diff --git a/src/mess/machine/kaypro.c b/src/mess/machine/kaypro.c index 15c7a83ea4..6f55662903 100644 --- a/src/mess/machine/kaypro.c +++ b/src/mess/machine/kaypro.c @@ -229,7 +229,7 @@ WRITE8_MEMBER( kaypro_state::kaypro2x_system_port_w ) WRITE8_MEMBER( kaypro_state::kaypro_baud_a_w ) /* channel A - RS232C */ { -// data &= 0x0f; +// data &= 0x0f; // z80sio_set_rx_clock( m_sio, baud_clock[data], 0); // z80sio_set_tx_clock( m_sio, baud_clock[data], 0); @@ -237,7 +237,7 @@ WRITE8_MEMBER( kaypro_state::kaypro_baud_a_w ) /* channel A - RS232C */ WRITE8_MEMBER( kaypro_state::kayproii_baud_b_w ) /* Channel B - Keyboard - only usable speed is 300 baud */ { -// data &= 0x0f; +// data &= 0x0f; // z80sio_set_rx_clock( m_sio, baud_clock[data], 1); // z80sio_set_tx_clock( m_sio, baud_clock[data], 1); @@ -245,7 +245,7 @@ WRITE8_MEMBER( kaypro_state::kayproii_baud_b_w ) /* Channel B - Keyboard - only WRITE8_MEMBER( kaypro_state::kaypro2x_baud_a_w ) /* Channel A on 2nd SIO - Serial Printer */ { -// data &= 0x0f; +// data &= 0x0f; // z80sio_set_rx_clock( m_sio2x, baud_clock[data], 0); // z80sio_set_tx_clock( m_sio2x, baud_clock[data], 0); diff --git a/src/mess/machine/kb_msnat.c b/src/mess/machine/kb_msnat.c index e06974db54..9d8894d50f 100644 --- a/src/mess/machine/kb_msnat.c +++ b/src/mess/machine/kb_msnat.c @@ -96,13 +96,13 @@ static INPUT_PORTS_START( microsoft_natural ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4)) // 3E PORT_START( "P2.7" ) - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH_PAD) PORT_CHAR(UCHAR_MAMEKEY(SLASH_PAD)) // E0 + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH_PAD) PORT_CHAR(UCHAR_MAMEKEY(SLASH_PAD)) // E0 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD)) // 47 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4_PAD) PORT_CHAR(UCHAR_MAMEKEY(4_PAD)) // 4B PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_PLUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(PLUS_PAD)) // 4E PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1_PAD) PORT_CHAR(UCHAR_MAMEKEY(1_PAD)) // 4F - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR(UCHAR_MAMEKEY(ASTERISK)) // 37 TODO - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_PRTSCR) PORT_CHAR(UCHAR_MAMEKEY(PRTSCR)) // E0 2A E0 37 + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR(UCHAR_MAMEKEY(ASTERISK)) // 37 TODO + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_PRTSCR) PORT_CHAR(UCHAR_MAMEKEY(PRTSCR)) // E0 2A E0 37 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MENU) PORT_CHAR(UCHAR_MAMEKEY(MENU)) // E0 5D PORT_START( "P1.0" ) diff --git a/src/mess/machine/lisa.c b/src/mess/machine/lisa.c index fa812c8451..3c1e664be1 100644 --- a/src/mess/machine/lisa.c +++ b/src/mess/machine/lisa.c @@ -271,7 +271,7 @@ static void COPS_queue_data(running_machine &machine, const UINT8 *data, int len #endif { -// printf("Adding %d bytes of data to FIFO\n", len); +// printf("Adding %d bytes of data to FIFO\n", len); while (len--) { diff --git a/src/mess/mess.lst b/src/mess/mess.lst index ce3f7829dd..5a396ffe85 100644 --- a/src/mess/mess.lst +++ b/src/mess/mess.lst @@ -176,7 +176,7 @@ esq1 // 1986 ESQ-1 Digital Wave Synthesizer //sq80 // 1988 SQ-80 Digital Wave Synthesizer vfx // 1989 VFX eps16 // 1990 EPS-16 Plus -sq1 // 1990 SQ-1 +sq1 // 1990 SQ-1 // Fairchild channelf // Fairchild Channel F VES - 1976 diff --git a/src/mess/mess.mak b/src/mess/mess.mak index 97412d0096..e97fa31e46 100644 --- a/src/mess/mess.mak +++ b/src/mess/mess.mak @@ -1810,7 +1810,7 @@ $(MESSOBJ)/veb.a: \ $(MESSOBJ)/vidbrain.a: \ $(MESS_DRIVERS)/vidbrain.o \ - $(MESS_VIDEO)/uv201.o \ + $(MESS_VIDEO)/uv201.o \ $(MESSOBJ)/videoton.a: \ $(MESS_DRIVERS)/tvc.o \ diff --git a/src/mess/video/uv201.h b/src/mess/video/uv201.h index 773b224c91..a042006007 100644 --- a/src/mess/video/uv201.h +++ b/src/mess/video/uv201.h @@ -6,7 +6,7 @@ Visit http://mamedev.org for licensing and usage restrictions. ********************************************************************** - + **********************************************************************/ #pragma once @@ -45,7 +45,7 @@ struct uv201_interface { const char *m_screen_tag; - + devcb_write_line m_out_ext_int_cb; devcb_write_line m_out_hblank_cb; devcb_read8 m_in_db_cb; diff --git a/src/version.c b/src/version.c index b8d01fc934..a49d451d67 100644 --- a/src/version.c +++ b/src/version.c @@ -38,4 +38,4 @@ ***************************************************************************/ extern const char build_version[]; -const char build_version[] = "0.145u8 ("__DATE__")"; +const char build_version[] = "0.146 ("__DATE__")";