diff --git a/scalafmt-core/shared/src/main/scala/org/scalafmt/internal/FormatOps.scala b/scalafmt-core/shared/src/main/scala/org/scalafmt/internal/FormatOps.scala index 02ab4b400d..dfce4faa6c 100644 --- a/scalafmt-core/shared/src/main/scala/org/scalafmt/internal/FormatOps.scala +++ b/scalafmt-core/shared/src/main/scala/org/scalafmt/internal/FormatOps.scala @@ -3001,8 +3001,11 @@ class FormatOps( } else None } - def getBracesToParensMod(rb: FT, mod: Modification, isWithinBraces: Boolean)( - implicit + def getBracesToParensMod( + rb: FT, + mod: Modification = Space, + isWithinBraces: Boolean = true, + )(implicit style: ScalafmtConfig, ft: FT, ): (Modification, Option[TokenRanges]) = { @@ -3011,6 +3014,14 @@ class FormatOps( else (SpaceOrNoSplit(Policy.End < rb), tr) } + @inline + def getBracesToParensModOnly( + rb: FT, + mod: Modification = Space, + isWithinBraces: Boolean = true, + )(implicit style: ScalafmtConfig, ft: FT): Modification = + getBracesToParensMod(rb, mod, isWithinBraces)._1 + @tailrec private def getSingleFunctionArg( values: List[Tree], diff --git a/scalafmt-core/shared/src/main/scala/org/scalafmt/internal/Router.scala b/scalafmt-core/shared/src/main/scala/org/scalafmt/internal/Router.scala index a2ae57f99c..06d1ace8a7 100644 --- a/scalafmt-core/shared/src/main/scala/org/scalafmt/internal/Router.scala +++ b/scalafmt-core/shared/src/main/scala/org/scalafmt/internal/Router.scala @@ -361,7 +361,7 @@ class Router(formatOps: FormatOps) { val noSplitMod = braceSpace(leftOwner) val (slbMod, slbParensExclude) = if (singleLineDecisionOpt.isEmpty) (noSplitMod, None) - else getBracesToParensMod(close, noSplitMod, isWithinBraces = true) + else getBracesToParensMod(close, noSplitMod) val singleLineSplitOpt = { if (slbParensExclude eq null) None else singleLineDecisionOpt }.map { sld => @@ -1535,7 +1535,7 @@ class Router(formatOps: FormatOps) { } } => val rb = matchingRight(ft) - val mod = getBracesToParensMod(rb, Space, isWithinBraces = false)._1 + val mod = getBracesToParensModOnly(rb, isWithinBraces = false) Seq(Split(mod, 0)) // Delim @@ -1919,15 +1919,11 @@ class Router(formatOps: FormatOps) { }.isDefined => ss.penalizeNL(1) } }.foldLeft(Policy.noPolicy) { case (res, pol) => pol ==> res } - val ftNextAfterRight = next(ftAfterRight) - val singleArg = - if (!ftAfterRight.right.is[T.OpenDelim]) None - else getSingleArgOnLeftBraceOnLeft(ftNextAfterRight).map(_._2) - val bracesToParens = singleArg.isDefined && { - implicit val ft: FT = ftNextAfterRight + // include paren as it may have been a brace earlier (i.e. idempotence) + val bracesToParens = ftAfterRight.right.is[T.OpenDelim] && { + implicit val ft: FT = next(ftAfterRight) val rb = matchingRight(ftAfterRight) - getBracesToParensMod(rb, Space, isWithinBraces = true)._1 ne - Space + getBracesToParensModOnly(rb) ne Space } val noSplit = Split(modSpace, 0) .withSingleLine(end, exclude = exclude)