diff --git a/.checkpatch.conf b/.checkpatch.conf index accee08b149e505..a6d9a31f11d097d 100644 --- a/.checkpatch.conf +++ b/.checkpatch.conf @@ -5,7 +5,6 @@ --min-conf-desc-length=1 --typedefsfile=scripts/checkpatch/typedefsfile ---ignore BRACES --ignore PRINTK_WITHOUT_KERN_LEVEL --ignore SPLIT_STRING --ignore VOLATILE diff --git a/.clang-format b/.clang-format index 6cc25296b7d532e..940f22994b8f732 100644 --- a/.clang-format +++ b/.clang-format @@ -111,3 +111,4 @@ WhitespaceSensitiveMacros: - LISTIFY - STRINGIFY - Z_STRINGIFY + - DT_FOREACH_PROP_ELEM_SEP diff --git a/.github/workflows/assigner.yml b/.github/workflows/assigner.yml index 6e4e01c8ea1b6a8..be3696c4d3055a7 100644 --- a/.github/workflows/assigner.yml +++ b/.github/workflows/assigner.yml @@ -24,8 +24,7 @@ jobs: steps: - name: Install Python dependencies run: | - sudo pip3 install -U setuptools wheel pip - pip3 install -U PyGithub>=1.55 west + pip install -U PyGithub>=1.55 west - name: Check out source code uses: actions/checkout@v4 diff --git a/.github/workflows/backport_issue_check.yml b/.github/workflows/backport_issue_check.yml index ecaaf352827b42b..2d2c4fda6a8b848 100644 --- a/.github/workflows/backport_issue_check.yml +++ b/.github/workflows/backport_issue_check.yml @@ -25,8 +25,7 @@ jobs: - name: Install Python dependencies run: | - sudo pip3 install -U setuptools wheel pip - pip3 install -U pygithub + pip install -U pygithub - name: Run backport issue checker env: diff --git a/.github/workflows/bsim-tests.yaml b/.github/workflows/bsim-tests.yaml index 4739f99e68b194f..66d47c68a1c2403 100644 --- a/.github/workflows/bsim-tests.yaml +++ b/.github/workflows/bsim-tests.yaml @@ -12,12 +12,13 @@ on: - "dts/*/nordic/**" - "tests/bluetooth/common/testlib/**" - "samples/bluetooth/**" - - "boards/posix/**" - - "soc/posix/**" + - "boards/native/**" + - "soc/native/**" - "arch/posix/**" - "include/zephyr/arch/posix/**" - "scripts/native_simulator/**" - "samples/net/sockets/echo_*/**" + - "modules/hal_nordic/**" - "modules/mbedtls/**" - "modules/openthread/**" - "subsys/net/l2/openthread/**" @@ -77,6 +78,7 @@ jobs: git config --global user.email "bot@zephyrproject.org" git config --global user.name "Zephyr Bot" rm -fr ".git/rebase-apply" + rm -fr ".git/rebase-merge" git rebase origin/${BASE_REF} git clean -f -d git log --pretty=oneline | head -n 10 @@ -96,8 +98,8 @@ jobs: .github/workflows/bsim-tests.yaml .github/workflows/bsim-tests-publish.yaml west.yml - boards/posix/ - soc/posix/ + boards/native/ + soc/native/ arch/posix/ include/zephyr/arch/posix/ scripts/native_simulator/ @@ -105,6 +107,7 @@ jobs: boards/nordic/nrf5*/*dt* dts/*/nordic/ modules/mbedtls/** + modules/hal_nordic/** - name: Check if Bluethooth files changed uses: tj-actions/changed-files@v45 @@ -169,7 +172,7 @@ jobs: - name: Merge Test Results run: | - pip3 install junitparser junit2html + pip install junitparser junit2html junitparser merge --glob "./bsim_*/*bsim_results.*.xml" "./twister-out/twister.xml" junit.xml junit2html junit.xml junit.html diff --git a/.github/workflows/bug_snapshot.yaml b/.github/workflows/bug_snapshot.yaml index b4f9022bf280249..f10dc718b6eb208 100644 --- a/.github/workflows/bug_snapshot.yaml +++ b/.github/workflows/bug_snapshot.yaml @@ -25,8 +25,7 @@ jobs: - name: Install Python dependencies run: | - sudo pip3 install -U setuptools wheel pip - pip3 install -U pygithub + pip install -U pygithub - name: Snapshot bugs env: diff --git a/.github/workflows/clang.yaml b/.github/workflows/clang.yaml index 0d97ecc8abcade1..11d249cd937b193 100644 --- a/.github/workflows/clang.yaml +++ b/.github/workflows/clang.yaml @@ -61,6 +61,7 @@ jobs: git config --global user.email "bot@zephyrproject.org" git config --global user.name "Zephyr Bot" rm -fr ".git/rebase-apply" + rm -fr ".git/rebase-merge" git rebase origin/${BASE_REF} git clean -f -d git log --pretty=oneline | head -n 10 @@ -143,7 +144,7 @@ jobs: path: artifacts - name: Merge Test Results run: | - pip3 install junitparser junit2html + pip install junitparser junit2html junitparser merge artifacts/*/twister.xml junit.xml junit2html junit.xml junit-clang.html diff --git a/.github/workflows/codecov.yaml b/.github/workflows/codecov.yaml index f22fa7a75820b08..d03ced6e474e084 100644 --- a/.github/workflows/codecov.yaml +++ b/.github/workflows/codecov.yaml @@ -101,7 +101,7 @@ jobs: export ZEPHYR_BASE=${PWD} export ZEPHYR_TOOLCHAIN_VARIANT=zephyr mkdir -p coverage/reports - pip3 install gcovr==6.0 + pip install gcovr==6.0 ./scripts/twister -E ${{matrix.normalized}}-testplan.json ls -la ./scripts/twister \ @@ -182,7 +182,7 @@ jobs: - name: Merge coverage files run: | pushd ./coverage/reports - pip3 install gcovr==6.0 + pip install gcovr==6.0 gcovr ${{ steps.get-coverage-files.outputs.mergefiles }} --merge-mode-functions=separate --json merged.json gcovr ${{ steps.get-coverage-files.outputs.mergefiles }} --merge-mode-functions=separate --cobertura merged.xml popd diff --git a/.github/workflows/coding_guidelines.yml b/.github/workflows/coding_guidelines.yml index 97d2301a9e3c919..9ab2bc974b14da1 100644 --- a/.github/workflows/coding_guidelines.yml +++ b/.github/workflows/coding_guidelines.yml @@ -21,9 +21,8 @@ jobs: - name: Install python dependencies run: | - pip3 install unidiff - pip3 install wheel - pip3 install sh + pip install unidiff + pip install sh - name: Install Packages run: | @@ -40,6 +39,8 @@ jobs: git config --global user.email "actions@zephyrproject.org" git config --global user.name "Github Actions" git remote -v + rm -fr ".git/rebase-apply" + rm -fr ".git/rebase-merge" git rebase origin/${BASE_REF} git clean -f -d source zephyr-env.sh diff --git a/.github/workflows/compliance.yml b/.github/workflows/compliance.yml index a91a8e534cc2902..2ad48848fedc51e 100644 --- a/.github/workflows/compliance.yml +++ b/.github/workflows/compliance.yml @@ -23,6 +23,23 @@ jobs: ref: ${{ github.event.pull_request.head.sha }} fetch-depth: 0 + - name: Rebase onto the target branch + env: + BASE_REF: ${{ github.base_ref }} + run: | + git config --global user.email "you@example.com" + git config --global user.name "Your Name" + git remote -v + # Ensure there's no merge commits in the PR + [[ "$(git rev-list --merges --count origin/${BASE_REF}..)" == "0" ]] || \ + (echo "::error ::Merge commits not allowed, rebase instead";false) + rm -fr ".git/rebase-apply" + rm -fr ".git/rebase-merge" + git rebase origin/${BASE_REF} + git clean -f -d + # debug + git log --pretty=oneline | head -n 10 + - name: Set up Python uses: actions/setup-python@v5 with: @@ -36,25 +53,11 @@ jobs: - name: Install python dependencies run: | - pip3 install setuptools - pip3 install wheel - pip3 install python-magic lxml junitparser gitlint pylint pykwalify yamllint clang-format unidiff sphinx-lint ruff - pip3 install west + pip install -r scripts/requirements-compliance.txt + pip install west - name: west setup - env: - BASE_REF: ${{ github.base_ref }} run: | - git config --global user.email "you@example.com" - git config --global user.name "Your Name" - git remote -v - # Ensure there's no merge commits in the PR - [[ "$(git rev-list --merges --count origin/${BASE_REF}..)" == "0" ]] || \ - (echo "::error ::Merge commits not allowed, rebase instead";false) - git rebase origin/${BASE_REF} - git clean -f -d - # debug - git log --pretty=oneline | head -n 10 west init -l . || true west config manifest.group-filter -- +ci,-optional west update -o=--depth=1 -n 2>&1 1> west.update.log || west update -o=--depth=1 -n 2>&1 1> west.update2.log @@ -79,7 +82,7 @@ jobs: git log --pretty=oneline | head -n 10 # Increase rename limit to allow for large PRs git config diff.renameLimit 10000 - ./scripts/ci/check_compliance.py --annotate -e KconfigBasic \ + ./scripts/ci/check_compliance.py --annotate -e KconfigBasic -e ClangFormat \ -c origin/${BASE_REF}.. - name: upload-results diff --git a/.github/workflows/daily_test_version.yml b/.github/workflows/daily_test_version.yml index 1886b4a8c805daa..3a43ac643008da2 100644 --- a/.github/workflows/daily_test_version.yml +++ b/.github/workflows/daily_test_version.yml @@ -25,7 +25,7 @@ jobs: - name: install-pip run: | - pip3 install gitpython + pip install gitpython - name: checkout uses: actions/checkout@v4 diff --git a/.github/workflows/devicetree_checks.yml b/.github/workflows/devicetree_checks.yml index 558e41c4bc1f1eb..345eb5b7db08e37 100644 --- a/.github/workflows/devicetree_checks.yml +++ b/.github/workflows/devicetree_checks.yml @@ -62,8 +62,7 @@ jobs: ${{ runner.os }}-pip-${{ matrix.python-version }} - name: install python dependencies run: | - pip3 install wheel - pip3 install pytest pyyaml tox + pip install pytest pyyaml tox - name: run tox working-directory: scripts/dts/python-devicetree run: | diff --git a/.github/workflows/do_not_merge.yml b/.github/workflows/do_not_merge.yml index b6954e288c92269..b2bbefdc6fe7f9f 100644 --- a/.github/workflows/do_not_merge.yml +++ b/.github/workflows/do_not_merge.yml @@ -6,14 +6,14 @@ on: jobs: do-not-merge: - if: ${{ contains(github.event.*.labels.*.name, 'DNM') || - contains(github.event.*.labels.*.name, 'TSC') || - contains(github.event.*.labels.*.name, 'Architecture Review') || - contains(github.event.*.labels.*.name, 'dev-review') }} name: Prevent Merging runs-on: ubuntu-22.04 steps: - name: Check for label + if: ${{ contains(github.event.*.labels.*.name, 'DNM') || + contains(github.event.*.labels.*.name, 'TSC') || + contains(github.event.*.labels.*.name, 'Architecture Review') || + contains(github.event.*.labels.*.name, 'dev-review') }} run: | echo "Pull request is labeled as 'DNM', 'TSC', 'Architecture Review' or 'dev-review'." echo "This workflow fails so that the pull request cannot be merged." diff --git a/.github/workflows/doc-build.yml b/.github/workflows/doc-build.yml index 7564d163f81d5ac..69c7b787c457c7c 100644 --- a/.github/workflows/doc-build.yml +++ b/.github/workflows/doc-build.yml @@ -94,6 +94,8 @@ jobs: run: | git config --global user.email "actions@zephyrproject.org" git config --global user.name "Github Actions" + rm -fr ".git/rebase-apply" + rm -fr ".git/rebase-merge" git rebase origin/${BASE_REF} git clean -f -d git log --graph --oneline HEAD...${PR_HEAD} @@ -106,11 +108,10 @@ jobs: - name: install-pip run: | - sudo pip3 install -U setuptools wheel pip - pip3 install -r doc/requirements.txt - pip3 install west==${WEST_VERSION} - pip3 install cmake==${CMAKE_VERSION} - pip3 install coverxygen + pip install -r doc/requirements.txt + pip install west==${WEST_VERSION} + pip install cmake==${CMAKE_VERSION} + pip install coverxygen - name: west setup run: | @@ -221,10 +222,9 @@ jobs: - name: install-pip run: | - pip3 install -U setuptools wheel pip - pip3 install -r doc/requirements.txt - pip3 install west==${WEST_VERSION} - pip3 install cmake==${CMAKE_VERSION} + pip install -r doc/requirements.txt + pip install west==${WEST_VERSION} + pip install cmake==${CMAKE_VERSION} - name: west setup run: | diff --git a/.github/workflows/footprint-tracking.yml b/.github/workflows/footprint-tracking.yml index 93eae63e954de0a..78f761cb545c4ec 100644 --- a/.github/workflows/footprint-tracking.yml +++ b/.github/workflows/footprint-tracking.yml @@ -58,7 +58,7 @@ jobs: run: | sudo apt-get update sudo apt-get install -y python3-venv - sudo pip3 install -U setuptools wheel pip gitpython + pip install -U gitpython - name: checkout uses: actions/checkout@v4 @@ -94,7 +94,7 @@ jobs: run: | python3 -m venv .venv . .venv/bin/activate - pip3 install awscli + pip install awscli aws s3 sync --quiet footprint_data/ s3://testing.zephyrproject.org/footprint_data/ - name: Transform Footprint data to Twister JSON reports @@ -113,7 +113,7 @@ jobs: ELASTICSEARCH_INDEX: ${{ vars.FOOTPRINT_TRACKING_INDEX }} run: | shopt -s globstar - pip3 install -U elasticsearch + pip install -U elasticsearch run_date=`date --iso-8601=minutes` python3 ./scripts/ci/upload_test_results_es.py -r ${run_date} \ --flatten footprint \ diff --git a/.github/workflows/hello_world_multiplatform.yaml b/.github/workflows/hello_world_multiplatform.yaml index 605cc2a903b695c..59d622149a22f2c 100644 --- a/.github/workflows/hello_world_multiplatform.yaml +++ b/.github/workflows/hello_world_multiplatform.yaml @@ -12,8 +12,7 @@ on: - v*-branch - collab-* paths: - - 'scripts/build/**' - - 'scripts/requirements*.txt' + - 'scripts/**' - '.github/workflows/hello_world_multiplatform.yaml' - 'SDK_VERSION' @@ -45,6 +44,8 @@ jobs: run: | git config --global user.email "actions@zephyrproject.org" git config --global user.name "Github Actions" + rm -fr ".git/rebase-apply" + rm -fr ".git/rebase-merge" git rebase origin/${BASE_REF} git clean -f -d git log --graph --oneline HEAD...${PR_HEAD} diff --git a/.github/workflows/manifest.yml b/.github/workflows/manifest.yml index 538f06a1d5da664..c3bdc4ff6c843e9 100644 --- a/.github/workflows/manifest.yml +++ b/.github/workflows/manifest.yml @@ -20,13 +20,13 @@ jobs: BASE_REF: ${{ github.base_ref }} working-directory: zephyrproject/zephyr run: | - pip3 install west + pip install west git config --global user.email "you@example.com" git config --global user.name "Your Name" west init -l . || true - name: Manifest - uses: zephyrproject-rtos/action-manifest@v1.5.0 + uses: zephyrproject-rtos/action-manifest@v1.7.0 with: github-token: ${{ secrets.ZB_GITHUB_TOKEN }} manifest-path: 'west.yml' diff --git a/.github/workflows/pylib_tests.yml b/.github/workflows/pylib_tests.yml index 2beb6c16956fe35..bf9d82892122465 100644 --- a/.github/workflows/pylib_tests.yml +++ b/.github/workflows/pylib_tests.yml @@ -44,7 +44,7 @@ jobs: ${{ runner.os }}-pip-${{ matrix.python-version }} - name: install-packages run: | - pip3 install -r scripts/requirements-base.txt -r scripts/requirements-build-test.txt + pip install -r scripts/requirements-base.txt -r scripts/requirements-build-test.txt - name: Run pytest for build_helpers env: ZEPHYR_BASE: ./ diff --git a/.github/workflows/scripts_tests.yml b/.github/workflows/scripts_tests.yml index 183f3eb474be0b4..06e12ada528cb12 100644 --- a/.github/workflows/scripts_tests.yml +++ b/.github/workflows/scripts_tests.yml @@ -42,6 +42,8 @@ jobs: run: | git config --global user.email "actions@zephyrproject.org" git config --global user.name "Github Actions" + rm -fr ".git/rebase-apply" + rm -fr ".git/rebase-merge" git rebase origin/${BASE_REF} git clean -f -d git log --graph --oneline HEAD...${PR_HEAD} @@ -62,7 +64,7 @@ jobs: - name: install-packages run: | - pip3 install -r scripts/requirements-base.txt -r scripts/requirements-build-test.txt + pip install -r scripts/requirements-base.txt -r scripts/requirements-build-test.txt - name: Run pytest env: diff --git a/.github/workflows/stats_merged_prs.yml b/.github/workflows/stats_merged_prs.yml index cd874b65b1ac877..0f86958e47b7b43 100644 --- a/.github/workflows/stats_merged_prs.yml +++ b/.github/workflows/stats_merged_prs.yml @@ -20,5 +20,5 @@ jobs: ELASTICSEARCH_SERVER: "https://elasticsearch.zephyrproject.io:443" PR_STAT_ES_INDEX: ${{ vars.PR_STAT_ES_INDEX }} run: | - pip3 install pygithub elasticsearch + pip install pygithub elasticsearch python3 ./scripts/ci/stats/merged_prs.py --pull-request ${{ github.event.pull_request.number }} --repo ${{ github.repository }} diff --git a/.github/workflows/twister-prep.yaml b/.github/workflows/twister-prep.yaml index 4c8b03a5418b69c..51bc771059d695f 100644 --- a/.github/workflows/twister-prep.yaml +++ b/.github/workflows/twister-prep.yaml @@ -67,6 +67,7 @@ jobs: git config --global user.email "bot@zephyrproject.org" git config --global user.name "Zephyr Bot" rm -fr ".git/rebase-apply" + rm -fr ".git/rebase-merge" git rebase origin/${BASE_REF} git clean -f -d git log --pretty=oneline | head -n 10 diff --git a/.github/workflows/twister-publish.yaml b/.github/workflows/twister-publish.yaml index f59a3edca3dbf55..3695d0607262670 100644 --- a/.github/workflows/twister-publish.yaml +++ b/.github/workflows/twister-publish.yaml @@ -37,7 +37,7 @@ jobs: - name: Upload to elasticsearch if: steps.download-artifacts.outputs.found_artifact == 'true' run: | - pip3 install elasticsearch + pip install elasticsearch # set run date on upload to get consistent and unified data across the matrix. run_date=`date --iso-8601=minutes` if [ "${{github.event.workflow_run.event}}" = "push" ]; then diff --git a/.github/workflows/twister.yaml b/.github/workflows/twister.yaml index 01be87ffabdf092..87abf1612505450 100644 --- a/.github/workflows/twister.yaml +++ b/.github/workflows/twister.yaml @@ -45,7 +45,7 @@ jobs: BSIM_OUT_PATH: /opt/bsim/ BSIM_COMPONENTS_PATH: /opt/bsim/components TWISTER_COMMON: '--no-detailed-test-id --force-color --inline-logs -v -N -M --retry-failed 3 --timeout-multiplier 2 ' - DAILY_OPTIONS: ' -M --build-only --all --show-footprint' + WEEKLY_OPTIONS: ' -M --build-only --all --show-footprint --report-filtered' PR_OPTIONS: ' --clobber-output --integration' PUSH_OPTIONS: ' --clobber-output -M --show-footprint --report-filtered' COMMIT_RANGE: ${{ github.event.pull_request.base.sha }}..${{ github.event.pull_request.head.sha }} @@ -84,6 +84,7 @@ jobs: git config --global user.email "bot@zephyrproject.org" git config --global user.name "Zephyr Builder" rm -fr ".git/rebase-apply" + rm -fr ".git/rebase-merge" git rebase origin/${BASE_REF} git clean -f -d git log --pretty=oneline | head -n 10 @@ -163,11 +164,11 @@ jobs: run: | export ZEPHYR_BASE=${PWD} export ZEPHYR_TOOLCHAIN_VARIANT=zephyr - ./scripts/twister --subset ${{matrix.subset}}/${{ strategy.job-total }} ${TWISTER_COMMON} ${DAILY_OPTIONS} + ./scripts/twister --subset ${{matrix.subset}}/${{ strategy.job-total }} ${TWISTER_COMMON} ${WEEKLY_OPTIONS} if [ "${{matrix.subset}}" = "1" ]; then ./scripts/zephyr_module.py --twister-out module_tests.args if [ -s module_tests.args ]; then - ./scripts/twister +module_tests.args --outdir module_tests ${TWISTER_COMMON} ${DAILY_OPTIONS} + ./scripts/twister +module_tests.args --outdir module_tests ${TWISTER_COMMON} ${WEEKLY_OPTIONS} fi fi @@ -196,7 +197,7 @@ jobs: timestamp="$(date)" version="$(git describe --abbrev=12 --always)" echo -e "# Generated at $timestamp ($version)\n" > $FREEZE_FILE - pip3 freeze | tee -a $FREEZE_FILE + pip freeze | tee -a $FREEZE_FILE - if: matrix.subset == 1 && github.event_name == 'push' name: Upload the list of Python packages @@ -222,7 +223,7 @@ jobs: - name: Merge Test Results run: | - pip3 install junitparser junit2html + pip install junitparser junit2html junitparser merge artifacts/*/*/twister.xml junit.xml junit2html junit.xml junit.html diff --git a/.github/workflows/twister_tests.yml b/.github/workflows/twister_tests.yml index bcd2abac556ebb4..66409bce8763c92 100644 --- a/.github/workflows/twister_tests.yml +++ b/.github/workflows/twister_tests.yml @@ -51,7 +51,7 @@ jobs: ${{ runner.os }}-pip-${{ matrix.python-version }} - name: install-packages run: | - pip3 install -r scripts/requirements-base.txt -r scripts/requirements-build-test.txt -r scripts/requirements-run-test.txt + pip install -r scripts/requirements-base.txt -r scripts/requirements-build-test.txt -r scripts/requirements-run-test.txt - name: Run pytest for twisterlib env: ZEPHYR_BASE: ./ diff --git a/.github/workflows/west_cmds.yml b/.github/workflows/west_cmds.yml index d7b671bc7e7f12a..3d4802f01709717 100644 --- a/.github/workflows/west_cmds.yml +++ b/.github/workflows/west_cmds.yml @@ -65,8 +65,7 @@ jobs: ${{ runner.os }}-pip-${{ matrix.python-version }} - name: install pytest run: | - pip3 install wheel - pip3 install pytest west pyelftools canopen natsort progress mypy intelhex psutil ply pyserial anytree + pip install pytest west pyelftools canopen natsort progress mypy intelhex psutil ply pyserial anytree - name: run pytest-win if: runner.os == 'Windows' run: | diff --git a/.ruff-excludes.toml b/.ruff-excludes.toml index 5b05d8ec83ffff2..06ac9c38e6316a4 100644 --- a/.ruff-excludes.toml +++ b/.ruff-excludes.toml @@ -43,108 +43,9 @@ "./boards/microchip/mec172xevb_assy6906/support/mec172x_remote_flasher.py" = [ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports ] -"./doc/_extensions/zephyr/api_overview.py" = [ - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation - "UP035", # https://docs.astral.sh/ruff/rules/deprecated-import -] -"./doc/_extensions/zephyr/application.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM102", # https://docs.astral.sh/ruff/rules/collapsible-if - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./doc/_extensions/zephyr/domain/__init__.py" = [ - "B023", # https://docs.astral.sh/ruff/rules/function-uses-loop-variable - "B026", # https://docs.astral.sh/ruff/rules/star-arg-unpacking-after-keyword-arg - "E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "F401", # https://docs.astral.sh/ruff/rules/unused-import - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation - "UP035", # https://docs.astral.sh/ruff/rules/deprecated-import -] -"./doc/_extensions/zephyr/doxybridge.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation - "UP035", # https://docs.astral.sh/ruff/rules/deprecated-import -] -"./doc/_extensions/zephyr/doxyrunner.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler - "UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation - "UP007", # https://docs.astral.sh/ruff/rules/non-pep604-annotation - "UP024", # https://docs.astral.sh/ruff/rules/os-error-alias - "UP035", # https://docs.astral.sh/ruff/rules/deprecated-import -] -"./doc/_extensions/zephyr/doxytooltip/__init__.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation - "UP035", # https://docs.astral.sh/ruff/rules/deprecated-import -] -"./doc/_extensions/zephyr/external_content.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation - "UP007", # https://docs.astral.sh/ruff/rules/non-pep604-annotation - "UP035", # https://docs.astral.sh/ruff/rules/deprecated-import -] -"./doc/_extensions/zephyr/gh_utils.py" = [ - "E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation - "UP007", # https://docs.astral.sh/ruff/rules/non-pep604-annotation - "UP035", # https://docs.astral.sh/ruff/rules/deprecated-import -] -"./doc/_extensions/zephyr/kconfig/__init__.py" = [ - "E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file - "SIM112", # https://docs.astral.sh/ruff/rules/uncapitalized-environment-variables - "UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation - "UP007", # https://docs.astral.sh/ruff/rules/non-pep604-annotation - "UP028", # https://docs.astral.sh/ruff/rules/yield-in-for-loop - "UP035", # https://docs.astral.sh/ruff/rules/deprecated-import -] -"./doc/_extensions/zephyr/link-roles.py" = [ - "B006", # https://docs.astral.sh/ruff/rules/mutable-argument-default - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM102", # https://docs.astral.sh/ruff/rules/collapsible-if - "UP010", # https://docs.astral.sh/ruff/rules/unnecessary-future-import -] -"./doc/_extensions/zephyr/manifest_projects_table.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM114", # https://docs.astral.sh/ruff/rules/if-with-same-arms - "UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation - "UP035", # https://docs.astral.sh/ruff/rules/deprecated-import -] -"./doc/_scripts/gen_boards_catalog.py" = [ - "E401", # https://docs.astral.sh/ruff/rules/multiple-imports-on-one-line - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes -] -"./doc/_scripts/gen_devicetree_rest.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes - "UP034", # https://docs.astral.sh/ruff/rules/extraneous-parentheses -] -"./doc/_scripts/gen_helpers.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes -] "./doc/_scripts/redirects.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long ] -"./doc/conf.py" = [ - "E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders - "F821", # https://docs.astral.sh/ruff/rules/undefined-name - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler -] -"./doc/develop/test/twister/sample_blackbox_test.py" = [ - "B905", # https://docs.astral.sh/ruff/rules/zip-without-explicit-strict - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP026", # https://docs.astral.sh/ruff/rules/deprecated-mock-import -] "./modules/mbedtls/create_psa_files.py" = [ "E101", # https://docs.astral.sh/ruff/rules/mixed-spaces-and-tabs "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports @@ -225,6 +126,7 @@ "SIM113", # https://docs.astral.sh/ruff/rules/enumerate-for-loop "SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler "UP010", # https://docs.astral.sh/ruff/rules/unnecessary-future-import + "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting "UP032", # https://docs.astral.sh/ruff/rules/f-string ] "./samples/modules/tflite-micro/magic_wand/train/train_test.py" = [ @@ -298,6 +200,7 @@ "F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "UP030", # https://docs.astral.sh/ruff/rules/format-literals + "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting "UP032", # https://docs.astral.sh/ruff/rules/f-string ] "./scripts/build/gen_isr_tables_parser_local.py" = [ @@ -305,6 +208,7 @@ "F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "UP030", # https://docs.astral.sh/ruff/rules/format-literals + "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting "UP032", # https://docs.astral.sh/ruff/rules/f-string ] "./scripts/build/gen_kobject_list.py" = [ @@ -353,6 +257,7 @@ "E501", # https://docs.astral.sh/ruff/rules/line-too-long "F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports + "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting ] "./scripts/build/gen_syscalls.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long @@ -464,12 +369,14 @@ "E501", # https://docs.astral.sh/ruff/rules/line-too-long "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler + "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting "UP039", # https://docs.astral.sh/ruff/rules/unnecessary-class-parentheses ] "./scripts/coredump/coredump_parser/log_parser.py" = [ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler "UP030", # https://docs.astral.sh/ruff/rules/format-literals + "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting "UP032", # https://docs.astral.sh/ruff/rules/f-string ] "./scripts/coredump/coredump_serial_log_parser.py" = [ @@ -857,183 +764,9 @@ "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting ] -"./scripts/pylib/twister/twisterlib/cmakecache.py" = [ - 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"F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM105", # https://docs.astral.sh/ruff/rules/suppressible-exception - "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes - "UP022", # https://docs.astral.sh/ruff/rules/replace-stdout-stderr - "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/pylib/twister/twisterlib/environment.py" = [ - "B006", # https://docs.astral.sh/ruff/rules/mutable-argument-default - "E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "SIM118", # https://docs.astral.sh/ruff/rules/in-dict-keys - "UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation - "UP021", # https://docs.astral.sh/ruff/rules/replace-universal-newlines - "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting - 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"B006", # https://docs.astral.sh/ruff/rules/mutable-argument-default - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM118", # https://docs.astral.sh/ruff/rules/in-dict-keys - "UP004", # https://docs.astral.sh/ruff/rules/useless-object-inheritance - "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes - "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting -] -"./scripts/pylib/twister/twisterlib/harness.py" = [ - "B009", # https://docs.astral.sh/ruff/rules/get-attr-with-constant - "B904", # https://docs.astral.sh/ruff/rules/raise-without-from-inside-except - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "E713", # https://docs.astral.sh/ruff/rules/not-in-test - "F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders - "F811", # https://docs.astral.sh/ruff/rules/redefined-while-unused - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM102", # https://docs.astral.sh/ruff/rules/collapsible-if - "SIM300", # https://docs.astral.sh/ruff/rules/yoda-conditions - "UP008", # https://docs.astral.sh/ruff/rules/super-call-with-parameters - "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes - "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/pylib/twister/twisterlib/jobserver.py" = [ - "SIM201", # https://docs.astral.sh/ruff/rules/negate-equal-op -] -"./scripts/pylib/twister/twisterlib/mixins.py" = [ - "UP004", # https://docs.astral.sh/ruff/rules/useless-object-inheritance -] -"./scripts/pylib/twister/twisterlib/package.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes -] -"./scripts/pylib/twister/twisterlib/platform.py" = [ - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting -] -"./scripts/pylib/twister/twisterlib/quarantine.py" = [ - "B006", # https://docs.astral.sh/ruff/rules/mutable-argument-default - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM110", # https://docs.astral.sh/ruff/rules/reimplemented-builtin - "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes - "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting -] -"./scripts/pylib/twister/twisterlib/reports.py" = [ - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes - "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/pylib/twister/twisterlib/runner.py" = [ - "B006", # https://docs.astral.sh/ruff/rules/mutable-argument-default - "E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "E713", # https://docs.astral.sh/ruff/rules/not-in-test - "F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM102", # https://docs.astral.sh/ruff/rules/collapsible-if - "SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler - "SIM201", # https://docs.astral.sh/ruff/rules/negate-equal-op - "UP004", # https://docs.astral.sh/ruff/rules/useless-object-inheritance - "UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation - "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes - "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting - "UP032", # https://docs.astral.sh/ruff/rules/f-string - "UP035", # https://docs.astral.sh/ruff/rules/deprecated-import -] -"./scripts/pylib/twister/twisterlib/size_calc.py" = [ - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation - "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes - "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting -] -"./scripts/pylib/twister/twisterlib/statuses.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM401", # https://docs.astral.sh/ruff/rules/if-else-block-instead-of-dict-get -] -"./scripts/pylib/twister/twisterlib/testinstance.py" = [ - "B006", # https://docs.astral.sh/ruff/rules/mutable-argument-default - "B904", # https://docs.astral.sh/ruff/rules/raise-without-from-inside-except - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM102", # https://docs.astral.sh/ruff/rules/collapsible-if - "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes - "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting -] "./scripts/pylib/twister/twisterlib/testplan.py" = [ - "B006", # https://docs.astral.sh/ruff/rules/mutable-argument-default - "B023", # https://docs.astral.sh/ruff/rules/function-uses-loop-variable - "B904", # https://docs.astral.sh/ruff/rules/raise-without-from-inside-except "E402", # https://docs.astral.sh/ruff/rules/module-import-not-at-top-of-file - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "E713", # https://docs.astral.sh/ruff/rules/not-in-test - "E741", # https://docs.astral.sh/ruff/rules/ambiguous-variable-name "F401", # https://docs.astral.sh/ruff/rules/unused-import - "F541", # https://docs.astral.sh/ruff/rules/f-string-missing-placeholders - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM102", # https://docs.astral.sh/ruff/rules/collapsible-if - "SIM110", # https://docs.astral.sh/ruff/rules/reimplemented-builtin - "SIM118", # https://docs.astral.sh/ruff/rules/in-dict-keys - "SIM202", # https://docs.astral.sh/ruff/rules/negate-not-equal-op - "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes - "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting - "UP032", # https://docs.astral.sh/ruff/rules/f-string -] -"./scripts/pylib/twister/twisterlib/testsuite.py" = [ - "B006", # https://docs.astral.sh/ruff/rules/mutable-argument-default - "B904", # https://docs.astral.sh/ruff/rules/raise-without-from-inside-except - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP006", # https://docs.astral.sh/ruff/rules/non-pep585-annotation - "UP031", # https://docs.astral.sh/ruff/rules/printf-string-formatting - "UP032", # https://docs.astral.sh/ruff/rules/f-string - "UP035", # https://docs.astral.sh/ruff/rules/deprecated-import -] -"./scripts/pylib/twister/twisterlib/twister_main.py" = [ - "E501", # https://docs.astral.sh/ruff/rules/line-too-long - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes - "UP032", # https://docs.astral.sh/ruff/rules/f-string ] "./scripts/pylint/checkers/argparse-checker.py" = [ "F821", # https://docs.astral.sh/ruff/rules/undefined-name @@ -1109,7 +842,6 @@ ] "./scripts/tests/twister/test_data/mixins/test_to_ignore.py" = [ "B011", # https://docs.astral.sh/ruff/rules/assert-false - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports ] "./scripts/tests/twister/test_environment.py" = [ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports @@ -1535,7 +1267,6 @@ "UP032", # https://docs.astral.sh/ruff/rules/f-string ] "./scripts/west_commands/zspdx/cmakecache.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes ] "./scripts/west_commands/zspdx/cmakefileapi.py" = [ @@ -1551,7 +1282,6 @@ "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes ] "./scripts/west_commands/zspdx/datatypes.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "UP008", # https://docs.astral.sh/ruff/rules/super-call-with-parameters ] "./scripts/west_commands/zspdx/getincludes.py" = [ @@ -1566,7 +1296,6 @@ "UP008", # https://docs.astral.sh/ruff/rules/super-call-with-parameters ] "./scripts/west_commands/zspdx/scanner.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "SIM113", # https://docs.astral.sh/ruff/rules/enumerate-for-loop "UP008", # https://docs.astral.sh/ruff/rules/super-call-with-parameters "UP015", # https://docs.astral.sh/ruff/rules/redundant-open-modes @@ -1612,14 +1341,6 @@ "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports "UP009", # https://docs.astral.sh/ruff/rules/utf8-encoding-declaration ] -"./soc/mediatek/mtk_adsp/gen_img.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler -] -"./soc/mediatek/mtk_adsp/mtk_adsp_load.py" = [ - "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports - "SIM115", # https://docs.astral.sh/ruff/rules/open-file-with-context-handler -] "./soc/microchip/mec/common/spigen/mec_spi_gen.py" = [ "E501", # https://docs.astral.sh/ruff/rules/line-too-long "I001", # https://docs.astral.sh/ruff/rules/unsorted-imports @@ -1741,11 +1462,11 @@ exclude = [ "./doc/_extensions/zephyr/link-roles.py", "./doc/_scripts/gen_boards_catalog.py", "./doc/_scripts/gen_devicetree_rest.py", - "./doc/_scripts/gen_helpers.py", "./doc/_scripts/redirects.py", "./doc/conf.py", "./doc/develop/test/twister/sample_blackbox_test.py", "./modules/mbedtls/create_psa_files.py", + "./samples/boards/nordic/coresight_stm/pytest/test_stm.py", "./samples/modules/tflite-micro/magic_wand/train/data_augmentation.py", "./samples/modules/tflite-micro/magic_wand/train/data_augmentation_test.py", "./samples/modules/tflite-micro/magic_wand/train/data_load.py", @@ -2046,8 +1767,6 @@ exclude = [ "./soc/intel/intel_adsp/tools/cavstool_client.py", "./soc/intel/intel_adsp/tools/remote-fw-service.py", "./soc/intel/intel_ish/utils/build_ish_firmware.py", - "./soc/mediatek/mtk_adsp/gen_img.py", - "./soc/mediatek/mtk_adsp/mtk_adsp_load.py", "./soc/microchip/mec/common/spigen/mec_spi_gen.py", "./soc/nuvoton/npcm/common/esiost/esiost.py", "./soc/nuvoton/npcm/common/esiost/esiost_args.py", diff --git a/.ruff.toml b/.ruff.toml index 63593b21feca875..c9be3b43104b54c 100644 --- a/.ruff.toml +++ b/.ruff.toml @@ -22,7 +22,6 @@ select = [ ignore = [ # zephyr-keep-sorted-start "SIM108", # Allow if-else blocks instead of forcing ternary operator - "UP027", # deprecated pyupgrade rule # zephyr-keep-sorted-stop ] diff --git a/CMakeLists.txt b/CMakeLists.txt index 88b2d77c3a4d5e6..5bd9348cb57e88b 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -88,6 +88,7 @@ set(SYSCALL_LIST_H_TARGET syscall_list_h_target) set(DRIVER_VALIDATION_H_TARGET driver_validation_h_target) set(KOBJ_TYPES_H_TARGET kobj_types_h_target) set(PARSE_SYSCALLS_TARGET parse_syscalls_target) +set(DEVICE_API_LD_TARGET device_api_ld_target) define_property(GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT BRIEF_DOCS " " FULL_DOCS " ") set_property( GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT elf32-little${ARCH}) # BFD format @@ -174,6 +175,12 @@ endif() # @Intent: Set compiler flags to detect general stack overflows across all functions if(CONFIG_STACK_CANARIES) zephyr_compile_options($) +elseif(CONFIG_STACK_CANARIES_STRONG) + zephyr_compile_options($) +elseif(CONFIG_STACK_CANARIES_ALL) + zephyr_compile_options($) +elseif(CONFIG_STACK_CANARIES_EXPLICIT) + zephyr_compile_options($) endif() # @Intent: Obtain compiler optimizations flags and store in variables @@ -841,7 +848,12 @@ if(CONFIG_LEGACY_GENERATED_INCLUDE_PATH) ${CMAKE_CURRENT_BINARY_DIR}/include/generated/syscall_list.h) endif() -add_custom_command(OUTPUT include/generated/zephyr/syscall_dispatch.c ${syscall_list_h} +add_custom_command( + OUTPUT + include/generated/zephyr/syscall_dispatch.c + include/generated/zephyr/syscall_exports_llext.c + syscall_weakdefs_llext.c + ${syscall_list_h} # Also, some files are written to include/generated/zephyr/syscalls/ COMMAND ${PYTHON_EXECUTABLE} @@ -849,7 +861,8 @@ add_custom_command(OUTPUT include/generated/zephyr/syscall_dispatch.c ${syscall_ --json-file ${syscalls_json} # Read this file --base-output include/generated/zephyr/syscalls # Write to this dir --syscall-dispatch include/generated/zephyr/syscall_dispatch.c # Write this file - --syscall-export-llext include/generated/zephyr/syscall_export_llext.c + --syscall-exports-llext include/generated/zephyr/syscall_exports_llext.c + --syscall-weakdefs-llext syscall_weakdefs_llext.c # compiled in CMake library 'syscall_weakdefs' --syscall-list ${syscall_list_h} $<$:--gen-mrsh-files> ${SYSCALL_LONG_REGISTERS_ARG} @@ -882,6 +895,37 @@ add_custom_target(${DRIVER_VALIDATION_H_TARGET} DEPENDS ${DRV_VALIDATION}) include(${ZEPHYR_BASE}/cmake/kobj.cmake) gen_kobj(KOBJ_INCLUDE_PATH) +# Generate sections for kernel device subsystems +set( + DEVICE_API_LD_SECTIONS + ${CMAKE_CURRENT_BINARY_DIR}/include/generated/device-api-sections.ld + ) + +set(DEVICE_API_LINKER_SECTIONS_CMAKE + ${CMAKE_CURRENT_BINARY_DIR}/include/generated/device-api-sections.cmake +) + +add_custom_command( + OUTPUT ${DEVICE_API_LD_SECTIONS} ${DEVICE_API_LINKER_SECTIONS_CMAKE} + COMMAND + ${PYTHON_EXECUTABLE} + ${ZEPHYR_BASE}/scripts/build/gen_iter_sections.py + --alignment ${CONFIG_LINKER_ITERABLE_SUBALIGN} + --input ${struct_tags_json} + --tag __subsystem + --ld-output ${DEVICE_API_LD_SECTIONS} + --cmake-output ${DEVICE_API_LINKER_SECTIONS_CMAKE} + DEPENDS + ${ZEPHYR_BASE}/scripts/build/gen_iter_sections.py + ${struct_tags_json} + WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR} + ) + +add_custom_target(${DEVICE_API_LD_TARGET} + DEPENDS ${DEVICE_API_LD_SECTIONS} + ${DEVICE_API_LINKER_SECTIONS_CMAKE} +) + # Add a pseudo-target that is up-to-date when all generated headers # are up-to-date. @@ -912,6 +956,7 @@ add_dependencies(zephyr_interface ${SYSCALL_LIST_H_TARGET} ${DRIVER_VALIDATION_H_TARGET} ${KOBJ_TYPES_H_TARGET} + ${DEVICE_API_LD_TARGET} ) add_custom_command( @@ -976,6 +1021,16 @@ else() set(NO_WHOLE_ARCHIVE_LIBS kernel) endif() +if(CONFIG_LLEXT) + # LLEXT exports symbols for all syscalls, including unimplemented ones. + # Weak definitions for these must be added at the end of the link order + # to avoid shadowing actual implementations. + add_library(syscall_weakdefs syscall_weakdefs_llext.c) + add_dependencies(syscall_weakdefs zephyr_generated_headers) + target_link_libraries(syscall_weakdefs zephyr_interface) + list(APPEND NO_WHOLE_ARCHIVE_LIBS syscall_weakdefs) +endif() + get_property(OUTPUT_FORMAT GLOBAL PROPERTY PROPERTY_OUTPUT_FORMAT) if (CONFIG_CODE_DATA_RELOCATION) @@ -1039,14 +1094,6 @@ if(CONFIG_USERSPACE) set(PROCESS_GPERF ${ZEPHYR_BASE}/scripts/build/process_gperf.py) endif() -get_property(GLOBAL_CSTD GLOBAL PROPERTY CSTD) -if(DEFINED GLOBAL_CSTD) - message(DEPRECATION - "Global CSTD property is deprecated, see Kconfig.zephyr for C Standard options.") - set(CSTD ${GLOBAL_CSTD}) - list(APPEND CMAKE_C_COMPILE_FEATURES ${compile_features_${CSTD}}) -endif() - # @Intent: Obtain compiler specific flag for specifying the c standard zephyr_compile_options( $<$:$${CSTD}> @@ -1622,10 +1669,9 @@ list(APPEND ) list(APPEND post_build_byproducts ${KERNEL_MAP_NAME}) -if(NOT CONFIG_BUILD_NO_GAP_FILL) - # Use ';' as separator to get proper space in resulting command. - set(GAP_FILL "$0xff") -endif() +# Use ';' as separator to get proper space in resulting command. +set(gap_fill_prop "$") +set(gap_fill "$<$:${gap_fill_prop}${CONFIG_BUILD_GAP_FILL_PATTERN}>") if(CONFIG_OUTPUT_PRINT_MEMORY_USAGE) target_link_libraries(${logical_target_for_zephyr_elf} $) @@ -1686,7 +1732,7 @@ if(CONFIG_BUILD_OUTPUT_HEX OR BOARD_FLASH_RUNNER STREQUAL openocd) post_build_commands COMMAND $ $ - ${GAP_FILL} + $<$:${gap_fill}> $ihex ${remove_sections_argument_list} $${KERNEL_ELF_NAME} @@ -1708,7 +1754,7 @@ if(CONFIG_BUILD_OUTPUT_BIN) post_build_commands COMMAND $ $ - ${GAP_FILL} + ${gap_fill} $binary ${remove_sections_argument_list} $${KERNEL_ELF_NAME} @@ -1795,7 +1841,7 @@ if(CONFIG_BUILD_OUTPUT_S19) post_build_commands COMMAND $ $ - ${GAP_FILL} + $<$:${gap_fill}> $srec $1 $${KERNEL_ELF_NAME} diff --git a/CODEOWNERS b/CODEOWNERS deleted file mode 100644 index 2438a5385296a0d..000000000000000 --- a/CODEOWNERS +++ /dev/null @@ -1,492 +0,0 @@ -# CODEOWNERS for autoreview assigning in github - -# https://help.github.com/en/articles/about-code-owners#codeowners-syntax - -# Order is important; for each modified file, the last matching -# pattern takes the most precedence. -# That is, with the last pattern being -# *.rst @nashif -# if only .rst files are being modified, only nashif is -# automatically requested for review, but you can manually -# add others as needed. - -# Do not use wildcard on all source yet -# -# +++++++++++ NOTE ++++++++++++++++ -# -# Please use the MAINTAINERS file to add yourself in an area or to add a new -# component or code. This file is going to be deprecated and currently only had -# entries that are not covered by the MAINTAINERS file. - -/soc/arm/aspeed/ @aspeeddylan -/soc/atmel/ @nandojve -/soc/arm/bcm*/ @sbranden -/soc/arm/ene/ @ene-steven -/soc/arm/infineon_cat1/ @ifyall @npal-cy -/soc/arm/infineon_xmc/ @parthitce -/soc/arm/silabs_exx32/efm32pg1b/ @rdmeneze -/soc/arm/silabs_exx32/efr32mg21/ @l-alfred -/soc/arm/st_stm32/stm32mp1/ @arnopo -/soc/arm/st_stm32/stm32h7/*stm32h735* @benediktibk -/soc/arm/st_stm32/stm32l4/*stm32l451* @benediktibk -/soc/arm/ti_simplelink/cc13x2_cc26x2/ @bwitherspoon -/soc/arm/ti_simplelink/cc32xx/ @vanti -/soc/arm/ti_simplelink/msp432p4xx/ @Mani-Sadhasivam -/soc/arm/xilinx_zynq7000/ @ibirnbaum -/soc/arm/xilinx_zynqmp/ @stephanosio -/soc/arm/renesas_rcar/ @aaillet -/soc/riscv/openisa*/ @dleach02 -/soc/riscv/riscv-privileged/andes_v5/ @cwshu @kevinwang821020 @jimmyzhe -/soc/riscv/riscv-privileged/neorv32/ @henrikbrixandersen -/soc/riscv/riscv-privileged/gd32vf103/ @soburi -/soc/starfive/jh71xx/ @pfarwsi -/soc/riscv/riscv-privileged/niosv/ @sweeaun -/boards/adafruit/feather_nrf52840/ @jacobw -/boards/ene/ @ene-steven -/boards/arm/96b_argonkey/ @avisconti -/boards/arm/96b_avenger96/ @Mani-Sadhasivam -/boards/arm/96b_carbon/ @idlethread -/boards/arm/96b_meerkat96/ @Mani-Sadhasivam -/boards/arm/96b_nitrogen/ @idlethread -/boards/arm/96b_neonkey/ @Mani-Sadhasivam -/boards/arm/96b_stm32_sensor_mez/ @Mani-Sadhasivam -/boards/arm/96b_wistrio/ @Mani-Sadhasivam -/boards/arm/acn52832/ @sven-hm -/boards/arm/arduino_mkrzero/ @soburi -/boards/arm/bbc_microbit_v2/ @LingaoM -/boards/arm/blackpill_f401ce/ @coderkalyan -/boards/arm/blackpill_f411ce/ @coderkalyan -/boards/arm/bt*10/ @greg-leach -/boards/arm/cc1352r1_launchxl/ @bwitherspoon -/boards/arm/cc26x2r1_launchxl/ @bwitherspoon -/boards/arm/cc3220sf_launchxl/ @vanti -/boards/arm/cy8ckit_062_ble/ @ifyall @npal-cy -/boards/arm/cy8ckit_062s4/ @DaWei8823 -/boards/arm/cy8ckit_062_wifi_bt/ @ifyall @npal-cy -/boards/arm/cy8cproto_062_4343w/ @ifyall @npal-cy -/boards/arm/efm32pg_stk3401a/ @rdmeneze -/boards/arm/faze/ @mbittan @simonguinot -/boards/arm/frdm*/ @mmahadevan108 @dleach02 -/boards/arm/gd32*/ @nandojve -/boards/arm/google_*/ @jackrosenthal -/boards/arm/hexiwear*/ @mmahadevan108 @dleach02 -/boards/arm/ip_k66f/ @parthitce @lmajewski -/boards/arm/legend/ @mbittan @simonguinot -/boards/arm/lpcxpresso*/ @mmahadevan108 @dleach02 -/boards/arm/mimx8mm_evk/ @Mani-Sadhasivam -/boards/arm/mimx8mm_phyboard_polis @pefech -/boards/arm/mimxrt*/ @mmahadevan108 @dleach02 -/boards/arm/mps2_an385/ @fvincenzo -/boards/arm/msp_exp432p401r_launchxl/ @Mani-Sadhasivam -/boards/arm/npcx7m6fb_evb/ @MulinChao @ChiHuaL -/boards/arm/nrf*/ @carlescufi @lemrey -/boards/arm/nucleo_f401re/ @idlethread -/boards/arm/nuvoton_pfm_m487/ @ssekar15 -/boards/arm/qemu_cortex_a9/ @ibirnbaum -/boards/arm/qemu_cortex_r*/ @stephanosio -/boards/arm/qemu_cortex_m*/ @ioannisg @stephanosio -/boards/arm/quick_feather/ @fkokosinski @kgugala -/boards/arm/rak4631_nrf52840/ @gpaquet85 -/boards/arm/rak5010_nrf52840/ @gpaquet85 -/boards/arm/rpi_pico/ @yonsch -/boards/arm/ronoth_lodev/ @NorthernDean -/boards/arm/xmc45_relax_kit/ @parthitce -/boards/atmel/ @nandojve -/boards/arm/scobc_module1/ @yashi -/boards/arm/v2m_beetle/ @fvincenzo -/boards/arm/olimexino_stm32/ @ydamigos -/boards/arm/s32*/ @manuargue -/boards/arm/sensortile_box/ @avisconti -/boards/arm/steval_fcu001v1/ @Navin-Sankar -/boards/arm/stm32l1_disco/ @karlp -/boards/arm/stm32h735g_disco/ @benediktibk -/boards/arm/stm32f3_disco/ @ydamigos -/boards/arm/rcar_*/ @aaillet -/boards/arm/ubx_bmd345eval_nrf52840/ @Navin-Sankar @brec-u-blox -/boards/arm/nrf5340_audio_dk_nrf5340 @koffes @alexsven @erikrobstad @rick1082 @gWacey -/boards/arm/stm32_min_dev/ @sidcha -/boards/ezurio/* @rerickson1 -/boards/riscv/rv32m1_vega/ @dleach02 -/boards/riscv/adp_xc7k_ae350/ @cwshu @kevinwang821020 @jimmyzhe -/boards/riscv/longan_nano/ @soburi -/boards/riscv/neorv32/ @henrikbrixandersen -/boards/riscv/niosv*/ @sweeaun -/boards/riscv/sparkfun_red_v_things_plus/ @soburi -/boards/riscv/stamp_c3/ @soburi -/boards/starfive/visionfive2/ @kanakshilledar @pfarwsi -/boards/shields/atmel_rf2xx/ @nandojve -/boards/shields/esp_8266/ @nandojve -/boards/shields/inventek_eswifi/ @nandojve -/boards/xtensa/odroid_go/ @ydamigos -/boards/xtensa/nxp_adsp_imx8/ @iuliana-prodan @dbaluta -/boards/xtensa/kincony_kc868_a32/ @bbilas -/boards/arm64/qemu_cortex_a53/ @carlocaione -/boards/arm64/bcm958402m2_a72/ @abhishek-brcm -/boards/arm64/mimx8mm_evk/ @MrVan @JiafeiPan -/boards/arm64/mimx8mp_evk/ @MrVan @JiafeiPan -/boards/arm64/mimx8mn_evk/ @JiafeiPan -/boards/arm64/mimx93_evk/ @JiafeiPan -/boards/arm64/nxp_ls1046ardb/ @JiafeiPan -/boards/arm64/xenvm/ @lorc @firscity -/boards/arm64/fvp_baser_aemv8r/ @povergoing -/boards/arm64/fvp_base_revc_2xaemv8a/ @carlocaione -/boards/arm64/intel_socfpga_agilex_socdk/ @siclim @ngboonkhai -/boards/arm64/intel_socfpga_agilex5_socdk/ @teikheng @gdengi -/boards/arm64/rcar_*/ @lorc @xakep-amatop -/boards/amd/acp_6_0_adsp/ @dineshkumar.kalva @basavaraj.hiregoudar -# All cmake related files -/doc/develop/tools/coccinelle.rst @himanshujha199640 @JuliaLawall -/doc/services/device_mgmt/smp_protocol.rst @de-nordic @nordicjm -/doc/services/device_mgmt/smp_groups/ @de-nordic @nordicjm -/doc/services/sensing/ @lixuzha @ghu0510 @qianruh -/doc/CMakeLists.txt @carlescufi -/doc/_scripts/ @carlescufi -/drivers/*/*sam4l* @nandojve -/drivers/*/*cc13xx_cc26xx* @bwitherspoon -/drivers/*/*gd32* @nandojve -/drivers/*/*mcux* @mmahadevan108 @dleach02 -/drivers/*/*native_posix* @aescolar @daor-oti -/drivers/*/*lpc11u6x* @mbittan @simonguinot -/drivers/*/*npcx* @MulinChao @ChiHuaL -/drivers/*/*andes* @cwshu @kevinwang821020 @jimmyzhe -/drivers/*/*ifx_cat1* @ifyall @npal-cy -/drivers/*/*neorv32* @henrikbrixandersen -/drivers/*/*_s32* @manuargue -/drivers/adc/adc_ads1x1x.c @XenuIsWatching -/drivers/adc/adc_stm32.c @cybertale -/drivers/adc/adc_rpi_pico.c @soburi -/drivers/adc/*ads114s0x* @benediktibk -/drivers/adc/*max11102_17* @benediktibk -/drivers/adc/*kb1200* @ene-steven -/drivers/adc/adc_ad559x.c @bbilas -/drivers/audio/*nrfx* @anangl -/drivers/auxdisplay/*pt6314* @xingrz -/drivers/auxdisplay/* @thedjnK -/drivers/bbram/* @yperess @sjg20 @jackrosenthal -/drivers/bluetooth/ @alwa-nordic @jhedberg @Vudentz -/drivers/bluetooth/hci/hci_esp32.c @sylvioalves -/drivers/can/*mcp2515* @karstenkoenig -/drivers/can/*rcar* @aaillet -/drivers/clock_control/*agilex* @siclim @gdengi -/drivers/clock_control/*nrf* @nordic-krch -/drivers/clock_control/*esp32* @extremegtx @sylvioalves -/drivers/clock_control/*cpg_mssr* @aaillet -/drivers/console/ipm_console.c @finikorg -/drivers/console/semihost_console.c @luozhongyao -/drivers/console/jailhouse_debug_console.c @MrVan -/drivers/counter/counter_cmos.c @dcpleung -/drivers/counter/counter_ll_stm32_timer.c @kentjhall -/drivers/counter/*esp32* @sylvioalves -/drivers/counter/dw_timer.c @pbalsundar -/drivers/counter/counter_timer_shell.c @pbalsundar -/drivers/crypto/*nrf_ecb* @maciekfabia @anangl -/drivers/display/*rm68200* @mmahadevan108 -/drivers/display/display_ili9342c.* @extremegtx -/drivers/dac/*ad56xx* @benediktibk -/drivers/dac/dac_ad559x.c @bbilas -/drivers/dai/ @kv2019i @marcinszkudlinski @abonislawski -/drivers/dai/intel/ @kv2019i @marcinszkudlinski @abonislawski -/drivers/dai/intel/ssp/ @kv2019i @marcinszkudlinski @abonislawski -/drivers/dai/intel/dmic/ @marcinszkudlinski @abonislawski -/drivers/dai/intel/alh/ @abonislawski -/drivers/dma/dma_dw_axi.c @pbalsundar -/drivers/dma/*dw* @tbursztyka -/drivers/dma/*dw_common* @abonislawski -/drivers/dma/*sam0* @Sizurka -/drivers/dma/dma_stm32* @cybertale @lowlander -/drivers/dma/*pl330* @raveenp -/drivers/dma/*iproc_pax* @raveenp -/drivers/dma/*intel_adsp* @teburd @abonislawski -/drivers/dma/*rpi_pico* @soburi -/drivers/dma/*xmc4xxx* @talih0 -/drivers/eeprom/eeprom_stm32.c @KwonTae-young -/drivers/entropy/*b91* @andy-liu-telink -/drivers/entropy/*bt_hci* @JordanYates -/drivers/entropy/*rv32m1* @dleach02 -/drivers/ethernet/*dwmac* @npitre -/drivers/ethernet/*stm32* @Nukersson @lochej -/drivers/ethernet/*w5500* @parthitce -/drivers/ethernet/*xlnx_gem* @ibirnbaum -/drivers/ethernet/*smsc91x* @sgrrzhf -/drivers/ethernet/*adin2111* @GeorgeCGV -/drivers/ethernet/*oa_tc6* @lmajewski -/drivers/ethernet/*lan865x* @lmajewski -/drivers/ethernet/dwc_xgmac @Smale-12048867 -/drivers/ethernet/dwc_xgmac/dwc_xgmac @Smale-12048867 -/drivers/ethernet/phy/ @rlubos @tbursztyka @arvinf @jukkar -/drivers/ethernet/phy/*adin2111* @GeorgeCGV -/drivers/mdio/*adin2111* @GeorgeCGV -/drivers/flash/*stm32_qspi* @lmajewski -/drivers/flash/*b91* @andy-liu-telink -/drivers/flash/*cadence* @ngboonkhai -/drivers/flash/*cc13xx_cc26xx* @pepe2k -/drivers/flash/*nrf* @de-nordic -/drivers/flash/*esp32* @sylvioalves -/drivers/flash/flash_cadence_nand* @nbalabak -/drivers/gpio/*b91* @andy-liu-telink -/drivers/gpio/*lmp90xxx* @henrikbrixandersen -/drivers/gpio/*nct38xx* @MulinChao @ChiHuaL -/drivers/gpio/*eos_s3* @fkokosinski @kgugala -/drivers/gpio/*rcar* @aaillet -/drivers/gpio/*esp32* @sylvioalves -/drivers/gpio/*rpi_pico* @yonsch -/drivers/gpio/*xlnx_ps* @ibirnbaum -/drivers/gpio/*ads114s0x* @benediktibk -/drivers/gpio/*bd8lb600fs* @benediktibk -/drivers/gpio/*pcal64xxa* @benediktibk -/drivers/gpio/*kb1200* @ene-steven -/drivers/gpio/gpio_altera_pio.c @shilinte -/drivers/gpio/gpio_ad559x.c @bbilas -/drivers/i2c/i2c_common.c @sjg20 -/drivers/i2c/i2c_emul.c @sjg20 -/drivers/i2c/i2c_ite_enhance.c @GTLin08 -/drivers/i2c/i2c_ite_it8xxx2.c @GTLin08 -/drivers/i2c/i2c_shell.c @nashif -/drivers/i2c/Kconfig.i2c_emul @sjg20 -/drivers/i2c/Kconfig.it8xxx2 @GTLin08 -/drivers/i2c/target/*eeprom* @henrikbrixandersen -/drivers/i2c/Kconfig.test @mbolivar-ampere -/drivers/i2c/i2c_test.c @mbolivar-ampere -/drivers/i2c/*rcar* @aaillet -/drivers/i2c/*kb1200* @ene-steven -/drivers/i2s/i2s_ll_stm32* @avisconti -/drivers/i2s/*nrfx* @anangl -/drivers/i3c/i3c_cdns.c @XenuIsWatching -/drivers/ieee802154/ @rlubos @tbursztyka @jukkar @fgrandel -/drivers/ieee802154/*b91* @andy-liu-telink -/drivers/ieee802154/ieee802154_nrf5* @ankuns -/drivers/ieee802154/ieee802154_rf2xx* @tbursztyka @nandojve -/drivers/ieee802154/ieee802154_cc13xx* @bwitherspoon @cfriedt @vaishnavachath -/drivers/interrupt_controller/ @dcpleung @nashif -/drivers/interrupt_controller/intc_gic.c @stephanosio -/drivers/interrupt_controller/*esp32* @sylvioalves -/drivers/interrupt_controller/intc_nuclei_eclic.c @soburi -/drivers/ipm/ipm_mhu* @karl-zh -/drivers/ipm/Kconfig.nrfx @masz-nordic -/drivers/ipm/Kconfig.nrfx_ipc_channel @masz-nordic -/drivers/ipm/ipm_cavs* @dcpleung @andyross -/drivers/ipm/ipm_nrfx_ipc.c @masz-nordic -/drivers/ipm/ipm_nrfx_ipc.h @masz-nordic -/drivers/ipm/ipm_stm32_ipcc.c @arnopo -/drivers/ipm/ipm_stm32_hsem.c @cameled -/drivers/ipm/ipm_esp32.c @uLipe -/drivers/ipm/ipm_ivshmem.c @uLipe -/drivers/kscan/*xec* @franciscomunoz @sjvasanth1 -/drivers/kscan/*ft5336* @MaureenHelm -/drivers/kscan/*ht16k33* @henrikbrixandersen -/drivers/led_strip/ @mbolivar-ampere -/drivers/mfd/mfd_ad559x.c @bbilas -/drivers/mfd/mfd_max20335.c @bbilas -/drivers/misc/ft8xx/ @hubertmis -/drivers/modem/hl7800.c @rerickson1 -/drivers/modem/simcom-sim7080.c @lgehreke -/drivers/modem/simcom-sim7080.h @lgehreke -/drivers/modem/Kconfig.hl7800 @rerickson1 -/drivers/modem/Kconfig.simcom-sim7080 @lgehreke -/drivers/pinctrl/*esp32* @sylvioalves -/drivers/pinctrl/*it8xxx2* @ite -/drivers/pinctrl/*kb1200* @ene-steven -/drivers/pm_cpu_ops/psci_shell.c @nbalabak @gdengi -/drivers/power_domain/ @ceolin -/drivers/ps2/*xec* @franciscomunoz @sjvasanth1 -/drivers/ps2/*npcx* @MulinChao @ChiHuaL -/drivers/pwm/*b91* @andy-liu-telink -/drivers/pwm/*pca9685* @nixward -/drivers/pwm/*rpi_pico* @burumaj -/drivers/pwm/*rv32m1* @henrikbrixandersen -/drivers/pwm/*sam0* @nzmichaelh -/drivers/pwm/*test* @JordanYates -/drivers/pwm/*xlnx* @henrikbrixandersen -/drivers/pwm/pwm_capture.c @henrikbrixandersen -/drivers/pwm/pwm_shell.c @henrikbrixandersen -/drivers/pwm/*gecko* @sun681 -/drivers/pwm/*it8xxx2* @RuibinChang -/drivers/pwm/*esp32* @LucasTambor -/drivers/pwm/*rcar* @aaillet -/drivers/pwm/*max31790* @benediktibk -/drivers/pwm/*kb1200* @ene-steven -/drivers/regulator/* @gmarull -/drivers/regulator/regulator_max20335.c @bbilas -/drivers/regulator/regulator_pca9420.c @danieldegrasse -/drivers/regulator/regulator_rpi_pico.c @soburi -/drivers/regulator/regulator_shell.c @danieldegrasse -/drivers/reset/reset_intel_socfpga.c @nbalabak -/drivers/reset/Kconfig.intel_socfpga @nbalabak -/drivers/sensor/ams_iAQcore/ @alexanderwachter -/drivers/sensor/ens210/ @alexanderwachter -/drivers/sensor/grow_r502a/ @DineshDK03 -/drivers/sensor/hts*/ @avisconti -/drivers/sensor/ina23*/ @bbilas -/drivers/sensor/lis*/ @avisconti -/drivers/sensor/lps*/ @avisconti -/drivers/sensor/lsm*/ @avisconti -/drivers/sensor/mpr/ @sven-hm -/drivers/sensor/qdec_stm32/ @valeriosetti -/drivers/sensor/rpi_pico_temp/ @soburi -/drivers/sensor/st*/ @avisconti -/drivers/sensor/veaa_x_3/ @jeppenodgaard @MaureenHelm -/drivers/sensor/ene_tack_kb1200/ @ene-steven -/drivers/serial/*b91* @andy-liu-telink -/drivers/serial/uart_altera_jtag.c @nashif @gohshunjing -/drivers/serial/uart_altera.c @gohshunjing -/drivers/serial/*ns16550* @dcpleung @nashif @gdengi -/drivers/serial/*nrfx* @anangl -/drivers/serial/Kconfig.mcux_iuart @Mani-Sadhasivam -/drivers/serial/uart_mcux_iuart.c @Mani-Sadhasivam -/drivers/serial/Kconfig.rtt @carlescufi @pkral78 -/drivers/serial/uart_rtt.c @carlescufi @pkral78 -/drivers/serial/*rpi_pico* @yonsch -/drivers/serial/Kconfig.xlnx @wjliang -/drivers/serial/uart_xlnx_ps.c @wjliang -/drivers/serial/uart_xlnx_uartlite.c @henrikbrixandersen -/drivers/serial/*xmc4xxx* @parthitce -/drivers/serial/*numicro* @ssekar15 -/drivers/serial/*apbuart* @julius-barendt -/drivers/serial/*rcar* @aaillet -/drivers/serial/Kconfig.xen @lorc @firscity -/drivers/serial/uart_hvc_xen.c @lorc @firscity -/drivers/serial/uart_hvc_xen_consoleio.c @lorc @firscity -/drivers/serial/Kconfig.it8xxx2 @GTLin08 -/drivers/serial/uart_ite_it8xxx2.c @GTLin08 -/drivers/serial/*intel_lw* @shilinte -/drivers/serial/*kb1200* @ene-steven -/drivers/disk/sdmmc_stm32.c @anthonybrandon -/drivers/ptp_clock/ @tbursztyka @jukkar -/drivers/spi/*b91* @andy-liu-telink -/drivers/spi/spi_rv32m1_lpspi* @karstenkoenig -/drivers/spi/*esp32* @sylvioalves -/drivers/spi/*pl022* @soburi -/drivers/sdhc/ @danieldegrasse -/drivers/sdhc/sdhc_cdns* @roymurlidhar @tanmaykathpalia -/drivers/timer/*arm_arch* @carlocaione -/drivers/timer/*cortex_m_systick* @anangl -/drivers/timer/*altera_avalon* @nashif -/drivers/timer/*riscv_machine* @kgugala @pgielda -/drivers/timer/*ite_it8xxx2* @ite -/drivers/timer/*xlnx_psttc* @wjliang @stephanosio -/drivers/timer/*cc13xx_cc26xx_rtc* @vanti -/drivers/timer/*cavs* @dcpleung -/drivers/timer/*leon_gptimer* @julius-barendt -/drivers/timer/*mips_cp0* @frantony -/drivers/timer/*rcar_cmt* @aaillet -/drivers/timer/*esp32_sys* @uLipe -/drivers/timer/*sam0_rtc* @bendiscz -/drivers/timer/*xtensa* @dcpleung -/drivers/timer/*rv32m1_lptmr* @mbolivar -/drivers/timer/*nrf_rtc* @anangl -/drivers/timer/*hpet* @dcpleung -/drivers/usb/device/usb_dc_stm32.c @ydamigos @loicpoulain -/drivers/i2c/*b91* @andy-liu-telink -/drivers/i2c/i2c_ll_stm32* @ydamigos -/drivers/i2c/i2c_rv32m1_lpi2c* @henrikbrixandersen -/drivers/i2c/*sam0* @Sizurka -/drivers/i2c/i2c_dw* @dcpleung -/drivers/i2c/*tca954x* @kurddt -/drivers/*/*xec* @franciscomunoz @albertofloyd @sjvasanth1 -/drivers/watchdog/*gecko* @oanerer -/drivers/watchdog/*sifive* @katsuster -/drivers/watchdog/wdt_handlers.c @dcpleung @nashif -/drivers/watchdog/*cc32xx* @pavlohamov -/drivers/watchdog/wdt_ite_it8xxx2.c @RuibinChang -/drivers/watchdog/Kconfig.it8xxx2 @RuibinChang -/drivers/watchdog/wdt_counter.c @nordic-krch -/drivers/watchdog/*rpi_pico* @thedjnK -/drivers/watchdog/*dw* @softwarecki @pbalsundar -/drivers/watchdog/*ifx* @sreeramIfx -/drivers/watchdog/*kb1200* @ene-steven -/drivers/wifi/esp_at/ @mniestroj -/drivers/wifi/eswifi/ @loicpoulain @nandojve -/drivers/wifi/winc1500/ @kludentwo -/drivers/virtualization/ @tbursztyka -/dts/arm/acsip/ @NorthernDean -/dts/arm/aspeed/ @aspeeddylan -/dts/arm/atmel/ @galak @nandojve -/dts/arm/broadcom/ @sbranden -/dts/arm/cypress/ @ifyall @npal-cy -/dts/arm/ene/kb1200 @ene-steven -/dts/arm/gd/ @nandojve -/dts/arm/infineon/xmc4* @parthitce @ifyall @npal-cy -/dts/arm/infineon/psoc6/ @ifyall @npal-cy -/dts/arm64/armv8-r.dtsi @povergoing -/dts/arm64/intel/*intel_socfpga* @siclim -/dts/arm64/nxp/ @JiafeiPan -/dts/arm64/renesas/ @lorc @xakep-amatop -/dts/arm/quicklogic/ @fkokosinski @kgugala -/dts/arm/seeed_studio/ @str4t0m -/dts/arm/st/h7/*stm32h735* @benediktibk -/dts/arm/st/l4/*stm32l451* @benediktibk -/dts/arm/ti/cc13?2* @bwitherspoon -/dts/arm/ti/cc26?2* @bwitherspoon -/dts/arm/ti/cc3235* @vanti -/dts/arm/nordic/ @anangl @carlescufi -/dts/arm/nuvoton/ @ssekar15 @MulinChao @ChiHuaL -/dts/arm/nxp/ @mmahadevan108 @dleach02 -/dts/arm/nxp/nxp_s32* @manuargue -/dts/arm/microchip/ @franciscomunoz @albertofloyd @sjvasanth1 -/dts/arm/rpi_pico/ @yonsch -/dts/arm/silabs/efm32_pg_1b.dtsi @rdmeneze -/dts/arm/silabs/efm32gg11b* @oanerer -/dts/arm/silabs/efr32bg13p* @mnkp -/dts/arm/silabs/efr32bg22* @kgugala @fkokosinski @pczarnecki -/dts/arm/silabs/efr32xg13p* @mnkp -/dts/arm/silabs/efm32pg1b* @rdmeneze -/dts/arm/silabs/efr32mg21* @l-alfred -/dts/arm/silabs/efr32fg13* @yonsch -/dts/riscv/ite/ @ite -/dts/riscv/microchip/microchip-miv.dtsi @galak -/dts/riscv/openisa/rv32m1* @dleach02 -/dts/riscv/starfive/ @rajnesh-kanwal @pfarwsi -/dts/riscv/andes/andes_v5* @cwshu @kevinwang821020 @jimmyzhe -/dts/riscv/niosv/ @sweeaun -/dts/arm/armv*m.dtsi @galak @ioannisg -/dts/arm/armv7-a.dtsi @ibirnbaum -/dts/arm/armv7-r.dtsi @bbolen @stephanosio -/dts/arm/xilinx/ @bbolen @stephanosio -/dts/arm/renesas/rcar/ @aaillet -/dts/xtensa/xtensa.dtsi @ydamigos -/dts/xtensa/intel/ @dcpleung -/dts/xtensa/espressif/ @sylvioalves -/dts/xtensa/nxp/ @iuliana-prodan @dbaluta -/dts/bindings/can/ @alexanderwachter @henrikbrixandersen -/dts/bindings/i2c/zephyr*i2c-emul*.yaml @sjg20 -/dts/bindings/adc/st*stm32-adc.yaml @cybertale -/dts/bindings/adc/*ads114s08.yaml @benediktibk -/dts/bindings/adc/*max111* @benediktibk -/dts/bindings/modem/*hl7800.yaml @rerickson1 -/dts/bindings/serial/ns16550.yaml @dcpleung @nashif -/dts/bindings/counter/snps,dw-timers.yaml @pbalsundar -/dts/bindings/wifi/*esp-at.yaml @mniestroj -/dts/bindings/*/*gd32* @nandojve -/dts/bindings/*/*sam* @nandojve -/dts/bindings/*/*npcx* @MulinChao @ChiHuaL -/dts/bindings/*/*psoc6* @ifyall @npal-cy -/dts/bindings/*/*infineon*cat1* @ifyall @npal-cy -/dts/bindings/*/nordic* @anangl -/dts/bindings/*/nxp* @mmahadevan108 @dleach02 -/dts/bindings/*/nxp*s32* @manuargue -/dts/bindings/*/openisa* @dleach02 -/dts/bindings/*/raspberrypi*pico* @yonsch -/dts/bindings/sensor/ams* @alexanderwachter -/dts/bindings/*/sifive* @mateusz-holenko @kgugala @pgielda -/dts/bindings/*/andes* @cwshu @kevinwang821020 @jimmyzhe -/dts/bindings/*/neorv32* @henrikbrixandersen -/dts/bindings/*/*lan91c111* @sgrrzhf -/dts/bindings/i3c/ @dcpleung -/dts/bindings/pm_cpu_ops/* @carlocaione -/dts/bindings/ethernet/*gem.yaml @ibirnbaum -/dts/bindings/auxdisplay/*pt6314.yaml @xingrz -/dts/bindings/auxdisplay/* @thedjnK -/dts/bindings/sensor/*bme680* @BoschSensortec -/dts/bindings/sensor/*ina23* @bbilas -/dts/bindings/sensor/st* @avisconti -/dts/bindings/sensor/zephyr,sensing.yaml @lixuzha @ghu0510 @qianruh -/dts/bindings/sensor/zephyr,sensing*.yaml @lixuzha @ghu0510 @qianruh -/dts/bindings/smbus/ @finikorg -/dts/bindings/sip_svc/ @maheshraotm -/dts/bindings/cpu/intel,niosv.yaml @sweeaun -/dts/bindings/reset/intel,socfpga-reset.yaml @nbalabak -/dts/bindings/gpio/*pcal64* @benediktibk -/dts/bindings/gpio/*bd8lb600fs* @benediktibk -/dts/bindings/gpio/*ads114s0x* @benediktibk -/dts/bindings/pwm/*max31790* @benediktibk -/dts/bindings/dac/*ad56* @benediktibk diff --git a/Kconfig.zephyr b/Kconfig.zephyr index 5ae12736fdf65c9..2d8031260ced618 100644 --- a/Kconfig.zephyr +++ b/Kconfig.zephyr @@ -709,8 +709,21 @@ config CLEANUP_INTERMEDIATE_FILES from the build process. Note this breaks incremental builds, west spdx (Software Bill of Material generation), and maybe others. +config BUILD_GAP_FILL_PATTERN + hex "Gap fill pattern" + default 0xFF + help + Pattern used for gap filling of output files. + This value should be set to the value of a clean flash as this can + significantly reduce flash write times. + This setting only defines the gap fill pattern and doesn't enable gap + filling. + Note: binary files are always gap filled as they contain no address + information. + config BUILD_NO_GAP_FILL - bool "Don't fill gaps in generated hex/bin/s19 files." + bool "Don't fill gaps in generated hex/s19 files [DEPRECATED]." + select DEPRECATED config BUILD_OUTPUT_HEX bool "Build a binary in HEX format" @@ -718,6 +731,12 @@ config BUILD_OUTPUT_HEX Build an Intel HEX binary zephyr/zephyr.hex in the build directory. The name of this file can be customized with CONFIG_KERNEL_BIN_NAME. +config BUILD_OUTPUT_HEX_GAP_FILL + bool "Fill gaps in hex files" + depends on !BUILD_NO_GAP_FILL + help + Fill gaps in hex based files. + config BUILD_OUTPUT_BIN bool "Build a binary in BIN format" default y @@ -752,6 +771,12 @@ config BUILD_OUTPUT_S19 Build an S19 binary zephyr/zephyr.s19 in the build directory. The name of this file can be customized with CONFIG_KERNEL_BIN_NAME. +config BUILD_OUTPUT_S19_GAP_FILL + bool "Fill gaps in s19 files" + depends on !BUILD_NO_GAP_FILL + help + Fill gaps in s19 based files. + config BUILD_OUTPUT_UF2 bool "Build a binary in UF2 format" depends on BUILD_OUTPUT_BIN @@ -768,7 +793,8 @@ config BUILD_OUTPUT_UF2_FAMILY_ID default "0xada52840" if SOC_NRF52840_QIAA default "0x4fb2d5bd" if SOC_SERIES_IMXRT10XX || SOC_SERIES_IMXRT11XX default "0x2abc77ec" if SOC_SERIES_LPC55XXX - default "0xe48bff56" if SOC_SERIES_RP2XXX + default "0xe48bff56" if SOC_SERIES_RP2040 + default "0xe48bff57" if SOC_SERIES_RP2350 default "0x68ed2b88" if SOC_SERIES_SAMD21 default "0x55114460" if SOC_SERIES_SAMD51 default "0x647824b6" if SOC_SERIES_STM32F0X diff --git a/MAINTAINERS.yml b/MAINTAINERS.yml index 846d4cc2bf63b42..c0c4fe5c556c6f4 100644 --- a/MAINTAINERS.yml +++ b/MAINTAINERS.yml @@ -133,6 +133,7 @@ ARC arch: - evgeniy-paltsev collaborators: - abrodkin + - tagunil files: - arch/arc/ - include/zephyr/arch/arc/ @@ -158,6 +159,7 @@ ARM arch: - MaureenHelm - stephanosio - bbolen + - wearyzen files: - arch/arm/ - arch/arm/core/offsets/ @@ -194,6 +196,8 @@ ARM Platforms: status: maintained maintainers: - ithinuel + collaborators: + - wearyzen files: - boards/arm/mps*/ - boards/arm/v2m_*/ @@ -312,6 +316,7 @@ Bluetooth HCI: - sjanc - theob-pro - HoZHel + - cvinayak files: - include/zephyr/drivers/bluetooth/ - include/zephyr/drivers/bluetooth.h @@ -325,7 +330,7 @@ Bluetooth HCI: tests: - bluetooth -Bluetooth controller: +Bluetooth Controller: status: maintained maintainers: - cvinayak @@ -364,6 +369,7 @@ Bluetooth Host: - sjanc - Thalley - theob-pro + - cvinayak files: - doc/connectivity/bluetooth/ - include/zephyr/bluetooth/ @@ -514,6 +520,7 @@ Bluetooth ISO: - jhedberg - kruithofa - rugeGerritsen + - cvinayak files: - include/zephyr/bluetooth/iso.h - doc/connectivity/bluetooth/shell/host/iso.rst @@ -887,9 +894,10 @@ Devicetree: collaborators: - decsny - galak + - rruuaanng files-regex: - - dts/bindings/.*zephyr.* - - dts/bindings/[^,]+$ + - ^dts/bindings/.*zephyr.* + - ^dts/bindings/[^,]+$ files: - scripts/dts/ - dts/common/ @@ -1384,6 +1392,7 @@ Release Notes: - decsny - lmajewski - pdgendt + - maass-hamburg files: - drivers/ethernet/ - include/zephyr/dt-bindings/ethernet/ @@ -1640,6 +1649,7 @@ Release Notes: status: odd fixes collaborators: - decsny + - maass-hamburg files: - doc/hardware/peripherals/mdio.rst - drivers/mdio/ @@ -1777,7 +1787,6 @@ Release Notes: maintainers: - simonguinot collaborators: - - mbolivar-ampere - soburi - thedjnK files: @@ -2027,6 +2036,7 @@ Release Notes: - tristan-google - ubieda - jeppenodgaard + - asemjonovs files: - drivers/sensor/ - include/zephyr/drivers/sensor.h @@ -2203,7 +2213,7 @@ Release Notes: collaborators: - sachinthegreen files: - - drivers/wifi/nrfwifi/ + - drivers/wifi/nrf_wifi/ - dts/bindings/wifi/nordic,nrf70.yaml - dts/bindings/wifi/nordic,nrf70-qspi.yaml - dts/bindings/wifi/nordic,nrf70-spi.yaml @@ -2218,6 +2228,16 @@ Release Notes: labels: - "area: Wi-Fi" +"Drivers: Wi-Fi NXP": + status: maintained + maintainers: + - dleach02 + - MaochenWang1 + files: + - drivers/wifi/nxp/ + labels: + - "platform: NXP Drivers" + "Drivers: Memory Management": status: maintained maintainers: @@ -2659,8 +2679,8 @@ MAINTAINERS file: status: maintained maintainers: - MaureenHelm - collaborators: - nashif + collaborators: - stephanosio files: - MAINTAINERS.yml @@ -2815,14 +2835,17 @@ Networking: - doc/connectivity/networking/api/ieee802154.rst - doc/connectivity/networking/api/ptp.rst - doc/connectivity/networking/api/wifi.rst + - doc/connectivity/networking/api/http*.rst - include/zephyr/net/gptp.h - include/zephyr/net/ieee802154*.h - include/zephyr/net/ptp.h - include/zephyr/net/wifi*.h - include/zephyr/net/buf.h - include/zephyr/net/dhcpv4*.h + - include/zephyr/net/http/ - samples/net/gptp/ - samples/net/sockets/coap_*/ + - samples/net/sockets/*http*/ - samples/net/lwm2m_client/ - samples/net/wifi/ - samples/net/dhcpv4_client/ @@ -2831,12 +2854,14 @@ Networking: - subsys/net/l2/wifi/ - subsys/net/lib/coap/ - subsys/net/lib/config/ieee802154* + - subsys/net/lib/http/ - subsys/net/lib/lwm2m/ - subsys/net/lib/ptp/ - subsys/net/lib/tls_credentials/ - subsys/net/lib/dhcpv4/ - tests/net/dhcpv4/ - tests/net/ieee802154/ + - tests/net/lib/http*/ - tests/net/wifi/ labels: - "area: Networking" @@ -2998,7 +3023,7 @@ Networking: - subsys/net/lib/ptp/ - samples/net/ptp/ labels: - - "area: Networking" + - "area: PTP" tests: - sample.net.ptp @@ -3058,6 +3083,25 @@ Networking: tests: - net.wifi +"Networking: HTTP": + status: maintained + maintainers: + - jukkar + - rlubos + collaborators: + - mrodgers-witekio + files: + - doc/connectivity/networking/api/http*.rst + - include/zephyr/net/http/ + - subsys/net/lib/http/ + - samples/net/sockets/*http*/ + - tests/net/lib/http*/ + labels: + - "area: Networking" + - "area: HTTP" + tests: + - net.http + NIOS-2 arch: status: maintained maintainers: @@ -3337,7 +3381,7 @@ Shields: SPARC arch: status: odd fixes collaborators: - - julius-barendt + - tbr-tt files: - arch/sparc/ - include/zephyr/arch/sparc/ @@ -3349,7 +3393,7 @@ SPARC arch: Gaisler Platforms: status: odd fixes collaborators: - - julius-barendt + - tbr-tt files: - dts/sparc/gaisler/ - soc/gaisler/ @@ -3515,7 +3559,7 @@ Raspberry Pi Pico Platforms: - boards/raspberrypi/ - boards/adafruit/kb2040/ - boards/sparkfun/pro_micro_rp2040/ - - dts/arm/rpi_pico/ + - dts/arm/raspberrypi/rpi_pico/ - dts/bindings/*/raspberrypi,pico* - drivers/*/*rpi_pico - drivers/*/*rpi_pico*/ @@ -3665,11 +3709,9 @@ NXP Drivers: - dleach02 - mmahadevan108 collaborators: - - danieldegrasse - decsny - manuargue - dbaluta - - MarkWangChinese files-regex: - ^drivers/.*nxp.* - ^drivers/.*mcux.* @@ -3690,19 +3732,32 @@ NXP Drivers: - include/zephyr/drivers/*/*mcux* - arch/arm/core/mpu/nxp_mpu.c - dts/bindings/*/nxp* + files-exclude: + - drivers/wifi/nxp/ + - drivers/usb/*/*mcux* files-regex-exclude: - .*s32.* labels: - "platform: NXP Drivers" description: NXP Drivers +NXP MCUX USB: + status: maintained + maintainers: + - mmahadevan108 + - MarkWangChinese + files: + - drivers/usb/*/*mcux* + labels: + - "platform: NXP Drivers" + description: NXP MCUX USB shim drivers + NXP Platforms (MCU): status: maintained maintainers: - dleach02 - mmahadevan108 collaborators: - - danieldegrasse - DerekSnell - yvanderv - EmilioCBen @@ -3764,7 +3819,6 @@ NXP Platforms (MPU): - dleach02 - dbaluta - iuliana-prodan - - danieldegrasse - yvanderv files: - dts/arm64/nxp/ @@ -3804,7 +3858,8 @@ Microchip MEC Platforms: - drivers/*/*mchp*.c - tests/boards/mec15xxevb_assy6853/ - tests/boards/mec172xevb_assy6906/ - - dts/bindings/*/microchip,* + - dts/bindings/*/microchip,mec* + - dts/bindings/*/microchip,xec* labels: - "platform: Microchip MEC" @@ -3971,6 +4026,7 @@ STM32 Platforms: - GeorgeCGV - marwaiehm-st - mathieuchopstm + - djiatsaf-st files: - boards/st/ - drivers/*/*stm32*.c @@ -3981,11 +4037,37 @@ STM32 Platforms: - dts/bindings/*/*stm32* - soc/st/stm32/ - samples/boards/st/ + files-exclude: + - boards/st/*wb*/ + - drivers/bluetooth/hci/*stm32*.c + - soc/st/stm32/stm32wb*/ labels: - "platform: STM32" description: >- - STM32 SOCs, dts files and related drivers. ST nucleo, disco and eval - boards. + STM32 SOCs, dts files and related drivers. ST development boards. + +STM32 Wireless Platforms: + status: maintained + maintainers: + - erwango + collaborators: + - asm5878 + - HoZHel + - benothmn-st + - mathieuchopstm + files: + - boards/shields/x_nucleo_bnrg2a1/ + - boards/shields/x_nucleo_idb05a1/ + - boards/shields/x_nucleo_wb05kn1/ + - boards/st/*wb*/ + - drivers/bluetooth/hci/*stm32*.c + - drivers/bluetooth/hci/hci_spi_st.c + - soc/st/stm32/stm32wb*/ + labels: + - "platform: STM32" + description: >- + STM32WB SOCs, dts files and related drivers. STM32WB development boards + and ST bluetooth shields. Espressif Platforms: status: maintained @@ -4354,6 +4436,7 @@ USB: - samples/subsys/usb/ - subsys/usb/ - tests/subsys/usb/ + - tests/drivers/build_all/usb/ - tests/drivers/usb/ - tests/drivers/udc/ - doc/connectivity/usb/ @@ -4431,12 +4514,13 @@ VFS: - filesystem West: - status: odd fixes + status: maintained + maintainers: + - pdgendt collaborators: - - mbolivar-ampere + - mbolivar - carlescufi - swinslow - - pdgendt files: - scripts/west-commands.yml - scripts/west_commands/ @@ -4603,6 +4687,17 @@ West: labels: - "area: CMSIS-NN" +"West project: cmsis_6": + status: maintained + maintainers: + - ithinuel + collaborators: + - tomi-font + - wearyzen + files: [] + labels: + - "area: CMSIS_6" + "West project: edtt": status: maintained maintainers: @@ -4745,11 +4840,6 @@ West: collaborators: - hubertmis - nordic-krch - - krish2718 - - sachinthegreen - - udaynordic - - rajb9 - - srkanordic files: - modules/hal_nordic/ labels: @@ -4770,7 +4860,7 @@ West: - dleach02 - mmahadevan108 collaborators: - - danieldegrasse + - decsny - manuargue - PetervdPerk-NXP - bperseghetti @@ -4859,11 +4949,25 @@ West: - FRASTM - gautierg-st - marwaiehm-st + - asm5878 + - HoZHel + - benothmn-st files: - modules/Kconfig.stm32 labels: - "platform: STM32" +"West project: hal_tdk": + status: maintained + maintainers: + - afontaine-invn + collaborators: + - rbuisson-invn + - gjabouley-invn + - sriccardi-invn + files: + - modules/hal_tdk/Kconfig + "West project: hal_telink": status: maintained maintainers: @@ -4881,6 +4985,14 @@ West: labels: - "platform: TI" +"West project: hal_wch": + status: maintained + maintainers: + - nzmichaelh + - kholia + files: + - modules/hal_wch/ + "West project: hal_wurthelektronik": status: maintained maintainers: @@ -4966,6 +5078,7 @@ West: collaborators: - brgl - pdgendt + - uLipe files: - modules/lvgl/ - tests/lib/gui/lvgl/ @@ -4990,6 +5103,7 @@ West: - ceolin collaborators: - ithinuel + - wearyzen - valeriosetti - tomi-font files: @@ -5057,6 +5171,20 @@ West: labels: - "area: native port" +"West project: nrf_wifi": + status: maintained + maintainers: + - krish2718 + - sachinthegreen + collaborators: + - udaynordic + - rajb9 + - srkanordic + files: + - modules/nrf_wifi/ + labels: + - "area: Wi-Fi" + "West project: open-amp": status: odd fixes collaborators: @@ -5164,6 +5292,7 @@ West: collaborators: - Vge0rge - ithinuel + - wearyzen - valeriosetti - tomi-font files: @@ -5183,6 +5312,7 @@ West: collaborators: - Vge0rge - ithinuel + - wearyzen files: [] labels: - "area: TF-M" @@ -5195,6 +5325,7 @@ West: collaborators: - carlocaione - ithinuel + - wearyzen files: - modules/trusted-firmware-a/ labels: @@ -5207,6 +5338,7 @@ West: collaborators: - Vge0rge - ithinuel + - wearyzen files: [] labels: - "area: TF-M" diff --git a/arch/Kconfig b/arch/Kconfig index 27dbbc0b10cf76e..94e9a540a08e235 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -50,7 +50,6 @@ config ARM64 select ARCH_HAS_THREAD_LOCAL_STORAGE select USE_SWITCH select USE_SWITCH_SUPPORTED - select IRQ_OFFLOAD_NESTED if IRQ_OFFLOAD select BARRIER_OPERATIONS_ARCH select ARCH_HAS_DIRECTED_IPIS select ARCH_HAS_DEMAND_PAGING @@ -95,7 +94,6 @@ config X86 select ARCH_HAS_THREAD_LOCAL_STORAGE select ARCH_HAS_DEMAND_PAGING if !X86_64 select ARCH_HAS_DEMAND_MAPPING if ARCH_HAS_DEMAND_PAGING - select IRQ_OFFLOAD_NESTED if IRQ_OFFLOAD select NEED_LIBC_MEM_PARTITION if USERSPACE && TIMING_FUNCTIONS \ && !BOARD_HAS_TIMING_FUNCTIONS \ && !SOC_HAS_TIMING_FUNCTIONS @@ -123,7 +121,6 @@ config RISCV select ARCH_SUPPORTS_EMPTY_IRQ_SPURIOUS select ARCH_HAS_CODE_DATA_RELOCATION select ARCH_HAS_THREAD_LOCAL_STORAGE - select IRQ_OFFLOAD_NESTED if IRQ_OFFLOAD select USE_SWITCH_SUPPORTED select USE_SWITCH select SCHED_IPI_SUPPORTED if SMP @@ -138,7 +135,6 @@ config XTENSA select ARCH_IS_SET select USE_SWITCH select USE_SWITCH_SUPPORTED - select IRQ_OFFLOAD_NESTED if IRQ_OFFLOAD select ARCH_HAS_CODE_DATA_RELOCATION select ARCH_HAS_TIMING_FUNCTIONS select ARCH_MEM_DOMAIN_DATA if USERSPACE @@ -453,9 +449,8 @@ config ISR_TABLES_LOCAL_DECLARATION_SUPPORTED depends on "$(ZEPHYR_TOOLCHAIN_VARIANT)" = "zephyr" || "$(ZEPHYR_TOOLCHAIN_VARIANT)" = "gnuarmemb" config ISR_TABLES_LOCAL_DECLARATION - bool "ISR tables created locally and placed by linker [EXPERIMENTAL]" + bool "ISR tables created locally and placed by linker" depends on ISR_TABLES_LOCAL_DECLARATION_SUPPORTED - select EXPERIMENTAL help Enable new scheme of interrupt tables generation. This is totally different generator that would create tables entries locally @@ -581,11 +576,12 @@ config IRQ_OFFLOAD config IRQ_OFFLOAD_NESTED bool "irq_offload() supports nested IRQs" depends on IRQ_OFFLOAD + default y if ARM64 || X86 || RISCV || XTENSA help - When set by the arch layer, indicates that irq_offload() may - legally be called in interrupt context to cause a - synchronous nested interrupt on the current CPU. Not all - hardware is capable. + When set by the platform layers, indicates that + irq_offload() may legally be called in interrupt context to + cause a synchronous nested interrupt on the current CPU. + Not all hardware is capable. config EXCEPTION_DEBUG bool "Unhandled exception debugging" diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index c28cf8d29f9a464..3ce78334cb62d17 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -155,12 +155,12 @@ config CPU_HAS_ARM_MPU This option is enabled when the CPU has a Memory Protection Unit (MPU) in ARM flavor. -config CPU_HAS_NXP_MPU +config CPU_HAS_NXP_SYSMPU bool select CPU_HAS_MPU help - This option is enabled when the CPU has a Memory Protection Unit (MPU) - in NXP flavor. + This option is enabled when the CPU has an NXP System Memory Protection + Unit (SYSMPU). config CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS bool "Custom fixed SoC MPU region definition" diff --git a/arch/arm/core/cortex_a_r/CMakeLists.txt b/arch/arm/core/cortex_a_r/CMakeLists.txt index d4e18a614f0ab09..7d18e0e610d86de 100644 --- a/arch/arm/core/cortex_a_r/CMakeLists.txt +++ b/arch/arm/core/cortex_a_r/CMakeLists.txt @@ -24,4 +24,4 @@ zephyr_library_sources_ifdef(CONFIG_SEMIHOST semihost.c) zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE __aeabi_read_tp.S) zephyr_library_sources_ifdef(CONFIG_ARCH_CACHE cache.c) zephyr_library_sources_ifdef(CONFIG_USE_SWITCH switch.S) -zephyr_library_sources_ifndef(CONFIG_USE_SWITCH swap.c swap_helper.S exc_exit.S) +zephyr_library_sources_ifndef(CONFIG_USE_SWITCH swap_helper.S exc_exit.S) diff --git a/arch/arm/core/cortex_a_r/Kconfig b/arch/arm/core/cortex_a_r/Kconfig index 2ee3c945644d060..409968ca6c7cf5c 100644 --- a/arch/arm/core/cortex_a_r/Kconfig +++ b/arch/arm/core/cortex_a_r/Kconfig @@ -111,6 +111,32 @@ config CPU_CORTEX_R52 help This option signifies the use of a Cortex-R52 CPU +config CPU_CORTEX_R52_CACHE_SEGREGATION + bool "Control segregation of L1 I/D-Cache ways between Flash and AXIM" + depends on CPU_CORTEX_R52 + help + Control segregation of L1 I/D-Cache ways between Flash and AXIM. + Updates to the cache segregation controls are only permitted before the caches + have ever been enabled, following a system reset, otherwise the update is ignored. + +config CPU_CORTEX_R52_ICACHE_FLASH_WAY + int "L1 I-Cache Flash way" + depends on CPU_CORTEX_R52_CACHE_SEGREGATION + range 0 4 + default 0 + help + Configure L1 I-Cache ways for Flash interface. Default is reset value, all + I-Cache ways are allocated for AXIM interface. + +config CPU_CORTEX_R52_DCACHE_FLASH_WAY + int "L1 D-Cache Flash way" + depends on CPU_CORTEX_R52_CACHE_SEGREGATION + range 0 4 + default 0 + help + Configure L1 D-Cache ways for Flash interface. Default is reset value, + all D-Cache ways are allocated for AXIM interface. + if CPU_AARCH32_CORTEX_R config ARMV7_R diff --git a/arch/arm/core/cortex_a_r/reset.S b/arch/arm/core/cortex_a_r/reset.S index 591973e24e4b52a..b5b899194e008f0 100644 --- a/arch/arm/core/cortex_a_r/reset.S +++ b/arch/arm/core/cortex_a_r/reset.S @@ -56,9 +56,12 @@ SECTION_SUBSEC_FUNC(TEXT, _reset_section, __start) cmp r0, #MODE_HYP bne EL1_Reset_Handler - /* Init HSCTLR see Armv8-R AArch32 architecture profile */ - ldr r0, =(HSCTLR_RES1 | SCTLR_I_BIT | SCTLR_C_BIT) - mcr p15, 4, r0, c1, c0, 0 + /* + * The HSCTLR register provides top-level control of system operation in Hyp mode. + * Since the OS is not running in Hyp mode, and considering the Armv8-R AArch32 + * architecture profile, there's no need to modify HSCTLR configuration unless + * Fast Interrupts need to be enabled. + */ /* Init HACTLR: Enable EL1 access to all IMP DEF registers */ ldr r0, =HACTLR_INIT @@ -200,6 +203,12 @@ EL1_Reset_Handler: #endif /* CONFIG_DCLS */ +#if defined(CONFIG_CPU_CORTEX_R52_CACHE_SEGREGATION) + ldr r0, =IMP_CSCTLR(CONFIG_CPU_CORTEX_R52_ICACHE_FLASH_WAY, + CONFIG_CPU_CORTEX_R52_DCACHE_FLASH_WAY) + mcr p15, 1, r0, c9, c1, 0 +#endif + ldr r0, =arm_cpu_boot_params #if CONFIG_MP_MAX_NUM_CPUS > 1 diff --git a/arch/arm/core/cortex_a_r/swap.c b/arch/arm/core/cortex_a_r/swap.c deleted file mode 100644 index cf123e8ed932a89..000000000000000 --- a/arch/arm/core/cortex_a_r/swap.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright (c) 2018 Linaro, Limited - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include - -#include - -/* The 'key' actually represents the BASEPRI register - * prior to disabling interrupts via the BASEPRI mechanism. - * - * arch_swap() itself does not do much. - */ -int arch_swap(unsigned int key) -{ - /* store off key and return value */ - arch_current_thread()->arch.basepri = key; - arch_current_thread()->arch.swap_return_value = -EAGAIN; - - z_arm_cortex_r_svc(); - irq_unlock(key); - - /* Context switch is performed here. Returning implies the - * thread has been context-switched-in again. - */ - return arch_current_thread()->arch.swap_return_value; -} diff --git a/arch/arm/core/cortex_m/CMakeLists.txt b/arch/arm/core/cortex_m/CMakeLists.txt index b220e6c81e8499b..05723811929abde 100644 --- a/arch/arm/core/cortex_m/CMakeLists.txt +++ b/arch/arm/core/cortex_m/CMakeLists.txt @@ -11,7 +11,6 @@ zephyr_library_sources( scb.c thread_abort.c vector_table.S - swap.c swap_helper.S irq_manage.c prep_c.c diff --git a/arch/arm/core/cortex_m/fault.c b/arch/arm/core/cortex_m/fault.c index 604801a6414d9ea..56d5be60f4cc067 100644 --- a/arch/arm/core/cortex_m/fault.c +++ b/arch/arm/core/cortex_m/fault.c @@ -35,7 +35,7 @@ LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL); #define PR_FAULT_INFO(...) #endif -#if defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_MPU) +#if defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_SYSMPU) #define EMN(edr) (((edr) & SYSMPU_EDR_EMN_MASK) >> SYSMPU_EDR_EMN_SHIFT) #define EACD(edr) (((edr) & SYSMPU_EDR_EACD_MASK) >> SYSMPU_EDR_EACD_SHIFT) #endif @@ -392,7 +392,7 @@ static int bus_fault(struct arch_esf *esf, int from_hard_fault, bool *recoverabl } #endif /* !defined(CONFIG_ARMV7_M_ARMV8_M_FP) */ -#if defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_MPU) +#if defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_SYSMPU) uint32_t sperr = SYSMPU->CESR & SYSMPU_CESR_SPERR_MASK; uint32_t mask = BIT(31); int i; @@ -427,7 +427,7 @@ static int bus_fault(struct arch_esf *esf, int from_hard_fault, bool *recoverabl /* Note: we can assume the fault originated * from the same security state for ARM * platforms implementing the NXP MPU - * (CONFIG_CPU_HAS_NXP_MPU=y). + * (CONFIG_CPU_HAS_NXP_SYSMPU=y). * * As we only assess thread stack corruption, * we only process the error further, if the @@ -483,7 +483,7 @@ static int bus_fault(struct arch_esf *esf, int from_hard_fault, bool *recoverabl } SYSMPU->CESR &= ~sperr; } -#endif /* defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_MPU) */ +#endif /* defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_SYSMPU) */ /* clear BFSR sticky bits */ SCB->CFSR |= SCB_CFSR_BUSFAULTSR_Msk; diff --git a/arch/arm/core/cortex_m/pm_s2ram.S b/arch/arm/core/cortex_m/pm_s2ram.S index 1a4da5ce784f89d..d15bfea0432191d 100644 --- a/arch/arm/core/cortex_m/pm_s2ram.S +++ b/arch/arm/core/cortex_m/pm_s2ram.S @@ -193,6 +193,9 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_suspend) * not successful (in r0 the return value). */ + /* Move return value of system_off to callee-saved register. */ + mov r4, r0 + /* * Reset the marking of suspend to RAM, return is ignored. */ @@ -200,7 +203,9 @@ SECTION_FUNC(TEXT, arch_pm_s2ram_suspend) bl pm_s2ram_mark_check_and_clear mov lr, r1 - /* Move system_off back to r0 as return value */ + /* Move the stored return value of system_off back to r0, + * setting it as return value for this function. + */ mov r0, r4 POP_GPRS diff --git a/arch/arm/core/cortex_m/prep_c.c b/arch/arm/core/cortex_m/prep_c.c index 10f78c44a25ba87..ae59960584ce224 100644 --- a/arch/arm/core/cortex_m/prep_c.c +++ b/arch/arm/core/cortex_m/prep_c.c @@ -45,9 +45,16 @@ void *_vector_table_pointer; #define VECTOR_ADDRESS ((uintptr_t)_vector_start) +/* In some Cortex-M3 implementations SCB_VTOR bit[29] is called the TBLBASE bit */ +#ifdef SCB_VTOR_TBLBASE_Msk +#define VTOR_MASK (SCB_VTOR_TBLBASE_Msk | SCB_VTOR_TBLOFF_Msk) +#else +#define VTOR_MASK SCB_VTOR_TBLOFF_Msk +#endif + static inline void relocate_vector_table(void) { - SCB->VTOR = VECTOR_ADDRESS & SCB_VTOR_TBLOFF_Msk; + SCB->VTOR = VECTOR_ADDRESS & VTOR_MASK; barrier_dsync_fence_full(); barrier_isync_fence_full(); } diff --git a/arch/arm/core/cortex_m/scb.c b/arch/arm/core/cortex_m/scb.c index e3c35073ea310f2..a511a8de9b1be82 100644 --- a/arch/arm/core/cortex_m/scb.c +++ b/arch/arm/core/cortex_m/scb.c @@ -23,7 +23,7 @@ #include #include -#if defined(CONFIG_CPU_HAS_NXP_MPU) +#if defined(CONFIG_CPU_HAS_NXP_SYSMPU) #include #endif @@ -62,7 +62,7 @@ void z_arm_clear_arm_mpu_config(void) ARM_MPU_ClrRegion(i); } } -#elif CONFIG_CPU_HAS_NXP_MPU +#elif CONFIG_CPU_HAS_NXP_SYSMPU void z_arm_clear_arm_mpu_config(void) { int i; @@ -76,7 +76,7 @@ void z_arm_clear_arm_mpu_config(void) SYSMPU_RegionEnable(SYSMPU, i, false); } } -#endif /* CONFIG_CPU_HAS_NXP_MPU */ +#endif /* CONFIG_CPU_HAS_NXP_SYSMPU */ #endif /* CONFIG_ARM_MPU */ #if defined(CONFIG_INIT_ARCH_HW_AT_BOOT) diff --git a/arch/arm/core/cortex_m/swap.c b/arch/arm/core/cortex_m/swap.c deleted file mode 100644 index 72eade765596f7c..000000000000000 --- a/arch/arm/core/cortex_m/swap.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - * Copyright (c) 2018 Linaro, Limited - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include - -#include - -/* The 'key' actually represents the BASEPRI register - * prior to disabling interrupts via the BASEPRI mechanism. - * - * arch_swap() itself does not do much. - * - * It simply stores the intlock key (the BASEPRI value) parameter into - * current->basepri, and then triggers a PendSV exception, which does - * the heavy lifting of context switching. - - * This is the only place we have to save BASEPRI since the other paths to - * z_arm_pendsv all come from handling an interrupt, which means we know the - * interrupts were not locked: in that case the BASEPRI value is 0. - * - * Given that arch_swap() is called to effect a cooperative context switch, - * only the caller-saved integer registers need to be saved in the thread of the - * outgoing thread. This is all performed by the hardware, which stores it in - * its exception stack frame, created when handling the z_arm_pendsv exception. - * - * On ARMv6-M, the intlock key is represented by the PRIMASK register, - * as BASEPRI is not available. - */ -int arch_swap(unsigned int key) -{ - /* store off key and return value */ - arch_current_thread()->arch.basepri = key; - arch_current_thread()->arch.swap_return_value = -EAGAIN; - - /* set pending bit to make sure we will take a PendSV exception */ - SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk; - - /* clear mask or enable all irqs to take a pendsv */ - irq_unlock(0); - - /* Context switch is performed here. Returning implies the - * thread has been context-switched-in again. - */ - return arch_current_thread()->arch.swap_return_value; -} diff --git a/arch/arm/core/cortex_m/thread.c b/arch/arm/core/cortex_m/thread.c index 4013b636811572b..1f8d945c3eb41c9 100644 --- a/arch/arm/core/cortex_m/thread.c +++ b/arch/arm/core/cortex_m/thread.c @@ -576,14 +576,14 @@ void arch_switch_to_main_thread(struct k_thread *main_thread, char *stack_ptr, "mov r4, %0\n" /* force _main to be stored in a register */ "msr PSP, %1\n" /* __set_PSP(stack_ptr) */ - "mov r0, #0\n" /* arch_irq_unlock(0) */ + "movs r0, #0\n" /* arch_irq_unlock(0) */ "ldr r3, =arch_irq_unlock_outlined\n" "blx r3\n" "mov r0, r4\n" /* z_thread_entry(_main, NULL, NULL, NULL) */ - "mov r1, #0\n" - "mov r2, #0\n" - "mov r3, #0\n" + "movs r1, #0\n" + "movs r2, #0\n" + "movs r3, #0\n" "ldr r4, =z_thread_entry\n" "bx r4\n" /* We don’t intend to return, so there is no need to link. */ : diff --git a/arch/arm/core/mpu/CMakeLists.txt b/arch/arm/core/mpu/CMakeLists.txt index 1df6561ee528d46..69f23e5be88d212 100644 --- a/arch/arm/core/mpu/CMakeLists.txt +++ b/arch/arm/core/mpu/CMakeLists.txt @@ -4,11 +4,11 @@ zephyr_library() zephyr_library_sources( arm_core_mpu.c) zephyr_library_sources_ifdef(CONFIG_CPU_HAS_ARM_MPU arm_mpu.c) -zephyr_library_sources_ifdef(CONFIG_CPU_HAS_NXP_MPU nxp_mpu.c) +zephyr_library_sources_ifdef(CONFIG_CPU_HAS_NXP_SYSMPU nxp_mpu.c) if(CONFIG_CPU_CORTEX_M AND NOT CONFIG_CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS) zephyr_library_sources_ifdef(CONFIG_CPU_HAS_ARM_MPU arm_mpu_regions.c) - zephyr_library_sources_ifdef(CONFIG_CPU_HAS_NXP_MPU nxp_mpu_regions.c) + zephyr_library_sources_ifdef(CONFIG_CPU_HAS_NXP_SYSMPU nxp_mpu_regions.c) endif() if (CONFIG_CPU_AARCH32_CORTEX_R) diff --git a/arch/arm/core/mpu/Kconfig b/arch/arm/core/mpu/Kconfig index c6d1bdc7da05ad6..0c1fbbf4c0f4f83 100644 --- a/arch/arm/core/mpu/Kconfig +++ b/arch/arm/core/mpu/Kconfig @@ -11,7 +11,7 @@ config ARM_MPU select SRAM_REGION_PERMISSIONS select THREAD_STACK_INFO select ARCH_HAS_EXECUTABLE_PAGE_BIT - select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if !(CPU_HAS_NXP_MPU || ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R) + select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if !(CPU_HAS_NXP_SYSMPU || ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R) select MPU_REQUIRES_NON_OVERLAPPING_REGIONS if CPU_HAS_ARM_MPU && (ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R) select MPU_GAP_FILLING if AARCH32_ARMV8_R select ARCH_MEM_DOMAIN_SUPPORTS_ISOLATED_STACKS diff --git a/arch/arm/core/mpu/arm_core_mpu_dev.h b/arch/arm/core/mpu/arm_core_mpu_dev.h index 254d6d9dda341aa..4e8fa648ad3410c 100644 --- a/arch/arm/core/mpu/arm_core_mpu_dev.h +++ b/arch/arm/core/mpu/arm_core_mpu_dev.h @@ -76,7 +76,7 @@ struct k_thread; */ #if (defined(CONFIG_MPU_REQUIRES_NON_OVERLAPPING_REGIONS) && \ defined(CONFIG_MPU_GAP_FILLING)) \ - || defined(CONFIG_CPU_HAS_NXP_MPU) + || defined(CONFIG_CPU_HAS_NXP_SYSMPU) /* * When dynamic regions may not be defined on top of statically * allocated memory regions, defining a region for a supervisor @@ -96,7 +96,7 @@ struct k_thread; * using a single MPU region. */ #define ARM_CORE_MPU_NUM_MPU_REGIONS_FOR_MPU_STACK_GUARD 1 -#endif /* CONFIG_MPU_REQUIRES_NON_OVERLAPPING_REGIONS || CPU_HAS_NXP_MPU */ +#endif /* CONFIG_MPU_REQUIRES_NON_OVERLAPPING_REGIONS || CPU_HAS_NXP_SYSMPU */ #endif /* CONFIG_USERSPACE */ diff --git a/arch/arm/core/mpu/arm_mpu_regions.c b/arch/arm/core/mpu/arm_mpu_regions.c index 6af62f840782fe5..0bf7a219c27d7b6 100644 --- a/arch/arm/core/mpu/arm_mpu_regions.c +++ b/arch/arm/core/mpu/arm_mpu_regions.c @@ -10,6 +10,7 @@ #include static const struct arm_mpu_region mpu_regions[] = { +#ifdef CONFIG_XIP /* Region 0 */ MPU_REGION_ENTRY("FLASH_0", CONFIG_FLASH_BASE_ADDRESS, @@ -19,6 +20,8 @@ static const struct arm_mpu_region mpu_regions[] = { #else REGION_FLASH_ATTR(REGION_FLASH_SIZE)), #endif +#endif + /* Region 1 */ MPU_REGION_ENTRY("SRAM_0", CONFIG_SRAM_BASE_ADDRESS, diff --git a/arch/arm/include/cortex_a_r/kernel_arch_func.h b/arch/arm/include/cortex_a_r/kernel_arch_func.h index ecd467f3c91eb39..9ac2b2a1d90867f 100644 --- a/arch/arm/include/cortex_a_r/kernel_arch_func.h +++ b/arch/arm/include/cortex_a_r/kernel_arch_func.h @@ -37,6 +37,21 @@ static ALWAYS_INLINE void arch_kernel_init(void) #ifndef CONFIG_USE_SWITCH +static ALWAYS_INLINE int arch_swap(unsigned int key) +{ + /* store off key and return value */ + arch_current_thread()->arch.basepri = key; + arch_current_thread()->arch.swap_return_value = -EAGAIN; + + z_arm_cortex_r_svc(); + irq_unlock(key); + + /* Context switch is performed here. Returning implies the + * thread has been context-switched-in again. + */ + return arch_current_thread()->arch.swap_return_value; +} + static ALWAYS_INLINE void arch_thread_return_value_set(struct k_thread *thread, unsigned int value) { diff --git a/arch/arm/include/cortex_m/kernel_arch_func.h b/arch/arm/include/cortex_m/kernel_arch_func.h index bb79e3941066de9..9183eb691b14bc1 100644 --- a/arch/arm/include/cortex_m/kernel_arch_func.h +++ b/arch/arm/include/cortex_m/kernel_arch_func.h @@ -84,6 +84,25 @@ extern FUNC_NORETURN void z_arm_userspace_enter(k_thread_entry_t user_entry, extern void z_arm_fatal_error(unsigned int reason, const struct arch_esf *esf); +static ALWAYS_INLINE int arch_swap(unsigned int key) +{ + /* store off key and return value */ + arch_current_thread()->arch.basepri = key; + arch_current_thread()->arch.swap_return_value = -EAGAIN; + + /* set pending bit to make sure we will take a PendSV exception */ + SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk; + + /* clear mask or enable all irqs to take a pendsv */ + irq_unlock(0); + + /* Context switch is performed here. Returning implies the + * thread has been context-switched-in again. + */ + return arch_current_thread()->arch.swap_return_value; +} + + #endif /* _ASMLANGUAGE */ #ifdef __cplusplus diff --git a/arch/arm64/core/xen/enlighten.c b/arch/arm64/core/xen/enlighten.c index 91bf014b76212e6..164947a09ffdccb 100644 --- a/arch/arm64/core/xen/enlighten.c +++ b/arch/arm64/core/xen/enlighten.c @@ -42,7 +42,7 @@ static int xen_map_shared_info(const shared_info_t *shared_page) return HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp); } -int xen_enlighten_init(void) +static int xen_enlighten_init(void) { int ret = 0; shared_info_t *info = (shared_info_t *) shared_info_buf; @@ -66,3 +66,5 @@ int xen_enlighten_init(void) return 0; } + +SYS_INIT(xen_enlighten_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE); diff --git a/arch/arm64/include/kernel_arch_func.h b/arch/arm64/include/kernel_arch_func.h index c37ea6257a50da0..f9a2ffb982116a5 100644 --- a/arch/arm64/include/kernel_arch_func.h +++ b/arch/arm64/include/kernel_arch_func.h @@ -30,13 +30,8 @@ extern "C" { #ifndef _ASMLANGUAGE -extern void xen_enlighten_init(void); - static ALWAYS_INLINE void arch_kernel_init(void) { -#ifdef CONFIG_XEN - xen_enlighten_init(); -#endif #ifdef CONFIG_SOC_PER_CORE_INIT_HOOK soc_per_core_init_hook(); diff --git a/arch/mips/include/kernel_arch_func.h b/arch/mips/include/kernel_arch_func.h index 7c35d1bf864a3cf..63ed7a65cf26504 100644 --- a/arch/mips/include/kernel_arch_func.h +++ b/arch/mips/include/kernel_arch_func.h @@ -47,6 +47,8 @@ static inline bool arch_is_in_isr(void) return _current_cpu->nested != 0U; } +int arch_swap(unsigned int key); + #ifdef CONFIG_IRQ_OFFLOAD void z_irq_do_offload(void); #endif diff --git a/arch/nios2/include/kernel_arch_func.h b/arch/nios2/include/kernel_arch_func.h index 464ba32a7a7388b..c325ea49b49b965 100644 --- a/arch/nios2/include/kernel_arch_func.h +++ b/arch/nios2/include/kernel_arch_func.h @@ -51,6 +51,8 @@ static inline bool arch_is_in_isr(void) return _kernel.cpus[0].nested != 0U; } +int arch_swap(unsigned int key); + #ifdef CONFIG_IRQ_OFFLOAD void z_irq_do_offload(void); #endif diff --git a/arch/posix/core/thread.c b/arch/posix/core/thread.c index 4965f08f6aac90c..0a3f2eccd74b331 100644 --- a/arch/posix/core/thread.c +++ b/arch/posix/core/thread.c @@ -96,6 +96,25 @@ void posix_arch_thread_entry(void *pa_thread_status) z_thread_entry(ptr->entry_point, ptr->arg1, ptr->arg2, ptr->arg3); } +#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING) +int arch_float_disable(struct k_thread *thread) +{ + ARG_UNUSED(thread); + + /* Posix always has FPU enabled so cannot be disabled */ + return -ENOTSUP; +} + +int arch_float_enable(struct k_thread *thread, unsigned int options) +{ + ARG_UNUSED(thread); + ARG_UNUSED(options); + + /* Posix always has FPU enabled so nothing to do here */ + return 0; +} +#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */ + #if defined(CONFIG_ARCH_HAS_THREAD_ABORT) void z_impl_k_thread_abort(k_tid_t thread) { diff --git a/arch/posix/include/kernel_arch_func.h b/arch/posix/include/kernel_arch_func.h index 98289d5d7c68ad7..ceba8a8509340af 100644 --- a/arch/posix/include/kernel_arch_func.h +++ b/arch/posix/include/kernel_arch_func.h @@ -42,6 +42,8 @@ static inline bool arch_is_in_isr(void) return _kernel.cpus[0].nested != 0U; } +int arch_swap(unsigned int key); + #endif /* _ASMLANGUAGE */ #endif /* ZEPHYR_ARCH_POSIX_INCLUDE_KERNEL_ARCH_FUNC_H_ */ diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 399fc8a2ecf94d4..5e3049433a9c4db 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -16,9 +16,13 @@ config FLOAT_HARD help This option enables the hard-float calling convention. +choice RISCV_GP_PURPOSE + prompt "Purpose of the global pointer (GP) register" + default RISCV_GP if RISCV_SOC_HAS_GP_RELATIVE_ADDRESSING + config RISCV_GP bool "RISC-V global pointer relative addressing" - default n + depends on RISCV_SOC_HAS_GP_RELATIVE_ADDRESSING help Use global pointer relative addressing for small globals declared anywhere in the executable. It can benefit performance and reduce @@ -30,7 +34,6 @@ config RISCV_GP config RISCV_CURRENT_VIA_GP bool "Store current thread into the global pointer (GP) register" - depends on !RISCV_GP && !USERSPACE depends on MP_MAX_NUM_CPUS > 1 select ARCH_HAS_CUSTOM_CURRENT_IMPL help @@ -38,6 +41,8 @@ config RISCV_CURRENT_VIA_GP When is enabled, calls to `arch_current_thread()` & `k_sched_current_thread_query()` will be reduced to a single register read. +endchoice # RISCV_GP_PURPOSE + config RISCV_ALWAYS_SWITCH_THROUGH_ECALL bool "Do not use mret outside a trap handler context" depends on MULTITHREADING @@ -148,6 +153,12 @@ config RISCV_SOC_HAS_CUSTOM_SYS_IO the RISC-V SoC needs to do something different and more than reading and writing the registers. +config RISCV_SOC_HAS_GP_RELATIVE_ADDRESSING + bool + help + Selected when SoC has implemented the initialization of global pointer (GP) + at program start, or earlier than any instruction using GP relative addressing. + config RISCV_SOC_CONTEXT_SAVE bool "SOC-based context saving in IRQ handlers" select RISCV_SOC_OFFSETS diff --git a/arch/riscv/core/ipi_clint.c b/arch/riscv/core/ipi_clint.c index ee9c6f2d554f751..e5f12566653373b 100644 --- a/arch/riscv/core/ipi_clint.c +++ b/arch/riscv/core/ipi_clint.c @@ -9,7 +9,11 @@ #include -#define MSIP_BASE 0x2000000UL +#define CLINT_NODE DT_NODELABEL(clint) +#if !DT_NODE_EXISTS(CLINT_NODE) +#error "Label 'clint' is not defined in the devicetree." +#endif +#define MSIP_BASE DT_REG_ADDR_RAW(CLINT_NODE) #define MSIP(hartid) ((volatile uint32_t *)MSIP_BASE)[hartid] static atomic_val_t cpu_pending_ipi[CONFIG_MP_MAX_NUM_CPUS]; diff --git a/arch/riscv/core/isr.S b/arch/riscv/core/isr.S index ae8f63357a54463..193f48208716cff 100644 --- a/arch/riscv/core/isr.S +++ b/arch/riscv/core/isr.S @@ -169,7 +169,9 @@ SECTION_FUNC(exception.entry, _isr_wrapper) .option norelax la gp, __global_pointer$ .option pop -#endif /* CONFIG_RISCV_GP */ +#elif defined(CONFIG_RISCV_CURRENT_VIA_GP) + lr gp, ___cpu_t_current_OFFSET(s0) +#endif /* CONFIG_RISCV_GP / CONFIG_RISCV_CURRENT_VIA_GP */ /* Clear our per-thread usermode flag */ lui t0, %tprel_hi(is_user_mode) diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index a3746f147f93653..1a17bf1eddd5a1a 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig @@ -26,6 +26,12 @@ config NUM_IRQS int default 32 +config SPARC_SVT + bool "Single-vector trapping" + help + Use Single-vector trapping (SVT). Defined by SPARC-V8 Embedded (V8E) + Architecture Specification and available in some LEON processors. + config SPARC_CASA bool "CASA instructions" help diff --git a/arch/sparc/core/CMakeLists.txt b/arch/sparc/core/CMakeLists.txt index 82ff7906638fd2e..cc458404ed8cf87 100644 --- a/arch/sparc/core/CMakeLists.txt +++ b/arch/sparc/core/CMakeLists.txt @@ -13,8 +13,9 @@ zephyr_library_sources( thread.c window_trap.S sw_trap_set_pil.S - trap_table_mvt.S ) +zephyr_library_sources_ifdef(CONFIG_SPARC_SVT trap_table_svt.S) +zephyr_library_sources_ifndef(CONFIG_SPARC_SVT trap_table_mvt.S) zephyr_library_sources_ifdef(CONFIG_IRQ_OFFLOAD irq_offload.c) zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE tls.c) diff --git a/arch/sparc/core/reset_trap.S b/arch/sparc/core/reset_trap.S index dd4046c47bcdd46..6f1f6c037e3c1d7 100644 --- a/arch/sparc/core/reset_trap.S +++ b/arch/sparc/core/reset_trap.S @@ -12,6 +12,18 @@ GTEXT(__sparc_trap_reset) SECTION_FUNC(TEXT, __sparc_trap_reset) +#ifdef CONFIG_SPARC_SVT +#ifdef CONFIG_SOC_SPARC_LEON + /* On LEON, enable single vector trapping by setting ASR17.SV. */ + rd %asr17, %g1 + set (1<<13), %g2 + or %g1, %g2, %g1 + wr %g1, %asr17 +#else +#error "Don't know how to enable SVT on this SOC" +#endif +#endif + set __sparc_trap_table, %g1 wr %g1, %tbr wr 2, %wim diff --git a/arch/sparc/core/trap_table_svt.S b/arch/sparc/core/trap_table_svt.S new file mode 100644 index 000000000000000..461cc5a51df6870 --- /dev/null +++ b/arch/sparc/core/trap_table_svt.S @@ -0,0 +1,138 @@ +/* + * Copyright (c) 2023 Frontgrade Gaisler AB + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* + * This file contains the trap entry for SPARC operating with + * single-vector trap model, defined in SPARC V8E. The processor + * redirects execution to a single entry on any trap event. From + * there, two levels of look-up tables are used to find the trap + * handler. + * + * - Execution time is constant. + * - Condition flags are not modified. + * - Provides handler with PSR in l0, TBR in l6 + * - This SVT implementation is less than 400 bytes long. (An MVT + * table is always 4096 bytes long.) + * + * See trap_table_mvt.S for information about SPARC trap types. + */ + +#include +#include +#include + +#ifdef CONFIG_IRQ_OFFLOAD + #define IRQ_OFFLOAD_HANDLER __sparc_trap_irq_offload +#else + #define IRQ_OFFLOAD_HANDLER __sparc_trap_fault +#endif + +GTEXT(__sparc_trap_table) +GTEXT(__start) + +SECTION_SUBSEC_FUNC(TEXT, traptable, __sparc_trap_table) +__start: + rd %psr, %l0 + mov %tbr, %l6 + + and %l6, 0xf00, %l7 + srl %l7, 6, %l7 + set __sparc_trap_table_svt_level0, %l4 + ld [%l4 + %l7], %l4 + + and %l6, 0x0f0, %l7 + srl %l7, 2, %l7 + ld [%l4 + %l7], %l4 + + srl %l6, 4, %l3 + jmp %l4 + and %l3, 0xf, %l3 /* Interrupt level */ + +__sparc_trap_svt_in_trap: + ta 0x00 + nop + +SECTION_VAR(RODATA, __sparc_trap_table_svt_tables) + .align 4 +__sparc_trap_table_svt_level0: + .word __sparc_trap_table_svt_00 + .word __sparc_trap_table_svt_10 + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_80 + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + .word __sparc_trap_table_svt_allbad + +__sparc_trap_table_svt_00: + .word __sparc_trap_reset + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_window_overflow + .word __sparc_trap_window_underflow +__sparc_trap_table_svt_allbad: + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + +__sparc_trap_table_svt_10: + .word __sparc_trap_fault + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + .word __sparc_trap_interrupt + +__sparc_trap_table_svt_80: + .word __sparc_trap_svt_in_trap + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_flush_windows + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_sw_set_pil + .word __sparc_trap_fault + .word __sparc_trap_fault + .word __sparc_trap_fault + .word IRQ_OFFLOAD_HANDLER + .word __sparc_trap_fault + .word __sparc_trap_except_reason diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 52ef70a0d13d014..46f32f927281fa3 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -417,15 +417,6 @@ config X86_DISABLE_SSBD Even if enabled, will have no effect on CPUs that do not require this feature. -config DISABLE_SSBD - bool "Disable Speculative Store Bypass [DEPRECATED]" - depends on USERSPACE - default y if !X86_NO_SPECTRE_V4 - select X86_DISABLE_SSBD - select DEPRECATED - help - Deprecated. Use CONFIG_X86_DISABLE_SSBD instead. - config X86_ENABLE_EXTENDED_IBRS bool "Extended IBRS" depends on USERSPACE @@ -435,15 +426,6 @@ config X86_ENABLE_EXTENDED_IBRS Speculation 'always on' feature. This mitigates Indirect Branch Control vulnerabilities (aka Spectre V2). -config ENABLE_EXTENDED_IBRS - bool "Extended IBRS [DEPRECATED]" - depends on USERSPACE - default y if !X86_NO_SPECTRE_V2 - select X86_ENABLE_EXTENDED_IBRS - select DEPRECATED - help - Deprecated. Use CONFIG_X86_ENABLE_EXTENDED_IBRS instead. - config X86_BOUNDS_CHECK_BYPASS_MITIGATION bool depends on USERSPACE diff --git a/arch/x86/include/ia32/kernel_arch_func.h b/arch/x86/include/ia32/kernel_arch_func.h index 878281c7ba8961d..686bc18989b7ff5 100644 --- a/arch/x86/include/ia32/kernel_arch_func.h +++ b/arch/x86/include/ia32/kernel_arch_func.h @@ -37,6 +37,8 @@ arch_thread_return_value_set(struct k_thread *thread, unsigned int value) extern void arch_cpu_atomic_idle(unsigned int key); +int arch_swap(unsigned int key); + /* ASM code to fiddle with registers to enable the MMU with PAE paging */ void z_x86_enable_paging(void); diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index 8722c879e8b2302..b69d8bcf02b2b85 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -283,7 +283,7 @@ config XTENSA_SYSCALL_USE_HELPER default y if "$(ZEPHYR_TOOLCHAIN_VARIANT)" = "xt-clang" depends on (XTENSA_MMU || XTENSA_MPU) && USERSPACE help - Use syscall helpers for passing more then 3 arguments. + Use syscall helpers for passing more than 3 arguments. This is a workaround for toolchains where they have issue modeling register usage. diff --git a/arch/xtensa/core/elf.c b/arch/xtensa/core/elf.c index 0ce9885eed66c26..17337f4a7bc6f10 100644 --- a/arch/xtensa/core/elf.c +++ b/arch/xtensa/core/elf.c @@ -33,15 +33,31 @@ LOG_MODULE_DECLARE(llext, CONFIG_LLEXT_LOG_LEVEL); #define R_XTENSA_SLOT0_OP 20 static void xtensa_elf_relocate(struct llext_loader *ldr, struct llext *ext, - const elf_rela_t *rel, uint8_t *text, uintptr_t addr, + const elf_rela_t *rel, uintptr_t addr, uint8_t *loc, int type, uint32_t stb) { elf_word *got_entry = (elf_word *)loc; switch (type) { case R_XTENSA_RELATIVE: + ; /* Relocate a local symbol: Xtensa specific. Seems to only be used with PIC */ - *got_entry += (uintptr_t)text - addr; + unsigned int sh_ndx; + + for (sh_ndx = 0; sh_ndx < ext->sect_cnt; sh_ndx++) { + if (ext->sect_hdrs[sh_ndx].sh_addr <= *got_entry && + *got_entry < + ext->sect_hdrs[sh_ndx].sh_addr + ext->sect_hdrs[sh_ndx].sh_size) + break; + } + + if (sh_ndx == ext->sect_cnt) { + LOG_ERR("%#x not found in any of the sections", *got_entry); + return; + } + + *got_entry += (uintptr_t)llext_loaded_sect_ptr(ldr, ext, sh_ndx) - + ext->sect_hdrs[sh_ndx].sh_addr; break; case R_XTENSA_GLOB_DAT: case R_XTENSA_JMP_SLOT: @@ -113,42 +129,39 @@ static void xtensa_elf_relocate(struct llext_loader *ldr, struct llext *ext, * @brief Architecture specific function for STB_LOCAL ELF relocations */ void arch_elf_relocate_local(struct llext_loader *ldr, struct llext *ext, const elf_rela_t *rel, - const elf_sym_t *sym, size_t got_offset, + const elf_sym_t *sym, uint8_t *rel_addr, const struct llext_load_param *ldr_parm) { - uint8_t *text = ext->mem[LLEXT_MEM_TEXT]; - uint8_t *loc = text + got_offset; int type = ELF32_R_TYPE(rel->r_info); uintptr_t sh_addr; if (ELF_ST_TYPE(sym->st_info) == STT_SECTION) { - elf_shdr_t *shdr = llext_peek(ldr, ldr->hdr.e_shoff + - sym->st_shndx * ldr->hdr.e_shentsize); + elf_shdr_t *shdr = ext->sect_hdrs + sym->st_shndx; + + /* shdr->sh_addr is NULL when not built for a specific address */ sh_addr = shdr->sh_addr && (!ldr_parm->section_detached || !ldr_parm->section_detached(shdr)) ? - shdr->sh_addr : (uintptr_t)llext_peek(ldr, shdr->sh_offset); + shdr->sh_addr : (uintptr_t)llext_loaded_sect_ptr(ldr, ext, sym->st_shndx); } else { sh_addr = ldr->sects[LLEXT_MEM_TEXT].sh_addr; } - xtensa_elf_relocate(ldr, ext, rel, text, sh_addr, loc, type, ELF_ST_BIND(sym->st_info)); + xtensa_elf_relocate(ldr, ext, rel, sh_addr, rel_addr, type, ELF_ST_BIND(sym->st_info)); } /** * @brief Architecture specific function for STB_GLOBAL ELF relocations */ void arch_elf_relocate_global(struct llext_loader *ldr, struct llext *ext, const elf_rela_t *rel, - const elf_sym_t *sym, size_t got_offset, const void *link_addr) + const elf_sym_t *sym, uint8_t *rel_addr, const void *link_addr) { - uint8_t *text = ext->mem[LLEXT_MEM_TEXT]; - elf_word *got_entry = (elf_word *)(text + got_offset); int type = ELF32_R_TYPE(rel->r_info); /* For global relocations we expect the initial value for R_XTENSA_RELATIVE to be zero */ - if (type == R_XTENSA_RELATIVE && *got_entry) { - LOG_WRN("global: non-zero relative value %#x", *got_entry); + if (type == R_XTENSA_RELATIVE && *(elf_word *)rel_addr) { + LOG_WRN("global: non-zero relative value %#x", *(elf_word *)rel_addr); } - xtensa_elf_relocate(ldr, ext, rel, text, (uintptr_t)link_addr, (uint8_t *)got_entry, type, + xtensa_elf_relocate(ldr, ext, rel, (uintptr_t)link_addr, rel_addr, type, ELF_ST_BIND(sym->st_info)); } diff --git a/arch/xtensa/core/syscall_helper.c b/arch/xtensa/core/syscall_helper.c index 24feda91c800b22..f9673e67814c8da 100644 --- a/arch/xtensa/core/syscall_helper.c +++ b/arch/xtensa/core/syscall_helper.c @@ -12,10 +12,10 @@ #include #ifdef CONFIG_XTENSA_SYSCALL_USE_HELPER -uintptr_t xtensa_syscall_helper(uintptr_t arg1, uintptr_t arg2, - uintptr_t arg3, uintptr_t arg4, - uintptr_t arg5, uintptr_t arg6, - uintptr_t call_id) +uintptr_t xtensa_syscall_helper_args_6(uintptr_t arg1, uintptr_t arg2, + uintptr_t arg3, uintptr_t arg4, + uintptr_t arg5, uintptr_t arg6, + uintptr_t call_id) { register uintptr_t a2 __asm__("%a2") = call_id; register uintptr_t a6 __asm__("%a6") = arg1; @@ -33,6 +33,101 @@ uintptr_t xtensa_syscall_helper(uintptr_t arg1, uintptr_t arg2, return a2; } + +uintptr_t xtensa_syscall_helper_args_5(uintptr_t arg1, uintptr_t arg2, + uintptr_t arg3, uintptr_t arg4, + uintptr_t arg5, uintptr_t call_id) +{ + register uintptr_t a2 __asm__("%a2") = call_id; + register uintptr_t a6 __asm__("%a6") = arg1; + register uintptr_t a3 __asm__("%a3") = arg2; + register uintptr_t a4 __asm__("%a4") = arg3; + register uintptr_t a5 __asm__("%a5") = arg4; + register uintptr_t a8 __asm__("%a8") = arg5; + + __asm__ volatile("syscall\n\t" + : "=r" (a2) + : "r" (a2), "r" (a6), "r" (a3), "r" (a4), + "r" (a5), "r" (a8) + : "memory"); + + return a2; +} + +uintptr_t xtensa_syscall_helper_args_4(uintptr_t arg1, uintptr_t arg2, + uintptr_t arg3, uintptr_t arg4, + uintptr_t call_id) +{ + register uintptr_t a2 __asm__("%a2") = call_id; + register uintptr_t a6 __asm__("%a6") = arg1; + register uintptr_t a3 __asm__("%a3") = arg2; + register uintptr_t a4 __asm__("%a4") = arg3; + register uintptr_t a5 __asm__("%a5") = arg4; + + __asm__ volatile("syscall\n\t" + : "=r" (a2) + : "r" (a2), "r" (a6), "r" (a3), "r" (a4), + "r" (a5) + : "memory"); + + return a2; +} + +uintptr_t xtensa_syscall_helper_args_3(uintptr_t arg1, uintptr_t arg2, + uintptr_t arg3, uintptr_t call_id) +{ + register uintptr_t a2 __asm__("%a2") = call_id; + register uintptr_t a6 __asm__("%a6") = arg1; + register uintptr_t a3 __asm__("%a3") = arg2; + register uintptr_t a4 __asm__("%a4") = arg3; + + __asm__ volatile("syscall\n\t" + : "=r" (a2) + : "r" (a2), "r" (a6), "r" (a3), "r" (a4) + : "memory"); + + return a2; +} + +uintptr_t xtensa_syscall_helper_args_2(uintptr_t arg1, uintptr_t arg2, + uintptr_t call_id) +{ + register uintptr_t a2 __asm__("%a2") = call_id; + register uintptr_t a6 __asm__("%a6") = arg1; + register uintptr_t a3 __asm__("%a3") = arg2; + + __asm__ volatile("syscall\n\t" + : "=r" (a2) + : "r" (a2), "r" (a6), "r" (a3) + : "memory"); + + return a2; +} + +uintptr_t xtensa_syscall_helper_args_1(uintptr_t arg1, uintptr_t call_id) +{ + register uintptr_t a2 __asm__("%a2") = call_id; + register uintptr_t a6 __asm__("%a6") = arg1; + + __asm__ volatile("syscall\n\t" + : "=r" (a2) + : "r" (a2), "r" (a6) + : "memory"); + + return a2; +} + +uintptr_t xtensa_syscall_helper_args_0(uintptr_t call_id) +{ + register uintptr_t a2 __asm__("%a2") = call_id; + + __asm__ volatile("syscall\n\t" + : "=r" (a2) + : "r" (a2) + : "memory"); + + return a2; +} #endif /* CONFIG_XTENSA_SYSCALL_USE_HELPER */ #if XCHAL_HAVE_THREADPTR == 0 diff --git a/boards/01space/esp32c3_042_oled/Kconfig.esp32c3_042_oled b/boards/01space/esp32c3_042_oled/Kconfig.esp32c3_042_oled index 8b0fbf42eabe73d..ca56668cfeec2db 100644 --- a/boards/01space/esp32c3_042_oled/Kconfig.esp32c3_042_oled +++ b/boards/01space/esp32c3_042_oled/Kconfig.esp32c3_042_oled @@ -2,4 +2,4 @@ # SPDX-License-Identifier: Apache-2.0 config BOARD_ESP32C3_042_OLED - select SOC_ESP32C3_FX4 + select SOC_ESP32C3_FH4 diff --git a/boards/01space/esp32c3_042_oled/esp32c3_042_oled.dts b/boards/01space/esp32c3_042_oled/esp32c3_042_oled.dts index 219b6f1f9986262..70f83f398e75685 100644 --- a/boards/01space/esp32c3_042_oled/esp32c3_042_oled.dts +++ b/boards/01space/esp32c3_042_oled/esp32c3_042_oled.dts @@ -15,7 +15,7 @@ model = "01space ESP32C3 0.42 OLED"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &usb_serial; zephyr,shell-uart = &usb_serial; zephyr,flash = &flash0; diff --git a/boards/01space/esp32c3_042_oled/esp32c3_042_oled.yaml b/boards/01space/esp32c3_042_oled/esp32c3_042_oled.yaml index 4f9e9c93778fb2f..579094df4439018 100644 --- a/boards/01space/esp32c3_042_oled/esp32c3_042_oled.yaml +++ b/boards/01space/esp32c3_042_oled/esp32c3_042_oled.yaml @@ -11,8 +11,4 @@ supported: - spi - uart - watchdog -testing: - ignore_tags: - - net - - bluetooth vendor: 01space diff --git a/boards/96boards/aerocore2/96b_aerocore2.dts b/boards/96boards/aerocore2/96b_aerocore2.dts index dd5f8d8a89592f8..028887cef16a128 100644 --- a/boards/96boards/aerocore2/96b_aerocore2.dts +++ b/boards/96boards/aerocore2/96b_aerocore2.dts @@ -179,7 +179,7 @@ zephyr_udc0: &usbotg_fs { pinctrl-0 = <&adc1_in10_pc0 &adc1_in11_pc1 &adc1_in12_pc2 &adc1_in13_pc3>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <2>; status = "okay"; }; diff --git a/boards/96boards/argonkey/96b_argonkey.dts b/boards/96boards/argonkey/96b_argonkey.dts index a7c02dcb8816a16..e19b022c26af7fb 100644 --- a/boards/96boards/argonkey/96b_argonkey.dts +++ b/boards/96boards/argonkey/96b_argonkey.dts @@ -71,7 +71,9 @@ div-m = <8>; mul-n = <192>; div-r = <3>; - status = "okay"; + div-q = <4>; + clocks = <&clk_hse>; + status = "okay"; /* 48MHz on PLLI2SQ */ }; &rcc { diff --git a/boards/96boards/carbon/Kconfig.defconfig b/boards/96boards/carbon/Kconfig.defconfig index 3fe660ff6d35bd1..a680c5e19f8df11 100644 --- a/boards/96boards/carbon/Kconfig.defconfig +++ b/boards/96boards/carbon/Kconfig.defconfig @@ -13,7 +13,4 @@ endif # BOARD_96B_CARBON_STM32F401XE if BOARD_96B_CARBON_NRF51822 -config BT_CTLR - default BT - endif # BOARD_96B_CARBON_NRF51822 diff --git a/boards/96boards/nitrogen/Kconfig.defconfig b/boards/96boards/nitrogen/Kconfig.defconfig index c1686a82539c819..19571eb4ef45bc3 100644 --- a/boards/96boards/nitrogen/Kconfig.defconfig +++ b/boards/96boards/nitrogen/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_96B_NITROGEN -config BT_CTLR - default BT - endif # BOARD_96B_NITROGEN diff --git a/boards/96boards/stm32_sensor_mez/96b_stm32_sensor_mez.dts b/boards/96boards/stm32_sensor_mez/96b_stm32_sensor_mez.dts index 80281ae098d3ce1..f20a91c6acaf5ba 100644 --- a/boards/96boards/stm32_sensor_mez/96b_stm32_sensor_mez.dts +++ b/boards/96boards/stm32_sensor_mez/96b_stm32_sensor_mez.dts @@ -75,7 +75,9 @@ div-m = <8>; mul-n = <192>; div-r = <3>; - status = "okay"; + div-q = <4>; + clocks = <&clk_hse>; + status = "okay"; /* 48MHz on PLLI2SQ */ }; &rcc { diff --git a/boards/Kconfig b/boards/Kconfig index 8f186b32caf4fca..40e8e5006e129f6 100644 --- a/boards/Kconfig +++ b/boards/Kconfig @@ -128,6 +128,20 @@ config QEMU_EXTRA_FLAGS to setup devices, for example to allocate interface for Zephyr GDBstub over serial with `-serial tcp:127.0.0.1:5678,server` +config BOARD_REQUIRES_SERIAL_BACKEND_CDC_ACM + bool + help + Indicates that a board has no other capabilities than to use the CDC + ACM UART as a backend for logging or shell. + +config BOARD_SERIAL_BACKEND_CDC_ACM + bool "Board uses USB CDC ACM UART as serial backend" + depends on BOARD_REQUIRES_SERIAL_BACKEND_CDC_ACM + default y + help + USB stack and CDC ACM UART are configured and initialized at boot + time to be used as a backend for logging or shell. + # There might not be any board options, hence the optional source osource "$(KCONFIG_BOARD_DIR)/Kconfig" endmenu diff --git a/boards/aconno/acn52832/Kconfig.defconfig b/boards/aconno/acn52832/Kconfig.defconfig index 10c5ce95ed8a839..57fd066809c9363 100644 --- a/boards/aconno/acn52832/Kconfig.defconfig +++ b/boards/aconno/acn52832/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_ACN52832 -config BT_CTLR - default BT - endif # BOARD_ACN52832 diff --git a/boards/acrn/acrn/acrn_defconfig b/boards/acrn/acrn/acrn_defconfig index 0ec5c2b256459f7..9a3ce5de7c71137 100644 --- a/boards/acrn/acrn/acrn_defconfig +++ b/boards/acrn/acrn/acrn_defconfig @@ -13,4 +13,3 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000 CONFIG_BUILD_OUTPUT_BIN=y CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN=n CONFIG_KERNEL_VM_SIZE=0x1000000 -CONFIG_BUILD_NO_GAP_FILL=y diff --git a/boards/acrn/acrn/acrn_ehl_crb_defconfig b/boards/acrn/acrn/acrn_ehl_crb_defconfig index f7b256d2c8482a4..9f81e9975a4e2a0 100644 --- a/boards/acrn/acrn/acrn_ehl_crb_defconfig +++ b/boards/acrn/acrn/acrn_ehl_crb_defconfig @@ -13,7 +13,6 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=1900000000 CONFIG_BUILD_OUTPUT_BIN=y CONFIG_SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN=n CONFIG_KERNEL_VM_SIZE=0x1000000 -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_APIC_TSC_DEADLINE_TIMER=y CONFIG_APIC_TIMER_IRQ_PRIORITY=1 CONFIG_SMP=y diff --git a/boards/adafruit/feather_m4_express/adafruit_feather_m4_express-pinctrl.dtsi b/boards/adafruit/feather_m4_express/adafruit_feather_m4_express-pinctrl.dtsi index 34ddd2b858cbf64..a96cf644f402531 100644 --- a/boards/adafruit/feather_m4_express/adafruit_feather_m4_express-pinctrl.dtsi +++ b/boards/adafruit/feather_m4_express/adafruit_feather_m4_express-pinctrl.dtsi @@ -35,10 +35,10 @@ pinmux = ; }; }; - pwm1_default: pwm1_default { + + tc0_default: tc0_default { group1 { - pinmux = , - ; + pinmux = ; }; }; diff --git a/boards/adafruit/feather_m4_express/adafruit_feather_m4_express.dts b/boards/adafruit/feather_m4_express/adafruit_feather_m4_express.dts index 374123bae71b051..a77a3d2b7ae9db7 100644 --- a/boards/adafruit/feather_m4_express/adafruit_feather_m4_express.dts +++ b/boards/adafruit/feather_m4_express/adafruit_feather_m4_express.dts @@ -25,6 +25,7 @@ aliases { led0 = &led0; pwm-0 = &tcc0; + pwm-1 = &tc0; }; leds { @@ -70,6 +71,17 @@ pinctrl-names = "default"; }; +&tc0 { + status = "okay"; + compatible = "atmel,sam0-tc-pwm"; + prescaler = <1024>; + #pwm-cells = <2>; + channels = <2>; + counter-size = <16>; + pinctrl-0 = <&tc0_default>; + pinctrl-names = "default"; +}; + zephyr_udc0: &usb0 { status = "okay"; pinctrl-0 = <&usb_dc_default>; diff --git a/boards/adafruit/feather_m4_express/support/openocd.cfg b/boards/adafruit/feather_m4_express/support/openocd.cfg index e17a3034afe678d..9990cf9036ad19d 100644 --- a/boards/adafruit/feather_m4_express/support/openocd.cfg +++ b/boards/adafruit/feather_m4_express/support/openocd.cfg @@ -7,7 +7,7 @@ source [find target/atsame5x.cfg] # TODO(http://openocd.zylin.com/#/c/5706/): lower the clock speed to workaround # an erase timeout. -adapter_khz 500 +adapter speed 500 reset_config srst_only $_TARGETNAME configure -event gdb-attach { diff --git a/boards/adafruit/feather_nrf52840/Kconfig.defconfig b/boards/adafruit/feather_nrf52840/Kconfig.defconfig index 5e42fcfb8aa4cb4..f6351510d2f3cc8 100644 --- a/boards/adafruit/feather_nrf52840/Kconfig.defconfig +++ b/boards/adafruit/feather_nrf52840/Kconfig.defconfig @@ -6,7 +6,10 @@ if BOARD_ADAFRUIT_FEATHER_NRF52840 -config BT_CTLR - default BT +if BOARD_ADAFRUIT_FEATHER_NRF52840_NRF52840_UF2 || BOARD_ADAFRUIT_FEATHER_NRF52840_NRF52840_SENSE_UF2 + +source "boards/common/usb/Kconfig.cdc_acm_serial.defconfig" + +endif endif # BOARD_ADAFRUIT_FEATHER_NRF52840 diff --git a/boards/adafruit/feather_nrf52840/adafruit_feather_nrf52840_nrf52840_sense_uf2.dts b/boards/adafruit/feather_nrf52840/adafruit_feather_nrf52840_nrf52840_sense_uf2.dts index 719577abc0d447f..faafb8381feb4ec 100644 --- a/boards/adafruit/feather_nrf52840/adafruit_feather_nrf52840_nrf52840_sense_uf2.dts +++ b/boards/adafruit/feather_nrf52840/adafruit_feather_nrf52840_nrf52840_sense_uf2.dts @@ -8,19 +8,12 @@ /dts-v1/; #include "adafruit_feather_nrf52840_common.dtsi" #include +#include <../boards/common/usb/cdc_acm_serial.dtsi> / { model = "Adafruit Feather nRF52840 Sense"; compatible = "adafruit,feather-nrf52840-sense-uf2"; - chosen { - zephyr,console = &cdc_acm_uart0; - zephyr,shell-uart = &cdc_acm_uart0; - zephyr,uart-mcumgr = &cdc_acm_uart0; - zephyr,bt-mon-uart = &cdc_acm_uart0; - zephyr,bt-c2h-uart = &cdc_acm_uart0; - }; - leds { led0: led_0 { gpios = <&gpio1 9 0>; @@ -34,9 +27,3 @@ reg = <0x44>; }; }; - -zephyr_udc0: &usbd { - cdc_acm_uart0: cdc_acm_uart0 { - compatible = "zephyr,cdc-acm-uart"; - }; -}; diff --git a/boards/adafruit/feather_nrf52840/adafruit_feather_nrf52840_nrf52840_sense_uf2_defconfig b/boards/adafruit/feather_nrf52840/adafruit_feather_nrf52840_nrf52840_sense_uf2_defconfig index 18c22c337d08d10..42f7298af555a96 100644 --- a/boards/adafruit/feather_nrf52840/adafruit_feather_nrf52840_nrf52840_sense_uf2_defconfig +++ b/boards/adafruit/feather_nrf52840/adafruit_feather_nrf52840_nrf52840_sense_uf2_defconfig @@ -17,11 +17,5 @@ CONFIG_UART_CONSOLE=y CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y CONFIG_CLOCK_CONTROL_NRF_K32SRC_500PPM=y -# Logger cannot use itself to log -CONFIG_USB_CDC_ACM_LOG_LEVEL_OFF=y - -# Enable USB -CONFIG_USB_DEVICE_STACK=y - # Build UF2 by default, supported by the Adafruit nRF52 Bootloader CONFIG_BUILD_OUTPUT_UF2=y diff --git a/boards/adafruit/feather_nrf52840/adafruit_feather_nrf52840_nrf52840_uf2.dts b/boards/adafruit/feather_nrf52840/adafruit_feather_nrf52840_nrf52840_uf2.dts index bc4f67a99319090..f4c30d6aec0903f 100644 --- a/boards/adafruit/feather_nrf52840/adafruit_feather_nrf52840_nrf52840_uf2.dts +++ b/boards/adafruit/feather_nrf52840/adafruit_feather_nrf52840_nrf52840_uf2.dts @@ -7,28 +7,15 @@ /dts-v1/; #include "adafruit_feather_nrf52840_common.dtsi" #include +#include <../boards/common/usb/cdc_acm_serial.dtsi> / { model = "Adafruit Feather nRF52840 Express"; compatible = "adafruit,feather-nrf52840-uf2"; - chosen { - zephyr,console = &cdc_acm_uart0; - zephyr,shell-uart = &cdc_acm_uart0; - zephyr,uart-mcumgr = &cdc_acm_uart0; - zephyr,bt-mon-uart = &cdc_acm_uart0; - zephyr,bt-c2h-uart = &cdc_acm_uart0; - }; - leds { led0: led_0 { gpios = <&gpio1 15 0>; }; }; }; - -zephyr_udc0: &usbd { - cdc_acm_uart0: cdc_acm_uart0 { - compatible = "zephyr,cdc-acm-uart"; - }; -}; diff --git a/boards/adafruit/feather_nrf52840/adafruit_feather_nrf52840_nrf52840_uf2_defconfig b/boards/adafruit/feather_nrf52840/adafruit_feather_nrf52840_nrf52840_uf2_defconfig index f6ec20976464845..a40094157e3ff7a 100644 --- a/boards/adafruit/feather_nrf52840/adafruit_feather_nrf52840_nrf52840_uf2_defconfig +++ b/boards/adafruit/feather_nrf52840/adafruit_feather_nrf52840_nrf52840_uf2_defconfig @@ -13,11 +13,5 @@ CONFIG_SERIAL=y CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y -# Logger cannot use itself to log -CONFIG_USB_CDC_ACM_LOG_LEVEL_OFF=y - -# Enable USB -CONFIG_USB_DEVICE_STACK=y - # Build UF2 by default, supported by the Adafruit nRF52 Bootloader CONFIG_BUILD_OUTPUT_UF2=y diff --git a/boards/adafruit/itsybitsy/Kconfig b/boards/adafruit/itsybitsy/Kconfig deleted file mode 100644 index 8aa3368ffd68e33..000000000000000 --- a/boards/adafruit/itsybitsy/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -# Adafruit ItsyBitsy nRF52840 Express board configuration - -# Copyright (c) 2022 Embla Flatlandsmo -# SPDX-License-Identifier: Apache-2.0 - -config BOARD_SERIAL_BACKEND_CDC_ACM - bool "USB CDC" - default y - depends on BOARD_ADAFRUIT_ITSYBITSY diff --git a/boards/adafruit/itsybitsy/Kconfig.defconfig b/boards/adafruit/itsybitsy/Kconfig.defconfig index b637497e148694b..02cbfc35fe2cb65 100644 --- a/boards/adafruit/itsybitsy/Kconfig.defconfig +++ b/boards/adafruit/itsybitsy/Kconfig.defconfig @@ -5,49 +5,6 @@ if BOARD_ADAFRUIT_ITSYBITSY -config BT_CTLR - default BT - -if BOARD_SERIAL_BACKEND_CDC_ACM - -config USB_DEVICE_STACK - default y - -config USB_CDC_ACM - default SERIAL - -config UART_CONSOLE - default CONSOLE - -config USB_DEVICE_INITIALIZE_AT_BOOT - default y if CONSOLE - -config SHELL_BACKEND_SERIAL_CHECK_DTR - default SHELL - depends on UART_LINE_CTRL - -config UART_LINE_CTRL - default SHELL - -config USB_DEVICE_REMOTE_WAKEUP - default n - -if LOG - -# Logger cannot use itself to log -config USB_CDC_ACM_LOG_LEVEL - default 0 - -# Set USB log level to error only -config USB_DEVICE_LOG_LEVEL - default 1 - -# Wait 1500ms at startup for logging -config LOG_PROCESS_THREAD_STARTUP_DELAY_MS - default 1500 - -endif # LOG - -endif # BOARD_SERIAL_BACKEND_CDC_ACM +source "boards/common/usb/Kconfig.cdc_acm_serial.defconfig" endif # BOARD_ADAFRUIT_ITSYBITSY diff --git a/boards/adafruit/itsybitsy/adafruit_itsybitsy_nrf52840.dts b/boards/adafruit/itsybitsy/adafruit_itsybitsy_nrf52840.dts index ee74d8869400710..a4ff029e93b9659 100644 --- a/boards/adafruit/itsybitsy/adafruit_itsybitsy_nrf52840.dts +++ b/boards/adafruit/itsybitsy/adafruit_itsybitsy_nrf52840.dts @@ -16,11 +16,6 @@ compatible = "adafruit,itsybitsy-nrf52840"; chosen { - zephyr,console = &cdc_acm_uart0; - zephyr,shell-uart = &cdc_acm_uart0; - zephyr,uart-mcumgr = &cdc_acm_uart0; - zephyr,bt-mon-uart = &cdc_acm_uart0; - zephyr,bt-c2h-uart = &cdc_acm_uart0; zephyr,ieee802154 = &ieee802154; }; @@ -155,8 +150,6 @@ zephyr_udc0: &usbd { compatible = "nordic,nrf-usbd"; status = "okay"; - - cdc_acm_uart0: cdc_acm_uart0 { - compatible = "zephyr,cdc-acm-uart"; - }; }; + +#include <../boards/common/usb/cdc_acm_serial.dtsi> diff --git a/boards/adafruit/kb2040/adafruit_kb2040-pinctrl.dtsi b/boards/adafruit/kb2040/adafruit_kb2040-pinctrl.dtsi index cf1289acedc34c7..79681bb8ad3467c 100644 --- a/boards/adafruit/kb2040/adafruit_kb2040-pinctrl.dtsi +++ b/boards/adafruit/kb2040/adafruit_kb2040-pinctrl.dtsi @@ -48,9 +48,6 @@ }; }; - clocks_default: clocks_default { - }; - ws2812_pio0_default: ws2812_pio0_default { ws2812 { pinmux = ; diff --git a/boards/adafruit/kb2040/adafruit_kb2040.dts b/boards/adafruit/kb2040/adafruit_kb2040.dts index 45ff45595d29c8b..d7de09cddac74bb 100644 --- a/boards/adafruit/kb2040/adafruit_kb2040.dts +++ b/boards/adafruit/kb2040/adafruit_kb2040.dts @@ -7,7 +7,7 @@ /dts-v1/; -#include +#include #include "adafruit_kb2040-pinctrl.dtsi" #include "sparkfun_pro_micro_connector.dtsi" #include @@ -56,11 +56,6 @@ }; }; -&clocks { - pinctrl-0 = <&clocks_default>; - pinctrl-names = "default"; -}; - &uart0 { current-speed = <115200>; status = "okay"; @@ -127,3 +122,7 @@ zephyr_udc0: &usbd { regulator-always-on; regulator-allowed-modes = ; }; + +&xosc { + startup-delay-multiplier = <64>; +}; diff --git a/boards/adafruit/nrf52_adafruit_feather/Kconfig.defconfig b/boards/adafruit/nrf52_adafruit_feather/Kconfig.defconfig index 48cb9d7332dac10..b1259e409150725 100644 --- a/boards/adafruit/nrf52_adafruit_feather/Kconfig.defconfig +++ b/boards/adafruit/nrf52_adafruit_feather/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_NRF52_ADAFRUIT_FEATHER -config BT_CTLR - default BT - endif # BOARD_NRF52_ADAFRUIT_FEATHER diff --git a/boards/adafruit/qt_py_esp32s3/Kconfig b/boards/adafruit/qt_py_esp32s3/Kconfig new file mode 100644 index 000000000000000..eff63767823922c --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/Kconfig @@ -0,0 +1,6 @@ +# Copyright (c) 2024 Ian Wakely + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 4096 if BOARD_ADAFRUIT_QT_PY_ESP32S3_ESP32S3_PROCPU + default 256 if BOARD_ADAFRUIT_QT_PY_ESP32S3_ESP32S3_APPCPU diff --git a/boards/adafruit/qt_py_esp32s3/Kconfig.adafruit_qt_py_esp32s3 b/boards/adafruit/qt_py_esp32s3/Kconfig.adafruit_qt_py_esp32s3 new file mode 100644 index 000000000000000..9d5e991b572c558 --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/Kconfig.adafruit_qt_py_esp32s3 @@ -0,0 +1,9 @@ +# Adafruit ESP32S3 board configuration + +# Copyright (c) 2024 Ian Wakely + +config BOARD_ADAFRUIT_QT_PY_ESP32S3 + select SOC_ESP32S3_WROOM_N8 if "$(BOARD_REVISION)" = "" + select SOC_ESP32S3_WROOM_N4R2 if "$(BOARD_REVISION)" = "psram" + select SOC_ESP32S3_PROCPU if BOARD_ADAFRUIT_QT_PY_ESP32S3_ESP32S3_PROCPU + select SOC_ESP32S3_APPCPU if BOARD_ADAFRUIT_QT_PY_ESP32S3_ESP32S3_APPCPU diff --git a/boards/adafruit/qt_py_esp32s3/Kconfig.sysbuild b/boards/adafruit/qt_py_esp32s3/Kconfig.sysbuild new file mode 100644 index 000000000000000..3a2d17ac5cfd067 --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3-pinctrl.dtsi b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3-pinctrl.dtsi new file mode 100644 index 000000000000000..8c59416d21bfbff --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3-pinctrl.dtsi @@ -0,0 +1,67 @@ +/* + * Copyright 2022 Google LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + spim2_default: spim2_default { + group1 { + pinmux = , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + spim3_ws2812_led: spim3_ws2812_led { + group1 { + pinmux = ; + output-low; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; + + i2c1_default: i2c1_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; + + twai_default: twai_default { + group1 { + pinmux = , + ; + }; + }; +}; diff --git a/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_appcpu.dts b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_appcpu.dts new file mode 100644 index 000000000000000..876a6d78fc68f28 --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_appcpu.dts @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2024 Ian Wakely + */ + +/dts-v1/; + +#include +#include "adafruit_qt_py_esp32s3-pinctrl.dtsi" +#include + +/ { + model = "Adafruit QT Py ESP32S3 APPCPU"; + compatible = "espressif,esp32s3"; + + chosen { + zephyr,sram = &sram1; + zephyr,ipc_shm = &shm0; + zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; + }; +}; + +&trng0 { + status = "okay"; +}; + +&ipm0 { + status = "okay"; +}; diff --git a/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_appcpu.yaml b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_appcpu.yaml new file mode 100644 index 000000000000000..70b5253574ce637 --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_appcpu.yaml @@ -0,0 +1,27 @@ +identifier: adafruit_qt_py_esp32s3/esp32s3/appcpu +name: Adafruit QT Py ESP32S3 APPCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - uart +testing: + ignore_tags: + - net + - bluetooth + - flash + - cpp + - posix + - watchdog + - logging + - kernel + - pm + - gpio + - crypto + - eeprom + - heap + - cmsis_rtos + - jwt + - zdsp +vendor: adafruit diff --git a/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_appcpu_defconfig b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_appcpu_defconfig new file mode 100644 index 000000000000000..9abf2ff0430aba3 --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_appcpu_defconfig @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_MAIN_STACK_SIZE=2048 +CONFIG_CLOCK_CONTROL=y diff --git a/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_appcpu_psram.overlay b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_appcpu_psram.overlay new file mode 100644 index 000000000000000..ac1ec4af1b19cf8 --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_appcpu_psram.overlay @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2024 Ian Wakely + */ + +/delete-node/ &flash0; + +/ { + model = "Adafruit QT Py ESP32S3 PSRAM APPCPU"; + + soc { + flash: flash-controller@60002000 { + compatible = "espressif,esp32-flash-controller"; + reg = <0x60002000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + /* 4MB flash */ + flash0: flash@0 { + compatible = "soc-nv-flash"; + erase-block-size = <4096>; + write-block-size = <4>; + reg = <0x0 DT_SIZE_M(4)>; + }; + }; + }; +}; + +/* 2MB psram */ +&psram0 { + reg = <0x3c000000 DT_SIZE_M(2)>; + status = "okay"; +}; + +#include diff --git a/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_appcpu_psram.yaml b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_appcpu_psram.yaml new file mode 100644 index 000000000000000..4d3dba70d68cab7 --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_appcpu_psram.yaml @@ -0,0 +1,27 @@ +identifier: adafruit_qt_py_esp32s3@psram/esp32s3/appcpu +name: Adafruit QT Py ESP32S3 PSRAM APPCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - uart +testing: + ignore_tags: + - net + - bluetooth + - flash + - cpp + - posix + - watchdog + - logging + - kernel + - pm + - gpio + - crypto + - eeprom + - heap + - cmsis_rtos + - jwt + - zdsp +vendor: adafruit diff --git a/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_procpu.dts b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_procpu.dts new file mode 100644 index 000000000000000..ac757645e5b575f --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_procpu.dts @@ -0,0 +1,149 @@ +/* + * Copyright (c) 2023 Seeed Studio inc. + * Copyright (c) 2024 Ian Wakely + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include +#include +#include "adafruit_qt_py_esp32s3-pinctrl.dtsi" +#include "seeed_xiao_connector.dtsi" +#include + +/ { + model = "Adafruit QT Py ESP32S3 PROCPU"; + compatible = "seeed,xiao-esp32s3"; + + chosen { + zephyr,sram = &sram1; + zephyr,console = &usb_serial; + zephyr,shell-uart = &usb_serial; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,bt-hci = &esp32_bt_hci; + }; + + aliases { + i2c-0 = &i2c0; + watchdog0 = &wdt0; + led-strip = &led_strip; + sw0 = &button0; + }; + + buttons { + compatible = "gpio-keys"; + button0: button_0 { + gpios = <&gpio0 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "User button"; + zephyr,code = ; + }; + }; +}; + +&usb_serial { + status = "okay"; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; +}; + +&i2c1 { + status = "okay"; + clock-frequency = ; + pinctrl-0 = <&i2c1_default>; + pinctrl-names = "default"; +}; + +&trng0 { + status = "okay"; +}; + +&spi2 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim2_default>; + pinctrl-names = "default"; +}; + +&spi3 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim3_ws2812_led>; + pinctrl-names = "default"; + + line-idle-low; + + led_strip: ws2812@0 { + compatible = "worldsemi,ws2812-spi"; + + /* SPI */ + reg = <0>; /* ignored, but necessary for SPI bindings */ + spi-max-frequency = <6400000>; + + /* WS2812 */ + chain-length = <1>; + spi-cpha; + spi-one-frame = <0xf0>; /* 11110000: 625 ns high and 625 ns low */ + spi-zero-frame = <0xc0>; /* 11000000: 312.5 ns high and 937.5 ns low */ + color-mapping = ; + }; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; + + /* + * Unlike some of the other Adafruit boards, the neopixel on this board has + * its positive side hooked up to a GPIO pin rather than a positive voltage + * rail to save on power. This will enable the LED on board initialization. + */ + neopixel-power-enable { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + output-high; + }; +}; + +&wdt0 { + status = "okay"; +}; + +&twai { + pinctrl-0 = <&twai_default>; + pinctrl-names = "default"; +}; + +&timer0 { + status = "okay"; +}; + +&timer1 { + status = "okay"; +}; + +&esp32_bt_hci { + status = "okay"; +}; diff --git a/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_procpu.yaml b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_procpu.yaml new file mode 100644 index 000000000000000..b3d1cd326ebd986 --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_procpu.yaml @@ -0,0 +1,19 @@ +identifier: adafruit_qt_py_esp32s3/esp32s3/procpu +name: Adafruit QT Py ESP32S3 PROCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - gpio + - uart + - i2c + - i2s + - spi + - can + - counter + - watchdog + - entropy + - pwm + - dma +vendor: adafruit diff --git a/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_procpu_defconfig b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_procpu_defconfig new file mode 100644 index 000000000000000..6539bd42e5947ec --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_procpu_defconfig @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_MAIN_STACK_SIZE=2048 +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y +CONFIG_GPIO=y diff --git a/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_procpu_psram.overlay b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_procpu_psram.overlay new file mode 100644 index 000000000000000..5ab0be63c3ffb3d --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_procpu_psram.overlay @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2024 Ian Wakely + */ + +/delete-node/ &flash0; + +/ { + model = "Adafruit QT Py ESP32S3 PSRAM PROCPU"; + + soc { + flash: flash-controller@60002000 { + compatible = "espressif,esp32-flash-controller"; + reg = <0x60002000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + /* 4MB flash */ + flash0: flash@0 { + compatible = "soc-nv-flash"; + erase-block-size = <4096>; + write-block-size = <4>; + reg = <0x0 DT_SIZE_M(4)>; + }; + }; + }; +}; + +/* 2MB psram */ +&psram0 { + reg = <0x3c000000 DT_SIZE_M(2)>; + status = "okay"; +}; + +#include diff --git a/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_procpu_psram.yaml b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_procpu_psram.yaml new file mode 100644 index 000000000000000..37e6a7f15d66fc8 --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/adafruit_qt_py_esp32s3_procpu_psram.yaml @@ -0,0 +1,19 @@ +identifier: adafruit_qt_py_esp32s3@psram/esp32s3/procpu +name: Adafruit QT Py ESP32S3 PSRAM PROCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - gpio + - uart + - i2c + - i2s + - spi + - can + - counter + - watchdog + - entropy + - pwm + - dma +vendor: adafruit diff --git a/boards/adafruit/qt_py_esp32s3/board.cmake b/boards/adafruit/qt_py_esp32s3/board.cmake new file mode 100644 index 000000000000000..2f04d1fe8861ea6 --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/adafruit/qt_py_esp32s3/board.yml b/boards/adafruit/qt_py_esp32s3/board.yml new file mode 100644 index 000000000000000..c9b26924f8c39ff --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/board.yml @@ -0,0 +1,12 @@ +board: + name: adafruit_qt_py_esp32s3 + full_name: QT Py ESP32-S3 + vendor: adafruit + socs: + - name: esp32s3 + revision: + format: "custom" + default: "" + revisions: + - name: "" + - name: "psram" diff --git a/boards/adafruit/qt_py_esp32s3/doc/img/adafruit_qt_py_esp32s3.webp b/boards/adafruit/qt_py_esp32s3/doc/img/adafruit_qt_py_esp32s3.webp new file mode 100644 index 000000000000000..43637d31a6fa450 Binary files /dev/null and b/boards/adafruit/qt_py_esp32s3/doc/img/adafruit_qt_py_esp32s3.webp differ diff --git a/boards/adafruit/qt_py_esp32s3/doc/index.rst b/boards/adafruit/qt_py_esp32s3/doc/index.rst new file mode 100644 index 000000000000000..1c1f6e04eeecae9 --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/doc/index.rst @@ -0,0 +1,291 @@ +.. zephyr:board:: adafruit_qt_py_esp32s3 + +Overview +******** + +An Adafruit based Xiao compatible board based on the ESP32-S3, which is great +for IoT projects and prototyping with new sensors. + +For more details see the `Adafruit QT Py ESP32S3`_ product page. + +Hardware +******** + +This board comes in 2 variants, both based on the ESP32-S3 with WiFi and BLE +support. The default variant supporting 8MB of flash with no PSRAM, while the +``psram`` variant supporting 4MB of flash with 2MB of PSRAM. Both boards have a +USB-C port for programming and debugging and is based on a standard XIAO 14 +pin pinout. + +In addition to the Xiao compatible pinout, it also has a RGB NeoPixel for +status and debugging, a reset button, and a button for entering the ROM +bootloader or user input. Like many other Adafruit boards, it has a +`SparkFun Qwiic`_-compatible `STEMMA QT`_ connector for the I2C bus so you +don't even need to solder. + +ESP32-S3 is a low-power MCU-based system on a chip (SoC) with integrated +2.4 GHz Wi-Fi and Bluetooth® Low Energy (Bluetooth LE). It consists of +high-performance dual-core microprocessor (Xtensa® 32-bit LX7), a low power +coprocessor, a Wi-Fi baseband, a Bluetooth LE baseband, RF module, and +numerous peripherals. + +Supported Features +================== + +Current Zephyr's Adafruit QT Py ESP32-S3 board supports the following features: + ++------------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++============+============+=====================================+ +| UART | on-chip | serial port | ++------------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++------------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++------------+------------+-------------------------------------+ +| USB-JTAG | on-chip | hardware interface | ++------------+------------+-------------------------------------+ +| SPI Master | on-chip | spi | ++------------+------------+-------------------------------------+ +| I2C | on-chip | i2c | ++------------+------------+-------------------------------------+ +| I2S | on-chip | i2s | ++------------+------------+-------------------------------------+ +| TWAI/CAN | on-chip | can | ++------------+------------+-------------------------------------+ +| ADC | on-chip | adc | ++------------+------------+-------------------------------------+ +| Timers | on-chip | counter | ++------------+------------+-------------------------------------+ +| Watchdog | on-chip | watchdog | ++------------+------------+-------------------------------------+ +| TRNG | on-chip | entropy | ++------------+------------+-------------------------------------+ +| LEDC | on-chip | pwm | ++------------+------------+-------------------------------------+ +| MCPWM | on-chip | pwm | ++------------+------------+-------------------------------------+ +| PCNT | on-chip | qdec | ++------------+------------+-------------------------------------+ +| GDMA | on-chip | dma | ++------------+------------+-------------------------------------+ +| Wi-Fi | on-chip | | ++------------+------------+-------------------------------------+ +| Bluetooth | on-chip | | ++------------+------------+-------------------------------------+ + +Prerequisites +------------- + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the +command below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage +bootloader. It is the default option when building the application without +additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the ESP32 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: adafruit_qt_py_esp32s3 + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. tabs:: + + .. group-tab:: QT Py ESP32S3 + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: adafruit_qt_py_esp32s3/esp32s3/procpu + :goals: build + + .. group-tab:: QT Py ESP32S3 with PSRAM + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: adafruit_qt_py_esp32s3@psram/esp32s3/procpu + :goals: build + +The usual ``flash`` target will work with the ``adafruit_qt_py_esp32s3`` board +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. tabs:: + + .. group-tab:: QT Py ESP32S3 + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: adafruit_qt_py_esp32s3/esp32s3/procpu + :goals: flash + + .. group-tab:: QT Py ESP32S3 with PSRAM + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: adafruit_qt_py_esp32s3@psram/esp32s3/procpu + :goals: flash + +Open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! adafruit_qt_py_esp32s3/esp32s3/procpu + +Debugging +********* + +ESP32-S3 support on OpenOCD is available at `OpenOCD ESP32`_. + +ESP32-S3 has a built-in JTAG circuitry and can be debugged without any +additional chip. Only an USB cable connected to the D+/D- pins is necessary. + +Further documentation can be obtained from the SoC vendor +in `JTAG debugging for ESP32-S3`_. + +Here is an example for building the :zephyr:code-sample:`hello_world` application. + +.. tabs:: + + .. group-tab:: QT Py ESP32S3 + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: adafruit_qt_py_esp32s3/esp32s3/procpu + :goals: debug + + .. group-tab:: QT Py ESP32S3 with PSRAM + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: adafruit_qt_py_esp32s3@psram/esp32s3/procpu + :goals: debug + +You can debug an application in the usual way. Here is an example for +the :zephyr:code-sample:`hello_world` application. + +.. tabs:: + + .. group-tab:: QT Py ESP32S3 + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: adafruit_qt_py_esp32s3/esp32s3/procpu + :goals: debug + + .. group-tab:: QT Py ESP32S3 with PSRAM + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: adafruit_qt_py_esp32s3@psram/esp32s3/procpu + :goals: debug + +References +********** + +.. target-notes:: + +.. _`Adafruit QT Py ESP32S3`: https://www.adafruit.com/product/5426 +.. _`Adafruit QT Py ESP32S3 - PSRAM`: https://www.adafruit.com/product/5700 +.. _`JTAG debugging for ESP32-S3`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/api-guides/jtag-debugging/ +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases +.. _`SparkFun Qwiic`: https://www.sparkfun.com/qwiic +.. _`STEMMA QT`: https://learn.adafruit.com/introducing-adafruit-stemma-qt diff --git a/boards/adafruit/qt_py_esp32s3/revision.cmake b/boards/adafruit/qt_py_esp32s3/revision.cmake new file mode 100644 index 000000000000000..26aeb65f775effd --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/revision.cmake @@ -0,0 +1,3 @@ +if(DEFINED BOARD_REVISION AND NOT BOARD_REVISION STREQUAL "psram") + message(FATAL_ERROR "Invalid board revision, ${BOARD_REVISION}, valid revisions are: (for non-PSRAM version), psram") +endif() diff --git a/boards/adafruit/qt_py_esp32s3/seeed_xiao_connector.dtsi b/boards/adafruit/qt_py_esp32s3/seeed_xiao_connector.dtsi new file mode 100644 index 000000000000000..39880f7c942d8a7 --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/seeed_xiao_connector.dtsi @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2024 Ian Wakely + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + xiao_d: connector { + compatible = "seeed,xiao-gpio"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpio0 18 0>, /* D0 */ + <1 0 &gpio0 17 0>, /* D1 */ + <2 0 &gpio0 9 0>, /* D2 */ + <3 0 &gpio0 8 0>, /* D3 */ + <4 0 &gpio0 7 0>, /* D4 */ + <5 0 &gpio0 6 0>, /* D5 */ + <6 0 &gpio0 5 0>, /* D6 */ + <7 0 &gpio0 16 0>, /* D7 */ + <8 0 &gpio1 4 0>, /* D8 */ + <9 0 &gpio1 5 0>, /* D9 */ + <10 0 &gpio1 3 0>; /* D10 */ + }; +}; + +xiao_spi: &spi2 {}; +xiao_i2c: &i2c0 {}; +xiao_serial: &uart0 {}; +xiao_adc: &adc0 {}; diff --git a/boards/adafruit/qt_py_esp32s3/support/openocd.cfg b/boards/adafruit/qt_py_esp32s3/support/openocd.cfg new file mode 100644 index 000000000000000..2f740b4a36ab1f4 --- /dev/null +++ b/boards/adafruit/qt_py_esp32s3/support/openocd.cfg @@ -0,0 +1,7 @@ +set ESP_RTOS none +set ESP32_ONLYCPU 1 + +# Source the JTAG interface configuration file +source [find interface/esp_usb_jtag.cfg] +# Source the ESP32-S3 configuration file +source [find target/esp32s3.cfg] diff --git a/boards/adafruit/qt_py_rp2040/adafruit_qt_py_rp2040-pinctrl.dtsi b/boards/adafruit/qt_py_rp2040/adafruit_qt_py_rp2040-pinctrl.dtsi index d2e84ae41f8637e..561db005e65c55b 100644 --- a/boards/adafruit/qt_py_rp2040/adafruit_qt_py_rp2040-pinctrl.dtsi +++ b/boards/adafruit/qt_py_rp2040/adafruit_qt_py_rp2040-pinctrl.dtsi @@ -59,9 +59,6 @@ }; }; - clocks_default: clocks_default { - }; - ws2812_pio1_default: ws2812_pio1_default { ws2812 { pinmux = ; diff --git a/boards/adafruit/qt_py_rp2040/adafruit_qt_py_rp2040.dts b/boards/adafruit/qt_py_rp2040/adafruit_qt_py_rp2040.dts index 0209c1b86cd291a..3f87e4188b22819 100644 --- a/boards/adafruit/qt_py_rp2040/adafruit_qt_py_rp2040.dts +++ b/boards/adafruit/qt_py_rp2040/adafruit_qt_py_rp2040.dts @@ -7,7 +7,7 @@ /dts-v1/; -#include +#include #include "adafruit_qt_py_rp2040-pinctrl.dtsi" #include "seeed_xiao_connector.dtsi" #include @@ -56,11 +56,6 @@ }; }; -&clocks { - pinctrl-0 = <&clocks_default>; - pinctrl-names = "default"; -}; - &uart1 { current-speed = <115200>; status = "okay"; @@ -157,3 +152,7 @@ zephyr_udc0: &usbd { regulator-always-on; regulator-allowed-modes = ; }; + +&xosc { + startup-delay-multiplier = <64>; +}; diff --git a/boards/ambiq/apollo3_evb/Kconfig.defconfig b/boards/ambiq/apollo3_evb/Kconfig.defconfig index b878e32dc36da47..bd2a5f91addb8f5 100644 --- a/boards/ambiq/apollo3_evb/Kconfig.defconfig +++ b/boards/ambiq/apollo3_evb/Kconfig.defconfig @@ -4,6 +4,9 @@ if BOARD_APOLLO3_EVB +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 32768 if AMBIQ_STIMER_TIMER + config LOG_BACKEND_SWO_FREQ_HZ default 1000000 depends on LOG_BACKEND_SWO diff --git a/boards/ambiq/apollo3_evb/apollo3_evb.dts b/boards/ambiq/apollo3_evb/apollo3_evb.dts index 90d5f3d7176f4f5..30828d729c5c64e 100644 --- a/boards/ambiq/apollo3_evb/apollo3_evb.dts +++ b/boards/ambiq/apollo3_evb/apollo3_evb.dts @@ -2,6 +2,7 @@ #include #include "apollo3_evb-pinctrl.dtsi" +#include / { model = "Ambiq Apollo3 Blue evaluation board"; @@ -13,9 +14,11 @@ zephyr,flash = &flash0; zephyr,console = &uart0; zephyr,shell-uart = &uart0; + zephyr,uart-mcumgr = &uart0; zephyr,uart-pipe = &uart0; zephyr,flash-controller = &flash; zephyr,bt_hci = &bt_hci_apollo; + zephyr,code-partition = &slot0_partition; }; aliases { @@ -25,6 +28,9 @@ led2 = &led2; sw0 = &button0; sw1 = &button1; + bootloader-led0 = &led0; + mcuboot-led0 = &led0; + rtc = &rtc0; }; leds { @@ -56,14 +62,17 @@ button0: button_0 { gpios = <&gpio0_31 16 GPIO_ACTIVE_LOW>; label = "BTN0"; + zephyr,code = ; }; button1: button_1 { gpios = <&gpio0_31 18 GPIO_ACTIVE_LOW>; label = "BTN1"; + zephyr,code = ; }; button2: button_2 { gpios = <&gpio0_31 19 GPIO_ACTIVE_LOW>; label = "BTN2"; + zephyr,code = ; }; }; }; @@ -77,14 +86,36 @@ #address-cells = <1>; #size-cells = <1>; - /* Set 16KB of storage at the end of the 976KB of flash */ - storage_partition: partition@f0000 { + internal_boot_partition: partition@0 { + label = "internal_bootloader"; + reg = <0x00000000 0xc000>; + }; + + boot_partition: partition@c000 { + label = "mcuboot"; + reg = <0x0000c000 0xc000>; + }; + slot0_partition: partition@18000 { + label = "image-0"; + reg = <0x00018000 0x72000>; + }; + slot1_partition: partition@8a000 { + label = "image-1"; + reg = <0x0008a000 0x72000>; + }; + + /* Set 16KB of storage at the end of the 1024KB of flash */ + storage_partition: partition@fc000 { label = "storage"; - reg = <0x000f0000 0x4000>; + reg = <0x000fc000 0x4000>; }; }; }; +&stimer0 { + clk-source = <3>; +}; + &bleif { pinctrl-0 = <&bleif_default>; pinctrl-names = "default"; @@ -159,6 +190,11 @@ status = "okay"; }; +&rtc0 { + status = "okay"; + clock = "XTAL"; +}; + &adc0 { compatible = "ambiq,adc"; pinctrl-0 = <&adc0_default>; diff --git a/boards/ambiq/apollo3p_evb/Kconfig.defconfig b/boards/ambiq/apollo3p_evb/Kconfig.defconfig index 1d3f4f6fe32916d..5e677acf238e4fe 100644 --- a/boards/ambiq/apollo3p_evb/Kconfig.defconfig +++ b/boards/ambiq/apollo3p_evb/Kconfig.defconfig @@ -4,6 +4,9 @@ if BOARD_APOLLO3P_EVB +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 32768 if AMBIQ_STIMER_TIMER + config LOG_BACKEND_SWO_FREQ_HZ default 1000000 depends on LOG_BACKEND_SWO diff --git a/boards/ambiq/apollo3p_evb/apollo3p_evb.dts b/boards/ambiq/apollo3p_evb/apollo3p_evb.dts index 0232c7f87d7b1be..88b3cefbb2f3495 100644 --- a/boards/ambiq/apollo3p_evb/apollo3p_evb.dts +++ b/boards/ambiq/apollo3p_evb/apollo3p_evb.dts @@ -2,6 +2,7 @@ #include #include "apollo3p_evb-pinctrl.dtsi" +#include / { model = "Ambiq Apollo3 Blue Plus evaluation board"; @@ -25,6 +26,7 @@ led2 = &led2; sw0 = &button0; sw1 = &button1; + rtc = &rtc0; }; leds { @@ -56,14 +58,17 @@ button0: button_0 { gpios = <&gpio0_31 16 GPIO_ACTIVE_LOW>; label = "BTN0"; + zephyr,code = ; }; button1: button_1 { gpios = <&gpio0_31 18 GPIO_ACTIVE_LOW>; label = "BTN1"; + zephyr,code = ; }; button2: button_2 { gpios = <&gpio0_31 19 GPIO_ACTIVE_LOW>; label = "BTN2"; + zephyr,code = ; }; }; }; @@ -85,6 +90,10 @@ }; }; +&stimer0 { + clk-source = <3>; +}; + &bleif { pinctrl-0 = <&bleif_default>; pinctrl-names = "default"; @@ -159,6 +168,11 @@ status = "okay"; }; +&rtc0 { + status = "okay"; + clock = "XTAL"; +}; + &adc0 { compatible = "ambiq,adc"; pinctrl-0 = <&adc0_default>; diff --git a/boards/ambiq/apollo4p_blue_kxr_evb/Kconfig.defconfig b/boards/ambiq/apollo4p_blue_kxr_evb/Kconfig.defconfig index d2ff34a02d9bd46..63595ffddbd5727 100644 --- a/boards/ambiq/apollo4p_blue_kxr_evb/Kconfig.defconfig +++ b/boards/ambiq/apollo4p_blue_kxr_evb/Kconfig.defconfig @@ -4,6 +4,9 @@ if BOARD_APOLLO4P_BLUE_KXR_EVB +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 32768 if AMBIQ_STIMER_TIMER + config LOG_BACKEND_SWO_FREQ_HZ default 1000000 depends on LOG_BACKEND_SWO diff --git a/boards/ambiq/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb.dts b/boards/ambiq/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb.dts index 4df01cb5a6d692f..cdcbcee689b594c 100644 --- a/boards/ambiq/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb.dts +++ b/boards/ambiq/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb.dts @@ -26,6 +26,7 @@ led2 = &led2; sw0 = &button0; sw1 = &button1; + rtc = &rtc0; }; leds { @@ -79,6 +80,11 @@ status = "okay"; }; +&rtc0 { + status = "okay"; + clock = "XTAL"; +}; + &wdt0 { status = "okay"; }; @@ -131,6 +137,10 @@ }; }; +&stimer0 { + clk-source = <3>; +}; + &xo32m { pinctrl-0 = <&xo32m_default>; pinctrl-names = "default"; diff --git a/boards/ambiq/apollo4p_evb/Kconfig.defconfig b/boards/ambiq/apollo4p_evb/Kconfig.defconfig index 61533f15f90c566..782fec1cfb6c475 100644 --- a/boards/ambiq/apollo4p_evb/Kconfig.defconfig +++ b/boards/ambiq/apollo4p_evb/Kconfig.defconfig @@ -4,6 +4,9 @@ if BOARD_APOLLO4P_EVB +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 32768 if AMBIQ_STIMER_TIMER + config LOG_BACKEND_SWO_FREQ_HZ default 1000000 depends on LOG_BACKEND_SWO diff --git a/boards/ambiq/apollo4p_evb/apollo4p_evb.dts b/boards/ambiq/apollo4p_evb/apollo4p_evb.dts index 4a35a3de86eb7c1..71ccc5399fdc090 100644 --- a/boards/ambiq/apollo4p_evb/apollo4p_evb.dts +++ b/boards/ambiq/apollo4p_evb/apollo4p_evb.dts @@ -76,7 +76,7 @@ }; &adc0 { -compatible = "ambiq,adc"; + compatible = "ambiq,adc"; pinctrl-0 = <&adc0_default>; pinctrl-names = "default"; status = "okay"; @@ -149,6 +149,10 @@ compatible = "ambiq,adc"; }; }; +&stimer0 { + clk-source = <3>; +}; + zephyr_udc0: &usb { vddusb33-gpios = <&gpio96_127 7 (GPIO_PULL_UP)>; vddusb0p9-gpios = <&gpio96_127 5 (GPIO_PULL_UP)>; diff --git a/boards/arduino/nano_33_ble/Kconfig.defconfig b/boards/arduino/nano_33_ble/Kconfig.defconfig index 73bd7e9c32deb74..f7803f7718a3241 100644 --- a/boards/arduino/nano_33_ble/Kconfig.defconfig +++ b/boards/arduino/nano_33_ble/Kconfig.defconfig @@ -3,9 +3,6 @@ if BOARD_ARDUINO_NANO_33_BLE -config BT_CTLR - default BT - config REGULATOR default y if SENSOR diff --git a/boards/arduino/nicla_sense_me/Kconfig.defconfig b/boards/arduino/nicla_sense_me/Kconfig.defconfig index b1e6a59d7d3d5cd..ff2238ca60197ce 100644 --- a/boards/arduino/nicla_sense_me/Kconfig.defconfig +++ b/boards/arduino/nicla_sense_me/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_ARDUINO_NICLA_SENSE_ME -config BT_CTLR - default BT - endif # BOARD_ARDUINO_NICLA_SENSE_ME diff --git a/boards/arduino/opta/Kconfig.defconfig b/boards/arduino/opta/Kconfig.defconfig index 1a89b70db5c08ac..6199be7debe885d 100644 --- a/boards/arduino/opta/Kconfig.defconfig +++ b/boards/arduino/opta/Kconfig.defconfig @@ -11,34 +11,10 @@ config NET_L2_ETHERNET endif # NETWORKING -if USB_DEVICE_STACK +if BOARD_ARDUINO_OPTA_STM32H747XX_M7 -config USB_DEVICE_PRODUCT - default "Arduino Opta" +source "boards/common/usb/Kconfig.cdc_acm_serial.defconfig" -config USB_DEVICE_PID - default 0x0164 - -config USB_DEVICE_VID - default 0x35d1 - -config USB_DEVICE_INITIALIZE_AT_BOOT - default y - -if LOG - -# Logger cannot use itself to log -choice USB_CDC_ACM_LOG_LEVEL_CHOICE - default USB_CDC_ACM_LOG_LEVEL_OFF -endchoice - -# Set USB log level to error only -choice USB_DEVICE_LOG_LEVEL_CHOICE - default USB_DEVICE_LOG_LEVEL_ERR -endchoice - -endif # LOG - -endif # USB_DEVICE_STACK +endif # BOARD_ARDUINO_OPTA_STM32H747XX_M7 endif # BOARD_ARDUINO_OPTA diff --git a/boards/arduino/opta/arduino_opta-common.dtsi b/boards/arduino/opta/arduino_opta-common.dtsi index 36a96cc421af6f4..cf276172889de2c 100644 --- a/boards/arduino/opta/arduino_opta-common.dtsi +++ b/boards/arduino/opta/arduino_opta-common.dtsi @@ -107,7 +107,7 @@ &adc1 { pinctrl-0 = <&adc1_inp0_pa0_c &adc1_inp6_pf12>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; vref-mv = <10000>; @@ -135,7 +135,7 @@ &adc2 { pinctrl-0 = <&adc2_inp9_pb0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; vref-mv = <10000>; @@ -154,7 +154,7 @@ &adc3 { pinctrl-0 = <&adc3_inp6_pf10 &adc3_inp7_pf8 &adc3_inp8_pf6 &adc3_inp9_pf4 &adc3_inp0_pc2_c>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; vref-mv = <10000>; diff --git a/boards/arduino/opta/arduino_opta_stm32h747xx_m7.dts b/boards/arduino/opta/arduino_opta_stm32h747xx_m7.dts index cc408d4daf2077b..d1b63e91e52cf53 100644 --- a/boards/arduino/opta/arduino_opta_stm32h747xx_m7.dts +++ b/boards/arduino/opta/arduino_opta_stm32h747xx_m7.dts @@ -16,9 +16,6 @@ compatible = "arduino,opta-m7"; chosen { - zephyr,console = &cdc_acm_uart0; - zephyr,shell-uart = &cdc_acm_uart0; - zephyr,cdc-acm-uart0 = &cdc_acm_uart0; zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,code-partition = &slot0_partition; @@ -29,12 +26,10 @@ zephyr_udc0: &usbotg_fs { pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>; pinctrl-names = "default"; status = "okay"; - - cdc_acm_uart0: cdc_acm_uart0 { - compatible = "zephyr,cdc-acm-uart"; - }; }; +#include <../boards/common/usb/cdc_acm_serial.dtsi> + &clk_hse { clock-frequency = ; hse-bypass; @@ -126,8 +121,3 @@ zephyr_udc0: &usbotg_fs { status = "okay"; }; }; - -/* Assign USB serial (ACM) to M7 to have a working console out of the box */ -&cdc_acm_uart0 { - status = "okay"; -}; diff --git a/boards/arduino/opta/arduino_opta_stm32h747xx_m7_defconfig b/boards/arduino/opta/arduino_opta_stm32h747xx_m7_defconfig index 7440b2163e3331b..b57ac0d6f8e1802 100644 --- a/boards/arduino/opta/arduino_opta_stm32h747xx_m7_defconfig +++ b/boards/arduino/opta/arduino_opta_stm32h747xx_m7_defconfig @@ -27,6 +27,3 @@ CONFIG_STM32H7_BOOT_M4_AT_INIT=n CONFIG_SERIAL=y CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y - -# Enable USB Stack (needed for the console to work) -CONFIG_USB_DEVICE_STACK=y diff --git a/boards/arduino/portenta_h7/Kconfig.defconfig b/boards/arduino/portenta_h7/Kconfig.defconfig index 002ff75b5a551b0..c5ae009ae310379 100644 --- a/boards/arduino/portenta_h7/Kconfig.defconfig +++ b/boards/arduino/portenta_h7/Kconfig.defconfig @@ -10,34 +10,10 @@ config NET_L2_ETHERNET endif # NETWORKING -if USB_DEVICE_STACK +if BOARD_ARDUINO_PORTENTA_H7_STM32H747XX_M7 -config USB_DEVICE_PRODUCT - default "Arduino SA Portenta H7" +source "boards/common/usb/Kconfig.cdc_acm_serial.defconfig" -config USB_DEVICE_PID - default 0x035b - -config USB_DEVICE_VID - default 0x2341 - -config USB_DEVICE_INITIALIZE_AT_BOOT - default y - -if LOG - -# Logger cannot use itself to log -choice USB_CDC_ACM_LOG_LEVEL_CHOICE - default USB_CDC_ACM_LOG_LEVEL_OFF -endchoice - -# Set USB log level to error only -choice USB_DEVICE_LOG_LEVEL_CHOICE - default USB_DEVICE_LOG_LEVEL_ERR -endchoice - -endif # LOG - -endif # USB_DEVICE_STACK +endif # BOARD_ARDUINO_PORTENTA_H7_STM32H747XX_M7 endif # BOARD_ARDUINO_PORTENTA_H7 diff --git a/boards/arduino/portenta_h7/arduino_portenta_h7-common.dtsi b/boards/arduino/portenta_h7/arduino_portenta_h7-common.dtsi index e030d9d1cd0562e..7a61e830e52677a 100644 --- a/boards/arduino/portenta_h7/arduino_portenta_h7-common.dtsi +++ b/boards/arduino/portenta_h7/arduino_portenta_h7-common.dtsi @@ -243,7 +243,4 @@ zephyr_udc0: &usbotg_hs { <&rcc STM32_SRC_HSI48 USB_SEL(3)>; num-bidir-endpoints = < 4 >; status = "okay"; - cdc_acm_uart0: cdc_acm_uart0 { - compatible = "zephyr,cdc-acm-uart"; - }; }; diff --git a/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7.dts b/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7.dts index 30b5b06db272058..e6359d3a074fe5d 100644 --- a/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7.dts +++ b/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7.dts @@ -8,6 +8,7 @@ #include #include #include "arduino_portenta_h7-common.dtsi" +#include <../boards/common/usb/cdc_acm_serial.dtsi> / { model = "Arduino Portenta H7 board"; @@ -15,9 +16,6 @@ /* HW resources are split between CM7 and CM4 */ chosen { - zephyr,console = &cdc_acm_uart0; - zephyr,shell-uart = &cdc_acm_uart0; - zephyr,cdc-acm-uart0 = &cdc_acm_uart0; zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,code-partition = &slot0_partition; @@ -98,10 +96,6 @@ status = "okay"; }; -&cdc_acm_uart0 { - status = "okay"; -}; - &flash0 { partitions { compatible = "fixed-partitions"; diff --git a/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7_defconfig b/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7_defconfig index 06d55f8db39ac00..acc978d70c9868d 100644 --- a/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7_defconfig +++ b/boards/arduino/portenta_h7/arduino_portenta_h7_stm32h747xx_m7_defconfig @@ -25,6 +25,3 @@ CONFIG_UART_LINE_CTRL=y # Enable regulator CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED=y - -# Enable USB Stack -CONFIG_USB_DEVICE_STACK=y diff --git a/boards/atmarktechno/degu_evk/Kconfig.defconfig b/boards/atmarktechno/degu_evk/Kconfig.defconfig index 286008a36ab97d6..12c29c90ee0ca89 100644 --- a/boards/atmarktechno/degu_evk/Kconfig.defconfig +++ b/boards/atmarktechno/degu_evk/Kconfig.defconfig @@ -5,29 +5,6 @@ if BOARD_DEGU_EVK -if USB_DEVICE_STACK - -config USB_DEVICE_PRODUCT - default "Degu Evaluation Kit" - -config UART_INTERRUPT_DRIVEN - default y - -config UART_LINE_CTRL - default y - -endif # USB_DEVICE_STACK - -if LOG - -# Logger cannot use itself to log -config USB_CDC_ACM_LOG_LEVEL - default 0 - -# Set USB log level to error only -config USB_DEVICE_LOG_LEVEL - default 1 - -endif # LOG +source "boards/common/usb/Kconfig.cdc_acm_serial.defconfig" endif # BOARD_DEGU_EVK diff --git a/boards/atmarktechno/degu_evk/degu_evk.dts b/boards/atmarktechno/degu_evk/degu_evk.dts index e9d579bd3674bdf..82c7b75ba7fd5d9 100644 --- a/boards/atmarktechno/degu_evk/degu_evk.dts +++ b/boards/atmarktechno/degu_evk/degu_evk.dts @@ -16,8 +16,6 @@ chosen { zephyr,sram = &sram0; zephyr,flash = &flash0; - zephyr,console = °u_cdc_acm_uart; - zephyr,shell-uart = °u_cdc_acm_uart; zephyr,code-partition = &slot0_partition; zephyr,ieee802154 = &ieee802154; }; @@ -173,8 +171,6 @@ zephyr_udc0: &usbd { compatible = "nordic,nrf-usbd"; status = "okay"; - - degu_cdc_acm_uart: degu_cdc_acm_uart { - compatible = "zephyr,cdc-acm-uart"; - }; }; + +#include <../boards/common/usb/cdc_acm_serial.dtsi> diff --git a/boards/atmarktechno/degu_evk/degu_evk_defconfig b/boards/atmarktechno/degu_evk/degu_evk_defconfig index ceed266a40205dc..bd22e1dbfde5dc7 100644 --- a/boards/atmarktechno/degu_evk/degu_evk_defconfig +++ b/boards/atmarktechno/degu_evk/degu_evk_defconfig @@ -10,9 +10,6 @@ CONFIG_SERIAL=y CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y -# Enable USB (for CDC ACM console) -CONFIG_USB_DEVICE_STACK=y - # Additional board options CONFIG_GPIO=y diff --git a/boards/atmel/sam/sam_v71_xult/sam_v71_xult-common.dtsi b/boards/atmel/sam/sam_v71_xult/sam_v71_xult-common.dtsi index f6981455b512242..d5500da2bfc9705 100644 --- a/boards/atmel/sam/sam_v71_xult/sam_v71_xult-common.dtsi +++ b/boards/atmel/sam/sam_v71_xult/sam_v71_xult-common.dtsi @@ -2,7 +2,7 @@ * Copyright (c) 2017 Piotr Mienkowski * Copyright (c) 2017 Justin Watson * Copyright (c) 2020 Stephanos Ioannidis - * Copyright (c) 2019-2022 Gerson Fernando Budke + * Copyright (c) 2019-2024 Gerson Fernando Budke * * SPDX-License-Identifier: Apache-2.0 */ @@ -17,6 +17,7 @@ led0 = &yellow_led1; pwm-led0 = &pwm_led0; pwm-0 = &pwm0; + rtc = &rtc; sw0 = &sw0_user_button; sw1 = &sw1_user_button; watchdog0 = &wdt; @@ -336,6 +337,10 @@ zephyr_udc0: &usbhs { }; }; +&rtc { + status = "okay"; +}; + ext1_spi: &spi0 { }; diff --git a/boards/atmel/sam/sam_v71_xult/sam_v71_xult_samv71q21.yaml b/boards/atmel/sam/sam_v71_xult/sam_v71_xult_samv71q21.yaml index 450c0e54ead85a4..271565dac24435a 100644 --- a/boards/atmel/sam/sam_v71_xult/sam_v71_xult_samv71q21.yaml +++ b/boards/atmel/sam/sam_v71_xult/sam_v71_xult_samv71q21.yaml @@ -22,6 +22,7 @@ supported: - i2s - pwm - netif:eth + - rtc - spi - usb_device - watchdog diff --git a/boards/atmel/sam/sam_v71_xult/sam_v71_xult_samv71q21b.yaml b/boards/atmel/sam/sam_v71_xult/sam_v71_xult_samv71q21b.yaml index b1490e426deabf7..732d1de39e693b9 100644 --- a/boards/atmel/sam/sam_v71_xult/sam_v71_xult_samv71q21b.yaml +++ b/boards/atmel/sam/sam_v71_xult/sam_v71_xult_samv71q21b.yaml @@ -22,6 +22,7 @@ supported: - i2s - pwm - netif:eth + - rtc - spi - usb_device - watchdog diff --git a/boards/atmel/sam0/samd20_xpro/samd20_xpro.yaml b/boards/atmel/sam0/samd20_xpro/samd20_xpro.yaml index 548bd6c462a885a..1db726120e14775 100644 --- a/boards/atmel/sam0/samd20_xpro/samd20_xpro.yaml +++ b/boards/atmel/sam0/samd20_xpro/samd20_xpro.yaml @@ -1,3 +1,6 @@ +# Copyright (c) 2024 Gerson Fernando Budke +# SPDX-License-Identifier: Apache-2.0 + identifier: samd20_xpro name: SAM D20 Xplained Pro type: mcu @@ -9,7 +12,6 @@ toolchain: flash: 256 ram: 32 supported: - - adc - flash - gpio - i2c diff --git a/boards/atmel/sam0/samd21_xpro/samd21_xpro.yaml b/boards/atmel/sam0/samd21_xpro/samd21_xpro.yaml index c41c94432857c60..e1e8e08bdbb78da 100644 --- a/boards/atmel/sam0/samd21_xpro/samd21_xpro.yaml +++ b/boards/atmel/sam0/samd21_xpro/samd21_xpro.yaml @@ -1,6 +1,7 @@ # Copyright (c) 2018 Bryan O'Donoghue # Copyright (c) 2024 Gerson Fernando Budke # SPDX-License-Identifier: Apache-2.0 + identifier: samd21_xpro name: SAM D21 Xplained Pro type: mcu @@ -12,7 +13,6 @@ toolchain: flash: 256 ram: 32 supported: - - adc - counter - dma - gpio diff --git a/boards/atmel/sam0/samr21_xpro/samr21_xpro-pinctrl.dtsi b/boards/atmel/sam0/samr21_xpro/samr21_xpro-pinctrl.dtsi index de5b64f0f8cfd93..81f7bce508abc26 100644 --- a/boards/atmel/sam0/samr21_xpro/samr21_xpro-pinctrl.dtsi +++ b/boards/atmel/sam0/samr21_xpro/samr21_xpro-pinctrl.dtsi @@ -1,11 +1,17 @@ /* - * Copyright (c) 2022, Gerson Fernando Budke + * Copyright (c) 2022-2024, Gerson Fernando Budke * SPDX-License-Identifier: Apache-2.0 */ #include &pinctrl { + adc_default: adc_default { + group1 { + pinmux = ; + }; + }; + pwm_default: pwm_default { group1 { pinmux = ; diff --git a/boards/atmel/sam0/samr21_xpro/samr21_xpro.dts b/boards/atmel/sam0/samr21_xpro/samr21_xpro.dts index 01ed0e8826ce387..e53fdc80f554d47 100644 --- a/boards/atmel/sam0/samr21_xpro/samr21_xpro.dts +++ b/boards/atmel/sam0/samr21_xpro/samr21_xpro.dts @@ -106,6 +106,12 @@ clock-frequency = <48000000>; }; +&adc { + status = "okay"; + pinctrl-0 = <&adc_default>; + pinctrl-names = "default"; +}; + &tcc0 { status = "okay"; compatible = "atmel,sam0-tcc-pwm"; diff --git a/boards/atmel/sam0/samr21_xpro/samr21_xpro.yaml b/boards/atmel/sam0/samr21_xpro/samr21_xpro.yaml index 25ce756d667c9c8..b61a8209edb273b 100644 --- a/boards/atmel/sam0/samr21_xpro/samr21_xpro.yaml +++ b/boards/atmel/sam0/samr21_xpro/samr21_xpro.yaml @@ -1,6 +1,7 @@ # Copyright (c) 2019 Benjamin Valentin -# Copyright (c) 2019-2024 Gerson Fernando Budke +# Copyright (c) 2019-2024 Gerson Fernando Budke # SPDX-License-Identifier: Apache-2.0 + identifier: samr21_xpro name: SAM R21 Xplained Pro type: mcu diff --git a/boards/bbc/microbit/Kconfig.defconfig b/boards/bbc/microbit/Kconfig.defconfig index 1f8bf5b8bc74520..41fec971508853b 100644 --- a/boards/bbc/microbit/Kconfig.defconfig +++ b/boards/bbc/microbit/Kconfig.defconfig @@ -5,9 +5,6 @@ if BOARD_BBC_MICROBIT -config BT_CTLR - default BT - if FXOS8700 choice FXOS8700_MODE diff --git a/boards/bbc/microbit_v2/Kconfig.defconfig b/boards/bbc/microbit_v2/Kconfig.defconfig index 3139f2f24c5f7c4..c00278c3ced21e4 100644 --- a/boards/bbc/microbit_v2/Kconfig.defconfig +++ b/boards/bbc/microbit_v2/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_BBC_MICROBIT_V2 -config BT_CTLR - default BT - endif # BOARD_BBC_MICROBIT_V2 diff --git a/boards/bcdevices/plt_demo_v2/Kconfig.defconfig b/boards/bcdevices/plt_demo_v2/Kconfig.defconfig index ce7c0c3891f64e0..1ee0f255fcfc5a5 100644 --- a/boards/bcdevices/plt_demo_v2/Kconfig.defconfig +++ b/boards/bcdevices/plt_demo_v2/Kconfig.defconfig @@ -5,9 +5,6 @@ if BOARD_BLUECLOVER_PLT_DEMO_V2_NRF52832 -config BT_CTLR - default BT - config I2C default SENSOR diff --git a/boards/beagle/beaglev_fire/beaglev_fire_common.dtsi b/boards/beagle/beaglev_fire/beaglev_fire_common.dtsi index 24b1958a9d9f14a..086dabbed84705e 100644 --- a/boards/beagle/beaglev_fire/beaglev_fire_common.dtsi +++ b/boards/beagle/beaglev_fire/beaglev_fire_common.dtsi @@ -14,6 +14,28 @@ compatible = "beagle,beaglev-fire", "microchip,mpfs"; aliases { }; + + beaglev { + #address-cells = <2>; + #size-cells = <1>; + + ddr_cached_high: memory@1000000000 { + compatible = "mmio-sram"; + reg = <0x10 0x00000000 0x80000000>; /* 2GB */ + }; + }; + + chosen { + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,sram = &ddr_cached_high; + }; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + clock-frequency = <150000000>; }; &gpio2 { diff --git a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_e51.dts b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_e51.dts index 5a8537124d4d951..e1556c095280a77 100644 --- a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_e51.dts +++ b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_e51.dts @@ -21,16 +21,4 @@ status = "disabled"; }; }; - - chosen { - zephyr,console = &uart0; - zephyr,shell-uart = &uart0; - zephyr,sram = &sram1; - }; -}; - -&uart0 { - status = "okay"; - current-speed = <115200>; - clock-frequency = <150000000>; }; diff --git a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_e51.yaml b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_e51.yaml index bc5ee3de628b03b..745c033310b98ba 100644 --- a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_e51.yaml +++ b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_e51.yaml @@ -4,7 +4,7 @@ type: mcu arch: riscv toolchain: - zephyr -ram: 3840 +ram: 2048000 testing: ignore_tags: - net diff --git a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54.dts b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54.dts index 7c4fba300fd3b30..36513a8f6517d86 100644 --- a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54.dts +++ b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54.dts @@ -5,21 +5,9 @@ model = "beagle,beaglev-fire"; compatible = "beagle,beaglev-fire", "microchip,mpfs"; - chosen { - zephyr,console = &uart1; - zephyr,shell-uart = &uart1; - zephyr,sram = &sram1; - }; - cpus { cpu@0 { status = "disabled"; }; }; }; - -&uart1 { - status = "okay"; - current-speed = <115200>; - clock-frequency = <150000000>; -}; diff --git a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54.yaml b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54.yaml index 9204225a7660f8f..e99022d4a148754 100644 --- a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54.yaml +++ b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54.yaml @@ -4,7 +4,7 @@ type: mcu arch: riscv toolchain: - zephyr -ram: 3840 +ram: 2048000 testing: ignore_tags: - net diff --git a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54_smp.dts b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54_smp.dts index cf9ed20aa3ee4e2..9d81bf66e06ec92 100644 --- a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54_smp.dts +++ b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54_smp.dts @@ -4,16 +4,4 @@ / { model = "beagle,beaglev-fire"; compatible = "beagle,beaglev-fire", "microchip,mpfs"; - - chosen { - zephyr,console = &uart1; - zephyr,shell-uart = &uart1; - zephyr,sram = &sram1; - }; -}; - -&uart1 { - status = "okay"; - current-speed = <115200>; - clock-frequency = <150000000>; }; diff --git a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54_smp.yaml b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54_smp.yaml index e8f316014382df1..809d7fd2c3ebca3 100644 --- a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54_smp.yaml +++ b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54_smp.yaml @@ -4,7 +4,7 @@ type: mcu arch: riscv toolchain: - zephyr -ram: 3840 +ram: 2048000 testing: ignore_tags: - net diff --git a/boards/beagle/beaglev_fire/doc/index.rst b/boards/beagle/beaglev_fire/doc/index.rst index e5e28f8cf727a59..4cc146f10a2b230 100644 --- a/boards/beagle/beaglev_fire/doc/index.rst +++ b/boards/beagle/beaglev_fire/doc/index.rst @@ -15,11 +15,17 @@ hobbyists, and researchers to explore and experiment with RISC-V technology. Building ======== +There are three board configurations provided for the BeagleV-Fire: + +* ``beaglev_fire/polarfire/e51``: Uses only the E51 core +* ``beaglev_fire/polarfire/u54``: Uses the U54 cores +* ``beaglev_fire/polarfire/u54/smp``: Uses the U54 cores with CONFIG_SMP=y + Applications for the ``beaglev_fire`` board configuration can be built as usual: .. zephyr-app-commands:: :zephyr-app: samples/hello_world - :board: beaglev_fire + :board: beaglev_fire/polarfire/u54 :goals: build Debugging @@ -76,3 +82,49 @@ and load the binary: load break main continue + +Flashing +======== +When using the PolarFire `Hart Software Services `_ along with Zephyr, you need to use the `hss-payload-generator `_ tool to generate an image that HSS can boot. + +.. code-block:: yaml + + set-name: 'ZephyrImage' + + # Define the entry point address for each hart (U54 cores) + hart-entry-points: + u54_1: '0x1000000000' + + # Define the payloads (ELF binaries or raw blobs) + payloads: + : + exec-addr: '0x1000000000' # Where Zephyr should be loaded + owner-hart: u54_1 # Primary hart that runs Zephyr + priv-mode: prv_m # Start in Machine mode + skip-opensbi: true # Boot directly without OpenSBI + +After generating the image, you can flash it to the board by restarting a board that's connected over USB and UART, interrupting the HSS boot process with a key press, and then running the ``mmc`` and ``usbdmsc`` commands: + +.. code-block:: bash + + Press a key to enter CLI, ESC to skip + Timeout in 1 second + .[6.304162] Character 100 pressed + [6.308415] Type HELP for list of commands + [6.313276] >> mmc + [10.450867] Selecting SDCARD/MMC (fallback) as boot source ... + [10.457550] Attempting to select eMMC ... Passed + [10.712708] >> usbdmsc + [14.732841] initialize MMC + [14.736400] Attempting to select eMMC ... Passed + [15.168707] MMC - 512 byte pages, 512 byte blocks, 30621696 pages + Waiting for USB Host to connect... (CTRL-C to quit) + . 0 bytes written, 0 bytes read + USB Host connected. Waiting for disconnect... (CTRL-C to quit) + / 0 bytes written, 219136 bytes read + +This will cause the board to appear as a USB mass storage device. You can then then flash the image with ``dd`` or other tools like `BalenaEtcher `_: + +.. code-block:: bash + + dd if= of=/dev/sdXD bs=4M status=progress oflag=sync diff --git a/boards/blues/swan_r5/Kconfig.defconfig b/boards/blues/swan_r5/Kconfig.defconfig index a9d7a1e00b1a2e9..44ddb9268d12492 100644 --- a/boards/blues/swan_r5/Kconfig.defconfig +++ b/boards/blues/swan_r5/Kconfig.defconfig @@ -9,14 +9,4 @@ config SPI_STM32_INTERRUPT default y depends on SPI -if NETWORKING - -config USB_DEVICE_STACK - default y - -config USB_DEVICE_NETWORK_EEM - default y - -endif # NETWORKING - endif # BOARD_SWAN_R5 diff --git a/boards/blues/swan_r5/swan_r5.dts b/boards/blues/swan_r5/swan_r5.dts index 221ca274fdecf94..42fb32022170fc8 100644 --- a/boards/blues/swan_r5/swan_r5.dts +++ b/boards/blues/swan_r5/swan_r5.dts @@ -195,7 +195,7 @@ zephyr_udc0: &usbotg_fs { &adc1 { pinctrl-0 = <&adc1_in6_pa1>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/bytesatwork/bytesensi_l/Kconfig.defconfig b/boards/bytesatwork/bytesensi_l/Kconfig.defconfig index 52c2d397af85697..45628d07f25ced5 100644 --- a/boards/bytesatwork/bytesensi_l/Kconfig.defconfig +++ b/boards/bytesatwork/bytesensi_l/Kconfig.defconfig @@ -3,7 +3,4 @@ if BOARD_BYTESENSI_L -config BT_CTLR - default BT - endif # BOARD_BYTESENSI_L diff --git a/boards/common/ecpprog.board.cmake b/boards/common/ecpprog.board.cmake new file mode 100644 index 000000000000000..25aa5914f089a86 --- /dev/null +++ b/boards/common/ecpprog.board.cmake @@ -0,0 +1,5 @@ +# Copyright (c) 2024 tinyVision.ai Inc. +# SPDX-License-Identifier: Apache-2.0 + +board_set_flasher_ifnset(ecpprog) +board_finalize_runner_args(ecpprog) diff --git a/boards/common/minichlink.board.cmake b/boards/common/minichlink.board.cmake new file mode 100644 index 000000000000000..99f79da0ca0450e --- /dev/null +++ b/boards/common/minichlink.board.cmake @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Dhiru Kholia +# SPDX-License-Identifier: Apache-2.0 + +board_set_flasher_ifnset(minichlink) +board_finalize_runner_args(minichlink) diff --git a/boards/common/simics.board.cmake b/boards/common/simics.board.cmake index 792197a54ccca11..49fe1bfb7cd05e4 100644 --- a/boards/common/simics.board.cmake +++ b/boards/common/simics.board.cmake @@ -1,5 +1,7 @@ -# Copyright (c) 2023 Intel Corporation +# Copyright (c) 2023-2024 Intel Corporation # # SPDX-License-Identifier: Apache-2.0 +set(SUPPORTED_EMU_PLATFORMS simics) + board_finalize_emu_args(simics) diff --git a/boards/common/usb/Kconfig.cdc_acm_serial.defconfig b/boards/common/usb/Kconfig.cdc_acm_serial.defconfig new file mode 100644 index 000000000000000..3a5661a98f41376 --- /dev/null +++ b/boards/common/usb/Kconfig.cdc_acm_serial.defconfig @@ -0,0 +1,51 @@ +# Copyright (c) 2023-2024 Nordic Semiconductor ASA +# +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_REQUIRES_SERIAL_BACKEND_CDC_ACM + default y + +if BOARD_SERIAL_BACKEND_CDC_ACM + +config SERIAL + default y + +config CONSOLE + default y + +config UART_CONSOLE + default CONSOLE + +config SHELL_BACKEND_SERIAL_CHECK_DTR + default SHELL + depends on UART_LINE_CTRL + +config UART_LINE_CTRL + default SHELL + +config USB_DEVICE_STACK + default y + +config USB_DEVICE_INITIALIZE_AT_BOOT + default y if !MCUBOOT + +config USB_DEVICE_REMOTE_WAKEUP + default n + +if LOG + +choice USB_CDC_ACM_LOG_LEVEL_CHOICE + default USB_CDC_ACM_LOG_LEVEL_OFF +endchoice + +choice USB_DEVICE_LOG_LEVEL_CHOICE + default USB_DEVICE_LOG_LEVEL_OFF +endchoice + +# Wait 4000ms at startup for logging +config LOG_PROCESS_THREAD_STARTUP_DELAY_MS + default 4000 + +endif # LOG + +endif # BOARD_SERIAL_BACKEND_CDC_ACM diff --git a/boards/common/usb/cdc_acm_serial.dtsi b/boards/common/usb/cdc_acm_serial.dtsi new file mode 100644 index 000000000000000..14e702fa525247c --- /dev/null +++ b/boards/common/usb/cdc_acm_serial.dtsi @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + chosen { + zephyr,console = &board_cdc_acm_uart; + zephyr,shell-uart = &board_cdc_acm_uart; + zephyr,uart-mcumgr = &board_cdc_acm_uart; + zephyr,bt-mon-uart = &board_cdc_acm_uart; + zephyr,bt-c2h-uart = &board_cdc_acm_uart; + }; +}; + +&zephyr_udc0 { + board_cdc_acm_uart: board_cdc_acm_uart { + compatible = "zephyr,cdc-acm-uart"; + }; +}; diff --git a/boards/contextualelectronics/abc/Kconfig.defconfig b/boards/contextualelectronics/abc/Kconfig.defconfig index 8568f02c34bbe52..76745cd7b1ff7e1 100644 --- a/boards/contextualelectronics/abc/Kconfig.defconfig +++ b/boards/contextualelectronics/abc/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_CONTEXTUALELECTRONICS_ABC -config BT_CTLR - default BT - endif # BOARD_CONTEXTUALELECTRONICS_ABC diff --git a/boards/croxel/croxel_cx1825/Kconfig.defconfig b/boards/croxel/croxel_cx1825/Kconfig.defconfig index c96e14fea0649c7..b6f6c5ef704aedd 100644 --- a/boards/croxel/croxel_cx1825/Kconfig.defconfig +++ b/boards/croxel/croxel_cx1825/Kconfig.defconfig @@ -3,16 +3,6 @@ if BOARD_CROXEL_CX1825 -config BT_CTLR - default BT - -if LOG - -# Logger cannot use itself to log -choice USB_CDC_ACM_LOG_LEVEL_CHOICE - default USB_CDC_ACM_LOG_LEVEL_OFF -endchoice - -endif # LOG +source "boards/common/usb/Kconfig.cdc_acm_serial.defconfig" endif # BOARD_CROXEL_CX1825 diff --git a/boards/croxel/croxel_cx1825/croxel_cx1825_nrf52840.dts b/boards/croxel/croxel_cx1825/croxel_cx1825_nrf52840.dts index 0aaa70158f82226..0dd4d908fa78932 100644 --- a/boards/croxel/croxel_cx1825/croxel_cx1825_nrf52840.dts +++ b/boards/croxel/croxel_cx1825/croxel_cx1825_nrf52840.dts @@ -17,8 +17,6 @@ zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,code-partition = &slot0_partition; - zephyr,console = &cdc_acm_0; - zephyr,shell-uart = &cdc_acm_0; }; leds { @@ -130,12 +128,10 @@ zephyr_udc0: &usbd { compatible = "nordic,nrf-usbd"; status = "okay"; - - cdc_acm_0: cdc_acm_0 { - compatible = "zephyr,cdc-acm-uart"; - }; }; +#include <../boards/common/usb/cdc_acm_serial.dtsi> + &flash0 { partitions { diff --git a/boards/croxel/croxel_cx1825/croxel_cx1825_nrf52840_defconfig b/boards/croxel/croxel_cx1825/croxel_cx1825_nrf52840_defconfig index 8694d118b007ac3..6a76f262ed3fb3b 100644 --- a/boards/croxel/croxel_cx1825/croxel_cx1825_nrf52840_defconfig +++ b/boards/croxel/croxel_cx1825/croxel_cx1825_nrf52840_defconfig @@ -10,11 +10,6 @@ CONFIG_HW_STACK_PROTECTION=y # enable GPIO CONFIG_GPIO=y -# Assume we start console by default -CONFIG_USB_DEVICE_INITIALIZE_AT_BOOT=y - -# Console over USB CDC-ACM -CONFIG_USB_DEVICE_STACK=y CONFIG_SERIAL=y CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y diff --git a/boards/ct/ctcc/Kconfig b/boards/ct/ctcc/Kconfig deleted file mode 100644 index 3a7ec750888b58b..000000000000000 --- a/boards/ct/ctcc/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -# CTHINGS.CO Connectivity Card board configuration - -# Copyright (c) 2024 CTHINGS.CO -# SPDX-License-Identifier: Apache-2.0 - -config BOARD_SERIAL_BACKEND_CDC_ACM - bool "USB CDC" - default y - depends on BOARD_CTCC_NRF52840 diff --git a/boards/ct/ctcc/Kconfig.ctcc b/boards/ct/ctcc/Kconfig.ctcc index bdda03b4c0a7363..7434347751dcb9d 100644 --- a/boards/ct/ctcc/Kconfig.ctcc +++ b/boards/ct/ctcc/Kconfig.ctcc @@ -5,3 +5,4 @@ config BOARD_CTCC select SOC_NRF52840_QIAA if BOARD_CTCC_NRF52840 + select SOC_NRF9161_LACA if BOARD_CTCC_NRF9161 || BOARD_CTCC_NRF9161_NS diff --git a/boards/ct/ctcc/Kconfig.defconfig b/boards/ct/ctcc/Kconfig.defconfig index fb74f895a033505..298f3d2fe2185e8 100644 --- a/boards/ct/ctcc/Kconfig.defconfig +++ b/boards/ct/ctcc/Kconfig.defconfig @@ -5,54 +5,27 @@ if BOARD_CTCC_NRF52840 -if BOARD_SERIAL_BACKEND_CDC_ACM +source "boards/common/usb/Kconfig.cdc_acm_serial.defconfig" -config USB_DEVICE_STACK - default y - -config USB_CDC_ACM - default SERIAL - -config CONSOLE - default y - -config UART_CONSOLE - default CONSOLE - -config USB_DEVICE_INITIALIZE_AT_BOOT - default y if !MCUBOOT && CONSOLE - -config USB_DEVICE_REMOTE_WAKEUP - default n - -if LOG - -# Turn off logging for USB CDC ACM -choice USB_CDC_ACM_LOG_LEVEL_CHOICE - default USB_CDC_ACM_LOG_LEVEL_OFF -endchoice - -# Turn off logging for USB Device -choice USB_DEVICE_LOG_LEVEL_CHOICE - default USB_DEVICE_LOG_LEVEL_OFF -endchoice - -# Wait 5s at startup for logging -config LOG_PROCESS_THREAD_STARTUP_DELAY_MS - default 5000 +endif # BOARD_CTCC_NRF52840 -endif # LOG +if BOARD_CTCC_NRF9161 || BOARD_CTCC_NRF9161_NS -if USB_DEVICE_STACK +# Workaround for not being able to have commas in macro arguments. +# For explanation please see: boards/nordic/nrf9161dk/Kconfig.defconfig +DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition -config SERIAL - default y +config FLASH_LOAD_SIZE + default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION)) + depends on BOARD_CTCC_NRF9161 && TRUSTED_EXECUTION_SECURE -endif # USB_DEVICE_STACK +if BOARD_CTCC_NRF9161_NS -endif # BOARD_SERIAL_BACKEND_CDC_ACM +config FLASH_LOAD_OFFSET + default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION)) -config BT_CTLR - default BT +config FLASH_LOAD_SIZE + default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION)) -endif # BOARD_CTCC_NRF52840 +endif # BOARD_CTCC_NRF9161_NS +endif # BOARD_CTCC_NRF9161 || BOARD_CTCC_NRF9161_NS diff --git a/boards/ct/ctcc/board.cmake b/boards/ct/ctcc/board.cmake index 3a315c29fbe8ea4..11d0511404b1ae2 100644 --- a/boards/ct/ctcc/board.cmake +++ b/boards/ct/ctcc/board.cmake @@ -1,6 +1,19 @@ # SPDX-License-Identifier: Apache-2.0 -board_runner_args(nrfjprog "--softreset") -board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000") -include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) -include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) +if(CONFIG_BOARD_CTCC_NRF52840) + board_runner_args(nrfjprog "--softreset") + board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000") + include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) + include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) +elseif(CONFIG_BOARD_CTCC_NRF9161 OR CONFIG_BOARD_CTCC_NRF9161_NS) + if(CONFIG_BOARD_CTCC_NRF9161_NS) + set(TFM_PUBLIC_KEY_FORMAT "full") + endif() + if(CONFIG_TFM_FLASH_MERGED_BINARY) + set_property(TARGET runners_yaml_props_target PROPERTY hex_file tfm_merged.hex) + endif() + board_runner_args(nrfjprog "--softreset") + board_runner_args(pyocd "--target=nrf9161" "--frequency=4000000") + include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) + include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) +endif() diff --git a/boards/ct/ctcc/board.yml b/boards/ct/ctcc/board.yml index b6212047d79f360..826b1846af5dc94 100644 --- a/boards/ct/ctcc/board.yml +++ b/boards/ct/ctcc/board.yml @@ -1,5 +1,8 @@ board: name: ctcc - full_name: Connectivity Card nRF52840 + full_name: CTHINGS.CO Connectivity Card socs: - name: nrf52840 + - name: nrf9161 + variants: + - name: 'ns' diff --git a/boards/ct/ctcc/ctcc_nrf52840.dts b/boards/ct/ctcc/ctcc_nrf52840.dts index 13b88e1ee053a25..f99cc540e9c6ff7 100644 --- a/boards/ct/ctcc/ctcc_nrf52840.dts +++ b/boards/ct/ctcc/ctcc_nrf52840.dts @@ -12,11 +12,6 @@ compatible = "ct,ctcc-nrf52840"; chosen { - zephyr,console = &cdc_acm_uart; - zephyr,shell-uart = &cdc_acm_uart; - zephyr,uart-mcumgr = &cdc_acm_uart; - zephyr,bt-mon-uart = &cdc_acm_uart; - zephyr,bt-c2h-uart = &cdc_acm_uart; zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,code-partition = &slot0_partition; @@ -69,6 +64,10 @@ }; }; +®0 { + status = "okay"; +}; + ®1 { regulator-initial-mode = ; }; @@ -88,8 +87,6 @@ zephyr_udc0: &usbd { compatible = "nordic,nrf-usbd"; status = "okay"; - - cdc_acm_uart: cdc_acm_uart { - compatible = "zephyr,cdc-acm-uart"; - }; }; + +#include <../boards/common/usb/cdc_acm_serial.dtsi> diff --git a/boards/ct/ctcc/ctcc_nrf52840.yaml b/boards/ct/ctcc/ctcc_nrf52840.yaml index 2151c146fb7f60a..3f4099b5b870555 100644 --- a/boards/ct/ctcc/ctcc_nrf52840.yaml +++ b/boards/ct/ctcc/ctcc_nrf52840.yaml @@ -11,4 +11,5 @@ supported: - gpio - usb_device - watchdog + - counter vendor: ct diff --git a/boards/ct/ctcc/ctcc_nrf9161-pinctrl.dtsi b/boards/ct/ctcc/ctcc_nrf9161-pinctrl.dtsi new file mode 100644 index 000000000000000..c48b2987b85d004 --- /dev/null +++ b/boards/ct/ctcc/ctcc_nrf9161-pinctrl.dtsi @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2024 CTHINGS.CO + * SPDX-License-Identifier: Apache-2.0 + */ + +&pinctrl { + uart0_default: uart0_default { + group1 { + psels = , + ; + }; + group2 { + psels = , + ; + }; + }; + + uart0_sleep: uart0_sleep { + group1 { + psels = , + , + , + ; + low-power-enable; + }; + }; + + uart1_default: uart1_default { + group1 { + psels = , + ; + }; + group2 { + psels = , + ; + bias-pull-up; + }; + }; + + uart1_sleep: uart1_sleep { + group1 { + psels = , + , + , + ; + low-power-enable; + }; + }; + + spi3_default: spi3_default { + group1 { + psels = , + , + ; + nordic,drive-mode = ; + }; + }; + + spi3_sleep: spi3_sleep { + group1 { + psels = , + , + ; + low-power-enable; + }; + }; +}; diff --git a/boards/ct/ctcc/ctcc_nrf9161.dts b/boards/ct/ctcc/ctcc_nrf9161.dts new file mode 100644 index 000000000000000..6f3d9af92c6c14b --- /dev/null +++ b/boards/ct/ctcc/ctcc_nrf9161.dts @@ -0,0 +1,19 @@ +/* + * Copyright (c) 2024 CTHINGS.CO + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include "ctcc_nrf9161_common.dtsi" + +/ { + chosen { + zephyr,sram = &sram0_s; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,sram-secure-partition = &sram0_s; + zephyr,sram-non-secure-partition = &sram0_ns; + }; +}; diff --git a/boards/ct/ctcc/ctcc_nrf9161.yaml b/boards/ct/ctcc/ctcc_nrf9161.yaml new file mode 100644 index 000000000000000..8cc32c4068a44b6 --- /dev/null +++ b/boards/ct/ctcc/ctcc_nrf9161.yaml @@ -0,0 +1,15 @@ +identifier: ctcc/nrf9161 +name: CTHINGS.CO Connectivity Card nRF9161 +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +ram: 88 +flash: 1024 +supported: + - gpio + - watchdog + - counter +vendor: ct diff --git a/boards/ct/ctcc/ctcc_nrf9161_common.dtsi b/boards/ct/ctcc/ctcc_nrf9161_common.dtsi new file mode 100644 index 000000000000000..92a2a757c55a285 --- /dev/null +++ b/boards/ct/ctcc/ctcc_nrf9161_common.dtsi @@ -0,0 +1,91 @@ +/* + * Copyright (c) 2024 CTHINGS.CO + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "ctcc_nrf9161-pinctrl.dtsi" +#include + +/ { + model = "CTHINGS.CO Connectivity Card nRF9161"; + compatible = "ct,ctcc-nrf9161"; + + chosen { + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,uart-mcumgr = &uart0; + }; + + leds { + compatible = "gpio-leds"; + led1: led_1 { + gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; + label = "LED 1"; + }; + led2: led_2 { + gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; + label = "LED 2"; + }; + }; + + aliases { + led0 = &led1; + led1 = &led2; + mcuboot-led0 = &led1; + bootloader-led0 = &led1; + watchdog0 = &wdt0; + spi-flash0 = &mx25r6435; + }; +}; + +&adc { + status = "okay"; +}; + +&gpiote { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-1 = <&uart0_sleep>; + pinctrl-names = "default", "sleep"; +}; + +&uart1 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart1_default>; + pinctrl-1 = <&uart1_sleep>; + pinctrl-names = "default", "sleep"; +}; + +&spi3 { + compatible = "nordic,nrf-spim"; + status = "okay"; + cs-gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&spi3_default>; + pinctrl-1 = <&spi3_sleep>; + pinctrl-names = "default", "sleep"; + + mx25r6435: mx25r6435fm2il0@0 { + compatible = "jedec,spi-nor"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <10000000>; + size = ; + has-dpd; + dpd-wakeup-sequence = <30000>, <20>, <30000>; + jedec-id = [c2 25 38]; + }; +}; + +/* Include default memory partition configuration file */ +#include diff --git a/boards/ct/ctcc/ctcc_nrf9161_defconfig b/boards/ct/ctcc/ctcc_nrf9161_defconfig new file mode 100644 index 000000000000000..c486d8323821a2c --- /dev/null +++ b/boards/ct/ctcc/ctcc_nrf9161_defconfig @@ -0,0 +1,20 @@ +# SPDX-License-Identifier: Apache-2.0 + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable TrustZone-M +CONFIG_ARM_TRUSTZONE_M=y + +# Enable GPIO +CONFIG_GPIO=y + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y diff --git a/boards/ct/ctcc/ctcc_nrf9161_ns.dts b/boards/ct/ctcc/ctcc_nrf9161_ns.dts new file mode 100644 index 000000000000000..1c23b0b8410cea7 --- /dev/null +++ b/boards/ct/ctcc/ctcc_nrf9161_ns.dts @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2024 CTHINGS.CO + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include "ctcc_nrf9161_common.dtsi" + +/ { + chosen { + zephyr,flash = &flash0; + zephyr,sram = &sram0_ns; + zephyr,code-partition = &slot0_ns_partition; + }; +}; + +/* Disable UART1, because it is used by default in TF-M */ +&uart1 { + status = "disabled"; +}; diff --git a/boards/ct/ctcc/ctcc_nrf9161_ns.yaml b/boards/ct/ctcc/ctcc_nrf9161_ns.yaml new file mode 100644 index 000000000000000..67a17c77209d97d --- /dev/null +++ b/boards/ct/ctcc/ctcc_nrf9161_ns.yaml @@ -0,0 +1,14 @@ +identifier: ctcc/nrf9161/ns +name: CTHINGS.CO Connectivity Card nRF9161 Non Secure +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +ram: 128 +flash: 192 +supported: + - gpio + - watchdog +vendor: ct diff --git a/boards/ct/ctcc/ctcc_nrf9161_ns_defconfig b/boards/ct/ctcc/ctcc_nrf9161_ns_defconfig new file mode 100644 index 000000000000000..2a74dd56f4144aa --- /dev/null +++ b/boards/ct/ctcc/ctcc_nrf9161_ns_defconfig @@ -0,0 +1,23 @@ +# SPDX-License-Identifier: Apache-2.0 + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable TrustZone-M +CONFIG_ARM_TRUSTZONE_M=y + +# This board implies building Non-Secure firmware +CONFIG_TRUSTED_EXECUTION_NONSECURE=y + +# Enable GPIO +CONFIG_GPIO=y + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y diff --git a/boards/ct/ctcc/doc/img/ctcc_nrf9161_mpcie.webp b/boards/ct/ctcc/doc/img/ctcc_nrf9161_mpcie.webp new file mode 100644 index 000000000000000..20785314c3d4d90 Binary files /dev/null and b/boards/ct/ctcc/doc/img/ctcc_nrf9161_mpcie.webp differ diff --git a/boards/ct/ctcc/doc/index.rst b/boards/ct/ctcc/doc/index.rst index 73b857b47dfa536..97780246a742c4b 100644 --- a/boards/ct/ctcc/doc/index.rst +++ b/boards/ct/ctcc/doc/index.rst @@ -3,19 +3,27 @@ Overview ******** -The Connectivity Card nRF52840 enables BLE and IEEE 802.15.4 connectivity -over mPCIe or M.2 using USB port with on-board nRF52840 SoC. +Connectivity Cards come with either M.2 or mPCIe form factor with various SoCs, enabling different +radio interfaces. -This board has following features: +* The Connectivity Card nRF52840 enables BLE and IEEE 802.15.4 over mPCIe or M.2 + using USB device with on-board nRF52840 SoC + +* The Connectivity Card nRF9161 enables LTE-M/NB-IoT and DECT NR+ over mPCIe or M.2 + using on-board USB-UART converter + +Connectivity Card has following features: * CLOCK * FLASH * :abbr:`GPIO (General Purpose Input Output)` * :abbr:`MPU (Memory Protection Unit)` * :abbr:`NVIC (Nested Vectored Interrupt Controller)` -* RADIO (Bluetooth Low Energy and 802.15.4) +* RADIO (Bluetooth Low Energy and 802.15.4) (only nRF52840) +* RADIO (LTE-M/NB-IoT and DECT NR+) (only nRF9161) * :abbr:`RTC (nRF RTC System Clock)` -* :abbr:`USB (Universal Serial Bus)` +* :abbr:`USB (Universal Serial Bus)` (only nRF52840) +* :abbr:`UARTE (Universal asynchronous receiver-transmitter with EasyDMA)` (only nRF9161) * :abbr:`WDT (Watchdog Timer)` .. figure:: img/ctcc_nrf52840_mpcie.webp @@ -30,13 +38,21 @@ This board has following features: ctcc/nrf52840 M.2 board +.. figure:: img/ctcc_nrf9161_mpcie.webp + :align: center + :alt: CTCC nRF9161 mPCIe + + ctcc/nrf9161 mPCIe board + More information about the board can be found at the -`ctcc_nrf52840 Website`_ and for SoC information: `Nordic Semiconductor Infocenter`_. +`Connectivity Cards Website`_ and for SoC information: `Nordic Semiconductor Infocenter`_. Hardware ******** -The ``ctcc/nrf52840`` board target has one external oscillator of the 32.768 kHz. +* The ``ctcc/nrf52840`` board target has one external oscillator of the 32.768 kHz. +* The ``ctcc/nrf9161`` board target has one external SPI NOR 64Mbit memory and one on-board USB-UART + converter (CP210X). Supported Features ================== @@ -67,22 +83,61 @@ hardware features: | WDT | on-chip | watchdog | +-----------+------------+----------------------+ +The ``ctcc/nrf9161`` board target supports the following +hardware features: + ++-----------+------------+----------------------+ +| Interface | Controller | Driver/Component | ++===========+============+======================+ +| CLOCK | on-chip | clock_control | ++-----------+------------+----------------------+ +| FLASH | on-chip | flash | ++-----------+------------+----------------------+ +| FLASH | external | spi | ++-----------+------------+----------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+----------------------+ +| MPU | on-chip | arch/arm | ++-----------+------------+----------------------+ +| NVIC | on-chip | arch/arm | ++-----------+------------+----------------------+ +| RADIO | on-chip | LTE-M/NB-IoT, | +| | | DECT NR\+ | ++-----------+------------+----------------------+ +| SPI(M/S) | on-chip | spi | ++-----------+------------+----------------------+ +| SPU | on-chip | system protection | ++-----------+------------+----------------------+ +| UARTE | on-chip | serial | ++-----------+------------+----------------------+ +| RTC | on-chip | system clock | ++-----------+------------+----------------------+ +| WDT | on-chip | watchdog | ++-----------+------------+----------------------+ + Connections and IOs =================== LED --- -Note that board does not have on-board LEDs, however it exposes +Note that boards do not have on-board LEDs, however they expose LED signals on mPCIe/M.2 pins. +nRF52840: + * LED1 = P0.23 * LED2 = P0.22 +nRF9161: + +* LED1 = P0.11 +* LED2 = P0.12 + Programming and Debugging ************************* -Applications for the ``ctcc/nrf52840`` board target can be +Applications for ``ctcc`` boards can be built in the usual way (see :ref:`build_an_application` for more details). Flashing @@ -91,7 +146,10 @@ Flashing The board supports the following programming options: 1. Using an external :ref:`debug probe ` -2. Using MCUboot with DFU support +2. Using `MCUboot`_ with MCUmgr support + +Below instructions are provided for ``ctcc/nrf52840``, to use ``nrf9161`` target, the USB device configs have +to be replaced with UART configurations. Option 1: Using an External Debug Probe --------------------------------------- @@ -114,58 +172,65 @@ logs on emulated USB port. :board: ctcc/nrf52840 :goals: build flash -Debugging -========= +Option 2: Using MCUboot with MCUmgr support +------------------------------------------- -The ``ctcc/nrf52840`` board target does not have an on-board J-Link debug IC, however -instructions from the :ref:`nordic_segger` page also apply to this board, -with the additional step of connecting an external debugger. +It is also possible to use the MCUboot bootloader with :ref:`mcu_mgr` support to flash +Zephyr applications. + +Install a MCUmgr-compatible tool from :ref:`supported list ` +and make sure MCUboot's ``imgtool`` is available for signing your binary +for MCUboot as described on :ref:`west-sign`. + +#. Compile MCUboot as a Zephyr application with ``MCUmgr`` support. -Option 2: Using MCUboot with DFU support ----------------------------------------- + .. tabs:: -It is also possible to use the MCUboot bootloader with DFU support to flash -Zephyr applications. You need to flash MCUboot with DFU support and fill in slot0 with -some application one-time using Option 1. Then you can re-flash an application using DFU utility -by loading images to slot1. Note, it's not possible to have only MCUboot and load directly -software to slot0 due to DFU implementation in Zephyr, which for present slot0 and slot1 in flash -map, it assumes only slot1 partition as writeable. + .. group-tab:: nRF52840 -Install ``dfu-util`` first and make sure MCUboot's ``imgtool`` is -available for signing your binary for MCUboot as described on :ref:`west-sign`. + To build the MCUboot: -Next, do the **one-time setup** to flash MCUboot with DFU support. -We'll assume you've cloned the `MCUboot`_ as a submodule when initializing -Zephyr repositories using :ref:`west` tool. + .. zephyr-app-commands:: + :app: mcuboot/boot/zephyr + :board: ctcc/nrf52840 + :build-dir: mcuboot + :goals: build -#. Compile MCUboot as a Zephyr application with DFU support. + .. group-tab:: nRF9161 - .. zephyr-app-commands:: - :app: mcuboot/boot/zephyr - :board: ctcc/nrf52840 - :build-dir: mcuboot - :goals: build - :gen-args: -DCONFIG_BOOT_USB_DFU_WAIT=y + To build the MCUboot: + + .. zephyr-app-commands:: + :app: mcuboot/boot/zephyr + :board: ctcc/nrf9161 + :build-dir: mcuboot + :goals: build #. Flash it onto the board as described in Option 1. -#. Flash other Zephyr application to fill in slot0 e.g: +#. Flash other Zephyr application over USB using :ref:`MCUmgr-compatible tool ` and reset target to boot into the image. + + .. tabs:: + + .. group-tab:: nRF52840 - .. zephyr-app-commands:: - :zephyr-app: samples/subsys/usb/dfu - :board: ctcc/nrf52840 - :build-dir: dfu - :goals: build - :gen-args: -DCONFIG_BOOTLOADER_MCUBOOT=y -DCONFIG_MCUBOOT_SIGNATURE_KEY_FILE=\"path/to/mcuboot/boot/root-rsa-2048.pem\" + Build the blinky example with MCUboot support: -You can now flash a Zephyr application to the board using DFU util. -As an example we'll use the :zephyr:code-sample:`usb-cdc-acm-console` sample. + .. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: ctcc/nrf52840 + :goals: build + :gen-args: -DCONFIG_BOOTLOADER_MCUBOOT=y -DCONFIG_MCUBOOT_SIGNATURE_KEY_FILE=\"path/to/mcuboot/boot/root-rsa-2048.pem\" - .. zephyr-app-commands:: - :zephyr-app: samples/subsys/usb/console - :board: ctcc/nrf52840 - :goals: build flash - :gen-args: -DCONFIG_BOOTLOADER_MCUBOOT=y -DCONFIG_MCUBOOT_SIGNATURE_KEY_FILE=\"path/to/mcuboot/boot/root-rsa-2048.pem\" + .. group-tab:: nRF9161 + + Build the blinky example with MCUboot support: + + .. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: ctcc/nrf9161 + :goals: build + :gen-args: -DCONFIG_BOOTLOADER_MCUBOOT=y -DCONFIG_MCUBOOT_SIGNATURE_KEY_FILE=\"path/to/mcuboot/boot/root-rsa-2048.pem\" .. note:: @@ -173,25 +238,26 @@ As an example we'll use the :zephyr:code-sample:`usb-cdc-acm-console` sample. directory. Providing certificate in build args produces signed binary automatically. Do not use this certificate in your production firmware! -#. Plug in ``ctcc/nrf52840`` card to mPCIe/M.2 slot or use mPCIe/M.2 adapter to USB - and plug such adapter to USB port. +Debugging +========= - You should see ``NordicSemiconductor MCUBOOT`` or ``NordicSemiconductor Zephyr DFU sample`` - (if you flashed ``dfu`` sample to slot0) device once plugging it into host - USB port. You can check that on Linux system by entering ``lsusb`` command. +These boards do not have an on-board J-Link debug IC, however +instructions from the :ref:`nordic_segger` page also apply to them, +with the additional step of connecting an external debugger. - To check if DFU device is visible you can enter ``sudo dfu-util -l`` command. Once the - device is visible you can flash Zephyr image using DFU util: ``sudo dfu-util --alt 1 --download build/zephyr/zephyr.signed.bin`` +To test flashed software, plug in ``ctcc`` card to mPCIe/M.2 slot or use mPCIe/M.2 adapter to USB and plug such adapter to USB port. + * For ``ctcc/nrf52840`` check on Linux system by entering ``lsusb`` command if the following device appears: ``NordicSemiconductor MCUBOOT`` or ``NordicSemiconductor USB-DEV`` (when booted into blinky example). + * For ``ctcc/nrf9161`` it's not possible to see a change in ``lsusb`` due to the on-board USB-UART converter. Intead, connect to the UART console using a terminal emulation program of your choice. References ********** .. target-notes:: -.. _ctcc_nrf52840 Website: +.. _Connectivity Cards Website: https://cthings.co/products/connectivity-cards .. _Nordic Semiconductor Infocenter: https://infocenter.nordicsemi.com .. _MCUboot: - https://github.com/JuulLabs-OSS/mcuboot + https://github.com/zephyrproject-rtos/mcuboot diff --git a/boards/deprecated.cmake b/boards/deprecated.cmake index 41e90ba3b93c7e7..78a960ec2e4ae88 100644 --- a/boards/deprecated.cmake +++ b/boards/deprecated.cmake @@ -13,906 +13,27 @@ # https://docs.zephyrproject.org/latest/develop/api/api_lifecycle.html#deprecated, # so these aliases are eventually removed -set(96b_carbon_DEPRECATED - 96b_carbon/stm32f401xe -) -set(96b_carbon_nrf51_DEPRECATED - 96b_carbon/nrf51822 -) -set(96b_meerkat96_DEPRECATED - 96b_meerkat96/mcimx7d/m4 -) -set(actinius_icarus_bee_ns_DEPRECATED - actinius_icarus_bee/nrf9160/ns -) -set(actinius_icarus_ns_DEPRECATED - actinius_icarus/nrf9160/ns -) -set(actinius_icarus_som_dk_ns_DEPRECATED - actinius_icarus_som_dk/nrf9160/ns -) -set(actinius_icarus_som_ns_DEPRECATED - actinius_icarus_som/nrf9160/ns -) set(adafruit_feather_DEPRECATED adafruit_feather_nrf52840/nrf52840 ) -set(adafruit_feather_nrf52840_DEPRECATED - adafruit_feather_nrf52840/nrf52840 -) -set(adafruit_itsybitsy_nrf52840_DEPRECATED - adafruit_itsybitsy -) -set(adp_xc7k_ae350_DEPRECATED - adp_xc7k -) -set(am62x_m4_phyboard_lyra_DEPRECATED - phyboard_lyra/am6234/m4 -) -set(am62x_m4_sk_DEPRECATED - sk_am62/am6234/m4 -) -set(arduino_giga_r1_m4_DEPRECATED - arduino_giga_r1/stm32h747xx/m4 -) -set(arduino_giga_r1_m7_DEPRECATED - arduino_giga_r1/stm32h747xx/m7 -) -set(arduino_nano_33_ble_sense_DEPRECATED - arduino_nano_33_ble/nrf52840/sense -) -set(arduino_opta_m4_DEPRECATED - arduino_opta/stm32h747xx/m4 -) -set(arduino_portenta_h7_m4_DEPRECATED - arduino_portenta_h7/stm32h747xx/m4 -) -set(arduino_portenta_h7_m7_DEPRECATED - arduino_portenta_h7/stm32h747xx/m7 -) -set(arty_a7_arm_designstart_m1_DEPRECATED - arty_a7/designstart_fpga_cortex_m1 -) -set(arty_a7_arm_designstart_m3_DEPRECATED - arty_a7/designstart_fpga_cortex_m3 -) -set(atsamc21n_xpro_DEPRECATED - samc21n_xpro -) -set(atsamd20_xpro_DEPRECATED - samd20_xpro -) -set(atsamd21_xpro_DEPRECATED - samd21_xpro -) -set(atsame54_xpro_DEPRECATED - same54_xpro -) -set(atsaml21_xpro_DEPRECATED - saml21_xpro -) -set(atsamr21_xpro_DEPRECATED - samr21_xpro -) -set(atsamr34_xpro_DEPRECATED - samr34_xpro -) -set(b_u585i_iot02a_ns_DEPRECATED - b_u585i_iot02a/stm32u585xx/ns -) -set(bcm958402m2_a72_DEPRECATED - bcm958402m2/bcm58402/a72 -) -set(bcm958402m2_m7_DEPRECATED - bcm958402m2/bcm58402/m7 -) -set(bl5340_dvk_cpuapp_DEPRECATED - bl5340_dvk/nrf5340/cpuapp -) -set(bl5340_dvk_cpuapp_ns_DEPRECATED - bl5340_dvk/nrf5340/cpuapp/ns -) -set(bl5340_dvk_cpunet_DEPRECATED - bl5340_dvk/nrf5340/cpunet -) -set(blueclover_plt_demo_v2_nrf52832_DEPRECATED - blueclover_plt_demo_v2 -) -set(circuitdojo_feather_nrf9160_DEPRECATED - circuitdojo_feather -) -set(circuitdojo_feather_nrf9160_ns_DEPRECATED - circuitdojo_feather/nrf9160/ns -) -set(colibri_imx7d_m4_DEPRECATED - colibri_imx7d/mcimx7d/m4 -) -set(cy8ckit_062_ble_m0_DEPRECATED - cy8ckit_062_ble/cy8c6347/m0 -) -set(cy8ckit_062_ble_m4_DEPRECATED - cy8ckit_062_ble/cy8c6347/m4 -) -set(cy8ckit_062_wifi_bt_m0_DEPRECATED - cy8ckit_062_wifi_bt/cy8c6247/m0 -) -set(cy8ckit_062_wifi_bt_m4_DEPRECATED - cy8ckit_062_wifi_bt/cy8c6247/m4 -) -set(cy8ckit_062s4_m4_DEPRECATED - cy8ckit_062s4 -) -set(ebyte_e73_tbb_nrf52832_DEPRECATED - ebyte_e73_tbb -) -set(efm32pg_stk3402a_DEPRECATED - slstk3402a/efm32pg12b500f1024gl125 -) -set(efm32pg_stk3402a_jg_DEPRECATED - slstk3402a/efm32jg12b500f1024gl125 -) -set(efm32hg_slstk3400a_DEPRECATED - slstk3400a -) -set(efm32pg_stk3401a_DEPRECATED - slstk3401a -) -set(efm32gg_stk3701a_DEPRECATED - slstk3701a -) -set(efm32gg_slwstk6121a_DEPRECATED - slwrb4321a -) -set(efr32_radio_brd4104a_DEPRECATED - slwrb4104a -) -set(efr32_radio_brd4161a_DEPRECATED - slwrb4161a -) -set(efr32_radio_brd4170a_DEPRECATED - slwrb4170a -) -set(efr32_radio_brd4180a_DEPRECATED - slwrb4180a -) -set(efr32_radio_brd4187c_DEPRECATED - xg24_rb4187c -) -set(efr32_radio_brd4250b_DEPRECATED - slwrb4250b -) -set(efr32_radio_brd4255a_DEPRECATED - slwrb4255a -) -set(efm32gg_sltb009a_DEPRECATED - sltb009a -) -set(efr32mg_sltb004a_DEPRECATED - sltb004a -) -set(efr32bg22_brd4184a_DEPRECATED - sltb010a@0 -) -set(efr32bg22_brd4184b_DEPRECATED - sltb010a@2 -) -set(efr32xg24_dk2601b_DEPRECATED - xg24_dk2601b -) -set(efr32bg27_brd2602a_DEPRECATED - xg27_dk2602a -) -set(em_starterkit_DEPRECATED - em_starterkit/emsk_em9d -) -set(em_starterkit_em11d_DEPRECATED - em_starterkit@2.3/emsk_em11d -) -set(em_starterkit_em7d_DEPRECATED - em_starterkit@2.3/emsk_em7d -) -set(em_starterkit_em7d_v22_DEPRECATED - em_starterkit@2.2/emsk_em7d -) -set(emsdp_DEPRECATED - emsdp/emsdp_em11d -) -set(emsdp_em4_DEPRECATED - emsdp/emsdp_em4 -) -set(emsdp_em5d_DEPRECATED - emsdp/emsdp_em5d -) -set(emsdp_em6_DEPRECATED - emsdp/emsdp_em6 -) -set(emsdp_em7d_DEPRECATED - emsdp/emsdp_em7d -) -set(emsdp_em7d_esp_DEPRECATED - emsdp/emsdp_em7d_esp -) -set(emsdp_em9d_DEPRECATED - emsdp/emsdp_em9d -) -set(esp32_DEPRECATED - esp32_devkitc_wrover/esp32/procpu -) -set(esp32_devkitc_wroom_DEPRECATED - esp32_devkitc_wroom/esp32/procpu -) -set(esp32_devkitc_wroom_appcpu_DEPRECATED - esp32_devkitc_wroom/esp32/appcpu -) -set(esp32_devkitc_wrover_DEPRECATED - esp32_devkitc_wrover/esp32/procpu -) -set(esp32_devkitc_wrover_appcpu_DEPRECATED - esp32_devkitc_wrover/esp32/appcpu -) -set(esp32_ethernet_kit_DEPRECATED - esp32_ethernet_kit/esp32/procpu -) -set(esp32c3_luatos_core_usb_DEPRECATED - esp32c3_luatos_core/esp32c3/usb -) -set(esp32s3_devkitm_DEPRECATED - esp32s3_devkitm/esp32s3/procpu -) -set(esp32s3_devkitm_appcpu_DEPRECATED - esp32s3_devkitm/esp32s3/appcpu -) -set(esp32s3_luatos_core_DEPRECATED - esp32s3_luatos_core/esp32s3/procpu -) -set(esp32s3_luatos_core_usb_DEPRECATED - esp32s3_luatos_core/esp32s3/procpu/usb -) -set(esp_wrover_kit_DEPRECATED - esp_wrover_kit/esp32/procpu -) -set(fvp_base_revc_2xaemv8a_smp_ns_DEPRECATED - fvp_base_revc_2xaemv8a/fvp_base_revc_2xaemv8a/smp/ns -) -set(fvp_baser_aemv8r_DEPRECATED - fvp_baser_aemv8r/fvp_aemv8r_aarch64 -) -set(fvp_baser_aemv8r_aarch32_DEPRECATED - fvp_baser_aemv8r/fvp_aemv8r_aarch32 -) -set(fvp_baser_aemv8r_aarch32_smp_DEPRECATED - fvp_baser_aemv8r/fvp_aemv8r_aarch32/smp -) -set(fvp_baser_aemv8r_smp_DEPRECATED - fvp_baser_aemv8r/fvp_aemv8r_aarch64/smp -) -set(heltec_wifi_lora32_v2_DEPRECATED - heltec_wifi_lora32_v2/esp32/procpu -) -set(heltec_wireless_stick_lite_v3_DEPRECATED - heltec_wireless_stick_lite_v3/esp32s3/procpu -) -set(hexiwear_k64_DEPRECATED - hexiwear/mk64f12 -) -set(hexiwear_kw40z_DEPRECATED - hexiwear/mkw40z4 -) -set(hifive1_revb_DEPRECATED - hifive1@B -) -set(hsdk_2cores_DEPRECATED - hsdk/arc_hsdk/2cores -) -set(intel_adsp_ace15_mtpm_DEPRECATED - intel_adsp/ace15_mtpm -) -set(intel_adsp_ace20_lnl_DEPRECATED - intel_adsp/ace20_lnl -) -set(intel_adsp_cavs25_DEPRECATED - intel_adsp/cavs25 -) -set(intel_adsp_cavs25_tgph_DEPRECATED - intel_adsp/cavs25/tgph -) -set(intel_ehl_crb_sbl_DEPRECATED - intel_ehl_crb/elkhart_lake/sbl -) -set(kincony_kc868_a32_DEPRECATED - kincony_kc868_a32/esp32/procpu -) -set(longan_nano_lite_DEPRECATED - longan_nano/gd32vf103/lite -) -set(lpcxpresso54114_m0_DEPRECATED - lpcxpresso54114/lpc54114/m0 -) -set(lpcxpresso54114_m4_DEPRECATED - lpcxpresso54114/lpc54114/m4 -) -set(lpcxpresso55s69_cpu0_DEPRECATED - lpcxpresso55s69/lpc55s69/cpu0 -) -set(lpcxpresso55s69_cpu1_DEPRECATED - lpcxpresso55s69/lpc55s69/cpu1 -) -set(lpcxpresso55s69_ns_DEPRECATED - lpcxpresso55s69/lpc55s69/cpu0/ns -) -set(m5stack_atoms3_DEPRECATED - m5stack_atoms3/esp32s3/procpu -) -set(m5stack_atoms3_lite_DEPRECATED - m5stack_atoms3_lite/esp32s3/procpu -) -set(m5stack_core2_DEPRECATED - m5stack_core2/esp32/procpu -) -set(m5stack_stamps3_DEPRECATED - m5stack_stamps3/esp32s3/procpu -) -set(m5stickc_plus_DEPRECATED - m5stickc_plus/esp32/procpu -) -set(mimx8mm_evk_DEPRECATED - imx8mm_evk/mimx8mm6/m4 -) -set(mimx8mm_evk_a53_DEPRECATED - imx8mm_evk/mimx8mm6/a53 -) -set(mimx8mm_evk_a53_smp_DEPRECATED - imx8mm_evk/mimx8mm6/a53/smp -) -set(mimx8mm_phyboard_polis_DEPRECATED - phyboard_polis/mimx8mm6/m4 -) -set(mimx8mn_evk_a53_DEPRECATED - imx8mn_evk/mimx8mn6/a53 -) -set(mimx8mn_evk_a53_smp_DEPRECATED - imx8mn_evk/mimx8mn6/a53/smp -) -set(mimx8mp_evk_a53_DEPRECATED - imx8mp_evk/mimx8ml8/a53 -) -set(mimx8mp_evk_a53_smp_DEPRECATED - imx8mp_evk/mimx8ml8/a53/smp -) -set(mimx8mp_evk_ddr_DEPRECATED - imx8mp_evk/mimx8ml8/m7/ddr -) -set(mimx8mp_evk_itcm_DEPRECATED - imx8mp_evk/mimx8ml8/m7 -) -set(mimx8mp_phyboard_pollux_DEPRECATED - phyboard_pollux/mimx8ml8/m7 -) -set(mimx8mq_evk_cm4_DEPRECATED - imx8mq_evk/mimx8mq6/m4 -) -set(mimx93_evk_a55_DEPRECATED - imx93_evk/mimx9352/a55 -) -set(mimxrt1050_evk_qspi_DEPRECATED - mimxrt1050_evk@qspi -) -set(mimxrt1060_evk_hyperflash_DEPRECATED - mimxrt1060_evk@hyperflash -) -set(mimxrt1160_evk_cm4_DEPRECATED - mimxrt1160_evk/mimxrt1166/cm4 -) -set(mimxrt1160_evk_cm7_DEPRECATED - mimxrt1160_evk/mimxrt1166/cm7 -) -set(mimxrt1170_evk_cm4_DEPRECATED - mimxrt1170_evk@A/mimxrt1176/cm4 -) -set(mimxrt1170_evk_cm7_DEPRECATED - mimxrt1170_evk@A/mimxrt1176/cm7 -) -set(mimxrt1170_evkb_cm4_DEPRECATED - mimxrt1170_evk@B/mimxrt1176/cm4 -) -set(mimxrt1170_evkb_cm7_DEPRECATED - mimxrt1170_evk@B/mimxrt1176/cm7 -) -set(mimxrt595_evk_cm33_DEPRECATED - mimxrt595_evk/mimxrt595s/cm33 -) -set(mimxrt685_evk_cm33_DEPRECATED - mimxrt685_evk/mimxrt685s/cm33 -) -set(mps2_an385_DEPRECATED - mps2/an385 -) -set(mps2_an521_DEPRECATED - mps2/an521/cpu0 -) -set(mps2_an521_ns_DEPRECATED - mps2/an521/cpu0/ns -) -set(mps2_an521_remote_DEPRECATED - mps2/an521/cpu1 -) -set(mps3_an547_DEPRECATED - mps3/corstone300/547 -) -set(mps3_an547_ns_DEPRECATED - mps3/corstone300/an547/ns -) - -set(native_posix_64_DEPRECATED - native_posix/native/64 -) - -set(native_sim_64_DEPRECATED - native_sim/native/64 -) - -set(nrf21540dk_nrf52840_DEPRECATED - nrf21540dk -) -set(nrf51dk_nrf51422_DEPRECATED - nrf51dk -) -set(nrf51dongle_nrf51422_DEPRECATED - nrf51dongle -) -set(nrf52833dk_nrf52820_DEPRECATED - nrf52833dk/nrf52820 -) -set(nrf52833dk_nrf52833_DEPRECATED - nrf52833dk/nrf52833 -) -set(nrf52840dk_nrf52811_DEPRECATED - nrf52840dk/nrf52811 -) -set(nrf52840dk_nrf52840_DEPRECATED - nrf52840dk/nrf52840 -) -set(nrf52840dongle_nrf52840_DEPRECATED - nrf52840dongle -) -set(nrf52dk_nrf52805_DEPRECATED - nrf52dk/nrf52805 -) -set(nrf52dk_nrf52810_DEPRECATED - nrf52dk/nrf52810 -) -set(nrf52dk_nrf52832_DEPRECATED - nrf52dk/nrf52832 -) -set(nrf5340_audio_dk_nrf5340_cpuapp_DEPRECATED - nrf5340_audio_dk/nrf5340/cpuapp -) -set(nrf5340_audio_dk_nrf5340_cpuapp_ns_DEPRECATED - nrf5340_audio_dk/nrf5340/cpuapp/ns -) -set(nrf5340_audio_dk_nrf5340_cpunet_DEPRECATED - nrf5340_audio_dk/nrf5340/cpunet -) -set(nrf5340bsim_nrf5340_cpuapp_DEPRECATED - nrf5340bsim/nrf5340/cpuapp -) -set(nrf5340bsim_nrf5340_cpunet_DEPRECATED - nrf5340bsim/nrf5340/cpunet -) -set(nrf5340dk_nrf5340_cpuapp_DEPRECATED - nrf5340dk/nrf5340/cpuapp -) -set(nrf5340dk_nrf5340_cpuapp_ns_DEPRECATED - nrf5340dk/nrf5340/cpuapp/ns -) -set(nrf5340dk_nrf5340_cpunet_DEPRECATED - nrf5340dk/nrf5340/cpunet -) -set(nrf9131ek_nrf9131_DEPRECATED - nrf9131ek -) -set(nrf9131ek_nrf9131_ns_DEPRECATED - nrf9131ek/nrf9131/ns -) -set(nrf9151dk_nrf9151_DEPRECATED - nrf9151dk -) -set(nrf9151dk_nrf9151_ns_DEPRECATED - nrf9151dk/nrf9151/ns -) -set(nrf9160_innblue21_DEPRECATED - innblue21 -) -set(nrf9160_innblue21_ns_DEPRECATED - innblue21/nrf9160/ns -) -set(nrf9160_innblue22_DEPRECATED - innblue22 -) -set(nrf9160_innblue22_ns_DEPRECATED - innblue22/nrf9160/ns -) -set(nrf9160dk_nrf52840_DEPRECATED - nrf9160dk/nrf52840 -) -set(nrf9160dk_nrf9160_DEPRECATED - nrf9160dk/nrf9160 -) -set(nrf9160dk_nrf9160_ns_DEPRECATED - nrf9160dk/nrf9160/ns -) -set(nrf9161dk_nrf9161_DEPRECATED - nrf9161dk -) -set(nrf9161dk_nrf9161_ns_DEPRECATED - nrf9161dk/nrf9161/ns -) -set(nsim_em_DEPRECATED - nsim/nsim_em -) -set(nsim_em11d_DEPRECATED - nsim/nsim_em11d -) -set(nsim_em7d_v22_DEPRECATED - nsim/nsim_em7d_v22 -) -set(nsim_hs_DEPRECATED - nsim/nsim_hs -) -set(nsim_hs3x_hostlink_DEPRECATED - nsim/nsim_hs/hostlink -) -set(nsim_hs5x_DEPRECATED - nsim/nsim_hs5x -) -set(nsim_hs5x_smp_DEPRECATED - nsim/nsim_hs5x/smp -) -set(nsim_hs5x_smp_12cores_DEPRECATED - nsim/nsim_hs5x/smp/12cores -) -set(nsim_hs6x_DEPRECATED - nsim/nsim_hs6x -) -set(nsim_hs6x_smp_DEPRECATED - nsim/nsim_hs6x/smp -) -set(nsim_hs6x_smp_12cores_DEPRECATED - nsim/nsim_hs6x/smp/12cores -) -set(nsim_hs_flash_xip_DEPRECATED - nsim/nsim_hs/flash_xip -) -set(nsim_hs_mpuv6_DEPRECATED - nsim/nsim_hs/mpuv6 -) -set(nsim_hs_smp_DEPRECATED - nsim/nsim_hs/smp -) -set(nsim_hs_sram_DEPRECATED - nsim/nsim_hs/sram -) -set(nsim_sem_DEPRECATED - nsim/nsim_sem -) -set(nsim_sem_mpu_stack_guard_DEPRECATED - nsim/nsim_sem/mpu_stack_guard -) -set(nsim_vpx5_DEPRECATED - nsim/nsim_vpx5 -) -set(nucleo_h745zi_q_m4_DEPRECATED - nucleo_h745zi_q/stm32h745xx/m4 -) -set(nucleo_h745zi_q_m7_DEPRECATED - nucleo_h745zi_q/stm32h745xx/m7 -) -set(nucleo_l452re_p_DEPRECATED - nucleo_l452re/stm32l452xx/p -) -set(nucleo_l552ze_q_ns_DEPRECATED - nucleo_l552ze_q/stm32l552xx/ns -) -set(nuvoton_pfm_m487_DEPRECATED - numaker_pfm_m487 -) -set(nxp_adsp_imx8_DEPRECATED - imx8qm_mek/mimx8qm6/adsp -) -set(nxp_adsp_imx8m_DEPRECATED - imx8mp_evk/mimx8ml8/adsp -) -set(nxp_adsp_imx8ulp_DEPRECATED - imx8ulp_evk/mimx8ud7/adsp -) -set(nxp_adsp_imx8x_DEPRECATED - imx8qxp_mek/mimx8qx6/adsp -) -set(nxp_adsp_rt595_DEPRECATED - mimxrt595_evk/mimxrt595s/f1 -) -set(nxp_ls1046ardb_DEPRECATED - ls1046ardb -) -set(nxp_ls1046ardb_smp_2cores_DEPRECATED - ls1046ardb/ls1046a/smp -) -set(nxp_ls1046ardb_smp_4cores_DEPRECATED - ls1046ardb/ls1046a/smp/4cores -) -set(odroid_go_DEPRECATED - odroid_go/esp32/procpu -) -set(olimex_esp32_evb_DEPRECATED - olimex_esp32_evb/esp32/procpu -) -set(pan1783_evb_cpuapp_DEPRECATED - pan1783_evb/nrf5340/cpuapp -) -set(pan1783_evb_cpunet_DEPRECATED - pan1783_evb/nrf5340/cpunet -) -set(pan1783a_evb_cpuapp_DEPRECATED - pan1783a_evb/nrf5340/cpuapp -) -set(pan1783a_evb_cpunet_DEPRECATED - pan1783a_evb/nrf5340/cpunet -) -set(pan1783a_pa_evb_cpuapp_DEPRECATED - pan1783a_pa_evb/nrf5340/cpuapp -) -set(pan1783a_pa_evb_cpunet_DEPRECATED - pan1783a_pa_evb/nrf5340/cpunet -) -set(phycore_am62x_a53_DEPRECATED - phyboard_lyra/am6234/a53 -) -set(pico_pi_m4_DEPRECATED - pico_pi/mcimx7d/m4 -) -set(qemu_arc_em_DEPRECATED - qemu_arc/qemu_arc_em -) -set(qemu_arc_hs_DEPRECATED - qemu_arc/qemu_arc_hs -) -set(qemu_arc_hs5x_DEPRECATED - qemu_arc/qemu_arc_hs5x -) -set(qemu_arc_hs6x_DEPRECATED - qemu_arc/qemu_arc_hs6x -) -set(qemu_arc_hs_xip_DEPRECATED - qemu_arc/qemu_arc_hs/xip -) -set(qemu_cortex_a53_smp_DEPRECATED - qemu_cortex_a53/qemu_cortex_a53/smp -) -set(qemu_cortex_a53_xip_DEPRECATED - qemu_cortex_a53/qemu_cortex_a53/xip -) -set(qemu_malta_be_DEPRECATED - qemu_malta/qemu_malta/be -) -set(qemu_riscv32_smp_DEPRECATED - qemu_riscv32/qemu_virt_riscv32/smp -) -set(qemu_riscv64_smp_DEPRECATED - qemu_riscv64/qemu_virt_riscv64/smp -) -set(qemu_x86_64_nokpti_DEPRECATED - qemu_x86_64/atom/nokpti -) -set(qemu_x86_nokpti_DEPRECATED - qemu_x86/atom/nokpti -) -set(qemu_x86_nommu_DEPRECATED - qemu_x86/atom/nommu -) -set(qemu_x86_nopae_DEPRECATED - qemu_x86/atom/nopae -) -set(qemu_x86_virt_DEPRECATED - qemu_x86/atom/virt -) -set(qemu_x86_xip_DEPRECATED - qemu_x86/atom/xip -) set(qemu_xtensa_DEPRECATED qemu_xtensa/dc233c ) -set(qemu_xtensa_mmu_DEPRECATED - qemu_xtensa/dc233c/mmu -) -set(rak4631_nrf52840_DEPRECATED - rak4631 -) -set(rak5010_nrf52840_DEPRECATED - rak5010 -) -set(raytac_mdbt50q_db_33_nrf52833_DEPRECATED - raytac_mdbt50q_db_33 -) -set(raytac_mdbt50q_db_40_nrf52840_DEPRECATED - raytac_mdbt50q_db_40 -) -set(raytac_mdbt53_db_40_nrf5340_cpuapp_DEPRECATED - raytac_mdbt53_db_40/nrf5340/cpuapp -) -set(raytac_mdbt53_db_40_nrf5340_cpuapp_ns_DEPRECATED - raytac_mdbt53_db_40/nrf5340/cpuapp/ns -) -set(raytac_mdbt53_db_40_nrf5340_cpunet_DEPRECATED - raytac_mdbt53_db_40/nrf5340/cpunet -) -set(raytac_mdbt53v_db_40_nrf5340_cpuapp_DEPRECATED - raytac_mdbt53v_db_40/nrf5340/cpuapp -) -set(raytac_mdbt53v_db_40_nrf5340_cpuapp_ns_DEPRECATED - raytac_mdbt53v_db_40/nrf5340/cpuapp/ns -) -set(raytac_mdbt53v_db_40_nrf5340_cpunet_DEPRECATED - raytac_mdbt53v_db_40/nrf5340/cpunet -) -set(rcar_h3_salvatorx_cr7_DEPRECATED - rcar_salvator_x/r8a77951/r7 -) -set(rcar_h3ulcb_ca57_DEPRECATED - rcar_h3ulcb/r8a77951/a57 -) -set(rcar_h3ulcb_cr7_DEPRECATED - rcar_h3ulcb/r8a77951/r7 -) -set(rcar_salvator_xs_m3_DEPRECATED - rcar_salvator_xs -) -set(rcar_spider_cr52_DEPRECATED - rcar_spider_s4 -) -set(reel_board_v2_DEPRECATED - reel_board@2 -) -set(roc_rk3568_pc_smp_DEPRECATED - roc_rk3568_pc/rk3568/smp -) -set(rpi_pico_w_DEPRECATED - rpi_pico/rp2040/w -) -set(rv32m1_vega_ri5cy_DEPRECATED - rv32m1_vega/openisa_rv32m1/ri5cy -) -set(rv32m1_vega_zero_riscy_DEPRECATED - rv32m1_vega/openisa_rv32m1/zero_riscy -) -set(s32z270dc2_rtu0_r52_DEPRECATED - s32z2xxdc2/s32z270/rtu0 -) -set(s32z270dc2_rtu1_r52_DEPRECATED - s32z2xxdc2/s32z270/rtu1 -) -set(sam_e70_xplained_DEPRECATED - sam_e70_xplained/same70q21 -) -set(sam_e70b_xplained_DEPRECATED - sam_e70_xplained/same70q21b -) -set(sam_v71_xult_DEPRECATED - sam_v71_xult/samv71q21 -) -set(sam_v71b_xult_DEPRECATED - sam_v71_xult/samv71q21b -) -set(sparkfun_thing_plus_nrf9160_DEPRECATED - sparkfun_thing_plus -) -set(sparkfun_thing_plus_nrf9160_ns_DEPRECATED - sparkfun_thing_plus/nrf9160/ns -) -set(stm32_min_dev_black_DEPRECATED - stm32_min_dev@black -) -set(stm32_min_dev_blue_DEPRECATED - stm32_min_dev@blue -) -set(stm32h747i_disco_m4_DEPRECATED - stm32h747i_disco/stm32h747xx/m4 -) -set(stm32h747i_disco_m7_DEPRECATED - stm32h747i_disco/stm32h747xx/m7 -) -set(stm32l562e_dk_ns_DEPRECATED - stm32l562e_dk/stm32l562xx/ns -) -set(tdk_robokit1_DEPRECATED - robokit1 -) -set(thingy52_nrf52832_DEPRECATED - thingy52 -) -set(thingy53_nrf5340_cpuapp_DEPRECATED - thingy53/nrf5340/cpuapp -) -set(thingy53_nrf5340_cpuapp_ns_DEPRECATED - thingy53/nrf5340/cpuapp/ns -) -set(thingy53_nrf5340_cpunet_DEPRECATED - thingy53/nrf5340/cpunet -) -set(ubx_bmd300eval_nrf52832_DEPRECATED - ubx_bmd300eval -) -set(ubx_bmd330eval_nrf52810_DEPRECATED - ubx_bmd330eval -) -set(ubx_bmd340eval_nrf52840_DEPRECATED - ubx_bmd340eval -) -set(ubx_bmd345eval_nrf52840_DEPRECATED - ubx_bmd345eval -) -set(ubx_bmd360eval_nrf52811_DEPRECATED - ubx_bmd360eval -) -set(ubx_bmd380eval_nrf52840_DEPRECATED - ubx_bmd380eval -) -set(ubx_evkannab1_nrf52832_DEPRECATED - ubx_evkannab1 -) -set(ubx_evkninab1_nrf52832_DEPRECATED - ubx_evkninab1 -) -set(ubx_evkninab3_nrf52840_DEPRECATED - ubx_evkninab3 -) -set(ubx_evkninab4_nrf52833_DEPRECATED - ubx_evkninab4 -) -set(udoo_neo_full_m4_DEPRECATED - udoo_neo_full/mcimx6x/m4 -) -set(v2m_musca_b1_ns_DEPRECATED - v2m_musca_b1/musca_b1/ns -) -set(v2m_musca_s1_ns_DEPRECATED - v2m_musca_s1/musca_s1/ns -) -set(verdin_imx8mp_m7_ddr_DEPRECATED - verdin_imx8mp/mimx8ml8/m7/ddr -) -set(verdin_imx8mp_m7_itcm_DEPRECATED - verdin_imx8mp/mimx8ml8/m7 -) -set(vmu_rt1170_DEPRECATED - vmu_rt1170/mimxrt1176/cm7 -) -set(warp7_m4_DEPRECATED - warp7/mcimx7d/m4 -) -set(we_ophelia1ev_nrf52805_DEPRECATED - we_ophelia1ev -) -set(we_proteus2ev_nrf52832_DEPRECATED - we_proteus2ev -) -set(we_proteus3ev_nrf52840_DEPRECATED - we_proteus3ev -) -set(xenvm_gicv3_DEPRECATED - xenvm/xenvm/gicv3 -) -set(xiao_ble_sense_DEPRECATED - xiao_ble/nrf52840/sense -) -set(xiao_esp32s3_DEPRECATED - xiao_esp32s3/esp32s3/procpu -) -set(yd_esp32_DEPRECATED - yd_esp32/esp32/procpu -) set(mimx8mp_phyboard_pollux/mimx8ml8/m7_DEPRECATED phyboard_pollux/mimx8ml8/m7 ) set(mimx8mm_phyboard_polis/mimx8mm6/m4_DEPRECATED phyboard_polis/mimx8mm6/m4 ) +set(mimxrt1050_evk_DEPRECATED + mimxrt1050_evk/mimxrt1052/hyperflash +) +set(mimxrt1060_evk_DEPRECATED + mimxrt1060_evk/mimxrt1064/hyperflash +) +set(mimxrt1060_evk_DEPRECATED + mimxrt1060_evk/mimxrt1062/qspi +) +set(mimxrt1060_evkb_DEPRECATED + mimxrt1060_evk@B/mimxrt1062/qspi +) diff --git a/boards/dptechnics/walter/walter_esp32s3_appcpu.dts b/boards/dptechnics/walter/walter_esp32s3_appcpu.dts index 8135d2084909589..e7e6ff46a86f229 100644 --- a/boards/dptechnics/walter/walter_esp32s3_appcpu.dts +++ b/boards/dptechnics/walter/walter_esp32s3_appcpu.dts @@ -13,7 +13,7 @@ compatible = "espressif,esp32s3"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; zephyr,flash = &flash0; diff --git a/boards/dptechnics/walter/walter_esp32s3_procpu.dts b/boards/dptechnics/walter/walter_esp32s3_procpu.dts index 310fa5d59df8b53..8d864885e0f00d9 100644 --- a/boards/dptechnics/walter/walter_esp32s3_procpu.dts +++ b/boards/dptechnics/walter/walter_esp32s3_procpu.dts @@ -22,7 +22,7 @@ }; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &usb_serial; zephyr,shell-uart = &usb_serial; zephyr,flash = &flash0; diff --git a/boards/dptechnics/walter/walter_esp32s3_procpu.yaml b/boards/dptechnics/walter/walter_esp32s3_procpu.yaml index 839c29069a703ab..a26fa60e26b0dcf 100644 --- a/boards/dptechnics/walter/walter_esp32s3_procpu.yaml +++ b/boards/dptechnics/walter/walter_esp32s3_procpu.yaml @@ -16,8 +16,4 @@ supported: - pwm - dma - input -testing: - ignore_tags: - - net - - bluetooth vendor: dptechnics diff --git a/boards/ebyte/e73_tbb/Kconfig.defconfig b/boards/ebyte/e73_tbb/Kconfig.defconfig index d3434e975a2c06a..57d28a3f08ce895 100644 --- a/boards/ebyte/e73_tbb/Kconfig.defconfig +++ b/boards/ebyte/e73_tbb/Kconfig.defconfig @@ -6,7 +6,4 @@ if BOARD_EBYTE_E73_TBB_NRF52832 -config BT_CTLR - default BT - endif # BOARD_EBYTE_E73_TBB_NRF52832 diff --git a/boards/electronut/nrf52840_blip/Kconfig.defconfig b/boards/electronut/nrf52840_blip/Kconfig.defconfig index 91ff6042e0cfe7e..3d09e0f48e8991d 100644 --- a/boards/electronut/nrf52840_blip/Kconfig.defconfig +++ b/boards/electronut/nrf52840_blip/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_NRF52840_BLIP -config BT_CTLR - default BT - endif # BOARD_NRF52840_BLIP diff --git a/boards/electronut/nrf52840_papyr/Kconfig.defconfig b/boards/electronut/nrf52840_papyr/Kconfig.defconfig index 94d55d43358105f..d61070ea97bf52e 100644 --- a/boards/electronut/nrf52840_papyr/Kconfig.defconfig +++ b/boards/electronut/nrf52840_papyr/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_NRF52840_PAPYR -config BT_CTLR - default BT - endif # BOARD_NRF52840_PAPYR diff --git a/boards/espressif/esp32_devkitc_wroom/esp32_devkitc_wroom_appcpu.dts b/boards/espressif/esp32_devkitc_wroom/esp32_devkitc_wroom_appcpu.dts index e86ffdb90bf793e..c88ae757867fd3c 100644 --- a/boards/espressif/esp32_devkitc_wroom/esp32_devkitc_wroom_appcpu.dts +++ b/boards/espressif/esp32_devkitc_wroom/esp32_devkitc_wroom_appcpu.dts @@ -13,9 +13,11 @@ compatible = "espressif,esp32"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; diff --git a/boards/espressif/esp32_devkitc_wroom/esp32_devkitc_wroom_procpu.dts b/boards/espressif/esp32_devkitc_wroom/esp32_devkitc_wroom_procpu.dts index fb3075c028e67bc..783a8f2a7f7bf79 100644 --- a/boards/espressif/esp32_devkitc_wroom/esp32_devkitc_wroom_procpu.dts +++ b/boards/espressif/esp32_devkitc_wroom/esp32_devkitc_wroom_procpu.dts @@ -32,7 +32,7 @@ }; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/espressif/esp32_devkitc_wroom/esp32_devkitc_wroom_procpu.yaml b/boards/espressif/esp32_devkitc_wroom/esp32_devkitc_wroom_procpu.yaml index 88e22e7b170e90a..7bc3c8feb55f702 100644 --- a/boards/espressif/esp32_devkitc_wroom/esp32_devkitc_wroom_procpu.yaml +++ b/boards/espressif/esp32_devkitc_wroom/esp32_devkitc_wroom_procpu.yaml @@ -18,8 +18,4 @@ supported: - counter - entropy - input -testing: - ignore_tags: - - net - - bluetooth vendor: espressif diff --git a/boards/espressif/esp32_devkitc_wrover/esp32_devkitc_wrover_appcpu.dts b/boards/espressif/esp32_devkitc_wrover/esp32_devkitc_wrover_appcpu.dts index 81078114c97ba31..f6fb39576f2e5e1 100644 --- a/boards/espressif/esp32_devkitc_wrover/esp32_devkitc_wrover_appcpu.dts +++ b/boards/espressif/esp32_devkitc_wrover/esp32_devkitc_wrover_appcpu.dts @@ -13,9 +13,11 @@ compatible = "espressif,esp32"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; diff --git a/boards/espressif/esp32_devkitc_wrover/esp32_devkitc_wrover_procpu.dts b/boards/espressif/esp32_devkitc_wrover/esp32_devkitc_wrover_procpu.dts index df8e3c019fc5f8b..33f0f3f134b3ae4 100644 --- a/boards/espressif/esp32_devkitc_wrover/esp32_devkitc_wrover_procpu.dts +++ b/boards/espressif/esp32_devkitc_wrover/esp32_devkitc_wrover_procpu.dts @@ -9,7 +9,7 @@ #include "esp32_devkitc_wrover-pinctrl.dtsi" #include #include -#include +#include / { model = "Espressif ESP32-DevkitC WROVER-E PROCPU"; @@ -32,7 +32,7 @@ }; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/espressif/esp32_devkitc_wrover/esp32_devkitc_wrover_procpu.yaml b/boards/espressif/esp32_devkitc_wrover/esp32_devkitc_wrover_procpu.yaml index a2089253a3c6b24..62e40f71e93737a 100644 --- a/boards/espressif/esp32_devkitc_wrover/esp32_devkitc_wrover_procpu.yaml +++ b/boards/espressif/esp32_devkitc_wrover/esp32_devkitc_wrover_procpu.yaml @@ -18,8 +18,4 @@ supported: - counter - entropy - input -testing: - ignore_tags: - - net - - bluetooth vendor: espressif diff --git a/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_appcpu.dts b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_appcpu.dts index 24b4fd8271fb981..c4a99a62ef96f31 100644 --- a/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_appcpu.dts +++ b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_appcpu.dts @@ -13,9 +13,11 @@ compatible = "espressif,esp32"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; diff --git a/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_procpu.dts b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_procpu.dts index 61838ea748a2d9b..91446897fc49331 100644 --- a/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_procpu.dts +++ b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_procpu.dts @@ -19,7 +19,7 @@ }; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_procpu.yaml b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_procpu.yaml index ca098c1ef773d42..fb3c3cdd704af51 100644 --- a/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_procpu.yaml +++ b/boards/espressif/esp32_ethernet_kit/esp32_ethernet_kit_procpu.yaml @@ -10,8 +10,4 @@ supported: - uart - nvs - pwm -testing: - ignore_tags: - - net - - bluetooth vendor: espressif diff --git a/boards/espressif/esp32c3_devkitc/esp32c3_devkitc.dts b/boards/espressif/esp32c3_devkitc/esp32c3_devkitc.dts index c009ccb0d0a5db8..86326fcc077f082 100644 --- a/boards/espressif/esp32c3_devkitc/esp32c3_devkitc.dts +++ b/boards/espressif/esp32c3_devkitc/esp32c3_devkitc.dts @@ -16,7 +16,7 @@ compatible = "espressif,esp32c3"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/espressif/esp32c3_devkitc/esp32c3_devkitc.yaml b/boards/espressif/esp32c3_devkitc/esp32c3_devkitc.yaml index 876ee7885537574..f2b98e3e4ed676e 100644 --- a/boards/espressif/esp32c3_devkitc/esp32c3_devkitc.yaml +++ b/boards/espressif/esp32c3_devkitc/esp32c3_devkitc.yaml @@ -15,8 +15,4 @@ supported: - spi - counter - entropy -testing: - ignore_tags: - - net - - bluetooth vendor: espressif diff --git a/boards/espressif/esp32c3_devkitm/esp32c3_devkitm.dts b/boards/espressif/esp32c3_devkitm/esp32c3_devkitm.dts index 3cc7c5218dea2fd..25bd583daee3d9b 100644 --- a/boards/espressif/esp32c3_devkitm/esp32c3_devkitm.dts +++ b/boards/espressif/esp32c3_devkitm/esp32c3_devkitm.dts @@ -16,7 +16,7 @@ compatible = "espressif,esp32c3"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/espressif/esp32c3_devkitm/esp32c3_devkitm.yaml b/boards/espressif/esp32c3_devkitm/esp32c3_devkitm.yaml index 49ba690a56348d4..38153891381d8e6 100644 --- a/boards/espressif/esp32c3_devkitm/esp32c3_devkitm.yaml +++ b/boards/espressif/esp32c3_devkitm/esp32c3_devkitm.yaml @@ -16,8 +16,4 @@ supported: - spi - counter - entropy -testing: - ignore_tags: - - net - - bluetooth vendor: espressif diff --git a/boards/espressif/esp32c3_rust/esp32c3_rust.dts b/boards/espressif/esp32c3_rust/esp32c3_rust.dts index 5d397f3e1c9c5f3..867fa84adcf63d3 100644 --- a/boards/espressif/esp32c3_rust/esp32c3_rust.dts +++ b/boards/espressif/esp32c3_rust/esp32c3_rust.dts @@ -17,7 +17,7 @@ compatible = "espressif,esp32c3_rust"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &usb_serial; zephyr,shell-uart = &usb_serial; zephyr,flash = &flash0; diff --git a/boards/espressif/esp32c3_rust/esp32c3_rust.yaml b/boards/espressif/esp32c3_rust/esp32c3_rust.yaml index fedd0178f45d679..a82552337b42afb 100644 --- a/boards/espressif/esp32c3_rust/esp32c3_rust.yaml +++ b/boards/espressif/esp32c3_rust/esp32c3_rust.yaml @@ -18,8 +18,4 @@ supported: - spi - counter - entropy -testing: - ignore_tags: - - net - - bluetooth vendor: espressif diff --git a/boards/espressif/esp32c6_devkitc/doc/index.rst b/boards/espressif/esp32c6_devkitc/doc/index.rst index 4ba1e0c7d949a02..ecbc45733602fac 100644 --- a/boards/espressif/esp32c6_devkitc/doc/index.rst +++ b/boards/espressif/esp32c6_devkitc/doc/index.rst @@ -99,10 +99,16 @@ Current Zephyr's ESP32-C6-DevKitC board supports the following features: +------------+------------+-------------------------------------+ | SPI Master | on-chip | spi | +------------+------------+-------------------------------------+ +| I2C | on-chip | i2c | ++------------+------------+-------------------------------------+ +| Timers | on-chip | counter | ++------------+------------+-------------------------------------+ | Watchdog | on-chip | watchdog | +------------+------------+-------------------------------------+ | LEDC | on-chip | pwm | +------------+------------+-------------------------------------+ +| MCPWM | on-chip | pwm | ++------------+------------+-------------------------------------+ | SPI DMA | on-chip | spi | +------------+------------+-------------------------------------+ | GDMA | on-chip | dma | diff --git a/boards/espressif/esp32c6_devkitc/esp32c6_devkitc-pinctrl.dtsi b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc-pinctrl.dtsi index a9cda93d22a3527..5265d5ef97280eb 100644 --- a/boards/espressif/esp32c6_devkitc/esp32c6_devkitc-pinctrl.dtsi +++ b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc-pinctrl.dtsi @@ -32,4 +32,14 @@ output-low; }; }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; }; diff --git a/boards/espressif/esp32c6_devkitc/esp32c6_devkitc.dts b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc.dts index a00de99e2b52cc8..896ae30530cc93d 100644 --- a/boards/espressif/esp32c6_devkitc/esp32c6_devkitc.dts +++ b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc.dts @@ -16,7 +16,7 @@ compatible = "espressif,esp32c6"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sramhp; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; @@ -49,6 +49,13 @@ status = "okay"; }; +&i2c0 { + status = "okay"; + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; +}; + &spi2 { #address-cells = <1>; #size-cells = <0>; diff --git a/boards/espressif/esp32c6_devkitc/esp32c6_devkitc.yaml b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc.yaml index e72471a02edd207..f36685e8367d6bb 100644 --- a/boards/espressif/esp32c6_devkitc/esp32c6_devkitc.yaml +++ b/boards/espressif/esp32c6_devkitc/esp32c6_devkitc.yaml @@ -10,10 +10,8 @@ supported: - watchdog - uart - dma + - pwm - spi + - counter - entropy -testing: - ignore_tags: - - net - - bluetooth - - tracing + - i2c diff --git a/boards/espressif/esp32s2_devkitc/Kconfig.defconfig b/boards/espressif/esp32s2_devkitc/Kconfig.defconfig deleted file mode 100644 index c7fa706256161ff..000000000000000 --- a/boards/espressif/esp32s2_devkitc/Kconfig.defconfig +++ /dev/null @@ -1,7 +0,0 @@ -# ESP32S2 DevKitC board configuration - -# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. -# SPDX-License-Identifier: Apache-2.0 - -config ENTROPY_GENERATOR - default y diff --git a/boards/espressif/esp32s2_devkitc/esp32s2_devkitc.yaml b/boards/espressif/esp32s2_devkitc/esp32s2_devkitc.yaml index 482d8ad5ec2cba3..44a6f971e3b7449 100644 --- a/boards/espressif/esp32s2_devkitc/esp32s2_devkitc.yaml +++ b/boards/espressif/esp32s2_devkitc/esp32s2_devkitc.yaml @@ -19,8 +19,4 @@ supported: - input - can - dma -testing: - ignore_tags: - - net - - bluetooth vendor: espressif diff --git a/boards/espressif/esp32s2_saola/Kconfig.defconfig b/boards/espressif/esp32s2_saola/Kconfig.defconfig deleted file mode 100644 index ffa2b0d832cc46e..000000000000000 --- a/boards/espressif/esp32s2_saola/Kconfig.defconfig +++ /dev/null @@ -1,7 +0,0 @@ -# ESP32S2 Saola board configuration - -# Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. -# SPDX-License-Identifier: Apache-2.0 - -config ENTROPY_GENERATOR - default y diff --git a/boards/espressif/esp32s2_saola/esp32s2_saola.yaml b/boards/espressif/esp32s2_saola/esp32s2_saola.yaml index 1e1e391bb0e22cb..bebe2a293a8a8a0 100644 --- a/boards/espressif/esp32s2_saola/esp32s2_saola.yaml +++ b/boards/espressif/esp32s2_saola/esp32s2_saola.yaml @@ -17,8 +17,4 @@ supported: - counter - entropy - input -testing: - ignore_tags: - - net - - bluetooth vendor: espressif diff --git a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu.dts b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu.dts index f105a0f8658b2c0..bac7de229b331b6 100644 --- a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu.dts +++ b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_appcpu.dts @@ -14,7 +14,7 @@ compatible = "espressif,esp32s3"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; zephyr,flash = &flash0; diff --git a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu.dts b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu.dts index 99810fa22c75c85..48806ab5a4c718c 100644 --- a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu.dts +++ b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu.dts @@ -21,7 +21,7 @@ }; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu.yaml b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu.yaml index 2a5e48d464f5c1c..ae1de5034e7e409 100644 --- a/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu.yaml +++ b/boards/espressif/esp32s3_devkitc/esp32s3_devkitc_procpu.yaml @@ -17,8 +17,4 @@ supported: - pwm - dma - input -testing: - ignore_tags: - - net - - bluetooth vendor: espressif diff --git a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts index 4946139c8c6e621..08a9e005be31b1e 100644 --- a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts +++ b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_appcpu.dts @@ -14,7 +14,7 @@ compatible = "espressif,esp32s3"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; zephyr,flash = &flash0; diff --git a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu.dts b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu.dts index 7b758eedd4d4474..89c5b8c16418284 100644 --- a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu.dts +++ b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu.dts @@ -21,7 +21,7 @@ }; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu.yaml b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu.yaml index 084f6f7539e4b90..e153c2e9f81780a 100644 --- a/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu.yaml +++ b/boards/espressif/esp32s3_devkitm/esp32s3_devkitm_procpu.yaml @@ -18,8 +18,4 @@ supported: - dma - input - video -testing: - ignore_tags: - - net - - bluetooth vendor: espressif diff --git a/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu.dts b/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu.dts index cd14ce2ea493697..8e323c4e463616f 100644 --- a/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu.dts +++ b/boards/espressif/esp32s3_eye/esp32s3_eye_appcpu.dts @@ -13,7 +13,7 @@ compatible = "espressif,esp32s3"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; zephyr,flash = &flash0; diff --git a/boards/espressif/esp32s3_eye/esp32s3_eye_procpu.dts b/boards/espressif/esp32s3_eye/esp32s3_eye_procpu.dts index df053757ee4f5c8..1b2afa8b83af02e 100644 --- a/boards/espressif/esp32s3_eye/esp32s3_eye_procpu.dts +++ b/boards/espressif/esp32s3_eye/esp32s3_eye_procpu.dts @@ -24,7 +24,7 @@ }; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &usb_serial; zephyr,shell-uart = &usb_serial; zephyr,flash = &flash0; diff --git a/boards/espressif/esp32s3_eye/esp32s3_eye_procpu.yaml b/boards/espressif/esp32s3_eye/esp32s3_eye_procpu.yaml index 089082c42e505c0..1159b63942b3b49 100644 --- a/boards/espressif/esp32s3_eye/esp32s3_eye_procpu.yaml +++ b/boards/espressif/esp32s3_eye/esp32s3_eye_procpu.yaml @@ -17,8 +17,4 @@ supported: - dma - input - video -testing: - ignore_tags: - - net - - bluetooth vendor: espressif diff --git a/boards/espressif/esp8684_devkitm/esp8684_devkitm.dts b/boards/espressif/esp8684_devkitm/esp8684_devkitm.dts index 0b52a3d2b86f1ed..a6a76ac4756bc7f 100644 --- a/boards/espressif/esp8684_devkitm/esp8684_devkitm.dts +++ b/boards/espressif/esp8684_devkitm/esp8684_devkitm.dts @@ -16,7 +16,7 @@ compatible = "espressif,esp32c2"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/espressif/esp8684_devkitm/esp8684_devkitm.yaml b/boards/espressif/esp8684_devkitm/esp8684_devkitm.yaml index e689bbfe6c13d57..3344e8d5e2c2d06 100644 --- a/boards/espressif/esp8684_devkitm/esp8684_devkitm.yaml +++ b/boards/espressif/esp8684_devkitm/esp8684_devkitm.yaml @@ -12,8 +12,4 @@ supported: - entropy - pwm - spi -testing: - ignore_tags: - - net - - bluetooth vendor: espressif diff --git a/boards/espressif/esp_wrover_kit/esp_wrover_kit_appcpu.dts b/boards/espressif/esp_wrover_kit/esp_wrover_kit_appcpu.dts index 154857f15e911b5..903f48f308e4360 100644 --- a/boards/espressif/esp_wrover_kit/esp_wrover_kit_appcpu.dts +++ b/boards/espressif/esp_wrover_kit/esp_wrover_kit_appcpu.dts @@ -13,9 +13,11 @@ compatible = "espressif,esp32"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; diff --git a/boards/espressif/esp_wrover_kit/esp_wrover_kit_procpu.dts b/boards/espressif/esp_wrover_kit/esp_wrover_kit_procpu.dts index 3d37df9d5a7d94b..614bd1ec54f5408 100644 --- a/boards/espressif/esp_wrover_kit/esp_wrover_kit_procpu.dts +++ b/boards/espressif/esp_wrover_kit/esp_wrover_kit_procpu.dts @@ -7,7 +7,7 @@ #include #include "esp_wrover_kit-pinctrl.dtsi" -#include +#include / { model = "Espressif ESP32-Wrover-Kit PROCPU"; @@ -30,7 +30,7 @@ }; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/espressif/esp_wrover_kit/esp_wrover_kit_procpu.yaml b/boards/espressif/esp_wrover_kit/esp_wrover_kit_procpu.yaml index d316dd1b8d0293c..88bcdc3289b18b8 100644 --- a/boards/espressif/esp_wrover_kit/esp_wrover_kit_procpu.yaml +++ b/boards/espressif/esp_wrover_kit/esp_wrover_kit_procpu.yaml @@ -17,8 +17,4 @@ supported: - spi - counter - entropy -testing: - ignore_tags: - - net - - bluetooth vendor: espressif diff --git a/boards/ezurio/bl5340_dvk/Kconfig.defconfig b/boards/ezurio/bl5340_dvk/Kconfig.defconfig index 0fbab1479620855..b71b51265b91696 100644 --- a/boards/ezurio/bl5340_dvk/Kconfig.defconfig +++ b/boards/ezurio/bl5340_dvk/Kconfig.defconfig @@ -101,11 +101,6 @@ endif # BOARD_BL5340_DVK_NRF5340_CPUAPP || BOARD_BL5340_DVK_NRF5340_CPUAPP_NS if BOARD_BL5340_DVK_NRF5340_CPUNET -# BT_CTLR depends on BT. When BT is enabled we should default to also -# enabling the controller. -config BT_CTLR - default y if BT - config BT_ECC default y if BT diff --git a/boards/ezurio/bl652_dvk/Kconfig.defconfig b/boards/ezurio/bl652_dvk/Kconfig.defconfig index 62fac3e6c21d512..e7e6afee009e2ac 100644 --- a/boards/ezurio/bl652_dvk/Kconfig.defconfig +++ b/boards/ezurio/bl652_dvk/Kconfig.defconfig @@ -5,9 +5,6 @@ if BOARD_BL652_DVK -config BT_CTLR - default BT - if DAC config I2C diff --git a/boards/ezurio/bl653_dvk/Kconfig.defconfig b/boards/ezurio/bl653_dvk/Kconfig.defconfig index 43f19f65a6d6e76..b2a37d4a6e31a73 100644 --- a/boards/ezurio/bl653_dvk/Kconfig.defconfig +++ b/boards/ezurio/bl653_dvk/Kconfig.defconfig @@ -5,9 +5,6 @@ if BOARD_BL653_DVK -config BT_CTLR - default BT - if DAC config I2C diff --git a/boards/ezurio/bl654_dvk/Kconfig.defconfig b/boards/ezurio/bl654_dvk/Kconfig.defconfig index dbd4fb812f0536a..c4b8594f891ae08 100644 --- a/boards/ezurio/bl654_dvk/Kconfig.defconfig +++ b/boards/ezurio/bl654_dvk/Kconfig.defconfig @@ -5,9 +5,6 @@ if BOARD_BL654_DVK -config BT_CTLR - default BT - if DAC config I2C diff --git a/boards/ezurio/bl654_sensor_board/Kconfig.defconfig b/boards/ezurio/bl654_sensor_board/Kconfig.defconfig index 3ac458bcec99e25..ecdc77a2cdd5393 100644 --- a/boards/ezurio/bl654_sensor_board/Kconfig.defconfig +++ b/boards/ezurio/bl654_sensor_board/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_BL654_SENSOR_BOARD -config BT_CTLR - default BT - endif # BOARD_BL654_SENSOR_BOARD diff --git a/boards/ezurio/bl654_usb/Kconfig b/boards/ezurio/bl654_usb/Kconfig deleted file mode 100644 index c9779a44da9bb5f..000000000000000 --- a/boards/ezurio/bl654_usb/Kconfig +++ /dev/null @@ -1,10 +0,0 @@ -# BL654 USB adapter board configuration - -# Copyright (c) 2021 Laird Connectivity -# SPDX-License-Identifier: Apache-2.0 - -config BL654_USB_SERIAL_BACKEND_CDCACM - bool "Use CDC ACM UART as backend for BL654 USB adapter" - default y if !USB_DEVICE_BLUETOOTH - help - Use CDC ACM UART as backend for console or shell. diff --git a/boards/ezurio/bl654_usb/Kconfig.defconfig b/boards/ezurio/bl654_usb/Kconfig.defconfig index baf624a0c5a4600..7b1a677095066b9 100644 --- a/boards/ezurio/bl654_usb/Kconfig.defconfig +++ b/boards/ezurio/bl654_usb/Kconfig.defconfig @@ -25,35 +25,6 @@ config FLASH_LOAD_SIZE default 0xdf000 depends on !USE_DT_CODE_PARTITION -config USB_CDC_ACM - default n if USB_DEVICE_BLUETOOTH - -if BL654_USB_SERIAL_BACKEND_CDCACM - -config UART_CONSOLE - default CONSOLE - -config USB_DEVICE_INITIALIZE_AT_BOOT - default y if !MCUBOOT - -config SHELL_BACKEND_SERIAL_CHECK_DTR - default SHELL - depends on UART_LINE_CTRL - -config UART_LINE_CTRL - default SHELL - -# Logger cannot use itself to log -config USB_CDC_ACM_LOG_LEVEL - default 0 - -# Set USB log level to error only -config USB_DEVICE_LOG_LEVEL - default 1 - -endif #BL654_USB_SERIAL_BACKEND_CDCACM - -config BT_CTLR - default BT +source "boards/common/usb/Kconfig.cdc_acm_serial.defconfig" endif # BOARD_BL654_USB diff --git a/boards/ezurio/bl654_usb/bl654_usb.dts b/boards/ezurio/bl654_usb/bl654_usb.dts index a6f81f64e616ba0..6ce352bda6d1bdf 100644 --- a/boards/ezurio/bl654_usb/bl654_usb.dts +++ b/boards/ezurio/bl654_usb/bl654_usb.dts @@ -16,9 +16,6 @@ chosen { zephyr,sram = &sram0; zephyr,flash = &flash0; - zephyr,console = &bl654_cdc_acm_uart; - zephyr,shell-uart = &bl654_cdc_acm_uart; - zephyr,bt-c2h-uart = &bl654_cdc_acm_uart; zephyr,code-partition = &slot0_partition; zephyr,ieee802154 = &ieee802154; }; @@ -118,8 +115,6 @@ zephyr_udc0: &usbd { compatible = "nordic,nrf-usbd"; status = "okay"; - - bl654_cdc_acm_uart: bl654_cdc_acm_uart { - compatible = "zephyr,cdc-acm-uart"; - }; }; + +#include <../boards/common/usb/cdc_acm_serial.dtsi> diff --git a/boards/ezurio/bl654_usb/bl654_usb_defconfig b/boards/ezurio/bl654_usb/bl654_usb_defconfig index ba7d61d55be66b3..053eb9dafdbae49 100644 --- a/boards/ezurio/bl654_usb/bl654_usb_defconfig +++ b/boards/ezurio/bl654_usb/bl654_usb_defconfig @@ -13,9 +13,6 @@ CONFIG_CONSOLE=y # Enable GPIO CONFIG_GPIO=y -# Enable USB -CONFIG_USB_DEVICE_STACK=y - # 32KHz clock source CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=y CONFIG_CLOCK_CONTROL_NRF_K32SRC_150PPM=y diff --git a/boards/ezurio/bt510/Kconfig.defconfig b/boards/ezurio/bt510/Kconfig.defconfig index 70cb87fa1f776f4..42cd1488a222e72 100644 --- a/boards/ezurio/bt510/Kconfig.defconfig +++ b/boards/ezurio/bt510/Kconfig.defconfig @@ -5,9 +5,6 @@ if BOARD_BT510 -config BT_CTLR - default BT - config I2C default SENSOR diff --git a/boards/ezurio/bt610/Kconfig.defconfig b/boards/ezurio/bt610/Kconfig.defconfig index 9a82770655ef076..049632619578e4d 100644 --- a/boards/ezurio/bt610/Kconfig.defconfig +++ b/boards/ezurio/bt610/Kconfig.defconfig @@ -5,9 +5,6 @@ if BOARD_BT610 -config BT_CTLR - default BT - config I2C default $(dt_compat_on_bus,$(DT_COMPAT_TI_TCA9538),i2c) diff --git a/boards/ezurio/mg100/Kconfig.defconfig b/boards/ezurio/mg100/Kconfig.defconfig index 0db2eee84787f93..ff0ba3feee12d6b 100644 --- a/boards/ezurio/mg100/Kconfig.defconfig +++ b/boards/ezurio/mg100/Kconfig.defconfig @@ -15,7 +15,4 @@ config NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE config REGULATOR default DISK_DRIVER_SDMMC -config BT_CTLR - default BT - endif # BOARD_MG100 diff --git a/boards/ezurio/pinnacle_100_dvk/Kconfig.defconfig b/boards/ezurio/pinnacle_100_dvk/Kconfig.defconfig index c53ec05d15a2138..299754eda5aa65c 100644 --- a/boards/ezurio/pinnacle_100_dvk/Kconfig.defconfig +++ b/boards/ezurio/pinnacle_100_dvk/Kconfig.defconfig @@ -14,7 +14,4 @@ config MODEM_HL7800 config NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE default 4096 -config BT_CTLR - default BT - endif # BOARD_PINNACLE_100_DVK diff --git a/boards/ezurio/rm1xx_dvk/Kconfig.defconfig b/boards/ezurio/rm1xx_dvk/Kconfig.defconfig index 01cbc05ee789306..27d934196f18cb0 100644 --- a/boards/ezurio/rm1xx_dvk/Kconfig.defconfig +++ b/boards/ezurio/rm1xx_dvk/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_RM1XX_DVK -config BT_CTLR - default BT - endif # BOARD_RM1XX_DVK diff --git a/boards/fanke/fk750m1_vbt6/Kconfig.fk750m1_vbt6 b/boards/fanke/fk750m1_vbt6/Kconfig.fk750m1_vbt6 new file mode 100644 index 000000000000000..7c73267ab61d900 --- /dev/null +++ b/boards/fanke/fk750m1_vbt6/Kconfig.fk750m1_vbt6 @@ -0,0 +1,5 @@ +# Copyright (c) 2024 zack jiang <1125934312@qq.com> +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_FK750M1_VBT6 + select SOC_STM32H750XX diff --git a/boards/fanke/fk750m1_vbt6/board.cmake b/boards/fanke/fk750m1_vbt6/board.cmake new file mode 100644 index 000000000000000..3932958fd1db805 --- /dev/null +++ b/boards/fanke/fk750m1_vbt6/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(openocd --target-handle=_CHIPNAME.cpu0) +board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw") +board_runner_args(jlink "--device=STM32H750VB" "--speed=4000") + +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) +include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/fanke/fk750m1_vbt6/board.yml b/boards/fanke/fk750m1_vbt6/board.yml new file mode 100644 index 000000000000000..2aae1f00b73667b --- /dev/null +++ b/boards/fanke/fk750m1_vbt6/board.yml @@ -0,0 +1,6 @@ +board: + name: fk750m1_vbt6 + full_name: FK750M1-VBT6 + vendor: fanke + socs: + - name: stm32h750xx diff --git a/boards/fanke/fk750m1_vbt6/doc/img/fk750m1_vbt6.webp b/boards/fanke/fk750m1_vbt6/doc/img/fk750m1_vbt6.webp new file mode 100644 index 000000000000000..cc86302e95ad8a3 Binary files /dev/null and b/boards/fanke/fk750m1_vbt6/doc/img/fk750m1_vbt6.webp differ diff --git a/boards/fanke/fk750m1_vbt6/doc/index.rst b/boards/fanke/fk750m1_vbt6/doc/index.rst new file mode 100644 index 000000000000000..6a558bddc0873bb --- /dev/null +++ b/boards/fanke/fk750m1_vbt6/doc/index.rst @@ -0,0 +1,157 @@ +.. zephyr:board:: fk750m1_vbt6 + +Overview +******** + +The FK750M1-VBT6 core board by FANKE Technology Co., Ltd. is an advanced microcontroller +platform based on the STMicroelectronics Arm® Cortex®-M7 core STM32H750VBT6 microcontroller. +This board is an ideal solution for developers looking to create high-performance +applications, leveraging its robust capabilities and support for sophisticated display +and image processing technologies. + +The FK750M1-VBT6 is designed as a reference design for user application development before +transitioning to the final product, significantly simplifying the development process. +Its wide range of hardware features, including advanced display and image processing capabilities, +allowing for comprehensive evaluation and testing of peripherals and functionalities. + +Hardware +******** + +FK750M1-VBT6 provides the following hardware components: + +- STM32H750VB in LQFP100 package +- ARM 32-bit Cortex-M7 CPU with FPU +- 480 MHz max CPU frequency +- 128 KB Flash +- 1 MB SRAM: 192 Kbytes TCM RAM (64 Kbytes ITCM RAM + 128 Kbytes DTCM RAM), 864 Kbytes user SRAM, and 4 Kbytes SRAM in Backup domain +- Main clock: External 25MHz crystal oscillator. +- RTC: 32.768kHz crystal oscillator. +- high-resolution timers(2.1 ns max resolution, 1) +- 32-bit timers(2) +- 16-bit timers(17) +- 1 reset button, and 1 BOOT button +- 1 user LED +- External 64-Mbit QSPI (W25Q64) NOR Flash memory. +- USB OTG Full Speed and High Speed(1) +- 1 micro SD card +- 1 DCMI camera interface +- 1 SPI LCD interface +- SWD and serial port accessibility through a pin header +- Bring out 73 IO ports + +More information about STM32H750VB can be found here: + +- `STM32H750VB on www.st.com`_ + +Supported Features +================== + +The Zephyr ``fk750m1_vbt6`` board target supports the following hardware +features: + ++-------------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++=============+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-------------+------------+-------------------------------------+ +| FLASH | on-chip | flash memory | ++-------------+------------+-------------------------------------+ +| UART | on-chip | serial port | ++-------------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-------------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-------------+------------+-------------------------------------+ +| RNG | on-chip | True Random number generator | ++-------------+------------+-------------------------------------+ +| Backup SRAM | on-chip | Backup SRAM | ++-------------+------------+-------------------------------------+ +| SPI | on-chip | spi bus | ++-------------+------------+-------------------------------------+ +| QUADSPI | on-chip | quadspi | ++-------------+------------+-------------------------------------+ + +Other hardware features are not yet supported on this Zephyr port. + +The default configuration per core can be found in +:zephyr_file:`boards/fanke/fk750m1_vbt6/fk750m1_vbt6_defconfig` + +Pin Mapping +=========== + +FK750M1-VBT6 board has 5 GPIO controllers. These controllers are responsible for pin muxing, +input/output, pull-up, etc. + +Default Zephyr Peripheral Mapping: +---------------------------------- + +The FK750M1-VBT6 board is configured as follows + +- UART_1 TX/RX : PA9/PA10 (available on the header pins) +- User LED (blue) : PC13 +- SPI4 NCS/CLK/MOSI : PE11/PE12/PE14 (SPI LCD) +- QuadSPI NCS/CLK/IO0/IO1/IO2/IO3 : PB6/PB2/PD11/PD12/PE2/PD13 (NOR Flash) +- USB DM/DP : PA11/PA12 + +System Clock +============ + +The FK750M1-VBT6 System Clock could be driven by an internal or external oscillator, +as well as by the main PLL clock. By default the system clock is driven by the PLL clock at 480MHz, +driven by an 25MHz external crystal oscillator. + +Serial Port +=========== + +The Zephyr console output is assigned to UART1. The default communication settings are 115200 8N1. + +Programming and Debugging +************************* + +Applications for the ``fk750m1_vbt6`` board target can be built and flashed in the usual +way (see :ref:`build_an_application` and :ref:`application_run` for more details). + +Flashing +======== + +The FK750M1-VBT6 board does not include an on-board debugger. As a result, it requires +an external debugger, such as ST-Link, for programming and debugging purposes. + +The board provides header pins for the Serial Wire Debug (SWD) interface. + +Flashing an application to FK750M1-VBT6 +--------------------------------------- + +To begin, connect the ST-Link Debug Programmer to the FK750M1-VBT6 board using the SWD +interface. Next, connect the ST-Link to your host computer via a USB port. +Once this setup is complete, you can proceed to build and flash your application to the board + +Here is an example for the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: fk750m1_vbt6 + :goals: build flash + +Run a serial host program to connect with your board: + +.. code-block:: console + + $ minicom -D /dev/ttyACM0 -b 115200 + +Then, press the RESET button, you should see the following message: + +.. code-block:: console + + Hello World! fk750m1_vbt6 + +Debugging +========= + +This current Zephyr port does not support debugging. + +References +********** + +.. target-notes:: +.. _STM32H750VB on www.st.com: https://www.st.com/en/microcontrollers/stm32h750vb.html diff --git a/boards/fanke/fk750m1_vbt6/fk750m1_vbt6.dts b/boards/fanke/fk750m1_vbt6/fk750m1_vbt6.dts new file mode 100644 index 000000000000000..a3351b7e8646c1c --- /dev/null +++ b/boards/fanke/fk750m1_vbt6/fk750m1_vbt6.dts @@ -0,0 +1,171 @@ +/* + * Copyright (c) 2024 zack jiang <1125934312@qq.com> + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include +#include +#include +#include + +/ { + model = "FANKE FK750M1-VBT6 board"; + compatible = "fanke,fk750m1-vbt6"; + + chosen { + zephyr,console = &usart1; + zephyr,shell-uart = &usart1; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,display = &st7789v_240x240; + }; + + leds { + compatible = "gpio-leds"; + user_led: led_0 { + gpios = <&gpioc 13 GPIO_ACTIVE_LOW>; + label = "User LED"; + }; + }; + + aliases { + led0 = &user_led; + }; + + mipi_dbi_st7789v_240x240 { + compatible = "zephyr,mipi-dbi-spi"; + spi-dev = <&spi4>; + dc-gpios = <&gpioe 15 GPIO_ACTIVE_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + + st7789v_240x240: st7789v@0 { + compatible = "sitronix,st7789v"; + mipi-max-frequency = <20000000>; + reg = <0>; + width = <240>; + height = <240>; + x-offset = <0>; + y-offset = <0>; + vcom = <0x19>; + gctrl = <0x35>; + vrhs = <0x12>; + vdvs = <0x20>; + mdac = <0x00>; + gamma = <0x01>; + colmod = <0x05>; + lcm = <0x2c>; + porch-param = [0c 0c 00 33 33]; + cmd2en-param = [5a 69 02 01]; + pwctrl1-param = [a4 a1]; + pvgam-param = [D0 04 0D 11 13 2B 3F 54 4C 18 0D 0B 1F 23]; + nvgam-param = [D0 04 0C 11 13 2C 3F 44 51 2F 1F 1F 20 23]; + ram-param = [00 F0]; + rgb-param = [CD 08 14]; + mipi-mode = "MIPI_DBI_MODE_SPI_4WIRE"; + }; + }; +}; + +&clk_hsi48 { + status = "okay"; +}; + +&clk_hse { + clock-frequency = ; + status = "okay"; +}; + +&pll { + div-m = <5>; + mul-n = <192>; + div-p = <2>; + div-q = <4>; + div-r = <4>; + clocks = <&clk_hse>; + status = "okay"; +}; + +&pll3 { + div-m = <5>; + mul-n = <192>; + div-p = <2>; + div-q = <20>; + div-r = <99>; + clocks = <&clk_hse>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = ; + d1cpre = <1>; + hpre = <2>; + d1ppre = <2>; + d2ppre1 = <2>; + d2ppre2 = <2>; + d3ppre = <2>; +}; + +&quadspi { + pinctrl-0 = <&quadspi_bk1_io0_pd11 &quadspi_bk1_io1_pd12 + &quadspi_bk1_io2_pe2 &quadspi_bk1_io3_pd13 + &quadspi_clk_pb2 &quadspi_bk1_ncs_pb6>; + pinctrl-names = "default"; + status = "okay"; + + /* Winbond external flash */ + w25q64_qspi: qspi-nor-flash@90000000 { + compatible = "st,stm32-qspi-nor"; + reg = <0x90000000 DT_SIZE_M(64)>; /* 64 Mbits */ + qspi-max-frequency = <40000000>; + status = "okay"; + spi-bus-width = <4>; + writeoc = "PP_1_1_4"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + storage_partition: partition@0 { + label = "storage"; + reg = <0x00000000 DT_SIZE_M(64)>; + }; + }; + }; +}; + +&spi4 { + pinctrl-0 = <&spi4_sck_pe12 &spi4_mosi_pe14>; + cs-gpios = <&gpioe 11 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpiod { + status = "okay"; + + lcd_led { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + }; +}; + +&usart1 { + pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>; + pinctrl-names = "default"; + current-speed = <115200>; + status = "okay"; +}; + +&backup_sram { + status = "okay"; +}; + +&rng { + status = "okay"; +}; diff --git a/boards/fanke/fk750m1_vbt6/fk750m1_vbt6.yaml b/boards/fanke/fk750m1_vbt6/fk750m1_vbt6.yaml new file mode 100644 index 000000000000000..ffb5170ae824a17 --- /dev/null +++ b/boards/fanke/fk750m1_vbt6/fk750m1_vbt6.yaml @@ -0,0 +1,14 @@ +identifier: fk750m1_vbt6 +name: FANKE FK750M1-VBT6 +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +ram: 1024 +flash: 128 +supported: + - uart + - gpio +vendor: fanke diff --git a/boards/fanke/fk750m1_vbt6/fk750m1_vbt6_defconfig b/boards/fanke/fk750m1_vbt6/fk750m1_vbt6_defconfig new file mode 100644 index 000000000000000..527b26b55e688ad --- /dev/null +++ b/boards/fanke/fk750m1_vbt6/fk750m1_vbt6_defconfig @@ -0,0 +1,18 @@ +# Copyright (c) zack jiang <1125934312@qq.com> +# SPDX-License-Identifier: Apache-2.0 + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable HW stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable UART +CONFIG_SERIAL=y + +# Console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable GPIO +CONFIG_GPIO=y diff --git a/boards/fanke/fk750m1_vbt6/support/openocd.cfg b/boards/fanke/fk750m1_vbt6/support/openocd.cfg new file mode 100644 index 000000000000000..1db2475768a987a --- /dev/null +++ b/boards/fanke/fk750m1_vbt6/support/openocd.cfg @@ -0,0 +1,25 @@ +# Copyright (c) zack jiang <1125934312@qq.com> +# SPDX-License-Identifier: Apache-2.0 + +source [find interface/stlink-dap.cfg] +transport select "dapdirect_swd" + +set WORKAREASIZE 0x8000 + +set CHIPNAME STM32H750VB +set BOARDNAME FK750M1-VBT6 + +source [find target/stm32h7x.cfg] + +# Enable debug when in low power modes +set ENABLE_LOW_POWER 1 + +# Stop Watchdog counters when halt +set STOP_WATCHDOG 1 + +# Reset configuration +# use hardware reset, connect under reset +# connect_assert_srst needed if low power mode application running (WFI...) +reset_config srst_only srst_nogate connect_assert_srst +set CONNECT_UNDER_RESET 1 +set CORE_RESET 0 diff --git a/boards/fanke/fk7b0m1_vbt6/fk7b0m1_vbt6.yaml b/boards/fanke/fk7b0m1_vbt6/fk7b0m1_vbt6.yaml index f847d49f4506b35..e50692f318ae2d1 100644 --- a/boards/fanke/fk7b0m1_vbt6/fk7b0m1_vbt6.yaml +++ b/boards/fanke/fk7b0m1_vbt6/fk7b0m1_vbt6.yaml @@ -1,5 +1,5 @@ identifier: fk7b0m1_vbt6 -name: FANKE FK7B0M1-VBT6 board +name: FANKE FK7B0M1-VBT6 type: mcu arch: arm toolchain: diff --git a/boards/franzininho/esp32s2_franzininho/Kconfig.defconfig b/boards/franzininho/esp32s2_franzininho/Kconfig.defconfig deleted file mode 100644 index 257328f1c0a5eb2..000000000000000 --- a/boards/franzininho/esp32s2_franzininho/Kconfig.defconfig +++ /dev/null @@ -1,7 +0,0 @@ -# ESP32S2 Franzininho board configuration - -# Copyright (c) 2022 Felipe Neves -# SPDX-License-Identifier: Apache-2.0 - -config ENTROPY_GENERATOR - default y diff --git a/boards/franzininho/esp32s2_franzininho/esp32s2_franzininho.yaml b/boards/franzininho/esp32s2_franzininho/esp32s2_franzininho.yaml index 0a227dc60212f22..da3da1bdc3ace96 100644 --- a/boards/franzininho/esp32s2_franzininho/esp32s2_franzininho.yaml +++ b/boards/franzininho/esp32s2_franzininho/esp32s2_franzininho.yaml @@ -14,6 +14,4 @@ supported: testing: ignore_tags: - heap - - net - - bluetooth vendor: franzininho diff --git a/boards/google/icetower/Kconfig.google_icetower b/boards/google/icetower/Kconfig.google_icetower new file mode 100644 index 000000000000000..b6f143710cb5247 --- /dev/null +++ b/boards/google/icetower/Kconfig.google_icetower @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Google LLC +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_GOOGLE_ICETOWER + select SOC_STM32H743XX diff --git a/boards/google/icetower/board.cmake b/boards/google/icetower/board.cmake new file mode 100644 index 000000000000000..51e47b13107d9d9 --- /dev/null +++ b/boards/google/icetower/board.cmake @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: Apache-2.0 + +# keep first +board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw") +board_runner_args(jlink "--device=STM32H743VI" "--speed=4000") +board_runner_args(openocd --target-handle=_CHIPNAME.cpu0) + +# keep first +include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/google/icetower/board.yml b/boards/google/icetower/board.yml new file mode 100644 index 000000000000000..beaafd5d4e1c4ab --- /dev/null +++ b/boards/google/icetower/board.yml @@ -0,0 +1,6 @@ +board: + name: google_icetower + full_name: Icetower Development Board + vendor: google + socs: + - name: stm32h743xx diff --git a/boards/google/icetower/doc/index.rst b/boards/google/icetower/doc/index.rst new file mode 100644 index 000000000000000..45ecb81be2dcd0b --- /dev/null +++ b/boards/google/icetower/doc/index.rst @@ -0,0 +1,47 @@ +.. zephyr:board:: google_icetower + +Overview +******** + +Google Icetower Development Board is a board created by Google for +fingerprint-related functionality development. + +Board has connectors for fingerprint sensors. Console is exposed over `μServo`_ +connector. MCU can be flashed using μServo or SWD. + +Hardware +******** + +- STM32H7A3VIT6 LQFP100 package + +Pin Mapping +=========== + +Default Zephyr Peripheral Mapping: +---------------------------------- +- USART_1 TX/RX : PA9/PA10 +- SPI_1 CS/CLK/MISO/MOSI : PA4/PA5/PA6/PA7 +- SPI_4 CS/CLK/MISO/MOSI : PE11/PE12/PE13/PE14 + +Programming and Debugging +************************* + +Build application as usual for the ``google_icetower`` board, and flash +using μServo or an external J-Link connected to J4. If μServo is used, please +follow the `Chromium EC Flashing Documentation`_. + +Debugging +========= + +Use SWD with a J-Link or ST-Link. Remember that SW2 must be set to CORESIGHT. + +References +********** + +.. target-notes:: + +.. _Chromium EC Flashing Documentation: + https://chromium.googlesource.com/chromiumos/platform/ec#Flashing-via-the-servo-debug-board + +.. _μServo: + https://chromium.googlesource.com/chromiumos/third_party/hdctools/+/master/docs/servo_micro.md diff --git a/boards/google/icetower/google_icetower.dts b/boards/google/icetower/google_icetower.dts new file mode 100644 index 000000000000000..fa549c7bbe0fd19 --- /dev/null +++ b/boards/google/icetower/google_icetower.dts @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2024 Google LLC + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include + +/ { + model = "Google Icetower development board"; + compatible = "google,icetower-fpmcu"; + + chosen { + zephyr,console = &usart1; + zephyr,shell-uart = &usart1; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + }; +}; + +&clk_lsi { + /* LSI clock frequency is 32kHz */ + status = "okay"; +}; + +&clk_hsi { + status = "okay"; + hsi-div = <1>; + clock-frequency = ; +}; + +&rcc { + clocks = <&clk_hsi>; + clock-frequency = ; + d1cpre = <1>; + hpre = <1>; + d1ppre = <1>; + d2ppre1 = <1>; + d2ppre2 = <1>; + d3ppre = <1>; +}; + +/* USART1: Servo UART (console) */ +&usart1 { + pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>; + pinctrl-names = "default"; + current-speed = <115200>; + status = "okay"; +}; + +/* SPI1: communication with the AP */ +&spi1 { + pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5 + &spi1_miso_pa6 &spi1_mosi_pa7>; + pinctrl-names = "default"; + status = "okay"; +}; + +/* SPI4: communication with the fingerprint sensor */ +&spi4 { + pinctrl-0 = <&spi4_nss_pe11 &spi4_sck_pe12 + &spi4_miso_pe13 &spi4_mosi_pe14>; + pinctrl-names = "default"; + status = "okay"; +}; + +&rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; + status = "okay"; + + backup_regs { + status = "okay"; + }; +}; diff --git a/boards/google/icetower/google_icetower.yaml b/boards/google/icetower/google_icetower.yaml new file mode 100644 index 000000000000000..c0b2473c100df2c --- /dev/null +++ b/boards/google/icetower/google_icetower.yaml @@ -0,0 +1,19 @@ +identifier: google_icetower +name: Google Icetower Development Board +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +ram: 1024 +flash: 2048 +vendor: google +supported: + - counter + - dma + - gpio + - i2c + - spi + - pwm + - rtc diff --git a/boards/google/icetower/google_icetower_defconfig b/boards/google/icetower/google_icetower_defconfig new file mode 100644 index 000000000000000..705c23fe4b90270 --- /dev/null +++ b/boards/google/icetower/google_icetower_defconfig @@ -0,0 +1,17 @@ +# Copyright (c) 2024 Google Inc +# SPDX-License-Identifier: Apache-2.0 + +# Serial Drivers +CONFIG_SERIAL=y +CONFIG_UART_INTERRUPT_DRIVEN=y + +# Console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# GPIO Controller +CONFIG_GPIO=y + +# Enable MPU and HW stack protection +CONFIG_ARM_MPU=y +CONFIG_HW_STACK_PROTECTION=y diff --git a/boards/google/twinkie_v2/google_twinkie_v2.dts b/boards/google/twinkie_v2/google_twinkie_v2.dts index 08e8fbaf5d257d3..eaffe70edf4f112 100644 --- a/boards/google/twinkie_v2/google_twinkie_v2.dts +++ b/boards/google/twinkie_v2/google_twinkie_v2.dts @@ -101,7 +101,7 @@ &adc1_in18_pc5 /* CSA_CC2 */ >; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; diff --git a/boards/hardkernel/odroid_go/odroid_go-flash_partition_table.dtsi b/boards/hardkernel/odroid_go/odroid_go-flash_partition_table.dtsi deleted file mode 100644 index bd0a69298c8935c..000000000000000 --- a/boards/hardkernel/odroid_go/odroid_go-flash_partition_table.dtsi +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (c) 2024 Yannis Damigos - * - * SPDX-License-Identifier: Apache-2.0 - */ - -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@1000 { - label = "mcuboot"; - reg = <0x00001000 0x0000F000>; - read-only; - }; - - /* Reserve 2048kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00200000>; - }; - - /* Reserve 2048kB for the application in slot 1 */ - slot1_partition: partition@210000 { - label = "image-1"; - reg = <0x00210000 0x00200000>; - }; - - /* Reserve the remaining 12224kB for the storage partition */ - storage_partition: partition@410000 { - label = "storage"; - reg = <0x00410000 0x00BF0000>; - }; - }; -}; diff --git a/boards/hardkernel/odroid_go/odroid_go_appcpu.dts b/boards/hardkernel/odroid_go/odroid_go_appcpu.dts index 656272a24e8693c..3fe5151c7cec6ea 100644 --- a/boards/hardkernel/odroid_go/odroid_go_appcpu.dts +++ b/boards/hardkernel/odroid_go/odroid_go_appcpu.dts @@ -6,16 +6,18 @@ /dts-v1/; #include -#include "odroid_go-flash_partition_table.dtsi" +#include / { model = "ODROID-GO Game Kit APPCPU"; compatible = "hardkernel,odroid_go", "espressif,esp32"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; diff --git a/boards/hardkernel/odroid_go/odroid_go_procpu.dts b/boards/hardkernel/odroid_go/odroid_go_procpu.dts index 4553b7e338bd0e3..386627ff3583b35 100644 --- a/boards/hardkernel/odroid_go/odroid_go_procpu.dts +++ b/boards/hardkernel/odroid_go/odroid_go_procpu.dts @@ -7,7 +7,7 @@ #include #include "odroid_go-pinctrl.dtsi" -#include "odroid_go-flash_partition_table.dtsi" +#include #include / { @@ -15,7 +15,7 @@ compatible = "hardkernel,odroid_go", "espressif,esp32"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/hardkernel/odroid_go/odroid_go_procpu.yaml b/boards/hardkernel/odroid_go/odroid_go_procpu.yaml index f2eafb526763f2d..0f9df7d05e530ac 100644 --- a/boards/hardkernel/odroid_go/odroid_go_procpu.yaml +++ b/boards/hardkernel/odroid_go/odroid_go_procpu.yaml @@ -11,8 +11,4 @@ supported: - watchdog - uart - nvs -testing: - ignore_tags: - - net - - bluetooth vendor: hardkernel diff --git a/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_appcpu.dts b/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_appcpu.dts index 3cbdd5e3f478deb..0363d711293de3a 100644 --- a/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_appcpu.dts +++ b/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_appcpu.dts @@ -13,9 +13,11 @@ compatible = "espressif,esp32"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; diff --git a/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_procpu.dts b/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_procpu.dts index 323947247b54eb9..c641e773e0725da 100644 --- a/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_procpu.dts +++ b/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_procpu.dts @@ -51,7 +51,7 @@ }; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_procpu.yaml b/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_procpu.yaml index d516f1e1c5c892f..67ff09aa3d593de 100644 --- a/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_procpu.yaml +++ b/boards/heltec/heltec_wifi_lora32_v2/heltec_wifi_lora32_v2_procpu.yaml @@ -10,8 +10,4 @@ supported: - watchdog - uart - nvs -testing: - ignore_tags: - - net - - bluetooth vendor: espressif diff --git a/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_appcpu.dts b/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_appcpu.dts index 0a32e1d562b0173..6a8ca48d962d19d 100644 --- a/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_appcpu.dts +++ b/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_appcpu.dts @@ -13,7 +13,7 @@ compatible = "espressif,esp32s3"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; zephyr,flash = &flash0; diff --git a/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_procpu.dts b/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_procpu.dts index e955d2b0654e710..9e02e3db483cc3a 100644 --- a/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_procpu.dts +++ b/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_procpu.dts @@ -68,7 +68,7 @@ }; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_procpu.yaml b/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_procpu.yaml index 91221f8616b1603..0ed96e577a164e9 100644 --- a/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_procpu.yaml +++ b/boards/heltec/heltec_wireless_stick_lite_v3/heltec_wireless_stick_lite_v3_procpu.yaml @@ -16,8 +16,4 @@ supported: - pwm - dma - lora -testing: - ignore_tags: - - net - - bluetooth vendor: heltec diff --git a/boards/holyiot/yj16019/Kconfig.defconfig b/boards/holyiot/yj16019/Kconfig.defconfig index c4298c49d6e6713..4fa098bd482b754 100644 --- a/boards/holyiot/yj16019/Kconfig.defconfig +++ b/boards/holyiot/yj16019/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_HOLYIOT_YJ16019 -config BT_CTLR - default BT - endif # BOARD_HOLYIOT_YJ16019 diff --git a/boards/infineon/cy8ckit_062s2_ai/Kconfig.cy8ckit_062s2_ai b/boards/infineon/cy8ckit_062s2_ai/Kconfig.cy8ckit_062s2_ai new file mode 100644 index 000000000000000..a063f196cecf9e8 --- /dev/null +++ b/boards/infineon/cy8ckit_062s2_ai/Kconfig.cy8ckit_062s2_ai @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Arrow Electronics. +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_CY8CKIT_062S2_AI + select SOC_CY8C624ABZI_S2D44 diff --git a/boards/infineon/cy8ckit_062s2_ai/board.cmake b/boards/infineon/cy8ckit_062s2_ai/board.cmake new file mode 100644 index 000000000000000..48e33964ca5f43f --- /dev/null +++ b/boards/infineon/cy8ckit_062s2_ai/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +# During gdb session, by default connect to CM4 core. +board_runner_args(openocd "--gdb-init=disconnect") +board_runner_args(openocd "--gdb-init=target extended-remote :3334") +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) + +board_runner_args(pyocd "--target=cy8c6xxa") +include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) diff --git a/boards/infineon/cy8ckit_062s2_ai/board.yml b/boards/infineon/cy8ckit_062s2_ai/board.yml new file mode 100644 index 000000000000000..1bd554cd550eb92 --- /dev/null +++ b/boards/infineon/cy8ckit_062s2_ai/board.yml @@ -0,0 +1,9 @@ +# Copyright (c) 2024 Arrow Electronics. +# SPDX-License-Identifier: Apache-2.0 + +board: + name: cy8ckit_062s2_ai + full_name: PSOC 6 AI Evaluation Kit + vendor: infineon + socs: + - name: cy8c624abzi_s2d44 diff --git a/boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai.dts b/boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai.dts new file mode 100644 index 000000000000000..c3c5b1ee8405d57 --- /dev/null +++ b/boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai.dts @@ -0,0 +1,125 @@ +/* + * Copyright (c) 2024 Arrow Electronics. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include +#include + +/ { + model = "CY8CKIT-062S2-AI PSOC 6 AI Evaluation Kit"; + compatible = "infineon,cy8ckit_062s2_ai", "cypress,PSOC6"; + + chosen { + zephyr,console = &uart5; + zephyr,shell-uart = &uart5; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + }; + + aliases { + led0 = &user_led0; + sw0 = &user_bt; + watchdog0 = &watchdog0; + }; + + leds { + compatible = "gpio-leds"; + user_led0: led_0 { + label = "LED_0"; + gpios = <&gpio_prt5 3 GPIO_ACTIVE_HIGH>; + }; + user_led1: led_1 { + label = "LED_1"; + gpios = <&gpio_prt5 4 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_bt: button_0 { + label = "SW_0"; + gpios = <&gpio_prt5 2 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + zephyr,code = ; + }; + }; +}; + +&fll0 { + status = "okay"; + clock-frequency = <100000000>; +}; + +&clk_hf0 { + clock-div = <1>; + clocks = <&fll0>; +}; + +/* CM4 core clock = 100MHz + * &fll clock-frequency / &clk_hf0 clock-div / &clk_fast clock-div = 100MHz / 1 / 1 = 100MHz + */ +&clk_fast { + clock-div = <1>; +}; + +/* CM0+ core clock = 50MHz + * &fll clock-frequency / &clk_hf0 clock-div / &clk_slow clock-div = 100MHz / 1 / 2 = 50MHz + */ +&clk_slow { + clock-div = <2>; +}; + +/* PERI core clock = 100MHz + * &fll clock-frequency / &clk_hf0 clock-div / &clk_peri clock-div = 100MHz / 1 / 1 = 100MHz + */ +&clk_peri { + clock-div = <1>; +}; + +&gpio_prt5 { + status = "okay"; +}; + +&gpio_prt10 { + status = "okay"; +}; + +/* UART connected to KitProg3 */ +uart5: &scb5 { + compatible = "infineon,cat1-uart"; + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&p5_1_scb5_uart_tx &p5_0_scb5_uart_rx>; + pinctrl-names = "default"; +}; + +uart1: &scb1 { + compatible = "infineon,cat1-uart"; + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&p10_0_scb1_uart_rx &p10_1_scb1_uart_tx>; + pinctrl-names = "default"; +}; + +&p5_1_scb5_uart_tx { + drive-push-pull; +}; + +&p5_0_scb5_uart_rx { + input-enable; +}; + +&p10_1_scb1_uart_tx { + drive-push-pull; +}; + +&p10_0_scb1_uart_rx { + input-enable; +}; + +&watchdog0 { + status = "okay"; +}; diff --git a/boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai.yaml b/boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai.yaml new file mode 100644 index 000000000000000..eef9a3a23886ae9 --- /dev/null +++ b/boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai.yaml @@ -0,0 +1,13 @@ +identifier: cy8ckit_062s2_ai +name: CY8CKIT-062S2-AI PSOC 6 AI Evaluation Kit +type: mcu +arch: arm +ram: 1024 +flash: 2048 +toolchain: + - zephyr +supported: + - gpio + - uart + - watchdog +vendor: infineon diff --git a/boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai_defconfig b/boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai_defconfig new file mode 100644 index 000000000000000..105fb484e2869cc --- /dev/null +++ b/boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai_defconfig @@ -0,0 +1,24 @@ +# Copyright (c) 2024 Arrow Electronics. +# SPDX-License-Identifier: Apache-2.0 + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable HW stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable GPIO driver +CONFIG_GPIO=y + +# Enable clock controller +CONFIG_CLOCK_CONTROL=y + +# Add catcm0p sleep images for CM0 Devices +CONFIG_SOC_PSOC6_CM0P_IMAGE_SLEEP=y diff --git a/boards/infineon/cy8ckit_062s2_ai/doc/img/cy8ckit_062s2_ai.webp b/boards/infineon/cy8ckit_062s2_ai/doc/img/cy8ckit_062s2_ai.webp new file mode 100644 index 000000000000000..56075d2e88444e4 Binary files /dev/null and b/boards/infineon/cy8ckit_062s2_ai/doc/img/cy8ckit_062s2_ai.webp differ diff --git a/boards/infineon/cy8ckit_062s2_ai/doc/index.rst b/boards/infineon/cy8ckit_062s2_ai/doc/index.rst new file mode 100644 index 000000000000000..8395bcd98ce6c12 --- /dev/null +++ b/boards/infineon/cy8ckit_062s2_ai/doc/index.rst @@ -0,0 +1,182 @@ +.. zephyr:board:: cy8ckit_062s2_ai + +Overview +******** + +The PSOC 6 AI Evaluation Kit (CY8CKIT-062S2-AI) is a cost effective and small development kit that +enables design and debug of PSOC 6 MCUs. +It includes a CY8C624ABZI-S2D44 MCU which is based on a 150-MHz Arm |reg| Cortex |reg|-M4 and +a 100-MHz Arm |reg| Cortex |reg|-M0+, with 2048 KB of on-chip Flash, 1024 KB of SRAM, +a Quad-SPI external memory interface, built-in hardware and software security features, +rich analog, digital, and communication peripherals. + +The board features an AIROC |reg| CYW43439 Wi-Fi & Bluetooth |reg| combo device, +a 512 MB NOR flash, an onboard programmer/debugger (KitProg3), USB host and device features, +two user LEDs, and one push button. + +Hardware +******** + +For more information about the CY8C624ABZI-S2D44 MCU SoC and CY8CKIT-062S2-AI board: + +- `CY8C624ABZI-S2D44 MCU SoC Website`_ +- `CY8C624ABZI-S2D44 MCU Datasheet`_ +- `CY8CKIT-062S2-AI Website`_ +- `CY8CKIT-062S2-AI User Guide`_ +- `CY8CKIT-062S2-AI Schematics`_ + +Supported Features +================== + +The ``cy8ckit_062s2_ai/cy8c624abzi_s2d44`` board target supports the following hardware features: + ++-----------+------------+-----------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=======================+ +| NVIC | on-chip | nested vectored | +| | | interrupt controller | ++-----------+------------+-----------------------+ +| SYSTICK | on-chip | system clock | ++-----------+------------+-----------------------+ +| GPIO | on-chip | GPIO | ++-----------+------------+-----------------------+ +| PINCTRL | on-chip | pin control | ++-----------+------------+-----------------------+ +| UART | on-chip | serial port-polling; | +| | | serial port-interrupt | ++-----------+------------+-----------------------+ +| WATCHDOG | on-chip | watchdog | ++-----------+------------+-----------------------+ + + +The default configuration can be found in the defconfig and dts files: + + - :zephyr_file:`boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai_defconfig` + - :zephyr_file:`boards/infineon/cy8ckit_062s2_ai/cy8ckit_062s2_ai.dts` + +System Clock +============ + +The PCY8C624ABZI-S2D44 MCU SoC is configured to use the internal IMO+FLL as a source for +the system clock. CM0+ works at 50MHz, CM4 - at 100MHz. Other sources for the +system clock are provided in the SoC, depending on your system requirements. + + +Fetch Binary Blobs +****************** + +The CY8CKIT-062S2-AI board requires fetch binary files (e.g CM0+ prebuilt images). + +To fetch Binary Blobs: + +.. code-block:: console + + west blobs fetch hal_infineon + + +Build blinking led sample +************************* + +Here is an example for building the :zephyr:code-sample:`blinky` sample application. + +.. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: cy8ckit_062s2_ai/cy8c624abzi_s2d44 + :goals: build + +Programming and Debugging +************************* + +The CY8CKIT-062S2-AI board includes an onboard programmer/debugger (`KitProg3`_) +to provide debugging, flash programming, and serial communication over USB. +Flash and debug commands use OpenOCD and require a custom Infineon OpenOCD version, +that supports KitProg3, to be installed. + + +Infineon OpenOCD Installation +============================= + +Both the full `ModusToolbox`_ and the `ModusToolbox Programming Tools`_ packages include Infineon OpenOCD. +Installing either of these packages will also install Infineon OpenOCD. +If neither package is installed, a minimal installation can be done by downloading the `Infineon OpenOCD`_ release +for your system and manually extract the files to a location of your choice. + +.. note:: + + Linux requires device access rights to be set up for KitProg3. + This is handled automatically by the ModusToolbox and ModusToolbox Programming Tools installations. + When doing a minimal installation, this can be done manually by executing the script + ``openocd/udev_rules/install_rules.sh``. + +West Commands +============= + +The path to the installed Infineon OpenOCD executable must be available to the ``west`` tool commands. +There are multiple ways of doing this. +The example below uses a permanent CMake argument to set the CMake variable ``OPENOCD``. + + .. tabs:: + .. group-tab:: Windows + + .. code-block:: shell + + # Run west config once to set permanent CMake argument + west config build.cmake-args -- -DOPENOCD=path/to/infineon/openocd/bin/openocd.exe + + # Do a pristine build once after setting CMake argument + west build -b cy8ckit_062s2_ai/cy8c624abzi_s2d44 -p always samples/basic/blinky + + west flash + west debug + + .. group-tab:: Linux + + .. code-block:: shell + + # Run west config once to set permanent CMake argument + west config build.cmake-args -- -DOPENOCD=path/to/infineon/openocd/bin/openocd + + # Do a pristine build once after setting CMake argument + west build -b cy8ckit_062s2_ai/cy8c624abzi_s2d44 -p always samples/basic/blinky + + west flash + west debug + +Alternatively, pyOCD can also be used to flash the board using +the ``--runner`` (or ``-r``) option: + +.. code-block:: console + + $ west flash --runner pyocd + +References +********** + +.. target-notes:: + +.. _CY8C624ABZI-S2D44 MCU SoC Website: + https://www.infineon.com/cms/en/product/microcontroller/32-bit-psoc-arm-cortex-microcontroller/psoc-6-32-bit-arm-cortex-m4-mcu/psoc-62/psoc-62x8-62xa/cy8c624abzi-s2d44/ + +.. _CY8C624ABZI-S2D44 MCU Datasheet: + https://www.infineon.com/dgdl/Infineon-PSOC_6_MCU_CY8C62X8_CY8C62XA-DataSheet-v16_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ee7d03a70b1 + +.. _CY8CKIT-062S2-AI Website: + https://www.infineon.com/cms/en/product/evaluation-boards/cy8ckit-062s2-ai/?redirId=273839 + +.. _CY8CKIT-062S2-AI User Guide: + https://www.infineon.com/dgdl/Infineon-CY8CKIT_062S2_AI_KIT_GUIDE-UserManual-v01_00-EN.pdf?fileId=8ac78c8c90530b3a01906d4608842668 + +.. _CY8CKIT-062S2-AI Schematics: + https://www.infineon.com/dgdl/Infineon-CY8CKIT-062S2-AI_PSoC_6_AI_Evaluation_Board_Schematic-PCBDesignData-v01_00-EN.pdf?fileId=8ac78c8c8eeb092c018f0af9e109106f + +.. _ModusToolbox: + https://softwaretools.infineon.com/tools/com.ifx.tb.tool.modustoolbox + +.. _ModusToolbox Programming Tools: + https://softwaretools.infineon.com/tools/com.ifx.tb.tool.modustoolboxprogtools + +.. _Infineon OpenOCD: + https://github.com/Infineon/openocd/releases/latest + +.. _KitProg3: + https://github.com/Infineon/KitProg3 diff --git a/boards/infineon/cy8ckit_062s2_ai/support/openocd.cfg b/boards/infineon/cy8ckit_062s2_ai/support/openocd.cfg new file mode 100644 index 000000000000000..5b123bd203f484f --- /dev/null +++ b/boards/infineon/cy8ckit_062s2_ai/support/openocd.cfg @@ -0,0 +1,12 @@ +if {[info exists env(OPENOCD_INTERFACE)]} { + set INTERFACE $env(OPENOCD_INTERFACE) +} else { + # By default connect over Debug USB port + set INTERFACE "cmsis-dap" +} + +source [find interface/$INTERFACE.cfg] + +transport select swd + +source [find target/psoc6_2m.cfg] diff --git a/boards/intel/adl/intel_adl_crb_defconfig b/boards/intel/adl/intel_adl_crb_defconfig index fb9be2a4994a301..7fad00df636876f 100644 --- a/boards/intel/adl/intel_adl_crb_defconfig +++ b/boards/intel/adl/intel_adl_crb_defconfig @@ -9,4 +9,3 @@ CONFIG_UART_CONSOLE=y CONFIG_X2APIC=y CONFIG_SMP=y CONFIG_BUILD_OUTPUT_EFI=y -CONFIG_BUILD_NO_GAP_FILL=y diff --git a/boards/intel/adl/intel_adl_rvp_defconfig b/boards/intel/adl/intel_adl_rvp_defconfig index fb9be2a4994a301..7fad00df636876f 100644 --- a/boards/intel/adl/intel_adl_rvp_defconfig +++ b/boards/intel/adl/intel_adl_rvp_defconfig @@ -9,4 +9,3 @@ CONFIG_UART_CONSOLE=y CONFIG_X2APIC=y CONFIG_SMP=y CONFIG_BUILD_OUTPUT_EFI=y -CONFIG_BUILD_NO_GAP_FILL=y diff --git a/boards/intel/ehl/intel_ehl_crb_defconfig b/boards/intel/ehl/intel_ehl_crb_defconfig index ba1c681c4cf9de0..734eca74bc27340 100644 --- a/boards/intel/ehl/intel_ehl_crb_defconfig +++ b/boards/intel/ehl/intel_ehl_crb_defconfig @@ -8,5 +8,4 @@ CONFIG_UART_CONSOLE=y CONFIG_X2APIC=y CONFIG_SMP=y CONFIG_BUILD_OUTPUT_EFI=y -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_PCIE_PRT=n diff --git a/boards/intel/ish/board.cmake b/boards/intel/ish/board.cmake index aa4b8ad48aec21f..a6329d385662843 100644 --- a/boards/intel/ish/board.cmake +++ b/boards/intel/ish/board.cmake @@ -1,9 +1,8 @@ +# Copyright (c) 2023-2024 Intel Corporation +# # SPDX-License-Identifier: Apache-2.0 -set(SUPPORTED_EMU_PLATFORMS simics) - if(CONFIG_BOARD_INTEL_ISH_5_8_0) - board_emu_args(simics "project=$ENV{SIMICS_PROJECT}") board_emu_args(simics "zephyr_elf=${APPLICATION_BINARY_DIR}/zephyr/${KERNEL_ELF_NAME}") board_emu_args(simics "zephyr_start_address=${CONFIG_SRAM_BASE_ADDRESS}") include(${ZEPHYR_BASE}/boards/common/simics.board.cmake) diff --git a/boards/intel/ish/intel_ish_5_8_0.yaml b/boards/intel/ish/intel_ish_5_8_0.yaml index 5713ed69ff89465..34037b77449177e 100644 --- a/boards/intel/ish/intel_ish_5_8_0.yaml +++ b/boards/intel/ish/intel_ish_5_8_0.yaml @@ -11,6 +11,7 @@ simulation: supported: - serial testing: + timeout_multiplier: 2 ignore_tags: - net - bluetooth diff --git a/boards/intel/rpl/intel_rpl_p_crb_defconfig b/boards/intel/rpl/intel_rpl_p_crb_defconfig index c94efc744f68c44..853850deb12c507 100644 --- a/boards/intel/rpl/intel_rpl_p_crb_defconfig +++ b/boards/intel/rpl/intel_rpl_p_crb_defconfig @@ -10,4 +10,3 @@ CONFIG_UART_CONSOLE=y CONFIG_X2APIC=y CONFIG_SMP=y CONFIG_BUILD_OUTPUT_EFI=y -CONFIG_BUILD_NO_GAP_FILL=y diff --git a/boards/intel/rpl/intel_rpl_s_crb_defconfig b/boards/intel/rpl/intel_rpl_s_crb_defconfig index c94efc744f68c44..853850deb12c507 100644 --- a/boards/intel/rpl/intel_rpl_s_crb_defconfig +++ b/boards/intel/rpl/intel_rpl_s_crb_defconfig @@ -10,4 +10,3 @@ CONFIG_UART_CONSOLE=y CONFIG_X2APIC=y CONFIG_SMP=y CONFIG_BUILD_OUTPUT_EFI=y -CONFIG_BUILD_NO_GAP_FILL=y diff --git a/boards/kincony/kincony_kc868_a32/kincony_kc868_a32_appcpu.dts b/boards/kincony/kincony_kc868_a32/kincony_kc868_a32_appcpu.dts index 4717ca7fa628b94..d9747997ed0e855 100644 --- a/boards/kincony/kincony_kc868_a32/kincony_kc868_a32_appcpu.dts +++ b/boards/kincony/kincony_kc868_a32/kincony_kc868_a32_appcpu.dts @@ -6,15 +6,18 @@ /dts-v1/; #include +#include / { model = "Kincony KC868_A32 APPCPU"; compatible = "espressif,esp32"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; @@ -25,42 +28,3 @@ &trng0 { status = "okay"; }; - -&flash0 { - status = "okay"; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - /* Reserve 60kB for the bootloader */ - boot_partition: partition@1000 { - label = "mcuboot"; - reg = <0x00001000 0x0000F000>; - read-only; - }; - - /* Reserve 1024kB for the application in slot 0 */ - slot0_partition: partition@10000 { - label = "image-0"; - reg = <0x00010000 0x00100000>; - }; - - /* Reserve 1024kB for the application in slot 1 */ - slot1_partition: partition@110000 { - label = "image-1"; - reg = <0x00110000 0x00100000>; - }; - - /* Reserve 256kB for the scratch partition */ - scratch_partition: partition@210000 { - label = "image-scratch"; - reg = <0x00210000 0x00040000>; - }; - - storage_partition: partition@250000 { - label = "storage"; - reg = <0x00250000 0x00006000>; - }; - }; -}; diff --git a/boards/kincony/kincony_kc868_a32/kincony_kc868_a32_procpu.dts b/boards/kincony/kincony_kc868_a32/kincony_kc868_a32_procpu.dts index be7da2765efaf06..5e7e337e7d83e07 100644 --- a/boards/kincony/kincony_kc868_a32/kincony_kc868_a32_procpu.dts +++ b/boards/kincony/kincony_kc868_a32/kincony_kc868_a32_procpu.dts @@ -18,7 +18,7 @@ }; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/kincony/kincony_kc868_a32/kincony_kc868_a32_procpu.yaml b/boards/kincony/kincony_kc868_a32/kincony_kc868_a32_procpu.yaml index 325c3794c29da54..89cfbb2e3fced1e 100644 --- a/boards/kincony/kincony_kc868_a32/kincony_kc868_a32_procpu.yaml +++ b/boards/kincony/kincony_kc868_a32/kincony_kc868_a32_procpu.yaml @@ -12,8 +12,4 @@ supported: - nvs - counter - entropy -testing: - ignore_tags: - - net - - bluetooth vendor: kincony diff --git a/boards/lilygo/ttgo_lora32/Kconfig.defconfig b/boards/lilygo/ttgo_lora32/Kconfig.defconfig deleted file mode 100644 index 228856d043612ed..000000000000000 --- a/boards/lilygo/ttgo_lora32/Kconfig.defconfig +++ /dev/null @@ -1,11 +0,0 @@ -# Lilygo ttgo LoRa32 board configuration - -# Copyright (c) 2024 Lothar Felten -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_TTGO_LORA32_ESP32_PROCPU - -config ENTROPY_GENERATOR - default y - -endif # BOARD_TTGO_LORA32_ESP32_PROCPU diff --git a/boards/lilygo/ttgo_lora32/ttgo_lora32-pinctrl.dtsi b/boards/lilygo/ttgo_lora32/ttgo_lora32-pinctrl.dtsi index eaa3e9b422b5158..b8140e4451a628e 100644 --- a/boards/lilygo/ttgo_lora32/ttgo_lora32-pinctrl.dtsi +++ b/boards/lilygo/ttgo_lora32/ttgo_lora32-pinctrl.dtsi @@ -41,6 +41,7 @@ output-high; }; }; + sdhc0_default: sdhc0_default { group1 { pinmux = ; diff --git a/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_appcpu.dts b/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_appcpu.dts index 431572891342cb1..a4c5d93acfb4fa2 100644 --- a/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_appcpu.dts +++ b/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_appcpu.dts @@ -13,9 +13,11 @@ compatible = "espressif,esp32"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; diff --git a/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_procpu.dts b/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_procpu.dts index 060278b50dc902c..6ae0dbeb0152ebf 100644 --- a/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_procpu.dts +++ b/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_procpu.dts @@ -24,7 +24,7 @@ }; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_procpu.yaml b/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_procpu.yaml index d16b056dd1166d5..e59818cc3dcbc00 100644 --- a/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_procpu.yaml +++ b/boards/lilygo/ttgo_lora32/ttgo_lora32_esp32_procpu.yaml @@ -15,8 +15,4 @@ supported: - lora - nvs - sdhc -testing: - ignore_tags: - - net - - bluetooth vendor: lilygo diff --git a/boards/lilygo/ttgo_t7v1_5/Kconfig b/boards/lilygo/ttgo_t7v1_5/Kconfig new file mode 100644 index 000000000000000..05e38e3f85c3706 --- /dev/null +++ b/boards/lilygo/ttgo_t7v1_5/Kconfig @@ -0,0 +1,7 @@ +# Copyright 2024 Tobias Kässer +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 4096 if BOARD_TTGO_T7V1_5_ESP32_PROCPU + default 256 if BOARD_TTGO_T7V1_5_ESP32_APPCPU diff --git a/boards/lilygo/ttgo_t7v1_5/Kconfig.sysbuild b/boards/lilygo/ttgo_t7v1_5/Kconfig.sysbuild new file mode 100644 index 000000000000000..3a2d17ac5cfd067 --- /dev/null +++ b/boards/lilygo/ttgo_t7v1_5/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/lilygo/ttgo_t7v1_5/Kconfig.ttgo_t7v1_5 b/boards/lilygo/ttgo_t7v1_5/Kconfig.ttgo_t7v1_5 new file mode 100644 index 000000000000000..e612323a066ddcc --- /dev/null +++ b/boards/lilygo/ttgo_t7v1_5/Kconfig.ttgo_t7v1_5 @@ -0,0 +1,7 @@ +# Copyright 2024 Tobias Kässer +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_TTGO_T7V1_5 + select SOC_ESP32 + select SOC_ESP32_PROCPU if BOARD_TTGO_T7V1_5_ESP32_PROCPU + select SOC_ESP32_APPCPU if BOARD_TTGO_T7V1_5_ESP32_APPCPU diff --git a/boards/lilygo/ttgo_t7v1_5/board.cmake b/boards/lilygo/ttgo_t7v1_5/board.cmake new file mode 100644 index 000000000000000..2f04d1fe8861ea6 --- /dev/null +++ b/boards/lilygo/ttgo_t7v1_5/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/lilygo/ttgo_t7v1_5/board.yml b/boards/lilygo/ttgo_t7v1_5/board.yml new file mode 100644 index 000000000000000..0a3f71986464248 --- /dev/null +++ b/boards/lilygo/ttgo_t7v1_5/board.yml @@ -0,0 +1,5 @@ +board: + name: ttgo_t7v1_5 + vendor: lilygo + socs: + - name: esp32 diff --git a/boards/lilygo/ttgo_t7v1_5/doc/img/ttgo_t7v1_5.webp b/boards/lilygo/ttgo_t7v1_5/doc/img/ttgo_t7v1_5.webp new file mode 100644 index 000000000000000..605a4fb7cc8daa6 Binary files /dev/null and b/boards/lilygo/ttgo_t7v1_5/doc/img/ttgo_t7v1_5.webp differ diff --git a/boards/lilygo/ttgo_t7v1_5/doc/index.rst b/boards/lilygo/ttgo_t7v1_5/doc/index.rst new file mode 100644 index 000000000000000..13f5107cd80e504 --- /dev/null +++ b/boards/lilygo/ttgo_t7v1_5/doc/index.rst @@ -0,0 +1,216 @@ +.. zephyr:board:: ttgo_t7v1_5 + +Overview +******** + +LILYGO® TTGO T7 Mini32 V1.5 ia an IoT mini development board +based on the Espressif ESP32-WROVER-E module. + +It features the following integrated components: +- ESP32 chip (240MHz dual core, 520KB SRAM, Wi-Fi, Bluetooth) +- on board antenna +- Micro-USB connector for power and communication +- JST GH 2-pin battery connector +- LED + +Functional Description +********************** +This board is based on the ESP32-WROVER-E module with 4MB of flash (there +are models 16MB as well), WiFi and BLE support. It has a Micro-USB port for +programming and debugging, integrated battery charging and an on-board antenna. + +Connections and IOs +=================== + +The ``ttgo_t7v1_5/esp32/procpu`` board target supports the following hardware features: + ++-----------+------------+------------------+ +| Interface | Controller | Driver/Component | ++===========+============+==================+ +| CPU | ESP32 | arch/xtensa | ++-----------+------------+------------------+ +| GPIO | on-chip | gpio_esp32 | ++-----------+------------+------------------+ +| UART | on-chip | uart_esp32 | ++-----------+------------+------------------+ +| I2C | on-chip | i2c_esp32 | ++-----------+------------+------------------+ +| SPI | on-chip | spi_esp32_spim | ++-----------+------------+------------------+ +| LoRa | SX1276 | lora_sx127x | ++-----------+------------+------------------+ +| WiFi | on-chip | wifi_esp32 | ++-----------+------------+------------------+ +| BLE | on-chip | bluetooth_esp32 | ++-----------+------------+------------------+ +| Flash | on-chip | flash_esp32 | ++-----------+------------+------------------+ + +System requirements +******************* + +Prerequisites +============= + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be build (and flash) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the ESP32 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :app: samples/hello_world + :board: ttgo_t7v1_5/esp32/procpu + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │   └── zephyr + │   ├── zephyr.elf + │   └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be build one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: ttgo_t7v1_5/esp32/procpu + :goals: build + +The usual ``flash`` target will work with the ``ttgo_t7v1_5`` board +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: ttgo_t7v1_5/esp32/procpu + :goals: flash + +The default baud rate for the Lilygo TTGO T7 V1.5 is set to 1500000bps. If experiencing issues when flashing, +try using different values by using ``--esp-baud-rate `` option during +``west flash`` (e.g. ``west flash --esp-baud-rate 115200``). + +You can also open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! ttgo_t7v1_5 + +Sample applications +=================== + +The following samples will run out of the box on the TTGO T7 V1.5 board. + +To build the blinky sample: + +.. zephyr-app-commands:: + :tool: west + :app: samples/basic/blinky + :board: ttgo_t7v1_5/esp32/procpu + :goals: build + +To build the bluetooth beacon sample: + +.. zephyr-app-commands:: + :tool: west + :app: samples/bluetooth/beacon + :board: ttgo_t7v1_5/esp32/procpu + :goals: build + + +Related Documents +***************** +.. _`Lilygo TTGO T7-V1.5 schematic`: https://github.com/LilyGO/TTGO-T7-Demo/blob/master/t7_v1.5.pdf +.. _`Lilygo github repo`: https://github.com/LilyGO/TTGO-T7-Demo/tree/master +.. _`Espressif ESP32-WROVER-E datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-wrover-e_esp32-wrover-ie_datasheet_en.pdf +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases diff --git a/boards/lilygo/ttgo_t7v1_5/support/openocd.cfg b/boards/lilygo/ttgo_t7v1_5/support/openocd.cfg new file mode 100644 index 000000000000000..756e960dd203a86 --- /dev/null +++ b/boards/lilygo/ttgo_t7v1_5/support/openocd.cfg @@ -0,0 +1,6 @@ +set ESP_RTOS none + +source [find interface/esp_usb_jtag.cfg] + +source [find target/esp32.cfg] +adapter_khz 5000 diff --git a/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5-pinctrl.dtsi b/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5-pinctrl.dtsi new file mode 100644 index 000000000000000..13daa9b7ce91ae0 --- /dev/null +++ b/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5-pinctrl.dtsi @@ -0,0 +1,44 @@ +/* + * Copyright 2024 Tobias Kässer + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + spim3_default: spim3_default { + group1 { + pinmux = , + ; + }; + /* GPIO5 is CS */ + group2 { + pinmux = ; + output-low; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; +}; diff --git a/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_appcpu.dts b/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_appcpu.dts new file mode 100644 index 000000000000000..baca8424861568d --- /dev/null +++ b/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_appcpu.dts @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include + +/ { + model = "ttgo t7 v1.5 APPCPU"; + compatible = "espressif,esp32"; + + chosen { + zephyr,sram = &sram0; + zephyr,ipc_shm = &shm0; + zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; + }; +}; + +&ipm0 { + status = "okay"; +}; + +&trng0 { + status = "okay"; +}; diff --git a/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_appcpu.yaml b/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_appcpu.yaml new file mode 100644 index 000000000000000..b7efb73d9aeb6e7 --- /dev/null +++ b/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_appcpu.yaml @@ -0,0 +1,27 @@ +identifier: ttgo_t7v1_5/esp32/appcpu +name: TTGO T7 V1.5 APPCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - uart +testing: + ignore_tags: + - net + - bluetooth + - flash + - cpp + - posix + - watchdog + - logging + - kernel + - pm + - gpio + - crypto + - eeprom + - heap + - cmsis_rtos + - jwt + - zdsp +vendor: lilygo diff --git a/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_appcpu_defconfig b/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_appcpu_defconfig new file mode 100644 index 000000000000000..9abf2ff0430aba3 --- /dev/null +++ b/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_appcpu_defconfig @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_MAIN_STACK_SIZE=2048 +CONFIG_CLOCK_CONTROL=y diff --git a/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_procpu.dts b/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_procpu.dts new file mode 100644 index 000000000000000..4fab0e2ae72163a --- /dev/null +++ b/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_procpu.dts @@ -0,0 +1,98 @@ +/* + * Copyright 2024 Tobias Kässer + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include +#include "ttgo_t7v1_5-pinctrl.dtsi" +#include + +/ { + model = "ttgo T7 V1.5 PROCPU"; + compatible = "lilygo,ttgo-t7v1_5"; + + aliases { + led0 = &green_led; + uart-0 = &uart0; + i2c-0 = &i2c0; + watchdog0 = &wdt0; + }; + + chosen { + zephyr,sram = &sram0; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + }; + + leds { + compatible = "gpio-leds"; + + green_led: led_0 { + gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>; + label = "Green - LED0"; + }; + }; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +/* OLED display */ +&i2c0 { + status = "okay"; + clock-frequency = ; + sda-gpios = <&gpio0 21 GPIO_OPEN_DRAIN>; + scl-gpios = <&gpio0 22 GPIO_OPEN_DRAIN>; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; +}; + +&spi3 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim3_default>; + pinctrl-names = "default"; + cs-gpios = <&gpio0 27 GPIO_ACTIVE_LOW>; +}; + +&timer0 { + status = "okay"; +}; + +&timer1 { + status = "okay"; +}; + +&timer2 { + status = "okay"; +}; + +&timer3 { + status = "okay"; +}; + +&trng0 { + status = "okay"; +}; + +&wifi { + status = "okay"; +}; diff --git a/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_procpu.yaml b/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_procpu.yaml new file mode 100644 index 000000000000000..45d64a292507de1 --- /dev/null +++ b/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_procpu.yaml @@ -0,0 +1,17 @@ +identifier: ttgo_lora32/esp32/procpu +name: TTGO LoRa32 PROCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - gpio + - i2c + - spi + - watchdog + - uart + - pinmux + - display + - lora + - nvs +vendor: lilygo diff --git a/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_procpu_defconfig b/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_procpu_defconfig new file mode 100644 index 000000000000000..f029cac9e9e77b7 --- /dev/null +++ b/boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_procpu_defconfig @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_MAIN_STACK_SIZE=2048 + +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y + +CONFIG_GPIO=y diff --git a/boards/lilygo/ttgo_t8c3/Kconfig.ttgo_t8c3 b/boards/lilygo/ttgo_t8c3/Kconfig.ttgo_t8c3 index 60cd233a9b4a3c4..d65bd257befad8f 100644 --- a/boards/lilygo/ttgo_t8c3/Kconfig.ttgo_t8c3 +++ b/boards/lilygo/ttgo_t8c3/Kconfig.ttgo_t8c3 @@ -2,4 +2,4 @@ # SPDX-License-Identifier: Apache-2.0 config BOARD_TTGO_T8C3 - select SOC_ESP32C3_FX4 + select SOC_ESP32C3_FN4 diff --git a/boards/lilygo/ttgo_t8c3/ttgo_t8c3.dts b/boards/lilygo/ttgo_t8c3/ttgo_t8c3.dts index 3e2b0ab74fa1bbb..896fdfc3bbf1323 100644 --- a/boards/lilygo/ttgo_t8c3/ttgo_t8c3.dts +++ b/boards/lilygo/ttgo_t8c3/ttgo_t8c3.dts @@ -21,7 +21,7 @@ }; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &usb_serial; zephyr,shell-uart = &usb_serial; zephyr,flash = &flash0; diff --git a/boards/lilygo/ttgo_t8c3/ttgo_t8c3.yaml b/boards/lilygo/ttgo_t8c3/ttgo_t8c3.yaml index e2fc320098a435b..e0d0ce24a3dd857 100644 --- a/boards/lilygo/ttgo_t8c3/ttgo_t8c3.yaml +++ b/boards/lilygo/ttgo_t8c3/ttgo_t8c3.yaml @@ -11,8 +11,4 @@ supported: - uart - watchdog - can -testing: - ignore_tags: - - net - - bluetooth vendor: lilygo diff --git a/boards/lilygo/ttgo_t8s3/Kconfig b/boards/lilygo/ttgo_t8s3/Kconfig new file mode 100644 index 000000000000000..e0797e974b8526a --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/Kconfig @@ -0,0 +1,7 @@ +# Copyright (c) 2024 Lothar Felten +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 4096 if BOARD_TTGO_T8S3_ESP32S3_PROCPU + default 256 if BOARD_TTGO_T8S3_ESP32S3_APPCPU diff --git a/boards/lilygo/ttgo_t8s3/Kconfig.sysbuild b/boards/lilygo/ttgo_t8s3/Kconfig.sysbuild new file mode 100644 index 000000000000000..3a2d17ac5cfd067 --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/lilygo/ttgo_t8s3/Kconfig.ttgo_t8s3 b/boards/lilygo/ttgo_t8s3/Kconfig.ttgo_t8s3 new file mode 100644 index 000000000000000..d119b68f6cba4d4 --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/Kconfig.ttgo_t8s3 @@ -0,0 +1,7 @@ +# Copyright 2024 Lothar Felten +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_TTGO_T8S3 + select SOC_ESP32S3_WROOM_N16R8 + select SOC_ESP32S3_PROCPU if BOARD_TTGO_T8S3_ESP32S3_PROCPU + select SOC_ESP32S3_APPCPU if BOARD_TTGO_T8S3_ESP32S3_APPCPU diff --git a/boards/lilygo/ttgo_t8s3/board.cmake b/boards/lilygo/ttgo_t8s3/board.cmake new file mode 100644 index 000000000000000..2f04d1fe8861ea6 --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/lilygo/ttgo_t8s3/board.yml b/boards/lilygo/ttgo_t8s3/board.yml new file mode 100644 index 000000000000000..a6bed2be9153619 --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/board.yml @@ -0,0 +1,6 @@ +board: + name: ttgo_t8s3 + full_name: TTGO T8-S3 + vendor: lilygo + socs: + - name: esp32s3 diff --git a/boards/lilygo/ttgo_t8s3/doc/img/ttgo_t8s3.webp b/boards/lilygo/ttgo_t8s3/doc/img/ttgo_t8s3.webp new file mode 100644 index 000000000000000..1ebfce3627ce53e Binary files /dev/null and b/boards/lilygo/ttgo_t8s3/doc/img/ttgo_t8s3.webp differ diff --git a/boards/lilygo/ttgo_t8s3/doc/index.rst b/boards/lilygo/ttgo_t8s3/doc/index.rst new file mode 100644 index 000000000000000..09455ed19a60563 --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/doc/index.rst @@ -0,0 +1,229 @@ +.. zephyr:board:: ttgo_t8s3 + +Overview +******** + +Lilygo TTGO T8-S3 is an IoT mini development board based on the +Espressif ESP32-S3 WiFi/Bluetooth dual-mode chip. + +It features the following integrated components: + +- ESP32-S3 chip (240MHz dual core, Bluetooth LE, Wi-Fi) +- on board antenna and IPEX connector +- USB-C connector for power and communication +- MX 1.25mm 2-pin battery connector +- JST SH 1.0mm 4-pin UART connector +- SD card slot + +Functional Description +********************** +This board is based on the ESP32-S3 with 16MB of flash, WiFi and BLE support. It +has an USB-C port for programming and debugging, integrated battery charging +and an on-board antenna. The fitted U.FL external antenna connector can be +enabled by moving a 0-ohm resistor. + +Connections and IOs +=================== + +The ``ttgo_t8s3`` board target supports the following hardware features: + ++------------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++============+============+=====================================+ +| UART | on-chip | serial port | ++------------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++------------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++------------+------------+-------------------------------------+ +| USB-JTAG | on-chip | hardware interface | ++------------+------------+-------------------------------------+ +| SPI Master | on-chip | spi, sdmmc | ++------------+------------+-------------------------------------+ +| TWAI/CAN | on-chip | can | ++------------+------------+-------------------------------------+ +| ADC | on-chip | adc | ++------------+------------+-------------------------------------+ +| Timers | on-chip | counter | ++------------+------------+-------------------------------------+ +| Watchdog | on-chip | watchdog | ++------------+------------+-------------------------------------+ +| TRNG | on-chip | entropy | ++------------+------------+-------------------------------------+ +| LEDC | on-chip | pwm | ++------------+------------+-------------------------------------+ +| MCPWM | on-chip | pwm | ++------------+------------+-------------------------------------+ +| PCNT | on-chip | qdec | ++------------+------------+-------------------------------------+ +| GDMA | on-chip | dma | ++------------+------------+-------------------------------------+ +| USB-CDC | on-chip | serial | ++------------+------------+-------------------------------------+ + +Start Application Development +***************************** + +Before powering up your Lilygo TTGO T8-S3, please make sure that the board is in good +condition with no obvious signs of damage. + +System requirements +******************* + +Prerequisites +============= + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code-block:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the ESP32 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: ttgo_t8s3/esp32s3/procpu + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │   └── zephyr + │   ├── zephyr.elf + │   └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: ttgo_t8s3/esp32s3/procpu + :goals: build + +The usual ``flash`` target will work with the ``ttgo_t8s3`` board target +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: ttgo_t8s3/esp32s3/procpu + :goals: flash + +The default baud rate for the Lilygo TTGO T8-S3 is set to 1500000bps. If experiencing issues when flashing, +try using different values by using ``--esp-baud-rate `` option during +``west flash`` (e.g. ``west flash --esp-baud-rate 115200``). + +You can also open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! ttgo_t8s3 + +Code samples +============ + +The following code samples will run out of the box on the TTGO T8-S3 board: + +* :zephyr:code-sample:`wifi-shell` +* :zephyr:code-sample:`fs` + + +References +********** + +.. target-notes:: + +.. _`Lilygo TTGO T8-S3 schematic`: https://github.com/Xinyuan-LilyGO/T8-S3/blob/main/schematic/T8_S3_V1.0.pdf +.. _`Lilygo github repo`: https://github.com/Xinyuan-LilyGo +.. _`ESP32-S3 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-s3-mini-1_mini-1u_datasheet_en.pdf +.. _`ESP32-S3 Technical Reference Manual`: https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases +.. _`JTAG debugging for ESP32-S3`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/api-guides/jtag-debugging/ diff --git a/boards/lilygo/ttgo_t8s3/support/openocd.cfg b/boards/lilygo/ttgo_t8s3/support/openocd.cfg new file mode 100644 index 000000000000000..0b2c4909fe0e0f3 --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/support/openocd.cfg @@ -0,0 +1,7 @@ +set ESP_RTOS none +set ESP32_ONLYCPU 1 + +source [find interface/esp_usb_jtag.cfg] + +source [find target/esp32s3.cfg] +adapter_khz 5000 diff --git a/boards/lilygo/ttgo_t8s3/ttgo_t8s3-pinctrl.dtsi b/boards/lilygo/ttgo_t8s3/ttgo_t8s3-pinctrl.dtsi new file mode 100644 index 000000000000000..7b6d46e474c8f2e --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/ttgo_t8s3-pinctrl.dtsi @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2024 Lothar Felten + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; + + spim2_default: spim2_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + spim3_default: spim3_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + twai_default: twai_default { + group1 { + pinmux = , + ; + }; + }; +}; diff --git a/boards/lilygo/ttgo_t8s3/ttgo_t8s3_appcpu.dts b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_appcpu.dts new file mode 100644 index 000000000000000..fe07757f5cf474e --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_appcpu.dts @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include + +/ { + model = "TTGO T8S3 APPCPU"; + compatible = "espressif,esp32s3"; + + chosen { + zephyr,sram = &sram0; + zephyr,ipc_shm = &shm0; + zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; + }; +}; + +&trng0 { + status = "okay"; +}; + +&ipm0 { + status = "okay"; +}; diff --git a/boards/lilygo/ttgo_t8s3/ttgo_t8s3_appcpu.yaml b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_appcpu.yaml new file mode 100644 index 000000000000000..c64689ec4f7c82b --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_appcpu.yaml @@ -0,0 +1,27 @@ +identifier: ttgo_t8s3/esp32s3/appcpu +name: TTGO T8S3 APPCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - uart +testing: + ignore_tags: + - net + - bluetooth + - flash + - cpp + - posix + - watchdog + - logging + - kernel + - pm + - gpio + - crypto + - eeprom + - heap + - cmsis_rtos + - jwt + - zdsp +vendor: lilygo diff --git a/boards/lilygo/ttgo_t8s3/ttgo_t8s3_appcpu_defconfig b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_appcpu_defconfig new file mode 100644 index 000000000000000..9abf2ff0430aba3 --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_appcpu_defconfig @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_MAIN_STACK_SIZE=2048 +CONFIG_CLOCK_CONTROL=y diff --git a/boards/lilygo/ttgo_t8s3/ttgo_t8s3_procpu.dts b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_procpu.dts new file mode 100644 index 000000000000000..a034a9cb49a4e8f --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_procpu.dts @@ -0,0 +1,146 @@ +/* + * Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + */ +/dts-v1/; + +#include +#include "ttgo_t8s3-pinctrl.dtsi" +#include +#include +#include + +/ { + model = "TTGO T8S3 PROCPU"; + compatible = "espressif,esp32s3"; + + aliases { + i2c-0 = &i2c0; + watchdog0 = &wdt0; + sdhc0 = &sd0; + uart-0 = &uart0; + sw0 = &button0; + }; + + chosen { + zephyr,sram = &sram0; + /* console can be UART or USB CDC */ + /* zephyr,console = &uart0; */ + /* zephyr,shell-uart = &uart0; */ + zephyr,console = &usb_serial; + zephyr,shell-uart = &usb_serial; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,bt-hci = &esp32_bt_hci; + }; + + buttons { + compatible = "gpio-keys"; + button0: button_0 { + gpios = <&gpio0 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "BOOT Button"; + zephyr,code = ; + }; + }; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&touch { + debounce-interval-ms = <30>; + href-microvolt = <2700000>; + lref-microvolt = <500000>; + href-atten-microvolt = <1000000>; + filter-mode = ; + filter-debounce-cnt = <1>; + filter-noise-thr = ; + filter-jitter-step = <4>; + filter-smooth-level = ; +}; + +&i2c0 { + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; +}; + +&spi2 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim2_default>; + pinctrl-names = "default"; + /* dma-enabled; TODO */ + clock-frequency = <20000000>; + cs-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; + sd0: sd@0 { + compatible = "zephyr,sdhc-spi-slot"; + reg = <0>; + status = "okay"; + spi-max-frequency = <20000000>; + mmc { + compatible = "zephyr,sdmmc-disk"; + disk-name = "SD"; + status = "okay"; + }; + }; +}; + +&spi3 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim3_default>; + pinctrl-names = "default"; +}; + +&twai { + pinctrl-0 = <&twai_default>; + pinctrl-names = "default"; +}; + +&usb_serial { + status = "okay"; +}; + +&timer0 { + status = "okay"; +}; + +&timer1 { + status = "okay"; +}; + +&timer2 { + status = "okay"; +}; + +&timer3 { + status = "okay"; +}; + +&wdt0 { + status = "okay"; +}; + +&trng0 { + status = "okay"; +}; + +&esp32_bt_hci { + status = "okay"; +}; diff --git a/boards/lilygo/ttgo_t8s3/ttgo_t8s3_procpu.yaml b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_procpu.yaml new file mode 100644 index 000000000000000..cc1b652145aa09d --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_procpu.yaml @@ -0,0 +1,21 @@ +identifier: ttgo_t8s3/esp32s3/procpu +name: TTGO T8S3 PROCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - gpio + - uart + - i2c + - i2s + - spi + - can + - counter + - watchdog + - entropy + - pwm + - dma + - input + - video +vendor: lilygo diff --git a/boards/lilygo/ttgo_t8s3/ttgo_t8s3_procpu_defconfig b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_procpu_defconfig new file mode 100644 index 000000000000000..723de34c4713681 --- /dev/null +++ b/boards/lilygo/ttgo_t8s3/ttgo_t8s3_procpu_defconfig @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_MAIN_STACK_SIZE=2048 +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y +CONFIG_GPIO=y +CONFIG_CLOCK_CONTROL=y diff --git a/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core.dts b/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core.dts index cfdfd771d13ec79..5f6aadc9ce128df 100644 --- a/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core.dts +++ b/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core.dts @@ -10,7 +10,7 @@ / { chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core.yaml b/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core.yaml index 5baefb918a28d77..5ba64d712ddb2d3 100644 --- a/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core.yaml +++ b/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core.yaml @@ -15,8 +15,4 @@ supported: - spi - counter - entropy -testing: - ignore_tags: - - net - - bluetooth vendor: luatos diff --git a/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core_esp32c3_usb.dts b/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core_esp32c3_usb.dts index f7e99f9b776fbac..b029ef42ed4176e 100644 --- a/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core_esp32c3_usb.dts +++ b/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core_esp32c3_usb.dts @@ -10,7 +10,7 @@ / { chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &usb_serial; zephyr,shell-uart = &usb_serial; zephyr,flash = &flash0; diff --git a/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core_esp32c3_usb.yaml b/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core_esp32c3_usb.yaml index 7910c6ac8eedade..ca0982c4111d95a 100644 --- a/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core_esp32c3_usb.yaml +++ b/boards/luatos/esp32c3_luatos_core/esp32c3_luatos_core_esp32c3_usb.yaml @@ -15,8 +15,4 @@ supported: - spi - counter - entropy -testing: - ignore_tags: - - net - - bluetooth vendor: luatos diff --git a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu.dts b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu.dts index 642949948cf6cad..e302416886aeab5 100644 --- a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu.dts +++ b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu.dts @@ -13,7 +13,7 @@ compatible = "espressif,esp32s3"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; zephyr,flash = &flash0; diff --git a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu_usb.dts b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu_usb.dts index a5dc8a03792361d..eee5d310b6956e9 100644 --- a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu_usb.dts +++ b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_appcpu_usb.dts @@ -13,7 +13,7 @@ compatible = "espressif,esp32s3"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; zephyr,flash = &flash0; diff --git a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_procpu.dts b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_procpu.dts index 2a04d5680668a29..0b7973b8810e6ef 100644 --- a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_procpu.dts +++ b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_procpu.dts @@ -21,7 +21,7 @@ }; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_procpu.yaml b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_procpu.yaml index 6d564843a1c32ee..369a2fc7b63a60b 100644 --- a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_procpu.yaml +++ b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_procpu.yaml @@ -15,8 +15,4 @@ supported: - entropy - pwm - dma -testing: - ignore_tags: - - net - - bluetooth vendor: luatos diff --git a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_procpu_usb.dts b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_procpu_usb.dts index a4182a4ba80ae48..0d7d8c6ae8a03b4 100644 --- a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_procpu_usb.dts +++ b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_procpu_usb.dts @@ -21,7 +21,7 @@ }; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &usb_serial; zephyr,shell-uart = &usb_serial; zephyr,flash = &flash0; diff --git a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_procpu_usb.yaml b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_procpu_usb.yaml index 7e160d68117160a..fe4e1ad61dd295e 100644 --- a/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_procpu_usb.yaml +++ b/boards/luatos/esp32s3_luatos_core/esp32s3_luatos_core_procpu_usb.yaml @@ -15,8 +15,4 @@ supported: - entropy - pwm - dma -testing: - ignore_tags: - - net - - bluetooth vendor: luatos diff --git a/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_appcpu.dts b/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_appcpu.dts index e9fee5269953494..3262496f254fed8 100644 --- a/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_appcpu.dts +++ b/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_appcpu.dts @@ -13,9 +13,11 @@ compatible = "espressif,esp32"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; diff --git a/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_procpu.dts b/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_procpu.dts index 884fdf949ccf257..012c2b1f8fe7e0b 100644 --- a/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_procpu.dts +++ b/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_procpu.dts @@ -20,7 +20,7 @@ compatible = "m5stack,m5stack-atom-lite"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_procpu.yaml b/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_procpu.yaml index 14462ac58f82958..04b3ef187161d9e 100644 --- a/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_procpu.yaml +++ b/boards/m5stack/m5stack_atom_lite/m5stack_atom_lite_procpu.yaml @@ -12,8 +12,4 @@ supported: - uart - pinmux - nvs -testing: - ignore_tags: - - net - - bluetooth vendor: m5stack diff --git a/boards/m5stack/m5stack_atoms3/m5stack_atoms3_appcpu.dts b/boards/m5stack/m5stack_atoms3/m5stack_atoms3_appcpu.dts index 83eb4941fe8e619..2bc18ec2048b5f9 100644 --- a/boards/m5stack/m5stack_atoms3/m5stack_atoms3_appcpu.dts +++ b/boards/m5stack/m5stack_atoms3/m5stack_atoms3_appcpu.dts @@ -13,7 +13,7 @@ compatible = "espressif,esp32s3"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; zephyr,flash = &flash0; diff --git a/boards/m5stack/m5stack_atoms3/m5stack_atoms3_procpu.dts b/boards/m5stack/m5stack_atoms3/m5stack_atoms3_procpu.dts index cf12d00387d5628..ed963407407482c 100644 --- a/boards/m5stack/m5stack_atoms3/m5stack_atoms3_procpu.dts +++ b/boards/m5stack/m5stack_atoms3/m5stack_atoms3_procpu.dts @@ -17,7 +17,7 @@ compatible = "m5stack,atoms3"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &usb_serial; zephyr,shell-uart = &usb_serial; zephyr,flash = &flash0; diff --git a/boards/m5stack/m5stack_atoms3/m5stack_atoms3_procpu.yaml b/boards/m5stack/m5stack_atoms3/m5stack_atoms3_procpu.yaml index 082aa4e56992554..8fe5983e19c9bbe 100644 --- a/boards/m5stack/m5stack_atoms3/m5stack_atoms3_procpu.yaml +++ b/boards/m5stack/m5stack_atoms3/m5stack_atoms3_procpu.yaml @@ -14,8 +14,4 @@ supported: - pinmux - nvs - display -testing: - ignore_tags: - - net - - bluetooth vendor: m5stack diff --git a/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_appcpu.dts b/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_appcpu.dts index 0842908542a065c..0385c9e39a39df1 100644 --- a/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_appcpu.dts +++ b/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_appcpu.dts @@ -13,7 +13,7 @@ compatible = "espressif,esp32s3"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; zephyr,flash = &flash0; diff --git a/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_procpu.dts b/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_procpu.dts index e224b50376222c2..c5884a846a156ef 100644 --- a/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_procpu.dts +++ b/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_procpu.dts @@ -18,7 +18,7 @@ compatible = "m5stack,atoms3_lite"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &usb_serial; zephyr,shell-uart = &usb_serial; zephyr,flash = &flash0; diff --git a/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_procpu.yaml b/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_procpu.yaml index 996732bc3dd007d..34420d21d60e42b 100644 --- a/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_procpu.yaml +++ b/boards/m5stack/m5stack_atoms3_lite/m5stack_atoms3_lite_procpu.yaml @@ -16,8 +16,4 @@ supported: - pinmux - nvs - dma -testing: - ignore_tags: - - net - - bluetooth vendor: m5stack diff --git a/boards/m5stack/m5stack_core2/m5stack_core2_appcpu.dts b/boards/m5stack/m5stack_core2/m5stack_core2_appcpu.dts index 3a50334db214374..4f7258310b72b9c 100644 --- a/boards/m5stack/m5stack_core2/m5stack_core2_appcpu.dts +++ b/boards/m5stack/m5stack_core2/m5stack_core2_appcpu.dts @@ -13,9 +13,11 @@ compatible = "espressif,esp32"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; diff --git a/boards/m5stack/m5stack_core2/m5stack_core2_procpu.dts b/boards/m5stack/m5stack_core2/m5stack_core2_procpu.dts index 050f4d885792e2c..554e1885488e2bb 100644 --- a/boards/m5stack/m5stack_core2/m5stack_core2_procpu.dts +++ b/boards/m5stack/m5stack_core2/m5stack_core2_procpu.dts @@ -28,7 +28,7 @@ }; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; @@ -74,6 +74,12 @@ rotation = <0>; }; }; + + bus_5v: bus_5v { + compatible = "regulator-fixed"; + regulator-name = "bus_5v"; + enable-gpios = <&axp192_gpio 5 GPIO_ACTIVE_HIGH>; + }; }; &flash0 { @@ -182,12 +188,6 @@ }; }; - bus_5v: bus_5v { - compatible = "regulator-fixed"; - regulator-name = "bus_5v"; - enable-gpios = <&axp192_gpio 5 GPIO_ACTIVE_HIGH>; - }; - ft5336_touch: ft5336@38 { compatible = "focaltech,ft5336"; reg = <0x38>; diff --git a/boards/m5stack/m5stack_core2/m5stack_core2_procpu.yaml b/boards/m5stack/m5stack_core2/m5stack_core2_procpu.yaml index 5a95351e16df303..5e7edaca6febba8 100644 --- a/boards/m5stack/m5stack_core2/m5stack_core2_procpu.yaml +++ b/boards/m5stack/m5stack_core2/m5stack_core2_procpu.yaml @@ -13,8 +13,4 @@ supported: - uart - pinmux - nvs -testing: - ignore_tags: - - net - - bluetooth vendor: m5stack diff --git a/boards/m5stack/m5stack_cores3/Kconfig b/boards/m5stack/m5stack_cores3/Kconfig index 26f6eed3551af4a..8cef5ae03edd616 100644 --- a/boards/m5stack/m5stack_cores3/Kconfig +++ b/boards/m5stack/m5stack_cores3/Kconfig @@ -3,5 +3,6 @@ config HEAP_MEM_POOL_ADD_SIZE_BOARD int - default 4096 if BOARD_M5STACK_CORES3_ESP32S3_PROCPU + default 4096 if BOARD_M5STACK_CORES3_ESP32S3_PROCPU || \ + BOARD_M5STACK_CORES3_ESP32S3_PROCPU_SE default 256 if BOARD_M5STACK_CORES3_ESP32S3_APPCPU diff --git a/boards/m5stack/m5stack_cores3/Kconfig.defconfig b/boards/m5stack/m5stack_cores3/Kconfig.defconfig new file mode 100644 index 000000000000000..b31bac7c90a14ea --- /dev/null +++ b/boards/m5stack/m5stack_cores3/Kconfig.defconfig @@ -0,0 +1,14 @@ +# M5Stack CoreS3 board defconfig + +# Copyright (c) 2024 TOKITA Hiroshi +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_M5STACK_CORES3_ESP32S3_PROCPU || BOARD_M5STACK_CORES3_ESP32S3_PROCPU_SE + +config INPUT_FT5336_INTERRUPT + default y if INPUT + +config INPUT + default y + +endif # BOARD_M5STACK_CORES3_ESP32S3_PROCPU || BOARD_M5STACK_CORES3_ESP32S3_PROCPU_SE diff --git a/boards/m5stack/m5stack_cores3/Kconfig.m5stack_cores3 b/boards/m5stack/m5stack_cores3/Kconfig.m5stack_cores3 index 990925a96bb900c..59a5912341703e2 100644 --- a/boards/m5stack/m5stack_cores3/Kconfig.m5stack_cores3 +++ b/boards/m5stack/m5stack_cores3/Kconfig.m5stack_cores3 @@ -5,5 +5,6 @@ config BOARD_M5STACK_CORES3 select SOC_ESP32S3 - select SOC_ESP32S3_PROCPU if BOARD_M5STACK_CORES3_ESP32S3_PROCPU + select SOC_ESP32S3_PROCPU if BOARD_M5STACK_CORES3_ESP32S3_PROCPU || \ + BOARD_M5STACK_CORES3_ESP32S3_PROCPU_SE select SOC_ESP32S3_APPCPU if BOARD_M5STACK_CORES3_ESP32S3_APPCPU diff --git a/boards/m5stack/m5stack_cores3/board.yml b/boards/m5stack/m5stack_cores3/board.yml index 64479891d23d828..765c6b9eba232df 100644 --- a/boards/m5stack/m5stack_cores3/board.yml +++ b/boards/m5stack/m5stack_cores3/board.yml @@ -4,3 +4,6 @@ board: vendor: m5stack socs: - name: esp32s3 + variants: + - name: se + cpucluster: procpu diff --git a/boards/m5stack/m5stack_cores3/doc/img/m5stack_cores3_se.webp b/boards/m5stack/m5stack_cores3/doc/img/m5stack_cores3_se.webp new file mode 100644 index 000000000000000..90e4450a8e7ffce Binary files /dev/null and b/boards/m5stack/m5stack_cores3/doc/img/m5stack_cores3_se.webp differ diff --git a/boards/m5stack/m5stack_cores3/doc/index.rst b/boards/m5stack/m5stack_cores3/doc/index.rst index 4ee0d8461b6971f..d9025e3f6d8af20 100644 --- a/boards/m5stack/m5stack_cores3/doc/index.rst +++ b/boards/m5stack/m5stack_cores3/doc/index.rst @@ -4,25 +4,27 @@ Overview ******** M5Stack CoreS3 is an ESP32-based development board from M5Stack. It is the third generation of the M5Stack Core series. +M5Stack CoreS3 SE is the compact version of CoreS3. It has the same form factor as the original M5Stack, +and some features were reduced from CoreS3. -M5Stack CoreS3 features consist of: +M5Stack CoreS3/CoreS3 SE features consist of: - ESP32-S3 chip (dual-core Xtensa LX7 processor @240MHz, WIFI, OTG and CDC functions) - PSRAM 8MB - Flash 16MB - LCD ISP 2", 320x240 pixel ILI9342C - Capacitive multi touch FT6336U -- Camera 30W pixel GC0308 - Speaker 1W AW88298 - Dual Microphones ES7210 Audio decoder - RTC BM8563 - USB-C - SD-Card slot -- Geomagnetic sensor BMM150 -- Proximity sensor LTR-553ALS-WA -- 6-Axis IMU BMI270 - PMIC AXP2101 -- Battery 500mAh 3.7 V +- Battery 500mAh 3.7 V (Not available for CoreS3 SE) +- Camera 30W pixel GC0308 (Not available for CoreS3 SE) +- Geomagnetic sensor BMM150 (Not available for CoreS3 SE) +- Proximity sensor LTR-553ALS-WA (Not available for CoreS3 SE) +- 6-Axis IMU BMI270 (Not available for CoreS3 SE) Start Application Development ***************************** @@ -48,24 +50,145 @@ below to retrieve those files. It is recommended running the command above after :file:`west update`. Building & Flashing -------------------- +******************* + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the ESP32 SoC. + +To build the sample application using sysbuild use the command: + +.. tabs:: + + .. group-tab:: M5Stack CoreS3 + + .. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: m5stack_cores3/esp32s3/procpu + :goals: build + :west-args: --sysbuild + :compact: + + .. group-tab:: M5Stack CoreS3 SE + + .. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: m5stack_cores3/esp32s3/procpu/se + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. Build and flash applications as usual (see :ref:`build_an_application` and :ref:`application_run` for more details). -.. zephyr-app-commands:: - :zephyr-app: samples/hello_world - :board: m5stack_cores3/esp32s3/procpu - :goals: build +.. tabs:: + + .. group-tab:: M5Stack CoreS3 + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: m5stack_cores3/esp32s3/procpu + :goals: build + + .. group-tab:: M5Stack CoreS3 SE + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: m5stack_cores3/esp32s3/procpu/se + :goals: build The usual ``flash`` target will work with the ``m5stack_cores3/esp32s3/procpu`` board configuration. Here is an example for the :zephyr:code-sample:`hello_world` application. -.. zephyr-app-commands:: - :zephyr-app: samples/hello_world - :board: m5stack_cores3/esp32s3/procpu - :goals: flash +.. tabs:: + + .. group-tab:: M5Stack CoreS3 + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: m5stack_cores3/esp32s3/procpu + :goals: flash + + .. group-tab:: M5Stack CoreS3 SE + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: m5stack_cores3/esp32s3/procpu/se + :goals: flash The baud rate of 921600bps is set by default. If experiencing issues when flashing, try using different values by using ``--esp-baud-rate `` option during @@ -85,9 +208,8 @@ message in the monitor: *** Booting Zephyr OS build vx.x.x-xxx-gxxxxxxxxxxxx *** Hello World! m5stack_cores3/esp32s3/procpu - Debugging ---------- +********* ESP32-S3 support on OpenOCD is available at `OpenOCD ESP32`_. @@ -95,6 +217,42 @@ ESP32-S3 has a built-in JTAG circuitry and can be debugged without any additiona Further documentation can be obtained from the SoC vendor in `JTAG debugging for ESP32-S3`_. +Here is an example for building the :zephyr:code-sample:`hello_world` application. + +.. tabs:: + + .. group-tab:: M5Stack CoreS3 + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: m5stack_cores3/esp32s3/procpu + :goals: debug + + .. group-tab:: M5Stack CoreS3 SE + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: m5stack_cores3/esp32s3/procpu/se + :goals: debug + +You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application. + +.. tabs:: + + .. group-tab:: M5Stack CoreS3 + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: m5stack_cores3/esp32s3/procpu + :goals: debug + + .. group-tab:: M5Stack CoreS3 SE + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: m5stack_cores3/esp32s3/procpu/se + :goals: debug + References ********** @@ -102,5 +260,7 @@ References .. _`M5Stack CoreS3 Documentation`: http://docs.m5stack.com/en/core/CoreS3 .. _`M5Stack CoreS3 Schematic`: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/K128%20CoreS3/Sch_M5_CoreS3_v1.0.pdf +.. _`M5Stack CoreS3 SE Documentation`: https://docs.m5stack.com/en/core/M5CoreS3%20SE +.. _`M5Stack CoreS3 SE Schematic`: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/products/core/M5CORES3%20SE/M5_CoreS3SE.pdf .. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases .. _`JTAG debugging for ESP32-S3`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/api-guides/jtag-debugging/ diff --git a/boards/m5stack/m5stack_cores3/grove_connectors.dtsi b/boards/m5stack/m5stack_cores3/grove_connectors.dtsi new file mode 100644 index 000000000000000..4139a48b86732fd --- /dev/null +++ b/boards/m5stack/m5stack_cores3/grove_connectors.dtsi @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2024 TOKITA Hiroshi + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + grove_header: grove_header { + compatible = "grove-header"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpio0 1 0>, + <1 0 &gpio0 2 0>; + }; +}; + +grove_i2c: &i2c1 {}; +grove_uart: &uart2 {}; diff --git a/boards/m5stack/m5stack_cores3/m5stack_cores3-pinctrl.dtsi b/boards/m5stack/m5stack_cores3/m5stack_cores3-pinctrl.dtsi index a759fbc3c779497..78f4c841147a871 100644 --- a/boards/m5stack/m5stack_cores3/m5stack_cores3-pinctrl.dtsi +++ b/boards/m5stack/m5stack_cores3/m5stack_cores3-pinctrl.dtsi @@ -20,6 +20,28 @@ }; }; + uart1_default: uart1_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + uart2_default: uart2_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + spim2_default: spim2_default { group1 { pinmux = , @@ -40,4 +62,21 @@ output-high; }; }; + + i2c1_default: i2c1_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; + + twai_default: twai_default { + group1 { + pinmux = , + ; + }; + }; }; diff --git a/boards/m5stack/m5stack_cores3/m5stack_cores3_appcpu.dts b/boards/m5stack/m5stack_cores3/m5stack_cores3_appcpu.dts index 1dac83cc46deafe..ff04bc68817ebf9 100644 --- a/boards/m5stack/m5stack_cores3/m5stack_cores3_appcpu.dts +++ b/boards/m5stack/m5stack_cores3/m5stack_cores3_appcpu.dts @@ -14,7 +14,7 @@ compatible = "espressif,esp32s3"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; zephyr,flash = &flash0; diff --git a/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu.dts b/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu.dts index 2042ca2422a4993..1def598cdec76e7 100644 --- a/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu.dts +++ b/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu.dts @@ -1,53 +1,24 @@ /* - * Copyright (c) 2024 Zhang Xingtao + * Copyright (c) 2024 TOKITA Hiroshi * * SPDX-License-Identifier: Apache-2.0 */ /dts-v1/; -#include -#include -#include "m5stack_cores3-pinctrl.dtsi" +#include "m5stack_cores3_procpu_common.dtsi" / { model = "M5Stack CoreS3 PROCPU"; compatible = "m5stack,cores3"; - chosen { - zephyr,sram = &sram0; - zephyr,console = &usb_serial; - zephyr,shell-uart = &usb_serial; - zephyr,flash = &flash0; - zephyr,code-partition = &slot0_partition; - zephyr,bt-hci = &esp32_bt_hci; - }; - aliases { - i2c-0 = &i2c0; - watchdog0 = &wdt0; accel0 = &bmi270; magn0 = &bmm150; }; }; -&usb_serial { - status = "okay"; -}; - -&uart0 { - status = "okay"; - current-speed = <115200>; - pinctrl-0 = <&uart0_default>; - pinctrl-names = "default"; -}; - &i2c0 { - status = "okay"; - clock-frequency = ; - pinctrl-0 = <&i2c0_default>; - pinctrl-names = "default"; - bmi270: bmi270@69 { compatible = "bosch,bmi270"; reg = <0x69>; @@ -59,24 +30,3 @@ reg = <0x10>; }; }; - -&spi2 { - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - pinctrl-0 = <&spim2_default>; - pinctrl-names = "default"; -}; - -&wdt0 { - status = "okay"; -}; - -&psram0 { - reg = <0x3c000000 DT_SIZE_M(8)>; - status = "okay"; -}; - -&esp32_bt_hci { - status = "okay"; -}; diff --git a/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu.yaml b/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu.yaml index e0e1f9c32cb7d4d..1db3de005d22915 100644 --- a/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu.yaml +++ b/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu.yaml @@ -5,17 +5,15 @@ arch: xtensa toolchain: - zephyr supported: - - dma + - gpio + - uart - i2c - spi - - uart + - can + - counter - watchdog -testing: - ignore_tags: - - bluetooth - - gpio - - net - - pinmux - - pwm - - regulator + - entropy + - pwm + - dma + - pinmux vendor: m5stack diff --git a/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_common.dtsi b/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_common.dtsi new file mode 100644 index 000000000000000..9b9b8991a15c2c2 --- /dev/null +++ b/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_common.dtsi @@ -0,0 +1,158 @@ +/* + * Copyright (c) 2024 Zhang Xingtao + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include "m5stack_cores3-pinctrl.dtsi" +#include "m5stack_mbus_connectors.dtsi" +#include "grove_connectors.dtsi" + +/ { + chosen { + zephyr,sram = &sram1; + zephyr,console = &usb_serial; + zephyr,shell-uart = &usb_serial; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,rtc = &bm8563_rtc; + zephyr,bt-hci = &esp32_bt_hci; + zephyr,touch = &ft6336_touch; + }; + + aliases { + uart-0 = &uart0; + uart-1 = &uart1; + uart-2 = &uart2; + i2c-0 = &i2c0; + i2c-1 = &i2c1; + watchdog0 = &wdt0; + rtc = &bm8563_rtc; + sdhc0 = &sd0; + }; + + lvgl_pointer { + compatible = "zephyr,lvgl-pointer-input"; + input = <&ft6336_touch>; + }; +}; + +&usb_serial { + status = "okay"; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +&uart1 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart1_default>; + pinctrl-names = "default"; +}; + +&uart2 { + status = "disabled"; + current-speed = <115200>; + pinctrl-0 = <&uart2_default>; + pinctrl-names = "default"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; + + bm8563_rtc: bm8563@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + status = "okay"; + }; + + aw9523b@58 { + compatible = "awinic,aw9523b"; + reg = <0x58>; + status = "okay"; + + aw9523b_gpio: gpio { + compatible = "awinic,aw9523b-gpio"; + gpio-controller; + #gpio-cells = <2>; + port0-push-pull; + int-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + }; + }; + + ft6336_touch: ft5336@38 { + status = "okay"; + compatible = "focaltech,ft5336"; + reg = <0x38>; + int-gpios = <&aw9523b_gpio 10 GPIO_ACTIVE_LOW>; + reset-gpios = <&aw9523b_gpio 0 GPIO_ACTIVE_LOW>; + }; +}; + +&i2c1 { + status = "okay"; + clock-frequency = ; + pinctrl-0 = <&i2c1_default>; + pinctrl-names = "default"; +}; + +&spi2 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim2_default>; + pinctrl-names = "default"; + clock-frequency = <20000000>; + cs-gpios = <&gpio0 3 GPIO_ACTIVE_LOW>, /* LCD */ + <&gpio0 4 GPIO_ACTIVE_LOW>; /* TF-CARD */ + + sd0: sd@1 { + compatible = "zephyr,sdhc-spi-slot"; + reg = <1>; + status = "okay"; + spi-max-frequency = <20000000>; + mmc { + compatible = "zephyr,sdmmc-disk"; + disk-name = "SD"; + status = "okay"; + }; + + }; +}; + +&twai { + status = "disabled"; + pinctrl-0 = <&twai_default>; + pinctrl-names = "default"; +}; + +&wdt0 { + status = "okay"; +}; + +&trng0 { + status = "okay"; +}; + +&esp32_bt_hci { + status = "okay"; +}; diff --git a/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_se.dts b/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_se.dts new file mode 100644 index 000000000000000..93cdeda68cbcbc0 --- /dev/null +++ b/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_se.dts @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2024 TOKITA Hiroshi + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include "m5stack_cores3_procpu_common.dtsi" + +/ { + model = "M5Stack CoreS3 SE PROCPU"; + compatible = "m5stack,cores3-se"; +}; diff --git a/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_se.yaml b/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_se.yaml new file mode 100644 index 000000000000000..0427aa4f1208933 --- /dev/null +++ b/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_se.yaml @@ -0,0 +1,19 @@ +identifier: m5stack_cores3/esp32s3/procpu/se +name: M5Stack CoreS3 SE PROCPU +type: mcu +arch: xtensa +toolchain: + - zephyr +supported: + - gpio + - uart + - i2c + - spi + - can + - counter + - watchdog + - entropy + - pwm + - dma + - pinmux +vendor: m5stack diff --git a/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_se_defconfig b/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_se_defconfig new file mode 100644 index 000000000000000..6539bd42e5947ec --- /dev/null +++ b/boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_se_defconfig @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_MAIN_STACK_SIZE=2048 +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y +CONFIG_GPIO=y diff --git a/boards/m5stack/m5stack_cores3/m5stack_mbus_connectors.dtsi b/boards/m5stack/m5stack_cores3/m5stack_mbus_connectors.dtsi new file mode 100644 index 000000000000000..c91d0b372d0b40f --- /dev/null +++ b/boards/m5stack/m5stack_cores3/m5stack_mbus_connectors.dtsi @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2024 TOKITA Hiroshi + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + m5stack_mbus_header: m5stack_mbus_connector { + compatible = "m5stack,mbus-header"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = /* GND */ <1 0 &gpio 10 0>, /* ADC */ + /* GND */ <3 0 &gpio 8 0>, /* PB_IN */ + /* GND */ /* RESET/EN */ + /* MOSI */ <6 0 &gpio 37 0>, <7 0 &gpio 5 0>, /* GPIO */ + /* MISO */ <8 0 &gpio 35 0>, <9 0 &gpio 9 0>, /* PB_OUT */ + /* SCK */ <10 0 &gpio 36 0>, /* 3.3V */ + /* RXD0 */ <12 0 &gpio 44 0>, <13 0 &gpio 43 0>, /* TXD0 */ + /* PC_RX */ <14 0 &gpio 18 0>, <15 0 &gpio 17 0>, /* PC_TX */ + /* intSDA */ <16 0 &gpio 12 0>, <17 0 &gpio 11 0>, /* intSCL */ + /* PA_SDA */ <18 0 &gpio 2 0>, <19 0 &gpio 1 0>, /* PA_SCL */ + /* GPIO */ <20 0 &gpio 6 0>, <21 0 &gpio 7 0>, /* GPIO */ + /* I2S_DOUT */ <22 0 &gpio 13 0>, <23 0 &gpio 0 0>, /* I2S_LRCK */ + /* NC */ <25 0 &gpio 3 0>; /* I2S_DIN */ + /* NC */ /* 5V */ + /* NC */ /* BAT */ + }; +}; + +m5stack_mbus_i2c0: &i2c0 {}; +m5stack_mbus_i2c1: &i2c1 {}; +m5stack_mbus_uart0: &uart0 {}; +m5stack_mbus_uart1: &uart1 {}; +m5stack_mbus_spi: &spi2 {}; diff --git a/boards/m5stack/m5stack_stamps3/m5stack_stamps3_appcpu.dts b/boards/m5stack/m5stack_stamps3/m5stack_stamps3_appcpu.dts index 3600c76bde9c4d6..f6af6a54e421897 100644 --- a/boards/m5stack/m5stack_stamps3/m5stack_stamps3_appcpu.dts +++ b/boards/m5stack/m5stack_stamps3/m5stack_stamps3_appcpu.dts @@ -13,7 +13,7 @@ compatible = "espressif,esp32s3"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; zephyr,flash = &flash0; diff --git a/boards/m5stack/m5stack_stamps3/m5stack_stamps3_procpu.dts b/boards/m5stack/m5stack_stamps3/m5stack_stamps3_procpu.dts index 2abacdd87ed4148..f2733a571954870 100644 --- a/boards/m5stack/m5stack_stamps3/m5stack_stamps3_procpu.dts +++ b/boards/m5stack/m5stack_stamps3/m5stack_stamps3_procpu.dts @@ -19,7 +19,7 @@ compatible = "m5stack,stamps3"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &usb_serial; zephyr,shell-uart = &usb_serial; zephyr,flash = &flash0; diff --git a/boards/m5stack/m5stack_stamps3/m5stack_stamps3_procpu.yaml b/boards/m5stack/m5stack_stamps3/m5stack_stamps3_procpu.yaml index 746a5d2916e7cc8..762db7cbd7670cd 100644 --- a/boards/m5stack/m5stack_stamps3/m5stack_stamps3_procpu.yaml +++ b/boards/m5stack/m5stack_stamps3/m5stack_stamps3_procpu.yaml @@ -13,8 +13,4 @@ supported: - pwm - pinmux - nvs -testing: - ignore_tags: - - net - - bluetooth vendor: m5stack diff --git a/boards/m5stack/m5stickc_plus/m5stickc_plus_appcpu.dts b/boards/m5stack/m5stickc_plus/m5stickc_plus_appcpu.dts index e514c55744071bb..23e942449c1277b 100644 --- a/boards/m5stack/m5stickc_plus/m5stickc_plus_appcpu.dts +++ b/boards/m5stack/m5stickc_plus/m5stickc_plus_appcpu.dts @@ -13,9 +13,11 @@ compatible = "espressif,esp32"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; diff --git a/boards/m5stack/m5stickc_plus/m5stickc_plus_procpu.dts b/boards/m5stack/m5stickc_plus/m5stickc_plus_procpu.dts index 3575639697311fe..6b1a2dd8ba21615 100644 --- a/boards/m5stack/m5stickc_plus/m5stickc_plus_procpu.dts +++ b/boards/m5stack/m5stickc_plus/m5stickc_plus_procpu.dts @@ -28,7 +28,7 @@ }; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/m5stack/m5stickc_plus/m5stickc_plus_procpu.yaml b/boards/m5stack/m5stickc_plus/m5stickc_plus_procpu.yaml index 69741a72d8f515b..25fc452b8a97310 100644 --- a/boards/m5stack/m5stickc_plus/m5stickc_plus_procpu.yaml +++ b/boards/m5stack/m5stickc_plus/m5stickc_plus_procpu.yaml @@ -14,8 +14,4 @@ supported: - nvs - regulator - display -testing: - ignore_tags: - - net - - bluetooth vendor: m5stack diff --git a/boards/m5stack/stamp_c3/Kconfig.stamp_c3 b/boards/m5stack/stamp_c3/Kconfig.stamp_c3 index dd126de3dfd81f0..096e78bfe0b410a 100644 --- a/boards/m5stack/stamp_c3/Kconfig.stamp_c3 +++ b/boards/m5stack/stamp_c3/Kconfig.stamp_c3 @@ -4,4 +4,4 @@ # SPDX-License-Identifier: Apache-2.0 config BOARD_STAMP_C3 - select SOC_ESP32C3_FX4 + select SOC_ESP32C3_FN4 diff --git a/boards/m5stack/stamp_c3/stamp_c3.dts b/boards/m5stack/stamp_c3/stamp_c3.dts index e4b97e586501642..cbd3a3fdd92ddc2 100644 --- a/boards/m5stack/stamp_c3/stamp_c3.dts +++ b/boards/m5stack/stamp_c3/stamp_c3.dts @@ -16,7 +16,7 @@ compatible = "m5stack,stamp_c3"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/m5stack/stamp_c3/stamp_c3.yaml b/boards/m5stack/stamp_c3/stamp_c3.yaml index d196fd357c604e7..4b272b9e8e73933 100644 --- a/boards/m5stack/stamp_c3/stamp_c3.yaml +++ b/boards/m5stack/stamp_c3/stamp_c3.yaml @@ -10,8 +10,4 @@ supported: - spi - uart - watchdog -testing: - ignore_tags: - - net - - bluetooth vendor: m5stack diff --git a/boards/makerbase/index.rst b/boards/makerbase/index.rst new file mode 100644 index 000000000000000..4e8d4a84c932c6a --- /dev/null +++ b/boards/makerbase/index.rst @@ -0,0 +1,10 @@ +.. _boards-makerbase: + +Makerbase +######### + +.. toctree:: + :maxdepth: 1 + :glob: + + **/* diff --git a/boards/makerbase/mks_canable_v20/Kconfig.mks_canable_v20 b/boards/makerbase/mks_canable_v20/Kconfig.mks_canable_v20 new file mode 100644 index 000000000000000..ef676f4ffcd028b --- /dev/null +++ b/boards/makerbase/mks_canable_v20/Kconfig.mks_canable_v20 @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Alexander Kozhinov +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_MKS_CANABLE_V20 + select SOC_STM32G431XX diff --git a/boards/makerbase/mks_canable_v20/board.cmake b/boards/makerbase/mks_canable_v20/board.cmake new file mode 100644 index 000000000000000..5b98199c697caf6 --- /dev/null +++ b/boards/makerbase/mks_canable_v20/board.cmake @@ -0,0 +1,6 @@ +# Copyright (c) 2024 Alexander Kozhinov +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(openocd "--config=${BOARD_DIR}/support/openocd.cfg") + +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/makerbase/mks_canable_v20/board.yml b/boards/makerbase/mks_canable_v20/board.yml new file mode 100644 index 000000000000000..ac103e7655a0fbe --- /dev/null +++ b/boards/makerbase/mks_canable_v20/board.yml @@ -0,0 +1,6 @@ +board: + name: mks_canable_v20 + full_name: MKS CANable V2.0 + vendor: makerbase + socs: + - name: stm32g431xx diff --git a/boards/makerbase/mks_canable_v20/doc/img/mks_canable_v20.webp b/boards/makerbase/mks_canable_v20/doc/img/mks_canable_v20.webp new file mode 100644 index 000000000000000..7f92a5ed81d7646 Binary files /dev/null and b/boards/makerbase/mks_canable_v20/doc/img/mks_canable_v20.webp differ diff --git a/boards/makerbase/mks_canable_v20/doc/index.rst b/boards/makerbase/mks_canable_v20/doc/index.rst new file mode 100644 index 000000000000000..0a86e6fa6fcc1b7 --- /dev/null +++ b/boards/makerbase/mks_canable_v20/doc/index.rst @@ -0,0 +1,170 @@ +.. zephyr:board:: mks_canable_v20 + +Overview +******** + +The Makerbase MKS CANable V2.0 board features an ARM Cortex-M4 based STM32G431C8 MCU +with a CAN, USB and debugger connections. +Here are some highlights of the MKS CANable V2.0 board: + +- STM32 microcontroller in LQFP48 package +- USB Type-C connector (J1) +- CAN-Bus connector (J2) +- ST-LINK/V3E debugger/programmer header (J4) +- USB VBUS power supply (5 V) +- Three LEDs: red/power_led (D1), blue/stat_led (D2), green/word_led (D3) +- One push-button for RESET +- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell. + +The LED red/power_led (D1) is connected directly to on-board 3.3 V and not controllable by the MCU. + +More information about the board can be found at the `MKS CANable V2.0 website`_. +It is very advisable to take a look in on user manual `MKS CANable V2.0 User Manual`_ and +schematic `MKS CANable V2.0 schematic`_ before start. + +More information about STM32G431KB can be found here: + +- `STM32G431C8 on www.st.com`_ +- `STM32G4 reference manual`_ + +Supported Features +================== + +The Zephyr ``mks_canable_v20`` board target supports the following hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| USB | on-chip | universal-serial-bus | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| FDCAN | on-chip | can | ++-----------+------------+-------------------------------------+ + +Other hardware features are not yet supported on this Zephyr port. + +The default configuration can be found in the defconfig file: +:zephyr_file:`boards/makerbase/mks_canable_v20/mks_canable_v20_defconfig` + + +Connections and IOs +=================== + +Default Zephyr Peripheral Mapping: +---------------------------------- + +.. rst-class:: rst-columns + +- CAN_RX/BOOT0 : PB8 +- CAN_TX : PB9 +- D2 : PA15 +- D3 : PA0 +- USB_DN : PA11 +- USB_DP : PA12 +- SWDIO : PA13 +- SWCLK : PA14 +- NRST : PG10 + +For more details please refer to `MKS CANable V2.0 schematic`_. + +System Clock +------------ + +The MKS CANable V2.0 system clock is driven by internal high speed oscillator. +By default system clock is driven by PLL clock at 160 MHz, +the PLL is driven by the 16 MHz high speed internal oscillator. + +The FDCAN1 peripheral is driven by PLLQ, which has 80 MHz frequency. + +Programming and Debugging +************************* + +MKS CANable V2.0 board includes an SWDIO debug connector header J4. + +.. note:: + + The debugger is not the part of the board! + +Applications for the ``mks_canable_v20`` board target can be built and +flashed in the usual way (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +Flashing +======== + +The board could be flashed using west. + +Flashing an application to MKS CANable V2.0 +------------------------------------------- + +The debugger shall be wired to MKS CANable V2.0 board's J4 connector +according `MKS CANable V2.0 schematic`_. + +Build and flash an application. Here is an example for +:zephyr:code-sample:`hello_world`. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: mks_canable_v20 + :goals: build flash + :west-args: -S rtt-console + :compact: + +The argument ``-S rtt-console`` is needed for debug purposes with SEGGER RTT protocol. +This option is optional and may be omitted. Omitting it frees up RAM space but prevents RTT usage. + +If option ``-S rtt-console`` is selected, the connection to the target can be established as follows: + +.. code-block:: console + + $ telnet localhost 9090 + +You should see the following message on the console: + +.. code-block:: console + + $ Hello World! mks_canable_v20/stm32g431xx + +.. note:: + + Current OpenOCD config will skip Segger RTT for OpenOCD under 0.12.0. + +Debugging +========= + +You can debug an application in the usual way. Here is an example for the +:zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: mks_canable_v20 + :maybe-skip-config: + :goals: debug + +References +********** + +.. target-notes:: + +.. _MKS CANable V2.0 website: + https://github.com/makerbase-mks/CANable-MKS + +.. _MKS CANable V2.0 User Manual: + https://github.com/makerbase-mks/CANable-MKS/blob/main/User%20Manual/CANable%20V2.0/Makerbase%20CANable%20V2.0%20Use%20Manual.pdf + +.. _MKS CANable V2.0 schematic: + https://github.com/makerbase-mks/CANable-MKS/blob/main/Hardware/MKS%20CANable%20V2.0/MKS%20CANable%20V2.0_001%20schematic.pdf + +.. _STM32G431C8 on www.st.com: + https://www.st.com/en/microcontrollers-microprocessors/stm32g431c8.html + +.. _STM32G4 reference manual: + https://www.st.com/resource/en/reference_manual/rm0440-stm32g4-series-advanced-armbased-32bit-mcus-stmicroelectronics.pdf + +.. _STM32CubeProgrammer: + https://www.st.com/en/development-tools/stm32cubeprog.html diff --git a/boards/makerbase/mks_canable_v20/mks_canable_v20.dts b/boards/makerbase/mks_canable_v20/mks_canable_v20.dts new file mode 100644 index 000000000000000..2f2e54565f92620 --- /dev/null +++ b/boards/makerbase/mks_canable_v20/mks_canable_v20.dts @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2024 Alexander Kozhinov + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include + +/ { + model = "Makerbase MKS CANable V2.0"; + compatible = "makerbase,mks-canable-v20"; + + chosen { + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,canbus = &fdcan1; + }; + + aliases { + led0 = &blue_led; + led1 = &green_led; + }; + + leds: leds { + compatible = "gpio-leds"; + blue_led: led_2 { + gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; + label = "blue-status D2"; + }; + green_led: led_3 { + gpios = <&gpioa 0 GPIO_ACTIVE_LOW>; + label = "green-word D3"; + }; + }; +}; + +&clk_hsi { + /* Internal 16 MHz clock used to drive PLL */ + status = "okay"; +}; + +&clk_hsi48 { + /* Internal 48 MHz clock used to drive USB */ + status = "okay"; +}; + +/* Adjust the pll for a SYSTEM Clock of 160 MHz */ +&pll { + div-m = <4>; + mul-n = <80>; + div-p = <2>; + div-q = <4>; + div-r = <2>; + clocks = <&clk_hsi>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = ; + ahb-prescaler = <1>; + apb1-prescaler = <1>; + apb2-prescaler = <1>; +}; + +stm32_lp_tick_source: &lptim1 { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>, + <&rcc STM32_SRC_LSE LPTIM1_SEL(3)>; + status = "okay"; +}; + +zephyr_udc0: &usb { + pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>; + pinctrl-names = "default"; + clocks = <&rcc STM32_CLOCK(APB1, 23U)>, + <&rcc STM32_SRC_HSI48 CLK48_SEL(0)>; + status = "okay"; +}; + +&fdcan1 { + pinctrl-0 = <&fdcan1_rx_pb8 &fdcan1_tx_pb9>; + pinctrl-names = "default"; + clocks = <&rcc STM32_CLOCK(APB1, 25U)>, + <&rcc STM32_SRC_PLL_Q FDCAN_SEL(1)>; + status = "okay"; +}; diff --git a/boards/makerbase/mks_canable_v20/mks_canable_v20.yaml b/boards/makerbase/mks_canable_v20/mks_canable_v20.yaml new file mode 100644 index 000000000000000..3ff3138b106a768 --- /dev/null +++ b/boards/makerbase/mks_canable_v20/mks_canable_v20.yaml @@ -0,0 +1,16 @@ +identifier: mks_canable_v20 +name: MKS CANable V2.0 +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb +ram: 32 +flash: 64 +supported: + - can + - counter + - gpio + - usb_device + - usbd +vendor: makerbase diff --git a/boards/makerbase/mks_canable_v20/mks_canable_v20_defconfig b/boards/makerbase/mks_canable_v20/mks_canable_v20_defconfig new file mode 100644 index 000000000000000..f2613819bf534ed --- /dev/null +++ b/boards/makerbase/mks_canable_v20/mks_canable_v20_defconfig @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Alexander Kozhinov +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_GPIO=y +CONFIG_ARM_MPU=y diff --git a/boards/makerbase/mks_canable_v20/support/openocd.cfg b/boards/makerbase/mks_canable_v20/support/openocd.cfg new file mode 100644 index 000000000000000..b614de4fbf5cc60 --- /dev/null +++ b/boards/makerbase/mks_canable_v20/support/openocd.cfg @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Alexander Kozhinov +# SPDX-License-Identifier: Apache-2.0 + +source [find interface/stlink.cfg] +source [find target/stm32g4x.cfg] diff --git a/boards/makerdiary/nrf52832_mdk/Kconfig.defconfig b/boards/makerdiary/nrf52832_mdk/Kconfig.defconfig index 13d65f68be19358..471e9717248f3fb 100644 --- a/boards/makerdiary/nrf52832_mdk/Kconfig.defconfig +++ b/boards/makerdiary/nrf52832_mdk/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_NRF52832_MDK -config BT_CTLR - default BT - endif # BOARD_NRF52832_MDK diff --git a/boards/makerdiary/nrf52840_mdk/Kconfig.defconfig b/boards/makerdiary/nrf52840_mdk/Kconfig.defconfig index 4ffd9e4ea08d361..52e88201e3c6563 100644 --- a/boards/makerdiary/nrf52840_mdk/Kconfig.defconfig +++ b/boards/makerdiary/nrf52840_mdk/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_NRF52840_MDK -config BT_CTLR - default BT - endif # BOARD_NRF52840_MDK diff --git a/boards/makerdiary/nrf52840_mdk_usb_dongle/Kconfig.defconfig b/boards/makerdiary/nrf52840_mdk_usb_dongle/Kconfig.defconfig index eb2cfed745d41fc..5c7419ff43c5a4a 100644 --- a/boards/makerdiary/nrf52840_mdk_usb_dongle/Kconfig.defconfig +++ b/boards/makerdiary/nrf52840_mdk_usb_dongle/Kconfig.defconfig @@ -23,15 +23,6 @@ config FLASH_LOAD_OFFSET default 0x1000 depends on BOARD_HAS_NRF5_BOOTLOADER && !USE_DT_CODE_PARTITION -if USB_DEVICE_STACK - -# Enable UART driver, needed for CDC ACM -config SERIAL - default y - -endif # USB_DEVICE_STACK - -config BT_CTLR - default BT +source "boards/common/usb/Kconfig.cdc_acm_serial.defconfig" endif # BOARD_NRF52840_MDK_USB_DONGLE diff --git a/boards/makerdiary/nrf52840_mdk_usb_dongle/nrf52840_mdk_usb_dongle.dts b/boards/makerdiary/nrf52840_mdk_usb_dongle/nrf52840_mdk_usb_dongle.dts index 763aebe86e79c81..0c9dd6b44965176 100644 --- a/boards/makerdiary/nrf52840_mdk_usb_dongle/nrf52840_mdk_usb_dongle.dts +++ b/boards/makerdiary/nrf52840_mdk_usb_dongle/nrf52840_mdk_usb_dongle.dts @@ -16,11 +16,6 @@ compatible = "nrf52840_mdk_usb_dongle"; chosen { - zephyr,console = &uart0; - zephyr,shell-uart = &uart0; - zephyr,uart-mcumgr = &uart0; - zephyr,bt-mon-uart = &uart0; - zephyr,bt-c2h-uart = &uart0; zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,code-partition = &slot0_partition; @@ -128,3 +123,5 @@ zephyr_udc0: &usbd { compatible = "nordic,nrf-usbd"; status = "okay"; }; + +#include <../boards/common/usb/cdc_acm_serial.dtsi> diff --git a/boards/mediatek/index.rst b/boards/mediatek/index.rst new file mode 100644 index 000000000000000..4c41e0b4d863752 --- /dev/null +++ b/boards/mediatek/index.rst @@ -0,0 +1,166 @@ +.. _boards-mtk_adsp: + +Mediatek Audio DSPs +################### + +Zephyr can be built and run on the Audio DSPs included in various +members of the Mediatek MT8xxx series of ARM SOCs used in Chromebooks +from various manufacturers. + +Two of these DSPs are in the market already, implemented via the +MT8195 ("Kompanio 1380") and MT8186 ("Kompanio 520") SOCs. +Development has been done on and validation performed on at least +these devices, though more exist: + + ====== ============= =================================== ================= + SOC Product Name Example Device ChromeOS Codename + ====== ============= =================================== ================= + MT8195 Kompanio 1380 HP Chromebook x360 13b dojo + MT8186 Kompanio 520 Lenovo 300e Yoga Chromebook Gen 4 steelix + ====== ============= =================================== ================= + +Hardware +******** + +These devices are Xtensa DSP cores, very similar to the Intel ADSP +series in concept (with the notable difference that these are all +single-core devices, no parallel SMP is available, but at the same +time there are fewer worries about the incoherent cache). + +Their memory space is split between dedicated, fast SRAM and ~16MB of +much slower system DRAM. Zephyr currently loads and links into the +DRAM area, a convention it inherits from SOF (these devices have +comparatively large caches which are used for all accesses, unlike +with intel_adsp). SRAM is used for interrupt vectors and stacks, +currently. + +There is comparatively little on-device hardware. The architecture is +that interaction with the off-chip audio hardware (e.g. I2S codecs, +DMIC inputs, etc...) is managed by the host kernel. The DSP receives +its data via a single array of custom DMA controllers. + +Beyond that the Zephyr-visible hardware is limited to a bounty of +timer devices (of which Zephyr uses two), and a "mailbox" +bidirectional interrupt source it uses to communicate with the host +kernel. + +Programming and Debugging +************************* + +These devices work entirely in RAM, so there is no "flash" process as +such. Their memory state is initialized by the host Linux +environment. This process works under the control of a +``mtk_adsp_load.py`` python script, which has no dependencies outside +the standard library and can be run (as root, of course) on any +reasonably compatible Linux environment with a Python 3.8 or later +interpreter. A chromebook in development mode with the dev packages +installed works great. See the ChromiumOS developer library for more +detail: + +* `Developer mode `__ +* `Dev-Install: Installing Developer and Test packages onto a Chrome OS device `__ + +Once you have the device set up, the process is as simple as copying +the ``zephyr.img`` file from the build directory to the device +(typically via ssh) and running it with the script. For example for +my mt8186 device named "steelix": + +.. code-block:: console + + user@dev_host:~$ west build -b mt8186//adsp samples/hello_world + ... + ... # build output + ... + user@dev_host:~$ scp build/zephyr/zephyr.img root@steelix: + user@dev_host:~$ scp soc/mediatek/mt8xxx/mtk_adsp_load.py root@steelix: + user@dev_host:~$ ssh steelix + + root@steelix:~ # ./mtk_adsp_load.py load zephyr.img + *** Booting Zephyr OS build v3.6.0-5820-gd2a89b3c089e *** + Hello World! mt8186_adsp/mt8186_adsp + +Debugging +========= + +Given the limited I/O facilities, debugging support remains limited on +these platforms. Users with access to hardware-level debug and trace +tools (e.g. from Cadence) will be able to use them as-is. Zephyr +debugging itself is limited to printk/logging techniques at the +moment. In theory a bidirectional console like winstream can be used +with gdb_stub, which has support on Xtensa and via the SDK debuggers, +but this is still unintegrated. + +Toolchains +********** + +The MT8195 toolchain is already part of the Zephyr SDK, so builds for +the ``mt8195//adsp`` board should work out of the box simply following +the generic Zephyr build instructions in the Getting Started guide. + +The MT8186 toolchain is not, and given the proliferation of Xtensa +toolchains in the SDK may not be. The overlay files for the device +are maintained by the SOF project, however, and building a toolchain +yourself using crosstools-ng is not difficult or time-consuming. This +script should work for most users: + +.. code-block:: shell + + #!/bin/sh + + TC=mtk_mt818x_adsp + + # Grab source (these are small) + git clone https://github.com/crosstool-ng/crosstool-ng + git clone https://github.com/thesofproject/xtensa-overlay + + # Build ct-ng itself + cd crosstool-ng + ./bootstrap + ./configure --enable-local + make -j$(nproc) + + mkdir overlays + (cd overlays; ln -s ../../xtensa-overlay/xtensa_mt8186.tar.gz xtensa_${TC}.tar.gz) + + # Construct a .config file + cat >.config < + +/dts-v1/; +/ { + #address-cells = <1>; + #size-cells = <1>; + + sram0: memory@4e100000 { + device_type = "memory"; + compatible = "mmio-sram"; + reg = <0x4e100000 DT_SIZE_K(1024)>; + }; + + dram0: memory@60000000 { + device_type = "memory"; + compatible = "mmio-sram"; + reg = <0x60000000 DT_SIZE_M(16)>; + }; + + dram1: memory@61000000 { + device_type = "memory"; + compatible = "mmio-sram"; + reg = <0x61000000 DT_SIZE_K(1024)>; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + + core_intc: core_intc@0 { + compatible = "cdns,xtensa-core-intc"; + reg = <0 4>; + interrupt-controller; + #interrupt-cells = <3>; + }; + + intc2: intc@10680010 { + compatible = "mediatek,adsp_intc"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x10680010 4>; + status-reg = <0x10680050>; + interrupts = <2 0 0>; + mask = <0x3f>; + interrupt-parent = <&core_intc>; + }; + + ostimer64: ostimer64@10683080 { + compatible = "mediatek,ostimer64"; + reg = <0x10683080 28>; + }; + + ostimer0: ostimer@10683000 { + compatible = "mediatek,ostimer"; + reg = <0x10683000 16>; + interrupt-parent = <&core_intc>; + interrupts = <18 0 0>; + }; + + mbox0: mbox@10686100 { + compatible = "mediatek,mbox"; + reg = <0x10686100 16>; + interrupt-parent = <&intc2>; + interrupts = <1 0 0>; + }; + + mbox1: mbox@10687100 { + compatible = "mediatek,mbox"; + reg = <0x10687100 16>; + interrupt-parent = <&intc2>; + interrupts = <2 0 0>; + }; + }; /* soc */ + + chosen { }; + aliases { }; +}; diff --git a/boards/mediatek/mt8188/Kconfig.mt8188 b/boards/mediatek/mt8188/Kconfig.mt8188 new file mode 100644 index 000000000000000..cc549945b91bd90 --- /dev/null +++ b/boards/mediatek/mt8188/Kconfig.mt8188 @@ -0,0 +1,5 @@ +# Copyright 2024 The ChromiumOS Authors +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_MT8188 + select SOC_MT8188 diff --git a/boards/mediatek/mt8188/board.yml b/boards/mediatek/mt8188/board.yml new file mode 100644 index 000000000000000..f50e9227a82cd01 --- /dev/null +++ b/boards/mediatek/mt8188/board.yml @@ -0,0 +1,5 @@ +boards: + - name: mt8188 + vendor: mediatek + socs: + - name: mt8188 diff --git a/boards/mediatek/mt8188/mt8188_adsp.dts b/boards/mediatek/mt8188/mt8188_adsp.dts new file mode 100644 index 000000000000000..1796bb7f447852c --- /dev/null +++ b/boards/mediatek/mt8188/mt8188_adsp.dts @@ -0,0 +1,81 @@ +/* Copyright 2024 The ChromiumOS Authors + * SPDX-License-Identifier: Apache-2.0 + */ +#include + +/dts-v1/; +/ { + + #address-cells = <1>; + #size-cells = <1>; + + sram0: memory@4e100000 { + device_type = "memory"; + compatible = "mmio-sram"; + reg = <0x4e100000 DT_SIZE_K(512)>; + }; + + dram0: memory@60000000 { + device_type = "memory"; + compatible = "mmio-sram"; + reg = <0x60000000 DT_SIZE_M(15)>; + }; + + dram1: memory@61000000 { + device_type = "memory"; + compatible = "mmio-sram"; + reg = <0x61000000 DT_SIZE_K(1024)>; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + + core_intc: core_intc@0 { + compatible = "cdns,xtensa-core-intc"; + reg = <0 4>; + interrupt-controller; + #interrupt-cells = <3>; + }; + + intc2: intc@10b80010 { + compatible = "mediatek,adsp_intc"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x10b80010 4>; + status-reg = <0x10b80050>; + interrupts = <2 0 0>; + mask = <0x3f>; + interrupt-parent = <&core_intc>; + }; + + ostimer64: ostimer64@10b83080 { + compatible = "mediatek,ostimer64"; + reg = <0x10b83080 28>; + }; + + ostimer0: ostimer@10b83000 { + compatible = "mediatek,ostimer"; + reg = <0x10b83000 16>; + interrupt-parent = <&core_intc>; + interrupts = <18 0 0>; + }; + + mbox0: mbox@10b86100 { + compatible = "mediatek,mbox"; + reg = <0x10b86100 16>; + interrupt-parent = <&intc2>; + interrupts = <1 0 0>; + }; + + mbox1: mbox@10b87100 { + compatible = "mediatek,mbox"; + reg = <0x10b87100 16>; + interrupt-parent = <&intc2>; + interrupts = <2 0 0>; + }; + }; /* soc */ + + chosen { }; + aliases { }; +}; diff --git a/boards/mediatek/mt8195/Kconfig.mt8195 b/boards/mediatek/mt8195/Kconfig.mt8195 new file mode 100644 index 000000000000000..0fb211185c9d27f --- /dev/null +++ b/boards/mediatek/mt8195/Kconfig.mt8195 @@ -0,0 +1,7 @@ +# Copyright 2023 The ChromiumOS Authors +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_MT8195 + select SOC_MT8195 + help + Board with Mediatek MT8195 Audio DSP diff --git a/boards/mediatek/mt8195/board.yml b/boards/mediatek/mt8195/board.yml new file mode 100644 index 000000000000000..7a9bb707c1d50bd --- /dev/null +++ b/boards/mediatek/mt8195/board.yml @@ -0,0 +1,6 @@ +boards: + - name: mt8195 + full_name: MT8195 ADSP + vendor: mediatek + socs: + - name: mt8195 diff --git a/boards/mediatek/mt8195/mt8195_adsp.dts b/boards/mediatek/mt8195/mt8195_adsp.dts new file mode 100644 index 000000000000000..a21d81693fa3996 --- /dev/null +++ b/boards/mediatek/mt8195/mt8195_adsp.dts @@ -0,0 +1,94 @@ +/* Copyright 2023 The ChromiumOS Authors + * SPDX-License-Identifier: Apache-2.0 + */ +#include + +/dts-v1/; +/ { + + #address-cells = <1>; + #size-cells = <1>; + + sram0: memory@40000000 { + device_type = "memory"; + compatible = "mmio-sram"; + reg = <0x40000000 DT_SIZE_K(256)>; + }; + + dram0: memory@60000000 { + device_type = "memory"; + compatible = "mmio-sram"; + reg = <0x60000000 DT_SIZE_M(17)>; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + + cpuclk: cpuclk@10000000 { + compatible = "mediatek,mt8195_cpuclk"; + reg = <0x10000000 380>; + cg_reg = <0x10720180>; + pll_ctrl_reg = <0x1000c7e0>; + freqs_mhz = <26 370 540 720>; + }; + + core_intc: core_intc@0 { + compatible = "cdns,xtensa-core-intc"; + reg = <0 4>; + interrupt-controller; + #interrupt-cells = <3>; + }; + + intc1: intc@10680130 { + compatible = "mediatek,adsp_intc"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x10680130 4>; + status-reg = <0x10680150>; + interrupts = <1 0 0>; + mask = <0x3ffffff0>; + interrupt-parent = <&core_intc>; + }; + + intc23: intc@108030f4 { + compatible = "mediatek,adsp_intc"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x108030f4 4>; + status-reg = <0x108030fc>; + interrupts = <23 0 0>; + mask = <0xffff>; + interrupt-parent = <&core_intc>; + }; + + ostimer64: ostimer64@1080d080 { + compatible = "mediatek,ostimer64"; + reg = <0x1080d080 28>; + }; + + ostimer0: ostimer@1080d000 { + compatible = "mediatek,ostimer"; + reg = <0x1080d000 16>; + interrupt-parent = <&intc23>; + interrupts = <11 0 0>; + }; + + mbox0: mbox@10816000 { + compatible = "mediatek,mbox"; + reg = <0x10816000 56>; + interrupt-parent = <&intc23>; + interrupts = <0 0 0>; + }; + + mbox1: mbox@10817000 { + compatible = "mediatek,mbox"; + reg = <0x10817000 56>; + interrupt-parent = <&intc23>; + interrupts = <1 0 0>; + }; + }; /* soc */ + + chosen { }; + aliases { }; +}; diff --git a/boards/mediatek/mt8195_adsp/Kconfig.defconfig b/boards/mediatek/mt8195_adsp/Kconfig.defconfig deleted file mode 100644 index 31f557670b15fc9..000000000000000 --- a/boards/mediatek/mt8195_adsp/Kconfig.defconfig +++ /dev/null @@ -1,9 +0,0 @@ -# Copyright 2023 The ChromiumOS Authors -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_MT8195_ADSP - -config BOARD - default "mt8195_adsp" - -endif # BOARD_MT8195_ADSP diff --git a/boards/mediatek/mt8195_adsp/Kconfig.mt8195_adsp b/boards/mediatek/mt8195_adsp/Kconfig.mt8195_adsp deleted file mode 100644 index 43a3a49f9e1c96c..000000000000000 --- a/boards/mediatek/mt8195_adsp/Kconfig.mt8195_adsp +++ /dev/null @@ -1,7 +0,0 @@ -# Copyright 2023 The ChromiumOS Authors -# SPDX-License-Identifier: Apache-2.0 - -config BOARD_MT8195_ADSP - select SOC_MT8195_ADSP - help - Board with Mediatek MT8195 Audio DSP diff --git a/boards/mediatek/mt8195_adsp/board.yml b/boards/mediatek/mt8195_adsp/board.yml deleted file mode 100644 index a58b33ecf8d9555..000000000000000 --- a/boards/mediatek/mt8195_adsp/board.yml +++ /dev/null @@ -1,6 +0,0 @@ -boards: - - name: mt8195_adsp - full_name: MT8195 ADSP - vendor: mediatek - socs: - - name: mt8195_adsp diff --git a/boards/mediatek/mt8195_adsp/mt8195_adsp.dts b/boards/mediatek/mt8195_adsp/mt8195_adsp.dts deleted file mode 100644 index c26e2dd0f401731..000000000000000 --- a/boards/mediatek/mt8195_adsp/mt8195_adsp.dts +++ /dev/null @@ -1,95 +0,0 @@ -/* Copyright 2023 The ChromiumOS Authors - * SPDX-License-Identifier: Apache-2.0 - */ -#include - -/dts-v1/; -/ { - -#address-cells = <1>; -#size-cells = <1>; - -sram0: memory@40000000 { - device_type = "memory"; - compatible = "mmio-sram"; - reg = <0x40000000 DT_SIZE_K(256)>; -}; - -dram0: memory@60000000 { - device_type = "memory"; - compatible = "mmio-sram"; - reg = <0x60000000 DT_SIZE_M(17)>; -}; - -soc { - #address-cells = <1>; - #size-cells = <1>; - - cpuclk: cpuclk@10000000 { - compatible = "mediatek,mt8195_cpuclk"; - reg = <0x10000000 380>; - cg_reg = <0x10720180>; - pll_ctrl_reg = <0x1000c7e0>; - freqs_mhz = <26 370 540 720>; - }; - - core_intc: core_intc@0 { - compatible = "cdns,xtensa-core-intc"; - reg = <0 4>; - interrupt-controller; - #interrupt-cells = <3>; - }; - - intc1: intc@10680130 { - compatible = "mediatek,adsp_intc"; - interrupt-controller; - #interrupt-cells = <3>; - reg = <0x10680130 4>; - status-reg = <0x10680150>; - interrupts = <1 0 0>; - mask = <0x3ffffff0>; - interrupt-parent = <&core_intc>; - }; - - intc23: intc@108030f4 { - compatible = "mediatek,adsp_intc"; - interrupt-controller; - #interrupt-cells = <3>; - reg = <0x108030f4 4>; - status-reg = <0x108030fc>; - interrupts = <23 0 0>; - mask = <0xffff>; - interrupt-parent = <&core_intc>; - }; - - ostimer64: ostimer64@1080d080 { - compatible = "mediatek,ostimer64"; - reg = <0x1080d080 28>; - }; - - ostimer0: ostimer@1080d000 { - compatible = "mediatek,ostimer"; - reg = <0x1080d000 16>; - interrupt-parent = <&intc23>; - interrupts = <11 0 0>; - }; - - mbox0: mbox@10816000 { - compatible = "mediatek,mbox"; - reg = <0x10816000 56>; - interrupt-parent = <&intc23>; - interrupts = <0 0 0>; - }; - - mbox1: mbox@10817000 { - compatible = "mediatek,mbox"; - reg = <0x10817000 56>; - interrupt-parent = <&intc23>; - interrupts = <1 0 0>; - }; -}; /* soc */ - -chosen { }; -aliases { }; - -}; diff --git a/boards/mediatek/mt8195_adsp/mt8195_adsp_defconfig b/boards/mediatek/mt8195_adsp/mt8195_adsp_defconfig deleted file mode 100644 index 1110a4cfeb1ccc7..000000000000000 --- a/boards/mediatek/mt8195_adsp/mt8195_adsp_defconfig +++ /dev/null @@ -1,4 +0,0 @@ -# Copyright 2023 The ChromiumOS Authors -# SPDX-License-Identifier: Apache-2.0 - -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=13000000 diff --git a/boards/mediatek/mt8196/Kconfig.mt8196 b/boards/mediatek/mt8196/Kconfig.mt8196 new file mode 100644 index 000000000000000..7167a09275533d4 --- /dev/null +++ b/boards/mediatek/mt8196/Kconfig.mt8196 @@ -0,0 +1,5 @@ +# Copyright 2024 The ChromiumOS Authors +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_MT8196 + select SOC_MT8196 diff --git a/boards/mediatek/mt8196/board.yml b/boards/mediatek/mt8196/board.yml new file mode 100644 index 000000000000000..cf5a2e276992e5e --- /dev/null +++ b/boards/mediatek/mt8196/board.yml @@ -0,0 +1,5 @@ +boards: + - name: mt8196 + vendor: mediatek + socs: + - name: mt8196 diff --git a/boards/mediatek/mt8196/mt8196_adsp.dts b/boards/mediatek/mt8196/mt8196_adsp.dts new file mode 100644 index 000000000000000..ea3bfdf4f98a216 --- /dev/null +++ b/boards/mediatek/mt8196/mt8196_adsp.dts @@ -0,0 +1,109 @@ +/* Copyright 2024 The ChromiumOS Authors + * SPDX-License-Identifier: Apache-2.0 + */ +#include + +/dts-v1/; +/ { + + #address-cells = <1>; + #size-cells = <1>; + + sram0: memory@4e100000 { + device_type = "memory"; + compatible = "mmio-sram"; + reg = <0x4e100000 DT_SIZE_K(512)>; + }; + + dram0: memory@90000000 { + device_type = "memory"; + compatible = "mmio-sram"; + reg = <0x90000000 DT_SIZE_M(6)>; + }; + + dram1: memory@90700000 { + device_type = "memory"; + compatible = "mmio-sram"; + reg = <0x90700000 DT_SIZE_M(1)>; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + + core_intc: core_intc@0 { + compatible = "cdns,xtensa-core-intc"; + reg = <0 4>; + interrupt-controller; + #interrupt-cells = <3>; + }; + + /* The 8196 interrupt controller is actually more complicated + * than the driver here supports. There are 64 total + * interrupt inputs, each of which is a associated with one of + * 16 "groups", each of which is wired to a separate Xtensa + * architectural interrupt. (Whether the mapping of external + * interrupts to groups is mutable is an open question, the + * values here appear to be hardware defaults). We represent + * each group (strictly each of the high and low 32 interrupts + * of each group) as a separate adsp_intc controller, pointing + * at the same status and enable registers, but with disjoint + * masks. Note that this disallows configurations where a + * single controller needs to manage interrupts in both the + * high and low 32 bits of the set, but no current drivers + * rely on such a configuration. + */ + + intc_g1: intc_g1@1a014010 { + compatible = "mediatek,adsp_intc"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x1a014010 4>; + status-reg = <0x1a014008>; + mask = <0x00007f3f>; + interrupts = <1 0 0>; + interrupt-parent = <&core_intc>; + }; + + intc_g2: intc_g2@1a014010 { + compatible = "mediatek,adsp_intc"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x1a014010 4>; + status-reg = <0x1a014008>; + mask = <0x000000c0>; + interrupts = <2 0 0>; + interrupt-parent = <&core_intc>; + }; + + ostimer64: ostimer64@1a00b080 { + compatible = "mediatek,ostimer64"; + reg = <0x1a00b080 28>; + }; + + ostimer0: ostimer@1a00b000 { + compatible = "mediatek,ostimer"; + reg = <0x1a00b000 16>; + interrupt-parent = <&intc_g1>; + interrupts = <8 0 0>; + }; + + mbox0: mbox@1a360100 { + compatible = "mediatek,mbox"; + reg = <0x1a360100 16>; + interrupt-parent = <&intc_g2>; + interrupts = <6 0 0>; + }; + + mbox1: mbox@1a370100 { + compatible = "mediatek,mbox"; + reg = <0x1a370100 16>; + interrupt-parent = <&intc_g2>; + interrupts = <7 0 0>; + }; + }; /* soc */ + + chosen { }; + aliases { }; + +}; diff --git a/boards/mediatek/twister.yaml b/boards/mediatek/twister.yaml new file mode 100644 index 000000000000000..e941f640048183e --- /dev/null +++ b/boards/mediatek/twister.yaml @@ -0,0 +1,18 @@ +arch: xtensa +type: mcu +toolchain: + - xt-clang +testing: + ignore_tags: + - net + - bluetooth + - mcumgr +variants: + mt8195/mt8195/adsp: + name: MediaTek MT8195 Audio DSP + mt8188/mt8188/adsp: + name: MediaTek MT8188 Audio DSP + mt8186/mt8186/adsp: + name: MediaTek MT8186 Audio DSP + mt8196/mt8196/adsp: + name: MediaTek MT8196 Audio DSP diff --git a/boards/microchip/mec1501modular_assy6885/mec1501modular_assy6885_defconfig b/boards/microchip/mec1501modular_assy6885/mec1501modular_assy6885_defconfig index 1f9a9f937c5814c..3039d18174eb9a5 100644 --- a/boards/microchip/mec1501modular_assy6885/mec1501modular_assy6885_defconfig +++ b/boards/microchip/mec1501modular_assy6885/mec1501modular_assy6885_defconfig @@ -10,11 +10,9 @@ CONFIG_SOC_MEC1501_VCI_PINS_AS_GPIOS=n CONFIG_RTOS_TIMER=y CONFIG_CLOCK_CONTROL=y -CONFIG_PINCTRL=y CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y CONFIG_SERIAL=y CONFIG_GPIO=y -CONFIG_PINCTRL=y CONFIG_PM=y diff --git a/boards/microchip/mec15xxevb_assy6853/mec15xxevb_assy6853_defconfig b/boards/microchip/mec15xxevb_assy6853/mec15xxevb_assy6853_defconfig index ca03d9409cf15fb..51e8498df60ed77 100644 --- a/boards/microchip/mec15xxevb_assy6853/mec15xxevb_assy6853_defconfig +++ b/boards/microchip/mec15xxevb_assy6853/mec15xxevb_assy6853_defconfig @@ -9,11 +9,9 @@ CONFIG_RTOS_TIMER=y CONFIG_CLOCK_CONTROL=y CONFIG_CONSOLE=y -CONFIG_PINCTRL=y CONFIG_UART_CONSOLE=y CONFIG_SERIAL=y CONFIG_GPIO=y -CONFIG_PINCTRL=y # power management stuff CONFIG_PM=y diff --git a/boards/microchip/mec172xevb_assy6906/mec172xevb_assy6906_defconfig b/boards/microchip/mec172xevb_assy6906/mec172xevb_assy6906_defconfig index a925bc7538db312..d1aeaeaac581f45 100644 --- a/boards/microchip/mec172xevb_assy6906/mec172xevb_assy6906_defconfig +++ b/boards/microchip/mec172xevb_assy6906/mec172xevb_assy6906_defconfig @@ -8,7 +8,6 @@ CONFIG_RTOS_TIMER=y CONFIG_CLOCK_CONTROL=y CONFIG_GPIO=y -CONFIG_PINCTRL=y CONFIG_SERIAL=y CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y diff --git a/boards/microchip/mec172xmodular_assy6930/mec172xmodular_assy6930_defconfig b/boards/microchip/mec172xmodular_assy6930/mec172xmodular_assy6930_defconfig index 0df404e408f87d7..c191b0b1555ed84 100644 --- a/boards/microchip/mec172xmodular_assy6930/mec172xmodular_assy6930_defconfig +++ b/boards/microchip/mec172xmodular_assy6930/mec172xmodular_assy6930_defconfig @@ -8,7 +8,6 @@ CONFIG_RTOS_TIMER=y CONFIG_CLOCK_CONTROL=y CONFIG_GPIO=y -CONFIG_PINCTRL=y CONFIG_SERIAL=y CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y diff --git a/boards/mikroe/clicker_2/mikroe_clicker_2.dts b/boards/mikroe/clicker_2/mikroe_clicker_2.dts index 74ec6b395bb4a29..aba4652f126d9f0 100644 --- a/boards/mikroe/clicker_2/mikroe_clicker_2.dts +++ b/boards/mikroe/clicker_2/mikroe_clicker_2.dts @@ -146,7 +146,7 @@ zephyr_udc0: &usbotg_fs { status ="okay"; pinctrl-0 = <&adc1_in2_pa2 &adc1_in3_pa3>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <2>; }; diff --git a/boards/mikroe/clicker_ra4m1/mikroe_clicker_ra4m1.dts b/boards/mikroe/clicker_ra4m1/mikroe_clicker_ra4m1.dts index cd71c38f14c0213..5a626a783648d12 100644 --- a/boards/mikroe/clicker_ra4m1/mikroe_clicker_ra4m1.dts +++ b/boards/mikroe/clicker_ra4m1/mikroe_clicker_ra4m1.dts @@ -42,6 +42,29 @@ }; }; + mikrobus_header: mikrobus-connector { + compatible = "mikro-bus"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &ioport0 0 0>, /* AN */ + <1 0 &ioport4 7 0>, /* RST */ + <2 0 &ioport1 3 0>, /* CS */ + <3 0 &ioport1 2 0>, /* SCK */ + <4 0 &ioport1 0 0>, /* MISO */ + <5 0 &ioport1 1 0>, /* MOSI */ + /* +3.3V */ + /* GND */ + <6 0 &ioport1 7 0>, /* PWM */ + <7 0 &ioport3 2 0>, /* INT */ + <8 0 &ioport4 10 0>, /* RX */ + <9 0 &ioport4 11 0>, /* TX */ + <10 0 &ioport2 5 0>, /* SCL */ + <11 0 &ioport2 6 0>; /* SDA */ + /* +5V */ + /* GND */ + }; + aliases { led0 = &ld1; led1 = &ld2; @@ -72,6 +95,18 @@ }; }; +&ioport0 { + status = "okay"; +}; + +&ioport1 { + status = "okay"; +}; + +&ioport2 { + status = "okay"; +}; + &ioport3 { status = "okay"; }; diff --git a/boards/mikroe/stm32_m4_clicker/Kconfig.defconfig b/boards/mikroe/stm32_m4_clicker/Kconfig.defconfig index 082d099f4b8e50b..6caedb91cfcdc78 100644 --- a/boards/mikroe/stm32_m4_clicker/Kconfig.defconfig +++ b/boards/mikroe/stm32_m4_clicker/Kconfig.defconfig @@ -3,22 +3,6 @@ if BOARD_MIKROE_STM32_M4_CLICKER -if USB_DEVICE_STACK - -config UART_CONSOLE - default CONSOLE - -config USB_DEVICE_INITIALIZE_AT_BOOT - default y - -endif # USB_DEVICE_STACK - -if LOG - -# Logger cannot use itself to log -config USB_CDC_ACM_LOG_LEVEL - default 0 - -endif # LOG +source "boards/common/usb/Kconfig.cdc_acm_serial.defconfig" endif # BOARD_MIKROE_STM32_M4_CLICKER diff --git a/boards/mikroe/stm32_m4_clicker/mikroe_stm32_m4_clicker.dts b/boards/mikroe/stm32_m4_clicker/mikroe_stm32_m4_clicker.dts index 648f0da08f1efdc..b6225a2579fddb8 100644 --- a/boards/mikroe/stm32_m4_clicker/mikroe_stm32_m4_clicker.dts +++ b/boards/mikroe/stm32_m4_clicker/mikroe_stm32_m4_clicker.dts @@ -14,8 +14,6 @@ compatible = "st,stm32f415rg"; chosen { - zephyr,console = &usb_cdc_acm_uart; - zephyr,shell-uart = &usb_cdc_acm_uart; zephyr,sram = &sram0; zephyr,flash = &flash0; }; @@ -126,12 +124,10 @@ zephyr_udc0: &usbotg_fs { pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>; pinctrl-names = "default"; status = "okay"; - - usb_cdc_acm_uart: cdc_acm_uart { - compatible = "zephyr,cdc-acm-uart"; - }; }; +#include <../boards/common/usb/cdc_acm_serial.dtsi> + mikrobus_spi: &spi2 {}; mikrobus_serial: &usart3 {}; mikrobus_i2c: &i2c2 {}; diff --git a/boards/mikroe/stm32_m4_clicker/mikroe_stm32_m4_clicker_defconfig b/boards/mikroe/stm32_m4_clicker/mikroe_stm32_m4_clicker_defconfig index f964f048f7711e2..549aff1e682df67 100644 --- a/boards/mikroe/stm32_m4_clicker/mikroe_stm32_m4_clicker_defconfig +++ b/boards/mikroe/stm32_m4_clicker/mikroe_stm32_m4_clicker_defconfig @@ -16,6 +16,3 @@ CONFIG_GPIO=y # Enable Clocks CONFIG_CLOCK_CONTROL=y - -# Enable USB -CONFIG_USB_DEVICE_STACK=y diff --git a/boards/native/native_sim/Kconfig.defconfig b/boards/native/native_sim/Kconfig.defconfig index 0cb80bbcf452465..c74a9fe041e34d2 100644 --- a/boards/native/native_sim/Kconfig.defconfig +++ b/boards/native/native_sim/Kconfig.defconfig @@ -32,5 +32,4 @@ config UART_CONSOLE endif # CONSOLE - endif # BOARD_NATIVE_SIM diff --git a/boards/native/nrf_bsim/Kconfig.defconfig b/boards/native/nrf_bsim/Kconfig.defconfig index 629372e5e1db9de..393db8060ded6ff 100644 --- a/boards/native/nrf_bsim/Kconfig.defconfig +++ b/boards/native/nrf_bsim/Kconfig.defconfig @@ -38,10 +38,6 @@ config SYS_CLOCK_TICKS_PER_SEC default 10000 if NRF_GRTC_TIMER default 32768 -config BT_CTLR - default y if BOARD_NRF52_BSIM || BOARD_NRF5340BSIM_NRF5340_CPUNET || BOARD_NRF54L15BSIM_NRF54L15_CPUAPP - depends on BT - config HEAP_MEM_POOL_ADD_SIZE_BOARD int default 4096 if BT_HCI_IPC diff --git a/boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.dts b/boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.dts index cc1de29bd8a7e89..8e53dfe09dc64d8 100644 --- a/boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.dts +++ b/boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.dts @@ -83,6 +83,10 @@ }; }; +&uart00 { + /delete-property/ clocks; +}; + &uart20 { status = "okay"; current-speed = <115200>; diff --git a/boards/native/nrf_bsim/soc/soc_secure.h b/boards/native/nrf_bsim/soc/soc_secure.h index a39c02435a8d906..06e9cc64993c42b 100644 --- a/boards/native/nrf_bsim/soc/soc_secure.h +++ b/boards/native/nrf_bsim/soc/soc_secure.h @@ -21,4 +21,10 @@ static inline void soc_secure_read_deviceid(uint32_t deviceid[2]) deviceid[1] = nrf_ficr_deviceid_get(NRF_FICR, 1); } +static inline int soc_secure_mem_read(void *dst, void *src, size_t len) +{ + (void)memcpy(dst, src, len); + return 0; +} + #endif /* BOARDS_POSIX_NRF52_BSIM_SOC_SECURE_H */ diff --git a/boards/nordic/nrf21540dk/Kconfig.defconfig b/boards/nordic/nrf21540dk/Kconfig.defconfig index 28a3f3e2c98d9d1..31642d144099814 100644 --- a/boards/nordic/nrf21540dk/Kconfig.defconfig +++ b/boards/nordic/nrf21540dk/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_NRF21540DK -config BT_CTLR - default BT - endif # BOARD_NRF21540DK diff --git a/boards/nordic/nrf51dk/Kconfig.defconfig b/boards/nordic/nrf51dk/Kconfig.defconfig index ae8e85130f3eb59..1f0b7bf0c492a1b 100644 --- a/boards/nordic/nrf51dk/Kconfig.defconfig +++ b/boards/nordic/nrf51dk/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_NRF51DK_NRF51822 -config BT_CTLR - default BT - endif # BOARD_NRF51DK_NRF51822 diff --git a/boards/nordic/nrf51dongle/Kconfig.defconfig b/boards/nordic/nrf51dongle/Kconfig.defconfig index fed53a7a316f7cd..e6c8d45f8106d3c 100644 --- a/boards/nordic/nrf51dongle/Kconfig.defconfig +++ b/boards/nordic/nrf51dongle/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_NRF51DONGLE -config BT_CTLR - default BT - endif # BOARD_NRF51DONGLE diff --git a/boards/nordic/nrf52833dk/Kconfig.defconfig b/boards/nordic/nrf52833dk/Kconfig.defconfig index 30c49fa7fb7cda4..dc6fbbdcf3d9a5b 100644 --- a/boards/nordic/nrf52833dk/Kconfig.defconfig +++ b/boards/nordic/nrf52833dk/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_NRF52833DK -config BT_CTLR - default BT - endif # BOARD_NRF52833DK diff --git a/boards/nordic/nrf52840dk/Kconfig.defconfig b/boards/nordic/nrf52840dk/Kconfig.defconfig index 7e932d27f7afa47..478445b229bc759 100644 --- a/boards/nordic/nrf52840dk/Kconfig.defconfig +++ b/boards/nordic/nrf52840dk/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_NRF52840DK -config BT_CTLR - default BT - endif # BOARD_NRF52840DK diff --git a/boards/nordic/nrf52840dongle/Kconfig b/boards/nordic/nrf52840dongle/Kconfig index b1cb32d2251ef04..c8698ad07011f12 100644 --- a/boards/nordic/nrf52840dongle/Kconfig +++ b/boards/nordic/nrf52840dongle/Kconfig @@ -12,8 +12,4 @@ config BOARD_HAS_NRF5_BOOTLOADER If selected, applications are linked so that they can be loaded by Nordic nRF5 bootloader. -config BOARD_SERIAL_BACKEND_CDC_ACM - bool "USB CDC" - default y - endif # BOARD_NRF52840DONGLE diff --git a/boards/nordic/nrf52840dongle/Kconfig.defconfig b/boards/nordic/nrf52840dongle/Kconfig.defconfig index 1288e33bcdb5d98..5bdbb6ce63bd5ae 100644 --- a/boards/nordic/nrf52840dongle/Kconfig.defconfig +++ b/boards/nordic/nrf52840dongle/Kconfig.defconfig @@ -22,62 +22,6 @@ config FLASH_LOAD_OFFSET default 0x1000 depends on BOARD_HAS_NRF5_BOOTLOADER && (MCUBOOT || !USE_DT_CODE_PARTITION) -if BOARD_SERIAL_BACKEND_CDC_ACM - -config USB_DEVICE_STACK - default y - -config USB_CDC_ACM - default SERIAL - -config CONSOLE - default y - -config UART_CONSOLE - default CONSOLE - -config USB_DEVICE_INITIALIZE_AT_BOOT - default y if !MCUBOOT && CONSOLE - -config SHELL_BACKEND_SERIAL_CHECK_DTR - default SHELL - depends on UART_LINE_CTRL - -config UART_LINE_CTRL - default SHELL - -config USB_DEVICE_REMOTE_WAKEUP - default n - -if LOG - -# Logger cannot use itself to log -choice USB_CDC_ACM_LOG_LEVEL_CHOICE - default USB_CDC_ACM_LOG_LEVEL_OFF -endchoice - -# Set USB log level to error only -choice USB_DEVICE_LOG_LEVEL_CHOICE - default USB_DEVICE_LOG_LEVEL_ERR -endchoice - -# Wait 4000ms at startup for logging -config LOG_PROCESS_THREAD_STARTUP_DELAY_MS - default 4000 - -endif # LOG - -if USB_DEVICE_STACK - -# Enable UART driver, needed for CDC ACM -config SERIAL - default y - -endif # USB_DEVICE_STACK - -endif # BOARD_SERIAL_BACKEND_CDC_ACM - -config BT_CTLR - default BT +source "boards/common/usb/Kconfig.cdc_acm_serial.defconfig" endif # BOARD_NRF52840DONGLE diff --git a/boards/nordic/nrf52840dongle/nrf52840dongle_nrf52840.dts b/boards/nordic/nrf52840dongle/nrf52840dongle_nrf52840.dts index 655ef346a6522f0..1f1de703adee9d7 100644 --- a/boards/nordic/nrf52840dongle/nrf52840dongle_nrf52840.dts +++ b/boards/nordic/nrf52840dongle/nrf52840dongle_nrf52840.dts @@ -15,11 +15,6 @@ compatible = "nordic,nrf52840-dongle-nrf52840"; chosen { - zephyr,console = &cdc_acm_uart; - zephyr,shell-uart = &cdc_acm_uart; - zephyr,uart-mcumgr = &cdc_acm_uart; - zephyr,bt-mon-uart = &cdc_acm_uart; - zephyr,bt-c2h-uart = &cdc_acm_uart; zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,code-partition = &slot0_partition; @@ -188,8 +183,6 @@ zephyr_udc0: &usbd { compatible = "nordic,nrf-usbd"; status = "okay"; - - cdc_acm_uart: cdc_acm_uart { - compatible = "zephyr,cdc-acm-uart"; - }; }; + +#include <../boards/common/usb/cdc_acm_serial.dtsi> diff --git a/boards/nordic/nrf52dk/Kconfig b/boards/nordic/nrf52dk/Kconfig index 7b41e21fc49a57d..45c182b7b9151c3 100644 --- a/boards/nordic/nrf52dk/Kconfig +++ b/boards/nordic/nrf52dk/Kconfig @@ -5,9 +5,4 @@ if BOARD_NRF52DK -# BT_CTLR depends on BT. When BT is enabled we should default to also -# enabling the controller. -config BT_CTLR - default y if BT - endif # BOARD_NRF52DK diff --git a/boards/nordic/nrf5340_audio_dk/Kconfig.defconfig b/boards/nordic/nrf5340_audio_dk/Kconfig.defconfig index f8315be4e2558ba..7084af10d6bf082 100644 --- a/boards/nordic/nrf5340_audio_dk/Kconfig.defconfig +++ b/boards/nordic/nrf5340_audio_dk/Kconfig.defconfig @@ -64,7 +64,4 @@ endif # BOARD_NRF5340_AUDIO_DK_NRF5340_CPUAPP || BOARD_NRF5340_AUDIO_DK_NRF5340_ if BOARD_NRF5340_AUDIO_DK_NRF5340_CPUNET -config BT_CTLR - default y if BT - endif # BOARD_NRF5340_AUDIO_DK_NRF5340_CPUNET diff --git a/boards/nordic/nrf5340dk/Kconfig.defconfig b/boards/nordic/nrf5340dk/Kconfig.defconfig index 1c10b3e7dca3004..b6186d4e07452e5 100644 --- a/boards/nordic/nrf5340dk/Kconfig.defconfig +++ b/boards/nordic/nrf5340dk/Kconfig.defconfig @@ -64,7 +64,4 @@ endif # BOARD_NRF5340DK_NRF5340_CPUAPP || BOARD_NRF5340DK_NRF5340_CPUAPP_NS if BOARD_NRF5340DK_NRF5340_CPUNET -config BT_CTLR - default y if BT - endif # BOARD_NRF5340DK_NRF5340_CPUNET diff --git a/boards/nordic/nrf5340dk/nrf5340dk_nrf5340_cpuapp.yaml b/boards/nordic/nrf5340dk/nrf5340dk_nrf5340_cpuapp.yaml index 50ed47338714372..3daf13dbd4fe34b 100644 --- a/boards/nordic/nrf5340dk/nrf5340dk_nrf5340_cpuapp.yaml +++ b/boards/nordic/nrf5340dk/nrf5340dk_nrf5340_cpuapp.yaml @@ -9,6 +9,10 @@ toolchain: ram: 448 flash: 1024 supported: + - arduino_gpio + - arduino_i2c + - arduino_serial + - arduino_spi - gpio - i2c - i2s diff --git a/boards/nordic/nrf5340dk/nrf5340dk_nrf5340_cpunet.yaml b/boards/nordic/nrf5340dk/nrf5340dk_nrf5340_cpunet.yaml index a55a7879fc015e0..a44099c4587e820 100644 --- a/boards/nordic/nrf5340dk/nrf5340dk_nrf5340_cpunet.yaml +++ b/boards/nordic/nrf5340dk/nrf5340dk_nrf5340_cpunet.yaml @@ -9,6 +9,7 @@ toolchain: ram: 64 flash: 256 supported: + - arduino_gpio - watchdog - gpio vendor: nordic diff --git a/boards/nordic/nrf54h20dk/Kconfig.defconfig b/boards/nordic/nrf54h20dk/Kconfig.defconfig index e37975f96adf47b..268722f5fe56d83 100644 --- a/boards/nordic/nrf54h20dk/Kconfig.defconfig +++ b/boards/nordic/nrf54h20dk/Kconfig.defconfig @@ -6,11 +6,14 @@ if BOARD_NRF54H20DK_NRF54H20_CPUAPP config BT_HCI_IPC default y if BT +config MAX_THREAD_BYTES + default 3 if USERSPACE + endif # BOARD_NRF54H20DK_NRF54H20_CPUAPP if BOARD_NRF54H20DK_NRF54H20_CPURAD -config BT_CTLR - default y if BT +config MAX_THREAD_BYTES + default 3 if USERSPACE endif # BOARD_NRF54H20DK_NRF54H20_CPURAD diff --git a/boards/nordic/nrf54h20dk/bicr.json b/boards/nordic/nrf54h20dk/bicr.json new file mode 100644 index 000000000000000..9937860052bd840 --- /dev/null +++ b/boards/nordic/nrf54h20dk/bicr.json @@ -0,0 +1,32 @@ +{ + "power": { + "scheme": "VDDH_2V1_5V5" + }, + "ioPortPower": { + "p1Supply": "EXTERNAL_1V8", + "p2Supply": "EXTERNAL_1V8", + "p6Supply": "EXTERNAL_1V8", + "p7Supply": "EXTERNAL_1V8", + "p9Supply": "EXTERNAL_FULL" + }, + "ioPortImpedance": { + "p6ImpedanceOhms": 50, + "p7ImpedanceOhms": 50 + }, + "lfosc": { + "source": "LFXO", + "lfxo": { + "mode": "CRYSTAL", + "accuracyPPM": 20, + "startupTimeMs": 600, + "builtInLoadCapacitancePf": 15, + "builtInLoadCapacitors": true + } + }, + "hfxo": { + "mode": "CRYSTAL", + "startupTimeUs": 850, + "builtInLoadCapacitors": true, + "builtInLoadCapacitancePf": 14 + } +} diff --git a/boards/nordic/nrf54h20dk/board.cmake b/boards/nordic/nrf54h20dk/board.cmake index 0c8376c1714e128..80963356dc989da 100644 --- a/boards/nordic/nrf54h20dk/board.cmake +++ b/boards/nordic/nrf54h20dk/board.cmake @@ -12,3 +12,14 @@ if(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP OR CONFIG_BOARD_NRF54H20DK_NRF54H20_C board_runner_args(jlink "--device=CORTEX-M33" "--speed=4000" "--tool-opt=-jlinkscriptfile ${JLINKSCRIPTFILE}") include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) endif() + +if(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUPPR OR CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUFLPR) + if(CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUPPR) + set(JLINKSCRIPTFILE ${CMAKE_CURRENT_LIST_DIR}/support/nrf54h20_cpuppr.JLinkScript) + else() + set(JLINKSCRIPTFILE ${CMAKE_CURRENT_LIST_DIR}/support/nrf54h20_cpuflpr.JLinkScript) + endif() + + board_runner_args(jlink "--device=RISC-V" "--speed=4000" "-if SW" "--tool-opt=-jlinkscriptfile ${JLINKSCRIPTFILE}") + include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) +endif() diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-common.dtsi b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-common.dtsi index 595307aec8c81f6..0c5307c4c8c25f7 100644 --- a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-common.dtsi +++ b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-common.dtsi @@ -11,13 +11,8 @@ &hfxo { status = "okay"; accuracy-ppm = <30>; - startup-time-us = <850>; - mode = "crystal"; }; &lfxo { status = "okay"; - accuracy-ppm = <20>; - startup-time-us = <600000>; - mode = "crystal"; }; diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-memory_map.dtsi b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-memory_map.dtsi index 2b2473f92b5feaa..8392389c0ad67d7 100644 --- a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-memory_map.dtsi +++ b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-memory_map.dtsi @@ -7,44 +7,44 @@ / { reserved-memory { - cpuapp_ram0x_region: memory@2f010000 { + cpurad_ram0x_region: memory@2f010000 { compatible = "nordic,owned-memory"; - reg = <0x2f010000 DT_SIZE_K(260)>; + reg = <0x2f010000 DT_SIZE_K(4)>; status = "disabled"; - nordic,access = ; + nordic,access = ; #address-cells = <1>; #size-cells = <1>; - ranges = <0x0 0x2f010000 0x41000>; + ranges = <0x0 0x2f010000 0x1000>; - cpusec_cpuapp_ipc_shm: memory@0 { + cpusec_cpurad_ipc_shm: memory@0 { reg = <0x0 DT_SIZE_K(2)>; }; - cpuapp_cpusec_ipc_shm: memory@800 { + cpurad_cpusec_ipc_shm: memory@800 { reg = <0x800 DT_SIZE_K(2)>; }; - - cpuapp_data: memory@1000 { - reg = <0x1000 DT_SIZE_K(256)>; - }; }; - cpurad_ram0x_region: memory@2f051000 { + cpuapp_ram0x_region: memory@2f011000 { compatible = "nordic,owned-memory"; - reg = <0x2f051000 DT_SIZE_K(4)>; + reg = <0x2f011000 DT_SIZE_K(260)>; status = "disabled"; - nordic,access = ; + nordic,access = ; #address-cells = <1>; #size-cells = <1>; - ranges = <0x0 0x2f051000 0x1000>; + ranges = <0x0 0x2f011000 0x41000>; - cpusec_cpurad_ipc_shm: memory@0 { + cpusec_cpuapp_ipc_shm: memory@0 { reg = <0x0 DT_SIZE_K(2)>; }; - cpurad_cpusec_ipc_shm: memory@800 { + cpuapp_cpusec_ipc_shm: memory@800 { reg = <0x800 DT_SIZE_K(2)>; }; + + cpuapp_data: memory@1000 { + reg = <0x1000 DT_SIZE_K(256)>; + }; }; etr_buf_ram0x_region: memory@2f0be000 { @@ -185,8 +185,8 @@ #address-cells = <1>; #size-cells = <1>; - cpurad_slot0_partition: partition@66000 { - reg = <0x66000 DT_SIZE_K(256)>; + cpurad_slot0_partition: partition@54000 { + reg = <0x54000 DT_SIZE_K(256)>; }; }; @@ -197,8 +197,8 @@ #address-cells = <1>; #size-cells = <1>; - cpuapp_slot0_partition: partition@a6000 { - reg = <0xa6000 DT_SIZE_K(248)>; + cpuapp_slot0_partition: partition@94000 { + reg = <0x94000 DT_SIZE_K(320)>; }; cpuppr_code_partition: partition@e4000 { @@ -222,7 +222,7 @@ }; storage_partition: partition@1e3000 { - reg = < 0x1e3000 DT_SIZE_K(24) >; + reg = < 0x1e3000 DT_SIZE_K(40) >; }; }; }; diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts index 9325b63a7a1d782..95d557bf944ded2 100644 --- a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts +++ b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts @@ -143,11 +143,16 @@ }; &cpusec_cpuapp_ipc { + status = "okay"; mbox-names = "tx", "rx"; tx-region = <&cpuapp_cpusec_ipc_shm>; rx-region = <&cpusec_cpuapp_ipc_shm>; }; +&cpusec_bellboard { + status = "okay"; +}; + ipc0: &cpuapp_cpurad_ipc { status = "okay"; mbox-names = "rx", "tx"; diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad.dts b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad.dts index cb8fb9e1a02607d..49ca847873f74b7 100644 --- a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad.dts +++ b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad.dts @@ -38,6 +38,10 @@ status = "okay"; }; +&cpurad_ram0x_region { + status = "okay"; +}; + &cpurad_bellboard { status = "okay"; interrupts = <96 NRF_DEFAULT_IRQ_PRIORITY>; @@ -55,11 +59,16 @@ }; &cpusec_cpurad_ipc { + status = "okay"; mbox-names = "tx", "rx"; tx-region = <&cpurad_cpusec_ipc_shm>; rx-region = <&cpusec_cpurad_ipc_shm>; }; +&cpusec_bellboard { + status = "okay"; +}; + ipc0: &cpuapp_cpurad_ipc { status = "okay"; mbox-names = "tx", "rx"; diff --git a/boards/nordic/nrf54h20dk/support/nrf54h20_cpuapp.JLinkScript b/boards/nordic/nrf54h20dk/support/nrf54h20_cpuapp.JLinkScript index 28010addbf1544b..b1b968573991fba 100644 --- a/boards/nordic/nrf54h20dk/support/nrf54h20_cpuapp.JLinkScript +++ b/boards/nordic/nrf54h20dk/support/nrf54h20_cpuapp.JLinkScript @@ -1,260 +1,12 @@ -// Constants specific to the application core __constant U32 _CPUCONF_ADDR = 0x52011000; -__constant U32 _PROCESSOR_ID = 2; -__constant U32 _DOMAIN_ID = 2; -__constant U32 _NUM_OTHER_PROCESSORS = 1; -const U32 _OTHER_PROCESSOR_IDS[1] = {3}; - -// Debug Halting Control and Status Register -__constant U32 _DHCSR_ADDR = 0xE000EDF0; -__constant U32 _DHCSR_DBGKEY = (0xA05F << 16); -__constant U32 _DHCSR_C_DEBUGEN = (1 << 0); -__constant U32 _DHCSR_C_HALT = (1 << 1); - -// Debug Exception and Monitor Control Register -__constant U32 _DEMCR_ADDR = 0xE000EDFC; -__constant U32 _DEMCR_VC_CORERESET = (1 << 0); -__constant U32 _DEMCR_TRCENA = (1 << 24); - -// CPU wait enable register __constant U32 _CPUCONF_CPUWAIT_OFFSET = 0x50C; -// CTRL-AP -__constant U32 _CTRLAP_ID = 4; -__constant U32 _CTRLAP_READY_BANK = 0; -__constant U32 _CTRLAP_READY_OFFSET = 1; -__constant U32 _CTRLAP_READY = 0; -__constant U32 _CTRLAP_MAILBOX_BANK = 1; -__constant U32 _CTRLAP_MAILBOX_TXDATA_OFFSET = 0; -__constant U32 _CTRLAP_MAILBOX_TXSTATUS_OFFSET = 1; -__constant U32 _CTRLAP_MAILBOX_RXDATA_OFFSET = 2; -__constant U32 _CTRLAP_MAILBOX_RXSTATUS_OFFSET = 3; -__constant U32 _CTRLAP_MAILBOX_NO_DATA_PENDING = 0; -__constant U32 _CTRLAP_MAILBOX_DATA_PENDING = 1; -__constant int _CTRLAP_TIMEOUT_MS = 500; - -// ADAC transaction buffers -static U32 _adacTx[20]; -static U32 _adacRx[20]; - -// Failed to send to the CTRL-AP MAILBOX -__constant int _ERR_TX = -1; -// Failed to receive from the CTRL-AP MAILBOX -__constant int _ERR_RX = -2; -// ADAC command returned an error -__constant int _ERR_REPLY = -3; - -// Wait for an AP register read to return the expected value. -int _WaitForDataStatus(U32 regOffset, int expectedStatus) -{ - int status; - int ret; - int start; - int elapsed; - - status = 0; - start = JLINK_GetTime(); - elapsed = 0; - - do { - ret = JLINK_CORESIGHT_ReadDAP(regOffset, 1, &status); - elapsed = JLINK_GetTime() - start; - } while ((ret < 0 || status != expectedStatus) && (elapsed < _CTRLAP_TIMEOUT_MS)); - - if (ret < 0) { - return ret; - } - - return status; -} - -// Continuously read from the CTRL-AP MAILBOX until there is no more pending data. -void _DrainMailbox(void) -{ - int ret; - int status; - int data; - - ret = JLINK_CORESIGHT_ReadDAP(_CTRLAP_MAILBOX_RXSTATUS_OFFSET, 1, &status); - while (ret >= 0 && status == _CTRLAP_MAILBOX_DATA_PENDING) { - JLINK_CORESIGHT_ReadDAP(_CTRLAP_MAILBOX_RXDATA_OFFSET, 1, &data); - ret = JLINK_CORESIGHT_ReadDAP(_CTRLAP_MAILBOX_RXSTATUS_OFFSET, 1, &status); - } -} - -// Perform an ADAC transaction by: -// * writing the given sequence of words to MAILBOX.TXDATATA, waiting for MAILBOX.TXSTATUS -// readiness before each write. -// * reading a sequence of words from MAILBOX.RXDATA, waiting for MAILBOX.RXSTATUS readiness before -// each read. -// -// The message to send is read from _adacTx and the reply is written to _adacRx. -// Optionally checks if a single data word is returned and returns an error if it is non-zero. -// -// Assumes that the correct AP and AP bank for CTRL-AP MAILBOX has been selected in the DP. -int _DoAdacTransaction(int checkReplyStatus) -{ - int numWords; - int ret; - int data; - int i; - - i = 0; - numWords = 2 + (_adacTx[1] >> 2); // Length based on the length field of the message - - while (i < numWords) { - ret = _WaitForDataStatus(_CTRLAP_MAILBOX_TXSTATUS_OFFSET, - _CTRLAP_MAILBOX_NO_DATA_PENDING); - if (ret != _CTRLAP_MAILBOX_NO_DATA_PENDING) { - JLINK_SYS_Report1("Timed out waiting for CTRL-AP TX readiness - result: ", - ret); - return _ERR_TX; - } - - ret = JLINK_CORESIGHT_WriteDAP(_CTRLAP_MAILBOX_TXDATA_OFFSET, 1, _adacTx[i]); - if (ret < 0) { - JLINK_SYS_Report1("Failed to write CTRL-AP TX data - result: ", ret); - return _ERR_TX; - } - - i += 1; - } - - i = 0; - numWords = 2; // Minimum message length - - while (i < numWords) { - ret = _WaitForDataStatus(_CTRLAP_MAILBOX_RXSTATUS_OFFSET, - _CTRLAP_MAILBOX_DATA_PENDING); - if (ret != _CTRLAP_MAILBOX_DATA_PENDING) { - JLINK_SYS_Report1("Timed out waiting for CTRL-AP RX data - result: ", ret); - return _ERR_RX; - } - - ret = JLINK_CORESIGHT_ReadDAP(_CTRLAP_MAILBOX_RXDATA_OFFSET, 1, &data); - if (ret < 0) { - JLINK_SYS_Report1("Failed to read CTRL-AP RX data - result: ", ret); - return _ERR_RX; - } - - if (i == 1) { - // Update total length based on the message length field - numWords = 2 + (data >> 2); - } - - _adacRx[i] = data; - i += 1; - } - - if (checkReplyStatus && _adacRx[1] == 4 && _adacRx[2] != 0) { - JLINK_SYS_Report1("ADAC command failed with status: ", _adacRx[2]); - return _ERR_REPLY; - } - - return 0; -} - -int ResetTarget(void) +int SetupTarget(void) { - int err; - U32 adacMajorVersion; - U32 i; - - // Select CTRL-AP bank 0, used for the READY register - JLINK_CORESIGHT_WriteDAP(JLINK_CORESIGHT_DP_REG_SELECT, 0, - (_CTRLAP_ID << 24) | (_CTRLAP_READY_BANK << 4)); - - // Wait for the READY register to indicate that the AP can be used. - err = _WaitForDataStatus(_CTRLAP_READY_OFFSET, _CTRLAP_READY); - if (err < 0) { - JLINK_SYS_Report1("Timed out waiting for CTRL-AP readiness - result: ", err); - return -1; - } - - // Select CTRL-AP bank 1, used for the MAILBOX registers for ADAC communication - JLINK_CORESIGHT_WriteDAP(JLINK_CORESIGHT_DP_REG_SELECT, 0, - (_CTRLAP_ID << 24) | (_CTRLAP_MAILBOX_BANK << 4)); - - // Extract any pre-existing data from the mailbox in case there was previously - // an aborted transaction. - _DrainMailbox(); - - // Read the ADAC version - _adacTx[0] = 0xA3000000; // Command VERSION - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x00000000; // Type 0 (ADAC version) - err = _DoAdacTransaction(0); - if (err < 0) { - return -1; - } - - adacMajorVersion = (_adacRx[2] >> 24) & 0xff; - JLINK_SYS_Report1("ADAC major version: ", adacMajorVersion); - - if (adacMajorVersion >= 2) { - // There is a very small chance that this command fails if the domain reset itself - // at the exact same time the command was issued. Therefore we retry a few times. - i = 0; - while (i < 3) { - // Reset non-essential domains - _adacTx[0] = 0xA30A0000; // Command RESET - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x00000000; // (reserved) - err = _DoAdacTransaction(1); - if (err >= 0) { - break; - } else if (err != _ERR_REPLY) { - return -1; - } - - i = i + 1; - } - - // Start the core in halted mode - _adacTx[0] = 0xA3090000; // Command START - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x01000000 | (_PROCESSOR_ID << 16); // Own processor, Flags HALT - err = _DoAdacTransaction(1); - if (err < 0) { - return -1; - } - - // Start other cores normally (will fail silently if no firmware is present) - i = 0; - while (i < _NUM_OTHER_PROCESSORS) { - _adacTx[0] = 0xA3090000; // Command START - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x00000000 | - (_OTHER_PROCESSOR_IDS[i] << 16); // Other processor, No flags - err = _DoAdacTransaction(0); - if (err < 0 && err != _ERR_REPLY) { - return -1; - } - - i = i + 1; - } - } else { - // Reset single domain via legacy implementation - _adacTx[0] = 0xA3030000; // Command RESET - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x01000000 | (_DOMAIN_ID << 16); // Own domain, Mode HALT - err = _DoAdacTransaction(1); - if (err < 0) { - return -1; - } - } - - // Halt the CPU - JLINK_MEM_WriteU32(_DHCSR_ADDR, (_DHCSR_DBGKEY | _DHCSR_C_HALT | _DHCSR_C_DEBUGEN)); - - // Set vector catch on reset (to halt the CPU immediately after reset) - JLINK_MEM_WriteU32(_DEMCR_ADDR, (_DEMCR_VC_CORERESET | _DEMCR_TRCENA)); + JLINK_TARGET_Halt(); // Disable CPU wait JLINK_MEM_WriteU32(_CPUCONF_ADDR + _CPUCONF_CPUWAIT_OFFSET, 0); - // Clear vector catch stuff - JLINK_MEM_WriteU32(_DEMCR_ADDR, _DEMCR_TRCENA); - return 0; } diff --git a/boards/nordic/nrf54h20dk/support/nrf54h20_cpuflpr.JLinkScript b/boards/nordic/nrf54h20dk/support/nrf54h20_cpuflpr.JLinkScript new file mode 100644 index 000000000000000..10b83259fdd5018 --- /dev/null +++ b/boards/nordic/nrf54h20dk/support/nrf54h20_cpuflpr.JLinkScript @@ -0,0 +1,9 @@ +int InitTarget(void) { + // Base address where DMI registers can be found in the APB address space + JLINK_ExecCommand("CORESIGHT_SetCoreBaseAddr = 0x5F8D4400"); + + // Use AP[x] to communicate with the RISC-V, flpr = APP + JLINK_ExecCommand("CORESIGHT_SetIndexAHBAPToUse = 0"); + + return 0; +} diff --git a/boards/nordic/nrf54h20dk/support/nrf54h20_cpuppr.JLinkScript b/boards/nordic/nrf54h20dk/support/nrf54h20_cpuppr.JLinkScript new file mode 100644 index 000000000000000..127981a45c36848 --- /dev/null +++ b/boards/nordic/nrf54h20dk/support/nrf54h20_cpuppr.JLinkScript @@ -0,0 +1,9 @@ +int InitTarget(void) { + // Base address where DMI registers can be found in the APB address space + JLINK_ExecCommand("CORESIGHT_SetCoreBaseAddr = 0x5F908400"); + + // Use AP[x] to communicate with the RISC-V, ppr = APP + JLINK_ExecCommand("CORESIGHT_SetIndexAHBAPToUse = 0"); + + return 0; +} diff --git a/boards/nordic/nrf54h20dk/support/nrf54h20_cpurad.JLinkScript b/boards/nordic/nrf54h20dk/support/nrf54h20_cpurad.JLinkScript index 5c2065307ff5681..e1861ae8c972a38 100644 --- a/boards/nordic/nrf54h20dk/support/nrf54h20_cpurad.JLinkScript +++ b/boards/nordic/nrf54h20dk/support/nrf54h20_cpurad.JLinkScript @@ -1,159 +1,6 @@ -// Constants specific to the radio core __constant U32 _CPUCONF_ADDR = 0x53011000; -__constant U32 _PROCESSOR_ID = 3; -__constant U32 _DOMAIN_ID = 3; -__constant U32 _NUM_OTHER_PROCESSORS = 1; -const U32 _OTHER_PROCESSOR_IDS[1] = {2}; - -// Debug Halting Control and Status Register -__constant U32 _DHCSR_ADDR = 0xE000EDF0; -__constant U32 _DHCSR_DBGKEY = (0xA05F << 16); -__constant U32 _DHCSR_C_DEBUGEN = (1 << 0); -__constant U32 _DHCSR_C_HALT = (1 << 1); - -// Debug Exception and Monitor Control Register -__constant U32 _DEMCR_ADDR = 0xE000EDFC; -__constant U32 _DEMCR_VC_CORERESET = (1 << 0); -__constant U32 _DEMCR_TRCENA = (1 << 24); - -// CPU wait enable register __constant U32 _CPUCONF_CPUWAIT_OFFSET = 0x50C; -// CTRL-AP -__constant U32 _CTRLAP_ID = 4; -__constant U32 _CTRLAP_READY_BANK = 0; -__constant U32 _CTRLAP_READY_OFFSET = 1; -__constant U32 _CTRLAP_READY = 0; -__constant U32 _CTRLAP_MAILBOX_BANK = 1; -__constant U32 _CTRLAP_MAILBOX_TXDATA_OFFSET = 0; -__constant U32 _CTRLAP_MAILBOX_TXSTATUS_OFFSET = 1; -__constant U32 _CTRLAP_MAILBOX_RXDATA_OFFSET = 2; -__constant U32 _CTRLAP_MAILBOX_RXSTATUS_OFFSET = 3; -__constant U32 _CTRLAP_MAILBOX_NO_DATA_PENDING = 0; -__constant U32 _CTRLAP_MAILBOX_DATA_PENDING = 1; -__constant int _CTRLAP_TIMEOUT_MS = 500; - -// ADAC transaction buffers -static U32 _adacTx[20]; -static U32 _adacRx[20]; - -// Failed to send to the CTRL-AP MAILBOX -__constant int _ERR_TX = -1; -// Failed to receive from the CTRL-AP MAILBOX -__constant int _ERR_RX = -2; -// ADAC command returned an error -__constant int _ERR_REPLY = -3; - -// Wait for an AP register read to return the expected value. -int _WaitForDataStatus(U32 regOffset, int expectedStatus) -{ - int status; - int ret; - int start; - int elapsed; - - status = 0; - start = JLINK_GetTime(); - elapsed = 0; - - do { - ret = JLINK_CORESIGHT_ReadDAP(regOffset, 1, &status); - elapsed = JLINK_GetTime() - start; - } while ((ret < 0 || status != expectedStatus) && (elapsed < _CTRLAP_TIMEOUT_MS)); - - if (ret < 0) { - return ret; - } - - return status; -} - -// Continuously read from the CTRL-AP MAILBOX until there is no more pending data. -void _DrainMailbox(void) -{ - int ret; - int status; - int data; - - ret = JLINK_CORESIGHT_ReadDAP(_CTRLAP_MAILBOX_RXSTATUS_OFFSET, 1, &status); - while (ret >= 0 && status == _CTRLAP_MAILBOX_DATA_PENDING) { - JLINK_CORESIGHT_ReadDAP(_CTRLAP_MAILBOX_RXDATA_OFFSET, 1, &data); - ret = JLINK_CORESIGHT_ReadDAP(_CTRLAP_MAILBOX_RXSTATUS_OFFSET, 1, &status); - } -} - -// Perform an ADAC transaction by: -// * writing the given sequence of words to MAILBOX.TXDATATA, waiting for MAILBOX.TXSTATUS -// readiness before each write. -// * reading a sequence of words from MAILBOX.RXDATA, waiting for MAILBOX.RXSTATUS readiness before -// each read. -// -// The message to send is read from _adacTx and the reply is written to _adacRx. -// Optionally checks if a single data word is returned and returns an error if it is non-zero. -// -// Assumes that the correct AP and AP bank for CTRL-AP MAILBOX has been selected in the DP. -int _DoAdacTransaction(int checkReplyStatus) -{ - int numWords; - int ret; - int data; - int i; - - i = 0; - numWords = 2 + (_adacTx[1] >> 2); // Length based on the length field of the message - - while (i < numWords) { - ret = _WaitForDataStatus(_CTRLAP_MAILBOX_TXSTATUS_OFFSET, - _CTRLAP_MAILBOX_NO_DATA_PENDING); - if (ret != _CTRLAP_MAILBOX_NO_DATA_PENDING) { - JLINK_SYS_Report1("Timed out waiting for CTRL-AP TX readiness - result: ", - ret); - return _ERR_TX; - } - - ret = JLINK_CORESIGHT_WriteDAP(_CTRLAP_MAILBOX_TXDATA_OFFSET, 1, _adacTx[i]); - if (ret < 0) { - JLINK_SYS_Report1("Failed to write CTRL-AP TX data - result: ", ret); - return _ERR_TX; - } - - i += 1; - } - - i = 0; - numWords = 2; // Minimum message length - - while (i < numWords) { - ret = _WaitForDataStatus(_CTRLAP_MAILBOX_RXSTATUS_OFFSET, - _CTRLAP_MAILBOX_DATA_PENDING); - if (ret != _CTRLAP_MAILBOX_DATA_PENDING) { - JLINK_SYS_Report1("Timed out waiting for CTRL-AP RX data - result: ", ret); - return _ERR_RX; - } - - ret = JLINK_CORESIGHT_ReadDAP(_CTRLAP_MAILBOX_RXDATA_OFFSET, 1, &data); - if (ret < 0) { - JLINK_SYS_Report1("Failed to read CTRL-AP RX data - result: ", ret); - return _ERR_RX; - } - - if (i == 1) { - // Update total length based on the message length field - numWords = 2 + (data >> 2); - } - - _adacRx[i] = data; - i += 1; - } - - if (checkReplyStatus && _adacRx[1] == 4 && _adacRx[2] != 0) { - JLINK_SYS_Report1("ADAC command failed with status: ", _adacRx[2]); - return _ERR_REPLY; - } - - return 0; -} - int ConfigTargetSettings(void) { JLINK_ExecCommand("CORESIGHT_AddAP = Index=1 Type=AHB-AP"); @@ -162,107 +9,12 @@ int ConfigTargetSettings(void) return 0; } -int ResetTarget(void) +int SetupTarget(void) { - int err; - U32 adacMajorVersion; - U32 i; - - // Select CTRL-AP bank 0, used for the READY register - JLINK_CORESIGHT_WriteDAP(JLINK_CORESIGHT_DP_REG_SELECT, 0, - (_CTRLAP_ID << 24) | (_CTRLAP_READY_BANK << 4)); - - // Wait for the READY register to indicate that the AP can be used. - err = _WaitForDataStatus(_CTRLAP_READY_OFFSET, _CTRLAP_READY); - if (err < 0) { - JLINK_SYS_Report1("Timed out waiting for CTRL-AP readiness - result: ", err); - return -1; - } - - // Select CTRL-AP bank 1, used for the MAILBOX registers for ADAC communication - JLINK_CORESIGHT_WriteDAP(JLINK_CORESIGHT_DP_REG_SELECT, 0, - (_CTRLAP_ID << 24) | (_CTRLAP_MAILBOX_BANK << 4)); - - // Extract any pre-existing data from the mailbox in case there was previously - // an aborted transaction. - _DrainMailbox(); - - // Read the ADAC version - _adacTx[0] = 0xA3000000; // Command VERSION - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x00000000; // Type 0 (ADAC version) - err = _DoAdacTransaction(0); - if (err < 0) { - return -1; - } - - adacMajorVersion = (_adacRx[2] >> 24) & 0xff; - JLINK_SYS_Report1("ADAC major version: ", adacMajorVersion); - - if (adacMajorVersion >= 2) { - // There is a very small chance that this command fails if the domain reset itself - // at the exact same time the command was issued. Therefore we retry a few times. - i = 0; - while (i < 3) { - // Reset non-essential domains - _adacTx[0] = 0xA30A0000; // Command RESET - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x00000000; // (reserved) - err = _DoAdacTransaction(1); - if (err >= 0) { - break; - } else if (err != _ERR_REPLY) { - return -1; - } - - i = i + 1; - } - - // Start the core in halted mode - _adacTx[0] = 0xA3090000; // Command START - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x01000000 | (_PROCESSOR_ID << 16); // Own processor, Flags HALT - err = _DoAdacTransaction(1); - if (err < 0) { - return -1; - } - - // Start other cores normally (will fail silently if no firmware is present) - i = 0; - while (i < _NUM_OTHER_PROCESSORS) { - _adacTx[0] = 0xA3090000; // Command START - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x00000000 | - (_OTHER_PROCESSOR_IDS[i] << 16); // Other processor, No flags - err = _DoAdacTransaction(0); - if (err < 0 && err != _ERR_REPLY) { - return -1; - } - - i = i + 1; - } - } else { - // Reset single domain via legacy implementation - _adacTx[0] = 0xA3030000; // Command RESET - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x01000000 | (_DOMAIN_ID << 16); // Own domain, Mode HALT - err = _DoAdacTransaction(1); - if (err < 0) { - return -1; - } - } - - // Halt the CPU - JLINK_MEM_WriteU32(_DHCSR_ADDR, (_DHCSR_DBGKEY | _DHCSR_C_HALT | _DHCSR_C_DEBUGEN)); - - // Set vector catch on reset (to halt the CPU immediately after reset) - JLINK_MEM_WriteU32(_DEMCR_ADDR, (_DEMCR_VC_CORERESET | _DEMCR_TRCENA)); + JLINK_TARGET_Halt(); // Disable CPU wait JLINK_MEM_WriteU32(_CPUCONF_ADDR + _CPUCONF_CPUWAIT_OFFSET, 0); - // Clear vector catch stuff - JLINK_MEM_WriteU32(_DEMCR_ADDR, _DEMCR_TRCENA); - return 0; } diff --git a/boards/nordic/nrf54l15dk/Kconfig.defconfig b/boards/nordic/nrf54l15dk/Kconfig.defconfig index cbb822eec9c8a4a..639cbccf3f40982 100644 --- a/boards/nordic/nrf54l15dk/Kconfig.defconfig +++ b/boards/nordic/nrf54l15dk/Kconfig.defconfig @@ -4,9 +4,6 @@ if BOARD_NRF54L15DK_NRF54L05_CPUAPP || BOARD_NRF54L15DK_NRF54L10_CPUAPP || \ BOARD_NRF54L15DK_NRF54L15_CPUAPP -config BT_CTLR - default BT - config ROM_START_OFFSET default 0x800 if BOOTLOADER_MCUBOOT diff --git a/boards/nordic/nrf54l15dk/board.cmake b/boards/nordic/nrf54l15dk/board.cmake index c69f8460c0a58ae..7cba3884edae70b 100644 --- a/boards/nordic/nrf54l15dk/board.cmake +++ b/boards/nordic/nrf54l15dk/board.cmake @@ -6,7 +6,8 @@ if(CONFIG_SOC_NRF54L05_CPUAPP OR CONFIG_SOC_NRF54L10_CPUAPP OR board_runner_args(jlink "--device=cortex-m33" "--speed=4000") elseif(CONFIG_SOC_NRF54L05_CPUFLPR OR CONFIG_SOC_NRF54L10_CPUFLPR OR CONFIG_SOC_NRF54L15_CPUFLPR) - board_runner_args(jlink "--speed=4000") + set(JLINKSCRIPTFILE ${CMAKE_CURRENT_LIST_DIR}/support/nrf54l_05_10_15_cpuflpr.JLinkScript) + board_runner_args(jlink "--device=RISC-V" "--speed=4000" "-if SW" "--tool-opt=-jlinkscriptfile ${JLINKSCRIPTFILE}") endif() include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake) diff --git a/boards/nordic/nrf54l15dk/doc/index.rst b/boards/nordic/nrf54l15dk/doc/index.rst index 8805e8746b50dce..e4ad1e8ad09c981 100644 --- a/boards/nordic/nrf54l15dk/doc/index.rst +++ b/boards/nordic/nrf54l15dk/doc/index.rst @@ -150,3 +150,41 @@ Test the nRF54L15 DK with a :zephyr:code-sample:`blinky` sample. .. _nRF54L15 website: https://www.nordicsemi.com/Products/nRF54L15 .. _nRF54L15 documentation: https://docs.nordicsemi.com/bundle/ncs-latest/page/nrf/app_dev/device_guides/nrf54l/index.html + +.. _nrf54l15dk_nrf54l05: + +nRF54L05 emulation on nRF54L15 DK +################################# + +Overview +******** + +The ``nrf54l15dk/nrf54l05`` board is a modified version of the :ref:`nrf54l15dk_nrf54l15` +that enforces the limitations imposed by the nRF54L05 IC, which is a +cost-reduced variant of the original nRF54L15. Since Nordic does not offer a +development kit for the nRF54L05, you can use this board to develop for this +IC while using the nRF54L15 Development Kit (PCA10156). + +See :ref:`nrf54l15dk_nrf54l15` for more information about the development board and +`nRF54L05 website`_ for the official reference on the IC itself. + +.. _nRF54L05 website: https://www.nordicsemi.com/Products/nRF54L05 + +.. _nrf54l15dk_nrf54l10: + +nRF54L10 emulation on nRF54L15 DK +################################# + +Overview +******** + +The ``nrf54l15dk/nrf54l10`` board is a modified version of the :ref:`nrf54l15dk_nrf54l15` +that enforces the limitations imposed by the nRF54L10 IC, which is a +cost-reduced variant of the original nRF54L15. Since Nordic does not offer a +development kit for the nRF54L10 you can use this board to develop for this +IC while using the nRF54L15 Development Kit (PCA10156). + +See :ref:`nrf54l15dk_nrf54l15` for more information about the development board and +`nRF54L10 website`_ for the official reference on the IC itself. + +.. _nRF54L10 website: https://www.nordicsemi.com/Products/nRF54L10 diff --git a/boards/nordic/nrf54l15dk/support/nrf54l_05_10_15_cpuflpr.JLinkScript b/boards/nordic/nrf54l15dk/support/nrf54l_05_10_15_cpuflpr.JLinkScript new file mode 100644 index 000000000000000..1cf94ee52a4d0f3 --- /dev/null +++ b/boards/nordic/nrf54l15dk/support/nrf54l_05_10_15_cpuflpr.JLinkScript @@ -0,0 +1,5 @@ +int InitTarget(void) { + // Base address where DMI registers can be found in the APB address space + JLINK_ExecCommand("CORESIGHT_SetCoreBaseAddr = 0x5004C400"); + return 0; +} diff --git a/boards/nordic/nrf54l20pdk/Kconfig.defconfig b/boards/nordic/nrf54l20pdk/Kconfig.defconfig index 850f69bdda0e398..f6987b800879a1a 100644 --- a/boards/nordic/nrf54l20pdk/Kconfig.defconfig +++ b/boards/nordic/nrf54l20pdk/Kconfig.defconfig @@ -3,9 +3,6 @@ if BOARD_NRF54L20PDK_NRF54L20_CPUAPP -config BT_CTLR - default BT - config ROM_START_OFFSET default 0x800 if BOOTLOADER_MCUBOOT diff --git a/boards/nordic/nrf54l20pdk/nrf54l20pdk_nrf54l20_cpuapp.yaml b/boards/nordic/nrf54l20pdk/nrf54l20pdk_nrf54l20_cpuapp.yaml index d11ea0d869fffbf..99b87bea0c25540 100644 --- a/boards/nordic/nrf54l20pdk/nrf54l20pdk_nrf54l20_cpuapp.yaml +++ b/boards/nordic/nrf54l20pdk/nrf54l20pdk_nrf54l20_cpuapp.yaml @@ -15,3 +15,4 @@ flash: 449 supported: - counter - gpio + - watchdog diff --git a/boards/nordic/nrf7002dk/Kconfig b/boards/nordic/nrf7002dk/Kconfig index 4297ddb4c16e9f6..e599cbcce0751cd 100644 --- a/boards/nordic/nrf7002dk/Kconfig +++ b/boards/nordic/nrf7002dk/Kconfig @@ -32,9 +32,6 @@ endif if BOARD_NRF7002DK_NRF5340_CPUNET -config BT_CTLR - default y if BT - config BT_ECC default y if BT diff --git a/boards/nordic/nrf7002dk/nrf5340_cpuapp_common.dtsi b/boards/nordic/nrf7002dk/nrf5340_cpuapp_common.dtsi index cff6e54fd5d7d47..8a54d6da416c657 100644 --- a/boards/nordic/nrf7002dk/nrf5340_cpuapp_common.dtsi +++ b/boards/nordic/nrf7002dk/nrf5340_cpuapp_common.dtsi @@ -111,6 +111,15 @@ mcuboot-led0 = &led0; watchdog0 = &wdt0; }; + + nrf_radio_coex: coex { + status = "okay"; + compatible = "nordic,nrf7002-coex"; + req-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; + status0-gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; + grant-gpios = <&gpio0 24 (GPIO_PULL_DOWN | GPIO_ACTIVE_LOW)>; + swctrl1-gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; + }; }; &vregmain { diff --git a/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpuapp_defconfig b/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpuapp_defconfig index c486d8323821a2c..49f3e03e2632dba 100644 --- a/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpuapp_defconfig +++ b/boards/nordic/nrf7002dk/nrf7002dk_nrf5340_cpuapp_defconfig @@ -18,3 +18,10 @@ CONFIG_SERIAL=y # Enable console CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y + +# Enable RNG +CONFIG_MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG=y +CONFIG_MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG_ALLOW_NON_CSPRNG=y + +# ISN needs CS-Rand which isn't supported upstream for nRF boards +CONFIG_NET_TCP_ISN_RFC6528=n diff --git a/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_defconfig b/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_defconfig index 4936d06617fa1ab..c486d8323821a2c 100644 --- a/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_defconfig +++ b/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_defconfig @@ -18,5 +18,3 @@ CONFIG_SERIAL=y # Enable console CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y - -CONFIG_PINCTRL=y diff --git a/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_ns_defconfig b/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_ns_defconfig index 4051bf70caa5a08..5690c239b7ba2cb 100644 --- a/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_ns_defconfig +++ b/boards/nordic/nrf9131ek/nrf9131ek_nrf9131_ns_defconfig @@ -22,8 +22,6 @@ CONFIG_SERIAL=y CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y -CONFIG_PINCTRL=y - # Enable PMIC CONFIG_I2C=y CONFIG_REGULATOR=y diff --git a/boards/nordic/nrf9160dk/Kconfig.defconfig b/boards/nordic/nrf9160dk/Kconfig.defconfig index 11880ae2a131a18..b26c68ef531954e 100644 --- a/boards/nordic/nrf9160dk/Kconfig.defconfig +++ b/boards/nordic/nrf9160dk/Kconfig.defconfig @@ -45,9 +45,6 @@ endif # BOARD_NRF9160DK_NRF9160 || BOARD_NRF9160DK_NRF9160_NS if BOARD_NRF9160DK_NRF52840 -config BT_CTLR - default BT - config BT_WAIT_NOP default BT && $(dt_nodelabel_enabled,reset_input) diff --git a/boards/nordic/nrf9280pdk/Kconfig.defconfig b/boards/nordic/nrf9280pdk/Kconfig.defconfig index c5c3576b4c27672..d1252a0a3a2e0fb 100644 --- a/boards/nordic/nrf9280pdk/Kconfig.defconfig +++ b/boards/nordic/nrf9280pdk/Kconfig.defconfig @@ -10,9 +10,6 @@ endif # BOARD_NRF9280PDK_NRF9280_CPUAPP if BOARD_NRF9280PDK_NRF9280_CPURAD -config BT_CTLR - default y if BT - endif # BOARD_NRF9280PDK_NRF9280_CPURAD if BOARD_NRF9280PDK_NRF9280_CPUPPR diff --git a/boards/nordic/nrf9280pdk/support/nrf9280_cpuapp.JLinkScript b/boards/nordic/nrf9280pdk/support/nrf9280_cpuapp.JLinkScript index 5791a7bed9b12f2..b1b968573991fba 100644 --- a/boards/nordic/nrf9280pdk/support/nrf9280_cpuapp.JLinkScript +++ b/boards/nordic/nrf9280pdk/support/nrf9280_cpuapp.JLinkScript @@ -1,260 +1,12 @@ -// Constants specific to the application core __constant U32 _CPUCONF_ADDR = 0x52011000; -__constant U32 _PROCESSOR_ID = 2; -__constant U32 _DOMAIN_ID = 2; -__constant U32 _NUM_OTHER_PROCESSORS = 2; -const U32 _OTHER_PROCESSOR_IDS[2] = {4, 3}; - -// Debug Halting Control and Status Register -__constant U32 _DHCSR_ADDR = 0xE000EDF0; -__constant U32 _DHCSR_DBGKEY = (0xA05F << 16); -__constant U32 _DHCSR_C_DEBUGEN = (1 << 0); -__constant U32 _DHCSR_C_HALT = (1 << 1); - -// Debug Exception and Monitor Control Register -__constant U32 _DEMCR_ADDR = 0xE000EDFC; -__constant U32 _DEMCR_VC_CORERESET = (1 << 0); -__constant U32 _DEMCR_TRCENA = (1 << 24); - -// CPU wait enable register __constant U32 _CPUCONF_CPUWAIT_OFFSET = 0x50C; -// CTRL-AP -__constant U32 _CTRLAP_ID = 4; -__constant U32 _CTRLAP_READY_BANK = 0; -__constant U32 _CTRLAP_READY_OFFSET = 1; -__constant U32 _CTRLAP_READY = 0; -__constant U32 _CTRLAP_MAILBOX_BANK = 1; -__constant U32 _CTRLAP_MAILBOX_TXDATA_OFFSET = 0; -__constant U32 _CTRLAP_MAILBOX_TXSTATUS_OFFSET = 1; -__constant U32 _CTRLAP_MAILBOX_RXDATA_OFFSET = 2; -__constant U32 _CTRLAP_MAILBOX_RXSTATUS_OFFSET = 3; -__constant U32 _CTRLAP_MAILBOX_NO_DATA_PENDING = 0; -__constant U32 _CTRLAP_MAILBOX_DATA_PENDING = 1; -__constant int _CTRLAP_TIMEOUT_MS = 500; - -// ADAC transaction buffers -static U32 _adacTx[20]; -static U32 _adacRx[20]; - -// Failed to send to the CTRL-AP MAILBOX -__constant int _ERR_TX = -1; -// Failed to receive from the CTRL-AP MAILBOX -__constant int _ERR_RX = -2; -// ADAC command returned an error -__constant int _ERR_REPLY = -3; - -// Wait for an AP register read to return the expected value. -int _WaitForDataStatus(U32 regOffset, int expectedStatus) -{ - int status; - int ret; - int start; - int elapsed; - - status = 0; - start = JLINK_GetTime(); - elapsed = 0; - - do { - ret = JLINK_CORESIGHT_ReadDAP(regOffset, 1, &status); - elapsed = JLINK_GetTime() - start; - } while ((ret < 0 || status != expectedStatus) && (elapsed < _CTRLAP_TIMEOUT_MS)); - - if (ret < 0) { - return ret; - } - - return status; -} - -// Continuously read from the CTRL-AP MAILBOX until there is no more pending data. -void _DrainMailbox(void) -{ - int ret; - int status; - int data; - - ret = JLINK_CORESIGHT_ReadDAP(_CTRLAP_MAILBOX_RXSTATUS_OFFSET, 1, &status); - while (ret >= 0 && status == _CTRLAP_MAILBOX_DATA_PENDING) { - JLINK_CORESIGHT_ReadDAP(_CTRLAP_MAILBOX_RXDATA_OFFSET, 1, &data); - ret = JLINK_CORESIGHT_ReadDAP(_CTRLAP_MAILBOX_RXSTATUS_OFFSET, 1, &status); - } -} - -// Perform an ADAC transaction by: -// * writing the given sequence of words to MAILBOX.TXDATATA, waiting for MAILBOX.TXSTATUS -// readiness before each write. -// * reading a sequence of words from MAILBOX.RXDATA, waiting for MAILBOX.RXSTATUS readiness before -// each read. -// -// The message to send is read from _adacTx and the reply is written to _adacRx. -// Optionally checks if a single data word is returned and returns an error if it is non-zero. -// -// Assumes that the correct AP and AP bank for CTRL-AP MAILBOX has been selected in the DP. -int _DoAdacTransaction(int checkReplyStatus) -{ - int numWords; - int ret; - int data; - int i; - - i = 0; - numWords = 2 + (_adacTx[1] >> 2); // Length based on the length field of the message - - while (i < numWords) { - ret = _WaitForDataStatus(_CTRLAP_MAILBOX_TXSTATUS_OFFSET, - _CTRLAP_MAILBOX_NO_DATA_PENDING); - if (ret != _CTRLAP_MAILBOX_NO_DATA_PENDING) { - JLINK_SYS_Report1("Timed out waiting for CTRL-AP TX readiness - result: ", - ret); - return _ERR_TX; - } - - ret = JLINK_CORESIGHT_WriteDAP(_CTRLAP_MAILBOX_TXDATA_OFFSET, 1, _adacTx[i]); - if (ret < 0) { - JLINK_SYS_Report1("Failed to write CTRL-AP TX data - result: ", ret); - return _ERR_TX; - } - - i += 1; - } - - i = 0; - numWords = 2; // Minimum message length - - while (i < numWords) { - ret = _WaitForDataStatus(_CTRLAP_MAILBOX_RXSTATUS_OFFSET, - _CTRLAP_MAILBOX_DATA_PENDING); - if (ret != _CTRLAP_MAILBOX_DATA_PENDING) { - JLINK_SYS_Report1("Timed out waiting for CTRL-AP RX data - result: ", ret); - return _ERR_RX; - } - - ret = JLINK_CORESIGHT_ReadDAP(_CTRLAP_MAILBOX_RXDATA_OFFSET, 1, &data); - if (ret < 0) { - JLINK_SYS_Report1("Failed to read CTRL-AP RX data - result: ", ret); - return _ERR_RX; - } - - if (i == 1) { - // Update total length based on the message length field - numWords = 2 + (data >> 2); - } - - _adacRx[i] = data; - i += 1; - } - - if (checkReplyStatus && _adacRx[1] == 4 && _adacRx[2] != 0) { - JLINK_SYS_Report1("ADAC command failed with status: ", _adacRx[2]); - return _ERR_REPLY; - } - - return 0; -} - -int ResetTarget(void) +int SetupTarget(void) { - int err; - U32 adacMajorVersion; - U32 i; - - // Select CTRL-AP bank 0, used for the READY register - JLINK_CORESIGHT_WriteDAP(JLINK_CORESIGHT_DP_REG_SELECT, 0, - (_CTRLAP_ID << 24) | (_CTRLAP_READY_BANK << 4)); - - // Wait for the READY register to indicate that the AP can be used. - err = _WaitForDataStatus(_CTRLAP_READY_OFFSET, _CTRLAP_READY); - if (err < 0) { - JLINK_SYS_Report1("Timed out waiting for CTRL-AP readiness - result: ", err); - return -1; - } - - // Select CTRL-AP bank 1, used for the MAILBOX registers for ADAC communication - JLINK_CORESIGHT_WriteDAP(JLINK_CORESIGHT_DP_REG_SELECT, 0, - (_CTRLAP_ID << 24) | (_CTRLAP_MAILBOX_BANK << 4)); - - // Extract any pre-existing data from the mailbox in case there was previously - // an aborted transaction. - _DrainMailbox(); - - // Read the ADAC version - _adacTx[0] = 0xA3000000; // Command VERSION - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x00000000; // Type 0 (ADAC version) - err = _DoAdacTransaction(0); - if (err < 0) { - return -1; - } - - adacMajorVersion = (_adacRx[2] >> 24) & 0xff; - JLINK_SYS_Report1("ADAC major version: ", adacMajorVersion); - - if (adacMajorVersion >= 2) { - // There is a very small chance that this command fails if the domain reset itself - // at the exact same time the command was issued. Therefore we retry a few times. - i = 0; - while (i < 3) { - // Reset non-essential domains - _adacTx[0] = 0xA30A0000; // Command RESET - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x00000000; // (reserved) - err = _DoAdacTransaction(1); - if (err >= 0) { - break; - } else if (err != _ERR_REPLY) { - return -1; - } - - i = i + 1; - } - - // Start the core in halted mode - _adacTx[0] = 0xA3090000; // Command START - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x01000000 | (_PROCESSOR_ID << 16); // Own processor, Flags HALT - err = _DoAdacTransaction(1); - if (err < 0) { - return -1; - } - - // Start other cores normally (will fail silently if no firmware is present) - i = 0; - while (i < _NUM_OTHER_PROCESSORS) { - _adacTx[0] = 0xA3090000; // Command START - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x00000000 | - (_OTHER_PROCESSOR_IDS[i] << 16); // Other processor, No flags - err = _DoAdacTransaction(0); - if (err < 0 && err != _ERR_REPLY) { - return -1; - } - - i = i + 1; - } - } else { - // Reset single domain via legacy implementation - _adacTx[0] = 0xA3030000; // Command RESET - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x01000000 | (_DOMAIN_ID << 16); // Own domain, Mode HALT - err = _DoAdacTransaction(1); - if (err < 0) { - return -1; - } - } - - // Halt the CPU - JLINK_MEM_WriteU32(_DHCSR_ADDR, (_DHCSR_DBGKEY | _DHCSR_C_HALT | _DHCSR_C_DEBUGEN)); - - // Set vector catch on reset (to halt the CPU immediately after reset) - JLINK_MEM_WriteU32(_DEMCR_ADDR, (_DEMCR_VC_CORERESET | _DEMCR_TRCENA)); + JLINK_TARGET_Halt(); // Disable CPU wait JLINK_MEM_WriteU32(_CPUCONF_ADDR + _CPUCONF_CPUWAIT_OFFSET, 0); - // Clear vector catch stuff - JLINK_MEM_WriteU32(_DEMCR_ADDR, _DEMCR_TRCENA); - return 0; } diff --git a/boards/nordic/nrf9280pdk/support/nrf9280_cpurad.JLinkScript b/boards/nordic/nrf9280pdk/support/nrf9280_cpurad.JLinkScript index 02b84dcc970a368..e1861ae8c972a38 100644 --- a/boards/nordic/nrf9280pdk/support/nrf9280_cpurad.JLinkScript +++ b/boards/nordic/nrf9280pdk/support/nrf9280_cpurad.JLinkScript @@ -1,159 +1,6 @@ -// Constants specific to the radio core __constant U32 _CPUCONF_ADDR = 0x53011000; -__constant U32 _PROCESSOR_ID = 3; -__constant U32 _DOMAIN_ID = 3; -__constant U32 _NUM_OTHER_PROCESSORS = 2; -const U32 _OTHER_PROCESSOR_IDS[2] = {4, 2}; - -// Debug Halting Control and Status Register -__constant U32 _DHCSR_ADDR = 0xE000EDF0; -__constant U32 _DHCSR_DBGKEY = (0xA05F << 16); -__constant U32 _DHCSR_C_DEBUGEN = (1 << 0); -__constant U32 _DHCSR_C_HALT = (1 << 1); - -// Debug Exception and Monitor Control Register -__constant U32 _DEMCR_ADDR = 0xE000EDFC; -__constant U32 _DEMCR_VC_CORERESET = (1 << 0); -__constant U32 _DEMCR_TRCENA = (1 << 24); - -// CPU wait enable register __constant U32 _CPUCONF_CPUWAIT_OFFSET = 0x50C; -// CTRL-AP -__constant U32 _CTRLAP_ID = 4; -__constant U32 _CTRLAP_READY_BANK = 0; -__constant U32 _CTRLAP_READY_OFFSET = 1; -__constant U32 _CTRLAP_READY = 0; -__constant U32 _CTRLAP_MAILBOX_BANK = 1; -__constant U32 _CTRLAP_MAILBOX_TXDATA_OFFSET = 0; -__constant U32 _CTRLAP_MAILBOX_TXSTATUS_OFFSET = 1; -__constant U32 _CTRLAP_MAILBOX_RXDATA_OFFSET = 2; -__constant U32 _CTRLAP_MAILBOX_RXSTATUS_OFFSET = 3; -__constant U32 _CTRLAP_MAILBOX_NO_DATA_PENDING = 0; -__constant U32 _CTRLAP_MAILBOX_DATA_PENDING = 1; -__constant int _CTRLAP_TIMEOUT_MS = 500; - -// ADAC transaction buffers -static U32 _adacTx[20]; -static U32 _adacRx[20]; - -// Failed to send to the CTRL-AP MAILBOX -__constant int _ERR_TX = -1; -// Failed to receive from the CTRL-AP MAILBOX -__constant int _ERR_RX = -2; -// ADAC command returned an error -__constant int _ERR_REPLY = -3; - -// Wait for an AP register read to return the expected value. -int _WaitForDataStatus(U32 regOffset, int expectedStatus) -{ - int status; - int ret; - int start; - int elapsed; - - status = 0; - start = JLINK_GetTime(); - elapsed = 0; - - do { - ret = JLINK_CORESIGHT_ReadDAP(regOffset, 1, &status); - elapsed = JLINK_GetTime() - start; - } while ((ret < 0 || status != expectedStatus) && (elapsed < _CTRLAP_TIMEOUT_MS)); - - if (ret < 0) { - return ret; - } - - return status; -} - -// Continuously read from the CTRL-AP MAILBOX until there is no more pending data. -void _DrainMailbox(void) -{ - int ret; - int status; - int data; - - ret = JLINK_CORESIGHT_ReadDAP(_CTRLAP_MAILBOX_RXSTATUS_OFFSET, 1, &status); - while (ret >= 0 && status == _CTRLAP_MAILBOX_DATA_PENDING) { - JLINK_CORESIGHT_ReadDAP(_CTRLAP_MAILBOX_RXDATA_OFFSET, 1, &data); - ret = JLINK_CORESIGHT_ReadDAP(_CTRLAP_MAILBOX_RXSTATUS_OFFSET, 1, &status); - } -} - -// Perform an ADAC transaction by: -// * writing the given sequence of words to MAILBOX.TXDATATA, waiting for MAILBOX.TXSTATUS -// readiness before each write. -// * reading a sequence of words from MAILBOX.RXDATA, waiting for MAILBOX.RXSTATUS readiness before -// each read. -// -// The message to send is read from _adacTx and the reply is written to _adacRx. -// Optionally checks if a single data word is returned and returns an error if it is non-zero. -// -// Assumes that the correct AP and AP bank for CTRL-AP MAILBOX has been selected in the DP. -int _DoAdacTransaction(int checkReplyStatus) -{ - int numWords; - int ret; - int data; - int i; - - i = 0; - numWords = 2 + (_adacTx[1] >> 2); // Length based on the length field of the message - - while (i < numWords) { - ret = _WaitForDataStatus(_CTRLAP_MAILBOX_TXSTATUS_OFFSET, - _CTRLAP_MAILBOX_NO_DATA_PENDING); - if (ret != _CTRLAP_MAILBOX_NO_DATA_PENDING) { - JLINK_SYS_Report1("Timed out waiting for CTRL-AP TX readiness - result: ", - ret); - return _ERR_TX; - } - - ret = JLINK_CORESIGHT_WriteDAP(_CTRLAP_MAILBOX_TXDATA_OFFSET, 1, _adacTx[i]); - if (ret < 0) { - JLINK_SYS_Report1("Failed to write CTRL-AP TX data - result: ", ret); - return _ERR_TX; - } - - i += 1; - } - - i = 0; - numWords = 2; // Minimum message length - - while (i < numWords) { - ret = _WaitForDataStatus(_CTRLAP_MAILBOX_RXSTATUS_OFFSET, - _CTRLAP_MAILBOX_DATA_PENDING); - if (ret != _CTRLAP_MAILBOX_DATA_PENDING) { - JLINK_SYS_Report1("Timed out waiting for CTRL-AP RX data - result: ", ret); - return _ERR_RX; - } - - ret = JLINK_CORESIGHT_ReadDAP(_CTRLAP_MAILBOX_RXDATA_OFFSET, 1, &data); - if (ret < 0) { - JLINK_SYS_Report1("Failed to read CTRL-AP RX data - result: ", ret); - return _ERR_RX; - } - - if (i == 1) { - // Update total length based on the message length field - numWords = 2 + (data >> 2); - } - - _adacRx[i] = data; - i += 1; - } - - if (checkReplyStatus && _adacRx[1] == 4 && _adacRx[2] != 0) { - JLINK_SYS_Report1("ADAC command failed with status: ", _adacRx[2]); - return _ERR_REPLY; - } - - return 0; -} - int ConfigTargetSettings(void) { JLINK_ExecCommand("CORESIGHT_AddAP = Index=1 Type=AHB-AP"); @@ -162,107 +9,12 @@ int ConfigTargetSettings(void) return 0; } -int ResetTarget(void) +int SetupTarget(void) { - int err; - U32 adacMajorVersion; - U32 i; - - // Select CTRL-AP bank 0, used for the READY register - JLINK_CORESIGHT_WriteDAP(JLINK_CORESIGHT_DP_REG_SELECT, 0, - (_CTRLAP_ID << 24) | (_CTRLAP_READY_BANK << 4)); - - // Wait for the READY register to indicate that the AP can be used. - err = _WaitForDataStatus(_CTRLAP_READY_OFFSET, _CTRLAP_READY); - if (err < 0) { - JLINK_SYS_Report1("Timed out waiting for CTRL-AP readiness - result: ", err); - return -1; - } - - // Select CTRL-AP bank 1, used for the MAILBOX registers for ADAC communication - JLINK_CORESIGHT_WriteDAP(JLINK_CORESIGHT_DP_REG_SELECT, 0, - (_CTRLAP_ID << 24) | (_CTRLAP_MAILBOX_BANK << 4)); - - // Extract any pre-existing data from the mailbox in case there was previously - // an aborted transaction. - _DrainMailbox(); - - // Read the ADAC version - _adacTx[0] = 0xA3000000; // Command VERSION - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x00000000; // Type 0 (ADAC version) - err = _DoAdacTransaction(0); - if (err < 0) { - return -1; - } - - adacMajorVersion = (_adacRx[2] >> 24) & 0xff; - JLINK_SYS_Report1("ADAC major version: ", adacMajorVersion); - - if (adacMajorVersion >= 2) { - // There is a very small chance that this command fails if the domain reset itself - // at the exact same time the command was issued. Therefore we retry a few times. - i = 0; - while (i < 3) { - // Reset non-essential domains - _adacTx[0] = 0xA30A0000; // Command RESET - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x00000000; // (reserved) - err = _DoAdacTransaction(1); - if (err >= 0) { - break; - } else if (err != _ERR_REPLY) { - return -1; - } - - i = i + 1; - } - - // Start the core in halted mode - _adacTx[0] = 0xA3090000; // Command START - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x01000000 | (_PROCESSOR_ID << 16); // Own processor, Flags HALT - err = _DoAdacTransaction(1); - if (err < 0) { - return -1; - } - - // Start other cores normally (will fail silently if no firmware is present) - i = 0; - while (i < _NUM_OTHER_PROCESSORS) { - _adacTx[0] = 0xA3090000; // Command START - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x00000000 | - (_OTHER_PROCESSOR_IDS[i] << 16); // Other processor, No flags - err = _DoAdacTransaction(0); - if (err < 0 && err != _ERR_REPLY) { - return -1; - } - - i = i + 1; - } - } else { - // Reset single domain via legacy implementation - _adacTx[0] = 0xA3030000; // Command RESET - _adacTx[1] = 0x00000004; // Data length 4 bytes - _adacTx[2] = 0x01000000 | (_DOMAIN_ID << 16); // Own domain, Mode HALT - err = _DoAdacTransaction(1); - if (err < 0) { - return -1; - } - } - - // Halt the CPU - JLINK_MEM_WriteU32(_DHCSR_ADDR, (_DHCSR_DBGKEY | _DHCSR_C_HALT | _DHCSR_C_DEBUGEN)); - - // Set vector catch on reset (to halt the CPU immediately after reset) - JLINK_MEM_WriteU32(_DEMCR_ADDR, (_DEMCR_VC_CORERESET | _DEMCR_TRCENA)); + JLINK_TARGET_Halt(); // Disable CPU wait JLINK_MEM_WriteU32(_CPUCONF_ADDR + _CPUCONF_CPUWAIT_OFFSET, 0); - // Clear vector catch stuff - JLINK_MEM_WriteU32(_DEMCR_ADDR, _DEMCR_TRCENA); - return 0; } diff --git a/boards/nordic/thingy52/Kconfig.defconfig b/boards/nordic/thingy52/Kconfig.defconfig index 40bdd8c6cdf43e9..9e50838b5c2ec5d 100644 --- a/boards/nordic/thingy52/Kconfig.defconfig +++ b/boards/nordic/thingy52/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_THINGY52 -config BT_CTLR - default BT - endif # BOARD_THINGY52 diff --git a/boards/nordic/thingy53/Kconfig b/boards/nordic/thingy53/Kconfig index 01b2ee7dfcff0ac..a6781f63b0e24ae 100644 --- a/boards/nordic/thingy53/Kconfig +++ b/boards/nordic/thingy53/Kconfig @@ -11,10 +11,6 @@ config THINGY53_INIT_PRIORITY if BOARD_THINGY53_NRF5340_CPUAPP || BOARD_THINGY53_NRF5340_CPUAPP_NS -config BOARD_SERIAL_BACKEND_CDC_ACM - bool "USB CDC" - default y - config DOMAIN_CPUNET_BOARD string default "thingy53/nrf5340/cpunet" diff --git a/boards/nordic/thingy53/Kconfig.defconfig b/boards/nordic/thingy53/Kconfig.defconfig index 92eac11503dbef1..d149d360f8595d9 100644 --- a/boards/nordic/thingy53/Kconfig.defconfig +++ b/boards/nordic/thingy53/Kconfig.defconfig @@ -79,66 +79,12 @@ config REGULATOR endif # !TRUSTED_EXECUTION_SECURE -if BOARD_SERIAL_BACKEND_CDC_ACM - -config USB_DEVICE_PRODUCT - default "Thingy:53 Application" - -config USB_DEVICE_VID - default 0x1915 - -config USB_DEVICE_PID - default 0x530C - -config USB_DEVICE_STACK - default y - -config USB_CDC_ACM - default y - -config UART_CONSOLE - default CONSOLE - -config USB_DEVICE_INITIALIZE_AT_BOOT - default y if !MCUBOOT - -config SHELL_BACKEND_SERIAL_CHECK_DTR - default SHELL - depends on UART_LINE_CTRL - -config UART_LINE_CTRL - default SHELL - -config USB_DEVICE_REMOTE_WAKEUP - default n - -if LOG - -# Logger cannot use itself to log -choice USB_CDC_ACM_LOG_LEVEL_CHOICE - default USB_CDC_ACM_LOG_LEVEL_OFF -endchoice - -# Set USB log level to error only -choice USB_DEVICE_LOG_LEVEL_CHOICE - default USB_DEVICE_LOG_LEVEL_ERR -endchoice - -# Wait 4000ms at startup for logging -config LOG_PROCESS_THREAD_STARTUP_DELAY_MS - default 4000 - -endif # LOG - -endif # BOARD_SERIAL_BACKEND_CDC_ACM +source "boards/common/usb/Kconfig.cdc_acm_serial.defconfig" endif # BOARD_THINGY53_NRF5340_CPUAPP || BOARD_THINGY53_NRF5340_CPUAPP_NS if BOARD_THINGY53_NRF5340_CPUNET -config BT_CTLR - default BT - config BT_ECC default BT diff --git a/boards/nordic/thingy53/thingy53_nrf5340_common.dtsi b/boards/nordic/thingy53/thingy53_nrf5340_common.dtsi index 12b7cf6c13bb6ee..72471a0c95edd62 100644 --- a/boards/nordic/thingy53/thingy53_nrf5340_common.dtsi +++ b/boards/nordic/thingy53/thingy53_nrf5340_common.dtsi @@ -9,11 +9,6 @@ / { chosen { - zephyr,console = &cdc_acm_uart; - zephyr,shell-uart = &cdc_acm_uart; - zephyr,uart-mcumgr = &cdc_acm_uart; - zephyr,bt-mon-uart = &cdc_acm_uart; - zephyr,bt-c2h-uart = &cdc_acm_uart; zephyr,bt-hci-ipc = &ipc0; zephyr,bt-hci = &bt_hci_ipc0; nordic,802154-spinel-ipc = &ipc0; @@ -316,10 +311,6 @@ edge_connector_spi: &spi4 { zephyr_udc0: &usbd { compatible = "nordic,nrf-usbd"; status = "okay"; - - cdc_acm_uart: cdc_acm_uart { - compatible = "zephyr,cdc-acm-uart"; - }; }; /* Include default memory partition configuration file */ diff --git a/boards/nordic/thingy53/thingy53_nrf5340_cpuapp.dts b/boards/nordic/thingy53/thingy53_nrf5340_cpuapp.dts index 41d287c8ebab99e..9f3d7d46674c2ef 100644 --- a/boards/nordic/thingy53/thingy53_nrf5340_cpuapp.dts +++ b/boards/nordic/thingy53/thingy53_nrf5340_cpuapp.dts @@ -7,6 +7,7 @@ /dts-v1/; #include #include "thingy53_nrf5340_common.dtsi" +#include <../boards/common/usb/cdc_acm_serial.dtsi> / { model = "Nordic Thingy53 NRF5340 Application"; diff --git a/boards/nordic/thingy53/thingy53_nrf5340_cpuapp_ns.dts b/boards/nordic/thingy53/thingy53_nrf5340_cpuapp_ns.dts index 1ac7536fb007bf5..8a754664325ba27 100644 --- a/boards/nordic/thingy53/thingy53_nrf5340_cpuapp_ns.dts +++ b/boards/nordic/thingy53/thingy53_nrf5340_cpuapp_ns.dts @@ -7,6 +7,7 @@ /dts-v1/; #include #include "thingy53_nrf5340_common.dtsi" +#include <../boards/common/usb/cdc_acm_serial.dtsi> / { model = "Nordic Thingy53 NRF5340 Application"; diff --git a/boards/norik/index.rst b/boards/norik/index.rst new file mode 100644 index 000000000000000..11d8f1353f5d02e --- /dev/null +++ b/boards/norik/index.rst @@ -0,0 +1,10 @@ +.. _boards-norik: + +Norik Systems +############# + +.. toctree:: + :maxdepth: 1 + :glob: + + **/* diff --git a/boards/norik/octopus_io_board/CMakeLists.txt b/boards/norik/octopus_io_board/CMakeLists.txt new file mode 100644 index 000000000000000..2e35c87b81db63c --- /dev/null +++ b/boards/norik/octopus_io_board/CMakeLists.txt @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Norik Systems +# SPDX-License-Identifier: Apache-2.0 + +zephyr_library() +zephyr_library_sources(board.c) diff --git a/boards/norik/octopus_io_board/Kconfig b/boards/norik/octopus_io_board/Kconfig new file mode 100644 index 000000000000000..74f296b0e3e5060 --- /dev/null +++ b/boards/norik/octopus_io_board/Kconfig @@ -0,0 +1,10 @@ +# Copyright (c) 2024 Norik Systems +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_OCTOPUS_IO_BOARD + select BOARD_LATE_INIT_HOOK + select GPIO + +module = OCTOPUS_IO_BOARD_CONTROL +module-str = Board Control +source "subsys/logging/Kconfig.template.log_config" diff --git a/boards/norik/octopus_io_board/Kconfig.defconfig b/boards/norik/octopus_io_board/Kconfig.defconfig new file mode 100644 index 000000000000000..4c00ab52ab59bd7 --- /dev/null +++ b/boards/norik/octopus_io_board/Kconfig.defconfig @@ -0,0 +1,33 @@ +# Copyright (c) 2024 Norik Systems +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_OCTOPUS_IO_BOARD + +# For the secure version of the board the firmware is linked at the beginning +# of the flash, or into the code-partition defined in DT if it is intended to +# be loaded by MCUboot. If the secure firmware is to be combined with a non- +# secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always +# be restricted to the size of its code partition. +# For the non-secure version of the board, the firmware +# must be linked into the code-partition (non-secure) defined in DT, regardless. +# Apply this configuration below by setting the Kconfig symbols used by +# the linker according to the information extracted from DT partitions. + +# Workaround for not being able to have commas in macro arguments +DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition + +config FLASH_LOAD_SIZE + default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION)) + depends on BOARD_OCTOPUS_IO_BOARD && TRUSTED_EXECUTION_SECURE + +if BOARD_OCTOPUS_IO_BOARD_NRF9160_NS + +config FLASH_LOAD_OFFSET + default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION)) + +config FLASH_LOAD_SIZE + default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION)) + +endif # BOARD_OCTOPUS_IO_BOARD_NRF9160_NS + +endif # BOARD_OCTOPUS_IO_BOARD diff --git a/boards/norik/octopus_io_board/Kconfig.octopus_io_board b/boards/norik/octopus_io_board/Kconfig.octopus_io_board new file mode 100644 index 000000000000000..1b24864afda6493 --- /dev/null +++ b/boards/norik/octopus_io_board/Kconfig.octopus_io_board @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Norik Systems +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_OCTOPUS_IO_BOARD + select SOC_NRF9160_SICA diff --git a/boards/norik/octopus_io_board/board.c b/boards/norik/octopus_io_board/board.c new file mode 100644 index 000000000000000..901bdae01d86a9d --- /dev/null +++ b/boards/norik/octopus_io_board/board.c @@ -0,0 +1,32 @@ +/* + * Copyright (c) 2024 Norik Systems + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include + +LOG_MODULE_REGISTER(board_control, CONFIG_OCTOPUS_IO_BOARD_CONTROL_LOG_LEVEL); + +#define SIM_SELECT_NODE DT_PATH(sim_select) + +void board_late_init_hook(void) +{ + const struct gpio_dt_spec simctrl = GPIO_DT_SPEC_GET(DT_PATH(sim_select), sim_gpios); + + if (!gpio_is_ready_dt(&simctrl)) { + LOG_ERR("SIM select GPIO not available"); + return; + } + + if (DT_ENUM_IDX(SIM_SELECT_NODE, sim) == 0) { + (void)gpio_pin_configure_dt(&simctrl, GPIO_OUTPUT_LOW); + LOG_INF("On-board SIM selected"); + } else { + (void)gpio_pin_configure_dt(&simctrl, GPIO_OUTPUT_HIGH); + LOG_INF("External SIM selected"); + } +} diff --git a/boards/norik/octopus_io_board/board.cmake b/boards/norik/octopus_io_board/board.cmake new file mode 100644 index 000000000000000..e1ae7b4e9b23736 --- /dev/null +++ b/boards/norik/octopus_io_board/board.cmake @@ -0,0 +1,6 @@ +# Copyright (c) 2024 Norik Systems +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(jlink "--device=nRF9160_xxAA" "--speed=4000") +include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/norik/octopus_io_board/board.yml b/boards/norik/octopus_io_board/board.yml new file mode 100644 index 000000000000000..fe114911b3ab8d7 --- /dev/null +++ b/boards/norik/octopus_io_board/board.yml @@ -0,0 +1,8 @@ +board: + name: octopus_io_board + full_name: Octopus IO-Board + vendor: norik + socs: + - name: nrf9160 + variants: + - name: 'ns' diff --git a/boards/norik/octopus_io_board/doc/img/octopus_io_board.webp b/boards/norik/octopus_io_board/doc/img/octopus_io_board.webp new file mode 100644 index 000000000000000..ea170c7e3c012c4 Binary files /dev/null and b/boards/norik/octopus_io_board/doc/img/octopus_io_board.webp differ diff --git a/boards/norik/octopus_io_board/doc/index.rst b/boards/norik/octopus_io_board/doc/index.rst new file mode 100644 index 000000000000000..088a3b936d38f0b --- /dev/null +++ b/boards/norik/octopus_io_board/doc/index.rst @@ -0,0 +1,146 @@ +.. zephyr:board:: octopus_io_board + +Overview +******** + +Octopus IO-Board is an expansion to the Octopus SoM, which is built around the nRF9160 SiP +offering NB-IoT and LTE-M connectivity, GPS and accelerometer. Octopus IO-Board expands +the capabilities of the Octopus SoM by providing additional peripherals and interfaces for +development and prototyping of low-power IoT applications. + +nRF9160 SiP contains ARM Cortex-M33 application processor and the +following devices: + +* :abbr:`ADC (Analog to Digital Converter)` +* CLOCK +* FLASH +* :abbr:`GPIO (General Purpose Input Output)` +* :abbr:`I2C (Inter-Integrated Circuit)` +* :abbr:`MPU (Memory Protection Unit)` +* :abbr:`NVIC (Nested Vectored Interrupt Controller)` +* :abbr:`PWM (Pulse Width Modulation)` +* :abbr:`RTC (nRF RTC System Clock)` +* Segger RTT (RTT Console) +* :abbr:`SPI (Serial Peripheral Interface)` +* :abbr:`UARTE (Universal asynchronous receiver-transmitter with EasyDMA)` +* :abbr:`WDT (Watchdog Timer)` +* :abbr:`IDAU (Implementation Defined Attribution Unit)` + +Octopus IO-Board offers the following features: + +* Battery charger +* USB-C for power +* Solar charger +* Alkaline battery input +* LDO regulator to power Octopus SoM and peripherals +* Battery monitoring using ADC +* 64 Mbit SPI NOR flash +* Dedicated ADC, GPIO, I2C, SPI and UARTE pins for expansion +* Exposed headers for current measurements +* Nano SIM connector +* Tag-Connect TC2030-IDC 6-pin connector for SWD programming and debugging +* 2x3 pinheader for SWD programming and debugging + +More information about the board can be found at the `Octopus IO-Board Product Page`_ +and in the `Octopus IO-Board Documentation`_. + +Hardware +******** + +Connections and IOs +=================== + +The Octopus IO-Board features multiple dedicated pin headers for peripherals: + +* 3x I2C0 bus +* 2x SPI0 bus +* 3x I2C1/SPI1 bus (selectable) +* 1x UARTE0 bus +* 1x Analog input (5 input pins) +* 1x GPIO (7 I/O pins) + +The I2C1/SPI1 bus is selectable by the user by cutting/soldering SB8 and SB9 solder bridges and configuring the bus in the device tree. + +The GPIO pin header provides 7 I/O pins, which can be used as digital input/output. Some of them also serve as chip selects for SPI peripherals. + +Power supply +============ + +The Octopus IO-Board can be powered from the following sources: + +* USB-C connector +* Solar cell +* Alkaline battery +* Li-Po battery + +When powered from USB-C or solar cell, the board can charge the Li-Po battery. The battery voltage can be monitored using ADC which can +provide information about the battery State of charge (SOC). + +When powered from alkaline battery, the user needs to set switch SW1 to ALK position. This ensures that the Li-Ion battery is not charged from the alkaline battery. + +The board has a built-in LDO regulator that is used to power the Octopus SoM and peripherals. The EN2 pin can be used to enable/disable output 2 of the LDO regulator. +This can be used to power off peripherals to save power when they are not needed. + +The board also has multiple built-in test points for measuring current consumption of the board, which enables the user to measure and optimize the power consumption of the board. + +Programming and Debugging +************************* + +Norik Octopus IO-Board can be programmed and debugged using the Tag-Connect TC2030-IDC 6-pin connector or 6-pin SWD pinheader. + +Building an application +======================= + +In most case you'll need to use ``octopus_io_board/nrf9160/ns`` board target for building examples. +Some examples don't require non secure mode and can be built with ``octopus_io_board/nrf9160`` board target. + +Flashing +======== +Refer to the instruction in the :ref:`nordic_segger` page to install and +configure all the necessary software. + +Here is an example for the Hello World application. + +First, run your favorite terminal program to listen for output. + +.. code-block:: console + + $ minicom /dev/ 115200 + +Replace with the port where the Octopus IO-Board can be found. For example, under Linux, /dev/ttyACM0. + +Then build and flash the application in the usual way. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: octopus_io_board/nrf9160 + :goals: build flash + +To build and flash the application in non-secure mode, use the following command: + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: octopus_io_board/nrf9160/ns + :goals: build flash + +Debugging +========= +Refer to the instruction in the :ref:`nordic_segger` page for information on +debugging. + +Testing the on-board LED +======================== +Use the :zephyr:code-sample:`blinky` to test the on-board LED. Build and flash the example to make sure Zephyr is running correctly on your board. + +.. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: octopus_io_board/nrf9160 + :goals: build flash + +References +********** + +.. target-notes:: + +.. _Octopus IO-Board Product Page: https://www.norik.com/octopus-io-board/ +.. _Octopus IO-Board Documentation: https://www.norik.com/wp-content/uploads/2024/09/Octopus_IO-Board_Datasheet.pdf diff --git a/boards/norik/octopus_io_board/dts/bindings/norik,sim_select.yaml b/boards/norik/octopus_io_board/dts/bindings/norik,sim_select.yaml new file mode 100644 index 000000000000000..2745afaac9434b2 --- /dev/null +++ b/boards/norik/octopus_io_board/dts/bindings/norik,sim_select.yaml @@ -0,0 +1,26 @@ +# Copyright (c) 2024 Norik Systems +# SPDX-License-Identifier: Apache-2.0 + +description: | + The Octopus SoM provides the user 2 options for connecting + a SIM card to the nRF9160. Option one is to use on-board eSIM or + external nano SIM. Which SIM is used can be selected using the 'sim' + property of the 'sim_select' dt node. + +compatible: "norik,sim_select" + +include: base.yaml + +properties: + sim-gpios: + type: phandle-array + required: true + description: Pin used to select which SIM is used + + sim: + type: string + required: true + enum: + - "on-board" + - "external" + description: SIM choice (on-board eSIM or external nano SIM) diff --git a/boards/norik/octopus_io_board/octopus_io_board_common-pinctrl.dtsi b/boards/norik/octopus_io_board/octopus_io_board_common-pinctrl.dtsi new file mode 100644 index 000000000000000..8f46475d246a4d4 --- /dev/null +++ b/boards/norik/octopus_io_board/octopus_io_board_common-pinctrl.dtsi @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2024 Norik Systems + * SPDX-License-Identifier: Apache-2.0 + */ + +&pinctrl { + i2c0_default: i2c0_default { + group1 { + psels = , + ; + }; + }; + + i2c0_sleep: i2c0_sleep { + group1 { + psels = , + ; + low-power-enable; + }; + }; + + i2c1_default: i2c1_default { + group1 { + psels = , + ; + }; + }; + + i2c1_sleep: i2c1_sleep { + group1 { + psels = , + ; + low-power-enable; + }; + }; +}; diff --git a/boards/norik/octopus_io_board/octopus_io_board_common.dtsi b/boards/norik/octopus_io_board/octopus_io_board_common.dtsi new file mode 100644 index 000000000000000..f73a0e20b035652 --- /dev/null +++ b/boards/norik/octopus_io_board/octopus_io_board_common.dtsi @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2024 Norik Systems + * SPDX-License-Identifier: Apache-2.0 + */ +#include "octopus_io_board_common-pinctrl.dtsi" +#include "../octopus_som/octopus_som_common.dtsi" + +/ { + model = "Norik Octopus IO-Board"; + compatible = "norik,octopus-io-board"; + + chosen { + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,uart-mcumgr = &uart0; + }; + + /* These aliases are provided for compatibility with samples */ + aliases { + watchdog0 = &wdt0; + }; +}; + +&i2c1 { + compatible = "nordic,nrf-twim"; + status = "okay"; + pinctrl-0 = <&i2c0_default>; + pinctrl-1 = <&i2c0_sleep>; + pinctrl-names = "default", "sleep"; + + bq25180: bq25180@6a { + compatible = "ti,bq25180"; + status = "okay"; + reg = <0x6a>; + constant-charge-current-max-microamp = <10000>; + }; +}; + +&spi3 { + status = "okay"; + cs-gpios = <&gpio0 11 GPIO_ACTIVE_LOW>,<&gpio0 5 GPIO_ACTIVE_LOW>; + + adxl362: adxl362@0 { + compatible = "adi,adxl362"; + spi-max-frequency = <8000000>; + reg = <0>; + int1-gpios = <&gpio0 12 0>; + }; + + w25q64: w25q64@1 { + compatible = "jedec,spi-nor"; + status = "okay"; + reg = <1>; + spi-max-frequency = <8000000>; + jedec-id = [ef 40 17]; + size = <0x4000000>; + has-dpd; + t-enter-dpd = <3500>; + t-exit-dpd = <3500>; + }; +}; diff --git a/boards/norik/octopus_io_board/octopus_io_board_defconfig b/boards/norik/octopus_io_board/octopus_io_board_defconfig new file mode 100644 index 000000000000000..c486d8323821a2c --- /dev/null +++ b/boards/norik/octopus_io_board/octopus_io_board_defconfig @@ -0,0 +1,20 @@ +# SPDX-License-Identifier: Apache-2.0 + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable TrustZone-M +CONFIG_ARM_TRUSTZONE_M=y + +# Enable GPIO +CONFIG_GPIO=y + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y diff --git a/boards/norik/octopus_io_board/octopus_io_board_nrf9160.dts b/boards/norik/octopus_io_board/octopus_io_board_nrf9160.dts new file mode 100644 index 000000000000000..aae7cb1f345fe53 --- /dev/null +++ b/boards/norik/octopus_io_board/octopus_io_board_nrf9160.dts @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2024 Norik Systems + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include "octopus_io_board_common.dtsi" + +/ { + chosen { + zephyr,sram = &sram0_s; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,sram-secure-partition = &sram0_s; + zephyr,sram-non-secure-partition = &sram0_ns; + }; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; +}; diff --git a/boards/norik/octopus_io_board/octopus_io_board_nrf9160.yaml b/boards/norik/octopus_io_board/octopus_io_board_nrf9160.yaml new file mode 100644 index 000000000000000..e91c1da14b57d6a --- /dev/null +++ b/boards/norik/octopus_io_board/octopus_io_board_nrf9160.yaml @@ -0,0 +1,17 @@ +identifier: octopus_io_board/nrf9160 +name: Norik Octopus IO-Board +type: mcu +arch: arm +ram: 88 +flash: 1024 +toolchain: + - zephyr + - gnuarmemb + - xtools +supported: + - gpio + - i2c + - spi + - pwm + - watchdog +vendor: norik diff --git a/boards/norik/octopus_io_board/octopus_io_board_nrf9160_ns.dts b/boards/norik/octopus_io_board/octopus_io_board_nrf9160_ns.dts new file mode 100644 index 000000000000000..fa24ffbf56500c1 --- /dev/null +++ b/boards/norik/octopus_io_board/octopus_io_board_nrf9160_ns.dts @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2024 Norik Systems + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include "octopus_io_board_common.dtsi" + +/ { + chosen { + zephyr,flash = &flash0; + zephyr,sram = &sram0_ns; + zephyr,code-partition = &slot0_ns_partition; + }; +}; + +/* Disable UART1, because it is used by default in TF-M */ + +&uart1 { + status = "disabled"; +}; diff --git a/boards/norik/octopus_io_board/octopus_io_board_nrf9160_ns.yaml b/boards/norik/octopus_io_board/octopus_io_board_nrf9160_ns.yaml new file mode 100644 index 000000000000000..675c316f6c28cf7 --- /dev/null +++ b/boards/norik/octopus_io_board/octopus_io_board_nrf9160_ns.yaml @@ -0,0 +1,17 @@ +identifier: octopus_io_board/nrf9160/ns +name: Norik Octopus IO-Board Non-Secure +type: mcu +arch: arm +ram: 128 +flash: 192 +toolchain: + - zephyr + - gnuarmemb + - xtools +supported: + - gpio + - i2c + - spi + - pwm + - watchdog +vendor: norik diff --git a/boards/norik/octopus_io_board/octopus_io_board_nrf9160_ns_defconfig b/boards/norik/octopus_io_board/octopus_io_board_nrf9160_ns_defconfig new file mode 100644 index 000000000000000..0f0b3336db65f11 --- /dev/null +++ b/boards/norik/octopus_io_board/octopus_io_board_nrf9160_ns_defconfig @@ -0,0 +1,23 @@ +# SPDX-License-Identifier: Apache-2.0 + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable TrustZone-M +CONFIG_ARM_TRUSTZONE_M=y + +# This Board implies building Non-Secure firmware +CONFIG_TRUSTED_EXECUTION_NONSECURE=y + +# Enable GPIO +CONFIG_GPIO=y + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y diff --git a/boards/norik/octopus_som/CMakeLists.txt b/boards/norik/octopus_som/CMakeLists.txt new file mode 100644 index 000000000000000..2e35c87b81db63c --- /dev/null +++ b/boards/norik/octopus_som/CMakeLists.txt @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Norik Systems +# SPDX-License-Identifier: Apache-2.0 + +zephyr_library() +zephyr_library_sources(board.c) diff --git a/boards/norik/octopus_som/Kconfig b/boards/norik/octopus_som/Kconfig new file mode 100644 index 000000000000000..090a8e9af85ea5f --- /dev/null +++ b/boards/norik/octopus_som/Kconfig @@ -0,0 +1,10 @@ +# Copyright (c) 2024 Norik Systems +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_OCTOPUS_SOM + select BOARD_LATE_INIT_HOOK + select GPIO + +module = OCTOPUS_SOM_CONTROL +module-str = Board Control +source "subsys/logging/Kconfig.template.log_config" diff --git a/boards/norik/octopus_som/Kconfig.defconfig b/boards/norik/octopus_som/Kconfig.defconfig new file mode 100644 index 000000000000000..6fe9d1618a5b1c9 --- /dev/null +++ b/boards/norik/octopus_som/Kconfig.defconfig @@ -0,0 +1,33 @@ +# Copyright (c) 2024 Norik Systems +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_OCTOPUS_SOM + +# For the secure version of the board the firmware is linked at the beginning +# of the flash, or into the code-partition defined in DT if it is intended to +# be loaded by MCUboot. If the secure firmware is to be combined with a non- +# secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always +# be restricted to the size of its code partition. +# For the non-secure version of the board, the firmware +# must be linked into the code-partition (non-secure) defined in DT, regardless. +# Apply this configuration below by setting the Kconfig symbols used by +# the linker according to the information extracted from DT partitions. + +# Workaround for not being able to have commas in macro arguments +DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition + +config FLASH_LOAD_SIZE + default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION)) + depends on BOARD_OCTOPUS_SOM && TRUSTED_EXECUTION_SECURE + +if BOARD_OCTOPUS_SOM_NRF9160_NS + +config FLASH_LOAD_OFFSET + default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION)) + +config FLASH_LOAD_SIZE + default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION)) + +endif # BOARD_OCTOPUS_SOM_NRF9160_NS + +endif # BOARD_OCTOPUS_SOM diff --git a/boards/norik/octopus_som/Kconfig.octopus_som b/boards/norik/octopus_som/Kconfig.octopus_som new file mode 100644 index 000000000000000..c249d541948f7a2 --- /dev/null +++ b/boards/norik/octopus_som/Kconfig.octopus_som @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Norik Systems +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_OCTOPUS_SOM + select SOC_NRF9160_SICA diff --git a/boards/norik/octopus_som/board.c b/boards/norik/octopus_som/board.c new file mode 100644 index 000000000000000..c741ca686aab0ad --- /dev/null +++ b/boards/norik/octopus_som/board.c @@ -0,0 +1,32 @@ +/* + * Copyright (c) 2024 Norik Systems + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include + +LOG_MODULE_REGISTER(board_control, CONFIG_OCTOPUS_SOM_CONTROL_LOG_LEVEL); + +#define SIM_SELECT_NODE DT_PATH(sim_select) + +void board_late_init_hook(void) +{ + const struct gpio_dt_spec simctrl = GPIO_DT_SPEC_GET(DT_PATH(sim_select), sim_gpios); + + if (!gpio_is_ready_dt(&simctrl)) { + LOG_ERR("SIM select GPIO not available"); + return; + } + + if (DT_ENUM_IDX(SIM_SELECT_NODE, sim) == 0) { + (void)gpio_pin_configure_dt(&simctrl, GPIO_OUTPUT_LOW); + LOG_INF("On-board SIM selected"); + } else { + (void)gpio_pin_configure_dt(&simctrl, GPIO_OUTPUT_HIGH); + LOG_INF("External SIM selected"); + } +} diff --git a/boards/norik/octopus_som/board.cmake b/boards/norik/octopus_som/board.cmake new file mode 100644 index 000000000000000..e1ae7b4e9b23736 --- /dev/null +++ b/boards/norik/octopus_som/board.cmake @@ -0,0 +1,6 @@ +# Copyright (c) 2024 Norik Systems +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(jlink "--device=nRF9160_xxAA" "--speed=4000") +include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/norik/octopus_som/board.yml b/boards/norik/octopus_som/board.yml new file mode 100644 index 000000000000000..efd094baea7658b --- /dev/null +++ b/boards/norik/octopus_som/board.yml @@ -0,0 +1,8 @@ +board: + name: octopus_som + full_name: Octopus SoM + vendor: norik + socs: + - name: nrf9160 + variants: + - name: 'ns' diff --git a/boards/norik/octopus_som/doc/img/octopus_som.webp b/boards/norik/octopus_som/doc/img/octopus_som.webp new file mode 100644 index 000000000000000..9bd8e8ed2ddd5ff Binary files /dev/null and b/boards/norik/octopus_som/doc/img/octopus_som.webp differ diff --git a/boards/norik/octopus_som/doc/index.rst b/boards/norik/octopus_som/doc/index.rst new file mode 100644 index 000000000000000..1d3790a04d701b1 --- /dev/null +++ b/boards/norik/octopus_som/doc/index.rst @@ -0,0 +1,125 @@ +.. zephyr:board:: octopus_som + +Overview +******** + +Octopus SoM is a System on Module (SoM) built around the nRF9160 SiP +offering NB-IoT and LTE-M connectivity, GPS and accelerometer. +It supports on board eSIM and external nano SIM connector. It's purpose +is to provide flexible hardware platform for IoT applications. + +nRF9160 SiP contains ARM Cortex-M33 application processor and the +following devices: + +* :abbr:`ADC (Analog to Digital Converter)` +* CLOCK +* FLASH +* :abbr:`GPIO (General Purpose Input Output)` +* :abbr:`I2C (Inter-Integrated Circuit)` +* :abbr:`MPU (Memory Protection Unit)` +* :abbr:`NVIC (Nested Vectored Interrupt Controller)` +* :abbr:`PWM (Pulse Width Modulation)` +* :abbr:`RTC (nRF RTC System Clock)` +* Segger RTT (RTT Console) +* :abbr:`SPI (Serial Peripheral Interface)` +* :abbr:`UARTE (Universal asynchronous receiver-transmitter with EasyDMA)` +* :abbr:`WDT (Watchdog Timer)` +* :abbr:`IDAU (Implementation Defined Attribution Unit)` + +More information about the board can be found at the `Octopus SoM Product Page`_ and +in the `Octopus SoM Documentation`_. + +Hardware +******** + +The ``octopus_som/nrf9160`` and ``octopus_som/nrf9160/ns`` board targets support the +following hardware features: + ++-----------+------------+----------------------+ +| Interface | Controller | Driver/Component | ++===========+============+======================+ +| ADC | on-chip | adc | ++-----------+------------+----------------------+ +| CLOCK | on-chip | clock_control | ++-----------+------------+----------------------+ +| FLASH | on-chip | flash | ++-----------+------------+----------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+----------------------+ +| I2C(M) | on-chip | i2c | ++-----------+------------+----------------------+ +| MPU | on-chip | arch/arm | ++-----------+------------+----------------------+ +| NVIC | on-chip | arch/arm | ++-----------+------------+----------------------+ +| PWM | on-chip | pwm | ++-----------+------------+----------------------+ +| RTC | on-chip | system clock | ++-----------+------------+----------------------+ +| RTT | Segger | console | ++-----------+------------+----------------------+ +| SPI(M/S) | on-chip | spi | ++-----------+------------+----------------------+ +| SPU | on-chip | system protection | ++-----------+------------+----------------------+ +| UARTE | on-chip | serial | ++-----------+------------+----------------------+ +| WDT | on-chip | watchdog | ++-----------+------------+----------------------+ +| ACCEL | Analog | adxl362 | ++-----------+------------+----------------------+ + +Connections and IOs +=================== + +Accelerometer +------------- +* MISO = P0.05 +* MOSI = P0.09 +* SCK = P0.10 +* CS = P0.05 +* INT1 = P0.12 + +LED +--- +* LED1 (green) = P0.07 + +SIM select switch +----------------- +* Select = P0.25 + +Programming and Debugging +************************* + +Norik Octopus SoM can be programmed and debugged using the exposed SWD pins. + +Building an application +======================= + +In most case you'll need to use ``octopus_som/nrf9160/ns`` board target for building examples. +Some examples don't require non secure mode and can be built with ``octopus_som/nrf9160`` board target. + +Flashing +======== +Refer to the instruction in the :ref:`nordic_segger` page to install and +configure all the necessary software. + +Use the :zephyr:code-sample:`blinky` sample to test if Zephyr is running correctly on your board. + +.. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: octopus_som/nrf9160 + :goals: build flash + +Debugging +========= +Refer to the instruction in the :ref:`nordic_segger` page for information on +debugging. + +References +********** + +.. target-notes:: + +.. _Octopus SoM Product Page: https://www.norik.com/octopus-som/ +.. _Octopus SoM Documentation: https://www.norik.com/wp-content/uploads/2024/09/Octopus_SoM_Datasheet.pdf diff --git a/boards/norik/octopus_som/dts/bindings/norik,sim_select.yaml b/boards/norik/octopus_som/dts/bindings/norik,sim_select.yaml new file mode 100644 index 000000000000000..2745afaac9434b2 --- /dev/null +++ b/boards/norik/octopus_som/dts/bindings/norik,sim_select.yaml @@ -0,0 +1,26 @@ +# Copyright (c) 2024 Norik Systems +# SPDX-License-Identifier: Apache-2.0 + +description: | + The Octopus SoM provides the user 2 options for connecting + a SIM card to the nRF9160. Option one is to use on-board eSIM or + external nano SIM. Which SIM is used can be selected using the 'sim' + property of the 'sim_select' dt node. + +compatible: "norik,sim_select" + +include: base.yaml + +properties: + sim-gpios: + type: phandle-array + required: true + description: Pin used to select which SIM is used + + sim: + type: string + required: true + enum: + - "on-board" + - "external" + description: SIM choice (on-board eSIM or external nano SIM) diff --git a/boards/norik/octopus_som/octopus_som_common-pinctrl.dtsi b/boards/norik/octopus_som/octopus_som_common-pinctrl.dtsi new file mode 100644 index 000000000000000..52e65b6302c9d36 --- /dev/null +++ b/boards/norik/octopus_som/octopus_som_common-pinctrl.dtsi @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2024 Norik Systems + * SPDX-License-Identifier: Apache-2.0 + */ + +&pinctrl { + uart0_default: uart0_default { + group1 { + psels = , + ; + }; + }; + + uart0_sleep: uart0_sleep { + group1 { + psels = , + ; + low-power-enable; + }; + }; + + pwm0_default: pwm0_default { + group1 { + psels = ; + }; + }; + + pwm0_sleep: pwm0_sleep { + group1 { + psels = ; + low-power-enable; + }; + }; + + spi3_default: spi3_default { + group1 { + psels = , + , + ; + }; + }; + + spi3_sleep: spi3_sleep { + group1 { + psels = , + , + ; + low-power-enable; + }; + }; +}; diff --git a/boards/norik/octopus_som/octopus_som_common.dtsi b/boards/norik/octopus_som/octopus_som_common.dtsi new file mode 100644 index 000000000000000..538dfa3c0ec45ff --- /dev/null +++ b/boards/norik/octopus_som/octopus_som_common.dtsi @@ -0,0 +1,94 @@ +/* + * Copyright (c) 2024 Norik Systems + * SPDX-License-Identifier: Apache-2.0 + */ +#include "octopus_som_common-pinctrl.dtsi" + +/ { + model = "Norik Octopus SoM"; + compatible = "norik,octopus-som"; + + chosen { + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,uart-mcumgr = &uart0; + }; + + leds { + compatible = "gpio-leds"; + + led0: led_0 { + gpios = <&gpio0 7 0>; + label = "Green LED 1"; + }; + + }; + + pwmleds { + compatible = "pwm-leds"; + + pwm_led0: pwm_led_0 { + pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>; + }; + }; + + sim_select: sim_select { + compatible = "norik,sim_select"; + sim-gpios= <&gpio0 25 GPIO_ACTIVE_HIGH>; + sim = "external"; + }; + + /* These aliases are provided for compatibility with samples */ + aliases { + led0 = &led0; + pwm-led0 = &pwm_led0; + watchdog0 = &wdt0; + accel0 = &adxl362; + }; +}; + +&adc { + status = "okay"; +}; + +&gpiote { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-1 = <&uart0_sleep>; + pinctrl-names = "default", "sleep"; +}; + +&pwm0 { + status = "okay"; + pinctrl-0 = <&pwm0_default>; + pinctrl-1 = <&pwm0_sleep>; + pinctrl-names = "default", "sleep"; +}; + +&spi3 { + compatible = "nordic,nrf-spim"; + status = "okay"; + cs-gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&spi3_default>; + pinctrl-1 = <&spi3_sleep>; + pinctrl-names = "default", "sleep"; + + adxl362: adxl362@0 { + compatible = "adi,adxl362"; + spi-max-frequency = <8000000>; + reg = <0>; + int1-gpios = <&gpio0 12 0>; + }; +}; + +/* Include default memory partition configuration file */ +#include diff --git a/boards/norik/octopus_som/octopus_som_defconfig b/boards/norik/octopus_som/octopus_som_defconfig new file mode 100644 index 000000000000000..c486d8323821a2c --- /dev/null +++ b/boards/norik/octopus_som/octopus_som_defconfig @@ -0,0 +1,20 @@ +# SPDX-License-Identifier: Apache-2.0 + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable TrustZone-M +CONFIG_ARM_TRUSTZONE_M=y + +# Enable GPIO +CONFIG_GPIO=y + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y diff --git a/boards/norik/octopus_som/octopus_som_nrf9160.dts b/boards/norik/octopus_som/octopus_som_nrf9160.dts new file mode 100644 index 000000000000000..b0e9f77fe0db515 --- /dev/null +++ b/boards/norik/octopus_som/octopus_som_nrf9160.dts @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2024 Norik Systems + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include "octopus_som_common.dtsi" + +/ { + chosen { + zephyr,sram = &sram0_s; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,sram-secure-partition = &sram0_s; + zephyr,sram-non-secure-partition = &sram0_ns; + }; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; +}; diff --git a/boards/norik/octopus_som/octopus_som_nrf9160.yaml b/boards/norik/octopus_som/octopus_som_nrf9160.yaml new file mode 100644 index 000000000000000..44a13234b8afa72 --- /dev/null +++ b/boards/norik/octopus_som/octopus_som_nrf9160.yaml @@ -0,0 +1,17 @@ +identifier: octopus_som/nrf9160 +name: Norik Octopus SoM +type: mcu +arch: arm +ram: 88 +flash: 1024 +toolchain: + - zephyr + - gnuarmemb + - xtools +supported: + - gpio + - i2c + - spi + - pwm + - watchdog +vendor: norik diff --git a/boards/norik/octopus_som/octopus_som_nrf9160_ns.dts b/boards/norik/octopus_som/octopus_som_nrf9160_ns.dts new file mode 100644 index 000000000000000..3cd80c2ca33a62d --- /dev/null +++ b/boards/norik/octopus_som/octopus_som_nrf9160_ns.dts @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2024 Norik Systems + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include "octopus_som_common.dtsi" + +/ { + chosen { + zephyr,flash = &flash0; + zephyr,sram = &sram0_ns_app; + zephyr,code-partition = &slot0_ns_partition; + }; +}; diff --git a/boards/norik/octopus_som/octopus_som_nrf9160_ns.yaml b/boards/norik/octopus_som/octopus_som_nrf9160_ns.yaml new file mode 100644 index 000000000000000..85bb40d75ab196d --- /dev/null +++ b/boards/norik/octopus_som/octopus_som_nrf9160_ns.yaml @@ -0,0 +1,17 @@ +identifier: octopus_som/nrf9160/ns +name: Norik Octopus SoM Non-Secure +type: mcu +arch: arm +ram: 128 +flash: 192 +toolchain: + - zephyr + - gnuarmemb + - xtools +supported: + - gpio + - i2c + - spi + - pwm + - watchdog +vendor: norik diff --git a/boards/norik/octopus_som/octopus_som_nrf9160_ns_defconfig b/boards/norik/octopus_som/octopus_som_nrf9160_ns_defconfig new file mode 100644 index 000000000000000..0f0b3336db65f11 --- /dev/null +++ b/boards/norik/octopus_som/octopus_som_nrf9160_ns_defconfig @@ -0,0 +1,23 @@ +# SPDX-License-Identifier: Apache-2.0 + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable TrustZone-M +CONFIG_ARM_TRUSTZONE_M=y + +# This Board implies building Non-Secure firmware +CONFIG_TRUSTED_EXECUTION_NONSECURE=y + +# Enable GPIO +CONFIG_GPIO=y + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y diff --git a/boards/nxp/frdm_k22f/frdm_k22f.dts b/boards/nxp/frdm_k22f/frdm_k22f.dts index 3a927b3de6d2d31..69439718a36de0e 100644 --- a/boards/nxp/frdm_k22f/frdm_k22f.dts +++ b/boards/nxp/frdm_k22f/frdm_k22f.dts @@ -153,7 +153,7 @@ arduino_spi: &spi0 { &ftm0 { status = "okay"; - compatible = "nxp,kinetis-ftm-pwm"; + compatible = "nxp,ftm-pwm"; #pwm-cells = <3>; pinctrl-0 = <&ftm0_default>; pinctrl-names = "default"; diff --git a/boards/nxp/frdm_k22f/frdm_k22f.yaml b/boards/nxp/frdm_k22f/frdm_k22f.yaml index caad4fe851938eb..5354f6fb724aa88 100644 --- a/boards/nxp/frdm_k22f/frdm_k22f.yaml +++ b/boards/nxp/frdm_k22f/frdm_k22f.yaml @@ -12,6 +12,7 @@ supported: - arduino_i2c - arduino_spi - dac + - flash - gpio - i2c - nvs diff --git a/boards/nxp/frdm_k64f/frdm_k64f.dts b/boards/nxp/frdm_k64f/frdm_k64f.dts index 9cb864ccf389755..100dd6e69dc99f3 100644 --- a/boards/nxp/frdm_k64f/frdm_k64f.dts +++ b/boards/nxp/frdm_k64f/frdm_k64f.dts @@ -172,7 +172,7 @@ arduino_spi: &spi0 { &ftm0 { status = "okay"; - compatible = "nxp,kinetis-ftm-pwm"; + compatible = "nxp,ftm-pwm"; #pwm-cells = <3>; pinctrl-0 = <&ftm0_default>; pinctrl-names = "default"; @@ -181,7 +181,7 @@ arduino_spi: &spi0 { &ftm3 { status = "okay"; - compatible = "nxp,kinetis-ftm-pwm"; + compatible = "nxp,ftm-pwm"; #pwm-cells = <3>; pinctrl-0 = <&ftm3_default>; pinctrl-names = "default"; diff --git a/boards/nxp/frdm_k64f/frdm_k64f.yaml b/boards/nxp/frdm_k64f/frdm_k64f.yaml index ca78929f69e129a..578ac4edd0d9bf9 100644 --- a/boards/nxp/frdm_k64f/frdm_k64f.yaml +++ b/boards/nxp/frdm_k64f/frdm_k64f.yaml @@ -18,6 +18,7 @@ supported: - counter - dac - dma + - flash - gpio - i2c - netif:eth diff --git a/boards/nxp/frdm_k82f/frdm_k82f.dts b/boards/nxp/frdm_k82f/frdm_k82f.dts index a221b53e24d6b8c..d28c32e51275160 100644 --- a/boards/nxp/frdm_k82f/frdm_k82f.dts +++ b/boards/nxp/frdm_k82f/frdm_k82f.dts @@ -206,7 +206,7 @@ &ftm3 { status = "okay"; - compatible = "nxp,kinetis-ftm-pwm"; + compatible = "nxp,ftm-pwm"; #pwm-cells = <3>; pinctrl-0 = <&ftm3_default>; pinctrl-names = "default"; diff --git a/boards/nxp/frdm_k82f/frdm_k82f.yaml b/boards/nxp/frdm_k82f/frdm_k82f.yaml index 49480e2404b1422..2a4c29652cbbcc2 100644 --- a/boards/nxp/frdm_k82f/frdm_k82f.yaml +++ b/boards/nxp/frdm_k82f/frdm_k82f.yaml @@ -15,6 +15,7 @@ supported: - arduino_spi - counter - dma + - flash - gpio - i2c - nvs diff --git a/boards/nxp/frdm_ke15z/frdm_ke15z.yaml b/boards/nxp/frdm_ke15z/frdm_ke15z.yaml index 9a2a7ac4b272b91..bb9212fc7b55d24 100644 --- a/boards/nxp/frdm_ke15z/frdm_ke15z.yaml +++ b/boards/nxp/frdm_ke15z/frdm_ke15z.yaml @@ -9,5 +9,6 @@ toolchain: flash: 256 ram: 24 supported: + - flash - gpio - uart diff --git a/boards/nxp/frdm_ke17z/frdm_ke17z.dts b/boards/nxp/frdm_ke17z/frdm_ke17z.dts index 9b5e3aaa4b8adca..08590e6ee66e72b 100644 --- a/boards/nxp/frdm_ke17z/frdm_ke17z.dts +++ b/boards/nxp/frdm_ke17z/frdm_ke17z.dts @@ -126,7 +126,7 @@ &ftm2 { status = "okay"; - compatible = "nxp,kinetis-ftm-pwm"; + compatible = "nxp,ftm-pwm"; #pwm-cells = <3>; clocks = <&scg KINETIS_SCG_SIRC_CLK>; prescaler = <128>; diff --git a/boards/nxp/frdm_ke17z/frdm_ke17z.yaml b/boards/nxp/frdm_ke17z/frdm_ke17z.yaml index f40693574396c64..17ccc33e8713a63 100644 --- a/boards/nxp/frdm_ke17z/frdm_ke17z.yaml +++ b/boards/nxp/frdm_ke17z/frdm_ke17z.yaml @@ -9,13 +9,14 @@ toolchain: - gnuarmemb - xtools supported: + - adc - counter + - dma + - flash - gpio - - adc - - uart - - pwm - i2c + - pwm - spi - - dma + - uart - watchdog vendor: nxp diff --git a/boards/nxp/frdm_ke17z512/frdm_ke17z512.dts b/boards/nxp/frdm_ke17z512/frdm_ke17z512.dts index 05c050bfdf1fc20..c4c42776e296496 100644 --- a/boards/nxp/frdm_ke17z512/frdm_ke17z512.dts +++ b/boards/nxp/frdm_ke17z512/frdm_ke17z512.dts @@ -143,7 +143,7 @@ &ftm2 { status = "okay"; - compatible = "nxp,kinetis-ftm-pwm"; + compatible = "nxp,ftm-pwm"; #pwm-cells = <3>; clocks = <&scg KINETIS_SCG_SIRC_CLK>; prescaler = <128>; diff --git a/boards/nxp/frdm_ke17z512/frdm_ke17z512.yaml b/boards/nxp/frdm_ke17z512/frdm_ke17z512.yaml index 6b817b1fb94043f..3b9dae0fa6b3642 100644 --- a/boards/nxp/frdm_ke17z512/frdm_ke17z512.yaml +++ b/boards/nxp/frdm_ke17z512/frdm_ke17z512.yaml @@ -18,6 +18,7 @@ supported: - counter - gpio - adc + - flash - uart - pwm - i2c diff --git a/boards/nxp/frdm_kl25z/frdm_kl25z.yaml b/boards/nxp/frdm_kl25z/frdm_kl25z.yaml index d930aed21273c09..79c0082e156a7b5 100644 --- a/boards/nxp/frdm_kl25z/frdm_kl25z.yaml +++ b/boards/nxp/frdm_kl25z/frdm_kl25z.yaml @@ -16,6 +16,7 @@ supported: - adc - arduino_gpio - gpio + - flash - i2c - usb_device vendor: nxp diff --git a/boards/nxp/frdm_kw41z/frdm_kw41z.yaml b/boards/nxp/frdm_kw41z/frdm_kw41z.yaml index 63cffff2786761e..9855726bc16a5cd 100644 --- a/boards/nxp/frdm_kw41z/frdm_kw41z.yaml +++ b/boards/nxp/frdm_kw41z/frdm_kw41z.yaml @@ -12,6 +12,7 @@ supported: - adc - arduino_gpio - counter + - flash - gpio - i2c - spi diff --git a/boards/nxp/frdm_mcxa156/Kconfig.defconfig b/boards/nxp/frdm_mcxa156/Kconfig.defconfig new file mode 100644 index 000000000000000..117b55f95e84384 --- /dev/null +++ b/boards/nxp/frdm_mcxa156/Kconfig.defconfig @@ -0,0 +1,15 @@ +# FRDM-MCXA156 board + +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_FRDM_MCXA156 + +if BOOTLOADER_MCUBOOT +choice MCUBOOT_BOOTLOADER_MODE + # Board only supports MCUBoot via "upgrade only" method: + default MCUBOOT_BOOTLOADER_MODE_OVERWRITE_ONLY +endchoice +endif #BOOTLOADER_MCUBOOT + +endif # BOARD_FRDM_MCXA156 diff --git a/boards/nxp/frdm_mcxa156/Kconfig.sysbuild b/boards/nxp/frdm_mcxa156/Kconfig.sysbuild new file mode 100644 index 000000000000000..4625c7d2929d23e --- /dev/null +++ b/boards/nxp/frdm_mcxa156/Kconfig.sysbuild @@ -0,0 +1,6 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +choice MCUBOOT_MODE + default MCUBOOT_MODE_OVERWRITE_ONLY +endchoice diff --git a/boards/nxp/frdm_mcxa156/board.c b/boards/nxp/frdm_mcxa156/board.c index 84347c4715ca807..f52a22222abc769 100644 --- a/boards/nxp/frdm_mcxa156/board.c +++ b/boards/nxp/frdm_mcxa156/board.c @@ -116,6 +116,96 @@ static int frdm_mcxa156_init(void) CLOCK_AttachClk(kFRO12M_to_LPUART0); #endif +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(ctimer0)) + CLOCK_SetClockDiv(kCLOCK_DivCTIMER0, 1u); + CLOCK_AttachClk(kFRO_HF_to_CTIMER0); +#endif + +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(ctimer1)) + CLOCK_SetClockDiv(kCLOCK_DivCTIMER1, 1u); + CLOCK_AttachClk(kFRO_HF_to_CTIMER1); +#endif + +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(ctimer2)) + CLOCK_SetClockDiv(kCLOCK_DivCTIMER2, 1u); + CLOCK_AttachClk(kFRO_HF_to_CTIMER2); +#endif + +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(ctimer3)) + CLOCK_SetClockDiv(kCLOCK_DivCTIMER3, 1u); + CLOCK_AttachClk(kFRO_HF_to_CTIMER3); +#endif + +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(ctimer4)) + CLOCK_SetClockDiv(kCLOCK_DivCTIMER4, 1u); + CLOCK_AttachClk(kFRO_HF_to_CTIMER4); +#endif + +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(dac0)) + SPC_EnableActiveModeAnalogModules(SPC0, kSPC_controlDac0); + CLOCK_SetClockDiv(kCLOCK_DivDAC0, 1u); + CLOCK_AttachClk(kFRO12M_to_DAC0); + + CLOCK_EnableClock(kCLOCK_GateDAC0); +#endif + +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpadc0)) + CLOCK_SetClockDiv(kCLOCK_DivADC0, 1u); + CLOCK_AttachClk(kFRO12M_to_ADC0); + + CLOCK_EnableClock(kCLOCK_GateADC0); +#endif + +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpcmp0)) + CLOCK_AttachClk(kFRO12M_to_CMP0); + CLOCK_SetClockDiv(kCLOCK_DivCMP0_FUNC, 1U); + SPC_EnableActiveModeAnalogModules(SPC0, (kSPC_controlCmp0 | kSPC_controlCmp0Dac)); +#endif + +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpi2c0)) + CLOCK_SetClockDiv(kCLOCK_DivLPI2C0, 1u); + CLOCK_AttachClk(kFRO12M_to_LPI2C0); +#endif + +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpi2c1)) + CLOCK_SetClockDiv(kCLOCK_DivLPI2C1, 1u); + CLOCK_AttachClk(kFRO12M_to_LPI2C1); +#endif + +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpi2c2)) + CLOCK_SetClockDiv(kCLOCK_DivLPI2C2, 1u); + CLOCK_AttachClk(kFRO12M_to_LPI2C2); +#endif + +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpi2c3)) + CLOCK_SetClockDiv(kCLOCK_DivLPI2C3, 1u); + CLOCK_AttachClk(kFRO12M_to_LPI2C3); +#endif + +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lptmr0)) + +/* + * Clock Select Decides what input source the lptmr will clock from + * + * 0 <- Reserved + * 1 <- 16K FRO + * 2 <- Reserved + * 3 <- Combination of clocks configured in MRCC_LPTMR0_CLKSEL[MUX] field + */ +#if DT_PROP(DT_NODELABEL(lptmr0), clk_source) == 0x1 + CLOCK_SetupFRO16KClocking(kCLKE_16K_SYSTEM | kCLKE_16K_COREMAIN); +#elif DT_PROP(DT_NODELABEL(lptmr0), clk_source) == 0x3 + CLOCK_SetClockDiv(kCLOCK_DivLPTMR0, 1u); + CLOCK_AttachClk(kFRO12M_to_LPTMR0); +#endif /* DT_PROP(DT_NODELABEL(lptmr0), clk_source) */ + +#endif + +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(usb)) + RESET_PeripheralReset(kUSB0_RST_SHIFT_RSTn); + CLOCK_EnableUsbfsClock(); +#endif + /* Set SystemCoreClock variable. */ SystemCoreClock = CLOCK_INIT_CORE_CLOCK; diff --git a/boards/nxp/frdm_mcxa156/doc/index.rst b/boards/nxp/frdm_mcxa156/doc/index.rst index 6af4aec4f4ee87a..aef318835f5e4a3 100644 --- a/boards/nxp/frdm_mcxa156/doc/index.rst +++ b/boards/nxp/frdm_mcxa156/doc/index.rst @@ -4,11 +4,11 @@ Overview ******** FRDM-MCXA156 are compact and scalable development boards for rapid prototyping of -MCX A15X MCUs. They offer industry standard headers for easy access to the -MCUs I/Os, integrated open-standard serial interfaces, external flash memory and -an on-board MCU-Link debugger. MCX N Series are high-performance, low-power -microcontrollers with intelligent peripherals and accelerators providing multi-tasking -capabilities and performance efficiency. +MCX A144/5/6 A154/5/6 MCUs. They offer industry standard headers for easy access +to the MCU's I/Os, integrated open-standard serial interfaces, external flash +memory and an on-board MCU-Link debugger. Additional tools like our Expansion +Board Hub for add-on boards and the Application Code Hub for software examples +are available through the MCUXpresso Developer Experience. Hardware ******** @@ -16,8 +16,8 @@ Hardware - MCX-A156 Arm Cortex-M33 microcontroller running at 96 MHz - 1MB dual-bank on chip Flash - 128 KB RAM -- USB high-speed (Host/Device) with on-chip HS PHY. HS USB Type-C connectors -- 2x FlexCAN with FD, 2x I3Cs, 2x SAI +- USB full-speed with on-chip FS PHY. USB Type-C connectors +- 1x FlexCAN with FD, 1x I3Cs - On-board MCU-Link debugger with CMSIS-DAP - Arduino Header, FlexIO/LCD Header, SmartDMA/Camera Header, mikroBUS @@ -54,6 +54,22 @@ The FRDM-MCXA156 board configuration supports the following hardware features: +-----------+------------+-------------------------------------+ | FLASH | on-chip | soc flash | +-----------+------------+-------------------------------------+ +| ADC | on-chip | adc | ++-----------+------------+-------------------------------------+ +| CTIMER | on-chip | counter | ++-----------+------------+-------------------------------------+ +| DAC | on-chip | dac | ++-----------+------------+-------------------------------------+ +| I2C | on-chip | i2c | ++-----------+------------+-------------------------------------+ +| LPCMP | on-chip | sensor(comparator) | ++-----------+------------+-------------------------------------+ +| LPTMR | on-chip | counter | ++-----------+------------+-------------------------------------+ +| PWM | on-chip | pwm | ++-----------+------------+-------------------------------------+ +| USB | on-chip | USB device | ++-----------+------------+-------------------------------------+ Targets available ================== diff --git a/boards/nxp/frdm_mcxa156/frdm_mcxa156-pinctrl.dtsi b/boards/nxp/frdm_mcxa156/frdm_mcxa156-pinctrl.dtsi index a4e241c1bfea84f..e231ae7edafd92e 100644 --- a/boards/nxp/frdm_mcxa156/frdm_mcxa156-pinctrl.dtsi +++ b/boards/nxp/frdm_mcxa156/frdm_mcxa156-pinctrl.dtsi @@ -13,7 +13,71 @@ ; drive-strength = "low"; slew-rate = "fast"; + input-enable; + }; + }; + pinmux_dac0: pinmux_dac0 { + group0 { + pinmux = ; + drive-strength = "low"; + slew-rate = "fast"; + }; + }; + pinmux_flexpwm0_pwm0: pinmux_flexpwm0_pwm0 { + group0 { + pinmux = , + ; + slew-rate = "fast"; + drive-strength = "low"; + }; + }; + pinmux_lpadc0: pinmux_lpadc0 { + group0 { + pinmux = , + ; + slew-rate = "fast"; + drive-strength = "low"; + }; + }; + pinmux_lpcmp0: pinmux_lpcmp0 { + group0 { + pinmux = ; + drive-strength = "low"; + slew-rate = "fast"; + bias-pull-up; + }; + }; + pinmux_lpi2c0: pinmux_lpi2c0 { + group0 { + pinmux = , + ; + slew-rate = "fast"; + drive-strength = "low"; + input-enable; + bias-pull-up; + drive-open-drain; + }; + }; + pinmux_lpi2c2: pinmux_lpi2c2 { + group0 { + pinmux = , + ; + slew-rate = "fast"; + drive-strength = "low"; + input-enable; + bias-pull-up; + drive-open-drain; + }; + }; + pinmux_lpi2c3: pinmux_lpi2c3 { + group0 { + pinmux = , + ; + slew-rate = "fast"; + drive-strength = "low"; + input-enable; + bias-pull-up; + drive-open-drain; }; }; - }; diff --git a/boards/nxp/frdm_mcxa156/frdm_mcxa156.dts b/boards/nxp/frdm_mcxa156/frdm_mcxa156.dts index 73c872a0337abf9..8705fdaa0f4fff6 100644 --- a/boards/nxp/frdm_mcxa156/frdm_mcxa156.dts +++ b/boards/nxp/frdm_mcxa156/frdm_mcxa156.dts @@ -20,14 +20,18 @@ led2 = &red_led; sw0 = &user_button_2; sw1 = &user_button_3; + pwm-0 = &flexpwm0_pwm0; + mcuboot-button0 = &user_button_2; }; chosen { zephyr,sram = &sram0; zephyr,flash = &flash; zephyr,flash-controller = &fmu; + zephyr,code-partition = &slot0_partition; zephyr,console = &lpuart0; zephyr,shell-uart = &lpuart0; + zephyr,uart-mcumgr = &lpuart0; }; leds { @@ -88,3 +92,78 @@ pinctrl-0 = <&pinmux_lpuart0>; pinctrl-names = "default"; }; + +&ctimer0 { + status = "okay"; +}; + +&dac0 { + status = "okay"; + pinctrl-0 = <&pinmux_dac0>; + pinctrl-names = "default"; +}; + +&flexpwm0_pwm0 { + status = "okay"; + pinctrl-0 = <&pinmux_flexpwm0_pwm0>; + pinctrl-names = "default"; +}; + +&lpadc0 { + status = "okay"; + pinctrl-0 = <&pinmux_lpadc0>; + pinctrl-names = "default"; +}; + +&lpcmp0 { + status = "okay"; + pinctrl-0 = <&pinmux_lpcmp0>; + pinctrl-names = "default"; +}; + +&lpi2c0 { + status = "okay"; + pinctrl-0 = <&pinmux_lpi2c0>; + pinctrl-names = "default"; +}; + +&lpi2c3 { + status = "okay"; + pinctrl-0 = <&pinmux_lpi2c3>; + pinctrl-names = "default"; +}; + +&lptmr0 { + status = "okay"; +}; + +zephyr_udc0: &usb { + status = "okay"; + num-bidir-endpoints = <8>; +}; + +&flash { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 DT_SIZE_K(64)>; + read-only; + }; + slot0_partition: partition@10000 { + label = "image-0"; + reg = <0x00010000 DT_SIZE_K(424)>; + }; + slot1_partition: partition@7a000 { + label = "image-1"; + reg = <0x0007a000 DT_SIZE_K(424)>; + }; + storage_partition: partition@e4000 { + label = "storage"; + reg = <0x000e4000 DT_SIZE_K(112)>; + }; + }; +}; diff --git a/boards/nxp/frdm_mcxa156/frdm_mcxa156.yaml b/boards/nxp/frdm_mcxa156/frdm_mcxa156.yaml index c7809e4548b10c8..419002d33555ded 100644 --- a/boards/nxp/frdm_mcxa156/frdm_mcxa156.yaml +++ b/boards/nxp/frdm_mcxa156/frdm_mcxa156.yaml @@ -15,5 +15,13 @@ toolchain: - gnuarmemb - xtools supported: + - adc + - flash - gpio + - counter + - dac + - i2c + - pwm + - usb_device + - usbd vendor: nxp diff --git a/boards/nxp/frdm_mcxc242/frdm_mcxc242.yaml b/boards/nxp/frdm_mcxc242/frdm_mcxc242.yaml index 9fa844462a1ba13..778d84284956b44 100644 --- a/boards/nxp/frdm_mcxc242/frdm_mcxc242.yaml +++ b/boards/nxp/frdm_mcxc242/frdm_mcxc242.yaml @@ -15,14 +15,15 @@ toolchain: - gnuarmemb - xtools supported: + - adc + - counter + - flash - gpio - - uart - i2c + - pwm + - uart - usb_device - usbd - - pwm - - adc - - counter testing: ignore_tags: - net diff --git a/boards/nxp/frdm_mcxc444/doc/index.rst b/boards/nxp/frdm_mcxc444/doc/index.rst index 254b4c1fd6ad855..601bc9877a7a5e8 100644 --- a/boards/nxp/frdm_mcxc444/doc/index.rst +++ b/boards/nxp/frdm_mcxc444/doc/index.rst @@ -55,8 +55,18 @@ The ``frdm_mcxc444`` board target supports the following hardware features: +-----------+------------+-------------------------------------+ | FLASH | on-chip | soc flash | +-----------+------------+-------------------------------------+ +| I2C | on-chip | i2c | ++-----------+------------+-------------------------------------+ | LPTMR | on-chip | counter | +-----------+------------+-------------------------------------+ +| PIT | on-chip | counter | ++-----------+------------+-------------------------------------+ +| PWM | on-chip | pwm | ++-----------+------------+-------------------------------------+ +| RTC | on-chip | counter | ++-----------+------------+-------------------------------------+ +| USB | on-chip | USB device | ++-----------+------------+-------------------------------------+ Targets available diff --git a/boards/nxp/frdm_mcxc444/frdm_mcxc444-pinctrl.dtsi b/boards/nxp/frdm_mcxc444/frdm_mcxc444-pinctrl.dtsi index 87552988ff852db..36b40c40abc9c85 100644 --- a/boards/nxp/frdm_mcxc444/frdm_mcxc444-pinctrl.dtsi +++ b/boards/nxp/frdm_mcxc444/frdm_mcxc444-pinctrl.dtsi @@ -8,6 +8,15 @@ #include &pinctrl { + pinmux_i2c0: pinmux_i2c0 { + group0 { + pinmux = , + ; + drive-strength = "low"; + drive-open-drain; + slew-rate = "fast"; + }; + }; pinmux_lpuart0: pinmux_lpuart0 { group0 { pinmux = , @@ -24,4 +33,13 @@ slew-rate = "slow"; }; }; + pinmux_tpm0: pinmux_tpm0 { + group0 { + pinmux = , + , + ; + drive-strength = "low"; + slew-rate = "slow"; + }; + }; }; diff --git a/boards/nxp/frdm_mcxc444/frdm_mcxc444.dts b/boards/nxp/frdm_mcxc444/frdm_mcxc444.dts index 0a0c55f730ee079..df6c55e5721e499 100644 --- a/boards/nxp/frdm_mcxc444/frdm_mcxc444.dts +++ b/boards/nxp/frdm_mcxc444/frdm_mcxc444.dts @@ -17,9 +17,17 @@ aliases { led0 = &red_led; led1 = &green_led; - led2 = &red_led; + led2 = &blue_led; + pwm-led0 = &red_pwm_led; + pwm-led1 = &green_pwm_led; + pwm-led2 = &blue_pwm_led; + red-pwm-led = &red_pwm_led; + green-pwm-led = &green_pwm_led; + blue-pwm-led = &blue_pwm_led; sw0 = &user_button_2; sw1 = &user_button_3; + accel0 = &fxls8974; + pwm-0 = &tpm0; }; chosen { @@ -36,7 +44,7 @@ label = "Red LED"; }; green_led: led_1 { - gpios = <&gpiob 5 GPIO_ACTIVE_LOW>; + gpios = <&gpiod 5 GPIO_ACTIVE_LOW>; label = "Green LED"; }; blue_led: led_2 { @@ -45,6 +53,23 @@ }; }; + pwmleds { + compatible = "pwm-leds"; + status = "disabled"; + red_pwm_led: pwm_led_0 { + pwms = <&tpm0 4 PWM_MSEC(20) PWM_POLARITY_INVERTED>; + label = "PWM Red LED"; + }; + green_pwm_led: pwm_led_1 { + pwms = <&tpm0 5 PWM_MSEC(20) PWM_POLARITY_INVERTED>; + label = "PWM Green LED"; + }; + blue_pwm_led: pwm_led_2 { + pwms = <&tpm0 2 PWM_MSEC(20) PWM_POLARITY_INVERTED>; + label = "PWM Blue LED"; + }; + }; + gpio_keys { compatible = "gpio-keys"; user_button_2: button_2 { @@ -62,7 +87,7 @@ &sim { pllfll-select = ; - er32k-select = ; + er32k-select = ; }; &cpu0 { @@ -86,10 +111,27 @@ status = "okay"; }; +&gpiod { + status = "okay"; +}; + &gpioe { status = "okay"; }; +i2c0: &i2c0 { + status = "okay"; + pinctrl-0 = <&pinmux_i2c0>; + pinctrl-names = "default"; + + fxls8974: fxls8974@18 { + status = "okay"; + compatible = "nxp,fxls8974"; + reg = <0x18>; + int1-gpios = <&gpiod 1 GPIO_ACTIVE_LOW>; + }; +}; + &lpuart0 { status = "okay"; current-speed = <115200>; @@ -107,3 +149,31 @@ pinctrl-0 = <&pinmux_uart2>; pinctrl-names = "default"; }; + +&rtc { + status = "okay"; +}; + +&pit0 { + status = "okay"; +}; + +&pit0_channel0 { + status = "okay"; +}; + +&pit0_channel1 { + status = "okay"; +}; + +&tpm0 { + status = "okay"; + pinctrl-0 = <&pinmux_tpm0>; + pinctrl-names = "default"; + clocks = <&sim KINETIS_SIM_OSCERCLK 0x103C 24>; +}; + +zephyr_udc0: &usb { + status = "okay"; + num-bidir-endpoints = <8>; +}; diff --git a/boards/nxp/frdm_mcxc444/frdm_mcxc444.yaml b/boards/nxp/frdm_mcxc444/frdm_mcxc444.yaml index c32022e2b16184b..a7aabf28a35cdcd 100644 --- a/boards/nxp/frdm_mcxc444/frdm_mcxc444.yaml +++ b/boards/nxp/frdm_mcxc444/frdm_mcxc444.yaml @@ -15,9 +15,14 @@ toolchain: - gnuarmemb - xtools supported: + - counter + - flash - gpio + - i2c - uart - - counter + - pwm + - usb_device + - usbd testing: ignore_tags: - net diff --git a/boards/nxp/frdm_mcxn236/board.c b/boards/nxp/frdm_mcxn236/board.c index a41230b063abbd6..fd9ce02abb78fd7 100644 --- a/boards/nxp/frdm_mcxn236/board.c +++ b/boards/nxp/frdm_mcxn236/board.c @@ -8,6 +8,15 @@ #include #include #include +#if CONFIG_USB_DC_NXP_EHCI +#include "usb_phy.h" +#include "usb.h" + +/* USB PHY condfiguration */ +#define BOARD_USB_PHY_D_CAL 0x04U +#define BOARD_USB_PHY_TXCAL45DP 0x07U +#define BOARD_USB_PHY_TXCAL45DM 0x07U +#endif /* Board xtal frequency in Hz */ #define BOARD_XTAL0_CLK_HZ 24000000U @@ -206,6 +215,49 @@ static int frdm_mcxn236_init(void) CLOCK_AttachClk(kFRO_HF_to_ADC0); #endif +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(usb1)) && CONFIG_USB_DC_NXP_EHCI + usb_phy_config_struct_t usbPhyConfig = { + BOARD_USB_PHY_D_CAL, BOARD_USB_PHY_TXCAL45DP, BOARD_USB_PHY_TXCAL45DM, + }; + + SPC0->ACTIVE_VDELAY = 0x0500; + /* Change the power DCDC to 1.8v (By default, DCDC is 1.8V), CORELDO to 1.1v (By default, + * CORELDO is 1.0V) + */ + SPC0->ACTIVE_CFG &= ~SPC_ACTIVE_CFG_CORELDO_VDD_DS_MASK; + SPC0->ACTIVE_CFG |= SPC_ACTIVE_CFG_DCDC_VDD_LVL(0x3) | SPC_ACTIVE_CFG_CORELDO_VDD_LVL(0x3) | + SPC_ACTIVE_CFG_SYSLDO_VDD_DS_MASK | SPC_ACTIVE_CFG_DCDC_VDD_DS(0x2u); + /* Wait until it is done */ + while (SPC0->SC & SPC_SC_BUSY_MASK) { + }; + if ((SCG0->LDOCSR & SCG_LDOCSR_LDOEN_MASK) == 0u) { + SCG0->TRIM_LOCK = SCG_TRIM_LOCK_TRIM_LOCK_KEY(0x5a5a) | + SCG_TRIM_LOCK_TRIM_UNLOCK_MASK; + SCG0->LDOCSR |= SCG_LDOCSR_LDOEN_MASK; + /* wait LDO ready */ + while ((SCG0->LDOCSR & SCG_LDOCSR_VOUT_OK_MASK) == 0u) { + }; + } + SYSCON->AHBCLKCTRLSET[2] |= SYSCON_AHBCLKCTRL2_USB_HS_MASK | + SYSCON_AHBCLKCTRL2_USB_HS_PHY_MASK; + SCG0->SOSCCFG &= ~(SCG_SOSCCFG_RANGE_MASK | SCG_SOSCCFG_EREFS_MASK); + /* xtal = 20 ~ 30MHz */ + SCG0->SOSCCFG = BIT(SCG_SOSCCFG_RANGE_SHIFT) | BIT(SCG_SOSCCFG_EREFS_SHIFT); + SCG0->SOSCCSR |= SCG_SOSCCSR_SOSCEN_MASK; + while (1) { + if (SCG0->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK) { + break; + } + } + SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK | + SYSCON_CLOCK_CTRL_CLKIN_ENA_FM_USBH_LPT_MASK; + CLOCK_EnableClock(kCLOCK_UsbHs); + CLOCK_EnableClock(kCLOCK_UsbHsPhy); + CLOCK_EnableUsbhsPhyPllClock(kCLOCK_Usbphy480M, BOARD_XTAL0_CLK_HZ); + CLOCK_EnableUsbhsClock(); + USB_EhciPhyInit(kUSB_ControllerEhci0, BOARD_XTAL0_CLK_HZ, &usbPhyConfig); +#endif + #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpcmp0)) CLOCK_SetClkDiv(kCLOCK_DivCmp0FClk, 1U); CLOCK_AttachClk(kFRO12M_to_CMP0F); diff --git a/boards/nxp/frdm_mcxn236/doc/index.rst b/boards/nxp/frdm_mcxn236/doc/index.rst index 92147c0399cfd1e..2ddc964bb9eafc2 100644 --- a/boards/nxp/frdm_mcxn236/doc/index.rst +++ b/boards/nxp/frdm_mcxn236/doc/index.rst @@ -65,6 +65,8 @@ The FRDM-MCXN236 board configuration supports the following hardware features: +-----------+------------+-------------------------------------+ | ADC | on-chip | adc | +-----------+------------+-------------------------------------+ +| USBHS | on-chip | USB device | ++-----------+------------+-------------------------------------+ | LPCMP | on-chip | sensor(comparator) | +-----------+------------+-------------------------------------+ | FLEXCAN | on-chip | CAN | @@ -78,6 +80,8 @@ The FRDM-MCXN236 board configuration supports the following hardware features: +-----------+------------+-------------------------------------+ | MRT | on-chip | counter | +-----------+------------+-------------------------------------+ +| RTC | on-chip | rtc | ++-----------+------------+-------------------------------------+ Targets available ================== diff --git a/boards/nxp/frdm_mcxn236/frdm_mcxn236.dts b/boards/nxp/frdm_mcxn236/frdm_mcxn236.dts index 9910f7b413a44e7..1f42d00be94369b 100644 --- a/boards/nxp/frdm_mcxn236/frdm_mcxn236.dts +++ b/boards/nxp/frdm_mcxn236/frdm_mcxn236.dts @@ -27,6 +27,7 @@ aliases{ watchdog0 = &wwdt0; pwm-0 = &flexpwm1_pwm0; + rtc = &rtc; }; }; @@ -127,6 +128,10 @@ status = "okay"; }; +zephyr_udc0: &usb1 { + status = "okay"; +}; + &lpcmp0 { status = "okay"; }; @@ -142,3 +147,7 @@ &mrt0_channel0 { status = "okay"; }; + +&rtc { + status = "okay"; +}; diff --git a/boards/nxp/frdm_mcxn236/frdm_mcxn236.yaml b/boards/nxp/frdm_mcxn236/frdm_mcxn236.yaml index b996f3e4b438795..e90378baba1f967 100644 --- a/boards/nxp/frdm_mcxn236/frdm_mcxn236.yaml +++ b/boards/nxp/frdm_mcxn236/frdm_mcxn236.yaml @@ -15,14 +15,16 @@ toolchain: - gnuarmemb - xtools supported: + - adc - can + - counter - dma + - flash - gpio - - spi - i2c - - watchdog - pwm - - counter - regulator - - adc + - spi + - watchdog + - usb_device vendor: nxp diff --git a/boards/nxp/frdm_mcxn947/board.c b/boards/nxp/frdm_mcxn947/board.c index 75ff1cb04e42ce6..7bf3f8999cc823c 100644 --- a/boards/nxp/frdm_mcxn947/board.c +++ b/boards/nxp/frdm_mcxn947/board.c @@ -16,6 +16,10 @@ #define BOARD_USB_PHY_D_CAL (0x04U) #define BOARD_USB_PHY_TXCAL45DP (0x07U) #define BOARD_USB_PHY_TXCAL45DM (0x07U) + +usb_phy_config_struct_t usbPhyConfig = { + BOARD_USB_PHY_D_CAL, BOARD_USB_PHY_TXCAL45DP, BOARD_USB_PHY_TXCAL45DM, +}; #endif /* Board xtal frequency in Hz */ @@ -190,10 +194,6 @@ static int frdm_mcxn947_init(void) CLOCK_EnableClock(kCLOCK_Gpio4); #endif -#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio5)) - CLOCK_EnableClock(kCLOCK_Gpio5); -#endif - #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(dac0)) SPC_EnableActiveModeAnalogModules(SPC0, kSPC_controlDac0); CLOCK_SetClkDiv(kCLOCK_DivDac0Clk, 1u); @@ -288,11 +288,7 @@ static int frdm_mcxn947_init(void) CLOCK_AttachClk(kFRO_HF_to_ADC0); #endif -#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(usb1)) && CONFIG_USB_DC_NXP_EHCI - usb_phy_config_struct_t usbPhyConfig = { - BOARD_USB_PHY_D_CAL, BOARD_USB_PHY_TXCAL45DP, BOARD_USB_PHY_TXCAL45DM, - }; - +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(usb1)) && (CONFIG_USB_DC_NXP_EHCI || CONFIG_UDC_NXP_EHCI) SPC0->ACTIVE_VDELAY = 0x0500; /* Change the power DCDC to 1.8v (By default, DCDC is 1.8V), CORELDO to 1.1v (By default, * CORELDO is 1.0V) @@ -327,8 +323,10 @@ static int frdm_mcxn947_init(void) CLOCK_EnableClock(kCLOCK_UsbHsPhy); CLOCK_EnableUsbhsPhyPllClock(kCLOCK_Usbphy480M, BOARD_XTAL0_CLK_HZ); CLOCK_EnableUsbhsClock(); +#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(usb1)) && CONFIG_USB_DC_NXP_EHCI USB_EhciPhyInit(kUSB_ControllerEhci0, BOARD_XTAL0_CLK_HZ, &usbPhyConfig); #endif +#endif #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpcmp0)) CLOCK_SetClkDiv(kCLOCK_DivCmp0FClk, 1U); diff --git a/boards/nxp/frdm_mcxn947/doc/index.rst b/boards/nxp/frdm_mcxn947/doc/index.rst index 6b5008a20551f14..e923d67b9abc493 100644 --- a/boards/nxp/frdm_mcxn947/doc/index.rst +++ b/boards/nxp/frdm_mcxn947/doc/index.rst @@ -85,6 +85,8 @@ The FRDM-MCXN947 board configuration supports the following hardware features: +-----------+------------+-------------------------------------+ | ADC | on-chip | adc | +-----------+------------+-------------------------------------+ +| HWINFO | on-chip | Unique device serial number | ++-----------+------------+-------------------------------------+ | USBHS | on-chip | USB device | +-----------+------------+-------------------------------------+ | LPCMP | on-chip | sensor(comparator) | diff --git a/boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi b/boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi index 2ca276f9f89b6b1..574f20aecaf9a7a 100644 --- a/boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi +++ b/boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi @@ -140,18 +140,18 @@ nxp_8080_touch_panel_i2c: &flexcomm2_lpi2c2 { boot_partition: partition@0 { label = "mcuboot"; - reg = <0x00000000 DT_SIZE_K(64)>; + reg = <0x00000000 DT_SIZE_K(80)>; }; /* For the MCUBoot "upgrade only" method, * the slot sizes must be equal. */ - slot0_partition: partition@10000 { + slot0_partition: partition@14000 { label = "image-0"; - reg = <0x00010000 DT_SIZE_K(992)>; + reg = <0x00014000 DT_SIZE_K(984)>; }; - slot1_partition: partition@108000 { + slot1_partition: partition@10A000 { label = "image-1"; - reg = <0x00108000 DT_SIZE_K(992)>; + reg = <0x0010A000 DT_SIZE_K(984)>; }; /* storage_partition is placed in WINBOND flash memory*/ }; diff --git a/boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0.dtsi b/boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0.dtsi index 3a1a565c89911f0..789f4d8c18e68f8 100644 --- a/boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0.dtsi +++ b/boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0.dtsi @@ -182,6 +182,14 @@ zephyr_udc0: &usb1 { status = "okay"; + phy_handle = <&usbphy1>; +}; + +&usbphy1 { + status = "okay"; + tx-d-cal = <4>; + tx-cal-45-dp-ohms = <7>; + tx-cal-45-dm-ohms = <7>; }; &lpcmp0 { diff --git a/boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0.yaml b/boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0.yaml index 60538848facf3a6..8578e55b9310fde 100644 --- a/boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0.yaml +++ b/boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0.yaml @@ -15,18 +15,19 @@ toolchain: - gnuarmemb - xtools supported: + - adc - can + - counter + - dac - dma + - flash - gpio - - spi - - dac - i2c - - watchdog + - i3c - pwm - - counter - - sdhc - regulator - - adc + - sdhc + - spi - usb_device - - i3c + - watchdog vendor: nxp diff --git a/boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0_qspi.yaml b/boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0_qspi.yaml index fe5a82ca4470a9a..15648a75da57ece 100644 --- a/boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0_qspi.yaml +++ b/boards/nxp/frdm_mcxn947/frdm_mcxn947_mcxn947_cpu0_qspi.yaml @@ -15,18 +15,19 @@ toolchain: - gnuarmemb - xtools supported: + - adc - can + - counter + - dac - dma + - flash - gpio - - spi - - dac - i2c - - watchdog + - i3c - pwm - - counter - - sdhc - regulator - - adc + - sdhc + - spi - usb_device - - i3c + - watchdog vendor: nxp diff --git a/boards/nxp/frdm_mcxw71/board.cmake b/boards/nxp/frdm_mcxw71/board.cmake index 27c59c8d3582aad..ba8d5b735de939a 100644 --- a/boards/nxp/frdm_mcxw71/board.cmake +++ b/boards/nxp/frdm_mcxw71/board.cmake @@ -1,6 +1,8 @@ # Copyright 2024 NXP # SPDX-License-Identifier: Apache-2.0 +board_runner_args(linkserver "--device=MCXW716CxxxA:FRDM-MCXW71") board_runner_args(jlink "--device=mcxw716" "--reset-after-load") +include(${ZEPHYR_BASE}/boards/common/linkserver.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/nxp/frdm_mcxw71/doc/index.rst b/boards/nxp/frdm_mcxw71/doc/index.rst index c5a16d8e1a3f3ab..d7d979fbe401d88 100644 --- a/boards/nxp/frdm_mcxw71/doc/index.rst +++ b/boards/nxp/frdm_mcxw71/doc/index.rst @@ -91,6 +91,16 @@ Configuring a Debug Probe A debug probe is used for both flashing and debugging the board. This board is configured by default to use the MCU-Link CMSIS-DAP Onboard Debug Probe. +Using LinkServer +---------------- + +Linkserver is the default runner for this board, and supports the factory +default MCU-Link firmware. Follow the instructions in +:ref:`mcu-link-cmsis-onboard-debug-probe` to reprogram the default MCU-Link +firmware. This only needs to be done if the default onboard debug circuit +firmware was changed. To put the board in ``DFU mode`` to program the firmware, +short jumper J5. + Using J-Link ------------ diff --git a/boards/nxp/frdm_mcxw71/frdm_mcxw71.dts b/boards/nxp/frdm_mcxw71/frdm_mcxw71.dts index 4e7d1b31b4135bd..65e2e7a2f6a2e9e 100644 --- a/boards/nxp/frdm_mcxw71/frdm_mcxw71.dts +++ b/boards/nxp/frdm_mcxw71/frdm_mcxw71.dts @@ -27,6 +27,7 @@ zephyr,shell-uart = &lpuart1; zephyr,uart-pipe = &lpuart0; zephyr,canbus = &flexcan0; + zephyr,uart-mcumgr = &lpuart0; }; user_led { @@ -89,21 +90,20 @@ compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; - + /* The MCUBoot swap-move algorithm uses the last 2 sectors + * of the primary slot0 for swap status and move. + */ boot_partition: partition@0 { reg = <0x0 DT_SIZE_K(64)>; }; - slot0_partition: partition@10000 { - reg = <0x10000 DT_SIZE_K(416)>; + reg = <0x10000 (DT_SIZE_K(416) + DT_SIZE_K(16))>; }; - - slot1_partition: partition@78000 { - reg = <0x78000 DT_SIZE_K(416)>; + slot1_partition: partition@7C000 { + reg = <0x7C000 DT_SIZE_K(416)>; }; - - storage_partition: partition@e0000 { - reg = <0xe0000 DT_SIZE_K(128)>; + storage_partition: partition@E4000 { + reg = <0xE4000 DT_SIZE_K(112)>; }; }; }; @@ -137,3 +137,8 @@ pinctrl-names = "default"; status = "okay"; }; + +&nbu { + status = "okay"; + wakeup-source; +}; diff --git a/boards/nxp/frdm_mcxw71/frdm_mcxw71.yaml b/boards/nxp/frdm_mcxw71/frdm_mcxw71.yaml index ffc41040081558e..54cbe67d972183a 100644 --- a/boards/nxp/frdm_mcxw71/frdm_mcxw71.yaml +++ b/boards/nxp/frdm_mcxw71/frdm_mcxw71.yaml @@ -9,15 +9,15 @@ toolchain: - gnuarmemb - xtools supported: - - gpio - - uart + - adc + - can - counter - - pwm - - watchdog - - pinctrl - flash - - spi + - gpio - i2c - - can + - pinctrl + - pwm - regulator - - adc + - spi + - uart + - watchdog diff --git a/boards/nxp/frdm_rw612/doc/frdm_rw612.webp b/boards/nxp/frdm_rw612/doc/frdm_rw612.webp new file mode 100644 index 000000000000000..5a63358d1994065 Binary files /dev/null and b/boards/nxp/frdm_rw612/doc/frdm_rw612.webp differ diff --git a/boards/nxp/frdm_rw612/doc/index.rst b/boards/nxp/frdm_rw612/doc/index.rst index c07d5b49878c759..a1a9b7dc81793d9 100644 --- a/boards/nxp/frdm_rw612/doc/index.rst +++ b/boards/nxp/frdm_rw612/doc/index.rst @@ -36,8 +36,6 @@ Supported Features +-----------+------------+-----------------------------------+ | USART | on-chip | serial | +-----------+------------+-----------------------------------+ -| BLE | on-chip | Bluetooth | -+-----------+------------+-----------------------------------+ | DMA | on-chip | dma | +-----------+------------+-----------------------------------+ | SPI | on-chip | spi | @@ -69,6 +67,8 @@ Supported Features +-----------+------------+-----------------------------------+ | ENET | on-chip | ethernet | +-----------+------------+-----------------------------------+ +| Wi-Fi | on-chip | Wi-Fi | ++-----------+------------+-----------------------------------+ The default configuration can be found in the defconfig file: @@ -79,7 +79,7 @@ Other hardware features are not currently supported Fetch Binary Blobs ****************** -To support Bluetooth, frdm_rw612 requires fetching binary blobs, which can be +To support Bluetooth or Wi-Fi, frdm_rw612 requires fetching binary blobs, which can be achieved by running the following command: .. code-block:: console @@ -157,6 +157,16 @@ frdm_rw612 platform supports the monolithic feature. The required binary blob ``/modules/hal/nxp/zephyr/blobs/rw61x_sb_ble_a2.bin`` will be linked with the application image directly, forming one single monolithic image. +Wi-Fi +===== + +Wi-Fi functionality requires to fetch binary blobs, so make sure to follow +the ``Fetch Binary Blobs`` section first. + +frdm_rw612 platform supports the monolithic feature. The required binary blob +``/modules/hal/nxp/zephyr/blobs/rw61x_sb_wifi_a2.bin`` will be linked +with the application image directly, forming one single monolithic image. + Resources ========= diff --git a/boards/nxp/frdm_rw612/frdm_rw612.dts b/boards/nxp/frdm_rw612/frdm_rw612.dts index 47a7bbd10f85a7b..39a58571779bca9 100644 --- a/boards/nxp/frdm_rw612/frdm_rw612.dts +++ b/boards/nxp/frdm_rw612/frdm_rw612.dts @@ -7,193 +7,4 @@ /dts-v1/; #include -#include "frdm_rw612-pinctrl.dtsi" - -/ { - model = "nxp,frdm_rw612"; - - aliases { - led0 = &green_led; - watchdog0 = &wwdt; - usart-0 = &flexcomm3; - i2c-0 = &flexcomm2; - pwm-0 = &sctimer; - }; - - chosen { - zephyr,sram = &sram_data; - zephyr,flash = &w25q512jvfiq; - zephyr,console = &flexcomm3; - zephyr,shell-uart = &flexcomm3; - }; - - leds { - compatible = "gpio-leds"; - green_led: led_1 { - gpios = <&hsgpio0 12 0>; - }; - }; -}; - -&flexcomm3 { - compatible = "nxp,lpc-usart"; - status = "okay"; - current-speed = <115200>; - pinctrl-0 = <&pinmux_flexcomm3_usart>; - pinctrl-names = "default"; -}; - -&flexcomm0 { - compatible = "nxp,lpc-usart"; - status = "disabled"; - current-speed = <115200>; - pinctrl-0 = <&pinmux_flexcomm0_usart>; - pinctrl-names = "default"; -}; - -&hsgpio0 { - status = "okay"; -}; - -&flexspi { - status = "okay"; - ahb-bufferable; - ahb-prefetch; - ahb-cacheable; - ahb-read-addr-opt; - ahb-boundary = "1024"; - rx-clock-source = <1>; - rx-clock-source-b = <1>; - /* Winbond external flash */ - w25q512jvfiq: w25q512jvfiq@0 { - compatible = "nxp,imx-flexspi-nor"; - reg = <0>; - size = ; - status = "okay"; - erase-block-size = <4096>; - write-block-size = <1>; - spi-max-frequency = <104000000>; - }; - aps6404l: aps6404l@2 { - compatible = "nxp,imx-flexspi-aps6404l"; - /* APS6404L is 8MB, 64MBit pSRAM */ - size = ; - reg = <2>; - spi-max-frequency = <109000000>; - /* PSRAM cannot be enabled while board is in default XIP - * configuration, as it will conflict with flash chip. - */ - status = "disabled"; - cs-interval-unit = <1>; - cs-interval = <2>; - cs-hold-time = <3>; - cs-setup-time = <3>; - data-valid-time = <6>; - column-space = <0>; - ahb-write-wait-unit = <2>; - ahb-write-wait-interval = <0>; - }; -}; - -&hci { - status = "okay"; - wakeup-source; -}; - -&enet_mac { - status = "okay"; - pinctrl-0 = <&pinmux_enet>; - pinctrl-names = "default"; - phy-handle = <&phy>; - zephyr,random-mac-address; - phy-connection-type = "rmii"; -}; - -&enet_mdio { - status = "okay"; - pinctrl-0 = <&pinmux_mdio>; - pinctrl-names = "default"; - phy: phy@2 { - compatible = "microchip,ksz8081"; - reg = <2>; - status = "okay"; - reset-gpios = <&hsgpio1 23 GPIO_ACTIVE_HIGH>; - int-gpios = <&hsgpio0 21 GPIO_ACTIVE_HIGH>; - microchip,interface-type = "rmii"; - }; -}; - -&wwdt { - status = "okay"; -}; - -&dma0 { - status = "okay"; -}; - -&mrt0_channel0 { - status = "okay"; -}; - -&ctimer0 { - status = "okay"; -}; - -&pmu { - reset-causes-en = , - , - ; -}; - -/* OS Timer is the wakeup source for PM mode 2 */ -&os_timer { - status = "okay"; - wakeup-source; -}; - -&systick { - status = "disabled"; -}; - -&adc0 { - status = "okay"; -}; - -&dac0 { - status = "okay"; -}; - -&sctimer { - status = "okay"; - pinctrl-0 = <&pinmux_pwm0>; - pinctrl-names = "default"; -}; - -zephyr_udc0: &usb_otg { - status = "okay"; -}; - -/* - * the default resistors on the board breaks out the MOSI/MISO - * pins to the nets labelled "UART" which go to J1 2 and 4, - * but we are using it for spi mosi and miso here. - * SCK is on J2 6 as labelled. - */ -&flexcomm1 { - compatible = "nxp,lpc-spi"; - pinctrl-0 = <&pinmux_flexcomm1_spi>; - pinctrl-names = "default"; - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; -}; - -arduino_i2c: &flexcomm2 { - compatible = "nxp,lpc-i2c"; - status = "okay"; - clock-frequency = ; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-0 = <&pinmux_flexcomm2_i2c>; - pinctrl-names = "default"; -}; +#include "frdm_rw612_common.dtsi" diff --git a/boards/nxp/frdm_rw612/frdm_rw612_common.dtsi b/boards/nxp/frdm_rw612/frdm_rw612_common.dtsi new file mode 100644 index 000000000000000..2f496ca7796d544 --- /dev/null +++ b/boards/nxp/frdm_rw612/frdm_rw612_common.dtsi @@ -0,0 +1,227 @@ +/* + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "frdm_rw612-pinctrl.dtsi" + +/ { + model = "nxp,frdm_rw612"; + + aliases { + led0 = &green_led; + watchdog0 = &wwdt; + usart-0 = &flexcomm3; + i2c-0 = &flexcomm2; + pwm-0 = &sctimer; + }; + + chosen { + zephyr,sram = &sram_data; + zephyr,flash = &w25q512jvfiq; + zephyr,console = &flexcomm3; + zephyr,shell-uart = &flexcomm3; + }; + + leds { + compatible = "gpio-leds"; + green_led: led_1 { + gpios = <&hsgpio0 12 0>; + }; + }; +}; + +&flexcomm3 { + compatible = "nxp,lpc-usart"; + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&pinmux_flexcomm3_usart>; + pinctrl-names = "default"; +}; + +&flexcomm0 { + compatible = "nxp,lpc-usart"; + status = "disabled"; + current-speed = <115200>; + pinctrl-0 = <&pinmux_flexcomm0_usart>; + pinctrl-names = "default"; +}; + +&hsgpio0 { + status = "okay"; +}; + +&flexspi { + status = "okay"; + ahb-bufferable; + ahb-prefetch; + ahb-cacheable; + ahb-read-addr-opt; + ahb-boundary = "1024"; + rx-clock-source = <1>; + rx-clock-source-b = <1>; + /* Winbond external flash */ + w25q512jvfiq: w25q512jvfiq@0 { + compatible = "nxp,imx-flexspi-nor"; + reg = <0>; + size = ; + status = "okay"; + erase-block-size = <4096>; + write-block-size = <1>; + spi-max-frequency = <104000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 DT_SIZE_K(128)>; + }; + /* The MCUBoot swap-move algorithm uses the last 2 sectors + * of the primary slot0 for swap status and move. + */ + slot0_partition: partition@20000 { + label = "image-0"; + reg = <0x00020000 (DT_SIZE_M(3) + DT_SIZE_K(2 * 4))>; + }; + slot1_partition: partition@323000 { + label = "image-1"; + reg = <0x00323000 DT_SIZE_M(3)>; + }; + storage_partition: partition@623000 { + label = "storage"; + reg = <0x00623000 (DT_SIZE_M(58) - DT_SIZE_K(136))>; + }; + }; + }; + aps6404l: aps6404l@2 { + compatible = "nxp,imx-flexspi-aps6404l"; + /* APS6404L is 8MB, 64MBit pSRAM */ + size = ; + reg = <2>; + spi-max-frequency = <109000000>; + /* PSRAM cannot be enabled while board is in default XIP + * configuration, as it will conflict with flash chip. + */ + status = "disabled"; + cs-interval-unit = <1>; + cs-interval = <2>; + cs-hold-time = <3>; + cs-setup-time = <3>; + data-valid-time = <6>; + column-space = <0>; + ahb-write-wait-unit = <2>; + ahb-write-wait-interval = <0>; + }; +}; + +&hci { + status = "okay"; + wakeup-source; +}; + +&enet_mac { + status = "okay"; + pinctrl-0 = <&pinmux_enet>; + pinctrl-names = "default"; + phy-handle = <&phy>; + zephyr,random-mac-address; + phy-connection-type = "rmii"; +}; + +&enet_mdio { + status = "okay"; + pinctrl-0 = <&pinmux_mdio>; + pinctrl-names = "default"; + phy: phy@2 { + compatible = "microchip,ksz8081"; + reg = <2>; + status = "okay"; + reset-gpios = <&hsgpio1 23 GPIO_ACTIVE_HIGH>; + int-gpios = <&hsgpio0 21 GPIO_ACTIVE_HIGH>; + microchip,interface-type = "rmii"; + }; +}; + +&wwdt { + status = "okay"; +}; + +&dma0 { + status = "okay"; +}; + +&mrt0_channel0 { + status = "okay"; +}; + +&ctimer0 { + status = "okay"; +}; + +&pmu { + reset-causes-en = , + , + ; +}; + +/* OS Timer is the wakeup source for PM mode 2 */ +&os_timer { + status = "okay"; + wakeup-source; +}; + +&systick { + status = "disabled"; +}; + +&adc0 { + status = "okay"; +}; + +&dac0 { + status = "okay"; +}; + +&sctimer { + status = "okay"; + pinctrl-0 = <&pinmux_pwm0>; + pinctrl-names = "default"; +}; + +&nbu { + status = "okay"; + wakeup-source; +}; + +zephyr_udc0: &usb_otg { + status = "okay"; +}; + +/* + * the default resistors on the board breaks out the MOSI/MISO + * pins to the nets labelled "UART" which go to J1 2 and 4, + * but we are using it for spi mosi and miso here. + * SCK is on J2 6 as labelled. + */ +&flexcomm1 { + compatible = "nxp,lpc-spi"; + pinctrl-0 = <&pinmux_flexcomm1_spi>; + pinctrl-names = "default"; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; +}; + +arduino_i2c: &flexcomm2 { + compatible = "nxp,lpc-i2c"; + status = "okay"; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pinmux_flexcomm2_i2c>; + pinctrl-names = "default"; +}; diff --git a/boards/nxp/hexiwear/hexiwear_mk64f12.dts b/boards/nxp/hexiwear/hexiwear_mk64f12.dts index f41b3410c2c8344..b70479153d4ef60 100644 --- a/boards/nxp/hexiwear/hexiwear_mk64f12.dts +++ b/boards/nxp/hexiwear/hexiwear_mk64f12.dts @@ -103,7 +103,7 @@ &ftm3 { status = "okay"; - compatible = "nxp,kinetis-ftm-pwm"; + compatible = "nxp,ftm-pwm"; #pwm-cells = <3>; pinctrl-0 = <&ftm3_default>; pinctrl-names = "default"; diff --git a/boards/nxp/hexiwear/hexiwear_mk64f12.yaml b/boards/nxp/hexiwear/hexiwear_mk64f12.yaml index d8f165c71314e7a..ecf1aa1b8aaab7f 100644 --- a/boards/nxp/hexiwear/hexiwear_mk64f12.yaml +++ b/boards/nxp/hexiwear/hexiwear_mk64f12.yaml @@ -9,6 +9,7 @@ toolchain: supported: - adc - ble + - flash - gpio - i2c - pwm diff --git a/boards/nxp/imx8mm_evk/imx8mm_evk_mimx8mm6_a53.dts b/boards/nxp/imx8mm_evk/imx8mm_evk_mimx8mm6_a53.dts index 57f0a5f1ea637e6..13213ee010c6427 100644 --- a/boards/nxp/imx8mm_evk/imx8mm_evk_mimx8mm6_a53.dts +++ b/boards/nxp/imx8mm_evk/imx8mm_evk_mimx8mm6_a53.dts @@ -16,7 +16,8 @@ chosen { zephyr,console = &uart4; zephyr,shell-uart = &uart4; - zephyr,sram = &sram0; + /* sram node actually locates at DDR DRAM */ + zephyr,sram = &dram; }; cpus { @@ -31,7 +32,7 @@ }; }; - sram0: memory@93c00000 { + dram: memory@93c00000 { reg = <0x93c00000 DT_SIZE_M(1)>; }; }; diff --git a/boards/nxp/imx8mm_evk/imx8mm_evk_mimx8mm6_a53_smp.dts b/boards/nxp/imx8mm_evk/imx8mm_evk_mimx8mm6_a53_smp.dts index f9d9793bba76860..0c1e9c9f86714e9 100644 --- a/boards/nxp/imx8mm_evk/imx8mm_evk_mimx8mm6_a53_smp.dts +++ b/boards/nxp/imx8mm_evk/imx8mm_evk_mimx8mm6_a53_smp.dts @@ -16,7 +16,8 @@ chosen { zephyr,console = &uart4; zephyr,shell-uart = &uart4; - zephyr,sram = &sram0; + /* sram node actually locates at DDR DRAM */ + zephyr,sram = &dram; }; cpus { @@ -33,7 +34,7 @@ method = "smc"; }; - sram0: memory@93c00000 { + dram: memory@93c00000 { reg = <0x93c00000 DT_SIZE_M(1)>; }; }; diff --git a/boards/nxp/imx8mn_evk/imx8mn_evk_mimx8mn6_a53.dts b/boards/nxp/imx8mn_evk/imx8mn_evk_mimx8mn6_a53.dts index 08fd3d7b19cc2d7..60ab0ae04ed8eb9 100644 --- a/boards/nxp/imx8mn_evk/imx8mn_evk_mimx8mn6_a53.dts +++ b/boards/nxp/imx8mn_evk/imx8mn_evk_mimx8mn6_a53.dts @@ -16,7 +16,8 @@ chosen { zephyr,console = &uart4; zephyr,shell-uart = &uart4; - zephyr,sram = &sram0; + /* sram node actually locates at DDR DRAM */ + zephyr,sram = &dram; }; cpus { @@ -31,7 +32,7 @@ }; }; - sram0: memory@93c00000 { + dram: memory@93c00000 { reg = <0x93c00000 DT_SIZE_M(1)>; }; }; diff --git a/boards/nxp/imx8mn_evk/imx8mn_evk_mimx8mn6_a53_smp.dts b/boards/nxp/imx8mn_evk/imx8mn_evk_mimx8mn6_a53_smp.dts index 0d115e359bce94b..2a846615a3aad48 100644 --- a/boards/nxp/imx8mn_evk/imx8mn_evk_mimx8mn6_a53_smp.dts +++ b/boards/nxp/imx8mn_evk/imx8mn_evk_mimx8mn6_a53_smp.dts @@ -16,7 +16,8 @@ chosen { zephyr,console = &uart4; zephyr,shell-uart = &uart4; - zephyr,sram = &sram0; + /* sram node actually locates at DDR DRAM */ + zephyr,sram = &dram; }; cpus { @@ -33,7 +34,7 @@ method = "smc"; }; - sram0: memory@93c00000 { + dram: memory@93c00000 { reg = <0x93c00000 DT_SIZE_M(1)>; }; }; diff --git a/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_a53.dts b/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_a53.dts index 692435c87d3079a..c50173e3f3a73f3 100644 --- a/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_a53.dts +++ b/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_a53.dts @@ -16,7 +16,8 @@ chosen { zephyr,console = &uart4; zephyr,shell-uart = &uart4; - zephyr,sram = &sram0; + /* sram node actually locates at DDR DRAM */ + zephyr,sram = &dram; }; cpus { @@ -31,7 +32,7 @@ }; }; - sram0: memory@c0000000 { + dram: memory@c0000000 { reg = <0xc0000000 DT_SIZE_M(1)>; }; diff --git a/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_a53_smp.dts b/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_a53_smp.dts index 3822987d2a44315..ce1ffeac629c182 100644 --- a/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_a53_smp.dts +++ b/boards/nxp/imx8mp_evk/imx8mp_evk_mimx8ml8_a53_smp.dts @@ -16,7 +16,8 @@ chosen { zephyr,console = &uart4; zephyr,shell-uart = &uart4; - zephyr,sram = &sram0; + /* sram node actually locates at DDR DRAM */ + zephyr,sram = &dram; }; cpus { @@ -33,7 +34,7 @@ method = "smc"; }; - sram0: memory@c0000000 { + dram: memory@c0000000 { reg = <0xc0000000 DT_SIZE_M(1)>; }; diff --git a/boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_adsp.dts b/boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_adsp.dts index 9eddb9385b07fb3..81daabb579f570b 100644 --- a/boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_adsp.dts +++ b/boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_adsp.dts @@ -6,7 +6,7 @@ /dts-v1/; -#include +#include #include "imx8qm_mek_mimx8qm6_adsp-pinctrl.dtsi" / { diff --git a/boards/nxp/imx8qxp_mek/imx8qxp_mek_mimx8qx6_adsp.dts b/boards/nxp/imx8qxp_mek/imx8qxp_mek_mimx8qx6_adsp.dts index f7b1d061d1a1245..460ca19029c2a08 100644 --- a/boards/nxp/imx8qxp_mek/imx8qxp_mek_mimx8qx6_adsp.dts +++ b/boards/nxp/imx8qxp_mek/imx8qxp_mek_mimx8qx6_adsp.dts @@ -6,7 +6,7 @@ /dts-v1/; -#include +#include #include "imx8qxp_mek_mimx8qx6_adsp-pinctrl.dtsi" / { @@ -31,7 +31,3 @@ pinctrl-0 = <&sai1_default>; pinctrl-names = "default"; }; - -&irqsteer { - reg = <0x51080000 DT_SIZE_K(64)>; -}; diff --git a/boards/nxp/imx93_evk/Kconfig.imx93_evk b/boards/nxp/imx93_evk/Kconfig.imx93_evk index 412da581ac6474c..3dec8b2b8baa38d 100644 --- a/boards/nxp/imx93_evk/Kconfig.imx93_evk +++ b/boards/nxp/imx93_evk/Kconfig.imx93_evk @@ -3,5 +3,5 @@ config BOARD_IMX93_EVK select SOC_MIMX9352_A55 if BOARD_IMX93_EVK_MIMX9352_A55 - select SOC_MIMX9352_M33 if BOARD_IMX93_EVK_MIMX9352_M33 + select SOC_MIMX9352_M33 if BOARD_IMX93_EVK_MIMX9352_M33 || BOARD_IMX93_EVK_MIMX9352_M33_DDR select SOC_PART_NUMBER_MIMX9352DVVXM diff --git a/boards/nxp/imx93_evk/board.yml b/boards/nxp/imx93_evk/board.yml index 008156c5fa567d1..f85fa29a0c31082 100644 --- a/boards/nxp/imx93_evk/board.yml +++ b/boards/nxp/imx93_evk/board.yml @@ -4,3 +4,6 @@ board: vendor: nxp socs: - name: mimx9352 + variants: + - name: ddr + cpucluster: m33 diff --git a/boards/nxp/imx93_evk/doc/index.rst b/boards/nxp/imx93_evk/doc/index.rst index 88744045727fb17..d410cd5dd2600b2 100644 --- a/boards/nxp/imx93_evk/doc/index.rst +++ b/boards/nxp/imx93_evk/doc/index.rst @@ -240,10 +240,26 @@ prompt. Use U-Boot to load and kick zephyr.bin to Cortex-M33 Core: +Boot with code from TCM +======================= + .. code-block:: console load mmc 1:1 0x80000000 zephyr.bin;cp.b 0x80000000 0x201e0000 0x30000;bootaux 0x1ffe0000 0 +Boot with code from DDR +======================= + +.. code-block:: console + + load mmc 1:1 0x84000000 zephyr.bin;dcache flush;bootaux 0x84000000 0 + +Note: Cortex M33 need execute permission to run code from DDR memory. In order +to enable this, `imx-atf`_ can to be modified in "plat/imx/imx93/trdc_config.h". + +.. _imx-atf: + https://github.com/nxp-imx/imx-atf + Use this configuration to run basic Zephyr applications and kernel tests, for example, with the :zephyr:code-sample:`synchronization` sample: diff --git a/boards/nxp/imx93_evk/dts/imx93_evk_mimx9352_exp_btn.overlay b/boards/nxp/imx93_evk/dts/imx93_evk_mimx9352_exp_btn.overlay index a2aea33b1f633da..7ebb35dd483d1f8 100644 --- a/boards/nxp/imx93_evk/dts/imx93_evk_mimx9352_exp_btn.overlay +++ b/boards/nxp/imx93_evk/dts/imx93_evk_mimx9352_exp_btn.overlay @@ -23,11 +23,13 @@ btn_1: btn_1{ label = "BTN1"; gpios = <&gpio_exp1 5 GPIO_ACTIVE_LOW>; + zephyr,code = ; }; btn_2: btn_2{ label = "BTN2"; gpios = <&gpio_exp1 6 GPIO_ACTIVE_LOW>; + zephyr,code = ; }; }; }; diff --git a/boards/nxp/imx93_evk/imx93_evk_mimx9352_a55.dts b/boards/nxp/imx93_evk/imx93_evk_mimx9352_a55.dts index 8fbf9edf6ba9316..67272c846b5fd00 100644 --- a/boards/nxp/imx93_evk/imx93_evk_mimx9352_a55.dts +++ b/boards/nxp/imx93_evk/imx93_evk_mimx9352_a55.dts @@ -8,6 +8,7 @@ #include #include "imx93_evk-pinctrl.dtsi" +#include / { model = "NXP i.MX93 A55"; @@ -16,7 +17,8 @@ chosen { zephyr,console = &lpuart2; zephyr,shell-uart = &lpuart2; - zephyr,sram = &sram0; + /* sram node actually locates at DDR DRAM */ + zephyr,sram = &dram; zephyr,canbus = &flexcan2; }; @@ -26,7 +28,7 @@ }; }; - sram0: memory@d0000000 { + dram: memory@d0000000 { reg = <0xd0000000 DT_SIZE_M(1)>; }; @@ -58,11 +60,13 @@ btn_1: btn_1{ label = "BTN1"; gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; + zephyr,code = ; }; btn_2: btn_2{ label = "BTN2"; gpios = <&gpio2 24 GPIO_ACTIVE_LOW>; + zephyr,code = ; }; }; diff --git a/boards/nxp/imx93_evk/imx93_evk_mimx9352_m33.dts b/boards/nxp/imx93_evk/imx93_evk_mimx9352_m33.dts index 5c75e10ccc9fce6..e8db0b549295d0d 100644 --- a/boards/nxp/imx93_evk/imx93_evk_mimx9352_m33.dts +++ b/boards/nxp/imx93_evk/imx93_evk_mimx9352_m33.dts @@ -8,6 +8,7 @@ #include #include "imx93_evk-pinctrl.dtsi" +#include / { model = "NXP i.MX93 EVK board"; @@ -50,11 +51,13 @@ btn_1: btn_1{ label = "BTN1"; gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; + zephyr,code = ; }; btn_2: btn_2{ label = "BTN2"; gpios = <&gpio2 24 GPIO_ACTIVE_LOW>; + zephyr,code = ; }; }; }; diff --git a/boards/nxp/imx93_evk/imx93_evk_mimx9352_m33_ddr.dts b/boards/nxp/imx93_evk/imx93_evk_mimx9352_m33_ddr.dts new file mode 100644 index 000000000000000..7c690afd3f38453 --- /dev/null +++ b/boards/nxp/imx93_evk/imx93_evk_mimx9352_m33_ddr.dts @@ -0,0 +1,23 @@ +/* + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include "imx93_evk_mimx9352_m33.dts" + +/ { + model = "NXP i.MX93 EVK board DDR variant"; + + chosen { + zephyr,sram = &ddr; + /delete-property/ zephyr,flash; + }; + + ddr: memory@84000000 { + device_type = "memory"; + reg = <0x84000000 DT_SIZE_M(4)>; + }; +}; diff --git a/boards/nxp/imx93_evk/imx93_evk_mimx9352_m33_ddr.yaml b/boards/nxp/imx93_evk/imx93_evk_mimx9352_m33_ddr.yaml new file mode 100644 index 000000000000000..a322cb1ed7cf63d --- /dev/null +++ b/boards/nxp/imx93_evk/imx93_evk_mimx9352_m33_ddr.yaml @@ -0,0 +1,16 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +identifier: imx93_evk/mimx9352/m33/ddr +name: NXP i.MX93 EVK M33 DDR +type: mcu +arch: arm +toolchain: + - zephyr + - cross-compile +ram: 4096 +flash: 0 +supported: + - gpio + - uart +vendor: nxp diff --git a/boards/nxp/imx93_evk/imx93_evk_mimx9352_m33_ddr_defconfig b/boards/nxp/imx93_evk/imx93_evk_mimx9352_m33_ddr_defconfig new file mode 100644 index 000000000000000..75cc33576826e24 --- /dev/null +++ b/boards/nxp/imx93_evk/imx93_evk_mimx9352_m33_ddr_defconfig @@ -0,0 +1,9 @@ +# Copyright 2024 NXP +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CLOCK_CONTROL=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y +CONFIG_UART_INTERRUPT_DRIVEN=y +CONFIG_CONSOLE=y +CONFIG_XIP=n diff --git a/boards/nxp/imx95_evk/imx95_evk_mimx9596_a55.dts b/boards/nxp/imx95_evk/imx95_evk_mimx9596_a55.dts index 8cf6aa2a949c38b..62997746f44f6b6 100644 --- a/boards/nxp/imx95_evk/imx95_evk_mimx9596_a55.dts +++ b/boards/nxp/imx95_evk/imx95_evk_mimx9596_a55.dts @@ -16,7 +16,8 @@ chosen { zephyr,console = &lpuart1; zephyr,shell-uart = &lpuart1; - zephyr,sram = &sram0; + /* sram node actually locates at DDR DRAM */ + zephyr,sram = &dram; }; cpus { @@ -41,7 +42,7 @@ }; }; - sram0: memory@d0000000 { + dram: memory@d0000000 { reg = <0xd0000000 DT_SIZE_M(1)>; }; }; diff --git a/boards/nxp/imx95_evk/imx95_evk_mimx9596_a55_smp.dts b/boards/nxp/imx95_evk/imx95_evk_mimx9596_a55_smp.dts index 3cf7ce362a8ff12..cdb7edf2f74497f 100644 --- a/boards/nxp/imx95_evk/imx95_evk_mimx9596_a55_smp.dts +++ b/boards/nxp/imx95_evk/imx95_evk_mimx9596_a55_smp.dts @@ -16,7 +16,7 @@ chosen { zephyr,console = &lpuart1; zephyr,shell-uart = &lpuart1; - zephyr,sram = &sram0; + zephyr,sram = &dram; }; psci { @@ -24,7 +24,7 @@ method = "smc"; }; - sram0: memory@d0000000 { + dram: memory@d0000000 { reg = <0xd0000000 DT_SIZE_M(1)>; }; }; diff --git a/boards/nxp/lpcxpresso54114/lpcxpresso54114_lpc54114_m4.yaml b/boards/nxp/lpcxpresso54114/lpcxpresso54114_lpc54114_m4.yaml index c539b58e4425dc5..f2ed30e6976ffd0 100644 --- a/boards/nxp/lpcxpresso54114/lpcxpresso54114_lpc54114_m4.yaml +++ b/boards/nxp/lpcxpresso54114/lpcxpresso54114_lpc54114_m4.yaml @@ -17,6 +17,7 @@ toolchain: supported: - arduino_i2c - arduino_spi + - flash - gpio - i2c - spi diff --git a/boards/nxp/lpcxpresso55s06/lpcxpresso55s06.yaml b/boards/nxp/lpcxpresso55s06/lpcxpresso55s06.yaml index fcf89bfe0adbce7..f6cbb2e4e6e43a2 100644 --- a/boards/nxp/lpcxpresso55s06/lpcxpresso55s06.yaml +++ b/boards/nxp/lpcxpresso55s06/lpcxpresso55s06.yaml @@ -14,6 +14,7 @@ toolchain: - gnuarmemb - xtools supported: - - gpio - can + - flash + - gpio vendor: nxp diff --git a/boards/nxp/lpcxpresso55s16/lpcxpresso55s16.yaml b/boards/nxp/lpcxpresso55s16/lpcxpresso55s16.yaml index 22bd86054f71e51..8b930b43ae5f5d3 100644 --- a/boards/nxp/lpcxpresso55s16/lpcxpresso55s16.yaml +++ b/boards/nxp/lpcxpresso55s16/lpcxpresso55s16.yaml @@ -20,6 +20,7 @@ supported: - arduino_spi - can - counter + - flash - gpio - i2c - spi diff --git a/boards/nxp/lpcxpresso55s28/lpcxpresso55s28.yaml b/boards/nxp/lpcxpresso55s28/lpcxpresso55s28.yaml index e1a9e030630abc8..898d75c9c273705 100644 --- a/boards/nxp/lpcxpresso55s28/lpcxpresso55s28.yaml +++ b/boards/nxp/lpcxpresso55s28/lpcxpresso55s28.yaml @@ -19,6 +19,7 @@ supported: - arduino_gpio - arduino_i2c - arduino_spi + - flash - gpio - i2c - spi diff --git a/boards/nxp/lpcxpresso55s36/lpcxpresso55s36.yaml b/boards/nxp/lpcxpresso55s36/lpcxpresso55s36.yaml index 7b78c661414b0cb..aec2ca1f6ac977f 100644 --- a/boards/nxp/lpcxpresso55s36/lpcxpresso55s36.yaml +++ b/boards/nxp/lpcxpresso55s36/lpcxpresso55s36.yaml @@ -15,11 +15,12 @@ toolchain: - gnuarmemb - xtools supported: + - arduino_gpio - can + - dac + - flash - gpio - pwm - - dac - usb_device - usbd - - arduino_gpio vendor: nxp diff --git a/boards/nxp/lpcxpresso55s69/lpcxpresso55s69_lpc55s69_cpu0.yaml b/boards/nxp/lpcxpresso55s69/lpcxpresso55s69_lpc55s69_cpu0.yaml index 3db20c3abca0c37..bd616045798e7d4 100644 --- a/boards/nxp/lpcxpresso55s69/lpcxpresso55s69_lpc55s69_cpu0.yaml +++ b/boards/nxp/lpcxpresso55s69/lpcxpresso55s69_lpc55s69_cpu0.yaml @@ -21,6 +21,7 @@ supported: - arduino_serial - arduino_spi - counter + - flash - gpio - i2c - i2s diff --git a/boards/nxp/mimxrt1010_evk/mimxrt1010_evk.yaml b/boards/nxp/mimxrt1010_evk/mimxrt1010_evk.yaml index 5441b064091c5e3..f9c8719a8dedfa7 100644 --- a/boards/nxp/mimxrt1010_evk/mimxrt1010_evk.yaml +++ b/boards/nxp/mimxrt1010_evk/mimxrt1010_evk.yaml @@ -16,15 +16,16 @@ toolchain: ram: 64 flash: 16384 supported: + - adc - arduino_gpio - arduino_i2c - arduino_serial - arduino_spi - - i2c - counter - dma - - usb_device - - spi - - adc + - flash - gpio + - i2c + - spi + - usb_device vendor: nxp diff --git a/boards/nxp/mimxrt1015_evk/mimxrt1015_evk.yaml b/boards/nxp/mimxrt1015_evk/mimxrt1015_evk.yaml index b3c0b6d4d9ce6a7..80afd63da22b740 100644 --- a/boards/nxp/mimxrt1015_evk/mimxrt1015_evk.yaml +++ b/boards/nxp/mimxrt1015_evk/mimxrt1015_evk.yaml @@ -15,13 +15,14 @@ toolchain: ram: 32 flash: 16384 supported: + - adc - arduino_gpio - arduino_serial - counter - dma + - flash - gpio - i2c - - usb_device - spi - - adc + - usb_device vendor: nxp diff --git a/boards/nxp/mimxrt1020_evk/mimxrt1020_evk.yaml b/boards/nxp/mimxrt1020_evk/mimxrt1020_evk.yaml index eebbc18ba84a4e7..88c5629fa0c9ff6 100644 --- a/boards/nxp/mimxrt1020_evk/mimxrt1020_evk.yaml +++ b/boards/nxp/mimxrt1020_evk/mimxrt1020_evk.yaml @@ -15,15 +15,16 @@ toolchain: ram: 32768 flash: 8192 supported: + - adc - arduino_gpio - arduino_serial - counter - dma + - flash - gpio - i2c - netif:eth + - sdhc - spi - usb_device - - adc - - sdhc vendor: nxp diff --git a/boards/nxp/mimxrt1024_evk/mimxrt1024_evk.yaml b/boards/nxp/mimxrt1024_evk/mimxrt1024_evk.yaml index ca12b2517c032f7..67fad31a54d8d81 100644 --- a/boards/nxp/mimxrt1024_evk/mimxrt1024_evk.yaml +++ b/boards/nxp/mimxrt1024_evk/mimxrt1024_evk.yaml @@ -15,17 +15,18 @@ toolchain: ram: 32768 flash: 4096 supported: + - adc - arduino_gpio - arduino_serial - can - dma + - flash + - gpio - hwinfo - netif:eth - - watchdog - - spi + - pwm - sdhc - - adc + - spi - usb_device - - pwm - - gpio + - watchdog vendor: nxp diff --git a/boards/nxp/mimxrt1040_evk/mimxrt1040_evk.yaml b/boards/nxp/mimxrt1040_evk/mimxrt1040_evk.yaml index 5044627b19b146b..3d5aeefadcd52cd 100644 --- a/boards/nxp/mimxrt1040_evk/mimxrt1040_evk.yaml +++ b/boards/nxp/mimxrt1040_evk/mimxrt1040_evk.yaml @@ -15,11 +15,12 @@ toolchain: ram: 32768 flash: 8192 supported: + - adc - arduino_gpio + - counter + - flash - gpio + - i2c - pwm - - adc - spi - - i2c - - counter vendor: nxp diff --git a/boards/nxp/mimxrt1050_evk/Kconfig.defconfig b/boards/nxp/mimxrt1050_evk/Kconfig.defconfig index 566038501958253..90fc7a76598f5d5 100644 --- a/boards/nxp/mimxrt1050_evk/Kconfig.defconfig +++ b/boards/nxp/mimxrt1050_evk/Kconfig.defconfig @@ -10,6 +10,7 @@ config DEVICE_CONFIGURATION_DATA config NXP_IMX_EXTERNAL_SDRAM default y + if NETWORKING config NET_L2_ETHERNET diff --git a/boards/nxp/mimxrt1050_evk/board.cmake b/boards/nxp/mimxrt1050_evk/board.cmake index c53e6474ca1bc78..321eeee81344534 100644 --- a/boards/nxp/mimxrt1050_evk/board.cmake +++ b/boards/nxp/mimxrt1050_evk/board.cmake @@ -3,10 +3,17 @@ # # SPDX-License-Identifier: Apache-2.0 # + +if(NOT ("${BOARD_QUALIFIERS}" MATCHES "qspi" + OR "${BOARD_QUALIFIERS}" MATCHES "hyperflash")) + message(FATAL_ERROR "Please specify a board flash variant for the mimxrt1050_evk:\n" + "mimxrt1050_evk/mimxrt1052/qspi or mimxrt1050_evk/mimxrt1052/hyperflash\n") +endif() + board_runner_args(jlink "--device=MCIMXRT1052") board_runner_args(linkserver "--device=MIMXRT1052xxxxB:EVKB-IMXRT1050") -if("${BOARD_REVISION}" STREQUAL "qspi") +if("${BOARD_QUALIFIERS}" MATCHES "qspi") board_runner_args(jlink "--loader=BankAddr=0x60000000&Loader=QSPI") board_runner_args(pyocd "--target=mimxrt1050_quadspi") board_runner_args(linkserver "--override=/device/memory/3/flash-driver=MIMXRT1050_SFDP_QSPI.cfx") diff --git a/boards/nxp/mimxrt1050_evk/board.yml b/boards/nxp/mimxrt1050_evk/board.yml index 48b8680e4b5cd47..0d06dbd8d1a5bd4 100644 --- a/boards/nxp/mimxrt1050_evk/board.yml +++ b/boards/nxp/mimxrt1050_evk/board.yml @@ -4,9 +4,6 @@ board: vendor: nxp socs: - name: mimxrt1052 - revision: - format: "custom" - default: "hyperflash" - revisions: - - name: "hyperflash" - - name: "qspi" + variants: + - name: hyperflash + - name: qspi diff --git a/boards/nxp/mimxrt1050_evk/doc/index.rst b/boards/nxp/mimxrt1050_evk/doc/index.rst index 71e4fd4b967221f..379498dd33b6810 100644 --- a/boards/nxp/mimxrt1050_evk/doc/index.rst +++ b/boards/nxp/mimxrt1050_evk/doc/index.rst @@ -138,7 +138,7 @@ already supported, which can also be re-used on this mimxrt1050_evk board: +-----------+------------+-------------------------------------+ The default configuration can be found in -:zephyr_file:`boards/nxp/mimxrt1050_evk/mimxrt1050_evk_defconfig` +:zephyr_file:`boards/nxp/mimxrt1050_evk/mimxrt1050_evk_hyperflash_defconfig` Other hardware features are not currently supported by the port. @@ -298,6 +298,17 @@ The RT1050 SoC has two USB OTG (USBOTG) controllers that supports both device and host functions through its micro USB connectors. Only USB device function is supported in Zephyr at the moment. +Board Targets +************* + +This board has two variants that can be targeted, +depending on which flash to set as ``zephyr,flash``: + +* ``mimxrt1050_evk/mimxrt1052/hyperflash`` is the default variant for the out of box + setup of the board using hyperflash. +* ``mimxrt1050_evk/mimxrt1052/qspi`` is for a board that has been reworked to use the + qspi flash instead of hyperflash. + Programming and Debugging ************************* @@ -364,7 +375,7 @@ Here is an example for the :zephyr:code-sample:`hello_world` application. .. zephyr-app-commands:: :zephyr-app: samples/hello_world - :board: mimxrt1050_evk + :board: mimxrt1050_evk//hyperflash :goals: flash Open a serial terminal, reset the board (press the SW4 button), and you should @@ -373,7 +384,7 @@ see the following message in the terminal: .. code-block:: console ***** Booting Zephyr OS v1.14.0-rc1 ***** - Hello World! mimxrt1050_evk + Hello World! mimxrt1050_evk//hyperflash Debugging ========= @@ -382,7 +393,7 @@ Here is an example for the :zephyr:code-sample:`hello_world` application. .. zephyr-app-commands:: :zephyr-app: samples/hello_world - :board: mimxrt1050_evk + :board: mimxrt1050_evk//hyperflash :goals: debug Open a serial terminal, step through the application in your debugger, and you @@ -391,7 +402,7 @@ should see the following message in the terminal: .. code-block:: console ***** Booting Zephyr OS v1.14.0-rc1 ***** - Hello World! mimxrt1050_evk + Hello World! mimxrt1050_evk//hyperflash Troubleshooting =============== diff --git a/boards/nxp/mimxrt1050_evk/mimxrt1050_evk.dts b/boards/nxp/mimxrt1050_evk/mimxrt1050_evk.dtsi similarity index 100% rename from boards/nxp/mimxrt1050_evk/mimxrt1050_evk.dts rename to boards/nxp/mimxrt1050_evk/mimxrt1050_evk.dtsi diff --git a/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_defconfig b/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_hyperflash_defconfig similarity index 100% rename from boards/nxp/mimxrt1050_evk/mimxrt1050_evk_defconfig rename to boards/nxp/mimxrt1050_evk/mimxrt1050_evk_hyperflash_defconfig diff --git a/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_hyperflash.dts b/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_hyperflash.dts new file mode 100644 index 000000000000000..e0aa389326aa45f --- /dev/null +++ b/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_hyperflash.dts @@ -0,0 +1,72 @@ +/* + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "mimxrt1050_evk.dtsi" + +/ { + chosen { + zephyr,flash-controller = &s26ks512s0; + zephyr,flash = &s26ks512s0; + zephyr,code-partition = &slot0_partition; + }; +}; + +&flexspi { + status = "okay"; + ahb-prefetch; + ahb-read-addr-opt; + pinctrl-0 = <&pinmux_flexspi1>; + pinctrl-names = "default"; + ahb-bufferable; + ahb-cacheable; + sck-differential-clock; + combination-mode; + rx-clock-source = <3>; + reg = <0x402a8000 0x4000>, <0x60000000 DT_SIZE_M(64)>; + s26ks512s0: s26ks512s@0 { + compatible = "nxp,imx-flexspi-hyperflash"; + size = ; + reg = <0>; + spi-max-frequency = <166000000>; + word-addressable; + cs-interval-unit = <1>; + cs-interval = <2>; + cs-hold-time = <0>; + cs-setup-time = <3>; + data-valid-time = <1>; + column-space = <3>; + ahb-write-wait-unit = <2>; + ahb-write-wait-interval = <20>; + status = "okay"; + erase-block-size = ; + write-block-size = <16>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 DT_SIZE_K(256)>; + }; + /* The MCUBoot swap-move algorithm uses the last 2 sectors + * of the primary slot0 for swap status and move. + */ + slot0_partition: partition@40000 { + label = "image-0"; + reg = <0x00040000 (DT_SIZE_M(3) + DT_SIZE_K(512))>; + }; + slot1_partition: partition@3C0000 { + label = "image-1"; + reg = <0x003C0000 DT_SIZE_M(3)>; + }; + storage_partition: partition@6C0000 { + label = "storage"; + reg = <0x006C0000 (DT_SIZE_M(58) - DT_SIZE_K(768))>; + }; + }; + }; +}; diff --git a/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_hyperflash.overlay b/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_hyperflash.overlay deleted file mode 100644 index 346aaca819f8cc4..000000000000000 --- a/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_hyperflash.overlay +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright 2024 NXP - * - * SPDX-License-Identifier: Apache-2.0 - */ - -/ { - chosen { - zephyr,flash-controller = &s26ks512s0; - zephyr,flash = &s26ks512s0; - zephyr,code-partition = &slot0_partition; - }; -}; - -&flexspi { - status = "okay"; - ahb-prefetch; - ahb-read-addr-opt; - pinctrl-0 = <&pinmux_flexspi1>; - pinctrl-names = "default"; - ahb-bufferable; - ahb-cacheable; - sck-differential-clock; - combination-mode; - rx-clock-source = <3>; - reg = <0x402a8000 0x4000>, <0x60000000 DT_SIZE_M(64)>; - s26ks512s0: s26ks512s@0 { - compatible = "nxp,imx-flexspi-hyperflash"; - size = ; - reg = <0>; - spi-max-frequency = <166000000>; - word-addressable; - cs-interval-unit = <1>; - cs-interval = <2>; - cs-hold-time = <0>; - cs-setup-time = <3>; - data-valid-time = <1>; - column-space = <3>; - ahb-write-wait-unit = <2>; - ahb-write-wait-interval = <20>; - status = "okay"; - erase-block-size = ; - write-block-size = <16>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 DT_SIZE_K(256)>; - }; - /* The MCUBoot swap-move algorithm uses the last 2 sectors - * of the primary slot0 for swap status and move. - */ - slot0_partition: partition@40000 { - label = "image-0"; - reg = <0x00040000 (DT_SIZE_M(3) + DT_SIZE_K(512))>; - }; - slot1_partition: partition@3C0000 { - label = "image-1"; - reg = <0x003C0000 DT_SIZE_M(3)>; - }; - storage_partition: partition@6C0000 { - label = "storage"; - reg = <0x006C0000 (DT_SIZE_M(58) - DT_SIZE_K(768))>; - }; - }; - }; -}; diff --git a/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_hyperflash.yaml b/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_hyperflash.yaml index 211c0e9aebd77aa..c44f53326df0801 100644 --- a/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_hyperflash.yaml +++ b/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_hyperflash.yaml @@ -4,7 +4,7 @@ # SPDX-License-Identifier: Apache-2.0 # -identifier: mimxrt1050_evk +identifier: mimxrt1050_evk/mimxrt1052/hyperflash name: NXP MIMXRT1050-EVK type: mcu arch: arm @@ -15,11 +15,13 @@ toolchain: ram: 32768 flash: 65536 supported: + - adc - arduino_gpio - arduino_serial - counter - display - dma + - flash - gpio - i2c - netif:eth @@ -28,5 +30,4 @@ supported: - usb_device - usbd - watchdog - - adc vendor: nxp diff --git a/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_qspi.dts b/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_qspi.dts new file mode 100644 index 000000000000000..ca5a924d282dfc3 --- /dev/null +++ b/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_qspi.dts @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2017, NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "mimxrt1050_evk.dtsi" + +/ { + chosen { + zephyr,flash-controller = &is25wp064; + zephyr,flash = &is25wp064; + zephyr,code-partition = &slot0_partition; + }; +}; + +&flexspi { + status = "okay"; + ahb-prefetch; + ahb-read-addr-opt; + rx-clock-source = <1>; + reg = <0x402a8000 0x4000>, <0x60000000 DT_SIZE_M(8)>; + is25wp064: is25wp064@0 { + compatible = "nxp,imx-flexspi-nor"; + size = <67108864>; + reg = <0>; + spi-max-frequency = <104000000>; + status = "okay"; + jedec-id = [9d 70 17]; + erase-block-size = <4096>; + write-block-size = <1>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 DT_SIZE_K(128)>; + }; + /* The MCUBoot swap-move algorithm uses the last 2 sectors + * of the primary slot0 for swap status and move. + */ + slot0_partition: partition@20000 { + label = "image-0"; + reg = <0x00020000 (DT_SIZE_M(3) + DT_SIZE_K(8))>; + }; + slot1_partition: partition@322000 { + label = "image-1"; + reg = <0x00322000 DT_SIZE_M(3)>; + }; + storage_partition: partition@622000 { + label = "storage"; + reg = <0x00622000 (DT_SIZE_M(2) - DT_SIZE_K(136))>; + }; + }; + }; +}; diff --git a/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_qspi.overlay b/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_qspi.overlay deleted file mode 100644 index 4930433268aac30..000000000000000 --- a/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_qspi.overlay +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (c) 2017, NXP - * - * SPDX-License-Identifier: Apache-2.0 - */ - -/ { - chosen { - zephyr,flash-controller = &is25wp064; - zephyr,flash = &is25wp064; - zephyr,code-partition = &slot0_partition; - }; -}; - -&flexspi { - status = "okay"; - ahb-prefetch; - ahb-read-addr-opt; - rx-clock-source = <1>; - reg = <0x402a8000 0x4000>, <0x60000000 DT_SIZE_M(8)>; - is25wp064: is25wp064@0 { - compatible = "nxp,imx-flexspi-nor"; - size = <67108864>; - reg = <0>; - spi-max-frequency = <104000000>; - status = "okay"; - jedec-id = [9d 70 17]; - erase-block-size = <4096>; - write-block-size = <1>; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 DT_SIZE_K(128)>; - }; - /* The MCUBoot swap-move algorithm uses the last 2 sectors - * of the primary slot0 for swap status and move. - */ - slot0_partition: partition@20000 { - label = "image-0"; - reg = <0x00020000 (DT_SIZE_M(3) + DT_SIZE_K(8))>; - }; - slot1_partition: partition@322000 { - label = "image-1"; - reg = <0x00322000 DT_SIZE_M(3)>; - }; - storage_partition: partition@622000 { - label = "storage"; - reg = <0x00622000 (DT_SIZE_M(2) - DT_SIZE_K(136))>; - }; - }; - }; -}; diff --git a/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_qspi.yaml b/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_qspi.yaml index a9adaba05264667..68c150c93664fd4 100644 --- a/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_qspi.yaml +++ b/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_qspi.yaml @@ -4,7 +4,7 @@ # SPDX-License-Identifier: Apache-2.0 # -identifier: mimxrt1050_evk@qspi +identifier: mimxrt1050_evk/mimxrt1052/qspi name: NXP MIMXRT1050-EVK-QSPI type: mcu arch: arm @@ -15,11 +15,13 @@ toolchain: ram: 32768 flash: 8192 supported: + - adc - arduino_gpio - arduino_serial - counter - display - dma + - flash - gpio - i2c - netif:eth @@ -28,5 +30,4 @@ supported: - usb_device - usbd - watchdog - - adc vendor: nxp diff --git a/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_qspi_defconfig b/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_qspi_defconfig new file mode 100644 index 000000000000000..a9e39fa1d739fe6 --- /dev/null +++ b/boards/nxp/mimxrt1050_evk/mimxrt1050_evk_mimxrt1052_qspi_defconfig @@ -0,0 +1,12 @@ +# +# Copyright (c) 2017, NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_GPIO=y +CONFIG_ARM_MPU=y +CONFIG_HW_STACK_PROTECTION=y diff --git a/boards/nxp/mimxrt1050_evk/revision.cmake b/boards/nxp/mimxrt1050_evk/revision.cmake deleted file mode 100644 index 3e6f006a735b5b4..000000000000000 --- a/boards/nxp/mimxrt1050_evk/revision.cmake +++ /dev/null @@ -1,7 +0,0 @@ -if (NOT DEFINED BOARD_REVISION) - set(BOARD_REVISION "hyperflash") -else () - if (NOT (BOARD_REVISION STREQUAL "hyperflash") AND NOT (BOARD_REVISION STREQUAL "qspi")) - message(FATAL_ERROR "Invalid board revision, ${BOARD_REVISION}, valid revisions are: hyperflash, qspi") - endif() -endif() diff --git a/boards/nxp/mimxrt1060_evk/CMakeLists.txt b/boards/nxp/mimxrt1060_evk/CMakeLists.txt index 29c2d6f9068a623..2778972698b482b 100644 --- a/boards/nxp/mimxrt1060_evk/CMakeLists.txt +++ b/boards/nxp/mimxrt1060_evk/CMakeLists.txt @@ -12,7 +12,7 @@ endif() if(CONFIG_NXP_IMXRT_BOOT_HEADER) zephyr_library() - if(CONFIG_BOARD_MIMXRT1060_EVKB) + if(${BOARD_REVISION} STREQUAL "B") set(FLASH_CONF evkbmimxrt1060_flexspi_nor_config.c) set(BOARD_NAME evkbmimxrt1060) elseif(CONFIG_DT_HAS_NXP_IMX_FLEXSPI_NOR_ENABLED) diff --git a/boards/nxp/mimxrt1060_evk/Kconfig.defconfig b/boards/nxp/mimxrt1060_evk/Kconfig.defconfig index 899e8b3ffe0f229..bc06c96f7b80aeb 100644 --- a/boards/nxp/mimxrt1060_evk/Kconfig.defconfig +++ b/boards/nxp/mimxrt1060_evk/Kconfig.defconfig @@ -3,7 +3,7 @@ # Copyright 2018,2023 NXP # SPDX-License-Identifier: Apache-2.0 -if BOARD_MIMXRT1060_EVK || BOARD_MIMXRT1060_EVKB +if BOARD_MIMXRT1060_EVK config DEVICE_CONFIGURATION_DATA default y @@ -25,4 +25,4 @@ endif # ETH_MCUX endif # NETWORKING -endif # BOARD_MIMXRT1060_EVK || BOARD_MIMXRT1060_EVKB +endif # BOARD_MIMXRT1060_EVK diff --git a/boards/nxp/mimxrt1060_evk/Kconfig.mimxrt1060_evkb b/boards/nxp/mimxrt1060_evk/Kconfig.mimxrt1060_evkb deleted file mode 100644 index d2f59c8c9cfa906..000000000000000 --- a/boards/nxp/mimxrt1060_evk/Kconfig.mimxrt1060_evkb +++ /dev/null @@ -1,5 +0,0 @@ -# Copyright 2024 NXP -# SPDX-License-Identifier: Apache-2.0 - -config BOARD_MIMXRT1060_EVKB - select SOC_PART_NUMBER_MIMXRT1062DVL6A diff --git a/boards/nxp/mimxrt1060_evk/board.cmake b/boards/nxp/mimxrt1060_evk/board.cmake index 722afd541f71209..e6748688a789995 100644 --- a/boards/nxp/mimxrt1060_evk/board.cmake +++ b/boards/nxp/mimxrt1060_evk/board.cmake @@ -4,13 +4,19 @@ # SPDX-License-Identifier: Apache-2.0 # +if(NOT ("${BOARD_QUALIFIERS}" MATCHES "qspi" + OR "${BOARD_QUALIFIERS}" MATCHES "hyperflash")) + message(FATAL_ERROR "Please specify a board flash variant for the mimxrt1060_evk:\n" + "mimxrt1060_evk/mimxrt1062/qspi or mimxrt1060_evk/mimxrt1062/hyperflash\n") +endif() + board_runner_args(pyocd "--target=mimxrt1060") board_runner_args(jlink "--device=MIMXRT1062xxx6A") board_runner_args(linkserver "--device=MIMXRT1062xxxxA:EVK-MIMXRT1060") -if (("${BOARD_REVISION}" STREQUAL "qspi") OR CONFIG_BOARD_MIMXRT1060_EVKB) +if(("${BOARD_QUALIFIERS}" MATCHES "qspi") OR ("${BOARD_REVISION}" STREQUAL "B")) board_runner_args(jlink "--loader=BankAddr=0x60000000&Loader=QSPI") -elseif ("${BOARD_REVISION}" STREQUAL "hyperflash") +elseif ("${BOARD_QUALIFIERS}" MATCHES "hyperflash") board_runner_args(jlink "--loader=BankAddr=0x60000000&Loader=HyperFlash") endif() diff --git a/boards/nxp/mimxrt1060_evk/board.yml b/boards/nxp/mimxrt1060_evk/board.yml index 8039cf65e423441..30a5701b1feb7ed 100644 --- a/boards/nxp/mimxrt1060_evk/board.yml +++ b/boards/nxp/mimxrt1060_evk/board.yml @@ -2,16 +2,14 @@ boards: - name: mimxrt1060_evk full_name: MIMXRT1060-EVK vendor: nxp - revision: - format: "custom" - default: "qspi" - revisions: - - name: "qspi" - - name: "hyperflash" - socs: - - name: mimxrt1062 - - name: mimxrt1060_evkb - full_name: MIMXRT1060-EVKB - vendor: nxp socs: - name: mimxrt1062 + variants: + - name: "qspi" + - name: "hyperflash" + revision: + format: "letter" + default: "A" + revisions: + - name: "A" + - name: "B" diff --git a/boards/nxp/mimxrt1060_evk/doc/index.rst b/boards/nxp/mimxrt1060_evk/doc/index.rst index a28a059ae2b9082..940ca2a593ecfc9 100644 --- a/boards/nxp/mimxrt1060_evk/doc/index.rst +++ b/boards/nxp/mimxrt1060_evk/doc/index.rst @@ -150,7 +150,7 @@ already supported, which can also be re-used on this mimxrt1060_evk board: +-----------+------------+-------------------------------------+ The default configuration can be found in -:zephyr_file:`boards/nxp/mimxrt1060_evk/mimxrt1060_evk_defconfig` +:zephyr_file:`boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi_defconfig` Other hardware features are not currently supported by the port. @@ -316,6 +316,19 @@ The MIMXRT1060 SoC has eight UARTs. ``LPUART1`` is configured for the console, ``LPUART3`` for the Bluetooth Host Controller Interface (BT HCI), and the remaining are not used. +Board Targets +************* + +This board has two variants that can be targeted, +depending on which flash to set as ``zephyr,flash``: + +* ``mimxrt1060_evk/mimxrt1062/qspi`` is the default variant for the out of box + setup of the board using the qspi flash. +* ``mimxrt1060_evk/mimxrt1062/hyperflash`` is for a board that has been reworked to use the + hyperflash instead of the qspi flash. +* This board also has two revisions, the EVKA and EVKB. EVKA is the default target for this board. + To target EVKB, the board target string would become ``mimxrt1060_evk@B//qspi``, for example. + Programming and Debugging ************************* @@ -376,7 +389,7 @@ Here is an example for the :zephyr:code-sample:`hello_world` application. .. zephyr-app-commands:: :zephyr-app: samples/hello_world - :board: mimxrt1060_evk + :board: mimxrt1060_evk//qspi :goals: flash Open a serial terminal, reset the board (press the SW9 button), and you should @@ -385,7 +398,7 @@ see the following message in the terminal: .. code-block:: console ***** Booting Zephyr OS v1.14.0-rc1 ***** - Hello World! mimxrt1060_evk + Hello World! mimxrt1060_evk//qspi Debugging ========= @@ -394,7 +407,7 @@ Here is an example for the :zephyr:code-sample:`hello_world` application. .. zephyr-app-commands:: :zephyr-app: samples/hello_world - :board: mimxrt1060_evk + :board: mimxrt1060_evk//qspi :goals: debug Open a serial terminal, step through the application in your debugger, and you @@ -403,7 +416,7 @@ should see the following message in the terminal: .. code-block:: console ***** Booting Zephyr OS v1.14.0-rc1 ***** - Hello World! mimxrt1060_evk + Hello World! mimxrt1060_evk//qspi Troubleshooting =============== diff --git a/boards/nxp/mimxrt1060_evk/mimxrt1060_evk.dts b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk.dtsi similarity index 100% rename from boards/nxp/mimxrt1060_evk/mimxrt1060_evk.dts rename to boards/nxp/mimxrt1060_evk/mimxrt1060_evk.dtsi diff --git a/boards/nxp/mimxrt1060_evk/mimxrt1060_evkb_defconfig b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_B_defconfig similarity index 100% rename from boards/nxp/mimxrt1060_evk/mimxrt1060_evkb_defconfig rename to boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_B_defconfig diff --git a/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_hyperflash.dts b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_hyperflash.dts new file mode 100644 index 000000000000000..125f0fecd185a86 --- /dev/null +++ b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_hyperflash.dts @@ -0,0 +1,70 @@ +/* + * Copyright (c) 2018, NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "mimxrt1060_evk.dtsi" + +/ { + chosen { + zephyr,flash-controller = &s26ks512s0; + zephyr,flash = &s26ks512s0; + zephyr,code-partition = &slot0_partition; + }; +}; + +&flexspi { + status = "okay"; + ahb-prefetch; + ahb-read-addr-opt; + ahb-bufferable; + ahb-cacheable; + sck-differential-clock; + combination-mode; + rx-clock-source = <3>; + reg = <0x402a8000 0x4000>, <0x60000000 DT_SIZE_M(64)>; + s26ks512s0: s26ks512s@0 { + compatible = "nxp,imx-flexspi-hyperflash"; + size = ; + reg = <0>; + spi-max-frequency = <166000000>; + word-addressable; + cs-interval-unit = <1>; + cs-interval = <2>; + cs-hold-time = <0>; + cs-setup-time = <3>; + data-valid-time = <1>; + column-space = <3>; + ahb-write-wait-unit = <2>; + ahb-write-wait-interval = <20>; + status = "okay"; + erase-block-size = ; + write-block-size = <16>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 DT_SIZE_K(256)>; + }; + /* The MCUBoot swap-move algorithm uses the last 2 sectors + * of the primary slot0 for swap status and move. + */ + slot0_partition: partition@40000 { + label = "image-0"; + reg = <0x00040000 (DT_SIZE_M(3) + DT_SIZE_K(512))>; + }; + slot1_partition: partition@3C0000 { + label = "image-1"; + reg = <0x003C0000 DT_SIZE_M(3)>; + }; + storage_partition: partition@6C0000 { + label = "storage"; + reg = <0x006C0000 (DT_SIZE_M(58) - DT_SIZE_K(768))>; + }; + }; + }; +}; diff --git a/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_hyperflash.overlay b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_hyperflash.overlay deleted file mode 100644 index 0a3bb58d33d7dd8..000000000000000 --- a/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_hyperflash.overlay +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Copyright (c) 2018, NXP - * - * SPDX-License-Identifier: Apache-2.0 - */ - -/ { - chosen { - zephyr,flash-controller = &s26ks512s0; - zephyr,flash = &s26ks512s0; - zephyr,code-partition = &slot0_partition; - }; -}; - -&flexspi { - status = "okay"; - ahb-prefetch; - ahb-read-addr-opt; - ahb-bufferable; - ahb-cacheable; - sck-differential-clock; - combination-mode; - rx-clock-source = <3>; - reg = <0x402a8000 0x4000>, <0x60000000 DT_SIZE_M(64)>; - s26ks512s0: s26ks512s@0 { - compatible = "nxp,imx-flexspi-hyperflash"; - size = ; - reg = <0>; - spi-max-frequency = <166000000>; - word-addressable; - cs-interval-unit = <1>; - cs-interval = <2>; - cs-hold-time = <0>; - cs-setup-time = <3>; - data-valid-time = <1>; - column-space = <3>; - ahb-write-wait-unit = <2>; - ahb-write-wait-interval = <20>; - status = "okay"; - erase-block-size = ; - write-block-size = <16>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 DT_SIZE_K(256)>; - }; - /* The MCUBoot swap-move algorithm uses the last 2 sectors - * of the primary slot0 for swap status and move. - */ - slot0_partition: partition@40000 { - label = "image-0"; - reg = <0x00040000 (DT_SIZE_M(3) + DT_SIZE_K(512))>; - }; - slot1_partition: partition@3C0000 { - label = "image-1"; - reg = <0x003C0000 DT_SIZE_M(3)>; - }; - storage_partition: partition@6C0000 { - label = "storage"; - reg = <0x006C0000 (DT_SIZE_M(58) - DT_SIZE_K(768))>; - }; - }; - }; -}; diff --git a/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_hyperflash.yaml b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_hyperflash.yaml index c453d1c9ee6ff4a..1d81a48175ab10d 100644 --- a/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_hyperflash.yaml +++ b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_hyperflash.yaml @@ -4,7 +4,7 @@ # SPDX-License-Identifier: Apache-2.0 # -identifier: mimxrt1060_evk@hyperflash +identifier: mimxrt1060_evk/mimxrt1062/hyperflash name: NXP MIMXRT1060-EVK-HYPERFLASH type: mcu arch: arm @@ -22,6 +22,7 @@ supported: - counter - display - dma + - flash - gpio - i2c - netif:eth diff --git a/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_defconfig b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_hyperflash_defconfig similarity index 100% rename from boards/nxp/mimxrt1060_evk/mimxrt1060_evk_defconfig rename to boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_hyperflash_defconfig diff --git a/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi.dts b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi.dts new file mode 100644 index 000000000000000..1e2876fc45d932a --- /dev/null +++ b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi.dts @@ -0,0 +1,60 @@ +/* + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "mimxrt1060_evk.dtsi" + +/ { + chosen { + zephyr,flash-controller = &is25wp064; + zephyr,flash = &is25wp064; + zephyr,code-partition = &slot0_partition; + }; +}; + +&flexspi { + status = "okay"; + pinctrl-0 = <&pinmux_flexspi1>; + pinctrl-names = "default"; + ahb-prefetch; + ahb-read-addr-opt; + rx-clock-source = <1>; + reg = <0x402a8000 0x4000>, <0x60000000 DT_SIZE_M(8)>; + is25wp064: is25wp064@0 { + compatible = "nxp,imx-flexspi-nor"; + size = <67108864>; + reg = <0>; + spi-max-frequency = <104000000>; + status = "okay"; + jedec-id = [9d 70 17]; + erase-block-size = <4096>; + write-block-size = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 DT_SIZE_K(128)>; + }; + /* The MCUBoot swap-move algorithm uses the last 2 sectors + * of the primary slot0 for swap status and move. + */ + slot0_partition: partition@20000 { + label = "image-0"; + reg = <0x00020000 (DT_SIZE_M(3) + DT_SIZE_K(8))>; + }; + slot1_partition: partition@322000 { + label = "image-1"; + reg = <0x00322000 DT_SIZE_M(3)>; + }; + storage_partition: partition@622000 { + label = "storage"; + reg = <0x00622000 (DT_SIZE_M(2) - DT_SIZE_K(136))>; + }; + }; + }; +}; diff --git a/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi.overlay b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi.overlay deleted file mode 100644 index c76c2b020c68f9e..000000000000000 --- a/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi.overlay +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Copyright 2024 NXP - * - * SPDX-License-Identifier: Apache-2.0 - */ - -/ { - chosen { - zephyr,flash-controller = &is25wp064; - zephyr,flash = &is25wp064; - zephyr,code-partition = &slot0_partition; - }; -}; - -&flexspi { - status = "okay"; - pinctrl-0 = <&pinmux_flexspi1>; - pinctrl-names = "default"; - ahb-prefetch; - ahb-read-addr-opt; - rx-clock-source = <1>; - reg = <0x402a8000 0x4000>, <0x60000000 DT_SIZE_M(8)>; - is25wp064: is25wp064@0 { - compatible = "nxp,imx-flexspi-nor"; - size = <67108864>; - reg = <0>; - spi-max-frequency = <104000000>; - status = "okay"; - jedec-id = [9d 70 17]; - erase-block-size = <4096>; - write-block-size = <1>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - boot_partition: partition@0 { - label = "mcuboot"; - reg = <0x00000000 DT_SIZE_K(128)>; - }; - /* The MCUBoot swap-move algorithm uses the last 2 sectors - * of the primary slot0 for swap status and move. - */ - slot0_partition: partition@20000 { - label = "image-0"; - reg = <0x00020000 (DT_SIZE_M(3) + DT_SIZE_K(8))>; - }; - slot1_partition: partition@322000 { - label = "image-1"; - reg = <0x00322000 DT_SIZE_M(3)>; - }; - storage_partition: partition@622000 { - label = "storage"; - reg = <0x00622000 (DT_SIZE_M(2) - DT_SIZE_K(136))>; - }; - }; - }; -}; diff --git a/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi.yaml b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi.yaml index 41181dd8bb365b4..cd57a0bc6c296b6 100644 --- a/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi.yaml +++ b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi.yaml @@ -4,7 +4,7 @@ # SPDX-License-Identifier: Apache-2.0 # -identifier: mimxrt1060_evk +identifier: mimxrt1060_evk/mimxrt1062/qspi name: NXP MIMXRT1060-EVK type: mcu arch: arm @@ -15,15 +15,16 @@ toolchain: ram: 32768 flash: 8192 supported: + - adc - arduino_gpio - arduino_i2c - arduino_serial - arduino_spi - - adc - can - counter - display - dma + - flash - gpio - i2c - netif:eth diff --git a/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi_B.overlay b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi_B.overlay new file mode 100644 index 000000000000000..284679eaa9f28fa --- /dev/null +++ b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi_B.overlay @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2022, Whisper.ai + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* FLEXPWM not routed to LED on this EVK */ +&flexpwm2_pwm3 { + status = "disabled"; +}; + +&green_led { + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; + label = "User LED1"; +}; diff --git a/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi_B.yaml b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi_B.yaml new file mode 100644 index 000000000000000..5c9f42d5ef717a6 --- /dev/null +++ b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi_B.yaml @@ -0,0 +1,34 @@ +# +# Copyright (c) 2022, Whisper.ai +# +# SPDX-License-Identifier: Apache-2.0 +# + +identifier: mimxrt1060_evk@B/mimxrt1062/qspi +name: NXP MIMXRT1060-EVKB +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +ram: 32768 +flash: 8192 +supported: + - arduino_gpio + - arduino_i2c + - arduino_serial + - arduino_spi + - counter + - display + - gpio + - i2c + - netif:eth + - sdhc + - spi + - usb_device + - dma + - can + - watchdog + - adc +vendor: nxp diff --git a/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi_defconfig b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi_defconfig new file mode 100644 index 000000000000000..29f9a37ea90d5df --- /dev/null +++ b/boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi_defconfig @@ -0,0 +1,12 @@ +# +# Copyright (c) 2018, NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_GPIO=y +CONFIG_ARM_MPU=y +CONFIG_HW_STACK_PROTECTION=y diff --git a/boards/nxp/mimxrt1060_evk/mimxrt1060_evkb.dts b/boards/nxp/mimxrt1060_evk/mimxrt1060_evkb.dts deleted file mode 100644 index 905d32d89aa41de..000000000000000 --- a/boards/nxp/mimxrt1060_evk/mimxrt1060_evkb.dts +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (c) 2022, Whisper.ai - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include "mimxrt1060_evk.dts" -#include "mimxrt1060_evk_mimxrt1062_qspi.overlay" - -/* FLEXPWM not routed to LED on this EVK */ -&flexpwm2_pwm3 { - status = "disabled"; -}; - -&green_led { - gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; - label = "User LED1"; -}; diff --git a/boards/nxp/mimxrt1060_evk/mimxrt1060_evkb.yaml b/boards/nxp/mimxrt1060_evk/mimxrt1060_evkb.yaml deleted file mode 100644 index 3f9306c1e036298..000000000000000 --- a/boards/nxp/mimxrt1060_evk/mimxrt1060_evkb.yaml +++ /dev/null @@ -1,34 +0,0 @@ -# -# Copyright (c) 2022, Whisper.ai -# -# SPDX-License-Identifier: Apache-2.0 -# - -identifier: mimxrt1060_evkb -name: NXP MIMXRT1060-EVKB -type: mcu -arch: arm -toolchain: - - zephyr - - gnuarmemb - - xtools -ram: 32768 -flash: 8192 -supported: - - arduino_gpio - - arduino_i2c - - arduino_serial - - arduino_spi - - counter - - display - - gpio - - i2c - - netif:eth - - sdhc - - spi - - usb_device - - dma - - can - - watchdog - - adc -vendor: nxp diff --git a/boards/nxp/mimxrt1060_evk/revision.cmake b/boards/nxp/mimxrt1060_evk/revision.cmake deleted file mode 100644 index 97a3da96ea4905e..000000000000000 --- a/boards/nxp/mimxrt1060_evk/revision.cmake +++ /dev/null @@ -1,9 +0,0 @@ -if (NOT DEFINED BOARD_REVISION) - set(BOARD_REVISION "qspi") -else () - if (NOT (BOARD_REVISION STREQUAL "hyperflash") AND NOT (BOARD_REVISION STREQUAL "qspi")) - message(FATAL_ERROR "Invalid board revision, ${BOARD_REVISION}, valid revisions are: hyperflash, qspi") - elseif (BOARD_REVISION STREQUAL "hyperflash" AND CONFIG_BOARD_MIMXRT1060_EVKB) - message(FATAL_ERROR "hyperflash not supported on RT1060 EVKB") - endif() -endif() diff --git a/boards/nxp/mimxrt1062_fmurt6/mimxrt1062_fmurt6.yaml b/boards/nxp/mimxrt1062_fmurt6/mimxrt1062_fmurt6.yaml index 01824d0b3bc02fe..9e4a523d944d8fa 100644 --- a/boards/nxp/mimxrt1062_fmurt6/mimxrt1062_fmurt6.yaml +++ b/boards/nxp/mimxrt1062_fmurt6/mimxrt1062_fmurt6.yaml @@ -15,17 +15,18 @@ toolchain: ram: 768 flash: 65536 supported: + - adc + - can - counter - - uart - dma + - flash - gpio - i2c - netif:eth + - pwm - sdhc - spi + - uart - usb_device - - can - watchdog - - adc - - pwm vendor: nxp diff --git a/boards/nxp/mimxrt1064_evk/mimxrt1064_evk.yaml b/boards/nxp/mimxrt1064_evk/mimxrt1064_evk.yaml index a9d454a50832f50..eab16e277e59710 100644 --- a/boards/nxp/mimxrt1064_evk/mimxrt1064_evk.yaml +++ b/boards/nxp/mimxrt1064_evk/mimxrt1064_evk.yaml @@ -15,11 +15,14 @@ toolchain: ram: 32768 flash: 4096 supported: + - adc - arduino_gpio - arduino_serial + - can - counter - display - dma + - flash - gpio - hwinfo - i2c @@ -29,7 +32,5 @@ supported: - spi - usb_device - video - - can - watchdog - - adc vendor: nxp diff --git a/boards/nxp/mimxrt1160_evk/mimxrt1160_evk_mimxrt1166_cm4.yaml b/boards/nxp/mimxrt1160_evk/mimxrt1160_evk_mimxrt1166_cm4.yaml index 400e501406f2b29..b265336cb241ace 100644 --- a/boards/nxp/mimxrt1160_evk/mimxrt1160_evk_mimxrt1166_cm4.yaml +++ b/boards/nxp/mimxrt1160_evk/mimxrt1160_evk_mimxrt1166_cm4.yaml @@ -16,8 +16,9 @@ ram: 128 flash: 128 supported: - dma - - i2c + - flash - gpio + - i2c - pwm - uart vendor: nxp diff --git a/boards/nxp/mimxrt1160_evk/mimxrt1160_evk_mimxrt1166_cm7.yaml b/boards/nxp/mimxrt1160_evk/mimxrt1160_evk_mimxrt1166_cm7.yaml index 9ff9b57258d2e48..b9780a9574683d0 100644 --- a/boards/nxp/mimxrt1160_evk/mimxrt1160_evk_mimxrt1166_cm7.yaml +++ b/boards/nxp/mimxrt1160_evk/mimxrt1160_evk_mimxrt1166_cm7.yaml @@ -15,9 +15,10 @@ toolchain: ram: 256 flash: 16384 supported: - - counter - can + - counter - dma + - flash - gpio - hwinfo - i2c diff --git a/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm4.yaml b/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm4.yaml index 87788b3a0153dcc..08bbfa3e6b93bd2 100644 --- a/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm4.yaml +++ b/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm4.yaml @@ -16,6 +16,7 @@ ram: 128 flash: 128 supported: - dma + - flash - gpio - i2c - pwm diff --git a/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm4_B.yaml b/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm4_B.yaml index da1f36a162c29ca..061366570f26ebb 100644 --- a/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm4_B.yaml +++ b/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm4_B.yaml @@ -16,8 +16,9 @@ ram: 128 flash: 128 supported: - dma + - flash - gpio - i2c - - spi - pwm + - spi vendor: nxp diff --git a/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7.yaml b/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7.yaml index a29807defa52219..bf2f139da107260 100644 --- a/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7.yaml +++ b/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7.yaml @@ -16,10 +16,11 @@ ram: 256 flash: 16384 supported: - adc - - counter - can + - counter - display - dma + - flash - gpio - hwinfo - i2c @@ -28,7 +29,7 @@ supported: - pwm - spi - usb_device - - watchdog - - video - usbd + - video + - watchdog vendor: nxp diff --git a/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7_B.overlay b/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7_B.overlay index bc7995fcb4e34f1..c457d55fa54f8b5 100644 --- a/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7_B.overlay +++ b/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7_B.overlay @@ -89,7 +89,7 @@ m2_hci_uart: &lpuart2 { compatible = "nxp,bt-hci-uart"; sdio-reset-gpios = <&gpio9 15 GPIO_ACTIVE_HIGH>; w-disable-gpios = <&gpio9 30 GPIO_ACTIVE_HIGH>; - hci-operation-speed = <115200>; + hci-operation-speed = <3000000>; hw-flow-control; fw-download-primary-speed = <115200>; fw-download-secondary-speed = <3000000>; diff --git a/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7_B.yaml b/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7_B.yaml index 62eeec200ea66aa..9935c53c7d09808 100644 --- a/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7_B.yaml +++ b/boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7_B.yaml @@ -16,15 +16,16 @@ ram: 65536 flash: 65536 supported: - adc - - counter - can + - counter - dma + - flash - gpio - hwinfo - i2c - mipi_dsi - spi - usb_device - - watchdog - video + - watchdog vendor: nxp diff --git a/boards/nxp/mimxrt1180_evk/doc/index.rst b/boards/nxp/mimxrt1180_evk/doc/index.rst index 012cb9407ada5bb..d9dcdaed7213e61 100644 --- a/boards/nxp/mimxrt1180_evk/doc/index.rst +++ b/boards/nxp/mimxrt1180_evk/doc/index.rst @@ -116,6 +116,10 @@ configuration supports the following hardware features: +-----------+------------+-------------------------------------+ | PWM | on-chip | pwm | +-----------+------------+-------------------------------------+ +| PWM | on-chip | tpm | ++-----------+------------+-------------------------------------+ +| I3C | on-chip | i3c | ++-----------+------------+-------------------------------------+ The default configuration can be found in the defconfig file: :zephyr_file:`boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33_defconfig` diff --git a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk-pinctrl.dtsi b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk-pinctrl.dtsi index 29687171a5073c2..bfaa7852dce42b5 100644 --- a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk-pinctrl.dtsi +++ b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk-pinctrl.dtsi @@ -137,4 +137,29 @@ slew-rate = "fast"; }; }; + + pinmux_tpm5: pinmux_tpm5 { + group0 { + pinmux = <&iomuxc_gpio_b1_00_tpm5_ch0>; + drive-strength = "normal"; + slew-rate = "slow"; + }; + }; + + pinmux_i3c2: pinmux_i3c2 { + group0 { + pinmux = <&iomuxc_gpio_ad_18_i3c2_scl>, + <&iomuxc_gpio_ad_19_i3c2_sda>; + drive-strength = "normal"; + drive-open-drain; + slew-rate = "fast"; + input-enable; + }; + + group1 { + pinmux = <&iomuxc_gpio_ad_17_i3c2_pur>; + slew-rate = "fast"; + drive-strength = "high"; + }; + }; }; diff --git a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk.dtsi b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk.dtsi index 3f71d74a762b55b..5af9c45552495f8 100644 --- a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk.dtsi +++ b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk.dtsi @@ -139,3 +139,16 @@ pinctrl-0 = <&pinmux_flexpwm2>; pinctrl-names = "default"; }; + +&tpm5 { + pinctrl-0 = <&pinmux_tpm5>; + pinctrl-names = "default"; +}; + +&i3c2 { + pinctrl-0 = <&pinmux_i3c2>; + pinctrl-names = "default"; +}; + +p3t1755dp_ard_i3c_interface: &i3c2 {}; +p3t1755dp_ard_i2c_interface: &lpi2c2 {}; diff --git a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33.dts b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33.dts index 331f85b5bf8facb..97a3752628bdf73 100644 --- a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33.dts +++ b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33.dts @@ -75,3 +75,7 @@ &lptmr1 { status = "okay"; }; + +&i3c2 { + status = "okay"; +}; diff --git a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33.yaml b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33.yaml index 639b19be76818ce..bddd1e8a0a3cd4d 100644 --- a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33.yaml +++ b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm33.yaml @@ -15,12 +15,14 @@ toolchain: ram: 128 flash: 16384 supported: + - adc + - can + - counter + - flash - gpio - - uart - i2c - - counter - - adc - netif:eth - - can - pwm + - uart + - i3c vendor: nxp diff --git a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm7.dts b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm7.dts index 84c2245eae9114d..7e003fe903e272b 100644 --- a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm7.dts +++ b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm7.dts @@ -47,3 +47,7 @@ &lptmr1 { status = "okay"; }; + +&i3c2 { + status = "okay"; +}; diff --git a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm7.yaml b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm7.yaml index e69b1ca1feee1f3..60b954ec5335ae7 100644 --- a/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm7.yaml +++ b/boards/nxp/mimxrt1180_evk/mimxrt1180_evk_mimxrt1189_cm7.yaml @@ -15,11 +15,13 @@ toolchain: ram: 256 flash: 256 supported: - - gpio - - uart - - i2c - - counter - adc - can + - counter + - flash + - gpio + - i2c - pwm + - uart + - i3c vendor: nxp diff --git a/boards/nxp/mimxrt595_evk/mimxrt595_evk_mimxrt595s_cm33.yaml b/boards/nxp/mimxrt595_evk/mimxrt595_evk_mimxrt595s_cm33.yaml index 532fa9519ea7d41..a2e8406c02baabe 100644 --- a/boards/nxp/mimxrt595_evk/mimxrt595_evk_mimxrt595s_cm33.yaml +++ b/boards/nxp/mimxrt595_evk/mimxrt595_evk_mimxrt595s_cm33.yaml @@ -20,13 +20,14 @@ supported: - arduino_serial - counter - dma + - dmic + - flash - gpio - i2c + - i2s + - pwm + - sdhc - spi - usb_device - watchdog - - sdhc - - pwm - - i2s - - dmic vendor: nxp diff --git a/boards/nxp/mimxrt685_evk/mimxrt685_evk_mimxrt685s_cm33.yaml b/boards/nxp/mimxrt685_evk/mimxrt685_evk_mimxrt685s_cm33.yaml index 59ccb0922be17ff..75124a8e7da51f1 100644 --- a/boards/nxp/mimxrt685_evk/mimxrt685_evk_mimxrt685s_cm33.yaml +++ b/boards/nxp/mimxrt685_evk/mimxrt685_evk_mimxrt685s_cm33.yaml @@ -21,15 +21,16 @@ supported: - arduino_spi - counter - dma - - pwm + - flash - gpio - hwinfo - i2c - - i3c - i2s + - i3c + - pwm - sdhc - spi - - watchdog - usb_device - usbd + - watchdog vendor: nxp diff --git a/boards/nxp/mr_canhubk3/mr_canhubk3.yaml b/boards/nxp/mr_canhubk3/mr_canhubk3.yaml index 7fd4f2b79965054..da732b5686359cd 100644 --- a/boards/nxp/mr_canhubk3/mr_canhubk3.yaml +++ b/boards/nxp/mr_canhubk3/mr_canhubk3.yaml @@ -10,16 +10,17 @@ flash: 1024 toolchain: - zephyr supported: - - gpio - - uart + - adc - can + - counter + - display + - dma + - flash + - gpio - i2c - - adc - - spi - - watchdog - netif:eth - pwm - - dma - - display - - counter + - spi + - uart + - watchdog vendor: nxp diff --git a/boards/nxp/rd_rw612_bga/doc/index.rst b/boards/nxp/rd_rw612_bga/doc/index.rst index c1ba78d3f64f0c5..340dcccbd01b2b6 100644 --- a/boards/nxp/rd_rw612_bga/doc/index.rst +++ b/boards/nxp/rd_rw612_bga/doc/index.rst @@ -73,6 +73,8 @@ Supported Features +-----------+------------+-----------------------------------+ | ENET | on-chip | ethernet | +-----------+------------+-----------------------------------+ +| Wi-Fi | on-chip | Wi-Fi | ++-----------+------------+-----------------------------------+ The default configuration can be found in the defconfig file: @@ -136,7 +138,7 @@ display sample can be built for the module like so: Fetch Binary Blobs ****************** -To support Bluetooth, rd_rw612_bga requires fetching binary blobs, which can be +To support Bluetooth or Wi-Fi, rd_rw612_bga requires fetching binary blobs, which can be achieved by running the following command: .. code-block:: console @@ -214,6 +216,16 @@ rd_rw612_bga platform supports the monolithic feature. The required binary blob ``/modules/hal/nxp/zephyr/blobs/rw61x_sb_ble_a2.bin`` will be linked with the application image directly, forming one single monolithic image. +Wi-Fi +***** + +Wi-Fi functionality requires to fetch binary blobs, so make sure to follow +the ``Fetch Binary Blobs`` section first. + +rd_rw612_bga platform supports the monolithic feature. The required binary blob +``/modules/hal/nxp/zephyr/blobs/rw61x_sb_wifi_a2.bin`` will be linked +with the application image directly, forming one single monolithic image. + Board variants ************** diff --git a/boards/nxp/rd_rw612_bga/rd_rw612_bga.dtsi b/boards/nxp/rd_rw612_bga/rd_rw612_bga.dtsi index 21e7a1387d5ce28..8d8bd71cd61ae61 100644 --- a/boards/nxp/rd_rw612_bga/rd_rw612_bga.dtsi +++ b/boards/nxp/rd_rw612_bga/rd_rw612_bga.dtsi @@ -294,12 +294,12 @@ nxp_8080_touch_panel_i2c: &arduino_i2c { status = "disabled"; }; -&hci { +&pin1 { status = "okay"; - wakeup-source; + wakeup-level = "low"; }; -&pin1 { +&nbu { status = "okay"; - wakeup-level = "low"; + wakeup-source; }; diff --git a/boards/nxp/rd_rw612_bga/rd_rw612_bga.yaml b/boards/nxp/rd_rw612_bga/rd_rw612_bga.yaml index fd7cb2a535e8591..1971325463b6f9e 100644 --- a/boards/nxp/rd_rw612_bga/rd_rw612_bga.yaml +++ b/boards/nxp/rd_rw612_bga/rd_rw612_bga.yaml @@ -15,16 +15,17 @@ toolchain: ram: 960 flash: 65536 supported: + - adc + - counter + - dac - dma - dmic + - entropy + - flash - gpio - - spi + - hwinfo - i2c - - entropy + - pwm + - spi - usb_device - watchdog - - counter - - pwm - - hwinfo - - adc - - dac diff --git a/boards/nxp/rddrone_fmuk66/rddrone_fmuk66.dts b/boards/nxp/rddrone_fmuk66/rddrone_fmuk66.dts index 127d6ffb72416df..b2b3fefa4fed536 100644 --- a/boards/nxp/rddrone_fmuk66/rddrone_fmuk66.dts +++ b/boards/nxp/rddrone_fmuk66/rddrone_fmuk66.dts @@ -142,7 +142,7 @@ /* PWM header is powered by FlexTimer 0 for channels 1 to 4 */ &ftm0 { status = "okay"; - compatible = "nxp,kinetis-ftm-pwm"; + compatible = "nxp,ftm-pwm"; #pwm-cells = <3>; pinctrl-0 = <&ftm0_default>; pinctrl-names = "default"; @@ -153,7 +153,7 @@ /* RGB LED powered by FlexTimer 3, and PWM headers for channel 5 and 6 */ &ftm3 { status = "okay"; - compatible = "nxp,kinetis-ftm-pwm"; + compatible = "nxp,ftm-pwm"; #pwm-cells = <3>; pinctrl-0 = <&ftm3_default>; pinctrl-names = "default"; diff --git a/boards/nxp/rddrone_fmuk66/rddrone_fmuk66.yaml b/boards/nxp/rddrone_fmuk66/rddrone_fmuk66.yaml index 44723b330b31a5e..e71803feb3c18f9 100644 --- a/boards/nxp/rddrone_fmuk66/rddrone_fmuk66.yaml +++ b/boards/nxp/rddrone_fmuk66/rddrone_fmuk66.yaml @@ -10,6 +10,7 @@ toolchain: supported: - can - counter + - flash - gpio - i2c - nvs diff --git a/boards/nxp/s32z2xxdc2/Kconfig.defconfig b/boards/nxp/s32z2xxdc2/Kconfig.defconfig index 2b5dffc89335a3d..4e0448afc1efcc7 100644 --- a/boards/nxp/s32z2xxdc2/Kconfig.defconfig +++ b/boards/nxp/s32z2xxdc2/Kconfig.defconfig @@ -30,4 +30,20 @@ config NET_L2_ETHERNET endif # NETWORKING +if XIP +# Offset between CRAM AXIM and CRAM AXIF, code will be downloaded +# over AXIM interface +config BUILD_OUTPUT_ADJUST_LMA + default "-0x47800000" + +config CPU_CORTEX_R52_CACHE_SEGREGATION + default y + +config CPU_CORTEX_R52_ICACHE_FLASH_WAY + default 4 + +config CPU_CORTEX_R52_DCACHE_FLASH_WAY + default 1 +endif # XIP + endif # BOARD_S32Z2XXDC2_S32Z270_RTU0 || BOARD_S32Z2XXDC2_S32Z270_RTU1 diff --git a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0.dts b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0.dts index 3db4df08388ff60..da6b964561420da 100644 --- a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0.dts +++ b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0.dts @@ -13,7 +13,8 @@ compatible = "nxp,s32z270"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &dram0; + zephyr,flash = &cram0; zephyr,canbus = &canxl0; }; diff --git a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0_defconfig b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0_defconfig index c9a84cc2dfebdb6..e498ea985430549 100644 --- a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0_defconfig +++ b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0_defconfig @@ -1,7 +1,7 @@ # Copyright 2022,2024 NXP # SPDX-License-Identifier: Apache-2.0 -CONFIG_XIP=n +CONFIG_XIP=y CONFIG_ISR_STACK_SIZE=512 CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=8000000 diff --git a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1.dts b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1.dts index 4aadfbebb1d6035..286fd8d094c8745 100644 --- a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1.dts +++ b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1.dts @@ -13,9 +13,8 @@ compatible = "nxp,s32z270"; chosen { - zephyr,sram = &sram1; - zephyr,console = &uart0; - zephyr,shell-uart = &uart0; + zephyr,sram = &dram1; + zephyr,flash = &cram1; zephyr,canbus = &flexcan0; }; diff --git a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1_defconfig b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1_defconfig index c9a84cc2dfebdb6..e498ea985430549 100644 --- a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1_defconfig +++ b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1_defconfig @@ -1,7 +1,7 @@ # Copyright 2022,2024 NXP # SPDX-License-Identifier: Apache-2.0 -CONFIG_XIP=n +CONFIG_XIP=y CONFIG_ISR_STACK_SIZE=512 CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=8000000 diff --git a/boards/nxp/s32z2xxdc2/support/startup.cmm b/boards/nxp/s32z2xxdc2/support/startup.cmm index a0cbca67470e917..ca26d84ae08d04e 100644 --- a/boards/nxp/s32z2xxdc2/support/startup.cmm +++ b/boards/nxp/s32z2xxdc2/support/startup.cmm @@ -20,20 +20,17 @@ ; - Core0 and Core2 (redundancy) operate as a lockstep pair * ; - Core1 and Core3 (redundancy) operate as a lockstep pair * ; default: yes * -; - thumb set to "yes" to select the T32 instruction set at reset * -; default: no * ; * ;******************************************************************************* ENTRY %LINE &args -LOCAL &rtuStartAddr &cfgCoreAddr &coreId &rtuId &thumbBit &spltLckBit +LOCAL &rtuStartAddr &cfgCoreAddr &coreId &rtuId &spltLckBit &command=STRing.SCANAndExtract("&args","command=","debug") &elfFile=STRing.SCANAndExtract("&args","elfFile=","") &rtu=STRing.SCANAndExtract("&args","rtu=","0") &core=STRing.SCANAndExtract("&args","core=","0") &lockstep=STRing.SCANAndExtract("&args","lockstep=","yes") -&thumb=STRing.SCANAndExtract("&args","thumb=","no") IF ("&elfFile"=="") ( @@ -59,12 +56,6 @@ IF (&core<0||&core>3) ENDDO ) -; select ARMv8 instruction set at reset for all Cortex-R52 cores (CFG_CORE.THUMB bit) -IF ("&thumb"=="yes") - &thumbBit="1" -ELSE - &thumbBit="0" - ; select lock-step or split-lock mode (CFG_CORE.SPLT_LCK bit) IF ("&lockstep"=="yes") &spltLckBit="0" @@ -126,8 +117,8 @@ GOSUB EnableRTU1 ; Init RTU SRAM DO ~~/demo/arm/hardware/s32z27/misc/s32z27_init_rtu&(rtu)_sram.cmm -; Set reset value for TE bit and split-lock mode -Data.Set EZAXI:&cfgCoreAddr %Long 0yXXXXxxxxXXXXxxxxXXXXxxxxXXXXx&(thumbBit)x&(spltLckBit) ; CFG_CORE +; Set reset value for split-lock mode +Data.Set EZAXI:&cfgCoreAddr %Long 0yXXXXxxxxXXXXxxxxXXXXxxxxXXXXxxx&(spltLckBit) ; CFG_CORE ; Write loop to self instruction Data.Set EAXI:&rtuStartAddr %Long 0xFFFEF7FF diff --git a/boards/nxp/twr_ke18f/twr_ke18f.dts b/boards/nxp/twr_ke18f/twr_ke18f.dts index da98628956c6c95..66e105945211314 100644 --- a/boards/nxp/twr_ke18f/twr_ke18f.dts +++ b/boards/nxp/twr_ke18f/twr_ke18f.dts @@ -224,7 +224,7 @@ &ftm0 { status = "okay"; - compatible = "nxp,kinetis-ftm-pwm"; + compatible = "nxp,ftm-pwm"; #pwm-cells = <3>; pinctrl-0 = <&ftm0_default>; pinctrl-names = "default"; @@ -233,7 +233,7 @@ &ftm3 { status = "okay"; - compatible = "nxp,kinetis-ftm-pwm"; + compatible = "nxp,ftm-pwm"; #pwm-cells = <3>; pinctrl-0 = <&ftm3_default>; pinctrl-names = "default"; diff --git a/boards/nxp/twr_ke18f/twr_ke18f.yaml b/boards/nxp/twr_ke18f/twr_ke18f.yaml index ddd4df467f0dc54..2ee4b9bef15db67 100644 --- a/boards/nxp/twr_ke18f/twr_ke18f.yaml +++ b/boards/nxp/twr_ke18f/twr_ke18f.yaml @@ -15,6 +15,7 @@ supported: - dac - dma - i2c + - flash - pwm - spi - watchdog diff --git a/boards/nxp/twr_kv58f220m/twr_kv58f220m.yaml b/boards/nxp/twr_kv58f220m/twr_kv58f220m.yaml index 6118c0c0b113283..453ce7d004cf15d 100644 --- a/boards/nxp/twr_kv58f220m/twr_kv58f220m.yaml +++ b/boards/nxp/twr_kv58f220m/twr_kv58f220m.yaml @@ -9,5 +9,6 @@ toolchain: ram: 128 flash: 1024 supported: + - flash - i2c vendor: nxp diff --git a/boards/nxp/ucans32k1sic/ucans32k1sic.dts b/boards/nxp/ucans32k1sic/ucans32k1sic.dts index 4c1fdeb07328e66..a22a3918c8ed98e 100644 --- a/boards/nxp/ucans32k1sic/ucans32k1sic.dts +++ b/boards/nxp/ucans32k1sic/ucans32k1sic.dts @@ -150,7 +150,7 @@ }; &ftm0 { - compatible = "nxp,kinetis-ftm-pwm"; + compatible = "nxp,ftm-pwm"; pinctrl-0 = <&ftm0_default>; pinctrl-names = "default"; clock-source = "system"; @@ -160,7 +160,7 @@ }; &ftm1 { - compatible = "nxp,kinetis-ftm-pwm"; + compatible = "nxp,ftm-pwm"; pinctrl-0 = <&ftm1_default>; pinctrl-names = "default"; clock-source = "system"; @@ -170,7 +170,7 @@ }; &ftm2 { - compatible = "nxp,kinetis-ftm-pwm"; + compatible = "nxp,ftm-pwm"; pinctrl-0 = <&ftm2_default>; pinctrl-names = "default"; clock-source = "system"; diff --git a/boards/nxp/usb_kw24d512/usb_kw24d512.yaml b/boards/nxp/usb_kw24d512/usb_kw24d512.yaml index 5344593b0298b8e..1252d6418fcf766 100644 --- a/boards/nxp/usb_kw24d512/usb_kw24d512.yaml +++ b/boards/nxp/usb_kw24d512/usb_kw24d512.yaml @@ -9,6 +9,7 @@ toolchain: - gnuarmemb - xtools supported: + - flash - usb_device - watchdog vendor: nxp diff --git a/boards/nxp/vmu_rt1170/vmu_rt1170.yaml b/boards/nxp/vmu_rt1170/vmu_rt1170.yaml index 9446ece2d955a5d..0ad33d74855f00f 100644 --- a/boards/nxp/vmu_rt1170/vmu_rt1170.yaml +++ b/boards/nxp/vmu_rt1170/vmu_rt1170.yaml @@ -16,9 +16,10 @@ ram: 256 flash: 65536 supported: - adc - - counter - can + - counter - dma + - flash - gpio - hwinfo - i2c diff --git a/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_appcpu.dts b/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_appcpu.dts index e86ffdb90bf793e..c88ae757867fd3c 100644 --- a/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_appcpu.dts +++ b/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_appcpu.dts @@ -13,9 +13,11 @@ compatible = "espressif,esp32"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; diff --git a/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_procpu.dts b/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_procpu.dts index b080d47472d9372..c39916c6de62243 100644 --- a/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_procpu.dts +++ b/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_procpu.dts @@ -18,7 +18,7 @@ chosen { zephyr,console = &uart0; zephyr,shell-uart = &uart0; - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,flash = &flash0; zephyr,code-partition = &slot0_partition; zephyr,bt-hci = &esp32_bt_hci; diff --git a/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_procpu.yaml b/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_procpu.yaml index c897a54621493fe..3084a2cf60c0217 100644 --- a/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_procpu.yaml +++ b/boards/olimex/olimex_esp32_evb/olimex_esp32_evb_procpu.yaml @@ -13,8 +13,4 @@ supported: - spi - uart - watchdog -testing: - ignore_tags: - - net - - bluetooth vendor: olimex diff --git a/boards/olimex/stm32_p405/olimex_stm32_p405_defconfig b/boards/olimex/stm32_p405/olimex_stm32_p405_defconfig index a6763abd156ba7a..51eadcb48096c9e 100644 --- a/boards/olimex/stm32_p405/olimex_stm32_p405_defconfig +++ b/boards/olimex/stm32_p405/olimex_stm32_p405_defconfig @@ -14,5 +14,3 @@ CONFIG_UART_CONSOLE=y # enable GPIO CONFIG_GPIO=y - -CONFIG_ENTROPY_GENERATOR=y diff --git a/boards/openisa/rv32m1_vega/Kconfig.defconfig b/boards/openisa/rv32m1_vega/Kconfig.defconfig index 08279d8ed04304c..c6a785858b56f0e 100644 --- a/boards/openisa/rv32m1_vega/Kconfig.defconfig +++ b/boards/openisa/rv32m1_vega/Kconfig.defconfig @@ -5,9 +5,6 @@ if BOARD_RV32M1_VEGA if BT -config BT_CTLR - default y - #TODO: Resolve the complete non-BLE support for crypto CAU3 firmware/driver #config HAS_RV32M1_CAU3 # bool diff --git a/boards/others/candlelightfd/Kconfig.candlelightfd b/boards/others/candlelightfd/Kconfig.candlelightfd new file mode 100644 index 000000000000000..ec6bb9d40a82e54 --- /dev/null +++ b/boards/others/candlelightfd/Kconfig.candlelightfd @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Sean Nyekjaer +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_CANDLELIGHTFD + select SOC_STM32G0B1XX diff --git a/boards/others/candlelightfd/board.cmake b/boards/others/candlelightfd/board.cmake new file mode 100644 index 000000000000000..f52f1430d4c51d2 --- /dev/null +++ b/boards/others/candlelightfd/board.cmake @@ -0,0 +1,8 @@ +# Copyright (c) 2024 Sean Nyekjaer +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(dfu-util "--pid=0483:df11" "--alt=0" "--dfuse") +board_runner_args(jlink "--device=STM32G0B1CB") + +include(${ZEPHYR_BASE}/boards/common/dfu-util.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/others/candlelightfd/board.yml b/boards/others/candlelightfd/board.yml new file mode 100644 index 000000000000000..089e2a8bbaf2268 --- /dev/null +++ b/boards/others/candlelightfd/board.yml @@ -0,0 +1,8 @@ +board: + name: candlelightfd + full_name: candleLightFD + vendor: others + socs: + - name: stm32g0b1xx + variants: + - name: 'dual' diff --git a/boards/others/candlelightfd/candlelightfd.dtsi b/boards/others/candlelightfd/candlelightfd.dtsi new file mode 100644 index 000000000000000..0e87cfadbab07a5 --- /dev/null +++ b/boards/others/candlelightfd/candlelightfd.dtsi @@ -0,0 +1,101 @@ +/* + * Copyright (c) 2024 Sean Nyekjaer + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +/ { + chosen { + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,canbus = &fdcan1; + }; + + aliases { + led0 = &led_rx; + led1 = &led_tx; + }; + + leds { + compatible = "gpio-leds"; + led_rx: led_rx { + gpios = <&gpioa 3 GPIO_ACTIVE_LOW>; + label = "LED RX"; + }; + led_tx: led_tx { + gpios = <&gpioa 4 GPIO_ACTIVE_LOW>; + label = "LED TX"; + }; + }; + + transceiver0: can-phy0 { + compatible = "nxp,tja1051", "can-transceiver-gpio"; + enable-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; + max-bitrate = <5000000>; + #phy-cells = <0>; + }; +}; + +&clk_hse { + status = "okay"; + clock-frequency = ; +}; + +&clk_hsi48 { + status = "okay"; + crs-usb-sof; +}; + +&pll { + div-m = <1>; + mul-n = <30>; + div-p = <2>; + div-q = <3>; + div-r = <4>; + clocks = <&clk_hse>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = ; + ahb-prescaler = <1>; + apb1-prescaler = <1>; +}; + +zephyr_udc0: &usb { + pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>; + pinctrl-names = "default"; + status = "okay"; +}; + +&fdcan1 { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00001000>, + <&rcc STM32_SRC_PLL_Q FDCAN_SEL(1)>; + pinctrl-0 = <&fdcan1_rx_pd0 &fdcan1_tx_pd1>; + pinctrl-names = "default"; + phys = <&transceiver0>; + status = "okay"; +}; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x00000000 DT_SIZE_K(48)>; + read-only; + }; + slot0_partition: partition@c000 { + label = "image-0"; + reg = <0x0000c000 DT_SIZE_K(80)>; + }; + }; +}; diff --git a/boards/others/candlelightfd/candlelightfd_stm32g0b1xx.dts b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx.dts new file mode 100644 index 000000000000000..ce8b6cc46b259db --- /dev/null +++ b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx.dts @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2024 Sean Nyekjaer + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include "candlelightfd.dtsi" + +/ { + model = "candleLight FD"; + compatible = "candlelightfd"; +}; diff --git a/boards/others/candlelightfd/candlelightfd_stm32g0b1xx.yaml b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx.yaml new file mode 100644 index 000000000000000..b017c2bb5387aa4 --- /dev/null +++ b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx.yaml @@ -0,0 +1,10 @@ +identifier: candlelightfd/stm32g0b1xx +name: candleLightFD +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb +ram: 144 +flash: 128 +vendor: others diff --git a/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_defconfig b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_defconfig new file mode 100644 index 000000000000000..8cb5d0f636488f6 --- /dev/null +++ b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_defconfig @@ -0,0 +1,8 @@ +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable HW stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable GPIO +CONFIG_GPIO=y diff --git a/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_dual.dts b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_dual.dts new file mode 100644 index 000000000000000..2e2767dd536f3f3 --- /dev/null +++ b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_dual.dts @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2024 Sean Nyekjaer + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include "candlelightfd.dtsi" + +/ { + model = "candleLight FD Dual"; + compatible = "candlelightfd"; + + transceiver1: can-phy1 { + compatible = "nxp,tja1051", "can-transceiver-gpio"; + enable-gpios = <&gpiob 2 GPIO_ACTIVE_LOW>; + max-bitrate = <5000000>; + #phy-cells = <0>; + }; +}; + +&fdcan2 { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00001000>, + <&rcc STM32_SRC_PLL_Q FDCAN_SEL(1)>; + pinctrl-0 = <&fdcan2_rx_pb0 &fdcan2_tx_pb1>; + pinctrl-names = "default"; + phys = <&transceiver1>; + status = "okay"; +}; diff --git a/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_dual.yaml b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_dual.yaml new file mode 100644 index 000000000000000..7841d562cb8b55c --- /dev/null +++ b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_dual.yaml @@ -0,0 +1,10 @@ +identifier: candlelightfd/stm32g0b1xx/dual +name: candleLightFD Dual +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb +ram: 144 +flash: 128 +vendor: others diff --git a/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_dual_defconfig b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_dual_defconfig new file mode 100644 index 000000000000000..8cb5d0f636488f6 --- /dev/null +++ b/boards/others/candlelightfd/candlelightfd_stm32g0b1xx_dual_defconfig @@ -0,0 +1,8 @@ +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable HW stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable GPIO +CONFIG_GPIO=y diff --git a/boards/others/candlelightfd/doc/candlelightfd.webp b/boards/others/candlelightfd/doc/candlelightfd.webp new file mode 100644 index 000000000000000..08313925065e94e Binary files /dev/null and b/boards/others/candlelightfd/doc/candlelightfd.webp differ diff --git a/boards/others/candlelightfd/doc/index.rst b/boards/others/candlelightfd/doc/index.rst new file mode 100644 index 000000000000000..ea622f4db728707 --- /dev/null +++ b/boards/others/candlelightfd/doc/index.rst @@ -0,0 +1,77 @@ +.. zephyr:board:: candlelightfd + +Overview +******** + +The candleLight FD is an open-hardware USB to CAN FD adapter board available from Linux Automation GmBH. +Find more information about the board at the `Linux Automation website`_. + +Hardware +******** + +The candleLight FD board is equipped with a STM32G0B1CBT6 microcontroller and features an USB-C connector, +a DB-9M connector for the CAN bus, and two user LEDs. Schematics and component placement drawings +are available in the `candleLight FD GitHub repository`_. + +Supported Features +================== + +The ``candlelightfd/stm32g0b1xx`` board target supports the following hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| FLASH | on-chip | flash memory | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| USB | on-chip | USB | ++-----------+------------+-------------------------------------+ +| CAN1 | on-chip | CAN controller | ++-----------+------------+-------------------------------------+ +| CAN2 | on-chip | CAN controller | ++-----------+------------+-------------------------------------+ + +The default configuration can be found in the defconfig file: +:zephyr_file:`boards/others/candlelightfd/candlelightfd_stm32g0b1xx_defconfig`. + +System Clock +============ + +The STM32G0B1CBT6 PLL is driven by an external crystal oscillator (HSE) running at 8 MHz and +configured to provide a system clock of 60 MHz. This allows generating a FDCAN1 and FDCAN2 core +clock of 80 MHz. + +Programming and Debugging +************************* + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +If flashing via USB DFU, short jumper ``BOOT`` when applying power to the candleLight FD in order to +enter the built-in DFU mode. + +Variants +======== + +The candleLight FD is can be retrofitted with a second transceiver, making it a dual CAN FD device: + +- ``candlelightfd``: The default variant. +- ``candlelightfd_stm32g0b1xx_dual``: Variant for the dual CAN FD. + +Here is an example for the :zephyr:code-sample:`blinky` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: candlelightfd + :goals: flash + +.. _Linux Automation website: + https://linux-automation.com/en/products/candlelight-fd.html + +.. _candleLight FD GitHub repository: + https://github.com/linux-automation/candleLightFD diff --git a/boards/others/esp32c3_supermini/Kconfig b/boards/others/esp32c3_supermini/Kconfig new file mode 100644 index 000000000000000..02cddb3b85c7657 --- /dev/null +++ b/boards/others/esp32c3_supermini/Kconfig @@ -0,0 +1,8 @@ +# ESP32C3 supermini board configuration + +# Copyright (c) 2024 Arrel Neumiller +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 2048 diff --git a/boards/others/esp32c3_supermini/Kconfig.esp32c3_supermini b/boards/others/esp32c3_supermini/Kconfig.esp32c3_supermini new file mode 100644 index 000000000000000..3b1718b1480aaea --- /dev/null +++ b/boards/others/esp32c3_supermini/Kconfig.esp32c3_supermini @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Arrel Neumiller +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_ESP32C3_SUPERMINI + select SOC_ESP32C3_FH4 diff --git a/boards/others/esp32c3_supermini/Kconfig.sysbuild b/boards/others/esp32c3_supermini/Kconfig.sysbuild new file mode 100644 index 000000000000000..f4b8b8fb2beb13b --- /dev/null +++ b/boards/others/esp32c3_supermini/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2024 Arrel Neumiller +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/others/esp32c3_supermini/board.cmake b/boards/others/esp32c3_supermini/board.cmake new file mode 100644 index 000000000000000..4c8b1b1822e7120 --- /dev/null +++ b/boards/others/esp32c3_supermini/board.cmake @@ -0,0 +1,10 @@ +# Copyright (c) 2024 Arrel Neumiller +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/others/esp32c3_supermini/board.yml b/boards/others/esp32c3_supermini/board.yml new file mode 100644 index 000000000000000..ee28029260b20b9 --- /dev/null +++ b/boards/others/esp32c3_supermini/board.yml @@ -0,0 +1,9 @@ +# Copyright (c) 2024 Arrel Neumiller +# SPDX-License-Identifier: Apache-2.0 + +board: + name: esp32c3_supermini + full_name: ESP32-C3-SUPERMINI + vendor: others + socs: + - name: esp32c3 diff --git a/boards/others/esp32c3_supermini/doc/img/esp32c3_supermini.webp b/boards/others/esp32c3_supermini/doc/img/esp32c3_supermini.webp new file mode 100644 index 000000000000000..59e34716261dcd5 Binary files /dev/null and b/boards/others/esp32c3_supermini/doc/img/esp32c3_supermini.webp differ diff --git a/boards/others/esp32c3_supermini/doc/index.rst b/boards/others/esp32c3_supermini/doc/index.rst new file mode 100644 index 000000000000000..7a7ff21dbd1e418 --- /dev/null +++ b/boards/others/esp32c3_supermini/doc/index.rst @@ -0,0 +1,249 @@ +.. zephyr:board:: esp32c3_supermini + +Overview +******** + +ESP32-C3-SUPERMINI is based on the ESP32-C3, a single-core Wi-Fi and Bluetooth 5 (LE) microcontroller SoC, +based on the open-source RISC-V architecture. This board also includes a Type-C USB Serial/JTAG port. +There may be multiple variations depending on the specific vendor. For more information a reasonbly well documented version of this board can be found at `ESP32-C3-SUPERMINI`_ + +Hardware +******** + +SoC Features: + +- IEEE 802.11 b/g/n-compliant +- Bluetooth 5, Bluetooth mesh +- 32-bit RISC-V single-core processor, up to 160MHz +- 384 KB ROM +- 400 KB SRAM (16 KB for cache) +- 8 KB SRAM in RTC +- 22 x programmable GPIOs +- 3 x SPI +- 2 x UART +- 1 x I2C +- 1 x I2S +- 2 x 54-bit general-purpose timers +- 3 x watchdog timers +- 1 x 52-bit system timer +- Remote Control Peripheral (RMT) +- LED PWM controller (LEDC) +- Full-speed USB Serial/JTAG controller +- General DMA controller (GDMA) +- 1 x TWAI® +- 2 x 12-bit SAR ADCs, up to 6 channels +- 1 x soc core temperature sensor + +For more information on the ESP32-C3 SOC, check the datasheet at `ESP32-C3 Datasheet`_ or the technical reference +manual at `ESP32-C3 Technical Reference Manual`_. + +Supported Features +================== + +Currently Zephyr's ``esp32c3_supermini`` board target supports the following features: + ++------------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++============+============+=====================================+ +| UART | on-chip | serial port | ++------------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++------------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++------------+------------+-------------------------------------+ +| USB-JTAG | on-chip | hardware interface | ++------------+------------+-------------------------------------+ +| SPI Master | on-chip | spi | ++------------+------------+-------------------------------------+ +| Timers | on-chip | counter | ++------------+------------+-------------------------------------+ +| Watchdog | on-chip | watchdog | ++------------+------------+-------------------------------------+ +| TRNG | on-chip | entropy | ++------------+------------+-------------------------------------+ +| LEDC | on-chip | pwm | ++------------+------------+-------------------------------------+ +| SPI DMA | on-chip | spi | ++------------+------------+-------------------------------------+ +| TWAI | on-chip | can | ++------------+------------+-------------------------------------+ +| USB-CDC | on-chip | serial | ++------------+------------+-------------------------------------+ +| ADC | on-chip | adc | ++------------+------------+-------------------------------------+ +| Wi-Fi | on-chip | | ++------------+------------+-------------------------------------+ +| Bluetooth | on-chip | | ++------------+------------+-------------------------------------+ + +System requirements +******************* + +Prerequisites +============= + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the ESP32 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: esp32c3_supermini + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_supermini + :goals: build + +The usual ``flash`` target will work with the ``esp32c3_supermini`` board +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_supermini + :goals: flash + +Open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! esp32c3_supermini + +Debugging +********* + +As with much custom hardware, the ESP32-C3 modules require patches to +OpenOCD that are not upstreamed yet. Espressif maintains their own fork of +the project. The custom OpenOCD can be obtained at `OpenOCD ESP32`_. + +The Zephyr SDK uses a bundled version of OpenOCD by default. You can overwrite that behavior by adding the +``-DOPENOCD= -DOPENOCD_DEFAULT_PATH=`` +parameter when building. + +Here is an example for building the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_supermini + :goals: build flash + :gen-args: -DOPENOCD= -DOPENOCD_DEFAULT_PATH= + +You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_supermini + :goals: debug + +References +********** + +.. target-notes:: + +.. _`ESP32-C3-SUPERMINI`: https://www.nologo.tech/product/esp32/esp32c3SuperMini/esp32C3SuperMini.html +.. _`ESP32-C3 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf +.. _`ESP32-C3 Technical Reference Manual`: https://espressif.com/sites/default/files/documentation/esp32-c3_technical_reference_manual_en.pdf +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases diff --git a/boards/others/esp32c3_supermini/esp32c3_supermini-pinctrl.dtsi b/boards/others/esp32c3_supermini/esp32c3_supermini-pinctrl.dtsi new file mode 100644 index 000000000000000..9ac04070866a9a9 --- /dev/null +++ b/boards/others/esp32c3_supermini/esp32c3_supermini-pinctrl.dtsi @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2024 Arrel Neumiller + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + spim2_default: spim2_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; +}; diff --git a/boards/others/esp32c3_supermini/esp32c3_supermini.dts b/boards/others/esp32c3_supermini/esp32c3_supermini.dts new file mode 100644 index 000000000000000..ebbd64d4f81f283 --- /dev/null +++ b/boards/others/esp32c3_supermini/esp32c3_supermini.dts @@ -0,0 +1,91 @@ +/* + * Copyright (c) 2024 Arrel Neumiller + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "esp32c3_supermini-pinctrl.dtsi" +#include +#include +#include + +/ { + model = "ESP32C3-SUPERMINI"; + compatible = "espressif,esp32c3_supermini"; + + chosen { + zephyr,sram = &sram0; + zephyr,console = &usb_serial; + zephyr,shell-uart = &usb_serial; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + }; + + aliases { + led0 = &blue_led_0; + sw0 = &user_button1; + i2c-0 = &i2c0; + watchdog0 = &wdt0; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button1: button_1 { + label = "User SW1"; + gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + zephyr,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + blue_led_0: led_0 { + gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>; + label = "Blue LED 0"; + }; + }; + +}; + +&spi2 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim2_default>; + pinctrl-names = "default"; + +}; + +&usb_serial { + status = "okay"; +}; + + +&i2c0 { + status = "okay"; + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; +}; + +&trng0 { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&wdt0 { + status = "okay"; +}; + +&uart0 { + status = "disabled"; +}; + +&esp32_bt_hci { + status = "okay"; +}; diff --git a/boards/others/esp32c3_supermini/esp32c3_supermini.yaml b/boards/others/esp32c3_supermini/esp32c3_supermini.yaml new file mode 100644 index 000000000000000..edc7252f583e0fc --- /dev/null +++ b/boards/others/esp32c3_supermini/esp32c3_supermini.yaml @@ -0,0 +1,21 @@ +# Copyright (c) 2024 Arrel Neumiller +# SPDX-License-Identifier: Apache-2.0 + +identifier: esp32c3_supermini +name: ESP32-C3-SUPERMINI +type: mcu +arch: riscv +toolchain: + - zephyr +supported: + - adc + - gpio + - i2c + - watchdog + - uart + - dma + - pwm + - spi + - counter + - entropy +vendor: others diff --git a/boards/others/esp32c3_supermini/esp32c3_supermini_defconfig b/boards/others/esp32c3_supermini/esp32c3_supermini_defconfig new file mode 100644 index 000000000000000..c5ef331aa760c0a --- /dev/null +++ b/boards/others/esp32c3_supermini/esp32c3_supermini_defconfig @@ -0,0 +1,7 @@ +# Copyright (c) 2024 Arrel Neumiller +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y +CONFIG_GPIO=y diff --git a/boards/others/esp32c3_supermini/support/openocd.cfg b/boards/others/esp32c3_supermini/support/openocd.cfg new file mode 100644 index 000000000000000..7fa9d1362475724 --- /dev/null +++ b/boards/others/esp32c3_supermini/support/openocd.cfg @@ -0,0 +1,14 @@ +# Copyright (c) 2024 Arrel Neumiller +# SPDX-License-Identifier: Apache-2.0 + +set ESP_RTOS none + +# ESP32C3 has built-in JTAG interface over USB port in pins GPIO18/GPIO19 (D-/D+). +# Uncomment the line below to enable USB debugging. +#source [find interface/esp_usb_jtag.cfg] + +# Otherwise, use external JTAG programmer as ESP-Prog +source [find interface/ftdi/esp32_devkitj_v1.cfg] + +source [find target/esp32c3.cfg] +adapter speed 5000 diff --git a/boards/others/icev_wireless/icev_wireless.dts b/boards/others/icev_wireless/icev_wireless.dts index d044209cec48c80..b91814c3b431af4 100644 --- a/boards/others/icev_wireless/icev_wireless.dts +++ b/boards/others/icev_wireless/icev_wireless.dts @@ -16,7 +16,7 @@ compatible = "espressif,esp32c3"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &usb_serial; zephyr,shell-uart = &usb_serial; zephyr,flash = &flash0; diff --git a/boards/others/icev_wireless/icev_wireless.yaml b/boards/others/icev_wireless/icev_wireless.yaml index 1850577054c3ee6..2ba46d2c763ee74 100644 --- a/boards/others/icev_wireless/icev_wireless.yaml +++ b/boards/others/icev_wireless/icev_wireless.yaml @@ -4,8 +4,4 @@ type: mcu arch: riscv toolchain: - zephyr -testing: - ignore_tags: - - net - - bluetooth vendor: espressif diff --git a/boards/others/stm32f401_mini/stm32f401_mini.dts b/boards/others/stm32f401_mini/stm32f401_mini.dts index 8553bd8edf4b50a..64c1da9af27f6b9 100644 --- a/boards/others/stm32f401_mini/stm32f401_mini.dts +++ b/boards/others/stm32f401_mini/stm32f401_mini.dts @@ -117,7 +117,7 @@ zephyr_udc0: &usbotg_fs { &adc1 { pinctrl-0 = <&adc1_in1_pa1>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <2>; status = "okay"; }; diff --git a/boards/panasonic/pan1770_evb/Kconfig.defconfig b/boards/panasonic/pan1770_evb/Kconfig.defconfig index 8a91e35369a2c84..fc9670a22db18c4 100644 --- a/boards/panasonic/pan1770_evb/Kconfig.defconfig +++ b/boards/panasonic/pan1770_evb/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_PAN1770_EVB -config BT_CTLR - default BT - endif # BOARD_PAN1770_EVB diff --git a/boards/panasonic/pan1780_evb/Kconfig.defconfig b/boards/panasonic/pan1780_evb/Kconfig.defconfig index 81bb7a60819b093..7c4acfad4b65eed 100644 --- a/boards/panasonic/pan1780_evb/Kconfig.defconfig +++ b/boards/panasonic/pan1780_evb/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_PAN1780_EVB -config BT_CTLR - default BT - endif # BOARD_PAN1780_EVB diff --git a/boards/panasonic/pan1781_evb/Kconfig.defconfig b/boards/panasonic/pan1781_evb/Kconfig.defconfig index 518676e36437fb8..aacad9968c24b82 100644 --- a/boards/panasonic/pan1781_evb/Kconfig.defconfig +++ b/boards/panasonic/pan1781_evb/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_PAN1781_EVB -config BT_CTLR - default BT - endif # BOARD_PAN1781_EVB diff --git a/boards/panasonic/pan1782_evb/Kconfig.defconfig b/boards/panasonic/pan1782_evb/Kconfig.defconfig index c9136006be489f1..f3ad6583017c27a 100644 --- a/boards/panasonic/pan1782_evb/Kconfig.defconfig +++ b/boards/panasonic/pan1782_evb/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_PAN1782_EVB -config BT_CTLR - default BT - endif # BOARD_PAN1782_EVB diff --git a/boards/panasonic/pan1783/Kconfig.defconfig b/boards/panasonic/pan1783/Kconfig.defconfig index 9f69518027a7538..f240f37ef85db0b 100644 --- a/boards/panasonic/pan1783/Kconfig.defconfig +++ b/boards/panasonic/pan1783/Kconfig.defconfig @@ -16,7 +16,4 @@ endif # SOC_NRF5340_CPUAPP_QKAA if SOC_NRF5340_CPUNET_QKAA -config BT_CTLR - default y if BT - endif # SOC_NRF5340_CPUNET_QKAA diff --git a/boards/particle/argon/Kconfig.defconfig b/boards/particle/argon/Kconfig.defconfig index 72954154c71f8d4..7d17a09d99b820b 100644 --- a/boards/particle/argon/Kconfig.defconfig +++ b/boards/particle/argon/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_PARTICLE_ARGON -config BT_CTLR - default BT - endif # BOARD_PARTICLE_ARGON diff --git a/boards/particle/boron/Kconfig.defconfig b/boards/particle/boron/Kconfig.defconfig index cce1a36897fae5b..6fefbf76846619f 100644 --- a/boards/particle/boron/Kconfig.defconfig +++ b/boards/particle/boron/Kconfig.defconfig @@ -5,9 +5,6 @@ if BOARD_PARTICLE_BORON -config BT_CTLR - default BT - if MODEM config MODEM_UBLOX_SARA diff --git a/boards/particle/nrf51_blenano/Kconfig.defconfig b/boards/particle/nrf51_blenano/Kconfig.defconfig index fb61b0311431035..a5f58e098992327 100644 --- a/boards/particle/nrf51_blenano/Kconfig.defconfig +++ b/boards/particle/nrf51_blenano/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_NRF51_BLENANO -config BT_CTLR - default BT - endif # BOARD_NRF51_BLENANO diff --git a/boards/particle/nrf52_blenano2/Kconfig.defconfig b/boards/particle/nrf52_blenano2/Kconfig.defconfig index df0bcd9b33a529f..5e57d952594bc1e 100644 --- a/boards/particle/nrf52_blenano2/Kconfig.defconfig +++ b/boards/particle/nrf52_blenano2/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_NRF52_BLENANO2 -config BT_CTLR - default BT - endif # BOARD_NRF52_BLENANO2 diff --git a/boards/particle/xenon/Kconfig.defconfig b/boards/particle/xenon/Kconfig.defconfig index 1cd3ad31f067532..f58b2e117929fbe 100644 --- a/boards/particle/xenon/Kconfig.defconfig +++ b/boards/particle/xenon/Kconfig.defconfig @@ -6,7 +6,4 @@ if BOARD_PARTICLE_XENON -config BT_CTLR - default BT - endif # BOARD_PARTICLE_XENON diff --git a/boards/phytec/reel_board/Kconfig.defconfig b/boards/phytec/reel_board/Kconfig.defconfig index 68061a3ef3b3800..0436c7b1d7a67b9 100644 --- a/boards/phytec/reel_board/Kconfig.defconfig +++ b/boards/phytec/reel_board/Kconfig.defconfig @@ -8,10 +8,6 @@ if BOARD_REEL_BOARD config I2C default y -config BT_CTLR - default y - depends on BT - if FXOS8700 choice FXOS8700_MODE diff --git a/boards/pine64/pinetime_devkit0/Kconfig.defconfig b/boards/pine64/pinetime_devkit0/Kconfig.defconfig index adfebb274d97df7..e83a778e2b6ae1c 100644 --- a/boards/pine64/pinetime_devkit0/Kconfig.defconfig +++ b/boards/pine64/pinetime_devkit0/Kconfig.defconfig @@ -5,9 +5,6 @@ if BOARD_PINETIME_DEVKIT0 -config BT_CTLR - default BT - config INPUT default y if LVGL diff --git a/boards/qemu/cortex_m3/Kconfig.defconfig b/boards/qemu/cortex_m3/Kconfig.defconfig index 07f168ce4145bb2..13b7fc07a9b6e72 100644 --- a/boards/qemu/cortex_m3/Kconfig.defconfig +++ b/boards/qemu/cortex_m3/Kconfig.defconfig @@ -12,4 +12,12 @@ choice NULL_POINTER_EXCEPTION_DETECTION default NULL_POINTER_EXCEPTION_DETECTION_NONE endchoice +# BT relies on PSA Crypto API to perform crypto operations and, on this platform, +# these APIs are provided thougth Mbed TLS. Unfortunately this platform is not +# provided with a true random number generator which is required to properly +# initialize the PSA Crypto core, so we need to enable the fake TEST_RANDOM_GENERATOR. +config TEST_RANDOM_GENERATOR + bool + default y if BT + endif # BOARD_QEMU_CORTEX_M3 diff --git a/boards/qorvo/decawave_dwm1001_dev/Kconfig.defconfig b/boards/qorvo/decawave_dwm1001_dev/Kconfig.defconfig index cd2a985b1ebc8e9..e29eec91cb3cd99 100644 --- a/boards/qorvo/decawave_dwm1001_dev/Kconfig.defconfig +++ b/boards/qorvo/decawave_dwm1001_dev/Kconfig.defconfig @@ -5,9 +5,6 @@ if BOARD_DECAWAVE_DWM1001_DEV -config BT_CTLR - default BT - config I2C default SENSOR diff --git a/boards/qorvo/decawave_dwm3001cdk/Kconfig b/boards/qorvo/decawave_dwm3001cdk/Kconfig deleted file mode 100644 index b7e308ed70dce92..000000000000000 --- a/boards/qorvo/decawave_dwm3001cdk/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -# DecaWave DWM3001CDK board configuration - -# Copyright (c) 2024 The Zephyr Project Contributors -# # SPDX-License-Identifier: Apache-2.0 - -if BOARD_DECAWAVE_DWM3001CDK - -config BOARD_SERIAL_BACKEND_CDC_ACM - bool "Use USB CDC as serial console backend" - default y - -endif # BOARD_DECAWAVE_DWM3001CDK diff --git a/boards/qorvo/decawave_dwm3001cdk/Kconfig.defconfig b/boards/qorvo/decawave_dwm3001cdk/Kconfig.defconfig index 93c1b48a213cfb7..c814a6c8994d0ca 100644 --- a/boards/qorvo/decawave_dwm3001cdk/Kconfig.defconfig +++ b/boards/qorvo/decawave_dwm3001cdk/Kconfig.defconfig @@ -5,66 +5,7 @@ if BOARD_DECAWAVE_DWM3001CDK -config BT_CTLR - default BT - config I2C default SENSOR -if BOARD_SERIAL_BACKEND_CDC_ACM - -config USB_DEVICE_STACK - default y - -config USB_CDC_ACM - default SERIAL - -config CONSOLE - default y - -config UART_CONSOLE - default CONSOLE - -config USB_DEVICE_INITIALIZE_AT_BOOT - default y if !MCUBOOT && CONSOLE - -config SHELL_BACKEND_SERIAL_CHECK_DTR - default SHELL - depends on UART_LINE_CTRL - -config UART_LINE_CTRL - default y - -config USB_DEVICE_REMOTE_WAKEUP - default n - -if LOG - -# Logger cannot use itself to log -choice USB_CDC_ACM_LOG_LEVEL_CHOICE - default USB_CDC_ACM_LOG_LEVEL_OFF -endchoice - -# Set USB log level to error only -choice USB_DEVICE_LOG_LEVEL_CHOICE - default USB_DEVICE_LOG_LEVEL_ERR -endchoice - -endif # LOG - -if USB_DEVICE_STACK - -# Enable UART driver, needed for CDC ACM -config SERIAL - default y - -endif # USB_DEVICE_STACK - -endif # BOARD_SERIAL_BACKEND_CDC_ACM - -DT_CHOSEN_ZEPHYR_CONSOLE := zephyr,console - -config UART_CONSOLE - default y if $(dt_chosen_enabled,$(DT_CHOSEN_ZEPHYR_CONSOLE)) && CONSOLE - endif # BOARD_DECAWAVE_DWM3001CDK diff --git a/boards/qorvo/decawave_dwm3001cdk/decawave_dwm3001cdk-pinctrl.dtsi b/boards/qorvo/decawave_dwm3001cdk/decawave_dwm3001cdk-pinctrl.dtsi index 4bbfe0554977b12..b68c634870adc51 100644 --- a/boards/qorvo/decawave_dwm3001cdk/decawave_dwm3001cdk-pinctrl.dtsi +++ b/boards/qorvo/decawave_dwm3001cdk/decawave_dwm3001cdk-pinctrl.dtsi @@ -4,6 +4,21 @@ */ &pinctrl { + uart0_default: uart0_default { + group1 { + psels = , + ; + }; + }; + + uart0_sleep: uart0_sleep { + group1 { + psels = , + ; + low-power-enable; + }; + }; + i2c0_default: i2c0_default { group1 { psels = , diff --git a/boards/qorvo/decawave_dwm3001cdk/decawave_dwm3001cdk.dts b/boards/qorvo/decawave_dwm3001cdk/decawave_dwm3001cdk.dts index a616dbf2be711a1..88f85efbde57825 100644 --- a/boards/qorvo/decawave_dwm3001cdk/decawave_dwm3001cdk.dts +++ b/boards/qorvo/decawave_dwm3001cdk/decawave_dwm3001cdk.dts @@ -14,11 +14,11 @@ compatible = "decawave,dwm3001"; chosen { - zephyr,console = &cdc_acm_uart0; - zephyr,shell-uart = &cdc_acm_uart0; - zephyr,uart-mcumgr = &cdc_acm_uart0; - zephyr,bt-mon-uart = &cdc_acm_uart0; - zephyr,bt-c2h-uart = &cdc_acm_uart0; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,uart-mcumgr = &uart0; + zephyr,bt-mon-uart = &uart0; + zephyr,bt-c2h-uart = &uart0; zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,code-partition = &slot0_partition; @@ -84,6 +84,15 @@ status = "okay"; }; +&uart0 { + status = "okay"; + compatible = "nordic,nrf-uart"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-1 = <&uart0_sleep>; + pinctrl-names = "default", "sleep"; +}; + &gpio1 { status = "okay"; }; @@ -145,10 +154,6 @@ zephyr_udc0: &usbd { compatible = "nordic,nrf-usbd"; status = "okay"; - - cdc_acm_uart0: cdc_acm_uart0 { - compatible = "zephyr,cdc-acm-uart"; - }; }; ®1 { diff --git a/boards/qorvo/decawave_dwm3001cdk/decawave_dwm3001cdk_defconfig b/boards/qorvo/decawave_dwm3001cdk/decawave_dwm3001cdk_defconfig index c115d16a9d05125..7b06dae90852fb0 100644 --- a/boards/qorvo/decawave_dwm3001cdk/decawave_dwm3001cdk_defconfig +++ b/boards/qorvo/decawave_dwm3001cdk/decawave_dwm3001cdk_defconfig @@ -8,3 +8,10 @@ CONFIG_HW_STACK_PROTECTION=y # Enable GPIO CONFIG_GPIO=y + +# Enable UART controller +CONFIG_SERIAL=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y diff --git a/boards/qorvo/decawave_dwm3001cdk/doc/index.rst b/boards/qorvo/decawave_dwm3001cdk/doc/index.rst index 278699aa1b1c764..ada232518fe1016 100644 --- a/boards/qorvo/decawave_dwm3001cdk/doc/index.rst +++ b/boards/qorvo/decawave_dwm3001cdk/doc/index.rst @@ -31,30 +31,24 @@ found in :ref:`nordic_segger_flashing`. Then build and flash applications as usual (see :ref:`build_an_application` and :ref:`application_run` for more details). -There are two USB ports, the one farthest from the DWM3001C is connected to the -J-Link debugger and the closer one is connected to the nRF52833, though you need -to use CDC ACM USB to get output over it +Here is an example for the :zephyr:code-sample:`hello_world` application. -Here is an example for the :zephyr:code-sample:`usb-cdc-acm` application. - -Connect to the bottom USB port, and flash the sample - -.. zephyr-app-commands:: - :zephyr-app: samples/subsys/usb/console - :board: decawave_dwm3001cdk - :goals: build flash - - -Then, connect the top USB port and open run your favorite terminal program to -listen for output. +Connect to the bottom micro-USB port labeled as J-Link and run your favorite +terminal program to listen for console output. .. code-block:: console $ minicom -D -b 115200 -Replace :code:`` with the port where the board nRF52 DK -can be found. For example, under Linux, :code:`/dev/ttyACM0`. +Replace :code:`` with the port where the DWM3001CDK board can be +found. For example, under Linux, :code:`/dev/ttyACM0`. + +Then build and flash the application in the usual way. +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: decawave_dwm3001cdk + :goals: build flash References ********** diff --git a/boards/rakwireless/rak11720/Kconfig.defconfig b/boards/rakwireless/rak11720/Kconfig.defconfig new file mode 100644 index 000000000000000..ae6e8ff2bf88c83 --- /dev/null +++ b/boards/rakwireless/rak11720/Kconfig.defconfig @@ -0,0 +1,11 @@ +# RAKWIRELESS RAK11720 Board configuration +# Copyright (c) 2024 RAKwireless Technology Co., Ltd. +# Sercan Erat +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_RAK11720 + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 32768 if AMBIQ_STIMER_TIMER + +endif # BOARD_RAK11720 diff --git a/boards/rakwireless/rak11720/rak11720.dts b/boards/rakwireless/rak11720/rak11720.dts index 4f4f75d7ff2ca17..828c676f0dd5f31 100644 --- a/boards/rakwireless/rak11720/rak11720.dts +++ b/boards/rakwireless/rak11720/rak11720.dts @@ -8,6 +8,7 @@ #include #include #include "rak11720_apollo3-pinctrl.dtsi" +#include / { model = "RAKwireless RAK11720 WisBlock LPWAN Module"; @@ -19,9 +20,11 @@ zephyr,flash = &flash0; zephyr,console = &uart0; zephyr,shell-uart = &uart0; + zephyr,uart-mcumgr = &uart0; zephyr,uart-pipe = &uart0; zephyr,flash-controller = &flash; zephyr,bt_hci = &bt_hci_apollo; + zephyr,code-partition = &slot0_partition; }; aliases { @@ -29,6 +32,8 @@ led0 = &blue_led; led1 = &green_led; lora0 = &lora; + bootloader-led0 = &blue_led; + mcuboot-led0 = &blue_led; }; leds { @@ -53,14 +58,36 @@ #address-cells = <1>; #size-cells = <1>; - /* Set 16KB of storage at the end of the 976KB of flash */ - storage_partition: partition@f0000 { + internal_boot_partition: partition@0 { + label = "internal_bootloader"; + reg = <0x00000000 0xc000>; + }; + + boot_partition: partition@c000 { + label = "mcuboot"; + reg = <0x0000c000 0xc000>; + }; + slot0_partition: partition@18000 { + label = "image-0"; + reg = <0x00018000 0x72000>; + }; + slot1_partition: partition@8a000 { + label = "image-1"; + reg = <0x0008a000 0x72000>; + }; + + /* Set 16KB of storage at the end of the 1024KB of flash */ + storage_partition: partition@fc000 { label = "storage"; - reg = <0x000f0000 0x4000>; + reg = <0x000fc000 0x4000>; }; }; }; +&stimer0 { + clk-source = <3>; +}; + &bleif { pinctrl-0 = <&bleif_default>; pinctrl-names = "default"; diff --git a/boards/rakwireless/rak4631/Kconfig.defconfig b/boards/rakwireless/rak4631/Kconfig.defconfig index bf7cf003b2932b9..906754a1eb0986c 100644 --- a/boards/rakwireless/rak4631/Kconfig.defconfig +++ b/boards/rakwireless/rak4631/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_RAK4631 -config BT_CTLR - default BT - endif # BOARD_RAK4631 diff --git a/boards/rakwireless/rak5010/Kconfig.defconfig b/boards/rakwireless/rak5010/Kconfig.defconfig index 302f7fecd07ed6c..5d71cbdc1f46a74 100644 --- a/boards/rakwireless/rak5010/Kconfig.defconfig +++ b/boards/rakwireless/rak5010/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_RAK5010 -config BT_CTLR - default BT - endif # BOARD_RAK5010 diff --git a/boards/raspberrypi/common/rpi_pico-led.dtsi b/boards/raspberrypi/common/rpi_pico-led.dtsi new file mode 100644 index 000000000000000..951e36260f20078 --- /dev/null +++ b/boards/raspberrypi/common/rpi_pico-led.dtsi @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2021 Yonatan Schachter + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* Pico and Pico 2 boards (but not Pico W) have a common LED placement. */ +/ { + leds { + compatible = "gpio-leds"; + led0: led_0 { + gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>; + label = "LED"; + }; + }; + + pwm_leds { + compatible = "pwm-leds"; + status = "disabled"; + pwm_led0: pwm_led_0 { + pwms = <&pwm 9 PWM_MSEC(20) PWM_POLARITY_NORMAL>; + label = "PWM_LED"; + }; + }; + + aliases { + led0 = &led0; + pwm-led0 = &pwm_led0; + }; +}; diff --git a/boards/raspberrypi/common/rpi_pico-pinctrl-common.dtsi b/boards/raspberrypi/common/rpi_pico-pinctrl-common.dtsi new file mode 100644 index 000000000000000..66ccfd2089592d7 --- /dev/null +++ b/boards/raspberrypi/common/rpi_pico-pinctrl-common.dtsi @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2021, Yonatan Schachter + * SPDX-License-Identifier: Apache-2.0 + */ + +/* The Pico and Pico 2 are pin compatible. */ +&pinctrl { + uart0_default: uart0_default { + group1 { + pinmux = ; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , ; + input-enable; + input-schmitt-enable; + }; + }; + + i2c1_default: i2c1_default { + group1 { + pinmux = , ; + input-enable; + input-schmitt-enable; + }; + }; + + spi0_default: spi0_default { + group1 { + pinmux = , , ; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + pwm_ch4b_default: pwm_ch4b_default { + group1 { + pinmux = ; + }; + }; + + adc_default: adc_default { + group1 { + pinmux = , , , ; + input-enable; + }; + }; +}; diff --git a/boards/raspberrypi/rpi_5/doc/index.rst b/boards/raspberrypi/rpi_5/doc/index.rst index ea3b3c4243a96c7..d503f573df356cd 100644 --- a/boards/raspberrypi/rpi_5/doc/index.rst +++ b/boards/raspberrypi/rpi_5/doc/index.rst @@ -41,6 +41,9 @@ The Raspberry Pi 5 board configuration supports the following hardware features: - N/A - :dtcompatible:`arm,gic-v2` * - GPIO + - :kconfig:option:`CONFIG_GPIO` + - :dtcompatible:`raspberrypi,rp1-gpio` + * - GPIO (Internal) - :kconfig:option:`CONFIG_GPIO` - :dtcompatible:`brcm,brcmstb-gpio` * - UART diff --git a/boards/raspberrypi/rpi_5/rpi_5.dts b/boards/raspberrypi/rpi_5/rpi_5.dts index 6fca0efd3d0c67c..adba94d94748fc6 100644 --- a/boards/raspberrypi/rpi_5/rpi_5.dts +++ b/boards/raspberrypi/rpi_5/rpi_5.dts @@ -43,3 +43,7 @@ status = "okay"; current-speed = <115200>; }; + +&gpio0_0 { + status = "okay"; +}; diff --git a/boards/raspberrypi/rpi_pico/Kconfig.defconfig b/boards/raspberrypi/rpi_pico/Kconfig.defconfig index d3a7429fedb4532..71c4fd9c43f2584 100644 --- a/boards/raspberrypi/rpi_pico/Kconfig.defconfig +++ b/boards/raspberrypi/rpi_pico/Kconfig.defconfig @@ -13,4 +13,15 @@ endif # I2C_DW config USB_SELF_POWERED default n +if BOARD_RPI_PICO_RP2040_W && WIFI_AIROC + +config MAIN_STACK_SIZE + default 4096 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 16384 + +endif # BOARD_RPI_PICO_RP2040_W && WIFI_AIROC + endif # BOARD_RPI_PICO diff --git a/boards/raspberrypi/rpi_pico/board.cmake b/boards/raspberrypi/rpi_pico/board.cmake index e9cd4edc18f594b..8d09fe3ab05ef47 100644 --- a/boards/raspberrypi/rpi_pico/board.cmake +++ b/boards/raspberrypi/rpi_pico/board.cmake @@ -13,7 +13,7 @@ # The value must be the 'stem' part of the name of one of the files # in the openocd interface configuration file. # The setting is store to CMakeCache.txt. -if ("${RPI_PICO_DEBUG_ADAPTER}" STREQUAL "") +if("${RPI_PICO_DEBUG_ADAPTER}" STREQUAL "") set(RPI_PICO_DEBUG_ADAPTER "cmsis-dap") endif() diff --git a/boards/raspberrypi/rpi_pico/doc/index.rst b/boards/raspberrypi/rpi_pico/doc/index.rst index 47ce4401f66bfc4..71f5b42003e3f41 100644 --- a/boards/raspberrypi/rpi_pico/doc/index.rst +++ b/boards/raspberrypi/rpi_pico/doc/index.rst @@ -96,6 +96,8 @@ hardware features: - :kconfig:option:`CONFIG_SPI` - :dtcompatible:`raspberrypi,pico-spi-pio` +.. _rpi_pico_pin_mapping: + Pin Mapping =========== @@ -153,6 +155,23 @@ devices as well as both PIO devices). Programming and Debugging ************************* +System requirements +=================== + +Prerequisites for the Pico W +---------------------------- + +Building for the Raspberry Pi Pico W requires the AIROC binary blobs +provided by Infineon. Run the command below to retrieve those files: + +.. code-block:: console + + west blobs fetch hal_infineon + +.. note:: + + It is recommended running the command above after :file:`west update`. + Flashing ======== diff --git a/boards/raspberrypi/rpi_pico/rpi_pico-common.dtsi b/boards/raspberrypi/rpi_pico/rpi_pico-common.dtsi index 2b40cf3540bc093..811dafcdf7732c0 100644 --- a/boards/raspberrypi/rpi_pico/rpi_pico-common.dtsi +++ b/boards/raspberrypi/rpi_pico/rpi_pico-common.dtsi @@ -6,7 +6,7 @@ #include -#include +#include #include "rpi_pico-pinctrl.dtsi" #include @@ -89,11 +89,6 @@ }; }; -&clocks { - pinctrl-0 = <&clocks_default>; - pinctrl-names = "default"; -}; - &uart0 { current-speed = <115200>; status = "okay"; diff --git a/boards/raspberrypi/rpi_pico/rpi_pico-pinctrl.dtsi b/boards/raspberrypi/rpi_pico/rpi_pico-pinctrl.dtsi index 761354420c6160a..5556638daa6d8c9 100644 --- a/boards/raspberrypi/rpi_pico/rpi_pico-pinctrl.dtsi +++ b/boards/raspberrypi/rpi_pico/rpi_pico-pinctrl.dtsi @@ -5,56 +5,4 @@ #include -&pinctrl { - uart0_default: uart0_default { - group1 { - pinmux = ; - }; - group2 { - pinmux = ; - input-enable; - }; - }; - - i2c0_default: i2c0_default { - group1 { - pinmux = , ; - input-enable; - input-schmitt-enable; - }; - }; - - i2c1_default: i2c1_default { - group1 { - pinmux = , ; - input-enable; - input-schmitt-enable; - }; - }; - - spi0_default: spi0_default { - group1 { - pinmux = , , ; - }; - group2 { - pinmux = ; - input-enable; - }; - }; - - pwm_ch4b_default: pwm_ch4b_default { - group1 { - pinmux = ; - }; - }; - - adc_default: adc_default { - group1 { - pinmux = , , , ; - input-enable; - }; - }; - - clocks_default: clocks_default { - }; -}; +#include "../common/rpi_pico-pinctrl-common.dtsi" diff --git a/boards/raspberrypi/rpi_pico/rpi_pico.dts b/boards/raspberrypi/rpi_pico/rpi_pico.dts index 97d721024d7497c..807dc8e78005396 100644 --- a/boards/raspberrypi/rpi_pico/rpi_pico.dts +++ b/boards/raspberrypi/rpi_pico/rpi_pico.dts @@ -7,27 +7,4 @@ /dts-v1/; #include "rpi_pico-common.dtsi" - -/ { - leds { - compatible = "gpio-leds"; - led0: led_0 { - gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>; - label = "LED"; - }; - }; - - pwm_leds { - compatible = "pwm-leds"; - status = "disabled"; - pwm_led0: pwm_led_0 { - pwms = <&pwm 9 PWM_MSEC(20) PWM_POLARITY_NORMAL>; - label = "PWM_LED"; - }; - }; - - aliases { - led0 = &led0; - pwm-led0 = &pwm_led0; - }; -}; +#include "../common/rpi_pico-led.dtsi" diff --git a/boards/raspberrypi/rpi_pico/rpi_pico_rp2040_w.dts b/boards/raspberrypi/rpi_pico/rpi_pico_rp2040_w.dts index ae01f15d69784ca..cba2142f7b57561 100644 --- a/boards/raspberrypi/rpi_pico/rpi_pico_rp2040_w.dts +++ b/boards/raspberrypi/rpi_pico/rpi_pico_rp2040_w.dts @@ -1,5 +1,6 @@ /* * Copyright (c) 2023 Dave Rensberger - Beechwoods Software + * Copyright (c) 2024 Steve Boylan * * SPDX-License-Identifier: Apache-2.0 */ @@ -7,3 +8,60 @@ /dts-v1/; #include "rpi_pico-common.dtsi" + +&pinctrl { + pio0_spi0_default: pio0_spi0_default { + /* gpio 25 is used for chip select, not assigned to the PIO */ + group1 { + pinmux = ; + }; + }; + + airoc_wifi_default: airoc_wifi_default { + /* Control of GPIO24 is done through the WiFi driver */ + group1 { + pinmux = ; + input-enable; + }; + }; + + airoc_wifi_host_wake: airoc_wifi_host_wake { + /* Assign GPIO24 to SIO (GPIO) for use as an interrupt source */ + group1 { + /* Lacking a specific SIO pin definition, use the RP2040_PINMUX macro */ + pinmux = ; + input-enable; + }; + }; +}; + +&pio0 { + status = "okay"; + + pio0_spi0: pio0_spi0 { + compatible = "raspberrypi,pico-spi-pio"; + clocks = < &clocks RPI_PICO_CLKID_CLK_SYS >; + #address-cells = <1>; + #size-cells = <0>; + cs-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; + clk-gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; + sio-gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&pio0_spi0_default>; + pinctrl-names = "default"; + status = "okay"; + airoc-wifi@0 { + compatible = "infineon,airoc-wifi"; + reg = < 0 >; + wifi-reg-on-gpios = < &gpio0 23 GPIO_ACTIVE_HIGH >; + bus-select-gpios = < &gpio0 24 GPIO_ACTIVE_HIGH >; + wifi-host-wake-gpios = < &gpio0 24 GPIO_ACTIVE_HIGH >; + spi-max-frequency = < 10000000 >; + spi-half-duplex; + spi-data-irq-shared; + pinctrl-0 = <&airoc_wifi_default>; + pinctrl-1 = <&airoc_wifi_host_wake>; + pinctrl-names = "default", "host_wake"; + status = "okay"; + }; + }; +}; diff --git a/boards/raspberrypi/rpi_pico/rpi_pico_rp2040_w_defconfig b/boards/raspberrypi/rpi_pico/rpi_pico_rp2040_w_defconfig index df003531af9c870..d1e96b968c5e8a3 100644 --- a/boards/raspberrypi/rpi_pico/rpi_pico_rp2040_w_defconfig +++ b/boards/raspberrypi/rpi_pico/rpi_pico_rp2040_w_defconfig @@ -9,3 +9,6 @@ CONFIG_BUILD_OUTPUT_HEX=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_RESET=y CONFIG_CLOCK_CONTROL=y + +# Default networking configuration +CONFIG_CYW43439=y diff --git a/boards/raspberrypi/rpi_pico2/Kconfig.defconfig b/boards/raspberrypi/rpi_pico2/Kconfig.defconfig new file mode 100644 index 000000000000000..d122f3e4918aaba --- /dev/null +++ b/boards/raspberrypi/rpi_pico2/Kconfig.defconfig @@ -0,0 +1,9 @@ +# Copyright (c) 2024 Andrew Featherstone +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_RPI_PICO2 + +config USB_SELF_POWERED + default n + +endif # BOARD_RPI_PICO2 diff --git a/boards/raspberrypi/rpi_pico2/Kconfig.rpi_pico2 b/boards/raspberrypi/rpi_pico2/Kconfig.rpi_pico2 new file mode 100644 index 000000000000000..bcce97758fbe4c7 --- /dev/null +++ b/boards/raspberrypi/rpi_pico2/Kconfig.rpi_pico2 @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Andrew Featherstone +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_RPI_PICO2 + select SOC_RP2350A_M33 if BOARD_RPI_PICO2_RP2350A_M33 diff --git a/boards/raspberrypi/rpi_pico2/board.cmake b/boards/raspberrypi/rpi_pico2/board.cmake new file mode 100644 index 000000000000000..feae063129ac7ac --- /dev/null +++ b/boards/raspberrypi/rpi_pico2/board.cmake @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: Apache-2.0 + +if("${RPI_PICO_DEBUG_ADAPTER}" STREQUAL "") + set(RPI_PICO_DEBUG_ADAPTER "cmsis-dap") +endif() + +board_runner_args(openocd --cmd-pre-init "source [find interface/${RPI_PICO_DEBUG_ADAPTER}.cfg]") +board_runner_args(openocd --cmd-pre-init "source [find target/rp2350.cfg]") + +# The adapter speed is expected to be set by interface configuration. +# The Raspberry Pi's OpenOCD fork doesn't, so match their documentation at +# https://www.raspberrypi.com/documentation/microcontrollers/debug-probe.html#debugging-with-swd +board_runner_args(openocd --cmd-pre-init "set_adapter_speed_if_not_set 5000") + +board_runner_args(uf2 "--board-id=RP2350") + +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) +include(${ZEPHYR_BASE}/boards/common/uf2.board.cmake) diff --git a/boards/raspberrypi/rpi_pico2/board.yml b/boards/raspberrypi/rpi_pico2/board.yml new file mode 100644 index 000000000000000..2ab8ee599891eb6 --- /dev/null +++ b/boards/raspberrypi/rpi_pico2/board.yml @@ -0,0 +1,6 @@ +board: + name: rpi_pico2 + full_name: Raspberry Pi Pico 2 + vendor: raspberrypi + socs: + - name: rp2350a diff --git a/boards/raspberrypi/rpi_pico2/doc/img/rpi_pico2.webp b/boards/raspberrypi/rpi_pico2/doc/img/rpi_pico2.webp new file mode 100644 index 000000000000000..6a4895ba7b285ba Binary files /dev/null and b/boards/raspberrypi/rpi_pico2/doc/img/rpi_pico2.webp differ diff --git a/boards/raspberrypi/rpi_pico2/doc/index.rst b/boards/raspberrypi/rpi_pico2/doc/index.rst new file mode 100644 index 000000000000000..1457a8b849e4961 --- /dev/null +++ b/boards/raspberrypi/rpi_pico2/doc/index.rst @@ -0,0 +1,93 @@ +.. zephyr:board:: rpi_pico2 + +Overview +******** + +The Raspberry Pi Pico 2 is the second-generation product in the Raspberry Pi +Pico family. From the `Raspberry Pi website `_ is referred to as Pico 2. + +There are many limitations of the board currently. Including but not limited to: +- The Zephyr build only supports configuring the RP2350A with the Cortex-M33 cores. +- As with the Pico 1, there's no support for running any code on the second core. + +Hardware +******** + +- Dual Cortex-M33 or Hazard3 processors at up to 150MHz +- 520KB of SRAM, and 4MB of on-board flash memory +- USB 1.1 with device and host support +- Low-power sleep and dormant modes +- Drag-and-drop programming using mass storage over USB +- 26 multi-function GPIO pins including 3 that can be used for ADC +- 2 SPI, 2 I2C, 2 UART, 3 12-bit 500ksps Analogue to Digital - Converter (ADC), 24 controllable PWM channels +- 2 Timer with 4 alarms, 1 AON Timer +- Temperature sensor +- 3 Programmable IO (PIO) blocks, 12 state machines total for custom peripheral support + + - Flexible, user-programmable high-speed IO + - Can emulate interfaces such as SD Card and VGA + +Supported Features +================== + +The ``rpi_pico2/rp2350a/m33`` board target supports the following +hardware features: + +.. list-table:: + :header-rows: 1 + + * - Peripheral + - Kconfig option + - Devicetree compatible + * - NVIC + - N/A + - :dtcompatible:`arm,v8m-nvic` + * - ADC + - :kconfig:option:`CONFIG_ADC` + - :dtcompatible:`raspberrypi,pico-adc` + * - Clock controller + - :kconfig:option:`CONFIG_CLOCK_CONTROL` + - :dtcompatible:`raspberrypi,pico-clock-controller` + * - Counter + - :kconfig:option:`CONFIG_COUNTER` + - :dtcompatible:`raspberrypi,pico-timer` + * - DMA + - :kconfig:option:`CONFIG_DMA` + - :dtcompatible:`raspberrypi,pico-dma` + * - GPIO + - :kconfig:option:`CONFIG_GPIO` + - :dtcompatible:`raspberrypi,pico-gpio` + * - HWINFO + - :kconfig:option:`CONFIG_HWINFO` + - N/A + * - I2C + - :kconfig:option:`CONFIG_I2C` + - :dtcompatible:`snps,designware-i2c` + * - PWM + - :kconfig:option:`CONFIG_PWM` + - :dtcompatible:`raspberrypi,pico-pwm` + * - SPI + - :kconfig:option:`CONFIG_SPI` + - :dtcompatible:`raspberrypi,pico-spi` + * - UART + - :kconfig:option:`CONFIG_SERIAL` + - :dtcompatible:`raspberrypi,pico-uart` + * - UART (PIO) + - :kconfig:option:`CONFIG_SERIAL` + - :dtcompatible:`raspberrypi,pico-uart-pio` + +Connections and IOs +=================== + +The default pin mapping is unchanged from the Pico 1 (see :ref:`rpi_pico_pin_mapping`). + +Programming and Debugging +************************* + +As with the Pico 1, the SWD interface can be used to program and debug the +device, e.g. using OpenOCD with the `Raspberry Pi Debug Probe `_ . + +References +********** + +.. target-notes:: diff --git a/boards/raspberrypi/rpi_pico2/rpi_pico2-pinctrl.dtsi b/boards/raspberrypi/rpi_pico2/rpi_pico2-pinctrl.dtsi new file mode 100644 index 000000000000000..a7841dc2da6ced3 --- /dev/null +++ b/boards/raspberrypi/rpi_pico2/rpi_pico2-pinctrl.dtsi @@ -0,0 +1,8 @@ +/* + * Copyright (c) 2024, Andrew Featherstone + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +#include "../common/rpi_pico-pinctrl-common.dtsi" diff --git a/boards/raspberrypi/rpi_pico2/rpi_pico2.dtsi b/boards/raspberrypi/rpi_pico2/rpi_pico2.dtsi new file mode 100644 index 000000000000000..85cdb97e8457edc --- /dev/null +++ b/boards/raspberrypi/rpi_pico2/rpi_pico2.dtsi @@ -0,0 +1,144 @@ +/* + * Copyright (c) 2024 Andrew Featherstone + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +#include +#include + +#include "rpi_pico2-pinctrl.dtsi" +#include "../common/rpi_pico-led.dtsi" + +/ { + chosen { + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,code-partition = &code_partition; + }; + + aliases { + watchdog0 = &wdt0; + }; + + pico_header: connector { + compatible = "raspberrypi,pico-header"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpio0 0 0>, /* GP0 */ + <1 0 &gpio0 1 0>, /* GP1 */ + <2 0 &gpio0 2 0>, /* GP2 */ + <3 0 &gpio0 3 0>, /* GP3 */ + <4 0 &gpio0 4 0>, /* GP4 */ + <5 0 &gpio0 5 0>, /* GP5 */ + <6 0 &gpio0 6 0>, /* GP6 */ + <7 0 &gpio0 7 0>, /* GP7 */ + <8 0 &gpio0 8 0>, /* GP8 */ + <9 0 &gpio0 9 0>, /* GP9 */ + <10 0 &gpio0 10 0>, /* GP10 */ + <11 0 &gpio0 11 0>, /* GP11 */ + <12 0 &gpio0 12 0>, /* GP12 */ + <13 0 &gpio0 13 0>, /* GP13 */ + <14 0 &gpio0 14 0>, /* GP14 */ + <15 0 &gpio0 15 0>, /* GP15 */ + <16 0 &gpio0 16 0>, /* GP16 */ + <17 0 &gpio0 17 0>, /* GP17 */ + <18 0 &gpio0 18 0>, /* GP18 */ + <19 0 &gpio0 19 0>, /* GP19 */ + <20 0 &gpio0 20 0>, /* GP20 */ + <21 0 &gpio0 21 0>, /* GP21 */ + <22 0 &gpio0 22 0>, /* GP22 */ + <26 0 &gpio0 26 0>, /* GP26 */ + <27 0 &gpio0 27 0>, /* GP27 */ + <28 0 &gpio0 28 0>; /* GP28 */ + }; +}; + +&flash0 { + reg = <0x10000000 DT_SIZE_M(4)>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* Reserved memory for an image definition block. The block is much + * smaller than 256 bytes, but in practice the linker places the vector + * table at a much larger alignment offset. + */ + image_def: partition@0 { + label = "image_def"; + reg = <0x00000000 0x100>; + read-only; + }; + + /* + * Usable flash. Starts at 0x100, after the image definition block. + * The partition size is 4MB minus the 0x100 bytes taken by the + * image definition. + */ + code_partition: partition@100 { + label = "code-partition"; + reg = <0x100 (DT_SIZE_M(4) - 0x100)>; + read-only; + }; + }; +}; + +&uart0 { + current-speed = <115200>; + status = "okay"; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +&gpio0 { + status = "okay"; +}; + +&spi0 { + clock-frequency = ; + pinctrl-0 = <&spi0_default>; + pinctrl-names = "default"; +}; + +&i2c0 { + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2c1 { + clock-frequency = ; + pinctrl-0 = <&i2c1_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&adc { + pinctrl-0 = <&adc_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&pwm { + pinctrl-0 = <&pwm_ch4b_default>; + pinctrl-names = "default"; + divider-int-0 = <255>; +}; + +&timer0 { + status = "okay"; +}; + +zephyr_udc0: &usbd { + status = "okay"; +}; + +pico_serial: &uart0 {}; diff --git a/boards/raspberrypi/rpi_pico2/rpi_pico2_rp2350a_m33.dts b/boards/raspberrypi/rpi_pico2/rpi_pico2_rp2350a_m33.dts new file mode 100644 index 000000000000000..f96491f44e2e5c3 --- /dev/null +++ b/boards/raspberrypi/rpi_pico2/rpi_pico2_rp2350a_m33.dts @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2024 Andrew Featherstone + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +/* The build system assumes that there's a cpucluster-specific file. + * + * This file provides composition of the device tree: + * 1. The common features of the SoC + * 2. Core-specific configuration. + * 3. Board-specific configuration. + */ +#include +#include + +/* there's nothing specific to the Cortex-M33 cores vs the (not yet + * implemented) Hazard3 cores. + */ +#include "rpi_pico2.dtsi" diff --git a/boards/raspberrypi/rpi_pico2/rpi_pico2_rp2350a_m33.yaml b/boards/raspberrypi/rpi_pico2/rpi_pico2_rp2350a_m33.yaml new file mode 100644 index 000000000000000..d3c340d88b14a1b --- /dev/null +++ b/boards/raspberrypi/rpi_pico2/rpi_pico2_rp2350a_m33.yaml @@ -0,0 +1,21 @@ +identifier: rpi_pico2/rp2350a/m33 +name: Raspberry Pi Pico 2 (Cortex-M33) +type: mcu +arch: arm +flash: 4096 +ram: 520 +toolchain: + - zephyr + - gnuarmemb + - xtools +supported: + - adc + - clock + - counter + - dma + - gpio + - hwinfo + - i2c + - pwm + - spi + - uart diff --git a/boards/raspberrypi/rpi_pico2/rpi_pico2_rp2350a_m33_defconfig b/boards/raspberrypi/rpi_pico2/rpi_pico2_rp2350a_m33_defconfig new file mode 100644 index 000000000000000..8bd68e3511391d1 --- /dev/null +++ b/boards/raspberrypi/rpi_pico2/rpi_pico2_rp2350a_m33_defconfig @@ -0,0 +1,14 @@ +# This configuration is orthogonal to whether the Cortex-M33 or Hazard3 cores +# are in use, but Zephyr does not support providing a qualifier-agnostic +# _defconfig file. +CONFIG_BUILD_OUTPUT_HEX=y +CONFIG_BUILD_OUTPUT_UF2=y +CONFIG_CLOCK_CONTROL=y +CONFIG_CONSOLE=y +CONFIG_GPIO=y +CONFIG_RESET=y +CONFIG_SERIAL=y +CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=150000000 +CONFIG_UART_CONSOLE=y +CONFIG_UART_INTERRUPT_DRIVEN=y +CONFIG_USE_DT_CODE_PARTITION=y diff --git a/boards/raspberrypi/rpi_pico2/support/openocd.cfg b/boards/raspberrypi/rpi_pico2/support/openocd.cfg new file mode 100644 index 000000000000000..82666bb53314ce7 --- /dev/null +++ b/boards/raspberrypi/rpi_pico2/support/openocd.cfg @@ -0,0 +1,11 @@ +# Copyright (c) 2024 TOKITA Hiroshi +# SPDX-License-Identifier: Apache-2.0 + +# Checking and set 'adapter speed'. +# Set the adaptor speed, if unset, and given as an argument. +proc set_adapter_speed_if_not_set { speed } { + puts "checking adapter speed..." + if { [catch {adapter speed} ret] } { + adapter speed $speed + } +} diff --git a/boards/raytac/mdbt50q_db_33/Kconfig.defconfig b/boards/raytac/mdbt50q_db_33/Kconfig.defconfig index bb5e7c4a14dc05b..4b8c325c77d3e9c 100644 --- a/boards/raytac/mdbt50q_db_33/Kconfig.defconfig +++ b/boards/raytac/mdbt50q_db_33/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_RAYTAC_MDBT50Q_DB_33 -config BT_CTLR - default BT - endif # BOARD_RAYTAC_MDBT50Q_DB_33 diff --git a/boards/raytac/mdbt50q_db_40/Kconfig.defconfig b/boards/raytac/mdbt50q_db_40/Kconfig.defconfig index 2919530e87c9927..b88aa0342fe14d5 100644 --- a/boards/raytac/mdbt50q_db_40/Kconfig.defconfig +++ b/boards/raytac/mdbt50q_db_40/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_RAYTAC_MDBT50Q_DB_40 -config BT_CTLR - default BT - endif # BOARD_RAYTAC_MDBT50Q_DB_40 diff --git a/boards/raytac/mdbt53_db_40/Kconfig.defconfig b/boards/raytac/mdbt53_db_40/Kconfig.defconfig index dbbe13da493138d..40ae18ba31b95aa 100644 --- a/boards/raytac/mdbt53_db_40/Kconfig.defconfig +++ b/boards/raytac/mdbt53_db_40/Kconfig.defconfig @@ -64,7 +64,4 @@ endif # BOARD_RAYTAC_MDBT53_DB_40_NRF5340_CPUAPP || BOARD_RAYTAC_MDBT53_DB_40_NR if BOARD_RAYTAC_MDBT53_DB_40_NRF5340_CPUNET -config BT_CTLR - default y if BT - endif # BOARD_RAYTAC_MDBT53_DB_40_NRF5340_CPUNET diff --git a/boards/raytac/mdbt53v_db_40/Kconfig.defconfig b/boards/raytac/mdbt53v_db_40/Kconfig.defconfig index b3f4fb77c5b1b0a..61e7592cc66fc37 100644 --- a/boards/raytac/mdbt53v_db_40/Kconfig.defconfig +++ b/boards/raytac/mdbt53v_db_40/Kconfig.defconfig @@ -64,7 +64,4 @@ endif # BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUAPP || BOARD_RAYTAC_MDBT53V_DB_40_ if BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUNET -config BT_CTLR - default y if BT - endif # BOARD_RAYTAC_MDBT53V_DB_40_NRF5340_CPUNET diff --git a/boards/renesas/da14695_dk_usb/da14695_dk_usb-pinctrl.dtsi b/boards/renesas/da14695_dk_usb/da14695_dk_usb-pinctrl.dtsi index fbdf787a88e9630..521c90da0df4525 100644 --- a/boards/renesas/da14695_dk_usb/da14695_dk_usb-pinctrl.dtsi +++ b/boards/renesas/da14695_dk_usb/da14695_dk_usb-pinctrl.dtsi @@ -18,20 +18,20 @@ uart2_default: uart2_default { group1 { - pinmux = ; + pinmux = ; }; group2 { - pinmux = ; + pinmux = ; bias-pull-up; }; }; uart3_default: uart3_default { group1 { - pinmux = ; + pinmux = ; }; group2 { - pinmux = ; + pinmux = ; bias-pull-up; }; }; @@ -63,8 +63,8 @@ /omit-if-no-ref/ i2c2_sleep: i2c2_sleep { group1 { - pinmux = , - ; + pinmux = , + ; bias-pull-up; }; }; diff --git a/boards/renesas/da14695_dk_usb/da14695_dk_usb.dts b/boards/renesas/da14695_dk_usb/da14695_dk_usb.dts index 1b0df2d3b75a84c..96c241aa9d1cdb0 100644 --- a/boards/renesas/da14695_dk_usb/da14695_dk_usb.dts +++ b/boards/renesas/da14695_dk_usb/da14695_dk_usb.dts @@ -38,51 +38,50 @@ }; }; - mikrobus_header{ - mikrobus-connector-1 { - compatible = "mikro-bus"; - #gpio-cells = <2>; - gpio-map-mask = <0xffffffff 0xffffffc0>; - gpio-map-pass-thru = <0 0x3f>; - gpio-map = <0 0 &gpio0 25 0>, /* AN */ - /* Not a GPIO*/ /* RST */ - <2 0 &gpio1 2 0>, /* CS */ - <3 0 &gpio1 3 0>, /* SCK */ - <4 0 &gpio1 4 0>, /* MISO */ - <5 0 &gpio1 5 0>, /* MOSI */ - /* +3.3V */ - /* GND */ - <6 0 &gpio1 6 0>, /* PWM */ - <7 0 &gpio1 7 0>, /* INT */ - <8 0 &gpio1 8 0>, /* RX */ - <9 0 &gpio0 17 0>, /* TX */ - <10 0 &gpio0 18 0>, /* SCL */ - <11 0 &gpio0 19 0>; /* SDA */ - /* +5V */ - /* GND */ - }; - mikrobus-connector-2 { - compatible = "mikro-bus"; - #gpio-cells = <2>; - gpio-map-mask = <0xffffffff 0xffffffc0>; - gpio-map-pass-thru = <0 0x3f>; - gpio-map = <0 0 &gpio1 9 0>, /* AN */ - /* Not a GPIO*/ /* RST */ - <2 0 &gpio0 20 0>, /* CS */ - <3 0 &gpio0 21 0>, /* SCK */ - <4 0 &gpio0 24 0>, /* MISO */ - <5 0 &gpio0 26 0>, /* MOSI */ - /* +3.3V */ - /* GND */ - <6 0 &gpio1 1 0>, /* PWM */ - <7 0 &gpio0 27 0>, /* INT */ - <8 0 &gpio0 28 0>, /* RX */ - <9 0 &gpio0 29 0>, /* TX */ - <10 0 &gpio0 30 0>, /* SCL */ - <11 0 &gpio0 31 0>; /* SDA */ - /* +5V */ - /* GND */ - }; + mikrobus_1_header: mikrobus-connector-1 { + compatible = "mikro-bus"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpio1 9 0>, /* AN */ + <1 0 &gpio0 12 0>, /* RST */ + <2 0 &gpio0 20 0>, /* CS */ + <3 0 &gpio0 21 0>, /* SCK */ + <4 0 &gpio0 24 0>, /* MISO */ + <5 0 &gpio0 26 0>, /* MOSI */ + /* +3.3V */ + /* GND */ + <6 0 &gpio1 1 0>, /* PWM */ + <7 0 &gpio0 27 0>, /* INT */ + <8 0 &gpio0 28 0>, /* RX */ + <9 0 &gpio0 29 0>, /* TX */ + <10 0 &gpio0 30 0>, /* SCL */ + <11 0 &gpio0 31 0>; /* SDA */ + /* +5V */ + /* GND */ + }; + + mikrobus_2_header: mikrobus-connector-2 { + compatible = "mikro-bus"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpio0 25 0>, /* AN */ + <1 0 &gpio0 12 0>, /* RST */ + <2 0 &gpio1 2 0>, /* CS */ + <3 0 &gpio1 3 0>, /* SCK */ + <4 0 &gpio1 4 0>, /* MISO */ + <5 0 &gpio1 5 0>, /* MOSI */ + /* +3.3V */ + /* GND */ + <6 0 &gpio1 6 0>, /* PWM */ + <7 0 &gpio1 7 0>, /* INT */ + <8 0 &gpio1 8 0>, /* RX */ + <9 0 &gpio0 17 0>, /* TX */ + <10 0 &gpio0 18 0>, /* SCL */ + <11 0 &gpio0 19 0>; /* SDA */ + /* +5V */ + /* GND */ }; aliases { @@ -186,6 +185,7 @@ zephyr_udc0: &usbd { &pll { status = "okay"; }; + &i2c { status = "okay"; pinctrl-0 = <&i2c_default>; @@ -218,10 +218,18 @@ mikrobus_1_i2c: &i2c {}; mikrobus_1_spi: &spi {}; -mikrobus_1_uart: &uart2 {}; +mikrobus_1_uart: &uart3 {}; mikrobus_2_i2c: &i2c2 {}; mikrobus_2_spi: &spi2 {}; -mikrobus_2_uart: &uart3 {}; +mikrobus_2_uart: &uart2 {}; + +mikrobus_i2c: &mikrobus_1_i2c {}; + +mikrobus_spi: &mikrobus_1_spi {}; + +mikrobus_serial: &mikrobus_1_uart {}; + +mikrobus_header: &mikrobus_1_header {}; diff --git a/boards/renesas/ek_ra2a1/doc/index.rst b/boards/renesas/ek_ra2a1/doc/index.rst index 365a9c2e04efff0..fd8ebc5e26d6928 100644 --- a/boards/renesas/ek_ra2a1/doc/index.rst +++ b/boards/renesas/ek_ra2a1/doc/index.rst @@ -82,6 +82,12 @@ hardware features: +-----------+------------+-------------------------------+ | COUNTER | on-chip | counter | +-----------+------------+-------------------------------+ +| PWM | on-chip | pwm | ++-----------+------------+-------------------------------+ +| ENTROPY | on-chip | entropy | ++-----------+------------+-------------------------------+ +| I2C | on-chip | i2c | ++-----------+------------+-------------------------------+ The default configuration can be found in :zephyr_file:`boards/renesas/ek_ra2a1/ek_ra2a1_defconfig` diff --git a/boards/renesas/ek_ra2a1/ek_ra2a1-pinctrl.dtsi b/boards/renesas/ek_ra2a1/ek_ra2a1-pinctrl.dtsi index 554b44803d6a58c..26835a70ea5cc71 100644 --- a/boards/renesas/ek_ra2a1/ek_ra2a1-pinctrl.dtsi +++ b/boards/renesas/ek_ra2a1/ek_ra2a1-pinctrl.dtsi @@ -26,4 +26,21 @@ ; }; }; + + pwm0_default: pwm0_default { + group1 { + /* GTIOC0A GTIOC0B */ + psels = , + ; + }; + }; + + iic0_default: iic0_default { + group1 { + /* SCL0 SDA0 */ + psels = , + ; + drive-strength = "medium"; + }; + }; }; diff --git a/boards/renesas/ek_ra2a1/ek_ra2a1.dts b/boards/renesas/ek_ra2a1/ek_ra2a1.dts index 1bb06419ca957ca..f0040a3fd6dae1d 100644 --- a/boards/renesas/ek_ra2a1/ek_ra2a1.dts +++ b/boards/renesas/ek_ra2a1/ek_ra2a1.dts @@ -7,6 +7,7 @@ #include #include +#include #include "ek_ra2a1-pinctrl.dtsi" @@ -19,6 +20,7 @@ zephyr,flash = &flash0; zephyr,console = &uart0; zephyr,shell-uart = &uart0; + zephyr,entropy = &trng; }; leds { @@ -29,8 +31,18 @@ }; }; + buttons { + compatible = "gpio-keys"; + button0: s1 { + gpios = <&ioport2 6 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 1"; + zephyr,code = ; + }; + }; + aliases { led0 = &led1; + sw0 = &button0; }; }; @@ -69,3 +81,31 @@ &ioport1 { status = "okay"; }; + +&port_irq6 { + interrupts = <29 3>; + status = "okay"; +}; + +&pwm0 { + pinctrl-0 = <&pwm0_default>; + pinctrl-names = "default"; + interrupts = <28 1>, <31 1>; + interrupt-names = "gtioca", "overflow"; + status = "okay"; +}; + +&trng { + status = "okay"; +}; + +&iic0 { + pinctrl-0 = <&iic0_default>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = ; + interrupts = <0 1>, <1 1>, <2 1>, <3 1>; + interrupt-names = "rxi", "txi", "tei", "eri"; + status = "okay"; +}; diff --git a/boards/renesas/ek_ra2a1/ek_ra2a1_defconfig b/boards/renesas/ek_ra2a1/ek_ra2a1_defconfig index 325e7c85ca21a5b..85bd6dcd4553d60 100644 --- a/boards/renesas/ek_ra2a1/ek_ra2a1_defconfig +++ b/boards/renesas/ek_ra2a1/ek_ra2a1_defconfig @@ -13,5 +13,4 @@ CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_CONSOLE=y CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/ek_ra4e2/doc/index.rst b/boards/renesas/ek_ra4e2/doc/index.rst index cc2eb04af0d96e9..27534c4242289e0 100644 --- a/boards/renesas/ek_ra4e2/doc/index.rst +++ b/boards/renesas/ek_ra4e2/doc/index.rst @@ -100,6 +100,12 @@ The below features are currently supported on Zephyr OS for EK-RA4E2 board: +-----------+------------+----------------------+ | SPI | on-chip | spi | +-----------+------------+----------------------+ +| ADC | on-chip | adc | ++-----------+------------+----------------------+ +| PWM | on-chip | pwm | ++-----------+------------+----------------------+ +| ENTROPY | on-chip | entropy | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra4e2/ek_ra4e2-pinctrl.dtsi b/boards/renesas/ek_ra4e2/ek_ra4e2-pinctrl.dtsi index 9c808d53a5285c2..4fa94b5c08d0c7a 100644 --- a/boards/renesas/ek_ra4e2/ek_ra4e2-pinctrl.dtsi +++ b/boards/renesas/ek_ra4e2/ek_ra4e2-pinctrl.dtsi @@ -21,4 +21,29 @@ ; }; }; + + canfd0_default: canfd0_default { + group1 { + /* CRX0 CTX0 */ + psels = , + ; + drive-strength = "high"; + }; + }; + + adc0_default: adc0_default { + group1 { + /* input */ + psels = ; + renesas,analog-enable; + }; + }; + + pwm1_default: pwm1_default { + group1 { + /* GTIOC1A GTIOC1B */ + psels = , + ; + }; + }; }; diff --git a/boards/renesas/ek_ra4e2/ek_ra4e2.dts b/boards/renesas/ek_ra4e2/ek_ra4e2.dts index b99fafa457c7690..89bef3630d75179 100644 --- a/boards/renesas/ek_ra4e2/ek_ra4e2.dts +++ b/boards/renesas/ek_ra4e2/ek_ra4e2.dts @@ -7,6 +7,8 @@ #include #include +#include +#include #include "ek_ra4e2-pinctrl.dtsi" / { @@ -18,6 +20,8 @@ zephyr,flash = &flash0; zephyr,console = &uart0; zephyr,shell-uart = &uart0; + zephyr,canbus = &canfd0; + zephyr,entropy = &trng; }; leds { @@ -36,8 +40,31 @@ }; }; + buttons { + compatible = "gpio-keys"; + button0: s1 { + gpios = <&ioport0 5 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 1"; + zephyr,code = ; + }; + button1: s2 { + gpios = <&ioport3 4 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 2"; + zephyr,code = ; + }; + }; + aliases { led0 = &led1; + sw0 = &button0; + sw1 = &button1; + }; + + transceiver0: can-phy0 { + compatible = "nxp,tja1043t", "can-transceiver-gpio"; + standby-gpios = <&ioport4 0 GPIO_ACTIVE_LOW>; + max-bitrate = <5000000>; + #phy-cells = <0>; }; }; @@ -69,6 +96,10 @@ }; }; +&ioport0 { + status = "okay"; +}; + &ioport1 { status = "okay"; }; @@ -82,3 +113,57 @@ pinctrl-names = "default"; status = "okay"; }; + +&ioport4 { + status = "okay"; +}; + +&canfdclk { + clocks = <&pll>; + div = <8>; + status = "okay"; +}; + +&canfd_global { + status = "okay"; + canfd0 { + pinctrl-0 = <&canfd0_default>; + pinctrl-names = "default"; + phys = <&transceiver0>; + rx-max-filters = <16>; + status = "okay"; + }; +}; + +&adc0 { + status = "okay"; + pinctrl-0 = <&adc0_default>; + pinctrl-names = "default"; +}; + +&ioport3 { + status = "okay"; +}; + +&port_irq9 { + interrupts = <4 12>; + status = "okay"; +}; + +&port_irq10 { + interrupts = <5 12>; + status = "okay"; +}; + +&pwm1 { + pinctrl-0 = <&pwm1_default>; + pinctrl-names = "default"; + interrupts = <63 1>, <64 1>; + interrupt-names = "gtioca", "overflow"; + divider = ; + status = "okay"; +}; + +&trng { + status = "okay"; +}; diff --git a/boards/renesas/ek_ra4e2/ek_ra4e2_defconfig b/boards/renesas/ek_ra4e2/ek_ra4e2_defconfig index 091058ed2aca251..93569c968fce167 100644 --- a/boards/renesas/ek_ra4e2/ek_ra4e2_defconfig +++ b/boards/renesas/ek_ra4e2/ek_ra4e2_defconfig @@ -13,5 +13,4 @@ CONFIG_UART_CONSOLE=y CONFIG_CONSOLE=y CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/ek_ra4m2/doc/index.rst b/boards/renesas/ek_ra4m2/doc/index.rst index c3c5583bf3682fc..380f19da89b4b44 100644 --- a/boards/renesas/ek_ra4m2/doc/index.rst +++ b/boards/renesas/ek_ra4m2/doc/index.rst @@ -102,6 +102,12 @@ The below features are currently supported on Zephyr OS for EK-RA4M2 board: +-----------+------------+----------------------+ | COUNTER | on-chip | counter | +-----------+------------+----------------------+ +| ADC | on-chip | adc | ++-----------+------------+----------------------+ +| PWM | on-chip | pwm | ++-----------+------------+----------------------+ +| I2C | on-chip | i2c | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra4m2/ek_ra4m2-pinctrl.dtsi b/boards/renesas/ek_ra4m2/ek_ra4m2-pinctrl.dtsi index a4c832c6e9e4b0d..cd65bed269b7e30 100644 --- a/boards/renesas/ek_ra4m2/ek_ra4m2-pinctrl.dtsi +++ b/boards/renesas/ek_ra4m2/ek_ra4m2-pinctrl.dtsi @@ -21,4 +21,29 @@ ; }; }; + + adc0_default: adc0_default { + group1 { + /* input */ + psels = ; + renesas,analog-enable; + }; + }; + + pwm1_default: pwm1_default { + group1 { + /* GTIOC1A GTIOC1B */ + psels = , + ; + }; + }; + + iic0_default: iic0_default { + group1 { + /* SCL0 SDA0 */ + psels = , + ; + drive-strength = "medium"; + }; + }; }; diff --git a/boards/renesas/ek_ra4m2/ek_ra4m2.dts b/boards/renesas/ek_ra4m2/ek_ra4m2.dts index aa75e8a795cad9f..810d218174edceb 100644 --- a/boards/renesas/ek_ra4m2/ek_ra4m2.dts +++ b/boards/renesas/ek_ra4m2/ek_ra4m2.dts @@ -7,6 +7,8 @@ #include #include +#include +#include #include "ek_ra4m2-pinctrl.dtsi" / { @@ -36,8 +38,24 @@ }; }; + buttons { + compatible = "gpio-keys"; + button0: s1 { + gpios = <&ioport0 5 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 1"; + zephyr,code = ; + }; + button1: s2 { + gpios = <&ioport0 6 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 2"; + zephyr,code = ; + }; + }; + aliases { led0 = &led1; + sw0 = &button0; + sw1 = &button1; }; }; @@ -69,6 +87,10 @@ }; }; +&ioport0 { + status = "okay"; +}; + &ioport4 { status = "okay"; }; @@ -78,3 +100,38 @@ pinctrl-names = "default"; status = "okay"; }; + +&adc0 { + status = "okay"; + pinctrl-0 = <&adc0_default>; + pinctrl-names = "default"; +}; + +&port_irq10 { + interrupts = <41 12>; + status = "okay"; +}; + +&port_irq11 { + interrupts = <42 12>; + status = "okay"; +}; + +&pwm1 { + pinctrl-0 = <&pwm1_default>; + pinctrl-names = "default"; + interrupts = <63 1>, <64 1>; + interrupt-names = "gtioca", "overflow"; + status = "okay"; +}; + +&iic0 { + pinctrl-0 = <&iic0_default>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = ; + interrupts = <87 1>, <88 1>, <89 1>, <90 1>; + interrupt-names = "rxi", "txi", "tei", "eri"; + status = "okay"; +}; diff --git a/boards/renesas/ek_ra4m2/ek_ra4m2_defconfig b/boards/renesas/ek_ra4m2/ek_ra4m2_defconfig index 091058ed2aca251..93569c968fce167 100644 --- a/boards/renesas/ek_ra4m2/ek_ra4m2_defconfig +++ b/boards/renesas/ek_ra4m2/ek_ra4m2_defconfig @@ -13,5 +13,4 @@ CONFIG_UART_CONSOLE=y CONFIG_CONSOLE=y CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/ek_ra4m3/doc/index.rst b/boards/renesas/ek_ra4m3/doc/index.rst index 5ff3b755654d9f9..1d83845583e5216 100644 --- a/boards/renesas/ek_ra4m3/doc/index.rst +++ b/boards/renesas/ek_ra4m3/doc/index.rst @@ -104,6 +104,12 @@ The below features are currently supported on Zephyr OS for EK-RA4M3 board: +-----------+------------+----------------------+ | COUNTER | on-chip | counter | +-----------+------------+----------------------+ +| ADC | on-chip | adc | ++-----------+------------+----------------------+ +| PWM | on-chip | pwm | ++-----------+------------+----------------------+ +| I2C | on-chip | i2c | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra4m3/ek_ra4m3-pinctrl.dtsi b/boards/renesas/ek_ra4m3/ek_ra4m3-pinctrl.dtsi index 408f6e610b5a5ee..93f63b5a56a9ee0 100644 --- a/boards/renesas/ek_ra4m3/ek_ra4m3-pinctrl.dtsi +++ b/boards/renesas/ek_ra4m3/ek_ra4m3-pinctrl.dtsi @@ -21,4 +21,29 @@ ; }; }; + + adc0_default: adc0_default { + group1 { + /* input */ + psels = ; + renesas,analog-enable; + }; + }; + + pwm1_default: pwm1_default { + group1 { + /* GTIOC1A GTIOC1B */ + psels = , + ; + }; + }; + + iic0_default: iic0_default { + group1 { + /* SCL0 SDA0 */ + psels = , + ; + drive-strength = "medium"; + }; + }; }; diff --git a/boards/renesas/ek_ra4m3/ek_ra4m3.dts b/boards/renesas/ek_ra4m3/ek_ra4m3.dts index cdcb10ca08db457..d85ea607af17784 100644 --- a/boards/renesas/ek_ra4m3/ek_ra4m3.dts +++ b/boards/renesas/ek_ra4m3/ek_ra4m3.dts @@ -7,6 +7,8 @@ #include #include +#include +#include #include "ek_ra4m3-pinctrl.dtsi" / { @@ -36,8 +38,24 @@ }; }; + buttons { + compatible = "gpio-keys"; + button0: s1 { + gpios = <&ioport0 5 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 1"; + zephyr,code = ; + }; + button1: s2 { + gpios = <&ioport0 6 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 2"; + zephyr,code = ; + }; + }; + aliases { led0 = &led1; + sw0 = &button0; + sw1 = &button1; }; }; @@ -69,6 +87,10 @@ }; }; +&ioport0 { + status = "okay"; +}; + &ioport4 { status = "okay"; }; @@ -78,3 +100,38 @@ pinctrl-names = "default"; status = "okay"; }; + +&adc0 { + status = "okay"; + pinctrl-0 = <&adc0_default>; + pinctrl-names = "default"; +}; + +&port_irq10 { + interrupts = <41 12>; + status = "okay"; +}; + +&port_irq11 { + interrupts = <42 12>; + status = "okay"; +}; + +&pwm1 { + pinctrl-0 = <&pwm1_default>; + pinctrl-names = "default"; + interrupts = <63 1>, <64 1>; + interrupt-names = "gtioca", "overflow"; + status = "okay"; +}; + +&iic0 { + pinctrl-0 = <&iic0_default>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = ; + interrupts = <87 1>, <88 1>, <89 1>, <90 1>; + interrupt-names = "rxi", "txi", "tei", "eri"; + status = "okay"; +}; diff --git a/boards/renesas/ek_ra4m3/ek_ra4m3_defconfig b/boards/renesas/ek_ra4m3/ek_ra4m3_defconfig index 091058ed2aca251..93569c968fce167 100644 --- a/boards/renesas/ek_ra4m3/ek_ra4m3_defconfig +++ b/boards/renesas/ek_ra4m3/ek_ra4m3_defconfig @@ -13,5 +13,4 @@ CONFIG_UART_CONSOLE=y CONFIG_CONSOLE=y CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/ek_ra4w1/doc/index.rst b/boards/renesas/ek_ra4w1/doc/index.rst index 097b1b4448a3c20..c9501e3dc1d6e2e 100644 --- a/boards/renesas/ek_ra4w1/doc/index.rst +++ b/boards/renesas/ek_ra4w1/doc/index.rst @@ -94,6 +94,14 @@ The below features are currently supported on Zephyr OS for EK-RA4W1 board: +-----------+------------+----------------------+ | COUNTER | on-chip | counter | +-----------+------------+----------------------+ +| ENTROPY | on-chip | entropy | ++-----------+------------+----------------------+ +| ADC | on-chip | adc | ++-----------+------------+----------------------+ +| PWM | on-chip | pwm | ++-----------+------------+----------------------+ +| I2C | on-chip | i2c | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra4w1/ek_ra4w1-pinctrl.dtsi b/boards/renesas/ek_ra4w1/ek_ra4w1-pinctrl.dtsi index cfcc3fc54104856..f0b48f12f95bab3 100644 --- a/boards/renesas/ek_ra4w1/ek_ra4w1-pinctrl.dtsi +++ b/boards/renesas/ek_ra4w1/ek_ra4w1-pinctrl.dtsi @@ -21,4 +21,29 @@ ; }; }; + + adc0_default: adc0_default { + group1 { + /* input */ + psels = ; + renesas,analog-enable; + }; + }; + + pwm1_default: pwm1_default { + group1 { + /* GTIOC1A GTIOC1B */ + psels = , + ; + }; + }; + + iic0_default: iic0_default { + group1 { + /* SCL0 SDA0 */ + psels = , + ; + drive-strength = "medium"; + }; + }; }; diff --git a/boards/renesas/ek_ra4w1/ek_ra4w1.dts b/boards/renesas/ek_ra4w1/ek_ra4w1.dts index 2ba85852e9b3085..a8adbfd99a1a49a 100644 --- a/boards/renesas/ek_ra4w1/ek_ra4w1.dts +++ b/boards/renesas/ek_ra4w1/ek_ra4w1.dts @@ -7,6 +7,8 @@ #include #include +#include +#include #include "ek_ra4w1-pinctrl.dtsi" / { @@ -18,6 +20,7 @@ zephyr,flash = &flash0; zephyr,console = &uart0; zephyr,shell-uart = &uart0; + zephyr,entropy = &trng; }; leds { @@ -33,8 +36,18 @@ }; }; + buttons { + compatible = "gpio-keys"; + button0: s1 { + gpios = <&ioport4 2 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 1"; + zephyr,code = ; + }; + }; + aliases { led0 = &led1; + sw0 = &button0; }; }; @@ -65,3 +78,37 @@ pinctrl-names = "default"; status = "okay"; }; + +&trng { + status = "okay"; +}; + +&adc0 { + status = "okay"; + pinctrl-0 = <&adc0_default>; + pinctrl-names = "default"; +}; + +&port_irq4 { + interrupts = <31 12>; + status = "okay"; +}; + +&pwm1 { + pinctrl-0 = <&pwm1_default>; + pinctrl-names = "default"; + interrupts = <8 1>, <9 1>; + interrupt-names = "gtioca", "overflow"; + status = "okay"; +}; + +&iic0 { + pinctrl-0 = <&iic0_default>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = ; + interrupts = <10 1>, <11 1>, <12 1>, <13 1>; + interrupt-names = "rxi", "txi", "tei", "eri"; + status = "okay"; +}; diff --git a/boards/renesas/ek_ra4w1/ek_ra4w1_defconfig b/boards/renesas/ek_ra4w1/ek_ra4w1_defconfig index 3b4854b85b7c213..631c90786a6b0db 100644 --- a/boards/renesas/ek_ra4w1/ek_ra4w1_defconfig +++ b/boards/renesas/ek_ra4w1/ek_ra4w1_defconfig @@ -13,5 +13,4 @@ CONFIG_UART_CONSOLE=y CONFIG_CONSOLE=y CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/ek_ra6e2/doc/index.rst b/boards/renesas/ek_ra6e2/doc/index.rst index 4dce24edaf05b24..0ed53f9a4c087fd 100644 --- a/boards/renesas/ek_ra6e2/doc/index.rst +++ b/boards/renesas/ek_ra6e2/doc/index.rst @@ -100,6 +100,12 @@ The below features are currently supported on Zephyr OS for EK-RA6E2 board: +-----------+------------+----------------------+ | SPI | on-chip | spi | +-----------+------------+----------------------+ +| ADC | on-chip | adc | ++-----------+------------+----------------------+ +| PWM | on-chip | pwm | ++-----------+------------+----------------------+ +| ENTROPY | on-chip | entropy | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra6e2/ek_ra6e2-pinctrl.dtsi b/boards/renesas/ek_ra6e2/ek_ra6e2-pinctrl.dtsi index 5c47dd207044d14..f947ec6eba7fb91 100644 --- a/boards/renesas/ek_ra6e2/ek_ra6e2-pinctrl.dtsi +++ b/boards/renesas/ek_ra6e2/ek_ra6e2-pinctrl.dtsi @@ -21,4 +21,29 @@ ; }; }; + + canfd0_default: canfd0_default { + group1 { + /* CRX0 CTX0 */ + psels = , + ; + drive-strength = "high"; + }; + }; + + adc0_default: adc0_default { + group1 { + /* input */ + psels = ; + renesas,analog-enable; + }; + }; + + pwm1_default: pwm1_default { + group1 { + /* GTIOC1A GTIOC1B */ + psels = , + ; + }; + }; }; diff --git a/boards/renesas/ek_ra6e2/ek_ra6e2.dts b/boards/renesas/ek_ra6e2/ek_ra6e2.dts index a19f1ab5ff8e4c6..741f9ff0c06104e 100644 --- a/boards/renesas/ek_ra6e2/ek_ra6e2.dts +++ b/boards/renesas/ek_ra6e2/ek_ra6e2.dts @@ -7,6 +7,8 @@ #include #include +#include +#include #include "ek_ra6e2-pinctrl.dtsi" @@ -19,6 +21,8 @@ zephyr,flash = &flash0; zephyr,console = &uart0; zephyr,shell-uart = &uart0; + zephyr,canbus = &canfd0; + zephyr,entropy = &trng; }; leds { @@ -37,8 +41,24 @@ }; }; + buttons { + compatible = "gpio-keys"; + button0: s1 { + gpios = <&ioport0 5 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 1"; + zephyr,code = ; + }; + button1: s2 { + gpios = <&ioport3 4 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 2"; + zephyr,code = ; + }; + }; + aliases { led0 = &led1; + sw0 = &button0; + sw1 = &button1; }; }; @@ -52,6 +72,10 @@ }; }; +&ioport0 { + status = "okay"; +}; + &ioport1 { status = "okay"; }; @@ -66,6 +90,10 @@ status = "okay"; }; +&ioport3 { + status = "okay"; +}; + &ioport4 { status = "okay"; }; @@ -105,3 +133,52 @@ mul = <10 0>; status = "okay"; }; + +&canfdclk { + clocks = <&pll>; + div = <8>; + status = "okay"; +}; + +&canfd_global { + status = "okay"; + canfd0 { + pinctrl-0 = <&canfd0_default>; + pinctrl-names = "default"; + rx-max-filters = <16>; + status = "okay"; + + can-transceiver { + max-bitrate = <5000000>; + }; + }; +}; + +&adc0 { + status = "okay"; + pinctrl-0 = <&adc0_default>; + pinctrl-names = "default"; +}; + +&port_irq9 { + interrupts = <4 12>; + status = "okay"; +}; + +&port_irq10 { + interrupts = <5 12>; + status = "okay"; +}; + +&pwm1 { + pinctrl-0 = <&pwm1_default>; + pinctrl-names = "default"; + interrupts = <63 1>, <64 1>; + interrupt-names = "gtioca", "overflow"; + divider = ; + status = "okay"; +}; + +&trng { + status ="okay"; +}; diff --git a/boards/renesas/ek_ra6e2/ek_ra6e2_defconfig b/boards/renesas/ek_ra6e2/ek_ra6e2_defconfig index 956d3f6d6505ce7..882cf699d986f38 100644 --- a/boards/renesas/ek_ra6e2/ek_ra6e2_defconfig +++ b/boards/renesas/ek_ra6e2/ek_ra6e2_defconfig @@ -13,5 +13,4 @@ CONFIG_UART_CONSOLE=y CONFIG_CONSOLE=y CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/ek_ra6m1/doc/index.rst b/boards/renesas/ek_ra6m1/doc/index.rst index 9436486539dad8e..225d85b57d5e973 100644 --- a/boards/renesas/ek_ra6m1/doc/index.rst +++ b/boards/renesas/ek_ra6m1/doc/index.rst @@ -100,6 +100,10 @@ The below features are currently supported on Zephyr OS for EK-RA6M1 board: +-----------+------------+----------------------+ | COUNTER | on-chip | counter | +-----------+------------+----------------------+ +| ADC | on-chip | adc | ++-----------+------------+----------------------+ +| PWM | on-chip | pwm | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra6m1/ek_ra6m1-pinctrl.dtsi b/boards/renesas/ek_ra6m1/ek_ra6m1-pinctrl.dtsi index cb5eb69d6b484bc..667e6dcd5c82e40 100644 --- a/boards/renesas/ek_ra6m1/ek_ra6m1-pinctrl.dtsi +++ b/boards/renesas/ek_ra6m1/ek_ra6m1-pinctrl.dtsi @@ -30,4 +30,20 @@ ; }; }; + + adc0_default: adc0_default { + group1 { + /* input */ + psels = ; + renesas,analog-enable; + }; + }; + + pwm1_default: pwm1_default { + group1 { + /* GTIOC1A GTIOC1B */ + psels = , + ; + }; + }; }; diff --git a/boards/renesas/ek_ra6m1/ek_ra6m1.dts b/boards/renesas/ek_ra6m1/ek_ra6m1.dts index e21d57280f74865..85d39baec8edf16 100644 --- a/boards/renesas/ek_ra6m1/ek_ra6m1.dts +++ b/boards/renesas/ek_ra6m1/ek_ra6m1.dts @@ -7,6 +7,8 @@ #include #include +#include +#include #include "ek_ra6m1-pinctrl.dtsi" @@ -19,6 +21,7 @@ zephyr,flash = &flash0; zephyr,console = &uart8; zephyr,shell-uart = &uart8; + zephyr,entropy = &trng; }; leds { @@ -29,8 +32,18 @@ }; }; + buttons { + compatible = "gpio-keys"; + button0: s1 { + gpios = <&ioport4 15 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 1"; + zephyr,code = ; + }; + }; + aliases { led0 = &led1; + sw0 = &button0; }; }; @@ -65,6 +78,10 @@ status = "okay"; }; +&ioport4 { + status = "okay"; +}; + &xtal { clock-frequency = ; mosel = <0>; @@ -82,3 +99,26 @@ mul = <20 0>; status = "okay"; }; + +&trng { + status ="okay"; +}; + +&adc0 { + status = "okay"; + pinctrl-0 = <&adc0_default>; + pinctrl-names = "default"; +}; + +&port_irq8 { + interrupts = <41 12>; + status = "okay"; +}; + +&pwm1 { + pinctrl-0 = <&pwm1_default>; + pinctrl-names = "default"; + interrupts = <63 1>, <64 1>; + interrupt-names = "gtioca", "overflow"; + status = "okay"; +}; diff --git a/boards/renesas/ek_ra6m1/ek_ra6m1_defconfig b/boards/renesas/ek_ra6m1/ek_ra6m1_defconfig index f252ad1bf25e5e0..fb0bf97d8885b27 100644 --- a/boards/renesas/ek_ra6m1/ek_ra6m1_defconfig +++ b/boards/renesas/ek_ra6m1/ek_ra6m1_defconfig @@ -7,7 +7,6 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=120000000 CONFIG_GPIO=y CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_CLOCK_CONTROL=y # Enable Console diff --git a/boards/renesas/ek_ra6m2/doc/index.rst b/boards/renesas/ek_ra6m2/doc/index.rst index 59fb6c4d356a036..6ed91eff582d9ea 100644 --- a/boards/renesas/ek_ra6m2/doc/index.rst +++ b/boards/renesas/ek_ra6m2/doc/index.rst @@ -94,6 +94,10 @@ The below features are currently supported on Zephyr OS for EK-RA6M2 board: +-----------+------------+----------------------+ | COUNTER | on-chip | counter | +-----------+------------+----------------------+ +| ADC | on-chip | adc | ++-----------+------------+----------------------+ +| PWM | on-chip | pwm | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra6m2/ek_ra6m2-pinctrl.dtsi b/boards/renesas/ek_ra6m2/ek_ra6m2-pinctrl.dtsi index 45dd5625022e991..bfccf28bc96a55c 100644 --- a/boards/renesas/ek_ra6m2/ek_ra6m2-pinctrl.dtsi +++ b/boards/renesas/ek_ra6m2/ek_ra6m2-pinctrl.dtsi @@ -30,4 +30,20 @@ ; }; }; + + adc0_default: adc0_default { + group1 { + /* input */ + psels = ; + renesas,analog-enable; + }; + }; + + pwm1_default: pwm1_default { + group1 { + /* GTIOC1A GTIOC1B */ + psels = , + ; + }; + }; }; diff --git a/boards/renesas/ek_ra6m2/ek_ra6m2.dts b/boards/renesas/ek_ra6m2/ek_ra6m2.dts index d1fca9242e47374..17d3179d2a4e661 100644 --- a/boards/renesas/ek_ra6m2/ek_ra6m2.dts +++ b/boards/renesas/ek_ra6m2/ek_ra6m2.dts @@ -7,6 +7,8 @@ #include #include +#include +#include #include "ek_ra6m2-pinctrl.dtsi" @@ -19,6 +21,7 @@ zephyr,flash = &flash0; zephyr,console = &uart7; zephyr,shell-uart = &uart7; + zephyr,entropy = &trng; }; leds { @@ -29,8 +32,18 @@ }; }; + buttons { + compatible = "gpio-keys"; + button0: s1 { + gpios = <&ioport1 5 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 1"; + zephyr,code = ; + }; + }; + aliases { led0 = &led1; + sw0 = &button0; }; }; @@ -82,3 +95,26 @@ mul = <20 0>; status = "okay"; }; + +&trng { + status ="okay"; +}; + +&adc0 { + status = "okay"; + pinctrl-0 = <&adc0_default>; + pinctrl-names = "default"; +}; + +&port_irq0 { + interrupts = <41 12>; + status = "okay"; +}; + +&pwm1 { + pinctrl-0 = <&pwm1_default>; + pinctrl-names = "default"; + interrupts = <63 1>, <64 1>; + interrupt-names = "gtioca", "overflow"; + status = "okay"; +}; diff --git a/boards/renesas/ek_ra6m2/ek_ra6m2_defconfig b/boards/renesas/ek_ra6m2/ek_ra6m2_defconfig index f252ad1bf25e5e0..fb0bf97d8885b27 100644 --- a/boards/renesas/ek_ra6m2/ek_ra6m2_defconfig +++ b/boards/renesas/ek_ra6m2/ek_ra6m2_defconfig @@ -7,7 +7,6 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=120000000 CONFIG_GPIO=y CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_CLOCK_CONTROL=y # Enable Console diff --git a/boards/renesas/ek_ra6m3/doc/index.rst b/boards/renesas/ek_ra6m3/doc/index.rst index fed1a53207dad7a..4fae013ef1a89e4 100644 --- a/boards/renesas/ek_ra6m3/doc/index.rst +++ b/boards/renesas/ek_ra6m3/doc/index.rst @@ -102,6 +102,12 @@ The below features are currently supported on Zephyr OS for EK-RA6M3 board: +-----------+------------+----------------------+ | COUNTER | on-chip | counter | +-----------+------------+----------------------+ +| USBHS | on-chip | udc | ++-----------+------------+----------------------+ +| ADC | on-chip | adc | ++-----------+------------+----------------------+ +| PWM | on-chip | pwm | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra6m3/ek_ra6m3-pinctrl.dtsi b/boards/renesas/ek_ra6m3/ek_ra6m3-pinctrl.dtsi index d1efcc91ba42735..6c3d7f285fdc34a 100644 --- a/boards/renesas/ek_ra6m3/ek_ra6m3-pinctrl.dtsi +++ b/boards/renesas/ek_ra6m3/ek_ra6m3-pinctrl.dtsi @@ -30,4 +30,27 @@ ; }; }; + + usbhs_default: usbhs_default { + group1 { + psels = ; /* VBUS */ + drive-strength = "high"; + }; + }; + + adc0_default: adc0_default { + group1 { + /* input */ + psels = ; + renesas,analog-enable; + }; + }; + + pwm1_default: pwm1_default { + group1 { + /* GTIOC1A GTIOC1B */ + psels = , + ; + }; + }; }; diff --git a/boards/renesas/ek_ra6m3/ek_ra6m3.dts b/boards/renesas/ek_ra6m3/ek_ra6m3.dts index 96b9bac56305edf..9eea2ac51d83042 100644 --- a/boards/renesas/ek_ra6m3/ek_ra6m3.dts +++ b/boards/renesas/ek_ra6m3/ek_ra6m3.dts @@ -7,6 +7,8 @@ #include #include +#include +#include #include "ek_ra6m3-pinctrl.dtsi" @@ -19,6 +21,7 @@ zephyr,console = &uart8; zephyr,shell-uart = &uart8; zephyr,flash = &flash0; + zephyr,entropy = &trng; }; leds { @@ -37,8 +40,24 @@ }; }; + buttons { + compatible = "gpio-keys"; + button0: s1 { + gpios = <&ioport0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 1"; + zephyr,code = ; + }; + button1: s2 { + gpios = <&ioport0 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 2"; + zephyr,code = ; + }; + }; + aliases { led0 = &led1; + sw0 = &button0; + sw1 = &button1; }; }; @@ -48,6 +67,10 @@ status = "okay"; }; +&ioport0 { + status = "okay"; +}; + &ioport1 { status = "okay"; }; @@ -94,3 +117,45 @@ mul = <20 0>; status = "okay"; }; + +&trng { + status ="okay"; +}; + +&usbhs { + pinctrl-0 = <&usbhs_default>; + pinctrl-names = "default"; + maximum-speed = "high-speed"; + status = "okay"; + zephyr_udc0: udc { + status = "okay"; + }; +}; + +&usbhs_phy { + phys-clock-src = "xtal"; +}; + +&adc0 { + status = "okay"; + pinctrl-0 = <&adc0_default>; + pinctrl-names = "default"; +}; + +&port_irq12 { + interrupts = <41 12>; + status = "okay"; +}; + +&port_irq13 { + interrupts = <42 12>; + status = "okay"; +}; + +&pwm1 { + pinctrl-0 = <&pwm1_default>; + pinctrl-names = "default"; + interrupts = <63 1>, <64 1>; + interrupt-names = "gtioca", "overflow"; + status = "okay"; +}; diff --git a/boards/renesas/ek_ra6m3/ek_ra6m3_defconfig b/boards/renesas/ek_ra6m3/ek_ra6m3_defconfig index 82698fecf6237ba..914980bc08c8ce2 100644 --- a/boards/renesas/ek_ra6m3/ek_ra6m3_defconfig +++ b/boards/renesas/ek_ra6m3/ek_ra6m3_defconfig @@ -13,5 +13,4 @@ CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/ek_ra6m4/doc/index.rst b/boards/renesas/ek_ra6m4/doc/index.rst index 1232b815e8709af..d1b765ee5afc49f 100644 --- a/boards/renesas/ek_ra6m4/doc/index.rst +++ b/boards/renesas/ek_ra6m4/doc/index.rst @@ -107,6 +107,10 @@ The below features are currently supported on Zephyr OS for EK-RA6M4 board: +-----------+------------+----------------------+ | COUNTER | on-chip | counter | +-----------+------------+----------------------+ +| ADC | on-chip | adc | ++-----------+------------+----------------------+ +| PWM | on-chip | pwm | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra6m4/ek_ra6m4-pinctrl.dtsi b/boards/renesas/ek_ra6m4/ek_ra6m4-pinctrl.dtsi index 5519f92f74f9db3..29ef6ff2382fc14 100644 --- a/boards/renesas/ek_ra6m4/ek_ra6m4-pinctrl.dtsi +++ b/boards/renesas/ek_ra6m4/ek_ra6m4-pinctrl.dtsi @@ -30,4 +30,20 @@ ; }; }; + + adc0_default: adc0_default { + group1 { + /* input */ + psels = ; + renesas,analog-enable; + }; + }; + + pwm1_default: pwm1_default { + group1 { + /* GTIOC1A GTIOC1B */ + psels = , + ; + }; + }; }; diff --git a/boards/renesas/ek_ra6m4/ek_ra6m4.dts b/boards/renesas/ek_ra6m4/ek_ra6m4.dts index 2f3b9eb3acd2241..f5316dab7c53181 100644 --- a/boards/renesas/ek_ra6m4/ek_ra6m4.dts +++ b/boards/renesas/ek_ra6m4/ek_ra6m4.dts @@ -7,6 +7,8 @@ #include #include +#include +#include #include "ek_ra6m4-pinctrl.dtsi" @@ -37,8 +39,24 @@ }; }; + buttons { + compatible = "gpio-keys"; + button0: s1 { + gpios = <&ioport0 5 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 1"; + zephyr,code = ; + }; + button1: s2 { + gpios = <&ioport0 6 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 2"; + zephyr,code = ; + }; + }; + aliases { led0 = &led1; + sw0 = &button0; + sw1 = &button1; }; }; @@ -69,6 +87,10 @@ status = "okay"; }; +&ioport0 { + status = "okay"; +}; + &ioport4 { status = "okay"; }; @@ -96,3 +118,27 @@ div = <2>; status = "okay"; }; + +&adc0 { + status = "okay"; + pinctrl-0 = <&adc0_default>; + pinctrl-names = "default"; +}; + +&port_irq10 { + interrupts = <41 12>; + status = "okay"; +}; + +&port_irq11 { + interrupts = <42 12>; + status = "okay"; +}; + +&pwm1 { + pinctrl-0 = <&pwm1_default>; + pinctrl-names = "default"; + interrupts = <63 1>, <64 1>; + interrupt-names = "gtioca", "overflow"; + status = "okay"; +}; diff --git a/boards/renesas/ek_ra6m4/ek_ra6m4_defconfig b/boards/renesas/ek_ra6m4/ek_ra6m4_defconfig index 7cdc7f0680aecca..7d9405d620489bb 100644 --- a/boards/renesas/ek_ra6m4/ek_ra6m4_defconfig +++ b/boards/renesas/ek_ra6m4/ek_ra6m4_defconfig @@ -13,5 +13,4 @@ CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/ek_ra6m5/doc/index.rst b/boards/renesas/ek_ra6m5/doc/index.rst index 6c8a708dc09d41f..3d9815e63d286a8 100644 --- a/boards/renesas/ek_ra6m5/doc/index.rst +++ b/boards/renesas/ek_ra6m5/doc/index.rst @@ -105,6 +105,12 @@ The below features are currently supported on Zephyr OS for EK-RA6M5 board: +-----------+------------+----------------------+ | COUNTER | on-chip | counter | +-----------+------------+----------------------+ +| USBHS | on-chip | udc | ++-----------+------------+----------------------+ +| ADC | on-chip | adc | ++-----------+------------+----------------------+ +| PWM | on-chip | pwm | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra6m5/ek_ra6m5-pinctrl.dtsi b/boards/renesas/ek_ra6m5/ek_ra6m5-pinctrl.dtsi index 5519f92f74f9db3..709f61688983dbf 100644 --- a/boards/renesas/ek_ra6m5/ek_ra6m5-pinctrl.dtsi +++ b/boards/renesas/ek_ra6m5/ek_ra6m5-pinctrl.dtsi @@ -30,4 +30,27 @@ ; }; }; + + usbhs_default: usbhs_default { + group1 { + psels = ; /* USBHS-VBUS */ + drive-strength = "high"; + }; + }; + + adc0_default: adc0_default { + group1 { + /* input */ + psels = ; + renesas,analog-enable; + }; + }; + + pwm1_default: pwm1_default { + group1 { + /* GTIOC1A GTIOC1B */ + psels = , + ; + }; + }; }; diff --git a/boards/renesas/ek_ra6m5/ek_ra6m5.dts b/boards/renesas/ek_ra6m5/ek_ra6m5.dts index 7abc7292c0c6e65..5259783a0c46fd9 100644 --- a/boards/renesas/ek_ra6m5/ek_ra6m5.dts +++ b/boards/renesas/ek_ra6m5/ek_ra6m5.dts @@ -7,6 +7,8 @@ #include #include +#include +#include #include "ek_ra6m5-pinctrl.dtsi" @@ -37,8 +39,24 @@ }; }; + buttons { + compatible = "gpio-keys"; + button0: s1 { + gpios = <&ioport0 5 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 1"; + zephyr,code = ; + }; + button1: s2 { + gpios = <&ioport0 4 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 2"; + zephyr,code = ; + }; + }; + aliases { led0 = &led1; + sw0 = &button0; + sw1 = &button1; }; }; @@ -90,3 +108,41 @@ mul = <25 0>; status = "okay"; }; + +&usbhs { + pinctrl-0 = <&usbhs_default>; + pinctrl-names = "default"; + maximum-speed = "high-speed"; + status = "okay"; + zephyr_udc0: udc { + status = "okay"; + }; +}; + +&usbhs_phy { + phys-clock-src = "xtal"; +}; + +&adc0 { + status = "okay"; + pinctrl-0 = <&adc0_default>; + pinctrl-names = "default"; +}; + +&port_irq9 { + interrupts = <41 12>; + status = "okay"; +}; + +&port_irq10 { + interrupts = <42 12>; + status = "okay"; +}; + +&pwm1 { + pinctrl-0 = <&pwm1_default>; + pinctrl-names = "default"; + interrupts = <63 1>, <64 1>; + interrupt-names = "gtioca", "overflow"; + status = "okay"; +}; diff --git a/boards/renesas/ek_ra6m5/ek_ra6m5_defconfig b/boards/renesas/ek_ra6m5/ek_ra6m5_defconfig index 80c741f62fb3ff7..6a9a032666e9adb 100644 --- a/boards/renesas/ek_ra6m5/ek_ra6m5_defconfig +++ b/boards/renesas/ek_ra6m5/ek_ra6m5_defconfig @@ -7,7 +7,6 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=200000000 CONFIG_GPIO=y CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_CLOCK_CONTROL=y # Enable Console diff --git a/boards/renesas/ek_ra8d1/CMakeLists.txt b/boards/renesas/ek_ra8d1/CMakeLists.txt new file mode 100644 index 000000000000000..86d1cedc6f4b57b --- /dev/null +++ b/boards/renesas/ek_ra8d1/CMakeLists.txt @@ -0,0 +1,7 @@ +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +zephyr_include_directories(.) + +zephyr_linker_sources_ifdef(CONFIG_MEMC + SECTIONS sdram.ld) diff --git a/boards/renesas/ek_ra8d1/Kconfig.defconfig b/boards/renesas/ek_ra8d1/Kconfig.defconfig new file mode 100644 index 000000000000000..1aa568670afd047 --- /dev/null +++ b/boards/renesas/ek_ra8d1/Kconfig.defconfig @@ -0,0 +1,27 @@ +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_EK_RA8D1 + +if NETWORKING + +config NET_L2_ETHERNET + default y + +endif # NETWORKING + +if SHIELD_RTKMIPILCDB00000BE + +config MEMC + default y + +if LVGL + +config LV_Z_VBD_CUSTOM_SECTION + default y + +endif # LVGL + +endif # SHIELD_RTKMIPILCDB00000BE + +endif # BOARD_EK_RA8D1 diff --git a/boards/renesas/ek_ra8d1/doc/index.rst b/boards/renesas/ek_ra8d1/doc/index.rst index 20c887373c8ee3b..183ed37acbdb31d 100644 --- a/boards/renesas/ek_ra8d1/doc/index.rst +++ b/boards/renesas/ek_ra8d1/doc/index.rst @@ -85,33 +85,64 @@ Supported Features The below features are currently supported on Zephyr OS for EK-RA8D1 board: -+--------------+------------+------------------+ -| Interface | Controller | Driver/Component | -+==============+============+==================+ -| GPIO | on-chip | gpio | -+--------------+------------+------------------+ -| MPU | on-chip | arch/arm | -+--------------+------------+------------------+ -| NVIC | on-chip | arch/arm | -+--------------+------------+------------------+ -| UART | on-chip | serial | -+--------------+------------+------------------+ -| CLOCK | on-chip | clock control | -+--------------+------------+------------------+ -| ENTROPY | on-chip | entropy | -+--------------+------------+------------------+ -| SPI | on-chip | spi | -+--------------+------------+------------------+ -| FLASH | on-chip | flash | -+--------------+------------+------------------+ -| PWM | on-chip | pwm | -+--------------+------------+------------------+ -| COUNTER | on-chip | counter | -+--------------+------------+------------------+ -| CAN | on-chip | canfd | -+--------------+------------+------------------+ -| I2C | on-chip | i2c | -+--------------+------------+------------------+ ++--------------+------------+-----------------------------------+ +| Interface | Controller | Driver/Component | ++==============+============+===================================+ +| GPIO | on-chip | gpio | ++--------------+------------+-----------------------------------+ +| MPU | on-chip | arch/arm | ++--------------+------------+-----------------------------------+ +| NVIC | on-chip | arch/arm | ++--------------+------------+-----------------------------------+ +| UART | on-chip | serial | ++--------------+------------+-----------------------------------+ +| CLOCK | on-chip | clock control | ++--------------+------------+-----------------------------------+ +| ENTROPY | on-chip | entropy | ++--------------+------------+-----------------------------------+ +| SPI | on-chip | spi | ++--------------+------------+-----------------------------------+ +| FLASH | on-chip | flash | ++--------------+------------+-----------------------------------+ +| PWM | on-chip | pwm | ++--------------+------------+-----------------------------------+ +| COUNTER | on-chip | counter | ++--------------+------------+-----------------------------------+ +| CAN | on-chip | canfd | ++--------------+------------+-----------------------------------+ +| I2C | on-chip | i2c | ++--------------+------------+-----------------------------------+ +| USBHS | on-chip | udc | ++--------------+------------+-----------------------------------+ +| DISPLAY | on-chip | LCDIF; MIPI-DSI. Tested with | +| | | :ref:`rtkmipilcdb00000be` shields | ++--------------+------------+-----------------------------------+ +| ETHERNET | on-chip | ethernet | ++--------------+------------+-----------------------------------+ +| ADC | on-chip | adc | ++--------------+------------+-----------------------------------+ +| SDHC | on-chip | sdhc | ++--------------+------------+-----------------------------------+ + +**Note:** + +- For using Ethernet on RA8D1 board please set switch SW1 as following configuration: + ++-------------+-------------+--------------+------------+------------+------------+-------------+-----------+ +| SW1-1 PMOD1 | SW1-2 TRACE | SW1-3 CAMERA | SW1-4 ETHA | SW1-5 ETHB | SW1-6 GLCD | SW1-7 SDRAM | SW1-8 I3C | ++-------------+-------------+--------------+------------+------------+------------+-------------+-----------+ +| OFF | OFF | OFF | OFF | ON | OFF | OFF | OFF | ++-------------+-------------+--------------+------------+------------+------------+-------------+-----------+ + +- For using SDHC channel 1 on RA8D1 board please set switch SW1 as following configuration: + ++-------------+-------------+--------------+------------+------------+------------+-------------+-----------+ +| SW1-1 PMOD1 | SW1-2 TRACE | SW1-3 CAMERA | SW1-4 ETHA | SW1-5 ETHB | SW1-6 GLCD | SW1-7 SDRAM | SW1-8 I3C | ++-------------+-------------+--------------+------------+------------+------------+-------------+-----------+ +| OFF | OFF | OFF | OFF | OFF | OFF | OFF | OFF | ++-------------+-------------+--------------+------------+------------+------------+-------------+-----------+ + +**CAUTION:** Do not enable SW1-4 and SW1-5 together Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra8d1/ek_ra8d1-pinctrl.dtsi b/boards/renesas/ek_ra8d1/ek_ra8d1-pinctrl.dtsi index b450f9c3393192d..b4d3168b903392d 100644 --- a/boards/renesas/ek_ra8d1/ek_ra8d1-pinctrl.dtsi +++ b/boards/renesas/ek_ra8d1/ek_ra8d1-pinctrl.dtsi @@ -19,10 +19,10 @@ spi0_default: spi0_default { group1 { /* MISO MOSI RSPCK SSL */ - psels = , - , - , - ; + psels = , + , + , + ; }; }; @@ -53,4 +53,212 @@ drive-strength = "medium"; }; }; + + ether_default: ether_default { + group1 { + psels = , /* ET0_MDC */ + , /* ET0_MDIO */ + , /* ET0_LINKSTA */ + , /* RMII0_TXD_EN_B */ + , /* RMII0_TXD1_BR */ + , /* RMII0_TXD0_B */ + , /* REF50CK0_B */ + , /* RMII0_RXD0_B */ + , /* RMII0_RXD1_B */ + , /* RMII0_RX_ER_B */ + ; /* RMII0_CRS_DV_B */ + drive-strength = "high"; + }; + }; + + usbhs_default: usbhs_default { + group1 { + psels = ; /* USBHS-VBUS */ + drive-strength = "high"; + }; + }; + + adc0_default: adc0_default { + group1 { + /* input */ + psels = ; + renesas,analog-enable; + }; + }; + + sdram_default: sdram_default{ + group1 { + /* SDRAM_DQM1 */ + psels = , + /* SDRAM_CKE */ + , + /* SDRAM_WE */ + , + /* SDRAM_CS */ + , + /* SDRAM_A0 */ + , + /* SDRAM_A1 */ + , + /* SDRAM_A2 */ + , + /* SDRAM_A3 */ + , + /* SDRAM_A4 */ + , + /* SDRAM_A5 */ + , + /* SDRAM_A6 */ + , + /* SDRAM_A7 */ + , + /* SDRAM_A8 */ + , + /* SDRAM_A9 */ + , + /* SDRAM_A10 */ + , + /* SDRAM_A11 */ + , + /* SDRAM_A12 */ + , + /* SDRAM_D0 */ + , + /* SDRAM_D1 */ + , + /* SDRAM_D2 */ + , + /* SDRAM_D3 */ + , + /* SDRAM_D4 */ + , + /* SDRAM_D5 */ + , + /* SDRAM_D6 */ + , + /* SDRAM_D8 */ + , + /* SDRAM_D9 */ + , + /* SDRAM_D10 */ + , + /* SDRAM_D11 */ + , + /* SDRAM_D12 */ + , + /* SDRAM_D13 */ + , + /* SDRAM_D14 */ + , + /* SDRAM_BA0 */ + , + /* SDRAM_BA1 */ + , + /* SDRAM_RAS */ + , + /* SDRAM_CAS */ + , + /* SDRAM_SDCLK */ + ; + drive-strength = "high"; + }; + + group2 { + /* SDRAM_SDCLK */ + psels = ; + drive-strength = "highspeed-high"; + }; + + group3 { + /* SDRAM_D7 */ + psels = , + /* SDRAM_D15 */ + , + /* SDRAM_DQM0 */ + ; + }; + }; + + glcdc_default: glcdc_default { + group1 { + /* LCDC_TCON0 */ + psels = , + /* LCDC_TCON1 */ + , + /* LCDC_TCON2 */ + , + /* LCDC_TCON3 */ + , + /* LCDC_DATA00 */ + , + /* LCDC_DATA01 */ + , + /* LCDC_DATA02 */ + , + /* LCDC_DATA03 */ + , + /* LCDC_DATA04 */ + , + /* LCDC_DATA05 */ + , + /* LCDC_DATA06 */ + , + /* LCDC_DATA07 */ + , + /* LCDC_DATA08 */ + , + /* LCDC_DATA09 */ + , + /* LCDC_DATA10 */ + , + /* LCDC_DATA11 */ + , + /* LCDC_DATA12 */ + , + /* LCDC_DATA13 */ + , + /* LCDC_DATA14 */ + , + /* LCDC_DATA15 */ + , + /* LCDC_DATA16 */ + , + /* LCDC_DATA17 */ + , + /* LCDC_DATA18 */ + , + /* LCDC_DATA19 */ + , + /* LCDC_DATA20 */ + , + /* LCDC_DATA21 */ + , + /* LCDC_DATA22 */ + , + /* LCDC_DATA23 */ + , + /* LCDC_CLK */ + , + /* LCDC_EXTCLK */ + ; + }; + }; + + /* NOTE: pins conflict with ether_default */ + sdhc1_default: sdhc1_default { + group1 { + psels = , /* SDCD */ + , /* SDCMD */ + , /* SDDATA0 */ + , /* SDDATA1 */ + , /* SDDATA2 */ + , /* SDDATA3 */ + ; /* SDWP */ + drive-strength = "high"; + }; + group2 { + psels = ; /* SDCLK */ + drive-strength = "highspeed-high"; + }; + }; }; diff --git a/boards/renesas/ek_ra8d1/ek_ra8d1.dts b/boards/renesas/ek_ra8d1/ek_ra8d1.dts index 82eb5f3b43e5bb0..a89c31f09404a32 100644 --- a/boards/renesas/ek_ra8d1/ek_ra8d1.dts +++ b/boards/renesas/ek_ra8d1/ek_ra8d1.dts @@ -7,7 +7,10 @@ #include #include - +#include +#include +#include +#include #include "ek_ra8d1-pinctrl.dtsi" / { @@ -40,8 +43,45 @@ }; }; + buttons { + compatible = "gpio-keys"; + button0: s1 { + gpios = <&ioport0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 1"; + zephyr,code = ; + }; + button1: s2 { + gpios = <&ioport0 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 2"; + zephyr,code = ; + }; + }; + + sdram1: sdram@68000000 { + compatible = "zephyr,memory-region", "mmio-sram"; + device_type = "memory"; + reg = <0x68000000 DT_SIZE_M(64)>; /* 512 Mbits */ + zephyr,memory-region = "SDRAM"; + status = "okay"; + }; + + renesas_mipi_connector: mipi-connector { + compatible = "renesas,ra-gpio-mipi-header"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <14 0 &ioport5 11 0>, /* IIC_SDA */ + <15 0 &ioport4 4 0>, /* DISP_BLEN */ + <16 0 &ioport5 12 0>, /* IIC_SCL */ + <17 0 &ioport5 10 0>, /* DISP_INT */ + <18 0 &ioporta 1 0>; /* DISP_RST */ + }; + aliases { led0 = &led1; + sw0 = &button0; + sw1 = &button1; + mipi-dsi = &mipi_dsi; }; }; @@ -84,6 +124,16 @@ status = "okay"; }; +&lcdclk { + clocks = <&pll>; + div = <2>; + status = "okay"; +}; + +&ioport0 { + status = "okay"; +}; + &ioport1 { status = "okay"; }; @@ -92,10 +142,18 @@ status = "okay"; }; +&ioport5 { + status = "okay"; +}; + &ioport6 { status = "okay"; }; +&ioporta { + status = "okay"; +}; + &sci0 { /* sci0 and spi0 cannot be enabled together */ pinctrl-0 = <&sci9_default>; @@ -160,3 +218,85 @@ pinctrl-0 = <&iic1_default>; pinctrl-names = "default"; }; + +ð { + local-mac-address = [74 90 50 B0 5D E9]; + status = "okay"; + phy-handle = <&phy>; +}; + +&mdio { + pinctrl-0 = <ðer_default>; + pinctrl-names = "default"; + status = "okay"; + + phy: ethernet-phy@5 { + compatible = "ethernet-phy"; + reg = <5>; + status = "okay"; + }; +}; + +&usbhs { + pinctrl-0 = <&usbhs_default>; + pinctrl-names = "default"; + maximum-speed = "high-speed"; + status = "okay"; + zephyr_udc0: udc { + status = "okay"; + }; +}; + +&usbhs_phy { + phys-clock-src = "xtal"; +}; + +&adc0 { + status = "okay"; + pinctrl-0 = <&adc0_default>; + pinctrl-names = "default"; +}; + +&port_irq12 { + interrupts = <88 12>; + status = "okay"; +}; + +&port_irq13 { + interrupts = <89 12>; + status = "okay"; +}; + +&sdram { + pinctrl-0 = <&sdram_default>; + pinctrl-names = "default"; + status = "okay"; + auto-refresh-interval = ; + auto-refresh-count = ; + precharge-cycle-count = ; + multiplex-addr-shift = "10-bit"; + edian-mode = "little-endian"; + continuous-access; + bus-width = "16-bit"; + bank@0 { + reg = <0>; + renesas,ra-sdram-timing = ; + }; +}; + +zephyr_lcdif: &lcdif { + pinctrl-0 = <&glcdc_default>; + pinctrl-names = "default"; +}; + +zephyr_mipi_dsi: &mipi_dsi {}; + +renesas_mipi_i2c: &iic1{}; + +pmod_sd_shield: &sdhc1 {}; diff --git a/boards/renesas/ek_ra8d1/ek_ra8d1_defconfig b/boards/renesas/ek_ra8d1/ek_ra8d1_defconfig index ee29549b28c80ca..1f67b94e7c110e2 100644 --- a/boards/renesas/ek_ra8d1/ek_ra8d1_defconfig +++ b/boards/renesas/ek_ra8d1/ek_ra8d1_defconfig @@ -14,4 +14,3 @@ CONFIG_CONSOLE=y CONFIG_CLOCK_CONTROL=y CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_BUILD_NO_GAP_FILL=y diff --git a/boards/renesas/ek_ra8d1/sdram.ld b/boards/renesas/ek_ra8d1/sdram.ld new file mode 100644 index 000000000000000..5855e663d095165 --- /dev/null +++ b/boards/renesas/ek_ra8d1/sdram.ld @@ -0,0 +1,19 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#if DT_NODE_HAS_STATUS(DT_NODELABEL(sdram1), okay) + +SECTION_DATA_PROLOGUE(.sdram,(NOLOAD),) +{ + __SDRAM_Start = .; + KEEP(*(.sdram*)) +#ifdef CONFIG_LVGL + KEEP(*(.lvgl_buf*)) +#endif + __SDRAM_End = .; +} GROUP_LINK_IN(SDRAM) + +#endif diff --git a/boards/renesas/ek_ra8m1/Kconfig.defconfig b/boards/renesas/ek_ra8m1/Kconfig.defconfig new file mode 100644 index 000000000000000..7f10ef8232f4381 --- /dev/null +++ b/boards/renesas/ek_ra8m1/Kconfig.defconfig @@ -0,0 +1,13 @@ +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_EK_RA8M1 + +if NETWORKING + +config NET_L2_ETHERNET + default y + +endif # NETWORKING + +endif # BOARD_EK_RA8M1 diff --git a/boards/renesas/ek_ra8m1/doc/index.rst b/boards/renesas/ek_ra8m1/doc/index.rst index 09d36befe02dcdb..55890ac3fcc24ac 100644 --- a/boards/renesas/ek_ra8m1/doc/index.rst +++ b/boards/renesas/ek_ra8m1/doc/index.rst @@ -112,6 +112,19 @@ The below features are currently supported on Zephyr OS for EK-RA8M1 board: +-----------+------------+----------------------+ | CAN | on-chip | canfd | +-----------+------------+----------------------+ +| USBHS | on-chip | udc | ++-----------+------------+----------------------+ +| ETHERNET | on-chip | ethernet | ++-----------+------------+----------------------+ +| ADC | on-chip | adc | ++-----------+------------+----------------------+ +| SDHC | on-chip | sdhc | ++-----------+------------+----------------------+ + +**Note:** + +- For using Ethernet module on EK-RA8M1, remove jumper J61 to enable Ethernet B +- For using SDHC driver on EK-RA8M1, remove jumper J61 to use with channel 0 Other hardware features are currently not supported by the port. diff --git a/boards/renesas/ek_ra8m1/ek_ra8m1-pinctrl.dtsi b/boards/renesas/ek_ra8m1/ek_ra8m1-pinctrl.dtsi index e1cf5623feccf36..f3c3ec3ebd9c0c2 100644 --- a/boards/renesas/ek_ra8m1/ek_ra8m1-pinctrl.dtsi +++ b/boards/renesas/ek_ra8m1/ek_ra8m1-pinctrl.dtsi @@ -97,4 +97,45 @@ drive-strength = "high"; }; }; + + ether_default: ether_default { + group1 { + psels = , /* ET0_MDC */ + , /* ET0_MDIO */ + , /* ET0_LINKSTA */ + , /* RMII0_TXD_EN_B */ + , /* RMII0_TXD1_BR */ + , /* RMII0_TXD0_B */ + , /* REF50CK0_B */ + , /* RMII0_RXD0_B */ + , /* RMII0_RXD1_B */ + , /* RMII0_RX_ER_B */ + ; /* RMII0_CRS_DV_B */ + drive-strength = "high"; + }; + }; + + usbhs_default: usbhs_default { + group1 { + psels = ; /* VBUS */ + drive-strength = "high"; + }; + }; + + sdhc0_default: sdhc0_default { + group1 { + psels = , /* SDCD */ + , /* SDCMD */ + , /* SDDATA0 */ + , /* SDDATA1 */ + , /* SDDATA2 */ + , /* SDDATA3 */ + ; /* SDWP */ + drive-strength = "high"; + }; + group2 { + psels = ; /* SDCLK */ + drive-strength = "highspeed-high"; + }; + }; }; diff --git a/boards/renesas/ek_ra8m1/ek_ra8m1.dts b/boards/renesas/ek_ra8m1/ek_ra8m1.dts index 354e53298f8a1b8..96e952cd0990072 100644 --- a/boards/renesas/ek_ra8m1/ek_ra8m1.dts +++ b/boards/renesas/ek_ra8m1/ek_ra8m1.dts @@ -8,6 +8,7 @@ #include #include #include +#include #include "ek_ra8m1-pinctrl.dtsi" / { @@ -93,8 +94,24 @@ <7 0 &ioport8 11 0>; /* IO8 */ }; + buttons { + compatible = "gpio-keys"; + button0: s1 { + gpios = <&ioport0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 1"; + zephyr,code = ; + }; + button1: s2 { + gpios = <&ioport0 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 2"; + zephyr,code = ; + }; + }; + aliases { led0 = &led1; + sw0 = &button0; + sw1 = &button1; }; transceiver0: can-phy0 { @@ -238,6 +255,7 @@ mikrobus_serial: &uart3 {}; status = "okay"; pinctrl-0 = <&adc0_default>; pinctrl-names = "default"; + average-count = <4>; }; &trng { @@ -246,6 +264,8 @@ mikrobus_serial: &uart3 {}; &spi1 { pinctrl-0 = <&spi1_default>; + pinctrl-names = "default"; + status = "okay"; }; &pwm7 { @@ -285,3 +305,47 @@ pmod2_serial: &uart2 {}; pmod_serial: &pmod1_serial {}; pmod_header: &pmod1_header {}; + +ð { + local-mac-address = [74 90 50 B0 6D 5A]; + status = "okay"; + phy-handle = <&phy>; +}; + +&mdio { + pinctrl-0 = <ðer_default>; + pinctrl-names = "default"; + status = "okay"; + + phy: ethernet-phy@5 { + compatible = "ethernet-phy"; + reg = <5>; + status = "okay"; + }; +}; + +&usbhs { + pinctrl-0 = <&usbhs_default>; + pinctrl-names = "default"; + maximum-speed = "high-speed"; + status = "okay"; + zephyr_udc0: udc { + status = "okay"; + }; +}; + +&usbhs_phy { + phys-clock-src = "xtal"; +}; + +&port_irq12 { + interrupts = <88 12>; + status = "okay"; +}; + +&port_irq13 { + interrupts = <89 12>; + status = "okay"; +}; + +pmod_sd_shield: &sdhc0 {}; diff --git a/boards/renesas/ek_ra8m1/ek_ra8m1_defconfig b/boards/renesas/ek_ra8m1/ek_ra8m1_defconfig index 7fd87eb217c2314..d20f50324687f4c 100644 --- a/boards/renesas/ek_ra8m1/ek_ra8m1_defconfig +++ b/boards/renesas/ek_ra8m1/ek_ra8m1_defconfig @@ -13,5 +13,4 @@ CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_CONSOLE=y CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/fpb_ra6e1/doc/index.rst b/boards/renesas/fpb_ra6e1/doc/index.rst index 9d8e73b92195551..b9df0e22f36bfde 100644 --- a/boards/renesas/fpb_ra6e1/doc/index.rst +++ b/boards/renesas/fpb_ra6e1/doc/index.rst @@ -89,6 +89,10 @@ The below features are currently supported on Zephyr OS for FPB-RA6E1 board: +-----------+------------+----------------------+ | COUNTER | on-chip | counter | +-----------+------------+----------------------+ +| ADC | on-chip | adc | ++-----------+------------+----------------------+ +| PWM | on-chip | pwm | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/fpb_ra6e1/fpb_ra6e1-pinctrl.dtsi b/boards/renesas/fpb_ra6e1/fpb_ra6e1-pinctrl.dtsi index 90253c6b4c463a2..89628ad68bee60d 100644 --- a/boards/renesas/fpb_ra6e1/fpb_ra6e1-pinctrl.dtsi +++ b/boards/renesas/fpb_ra6e1/fpb_ra6e1-pinctrl.dtsi @@ -30,4 +30,20 @@ ; }; }; + + adc0_default: adc0_default { + group1 { + /* input */ + psels = ; + renesas,analog-enable; + }; + }; + + pwm1_default: pwm1_default { + group1 { + /* GTIOC1A GTIOC1B */ + psels = , + ; + }; + }; }; diff --git a/boards/renesas/fpb_ra6e1/fpb_ra6e1.dts b/boards/renesas/fpb_ra6e1/fpb_ra6e1.dts index fefb2651d078791..62a842b6ed208bf 100644 --- a/boards/renesas/fpb_ra6e1/fpb_ra6e1.dts +++ b/boards/renesas/fpb_ra6e1/fpb_ra6e1.dts @@ -7,6 +7,8 @@ #include #include +#include +#include #include "fpb_ra6e1-pinctrl.dtsi" @@ -33,8 +35,18 @@ }; }; + buttons { + compatible = "gpio-keys"; + button0: s1 { + gpios = <&ioport2 5 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 1"; + zephyr,code = ; + }; + }; + aliases { led0 = &led1; + sw0 = &button0; }; }; @@ -65,6 +77,10 @@ status = "okay"; }; +&ioport2 { + status = "okay"; +}; + &ioport4 { status = "okay"; }; @@ -97,3 +113,22 @@ }; }; }; + +&adc0 { + status = "okay"; + pinctrl-0 = <&adc0_default>; + pinctrl-names = "default"; +}; + +&port_irq1 { + interrupts = <41 12>; + status = "okay"; +}; + +&pwm1 { + pinctrl-0 = <&pwm1_default>; + pinctrl-names = "default"; + interrupts = <63 1>, <64 1>; + interrupt-names = "gtioca", "overflow"; + status = "okay"; +}; diff --git a/boards/renesas/fpb_ra6e1/fpb_ra6e1_defconfig b/boards/renesas/fpb_ra6e1/fpb_ra6e1_defconfig index 8733fd3cdc7cd88..4fd3e749468faf8 100644 --- a/boards/renesas/fpb_ra6e1/fpb_ra6e1_defconfig +++ b/boards/renesas/fpb_ra6e1/fpb_ra6e1_defconfig @@ -7,7 +7,6 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=200000000 CONFIG_GPIO=y CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_BUILD_NO_GAP_FILL=y # Enable Console CONFIG_SERIAL=y diff --git a/boards/renesas/fpb_ra6e2/doc/index.rst b/boards/renesas/fpb_ra6e2/doc/index.rst index e7aeb268852e28f..d037dc20c42c01e 100644 --- a/boards/renesas/fpb_ra6e2/doc/index.rst +++ b/boards/renesas/fpb_ra6e2/doc/index.rst @@ -87,6 +87,12 @@ The below features are currently supported on Zephyr OS for FPB-RA6E2 board: +-----------+------------+----------------------+ | SPI | on-chip | spi | +-----------+------------+----------------------+ +| ADC | on-chip | adc | ++-----------+------------+----------------------+ +| PWM | on-chip | pwm | ++-----------+------------+----------------------+ +| ENTROPY | on-chip | entropy | ++-----------+------------+----------------------+ Other hardware features are currently not supported by the port. diff --git a/boards/renesas/fpb_ra6e2/fpb_ra6e2-pinctrl.dtsi b/boards/renesas/fpb_ra6e2/fpb_ra6e2-pinctrl.dtsi index 5c47dd207044d14..8d7e96e99b1bf14 100644 --- a/boards/renesas/fpb_ra6e2/fpb_ra6e2-pinctrl.dtsi +++ b/boards/renesas/fpb_ra6e2/fpb_ra6e2-pinctrl.dtsi @@ -21,4 +21,20 @@ ; }; }; + + adc0_default: adc0_default { + group1 { + /* input */ + psels = ; + renesas,analog-enable; + }; + }; + + pwm1_default: pwm1_default { + group1 { + /* GTIOC1A GTIOC1B */ + psels = , + ; + }; + }; }; diff --git a/boards/renesas/fpb_ra6e2/fpb_ra6e2.dts b/boards/renesas/fpb_ra6e2/fpb_ra6e2.dts index 2ca322be8356547..dc6fe902bae43e0 100644 --- a/boards/renesas/fpb_ra6e2/fpb_ra6e2.dts +++ b/boards/renesas/fpb_ra6e2/fpb_ra6e2.dts @@ -7,6 +7,8 @@ #include #include +#include +#include #include "fpb_ra6e2-pinctrl.dtsi" @@ -19,6 +21,7 @@ zephyr,flash = &flash0; zephyr,console = &uart0; zephyr,shell-uart = &uart0; + zephyr,entropy = &trng; }; leds { @@ -33,9 +36,19 @@ }; }; + buttons { + compatible = "gpio-keys"; + button0: s1 { + gpios = <&ioport3 4 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + label = "Push button switch 1"; + zephyr,code = ; + }; + }; + aliases { led0 = &led1; led1 = &led2; + sw0 = &button0; }; }; @@ -59,6 +72,10 @@ status = "okay"; }; +&ioport3 { + status = "okay"; +}; + &flash0 { partitions { compatible = "fixed-partitions"; @@ -87,3 +104,27 @@ mul = <10 0>; status = "okay"; }; + +&adc0 { + status = "okay"; + pinctrl-0 = <&adc0_default>; + pinctrl-names = "default"; +}; + +&port_irq9 { + interrupts = <41 12>; + status = "okay"; +}; + +&pwm1 { + pinctrl-0 = <&pwm1_default>; + pinctrl-names = "default"; + interrupts = <63 1>, <64 1>; + interrupt-names = "gtioca", "overflow"; + divider = ; + status = "okay"; +}; + +&trng { + status ="okay"; +}; diff --git a/boards/renesas/fpb_ra6e2/fpb_ra6e2_defconfig b/boards/renesas/fpb_ra6e2/fpb_ra6e2_defconfig index 956d3f6d6505ce7..882cf699d986f38 100644 --- a/boards/renesas/fpb_ra6e2/fpb_ra6e2_defconfig +++ b/boards/renesas/fpb_ra6e2/fpb_ra6e2_defconfig @@ -13,5 +13,4 @@ CONFIG_UART_CONSOLE=y CONFIG_CONSOLE=y CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_CLOCK_CONTROL=y diff --git a/boards/renesas/mck_ra8t1/Kconfig.defconfig b/boards/renesas/mck_ra8t1/Kconfig.defconfig new file mode 100644 index 000000000000000..37c1586dbb1ccbc --- /dev/null +++ b/boards/renesas/mck_ra8t1/Kconfig.defconfig @@ -0,0 +1,13 @@ +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_MCK_RA8T1 + +if NETWORKING + +config NET_L2_ETHERNET + default y + +endif # NETWORKING + +endif # BOARD_MCK_RA8T1 diff --git a/boards/renesas/mck_ra8t1/doc/index.rst b/boards/renesas/mck_ra8t1/doc/index.rst index eeda35fceaf011a..e80028da83b9017 100644 --- a/boards/renesas/mck_ra8t1/doc/index.rst +++ b/boards/renesas/mck_ra8t1/doc/index.rst @@ -110,6 +110,14 @@ The below features are currently supported on Zephyr OS for MCB-RA8T1 board: +--------------+------------+----------------------+ | I2C | on-chip | i2c | +--------------+------------+----------------------+ +| ETHERNET | on-chip | ethernet | ++--------------+------------+----------------------+ +| ADC | on-chip | adc | ++--------------+------------+----------------------+ +| SDHC | on-chip | sdhc | ++--------------+------------+----------------------+ + +**Note:** For using SDHC module on EK-RA8M1, Connect microSD Card to microSD Socket (CN12) Other hardware features are currently not supported by the port. diff --git a/boards/renesas/mck_ra8t1/mck_ra8t1-pinctrl.dtsi b/boards/renesas/mck_ra8t1/mck_ra8t1-pinctrl.dtsi index 63903204f448188..5bb55bb8a0d59b8 100644 --- a/boards/renesas/mck_ra8t1/mck_ra8t1-pinctrl.dtsi +++ b/boards/renesas/mck_ra8t1/mck_ra8t1-pinctrl.dtsi @@ -53,4 +53,46 @@ drive-strength = "medium"; }; }; + + ether_default: ether_default { + group1 { + psels = , /* ET0_MDC */ + , /* ET0_MDIO */ + , /* ET0_LINKSTA */ + , /* RMII0_TXD_EN_B */ + , /* RMII0_TXD1_BR */ + , /* RMII0_TXD0_B */ + , /* REF50CK0_B */ + , /* RMII0_RXD0_B */ + , /* RMII0_RXD1_B */ + , /* RMII0_RX_ER_B */ + ; /* RMII0_CRS_DV_B */ + drive-strength = "high"; + }; + }; + + adc0_default: adc0_default { + group1 { + /* input */ + psels = ; + renesas,analog-enable; + }; + }; + + sdhc0_default: sdhc0_default { + group1 { + psels = , /* SDCD */ + , /* SDCMD */ + , /* SDDATA0 */ + , /* SDDATA1 */ + , /* SDDATA2 */ + , /* SDDATA3 */ + ; /* SDWP */ + drive-strength = "high"; + }; + group2 { + psels = ; /* SDCLK */ + drive-strength = "highspeed-high"; + }; + }; }; diff --git a/boards/renesas/mck_ra8t1/mck_ra8t1.dts b/boards/renesas/mck_ra8t1/mck_ra8t1.dts index 19f46abcddce429..d20ad5ecc4e4dac 100644 --- a/boards/renesas/mck_ra8t1/mck_ra8t1.dts +++ b/boards/renesas/mck_ra8t1/mck_ra8t1.dts @@ -7,7 +7,7 @@ #include #include - +#include #include "mck_ra8t1-pinctrl.dtsi" / { @@ -46,6 +46,7 @@ aliases { led0 = &led1; + sdhc0 = &sdhc0; }; }; @@ -87,6 +88,10 @@ status = "okay"; }; +&ioport3 { + status = "okay"; +}; + &ioport6 { status = "okay"; }; @@ -153,3 +158,41 @@ pinctrl-0 = <&iic1_default>; pinctrl-names = "default"; }; + +ð { + local-mac-address = [74 90 50 6D 81 75]; + status = "okay"; + phy-handle = <&phy>; +}; + +&mdio { + pinctrl-0 = <ðer_default>; + pinctrl-names = "default"; + status = "okay"; + + phy: ethernet-phy@5 { + compatible = "ethernet-phy"; + reg = <5>; + status = "okay"; + }; +}; + +&adc0 { + status = "okay"; + pinctrl-0 = <&adc0_default>; + pinctrl-names = "default"; + average-count = <4>; +}; + +&sdhc0 { + compatible = "renesas,ra-sdhc"; + pinctrl-0 = <&sdhc0_default>; + enable-gpios = <&ioport3 11 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + status = "okay"; + sdmmc { + compatible = "zephyr,sdmmc-disk"; + disk-name = "SD"; + status = "okay"; + }; +}; diff --git a/boards/renesas/mck_ra8t1/mck_ra8t1_defconfig b/boards/renesas/mck_ra8t1/mck_ra8t1_defconfig index 3a064b9d95877f2..07c0ee5f1ca5ac9 100644 --- a/boards/renesas/mck_ra8t1/mck_ra8t1_defconfig +++ b/boards/renesas/mck_ra8t1/mck_ra8t1_defconfig @@ -15,4 +15,3 @@ CONFIG_CONSOLE=y CONFIG_CLOCK_CONTROL=y CONFIG_BUILD_OUTPUT_HEX=y -CONFIG_BUILD_NO_GAP_FILL=y diff --git a/boards/renesas/rzg3s_smarc/Kconfig.rzg3s_smarc b/boards/renesas/rzg3s_smarc/Kconfig.rzg3s_smarc new file mode 100644 index 000000000000000..3a0abcb410b302b --- /dev/null +++ b/boards/renesas/rzg3s_smarc/Kconfig.rzg3s_smarc @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_RZG3S_SMARC + select SOC_R9A08G045S33GBG diff --git a/boards/renesas/rzg3s_smarc/board.cmake b/boards/renesas/rzg3s_smarc/board.cmake new file mode 100644 index 000000000000000..1dbf0782ab0dc2d --- /dev/null +++ b/boards/renesas/rzg3s_smarc/board.cmake @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(jlink "--device=R9A08G045S33_M33_0" "--speed=15000") +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/renesas/rzg3s_smarc/board.yml b/boards/renesas/rzg3s_smarc/board.yml new file mode 100644 index 000000000000000..97f7d9ba24f32b7 --- /dev/null +++ b/boards/renesas/rzg3s_smarc/board.yml @@ -0,0 +1,6 @@ +board: + name: rzg3s_smarc + full_name: RZ/G3S SMARC Evaluation Board Kit + vendor: renesas + socs: + - name: r9a08g045s33gbg diff --git a/boards/renesas/rzg3s_smarc/doc/index.rst b/boards/renesas/rzg3s_smarc/doc/index.rst new file mode 100644 index 000000000000000..e442a836ee44711 --- /dev/null +++ b/boards/renesas/rzg3s_smarc/doc/index.rst @@ -0,0 +1,234 @@ +.. zephyr:board:: rzg3s_smarc + +Overview +******** + +The Renesas RZ/G3S SMARC Evaluation Board Kit (RZ/G3S-EVKIT) consists of a SMARC v2.1 module board and a carrier board. + +* Device: RZ/G3S R9A08G045S33GBG + + * Cortex-A55 Single, Cortex-M33 x 2 + * BGA 359-pin, 14mmSq body, 0.5mm pitch + +* SMARC v2.1 Module Board Functions + + * LPDDR4 SDRAM: 1GB x 1pc + * QSPI flash memory: 128Mb x 1pc + * eMMC memory: 64GB x 1pc + * PMIC power supply RAA215300A2GNP#HA3 implemented + * microSD card x2 + * I3C connector + * JTAG connector + * ADC x8 channels + * Current monitor (USB Micro B) + +* Carrier Board Functions + + * Gigabit Ethernet x2 + * USB2.0 x2ch (OTG x1ch, Host x1ch) + * CAN-FD x2 + * microSD card x1 + * Mono speaker, Stereo headphone, Mic., and Aux.. + * PMOD x2 + * USB-Type C for power input + * PCIe Gen2 4-lane slot (G3S supports only 1-lane) + * M.2 Key E + * M.2 Key B and SIM card + * Coin cell battery holder (3.0V support) + +Hardware +******** + +The Renesas RZ/G3S MPU documentation can be found at `RZ/G3S Group Website`_ + +.. figure:: rzg3s_block_diagram.webp + :width: 600px + :align: center + :alt: RZ/G3S group feature + + RZ/G3S block diagram (Credit: Renesas Electronics Corporation) + +Supported Features +================== + +The ``rzg3s_smarc/r9a08g045s33gbg/cm33`` board target supports the ARM Cortex-M33 System Core without FPU +and the following hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | arch/arm | ++-----------+------------+-------------------------------------+ +| SYSTICK | on-chip | arch/arm | ++-----------+------------+-------------------------------------+ +| PINCTRL | on-chip | pinctrl | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial | ++-----------+------------+-------------------------------------+ + +Other hardware features are currently not supported by the port. + +Programming and Debugging +************************* + +RZ/G3S-EVKIT is designed to start different systems on different cores. +It uses Yocto as the build system to build Linux system and boot loaders +to run BL2 TF-A on Cortex-A55 System Core before starting Zephyr. The minimal steps are described below. + + 1. Follow ''2.2 Building Images'' of `SMARC EVK of RZ/G3S Linux Start-up Guide`_ to prepare the build environment. + + 2. Before build, add ``PLAT_M33_BOOT_SUPPORT=1`` to meta-renesas/meta-rzg3s/recipes-bsp/trusted-firmware-a/trusted-firmware-a.bbappend. + + .. code-block:: bash + :emphasize-lines: 6 + + require trusted-firmware-a.inc + COMPATIBLE_MACHINE_rzg3s = "(rzg3s-dev|smarc-rzg3s)" + PLATFORM_rzg3s-dev = "g3s" + EXTRA_FLAGS_rzg3s-dev = "BOARD=dev14_1_lpddr PLAT_SYSTEM_SUSPEND=vbat" + PLATFORM_smarc-rzg3s = "g3s" + EXTRA_FLAGS_smarc-rzg3s = "BOARD=smarc PLAT_SYSTEM_SUSPEND=vbat PLAT_M33_BOOT_SUPPORT=1" + + 3. Start the build: + + .. code-block:: bash + + MACHINE=smarc-rzg3s bitbake core-image-minimal + + The below necessary artifacts will be located in the build/tmp/deploy/images + + +---------------+-----------------------------+ + | Artifacts | File name | + +===============+=============================+ + | Boot loader | bl2_bp_spi-smarc-rzg3s.srec | + | | | + | | fip-smarc-rzg3s.srec | + +---------------+-----------------------------+ + | Flash Writer | FlashWriter-smarc-rzg3s.mot | + +---------------+-----------------------------+ + + 4. Follow ''4.2 Startup Procedure'' of `SMARC EVK of RZ/G3S Linux Start-up Guide`_ for power supply and board setting + at SCIF download (SW_MODE[1:4] = OFF, ON, OFF, ON) and Cortex-A55 cold boot (SW_CONFIG[1:6] = OFF, OFF, ON, OFF, OFF, OFF) + + 5. Follow ''4.3 Download Flash Writer to RAM'' of `SMARC EVK of RZ/G3S Linux Start-up Guide`_ to download Flash Writer to RAM + + 6. Follow ''4.4 Write the Bootloader'' of `SMARC EVK of RZ/G3S Linux Start-up Guide`_ to write the boot loader + to the target board by using Flash Writer. + +Applications for the ``rzg3s_smarc`` board can be built in the usual way as +documented in :ref:`build_an_application`. + +Console +======= + +The UART port for Cortex-M33 System Core can be accessed by connecting `Pmod USBUART `_ +to the upper side of ``PMOD1_3A``. + +Debugging +========= + +It is possible to load and execute a Zephyr application binary on +this board on the Cortex-M33 System Core from +the internal SRAM, using ``JLink`` debugger (:ref:`jlink-debug-host-tools`). + +.. note:: + + Currently it's required Renesas BL2 TF-A to be started on Cortex-A55 System Core + before starting Zephyr as it configures clocks and the Cortex-M33 System Core before starting it. + +Here is an example for building and debugging with the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: rzg3s_smarc/r9a08g045s33gbg/cm33 + :goals: build debug + +Flashing +======== + +Zephyr application can be flashed to QSPI storage and then loaded by +Renesas BL2 TF-A running on the Cortex-A55 System Core and starting binary on the Cortex-M33 System Core. + +The Zephyr application binary has to be converted to Motorolla S-record `SREC`_ format +which is generated automatically in Zephyr application build directory with the extension ``s19``. + +.. _SREC: https://en.wikipedia.org/wiki/SREC_(file_format) + +.. _Flashing on QSPI: + +Flashing on QSPI using Flash Writer +--------------------------------------- + +Zephyr binary has to be converted to **srec** format. + +* Download and start **Flash Writer** as described in ''4.3 Download Flash Writer to RAM'' of `SMARC EVK of RZ/G3S Linux Start-up Guide`_ +* Use **XLS2** command to flash Zephyr binary +* Input when asked: + +.. code-block:: console + + ===== Please Input Program Top Address ============ + Please Input : H'23000 + ===== Please Input Qspi Save Address === + Please Input : H'200000 + +* Then send Zephyr **s19** file from terminal (use ''ascii'' mode) +* Reboot the board in the **QSPI Boot Mode** + +.. code-block:: console + + -- Load Program to SRAM --------------- + + Flash writer for RZ/G3S Series V0.60 Jan.26,2023 + Product Code : RZ/G3S + >XLS2 + ===== Qspi writing of RZ/G2 Board Command ============= + Load Program to Spiflash + Writes to any of SPI address. + Program size & Qspi Save Address + ===== Please Input Program Top Address ============ + Please Input : H'23000 + + ===== Please Input Qspi Save Address === + Please Input : H'200000 + please send ! ('.' & CR stop load) + I Flash memory... + Erase Completed + Write to SPI Flash memory. + ======= Qspi Save Information ================= + SpiFlashMemory Stat Address : H'00200000 + SpiFlashMemory End Address : H'002098E6 + =========================================================== + +Flashing on QSPI using west +--------------------------- + +Before using ``flash`` command, the board must be set to Cortex-M33 cold boot (SW_CONFIG[1:6] = OFF, OFF, ON, OFF, OFF, ON). +After flashing, it must be set back to Cortex-A55 cold boot to run. + +The minimal version of SEGGER JLink SW which can perform flashing of QSPI memory is v7.96. + +**Note:** It's verified that we can perform flashing successfully with SEGGER JLink SW v7.98g so please use this or later +version. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: rzg3s_smarc/r9a08g045s33gbg/cm33 + :goals: build flash + :compact: + +References +********** + +.. target-notes:: + +.. _RZ/G3S Group Website: + https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-mpus/rzg3s-general-purpose-microprocessors-single-core-arm-cortex-a55-11-ghz-cpu-and-dual-core-cortex-m33-250 + +.. _RZG3S-EVKIT Website: + https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-mpus/rzg3s-evkit-evaluation-board-kit-rzg3s-mpu + +.. _SMARC EVK of RZ/G3S Linux Start-up Guide: + https://www.renesas.com/us/en/document/gde/smarc-evk-rzg3s-linux-start-guide-rev104 diff --git a/boards/renesas/rzg3s_smarc/doc/rzg3s_block_diagram.webp b/boards/renesas/rzg3s_smarc/doc/rzg3s_block_diagram.webp new file mode 100644 index 000000000000000..ae3022760bc4924 Binary files /dev/null and b/boards/renesas/rzg3s_smarc/doc/rzg3s_block_diagram.webp differ diff --git a/boards/renesas/rzg3s_smarc/doc/rzg3s_smarc.webp b/boards/renesas/rzg3s_smarc/doc/rzg3s_smarc.webp new file mode 100644 index 000000000000000..1d81bb7a615562d Binary files /dev/null and b/boards/renesas/rzg3s_smarc/doc/rzg3s_smarc.webp differ diff --git a/boards/renesas/rzg3s_smarc/rzg3s_smarc-pinctrl.dtsi b/boards/renesas/rzg3s_smarc/rzg3s_smarc-pinctrl.dtsi new file mode 100644 index 000000000000000..aa8ae25d0579d2d --- /dev/null +++ b/boards/renesas/rzg3s_smarc/rzg3s_smarc-pinctrl.dtsi @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2024 EPAM Systems + * Copyright (c) 2024 Renesas Electronics Corporation + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +&pinctrl { + /omit-if-no-ref/ scif0_pins: scif0 { + scif0-pinmux { + pinmux = , /* TXD */ + ; /* RXD */ + }; + }; + + /omit-if-no-ref/ scif1_pins: scif1 { + scif1-pinmux { + pinmux = , /* TXD */ + ; /* RXD */ + }; + }; + + /omit-if-no-ref/ scif3_pins: scif3 { + scif3-pinmux { + pinmux = , /* TXD */ + ; /* RXD */ + }; + }; + + /omit-if-no-ref/ scif5_pins: scif5 { + scif5-pinmux { + pinmux = , /* RXD */ + ; /* TXD */ + }; + }; +}; diff --git a/boards/renesas/rzg3s_smarc/rzg3s_smarc_r9a08g045s33gbg_cm33.dts b/boards/renesas/rzg3s_smarc/rzg3s_smarc_r9a08g045s33gbg_cm33.dts new file mode 100644 index 000000000000000..81210407ae4f432 --- /dev/null +++ b/boards/renesas/rzg3s_smarc/rzg3s_smarc_r9a08g045s33gbg_cm33.dts @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2024 EPAM Systems + * Copyright (c) 2024 Renesas Electronics Corporation + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include +#include +#include +#include +#include "rzg3s_smarc-pinctrl.dtsi" + +/ { + model = "Renesas RZ/G3S SMARC"; + compatible = "renesas,rzg3s-smarc"; + + chosen { + zephyr,sram = &sram_mcpu0; + zephyr,flash = &spi_flash; + zephyr,console = &scif1; + zephyr,shell-uart = &scif1; + }; + + aliases { + sw0 = &sw_1; + sw1 = &sw_2; + sw2 = &sw_3; + }; + + buttons { + compatible = "gpio-keys"; + + sw_1: button_1 { + gpios = <&gpio18 0 GPIO_ACTIVE_LOW>; + label = "SW1"; + zephyr,code = ; + }; + + sw_2: button_2 { + gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; + label = "SW2"; + zephyr,code = ; + }; + + sw_3: button_3 { + gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; + label = "SW3"; + zephyr,code = ; + }; + }; + + ddr: memory@60000000 { + compatible ="zephyr,memory-region", "mmio-sram"; + reg = <0x60000000 DT_SIZE_M(16)>; + zephyr,memory-region = "DDR"; + zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>; + }; + + sram_mcpu0: memory@23000 { + compatible = "mmio-sram"; + reg = <0x23000 DT_SIZE_K(243)>; + }; + + /* + * This node is defined to enable west flash support. + * The base addr and size depends on ATF-F configuration, which is running on Cortex-A55 and + * loading Zephyr app from xSPI flash. + */ + spi_flash: memory@80200000 { + compatible = "mmio-sram"; + reg = <0x80200000 DT_SIZE_K(256)>; + }; + +}; + +&scif1 { + current-speed = <115200>; + pinctrl-0 = <&scif1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio0{ + status = "okay"; +}; + +&gpio18{ + status = "okay"; +}; diff --git a/boards/renesas/rzg3s_smarc/rzg3s_smarc_r9a08g045s33gbg_cm33.yaml b/boards/renesas/rzg3s_smarc/rzg3s_smarc_r9a08g045s33gbg_cm33.yaml new file mode 100644 index 000000000000000..06285a945dec7e7 --- /dev/null +++ b/boards/renesas/rzg3s_smarc/rzg3s_smarc_r9a08g045s33gbg_cm33.yaml @@ -0,0 +1,10 @@ +identifier: rzg3s_smarc/r9a08g045s33gbg/cm33 +name: Cortex-M33 for Renesas RZ/G3S SMARC +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb +supported: + - uart + - gpio diff --git a/boards/renesas/rzg3s_smarc/rzg3s_smarc_r9a08g045s33gbg_cm33_defconfig b/boards/renesas/rzg3s_smarc/rzg3s_smarc_r9a08g045s33gbg_cm33_defconfig new file mode 100644 index 000000000000000..b06a719875e7bd7 --- /dev/null +++ b/boards/renesas/rzg3s_smarc/rzg3s_smarc_r9a08g045s33gbg_cm33_defconfig @@ -0,0 +1,12 @@ +# Copyright (c) 2024 EPAM Systems +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_XIP=n + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable console +CONFIG_CONSOLE=ys +CONFIG_UART_CONSOLE=y diff --git a/boards/renesas/rzt2m_starterkit/rzt2m_starter_kit_renesas_rzt2m.dts b/boards/renesas/rzt2m_starterkit/rzt2m_starter_kit_renesas_rzt2m.dts index a34558ec0144c17..717c21c0cdaba13 100644 --- a/boards/renesas/rzt2m_starterkit/rzt2m_starter_kit_renesas_rzt2m.dts +++ b/boards/renesas/rzt2m_starterkit/rzt2m_starter_kit_renesas_rzt2m.dts @@ -7,6 +7,7 @@ /dts-v1/; #include #include +#include / { model = "RZT/2M Starter Kit"; @@ -48,10 +49,12 @@ sw1: sw1 { label = "sw1"; gpios = <&gpio10 5 0>; + zephyr,code = ; }; sw2: sw2 { label = "sw2"; gpios = <&gpio16 3 0>; + zephyr,code = ; }; }; }; diff --git a/boards/ronoth/lodev/ronoth_lodev.dts b/boards/ronoth/lodev/ronoth_lodev.dts index 024e71a721066f4..315f58fa2c601ab 100644 --- a/boards/ronoth/lodev/ronoth_lodev.dts +++ b/boards/ronoth/lodev/ronoth_lodev.dts @@ -163,7 +163,7 @@ &adc1 { pinctrl-0 = <&adc_in0_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/ruuvi/ruuvitag/Kconfig.defconfig b/boards/ruuvi/ruuvitag/Kconfig.defconfig index 237d564c7462f26..4b9d1f8360f9409 100644 --- a/boards/ruuvi/ruuvitag/Kconfig.defconfig +++ b/boards/ruuvi/ruuvitag/Kconfig.defconfig @@ -8,7 +8,4 @@ if BOARD_RUUVI_RUUVITAG config SPI default y -config BT_CTLR - default BT - endif # BOARD_RUUVI_RUUVITAG diff --git a/boards/seeed/lora_e5_dev_board/lora_e5_dev_board.dts b/boards/seeed/lora_e5_dev_board/lora_e5_dev_board.dts index 64ea2f84726da23..f3df8911ee805e2 100644 --- a/boards/seeed/lora_e5_dev_board/lora_e5_dev_board.dts +++ b/boards/seeed/lora_e5_dev_board/lora_e5_dev_board.dts @@ -157,7 +157,7 @@ stm32_lp_tick_source: &lptim1 { &adc1 { pinctrl-0 = <&adc_in2_pb3>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/seeed/wio_terminal/Kconfig.defconfig b/boards/seeed/wio_terminal/Kconfig.defconfig index 47e610c12cd9fef..3ff8b29601596ee 100644 --- a/boards/seeed/wio_terminal/Kconfig.defconfig +++ b/boards/seeed/wio_terminal/Kconfig.defconfig @@ -5,3 +5,5 @@ configdefault LV_COLOR_16_SWAP default y if LVGL + +source "boards/common/usb/Kconfig.cdc_acm_serial.defconfig" diff --git a/boards/seeed/wio_terminal/wio_terminal.dts b/boards/seeed/wio_terminal/wio_terminal.dts index 27d24604f44cce5..c04feb0b14a7918 100644 --- a/boards/seeed/wio_terminal/wio_terminal.dts +++ b/boards/seeed/wio_terminal/wio_terminal.dts @@ -18,8 +18,6 @@ chosen { zephyr,sram = &sram0; zephyr,flash = &flash0; - zephyr,console = &wio_terminal_console; - zephyr,shell-uart = &wio_terminal_console; zephyr,code-partition = &code_partition; zephyr,display = &ili9341; }; @@ -300,8 +298,6 @@ zephyr_udc0: &usb0 { status = "okay"; pinctrl-0 = <&usb_dc_default>; pinctrl-names = "default"; - - wio_terminal_console: wio_terminal_console { - compatible = "zephyr,cdc-acm-uart"; - }; }; + +#include <../boards/common/usb/cdc_acm_serial.dtsi> diff --git a/boards/seeed/wio_terminal/wio_terminal_defconfig b/boards/seeed/wio_terminal/wio_terminal_defconfig index 20852ef411e9e69..e44adbcbb676e97 100644 --- a/boards/seeed/wio_terminal/wio_terminal_defconfig +++ b/boards/seeed/wio_terminal/wio_terminal_defconfig @@ -14,16 +14,3 @@ CONFIG_REGULATOR=y CONFIG_BOOTLOADER_BOSSA=y CONFIG_BOOTLOADER_BOSSA_ADAFRUIT_UF2=y CONFIG_BUILD_OUTPUT_UF2=y - -# Console over USB CDC-ACM -CONFIG_SERIAL=y -CONFIG_CONSOLE=y -CONFIG_UART_CONSOLE=y -CONFIG_UART_INTERRUPT_DRIVEN=y -CONFIG_USB_DEVICE_STACK=y -CONFIG_USB_DEVICE_INITIALIZE_AT_BOOT=y -CONFIG_USB_DEVICE_VID=0x2886 -CONFIG_USB_DEVICE_PID=0x802D -CONFIG_USB_DEVICE_MANUFACTURER="Seeed Studio" -CONFIG_USB_DEVICE_PRODUCT="Wio Terminal" -CONFIG_USB_CDC_ACM_LOG_LEVEL_OFF=y diff --git a/boards/seeed/xiao_ble/Kconfig.defconfig b/boards/seeed/xiao_ble/Kconfig.defconfig index d02785ec152aa3f..3bc7ae6721fc46e 100644 --- a/boards/seeed/xiao_ble/Kconfig.defconfig +++ b/boards/seeed/xiao_ble/Kconfig.defconfig @@ -5,17 +5,6 @@ if BOARD_XIAO_BLE -config BT_CTLR - default BT - -if USB_DEVICE_STACK - -config UART_CONSOLE - default CONSOLE - -config USB_DEVICE_INITIALIZE_AT_BOOT - default y - -endif # USB_DEVICE_STACK +source "boards/common/usb/Kconfig.cdc_acm_serial.defconfig" endif # BOARD_XIAO_BLE diff --git a/boards/seeed/xiao_ble/xiao_ble_common.dtsi b/boards/seeed/xiao_ble/xiao_ble_common.dtsi index b8f4f259c10230f..7b87b6db76f8e26 100644 --- a/boards/seeed/xiao_ble/xiao_ble_common.dtsi +++ b/boards/seeed/xiao_ble/xiao_ble_common.dtsi @@ -12,11 +12,6 @@ / { chosen { - zephyr,console = &usb_cdc_acm_uart; - zephyr,shell-uart = &usb_cdc_acm_uart; - zephyr,uart-mcumgr = &usb_cdc_acm_uart; - zephyr,bt-mon-uart = &usb_cdc_acm_uart; - zephyr,bt-c2h-uart = &usb_cdc_acm_uart; zephyr,ieee802154 = &ieee802154; }; @@ -146,8 +141,6 @@ zephyr_udc0: &usbd { compatible = "nordic,nrf-usbd"; status = "okay"; - - usb_cdc_acm_uart: cdc-acm-uart { - compatible = "zephyr,cdc-acm-uart"; - }; }; + +#include <../boards/common/usb/cdc_acm_serial.dtsi> diff --git a/boards/seeed/xiao_ble/xiao_ble_defconfig b/boards/seeed/xiao_ble/xiao_ble_defconfig index 84eb3e97f22a575..725c581b36486a3 100644 --- a/boards/seeed/xiao_ble/xiao_ble_defconfig +++ b/boards/seeed/xiao_ble/xiao_ble_defconfig @@ -15,12 +15,6 @@ CONFIG_SERIAL=y # Enable console CONFIG_CONSOLE=y -# Logger cannot use itself to log -CONFIG_USB_CDC_ACM_LOG_LEVEL_OFF=y - -# Enable USB -CONFIG_USB_DEVICE_STACK=y - # Build UF2 by default, supported by the Adafruit nRF52 Bootloader CONFIG_BUILD_OUTPUT_UF2=y CONFIG_USE_DT_CODE_PARTITION=y diff --git a/boards/seeed/xiao_ble/xiao_ble_nrf52840_sense_defconfig b/boards/seeed/xiao_ble/xiao_ble_nrf52840_sense_defconfig index 027dd93e73b286f..37b63403a6df608 100644 --- a/boards/seeed/xiao_ble/xiao_ble_nrf52840_sense_defconfig +++ b/boards/seeed/xiao_ble/xiao_ble_nrf52840_sense_defconfig @@ -15,12 +15,6 @@ CONFIG_SERIAL=y # Enable console CONFIG_CONSOLE=y -# Logger cannot use itself to log -CONFIG_USB_CDC_ACM_LOG_LEVEL_OFF=y - -# Enable USB -CONFIG_USB_DEVICE_STACK=y - # Build UF2 by default, supported by the Adafruit nRF52 Bootloader CONFIG_BUILD_OUTPUT_UF2=y CONFIG_USE_DT_CODE_PARTITION=y diff --git a/boards/seeed/xiao_esp32c3/Kconfig.xiao_esp32c3 b/boards/seeed/xiao_esp32c3/Kconfig.xiao_esp32c3 index e4db49fc4a6fdbf..7a31aa29252eb30 100644 --- a/boards/seeed/xiao_esp32c3/Kconfig.xiao_esp32c3 +++ b/boards/seeed/xiao_esp32c3/Kconfig.xiao_esp32c3 @@ -2,4 +2,4 @@ # SPDX-License-Identifier: Apache-2.0 config BOARD_XIAO_ESP32C3 - select SOC_ESP32C3_FX4 + select SOC_ESP32C3_FN4 diff --git a/boards/seeed/xiao_esp32c3/xiao_esp32c3.dts b/boards/seeed/xiao_esp32c3/xiao_esp32c3.dts index 5786e33c0ad68c3..606ec381f82c57e 100644 --- a/boards/seeed/xiao_esp32c3/xiao_esp32c3.dts +++ b/boards/seeed/xiao_esp32c3/xiao_esp32c3.dts @@ -16,7 +16,7 @@ compatible = "seeed,xiao-esp32c3"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &usb_serial; zephyr,shell-uart = &usb_serial; zephyr,flash = &flash0; diff --git a/boards/seeed/xiao_esp32c3/xiao_esp32c3.yaml b/boards/seeed/xiao_esp32c3/xiao_esp32c3.yaml index 1d762f6f2b216ba..bacf2a681bd8361 100644 --- a/boards/seeed/xiao_esp32c3/xiao_esp32c3.yaml +++ b/boards/seeed/xiao_esp32c3/xiao_esp32c3.yaml @@ -11,8 +11,4 @@ supported: - uart - watchdog - can -testing: - ignore_tags: - - net - - bluetooth vendor: seeed diff --git a/boards/seeed/xiao_esp32c6/Kconfig b/boards/seeed/xiao_esp32c6/Kconfig new file mode 100644 index 000000000000000..bc76c90de06962f --- /dev/null +++ b/boards/seeed/xiao_esp32c6/Kconfig @@ -0,0 +1,6 @@ +# Copyright (c) 2024 Mario Paja +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 4096 diff --git a/boards/seeed/xiao_esp32c6/Kconfig.sysbuild b/boards/seeed/xiao_esp32c6/Kconfig.sysbuild new file mode 100644 index 000000000000000..543becaa4f6ee6f --- /dev/null +++ b/boards/seeed/xiao_esp32c6/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2024 Mario Paja +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/seeed/xiao_esp32c6/Kconfig.xiao_esp32c6 b/boards/seeed/xiao_esp32c6/Kconfig.xiao_esp32c6 new file mode 100644 index 000000000000000..34fc9fe1b5ea083 --- /dev/null +++ b/boards/seeed/xiao_esp32c6/Kconfig.xiao_esp32c6 @@ -0,0 +1,7 @@ +# XIAO ESP32C6 board configuration + +# Copyright (c) 2024 Mario Paja +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_XIAO_ESP32C6 + select SOC_ESP32_C6_WROOM_1U_N4 diff --git a/boards/seeed/xiao_esp32c6/board.cmake b/boards/seeed/xiao_esp32c6/board.cmake new file mode 100644 index 000000000000000..2f04d1fe8861ea6 --- /dev/null +++ b/boards/seeed/xiao_esp32c6/board.cmake @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/seeed/xiao_esp32c6/board.yml b/boards/seeed/xiao_esp32c6/board.yml new file mode 100644 index 000000000000000..f7d65e65a435fea --- /dev/null +++ b/boards/seeed/xiao_esp32c6/board.yml @@ -0,0 +1,6 @@ +board: + name: xiao_esp32c6 + full_name: XIAO ESP32C6 + vendor: seeed + socs: + - name: esp32c6 diff --git a/boards/seeed/xiao_esp32c6/doc/img/xiao_esp32c6.webp b/boards/seeed/xiao_esp32c6/doc/img/xiao_esp32c6.webp new file mode 100644 index 000000000000000..739123ba9f5b58c Binary files /dev/null and b/boards/seeed/xiao_esp32c6/doc/img/xiao_esp32c6.webp differ diff --git a/boards/seeed/xiao_esp32c6/doc/img/xiao_esp32c6_pinout.webp b/boards/seeed/xiao_esp32c6/doc/img/xiao_esp32c6_pinout.webp new file mode 100644 index 000000000000000..3cc7232f27c4ccb Binary files /dev/null and b/boards/seeed/xiao_esp32c6/doc/img/xiao_esp32c6_pinout.webp differ diff --git a/boards/seeed/xiao_esp32c6/doc/index.rst b/boards/seeed/xiao_esp32c6/doc/index.rst new file mode 100644 index 000000000000000..5e6865c5b021943 --- /dev/null +++ b/boards/seeed/xiao_esp32c6/doc/index.rst @@ -0,0 +1,235 @@ +.. zephyr:board:: xiao_esp32c6 + +Overview +******** + +Seeed Studio XIAO ESP32C6 is powered by the highly-integrated ESP32-C6 SoC. +It consists of a high-performance (HP) 32-bit RISC-V processor, which can be clocked up to 160 MHz, +and a low-power (LP) 32-bit RISC-V processor, which can be clocked up to 20 MHz. +It has a 320KB ROM, a 512KB SRAM, and works with external flash. +This board integrates complete Wi-Fi, Bluetooth LE, Zigbee, and Thread functions. +For more information, check `Seeed Studio XIAO ESP32C6`_ . + +Hardware +******** + +This board is based on the ESP32-C6 with 4MB of flash, integrating 2.4 GHz Wi-Fi 6, +Bluetooth 5.3 (LE) and the 802.15.4 protocol. It has an USB-C port for programming +and debugging, integrated battery charging and an U.FL external antenna connector. +It is based on a standard XIAO 14 pin pinout. + +Supported Features +================== + +The Zephyr ``xiao_esp32c6`` board target supports the following hardware features: + ++------------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++============+============+=====================================+ +| UART | on-chip | serial port | ++------------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++------------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++------------+------------+-------------------------------------+ +| USB-JTAG | on-chip | hardware interface | ++------------+------------+-------------------------------------+ +| SPI Master | on-chip | spi | ++------------+------------+-------------------------------------+ +| I2C | on-chip | i2c | ++------------+------------+-------------------------------------+ +| Watchdog | on-chip | watchdog | ++------------+------------+-------------------------------------+ +| LEDC | on-chip | pwm | ++------------+------------+-------------------------------------+ +| SPI DMA | on-chip | spi | ++------------+------------+-------------------------------------+ +| GDMA | on-chip | dma | ++------------+------------+-------------------------------------+ +| TRNG | on-chip | entropy | ++------------+------------+-------------------------------------+ +| USB-CDC | on-chip | serial | ++------------+------------+-------------------------------------+ +| Wi-Fi | on-chip | | ++------------+------------+-------------------------------------+ + +The board uses a standard XIAO pinout, the default pin mapping is the following: + +.. figure:: img/xiao_esp32c6_pinout.webp + :align: center + :alt: XIAO ESP32C6 Pinout + + XIAO ESP32C6 Pinout + +System requirements +******************* + +Prerequisites +============= + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the EPS32 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: xiao_esp32c6 + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │   └── zephyr + │   ├── zephyr.elf + │   └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: xiao_esp32c6 + :goals: build + +The usual ``flash`` target will work with the ``xiao_esp32c6`` board +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: xiao_esp32c6 + :goals: flash + +Since the Zephyr console is by default on the ``usb_serial`` device, we use +the espressif monitor to view. + +.. code-block:: console + + $ west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! xiao_esp32c6/esp32c6 + +Debugging +********* + +As with much custom hardware, the ESP32-C6 modules require patches to +OpenOCD that are not upstreamed yet. Espressif maintains their own fork of +the project. The custom OpenOCD can be obtained at `OpenOCD ESP32`_. + +The Zephyr SDK uses a bundled version of OpenOCD by default. You can overwrite that behavior by adding the +``-DOPENOCD= -DOPENOCD_DEFAULT_PATH=`` +parameter when building. + +Here is an example for building the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: xiao_esp32c6 + :goals: build flash + :gen-args: -DOPENOCD= -DOPENOCD_DEFAULT_PATH= + +You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: xiao_esp32c6 + :goals: debug + +References +********** + +.. target-notes:: + +.. _`Seeed Studio XIAO ESP32C6`: https://wiki.seeedstudio.com/xiao_esp32c6_getting_started/ +.. _`ESP32-C6 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-c6_datasheet_en.pdf +.. _`ESP32-C6 Technical Reference Manual`: https://espressif.com/sites/default/files/documentation/esp32-c6_technical_reference_manual_en.pdf +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases diff --git a/boards/seeed/xiao_esp32c6/seeed_xiao_connector.dtsi b/boards/seeed/xiao_esp32c6/seeed_xiao_connector.dtsi new file mode 100644 index 000000000000000..cf4b71f87344f5e --- /dev/null +++ b/boards/seeed/xiao_esp32c6/seeed_xiao_connector.dtsi @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2024 Mario Paja + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + xiao_d: connector { + compatible = "seeed,xiao-gpio"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpio0 0 0>, /* D0 */ + <1 0 &gpio0 1 0>, /* D1 */ + <2 0 &gpio0 2 0>, /* D2 */ + <3 0 &gpio0 21 0>, /* D3 */ + <4 0 &gpio0 22 0>, /* D4 */ + <5 0 &gpio0 23 0>, /* D5 */ + <6 0 &gpio0 16 0>, /* D6 */ + <7 0 &gpio0 17 0>, /* D7 */ + <8 0 &gpio0 19 0>, /* D8 */ + <9 0 &gpio0 20 0>, /* D9 */ + <10 0 &gpio0 18 0>; /* D10 */ + }; +}; + +xiao_i2c: &i2c0 {}; +xiao_spi: &spi2 {}; +xiao_serial: &uart0 {}; diff --git a/boards/seeed/xiao_esp32c6/support/openocd.cfg b/boards/seeed/xiao_esp32c6/support/openocd.cfg new file mode 100644 index 000000000000000..d86a5517a4ca9f1 --- /dev/null +++ b/boards/seeed/xiao_esp32c6/support/openocd.cfg @@ -0,0 +1,4 @@ +# ESP32C6 has built-in JTAG interface over USB port in pins GPIO13/GPIO12 (D-/D+). +set ESP_RTOS none + +source [find board/esp32c6-builtin.cfg] diff --git a/boards/seeed/xiao_esp32c6/xiao_esp32c6-pinctrl.dtsi b/boards/seeed/xiao_esp32c6/xiao_esp32c6-pinctrl.dtsi new file mode 100644 index 000000000000000..424a405157850a8 --- /dev/null +++ b/boards/seeed/xiao_esp32c6/xiao_esp32c6-pinctrl.dtsi @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2024 Mario Paja + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + spim2_default: spim2_default { + group1 { + pinmux = , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; +}; diff --git a/boards/seeed/xiao_esp32c6/xiao_esp32c6.dts b/boards/seeed/xiao_esp32c6/xiao_esp32c6.dts new file mode 100644 index 000000000000000..d155f5aa20141b3 --- /dev/null +++ b/boards/seeed/xiao_esp32c6/xiao_esp32c6.dts @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2024 Mario Paja + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "xiao_esp32c6-pinctrl.dtsi" +#include +#include +#include "seeed_xiao_connector.dtsi" + +/ { + model = "Seeed XIAO ESP32C6"; + compatible = "seeed,xiao-esp32c6"; + + chosen { + zephyr,sram = &sramhp; + zephyr,console = &usb_serial; + zephyr,shell-uart = &usb_serial; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + }; + + leds: leds { + compatible = "gpio-leds"; + yellow_led: led_0 { + gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; + label = "User LED1"; + }; + }; + + aliases { + led0 = &yellow_led; + watchdog0 = &wdt0; + }; + +}; + +&trng0 { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&wdt0 { + status = "okay"; +}; + +&usb_serial { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; +}; + +&spi2 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim2_default>; + pinctrl-names = "default"; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; diff --git a/boards/seeed/xiao_esp32c6/xiao_esp32c6.yaml b/boards/seeed/xiao_esp32c6/xiao_esp32c6.yaml new file mode 100644 index 000000000000000..50a8f099a3e59a8 --- /dev/null +++ b/boards/seeed/xiao_esp32c6/xiao_esp32c6.yaml @@ -0,0 +1,18 @@ +identifier: xiao_esp32c6 +name: XIAO ESP32C6 +type: mcu +arch: riscv +toolchain: + - zephyr +supported: + - gpio + - watchdog + - uart + - dma + - spi + - entropy + - i2c +testing: + ignore_tags: + - tracing +vendor: seeed diff --git a/boards/seeed/xiao_esp32c6/xiao_esp32c6_defconfig b/boards/seeed/xiao_esp32c6/xiao_esp32c6_defconfig new file mode 100644 index 000000000000000..6539bd42e5947ec --- /dev/null +++ b/boards/seeed/xiao_esp32c6/xiao_esp32c6_defconfig @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_MAIN_STACK_SIZE=2048 +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y +CONFIG_GPIO=y diff --git a/boards/seeed/xiao_esp32s3/xiao_esp32s3_appcpu.dts b/boards/seeed/xiao_esp32s3/xiao_esp32s3_appcpu.dts index 851abb50b5ae52e..42962e9f0df9a39 100644 --- a/boards/seeed/xiao_esp32s3/xiao_esp32s3_appcpu.dts +++ b/boards/seeed/xiao_esp32s3/xiao_esp32s3_appcpu.dts @@ -13,7 +13,7 @@ compatible = "espressif,esp32s3"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; zephyr,flash = &flash0; diff --git a/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu.yaml b/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu.yaml index d438611cb33730b..dea06b25bb5d7fe 100644 --- a/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu.yaml +++ b/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu.yaml @@ -15,8 +15,4 @@ supported: - entropy - pwm - dma -testing: - ignore_tags: - - net - - bluetooth vendor: seeed diff --git a/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_common.dtsi b/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_common.dtsi index f8e4906f88c6b64..79860b2644701d2 100644 --- a/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_common.dtsi +++ b/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_common.dtsi @@ -12,7 +12,7 @@ / { chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &usb_serial; zephyr,shell-uart = &usb_serial; zephyr,flash = &flash0; diff --git a/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_sense.yaml b/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_sense.yaml index 91521bcd7d63392..f617abbb6978e07 100644 --- a/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_sense.yaml +++ b/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_sense.yaml @@ -15,8 +15,4 @@ supported: - entropy - pwm - dma -testing: - ignore_tags: - - net - - bluetooth vendor: seeed diff --git a/boards/seeed/xiao_rp2040/xiao_rp2040-pinctrl.dtsi b/boards/seeed/xiao_rp2040/xiao_rp2040-pinctrl.dtsi index 0e235884bf22c53..eb72fe503c00ee0 100644 --- a/boards/seeed/xiao_rp2040/xiao_rp2040-pinctrl.dtsi +++ b/boards/seeed/xiao_rp2040/xiao_rp2040-pinctrl.dtsi @@ -57,9 +57,6 @@ }; }; - clocks_default: clocks_default { - }; - ws2812_pio0_default: ws2812_pio0_default { ws2812 { pinmux = ; diff --git a/boards/seeed/xiao_rp2040/xiao_rp2040.dts b/boards/seeed/xiao_rp2040/xiao_rp2040.dts index 0a52f47d672d4e7..98a700f242f36aa 100644 --- a/boards/seeed/xiao_rp2040/xiao_rp2040.dts +++ b/boards/seeed/xiao_rp2040/xiao_rp2040.dts @@ -7,7 +7,7 @@ /dts-v1/; -#include +#include #include "xiao_rp2040-pinctrl.dtsi" #include "seeed_xiao_connector.dtsi" #include @@ -86,11 +86,6 @@ }; }; -&clocks { - pinctrl-0 = <&clocks_default>; - pinctrl-names = "default"; -}; - &timer { status = "okay"; }; @@ -172,3 +167,7 @@ zephyr_udc0: &usbd { regulator-always-on; regulator-allowed-modes = ; }; + +&xosc { + startup-delay-multiplier = <64>; +}; diff --git a/boards/shields/adafruit_aw9523/Kconfig.shield b/boards/shields/adafruit_aw9523/Kconfig.shield new file mode 100644 index 000000000000000..9d853a9c67edde7 --- /dev/null +++ b/boards/shields/adafruit_aw9523/Kconfig.shield @@ -0,0 +1,5 @@ +# Copyright (c) 2024 TOKITA Hiroshi +# SPDX-License-Identifier: Apache-2.0 + +config SHIELD_ADAFRUIT_AW9523 + def_bool $(shields_list_contains,adafruit_aw9523) diff --git a/boards/shields/adafruit_aw9523/adafruit_aw9523.overlay b/boards/shields/adafruit_aw9523/adafruit_aw9523.overlay new file mode 100644 index 000000000000000..1b3ea5550e35215 --- /dev/null +++ b/boards/shields/adafruit_aw9523/adafruit_aw9523.overlay @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2024 TOKITA Hiroshi + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&stemma_qt_i2c { + status = "okay"; + + adafruit_aw9523: aw9523b@58 { + status = "okay"; + reg = <0x58>; + compatible = "awinic,aw9523b"; + + adafruit_aw9523_gpio: aw9523b-gpio { + status = "okay"; + compatible = "awinic,aw9523b-gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + }; +}; diff --git a/boards/shields/adafruit_aw9523/doc/adafruit_aw9523.webp b/boards/shields/adafruit_aw9523/doc/adafruit_aw9523.webp new file mode 100644 index 000000000000000..7a3cf48fda934e1 Binary files /dev/null and b/boards/shields/adafruit_aw9523/doc/adafruit_aw9523.webp differ diff --git a/boards/shields/adafruit_aw9523/doc/index.rst b/boards/shields/adafruit_aw9523/doc/index.rst new file mode 100644 index 000000000000000..5f27d89f002b305 --- /dev/null +++ b/boards/shields/adafruit_aw9523/doc/index.rst @@ -0,0 +1,49 @@ +.. _adafruit_aw9523: + +Adafruit AW9523 GPIO Expander and LED Driver +############################################ + +Overview +******** + +The `Adafruit AW9523 GPIO Expander and LED Driver`_ provides +16-channel GPIO/LED controller function. + +.. figure:: adafruit_aw9523.webp + :align: center + :alt: Adafruit AW9523 + + Adafruit AW9523 (Credit: Adafruit) + +Pin Assignments +=============== + ++--------------------------+------------------------------------------+ +| Shield Pin | Function | ++==========================+==========================================+ +| SDA | AW9523B I2C SDA | ++--------------------------+------------------------------------------+ +| SCL | AW9523B I2C SCL | ++--------------------------+------------------------------------------+ +| INT (Pad on board) | AW9523B Interrupt output [1]_ | ++--------------------------+------------------------------------------+ +| RST (Pad on board) | AW9523B Reset pin [2]_ | ++--------------------------+------------------------------------------+ + +.. [1] To receive interrupts, connect the INT pin to the SoC's GPIO and set the connected + GPIO in the ``int-gpios`` property in an additional overlay. The INT terminal must be + pulled up. + +.. [2] If you want to control the reset pin from the SoC, connect it to a GPIO on the SoC + and define the ``reset-gpios`` property in an additional overlay. + +Programming +*********** + +Set ``--shield adafruit_aw9523`` when you invoke ``west build``. + +.. _Adafruit AW9523 GPIO Expander and LED Driver: + https://learn.adafruit.com/adafruit-aw9523-gpio-expander-and-led-driver + +.. _Awinic AW9523B 16 MULTI-FUNCTION LED DRIVER AND GPIO CONTROLLER WITH I2C INTERFACE: + https://doc.awinic.com/doc/202403/deffbf3b-7e7b-4ff6-8e91-fd85e2d845d5.pdf diff --git a/boards/shields/lcd_par_s035/boards/rd_rw612_bga.overlay b/boards/shields/lcd_par_s035/boards/rd_rw612_bga.overlay index 3633336931089b7..d8d217460b4211b 100644 --- a/boards/shields/lcd_par_s035/boards/rd_rw612_bga.overlay +++ b/boards/shields/lcd_par_s035/boards/rd_rw612_bga.overlay @@ -84,6 +84,8 @@ * software */ rgb-is-inverted; + /* Enable TE synchronization, using the rising edge */ + te-mode = "MIPI_DBI_TE_RISING_EDGE"; }; &lcdic { @@ -94,4 +96,6 @@ nxp,write-inactive-cycles = <1>; /* Raise the timer0 ratio to enable longer reset delay */ nxp,timer0-ratio = <15>; + /* Lower timer1 ratio to enable shorter TE delay */ + nxp,timer1-ratio = <0>; }; diff --git a/boards/shields/mikroe_ble_tiny_click/Kconfig.defconfig b/boards/shields/mikroe_ble_tiny_click/Kconfig.defconfig index db63d94f3c5ab05..d6711f118741dfd 100644 --- a/boards/shields/mikroe_ble_tiny_click/Kconfig.defconfig +++ b/boards/shields/mikroe_ble_tiny_click/Kconfig.defconfig @@ -3,4 +3,4 @@ CONFIG_BT_HCI=y CONFIG_BT_HCI_ACL_FLOW_CONTROL=n -CONFIG_BT_CTLR=n +CONFIG_BT_LL_SW_SPLIT=n diff --git a/boards/shields/mikroe_ble_tiny_click/mikroe_ble_tiny_click.overlay b/boards/shields/mikroe_ble_tiny_click/mikroe_ble_tiny_click.overlay index 6f3e7b53f428148..4dedd179a9823ef 100644 --- a/boards/shields/mikroe_ble_tiny_click/mikroe_ble_tiny_click.overlay +++ b/boards/shields/mikroe_ble_tiny_click/mikroe_ble_tiny_click.overlay @@ -15,5 +15,12 @@ bt_hci_uart: bt_hci_uart { compatible = "zephyr,bt-hci-uart"; + status = "okay"; + + da1453x { + compatible = "renesas,bt-hci-da1453x"; + reset-gpios = <&mikrobus_header 1 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; }; }; diff --git a/boards/shields/mikroe_eth3_click/Kconfig.defconfig b/boards/shields/mikroe_eth3_click/Kconfig.defconfig new file mode 100644 index 000000000000000..970f0fc910ac2a3 --- /dev/null +++ b/boards/shields/mikroe_eth3_click/Kconfig.defconfig @@ -0,0 +1,14 @@ +# Copyright (c) 2024 Mario Paja +# SPDX-License-Identifier: Apache-2.0 + +if SHIELD_MIKROE_ETH3_CLICK + +if NETWORKING + +# LAN9250 is L2 chip slave on SPI +config NET_L2_ETHERNET + default y + +endif # NETWORKING + +endif # SHIELD_MIKROE_ETH3_CLICK diff --git a/boards/shields/mikroe_eth3_click/Kconfig.shield b/boards/shields/mikroe_eth3_click/Kconfig.shield new file mode 100644 index 000000000000000..56f8d6893aaf41b --- /dev/null +++ b/boards/shields/mikroe_eth3_click/Kconfig.shield @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Mario Paja +# SPDX-License-Identifier: Apache-2.0 + +config SHIELD_MIKROE_ETH3_CLICK + def_bool $(shields_list_contains,mikroe_eth3_click) diff --git a/boards/shields/mikroe_eth3_click/doc/eth3_click.webp b/boards/shields/mikroe_eth3_click/doc/eth3_click.webp new file mode 100644 index 000000000000000..243ec81fec333de Binary files /dev/null and b/boards/shields/mikroe_eth3_click/doc/eth3_click.webp differ diff --git a/boards/shields/mikroe_eth3_click/doc/index.rst b/boards/shields/mikroe_eth3_click/doc/index.rst new file mode 100644 index 000000000000000..10f9669762fbcb8 --- /dev/null +++ b/boards/shields/mikroe_eth3_click/doc/index.rst @@ -0,0 +1,67 @@ +.. _mikroe_eth3_click: + +MikroElektronika ETH 3 Click +############################ + +Overview +******** + +ETH 3 Click is an accessory board in mikroBus™ form factor. It features `LAN9250`_, +a 10/100Mbps BASE-T stand alone Ethernet Controller with an on-board MAC & PHY, +16Kbyte FIFO Buffer and SPI serial interface. +More information at `ETH 3 Click Shield website`_. + +.. figure:: eth3_click.webp + :align: center + :alt: MikroElektronika ETH 3 Click + + MikroElektronika ETH 3 Click (Credit: MikroElektronika) + +Pins Assignment of the Eth Click Shield +======================================= + ++-----------------------+---------------------------------------------+ +| Shield Connector Pin | Function | ++=======================+=============================================+ +| RST# | Ethernet Controller's Reset | ++-----------------------+---------------------------------------------+ +| CS# | SPI's Chip Select | ++-----------------------+---------------------------------------------+ +| SCK | SPI's ClocK | ++-----------------------+---------------------------------------------+ +| SDO | SPI's Slave Data Output (MISO) | ++-----------------------+---------------------------------------------+ +| SDI | SPI's Slave Data Input (MISO) | ++-----------------------+---------------------------------------------+ +| INT | Ethernet Controller's Interrupt Output | ++-----------------------+---------------------------------------------+ + + +Requirements +************ + +This shield can only be used with a board which provides a configuration +for Mikro-BUS connectors and defines node aliases for SPI and GPIO interfaces +(see :ref:`shields` for more details). + +Programming +*********** + +Set ``--shield mikroe_eth3_click`` when you invoke ``west build``. For example: + +.. zephyr-app-commands:: + :zephyr-app: samples/net/dhcpv4_client + :board: mikroe_stm32_m4_clicker + :shield: mikroe_eth3_click + :goals: build + +References +********** + +.. target-notes:: + +.. _ETH 3 Click Shield website: + https://www.mikroe.com/eth-3-click + +.. _LAN9250: + https://www.microchip.com/en-us/product/lan9250 diff --git a/boards/shields/mikroe_eth3_click/mikroe_eth3_click.overlay b/boards/shields/mikroe_eth3_click/mikroe_eth3_click.overlay new file mode 100644 index 000000000000000..6c1bc35cf836905 --- /dev/null +++ b/boards/shields/mikroe_eth3_click/mikroe_eth3_click.overlay @@ -0,0 +1,15 @@ +/* Copyright (c) 2024 Mario Paja + * SPDX-License-Identifier: Apache-2.0 + */ + +&mikrobus_spi { + status = "okay"; + + eth3_click_mikroe_eth3_click: eth3_click@0 { + compatible = "microchip,lan9250"; + reg = <0x0>; + local-mac-address = [00 00 00 01 02 03]; + spi-max-frequency = <30000000>; + int-gpios = <&mikrobus_header 7 GPIO_ACTIVE_LOW>; /* INT */ + }; +}; diff --git a/boards/shields/mikroe_weather_click/Kconfig.shield b/boards/shields/mikroe_weather_click/Kconfig.shield index 9c73ce779a27fec..be548a7ce8c2f58 100644 --- a/boards/shields/mikroe_weather_click/Kconfig.shield +++ b/boards/shields/mikroe_weather_click/Kconfig.shield @@ -1,5 +1,8 @@ # Copyright (c) 2024 Common Ground Electronics # SPDX-License-Identifier: Apache-2.0 -config SHIELD_MIKROE_WEATHER_CLICK - def_bool $(shields_list_contains,mikroe_weather_click) +config SHIELD_MIKROE_WEATHER_CLICK_I2C + def_bool $(shields_list_contains,mikroe_weather_click_i2c) + +config SHIELD_MIKROE_WEATHER_CLICK_SPI + def_bool $(shields_list_contains,mikroe_weather_click_spi) diff --git a/boards/shields/mikroe_weather_click/doc/index.rst b/boards/shields/mikroe_weather_click/doc/index.rst index 3042ff87521a334..80143d80117f5f4 100644 --- a/boards/shields/mikroe_weather_click/doc/index.rst +++ b/boards/shields/mikroe_weather_click/doc/index.rst @@ -21,8 +21,15 @@ Requirements This shield can only be used with a board that provides a mikroBUS |trade| socket and defines a ``mikrobus_i2c`` node label for the mikroBUS |trade| I2C +interface or a ``mikrobus_spi`` node label for the mikroBUS |trade| SPI interface (see :ref:`shields` for more details). +.. note:: + + By default the Weather Click is configured to use the I2C interface. In + order to use the SPI interface the jumper settings must be changed. See + the `Weather Click Schematic`_ for further details. + For more information about the BME280 and the Weather Click, see the following documentation: @@ -34,13 +41,14 @@ documentation: Programming *********** -Set ``--shield mikroe_weather_click`` when you invoke ``west build``. For +Set ``--shield mikroe_weather_click_i2c`` or +``--shield mikroe_weather_click_spi`` when you invoke ``west build``. For example: .. zephyr-app-commands:: :zephyr-app: samples/sensor/bme280 :board: lpcxpresso55s16 - :shield: mikroe_weather_click + :shield: [mikroe_weather_click_i2c | mikroe_weather_click_spi] :goals: build .. _Weather Click: diff --git a/boards/shields/mikroe_weather_click/mikroe_weather_click.overlay b/boards/shields/mikroe_weather_click/mikroe_weather_click_i2c.overlay similarity index 100% rename from boards/shields/mikroe_weather_click/mikroe_weather_click.overlay rename to boards/shields/mikroe_weather_click/mikroe_weather_click_i2c.overlay diff --git a/boards/shields/mikroe_weather_click/mikroe_weather_click_spi.overlay b/boards/shields/mikroe_weather_click/mikroe_weather_click_spi.overlay new file mode 100644 index 000000000000000..7cf667244f4a5ef --- /dev/null +++ b/boards/shields/mikroe_weather_click/mikroe_weather_click_spi.overlay @@ -0,0 +1,17 @@ +/* + * Copyright (c) 2024 Ian Morris + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&mikrobus_spi { + status = "okay"; + cs-gpios = <&mikrobus_header 2 GPIO_ACTIVE_LOW>; + + bme280_mikroe_weather_click: bme280@0 { + status = "okay"; + compatible = "bosch,bme280"; + spi-max-frequency = <1000000>; + reg = <0>; + }; +}; diff --git a/boards/shields/nrf7002eb/boards/nrf54h20dk_nrf54h20_cpuapp.overlay b/boards/shields/nrf7002eb/boards/nrf54h20dk_nrf54h20_cpuapp.overlay new file mode 100644 index 000000000000000..89e3d5c4c9a27cc --- /dev/null +++ b/boards/shields/nrf7002eb/boards/nrf54h20dk_nrf54h20_cpuapp.overlay @@ -0,0 +1,13 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* Only GPIOs 1..11 are supported for PORT1 in nRF54H20DK board, for now + * remove this as Wi-Fi SR co-existence is not yet supported on this board. + * The external SR RF switch may not even be present on this board. + */ +&nrf70 { + /delete-property/ srrf-switch-gpios; +}; diff --git a/boards/shields/p3t1755dp_ard_i2c/Kconfig.shield b/boards/shields/p3t1755dp_ard_i2c/Kconfig.shield new file mode 100644 index 000000000000000..0cdc75a34bebbfe --- /dev/null +++ b/boards/shields/p3t1755dp_ard_i2c/Kconfig.shield @@ -0,0 +1,8 @@ +# +# Copyright 2024 NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +config SHIELD_P3T1755DP_ARD_I3C + def_bool $(shields_list_contains,p3t1755dp_ard_i3c) diff --git a/boards/shields/p3t1755dp_ard_i2c/boards/mimxrt1180_evk_mimxrt1189_cm33.overlay b/boards/shields/p3t1755dp_ard_i2c/boards/mimxrt1180_evk_mimxrt1189_cm33.overlay new file mode 100644 index 000000000000000..5a997072e24711c --- /dev/null +++ b/boards/shields/p3t1755dp_ard_i2c/boards/mimxrt1180_evk_mimxrt1189_cm33.overlay @@ -0,0 +1,14 @@ +/* + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&i3c2 { + status = "disabled"; +}; + +&lpi2c2 { + status = "okay"; + clock-frequency = ; +}; diff --git a/boards/shields/p3t1755dp_ard_i2c/boards/mimxrt1180_evk_mimxrt1189_cm7.overlay b/boards/shields/p3t1755dp_ard_i2c/boards/mimxrt1180_evk_mimxrt1189_cm7.overlay new file mode 100644 index 000000000000000..5a997072e24711c --- /dev/null +++ b/boards/shields/p3t1755dp_ard_i2c/boards/mimxrt1180_evk_mimxrt1189_cm7.overlay @@ -0,0 +1,14 @@ +/* + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&i3c2 { + status = "disabled"; +}; + +&lpi2c2 { + status = "okay"; + clock-frequency = ; +}; diff --git a/boards/shields/p3t1755dp_ard_i2c/doc/index.rst b/boards/shields/p3t1755dp_ard_i2c/doc/index.rst new file mode 100644 index 000000000000000..866ecfd6dd5f3b3 --- /dev/null +++ b/boards/shields/p3t1755dp_ard_i2c/doc/index.rst @@ -0,0 +1,59 @@ +.. _p3t1755dp_ard_i2c_shield: + +P3T1755DP Arduino® Shield Evaluation Board +########################################## + +Overview +******** + +P3T1755DP is a ±0.5 °C accurate temperature-to-digital converter +with a -40 °C to 125 °C range. + +.. figure:: p3t1755dp_ard.webp + :align: center + :alt: P3T1755DP ARD + +Requirements +************ + +The temperature register always stores a 12 bit two's complement data, +giving a temperature resolution of 0.0625 °C. P3T1755DP can be configured +for different operation conditions: continuous conversion, one-shot mode +or shutdown mode. The device supports 2-wire serial I3C (up to 12.5 MHz) +and I²C (up to 3.4 MHz) as communication interface. + +For more information about P3T1755DP-ARD see these NXP documents: + +- `Getting Started with the P3T1755DP-ARD Evaluation Board`_ +- `P3T1755DP-ARD Evaluation Board User Manual`_ + +Hardware Connection +******************* +- Shield board p3t1755dp_ard in I3C mode + J10, J11, J12 3-5, the i3c addr is 0x4800000236152a0090 + JP2, Jp3 1-2 + I3C is from J13 + The VDD from arduino is 3v3 JP1 2-3 + +- Shield board p3t1755dp_ard in I2C mode + J10, J11, J12 3-5, the i2c addr is 0x48 + JP2, Jp3 2-3 + The I2C is from Arduino J5 pin9(SCL_ARD) pin10(SDA_ARD) + The VDD from arduino is 3v3 JP1 2-3 + +Programming +*********** + +Set ``--shield p3t1755dp_ard_i3c`` when you invoke ``west build``. For example: + +.. zephyr-app-commands:: + :zephyr-app: samples/sensor/thermometer + :board: mimxrt1180_evk/mimxrt1189/cm33 + :shield: p3t1755dp_ard_i3c + :goals: build + +.. _Getting Started with the P3T1755DP-ARD Evaluation Board: + https://www.nxp.com/document/guide/getting-started-with-the-p3t1755dp-ard-evaluation-board:GS-P3T1755DP-ARD + +.. _P3T1755DP-ARD Evaluation Board User Manual: + https://www.nxp.com/docs/en/user-manual/UM11834.pdf diff --git a/boards/shields/p3t1755dp_ard_i2c/doc/p3t1755dp_ard.webp b/boards/shields/p3t1755dp_ard_i2c/doc/p3t1755dp_ard.webp new file mode 100644 index 000000000000000..3c8dd30c617d064 Binary files /dev/null and b/boards/shields/p3t1755dp_ard_i2c/doc/p3t1755dp_ard.webp differ diff --git a/boards/shields/p3t1755dp_ard_i2c/p3t1755dp_ard_i2c.overlay b/boards/shields/p3t1755dp_ard_i2c/p3t1755dp_ard_i2c.overlay new file mode 100644 index 000000000000000..b4f74314dd994ba --- /dev/null +++ b/boards/shields/p3t1755dp_ard_i2c/p3t1755dp_ard_i2c.overlay @@ -0,0 +1,21 @@ +/* + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + aliases { + ambient-temp0 = &p3t1755_i2c; + }; +}; + +&p3t1755dp_ard_i2c_interface { + status = "okay"; + p3t1755_i2c: p3t1755@48 { + compatible = "nxp,p3t1755"; + reg = <0x48>; + oneshot-mode; + status = "okay"; + }; +}; diff --git a/boards/shields/p3t1755dp_ard_i3c/Kconfig.shield b/boards/shields/p3t1755dp_ard_i3c/Kconfig.shield new file mode 100644 index 000000000000000..0cdc75a34bebbfe --- /dev/null +++ b/boards/shields/p3t1755dp_ard_i3c/Kconfig.shield @@ -0,0 +1,8 @@ +# +# Copyright 2024 NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +config SHIELD_P3T1755DP_ARD_I3C + def_bool $(shields_list_contains,p3t1755dp_ard_i3c) diff --git a/boards/shields/p3t1755dp_ard_i3c/boards/mimxrt1180_evk_mimxrt1189_cm33.overlay b/boards/shields/p3t1755dp_ard_i3c/boards/mimxrt1180_evk_mimxrt1189_cm33.overlay new file mode 100644 index 000000000000000..a0e26da50f425da --- /dev/null +++ b/boards/shields/p3t1755dp_ard_i3c/boards/mimxrt1180_evk_mimxrt1189_cm33.overlay @@ -0,0 +1,27 @@ +/* + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* + * The p3t1755 shield board is plugged into the arduino interface on + * the MIMXRT1180-EVK board, and the J13 on the shield board is connected + * to the J50 on the RT1180 referred below. + * J13-1 -> J50-1; J13-2 -> J50-2; + * J13-3 -> J50-3; J13-4 -> J50-4; + */ + +#include + +&lpi2c2 { + status = "disabled"; +}; + +&i3c2 { + status = "okay"; + + i2c-scl-hz = ; + i3c-scl-hz = ; + i3c-od-scl-hz = ; +}; diff --git a/boards/shields/p3t1755dp_ard_i3c/boards/mimxrt1180_evk_mimxrt1189_cm7.overlay b/boards/shields/p3t1755dp_ard_i3c/boards/mimxrt1180_evk_mimxrt1189_cm7.overlay new file mode 100644 index 000000000000000..a0e26da50f425da --- /dev/null +++ b/boards/shields/p3t1755dp_ard_i3c/boards/mimxrt1180_evk_mimxrt1189_cm7.overlay @@ -0,0 +1,27 @@ +/* + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* + * The p3t1755 shield board is plugged into the arduino interface on + * the MIMXRT1180-EVK board, and the J13 on the shield board is connected + * to the J50 on the RT1180 referred below. + * J13-1 -> J50-1; J13-2 -> J50-2; + * J13-3 -> J50-3; J13-4 -> J50-4; + */ + +#include + +&lpi2c2 { + status = "disabled"; +}; + +&i3c2 { + status = "okay"; + + i2c-scl-hz = ; + i3c-scl-hz = ; + i3c-od-scl-hz = ; +}; diff --git a/boards/shields/p3t1755dp_ard_i3c/doc/index.rst b/boards/shields/p3t1755dp_ard_i3c/doc/index.rst new file mode 100644 index 000000000000000..ff76ea334109f96 --- /dev/null +++ b/boards/shields/p3t1755dp_ard_i3c/doc/index.rst @@ -0,0 +1,59 @@ +.. _p3t1755dp_ard_i3c_shield: + +P3T1755DP Arduino® Shield Evaluation Board +########################################## + +Overview +******** + +P3T1755DP is a ±0.5 °C accurate temperature-to-digital converter +with a -40 °C to 125 °C range. + +.. figure:: p3t1755dp_ard.webp + :align: center + :alt: P3T1755DP ARD + +Requirements +************ + +The temperature register always stores a 12 bit two's complement data, +giving a temperature resolution of 0.0625 °C. P3T1755DP can be configured +for different operation conditions: continuous conversion, one-shot mode +or shutdown mode. The device supports 2-wire serial I3C (up to 12.5 MHz) +and I²C (up to 3.4 MHz) as communication interface. + +For more information about P3T1755DP-ARD see these NXP documents: + +- `Getting Started with the P3T1755DP-ARD Evaluation Board`_ +- `P3T1755DP-ARD Evaluation Board User Manual`_ + +Hardware Connection +******************* +- Shield board p3t1755dp_ard in I3C mode + J10, J11, J12 3-5, the i3c addr is 0x4800000236152a0090 + JP2, Jp3 1-2 + I3C is from J13 + The VDD from arduino is 3v3 JP1 2-3 + +- Shield board p3t1755dp_ard in I2C mode + J10, J11, J12 3-5, the i2c addr is 0x48 + JP2, Jp3 2-3 + The I2C is from Arduino J5 pin9(SCL_ARD) pin10(SDA_ARD) + The VDD from arduino is 3v3 JP1 2-3 + +Programming +*********** + +Set ``--shield p3t1755dp_ard_i3c`` when you invoke ``west build``. For example: + +.. zephyr-app-commands:: + :zephyr-app: samples/sensor/thermometer + :board: mimxrt1180_evk/mimxrt1189/cm33 + :shield: p3t1755dp_ard_i3c + :goals: build + +.. _Getting Started with the P3T1755DP-ARD Evaluation Board: + https://www.nxp.com/document/guide/getting-started-with-the-p3t1755dp-ard-evaluation-board:GS-P3T1755DP-ARD + +.. _P3T1755DP-ARD Evaluation Board User Manual: + https://www.nxp.com/docs/en/user-manual/UM11834.pdf diff --git a/boards/shields/p3t1755dp_ard_i3c/doc/p3t1755dp_ard.webp b/boards/shields/p3t1755dp_ard_i3c/doc/p3t1755dp_ard.webp new file mode 100644 index 000000000000000..3c8dd30c617d064 Binary files /dev/null and b/boards/shields/p3t1755dp_ard_i3c/doc/p3t1755dp_ard.webp differ diff --git a/boards/shields/p3t1755dp_ard_i3c/p3t1755dp_ard_i3c.overlay b/boards/shields/p3t1755dp_ard_i3c/p3t1755dp_ard_i3c.overlay new file mode 100644 index 000000000000000..572368f9523875e --- /dev/null +++ b/boards/shields/p3t1755dp_ard_i3c/p3t1755dp_ard_i3c.overlay @@ -0,0 +1,20 @@ +/* + * Copyright 2024 NXP + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + aliases { + ambient-temp0 = &p3t1755_i3c; + }; +}; + +&p3t1755dp_ard_i3c_interface { + status = "okay"; + p3t1755_i3c: p3t1755@4800000236152a0090 { + compatible = "nxp,p3t1755"; + reg = <0x48 0x0236 0x152a0090>; + status = "okay"; + }; +}; diff --git a/boards/shields/pmod_sd/Kconfig.shield b/boards/shields/pmod_sd/Kconfig.shield new file mode 100644 index 000000000000000..8da50ac822494fb --- /dev/null +++ b/boards/shields/pmod_sd/Kconfig.shield @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +config SHIELD_PMOD_SD + def_bool $(shields_list_contains,pmod_sd) diff --git a/boards/shields/pmod_sd/boards/ek_ra8d1.overlay b/boards/shields/pmod_sd/boards/ek_ra8d1.overlay new file mode 100644 index 000000000000000..65f155cf28da3db --- /dev/null +++ b/boards/shields/pmod_sd/boards/ek_ra8d1.overlay @@ -0,0 +1,10 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * SPDX-License-Identifier: Apache-2.0 + */ + +&pmod_sd_shield { + interrupt-names = "accs", "card", "dma-req"; + interrupts = <60 12>, <61 12>, <62 12>; + pinctrl-0 = <&sdhc1_default>; +}; diff --git a/boards/shields/pmod_sd/doc/index.rst b/boards/shields/pmod_sd/doc/index.rst new file mode 100644 index 000000000000000..eaf051f4c080383 --- /dev/null +++ b/boards/shields/pmod_sd/doc/index.rst @@ -0,0 +1,54 @@ +.. _pmod_sd: + +Digilent Pmod SD +################ + +Overview +******** + +The Digilent Pmod SD (Revision B) allows system boards to read from and write to SD cards. + +Features +******** + +- Full-sized SD card slot +- Store and access large amounts of date from your system board +- No limitation on file system or memory size of SD card used +- 1-bit and 4-bit communication +- 12-pin Pmod port with SPI interface + +Programming +*********** + +Set ``--shield pmod_sd`` when you invoke ``west build``. For example: + +.. zephyr-app-commands:: + :zephyr-app: tests/drivers/disk/disk_access + :board: ek_ra8m1 + :shield: pmod_sd + :goals: build + +Pinout +====== + +.. figure:: pmod_sd_pins.webp + :align: center + :alt: PMOD SD Pinout + + PMOD SD Pinout (Credit: Digilent) + +References +********** + +- `Pmod SD product page`_ +- `Pmod SD reference manual`_ +- `Pmod SD schematic`_ + +.. _Pmod SD product page: + https://digilent.com/shop/pmod-sd-full-sized-sd-card-slot/ + +.. _Pmod SD reference manual: + https://digilent.com/reference/pmod/pmodsd/reference-manual + +.. _Pmod SD schematic: + https://digilent.com/reference/_media/reference/pmod/pmodsd/pmodsd_sch.pdf diff --git a/boards/shields/pmod_sd/doc/pmod_sd_pins.webp b/boards/shields/pmod_sd/doc/pmod_sd_pins.webp new file mode 100644 index 000000000000000..3be8baedb1e00e7 Binary files /dev/null and b/boards/shields/pmod_sd/doc/pmod_sd_pins.webp differ diff --git a/boards/shields/pmod_sd/pmod_sd.overlay b/boards/shields/pmod_sd/pmod_sd.overlay new file mode 100644 index 000000000000000..6bf8d7675c04f73 --- /dev/null +++ b/boards/shields/pmod_sd/pmod_sd.overlay @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + aliases { + sdhc0 = &pmod_sd_shield; + }; +}; + +&pmod_sd_shield { + pinctrl-0 = <&sdhc0_default>; + pinctrl-names = "default"; + status = "okay"; + sdmmc { + compatible = "zephyr,sdmmc-disk"; + disk-name = "SD"; + status = "okay"; + }; +}; diff --git a/boards/shields/renesas_us159_da14531evz/Kconfig.shield b/boards/shields/renesas_us159_da14531evz/Kconfig.shield new file mode 100644 index 000000000000000..85cea91bb85c7e7 --- /dev/null +++ b/boards/shields/renesas_us159_da14531evz/Kconfig.shield @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +config SHIELD_RENESAS_US159_DA14531EVZ + def_bool $(shields_list_contains,renesas_us159_da14531evz) diff --git a/boards/shields/renesas_us159_da14531evz/boards/ek_ra8m1.overlay b/boards/shields/renesas_us159_da14531evz/boards/ek_ra8m1.overlay new file mode 100644 index 000000000000000..d17555e4f79180e --- /dev/null +++ b/boards/shields/renesas_us159_da14531evz/boards/ek_ra8m1.overlay @@ -0,0 +1,32 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&pinctrl { + sci0_default: sci0_default { + group1 { + /* tx */ + psels = ; + drive-strength = "medium"; + }; + group2 { + /* rx, rts, cts */ + psels = , + , + ; + }; + }; +}; + +&sci0 { + pinctrl-0 = <&sci0_default>; + pinctrl-names = "default"; + status = "okay"; + uart0: uart { + current-speed = <115200>; + hw-flow-control; + status = "okay"; + }; +}; diff --git a/boards/shields/renesas_us159_da14531evz/doc/da14531-hci-hw-flow-binary.webp b/boards/shields/renesas_us159_da14531evz/doc/da14531-hci-hw-flow-binary.webp new file mode 100644 index 000000000000000..0bbf13356523947 Binary files /dev/null and b/boards/shields/renesas_us159_da14531evz/doc/da14531-hci-hw-flow-binary.webp differ diff --git a/boards/shields/renesas_us159_da14531evz/doc/index.rst b/boards/shields/renesas_us159_da14531evz/doc/index.rst new file mode 100644 index 000000000000000..1b302e4ac149dd4 --- /dev/null +++ b/boards/shields/renesas_us159_da14531evz/doc/index.rst @@ -0,0 +1,79 @@ +.. _renesas_us159_da14531evz_shield: + +Renesas DA14531 Pmod Board +########################## + +Overview +******** + +The Renesas US159 DA14531EVZ carries a `DA14531MOD`_ Bluetooth LE module +in a `Digilent Pmod`_ |trade| form factor. + +.. figure:: us159-da14531evz-pmod.webp + :align: center + :alt: Renesas US159 DA14531EVZ Pmod + + Renesas US159 DA14531EVZ Pmod (Credit: Renesas Electronics) + +Requirements +************ + +This shield can only be used with a board that provides a Pmod |trade| +socket and defines the ``pmod_serial`` node label (see :ref:`shields` for +more details). + +The DA14531 Module contained on the shield must be programmed with a binary +file that supports the HCI interface over UART, with hardware flow control +enabled. + +The `Renesas SmartBond Flash Programmer`_ tool can be used to download a +suitable binary and then program it into the DA14531 via the SWD header +present on the Pmod board. Once the tool has been installed, open it and +press the "Search Online" button. The required binary file can be selected +for download as follows: + +.. figure:: da14531-hci-hw-flow-binary.webp + :align: center + :alt: DA14531 HCI Binary File Selection + + Selecting the DA14531 HCI Binary File for Download + +Press the "Program" button to program the binary file into the DA14531 Module. + +For more information about interfacing to the DA14531 and the US159 DA14531EVZ +Pmod, see the following documentation: + +- `DA14531MOD Datasheet`_ +- `US159 DA14531EVZ Pmod`_ + +Programming +*********** + +Set ``--shield renesas_us159_da14531evz`` when you invoke ``west build``. For +example: + +.. zephyr-app-commands:: + :zephyr-app: samples/bluetooth/beacon + :board: ek_ra8m1 + :shield: renesas_us159_da14531evz + :goals: build + +References +********** + +.. target-notes:: + +.. _DA14531MOD: + https://www.renesas.com/us/en/products/wireless-connectivity/bluetooth-low-energy/da14531mod-smartbond-tiny-bluetooth-low-energy-module + +.. _Digilent Pmod: + https://digilent.com/reference/pmod/start + +.. _Renesas SmartBond Flash Programmer: + https://www.renesas.com/us/en/software-tool/smartbond-flash-programmer + +.. _DA14531MOD Datasheet: + https://www.renesas.com/us/en/document/dst/da14531-module-datasheet?r=1601921 + +.. _US159 DA14531EVZ Pmod: + https://www.renesas.com/en/products/wireless-connectivity/bluetooth-low-energy/us159-da14531evz-low-power-bluetooth-pmod-board-renesas-quickconnect-iot diff --git a/boards/shields/renesas_us159_da14531evz/doc/us159-da14531evz-pmod.webp b/boards/shields/renesas_us159_da14531evz/doc/us159-da14531evz-pmod.webp new file mode 100644 index 000000000000000..cb3cb2f42d6955a Binary files /dev/null and b/boards/shields/renesas_us159_da14531evz/doc/us159-da14531evz-pmod.webp differ diff --git a/boards/shields/renesas_us159_da14531evz/renesas_us159_da14531evz.overlay b/boards/shields/renesas_us159_da14531evz/renesas_us159_da14531evz.overlay new file mode 100644 index 000000000000000..e943e75dc036528 --- /dev/null +++ b/boards/shields/renesas_us159_da14531evz/renesas_us159_da14531evz.overlay @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + chosen { + zephyr,bt-hci = &bt_hci_uart; + }; +}; + +&pmod_serial { + status = "okay"; + + bt_hci_uart: bt_hci_uart { + compatible = "zephyr,bt-hci-uart"; + status = "okay"; + + da1453x { + compatible = "renesas,bt-hci-da1453x"; + status = "okay"; + reset-gpios = <&pmod_header 5 GPIO_ACTIVE_LOW>; + }; + }; +}; diff --git a/boards/shields/rtkmipilcdb00000be/Kconfig.defconfig b/boards/shields/rtkmipilcdb00000be/Kconfig.defconfig new file mode 100644 index 000000000000000..749284f97fb65dc --- /dev/null +++ b/boards/shields/rtkmipilcdb00000be/Kconfig.defconfig @@ -0,0 +1,57 @@ +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +if SHIELD_RTKMIPILCDB00000BE +if DISPLAY + +# Enable MIPI DSI, as this display controller requires it. + +config MIPI_DSI + default y + +endif # DISPLAY + +if LVGL + +# Configure LVGL to use touchscreen with input API + +config INPUT + default y + +if INPUT + +# GT911 driver drives reset pin low, GT911 and ILI9806E_DSI driver share a reset line, +# so it needs to initialize before the display_ili9806e_dsi driver but after the MIPI DSI driver + +config INPUT_INIT_PRIORITY + default 89 + +endif # INPUT + +# LVGL should allocate buffers equal to size of display +config LV_Z_VDB_SIZE + default 100 + +# Enable double buffering +config LV_Z_DOUBLE_VDB + default y + +# Force full refresh. This prevents memory copy associated with partial +# display refreshes, which is not necessary for the GLCDC driver +config LV_Z_FULL_REFRESH + default y + +config LV_Z_BITS_PER_PIXEL + default 32 + +# Use offloaded render thread +config LV_Z_FLUSH_THREAD + default y + +choice LV_COLOR_DEPTH + default LV_COLOR_DEPTH_32 +endchoice + +endif # LVGL + +endif # SHIELD_RTKMIPILCDB00000BE diff --git a/boards/shields/rtkmipilcdb00000be/Kconfig.shield b/boards/shields/rtkmipilcdb00000be/Kconfig.shield new file mode 100644 index 000000000000000..0081d3f9819e11d --- /dev/null +++ b/boards/shields/rtkmipilcdb00000be/Kconfig.shield @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +config SHIELD_RTKMIPILCDB00000BE + def_bool $(shields_list_contains,rtkmipilcdb00000be) diff --git a/boards/shields/rtkmipilcdb00000be/boards/ek_ra8d1.overlay b/boards/shields/rtkmipilcdb00000be/boards/ek_ra8d1.overlay new file mode 100644 index 000000000000000..30399bc741fdc8e --- /dev/null +++ b/boards/shields/rtkmipilcdb00000be/boards/ek_ra8d1.overlay @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&pinctrl { + iic1_default: iic1_default { + group1 { + /* SCL1 SDA1 */ + psels = , + ; + drive-strength = "medium"; + }; + }; +}; + +&iic1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = ; + pinctrl-0 = <&iic1_default>; + pinctrl-names = "default"; +}; diff --git a/boards/shields/rtkmipilcdb00000be/doc/index.rst b/boards/shields/rtkmipilcdb00000be/doc/index.rst new file mode 100644 index 000000000000000..4e77512e6d5acd6 --- /dev/null +++ b/boards/shields/rtkmipilcdb00000be/doc/index.rst @@ -0,0 +1,61 @@ +.. _rtkmipilcdb00000be: + +RTKMIPILCDB00000BE MIPI Display +############################### + +Overview +******** + +The Focus LCDs RTKMIPILCDB00000BE MIPI Display is a 4.5 inch TFT 480x854 pixels +capacitive touch panel, and a backlight unit. + +This display uses a 26 pin connector header. + +Pins Assignment of the Renesas RTKMIPILCDB00000BE MIPI Display +============================================================== + ++-----------------------+------------------------+ +| Connector Pin | Function | ++=======================+========================+ +| 14 | Touch ctrl I2C SDA | ++-----------------------+------------------------+ +| 15 | Display backlight enable| ++-----------------------+------------------------+ +| 16 | Touch ctrl I2C SCL | ++-----------------------+------------------------+ +| 17 | External interrupt | ++-----------------------+------------------------+ +| 18 | Display reset | ++-----------------------+------------------------+ + +Hardware Requirements: +********************** + +Supported Renesas RA boards: EK-RA8D1 +- 1 x RA Board +- 1 x Micro USB cable + +Hardware Configuration: +*********************** + +The MIPI Graphics Expansion Port (J58) connects the EK-RA8D1 board to the MIPI Graphics Expansion Board +supplied as part of the kit. + +Set the configuration switches (SW1) as below to avoid potential failures. + +-------------+-------------+--------------+------------+------------+------------+-------------+-----------+ + | SW1-1 PMOD1 | SW1-2 TRACE | SW1-3 CAMERA | SW1-4 ETHA | SW1-5 ETHB | SW1-6 GLCD | SW1-7 SDRAM | SW1-8 I3C | + +-------------+-------------+--------------+------------+------------+------------+-------------+-----------+ + | OFF | OFF | OFF | OFF | OFF | ON | ON | OFF | + +-------------+-------------+--------------+------------+------------+------------+-------------+-----------+ + +Programming +*********** + +Set ``--shield=rtkmipilcdb00000be`` when you invoke ``west build``. For +example: + +.. zephyr-app-commands:: + :zephyr-app: tests/drivers/display/display_read_write + :board: ek_ra8d1 + :shield: rtkmipilcdb00000be + :goals: build diff --git a/boards/shields/rtkmipilcdb00000be/rtkmipilcdb00000be.overlay b/boards/shields/rtkmipilcdb00000be/rtkmipilcdb00000be.overlay new file mode 100644 index 000000000000000..1902a9cb55b7401 --- /dev/null +++ b/boards/shields/rtkmipilcdb00000be/rtkmipilcdb00000be.overlay @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2024 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/{ + chosen { + zephyr,display = &zephyr_lcdif; + }; + + lvgl_pointer { + compatible = "zephyr,lvgl-pointer-input"; + input = <>911_rtkmipilcdb00000be>; + }; +}; + +&renesas_mipi_i2c { + status = "okay"; + gt911_rtkmipilcdb00000be: gt911-rtkmipilcdb00000be@5d { + compatible = "goodix,gt911"; + reg = <0x5d>; + irq-gpios = <&renesas_mipi_connector 17 GPIO_ACTIVE_HIGH>; + reset-gpios = <&renesas_mipi_connector 18 GPIO_ACTIVE_LOW>; + }; +}; + +&zephyr_mipi_dsi { + status = "okay"; + ili9806e: ili9806e@0 { + status = "okay"; + compatible = "ilitek,ili9806e-dsi"; + reg = <0x0>; + height = <854>; + width = <480>; + data-lanes = <2>; + pixel-format = ; + }; +}; + +&zephyr_lcdif { + status = "okay"; + width = <480>; + height = <854>; + input-pixel-format = ; + output-pixel-format = ; + display-timings { + compatible = "zephyr,panel-timing"; + hsync-len = <2>; + hback-porch = <5>; + vsync-len = <3>; + vback-porch = <20>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <0>; + hfront-porch = <72>; + vfront-porch = <17>; + }; + backlight-gpios = <&renesas_mipi_connector 15 GPIO_ACTIVE_HIGH>; +}; diff --git a/boards/shields/semtech_sx1276mb1mas/doc/index.rst b/boards/shields/semtech_sx1276mb1mas/doc/index.rst index d4b7d07c454177d..ef72a16d3245b30 100644 --- a/boards/shields/semtech_sx1276mb1mas/doc/index.rst +++ b/boards/shields/semtech_sx1276mb1mas/doc/index.rst @@ -58,7 +58,7 @@ Arduino connectors and defines node aliases for SPI and GPIO interfaces (see Programming *********** -Set ``--shield semtech_sx1271mb1mas`` when you invoke ``west build``. For +Set ``--shield semtech_sx1276mb1mas`` when you invoke ``west build``. For example: .. zephyr-app-commands:: diff --git a/boards/shields/sparkfun_carrier_asset_tracker/Kconfig.defconfig b/boards/shields/sparkfun_carrier_asset_tracker/Kconfig.defconfig deleted file mode 100644 index da44e62a05f1ca2..000000000000000 --- a/boards/shields/sparkfun_carrier_asset_tracker/Kconfig.defconfig +++ /dev/null @@ -1,21 +0,0 @@ -# Copyright (c) 2024 Jerónimo Agulló -# SPDX-License-Identifier: Apache-2.0 - -if SHIELD_SPARKFUN_CARRIER_ASSET_TRACKER - -config SERIAL - default y - -config UART_INTERRUPT_DRIVEN - default y - -config UART_ASYNC_API - default y - -config I2C - default y - -config SPI - default y - -endif # SHIELD_SPARKFUN_CARRIER_ASSET_TRACKER diff --git a/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.overlay b/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.overlay index 1591debc937465c..e57bf8cafd9f79f 100644 --- a/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.overlay +++ b/boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.overlay @@ -5,9 +5,12 @@ */ &plli2s { + div-m = <8>; mul-n = <192>; div-r = <3>; - status = "okay"; + div-q = <4>; + clocks = <&clk_hse>; + status = "okay"; /* 48MHz on PLLI2SQ */ }; &dma2 { diff --git a/boards/shields/x_nucleo_iks4a1/x_nucleo_iks4a1.overlay b/boards/shields/x_nucleo_iks4a1/x_nucleo_iks4a1.overlay index 3cda8324777d029..eaa60be0f4daecd 100644 --- a/boards/shields/x_nucleo_iks4a1/x_nucleo_iks4a1.overlay +++ b/boards/shields/x_nucleo_iks4a1/x_nucleo_iks4a1.overlay @@ -9,6 +9,7 @@ magn0 = &lis2mdl_1e_x_nucleo_iks4a1; accel0 = &lsm6dso16is_6a_x_nucleo_iks4a1; accel1 = &lsm6dsv16x_6b_x_nucleo_iks4a1; + accel2 = &lis2duxs12_1e_x_nucleo_iks4a1; press0 = &lps22df_5d_x_nucleo_iks4a1; }; }; @@ -45,4 +46,11 @@ drdy-pulsed; drdy-gpios = <&arduino_header 12 GPIO_ACTIVE_HIGH>; /* D6 (PB10) */ }; + + lis2duxs12_1e_x_nucleo_iks4a1: lis2duxs12@19 { + compatible = "st,lis2duxs12"; + reg = <0x19>; + int1-gpios = <&arduino_header 3 GPIO_ACTIVE_HIGH>; /* A3 */ + }; + }; diff --git a/boards/silabs/dev_kits/sim3u1xx_dk/sim3u1xx_dk.dts b/boards/silabs/dev_kits/sim3u1xx_dk/sim3u1xx_dk.dts index dea9d6f0fb72b4f..4915747d93414a3 100644 --- a/boards/silabs/dev_kits/sim3u1xx_dk/sim3u1xx_dk.dts +++ b/boards/silabs/dev_kits/sim3u1xx_dk/sim3u1xx_dk.dts @@ -24,6 +24,7 @@ zephyr,console = &usart0; zephyr,flash = &flash0; zephyr,shell-uart = &usart0; + zephyr,uart-pipe = &usart0; zephyr,sram = &sram0; }; diff --git a/boards/silabs/dev_kits/sltb004a/doc/index.rst b/boards/silabs/dev_kits/sltb004a/doc/index.rst index 13b0ddc47c6fe62..14795756afc3717 100644 --- a/boards/silabs/dev_kits/sltb004a/doc/index.rst +++ b/boards/silabs/dev_kits/sltb004a/doc/index.rst @@ -142,7 +142,7 @@ Programming and Debugging .. note:: Before using the kit the first time, you should update the J-Link firmware - from `J-Link-Downloads`_ + in Simplicity Studio. Flashing ======== @@ -199,6 +199,3 @@ the following message: .. _J-Link: https://www.segger.com/jlink-debug-probes.html - -.. _J-Link-Downloads: - https://www.segger.com/downloads/jlink diff --git a/boards/silabs/dev_kits/sltb004a/sltb004a.dts b/boards/silabs/dev_kits/sltb004a/sltb004a.dts index 033984be007709e..5252b0b6a48f050 100644 --- a/boards/silabs/dev_kits/sltb004a/sltb004a.dts +++ b/boards/silabs/dev_kits/sltb004a/sltb004a.dts @@ -27,6 +27,7 @@ chosen { zephyr,console = &usart0; zephyr,shell-uart = &usart0; + zephyr,uart-pipe = &usart0; zephyr,sram = &sram0; zephyr,flash = &flash0; }; diff --git a/boards/silabs/dev_kits/sltb009a/doc/index.rst b/boards/silabs/dev_kits/sltb009a/doc/index.rst index 1e0489dbad3ff05..8be84aefc603603 100644 --- a/boards/silabs/dev_kits/sltb009a/doc/index.rst +++ b/boards/silabs/dev_kits/sltb009a/doc/index.rst @@ -101,7 +101,7 @@ Programming and Debugging .. note:: Before using the kit the first time, you should update the J-Link firmware - from `J-Link-Downloads`_ + in Simplicity Studio. Flashing ======== @@ -152,6 +152,3 @@ terminal session: .. _J-Link: https://www.segger.com/jlink-debug-probes.html - -.. _J-Link-Downloads: - https://www.segger.com/downloads/jlink diff --git a/boards/silabs/dev_kits/sltb009a/sltb009a.dts b/boards/silabs/dev_kits/sltb009a/sltb009a.dts index 1c36fb59f21fa73..901cc93bca94133 100644 --- a/boards/silabs/dev_kits/sltb009a/sltb009a.dts +++ b/boards/silabs/dev_kits/sltb009a/sltb009a.dts @@ -16,6 +16,7 @@ chosen { zephyr,console = &usart0; zephyr,shell-uart = &usart0; + zephyr,uart-pipe = &usart0; zephyr,sram = &sram0; zephyr,flash = &flash0; }; diff --git a/boards/silabs/dev_kits/sltb010a/doc/index.rst b/boards/silabs/dev_kits/sltb010a/doc/index.rst index f1ed44facb40ef6..eb7dcfb24a040ff 100644 --- a/boards/silabs/dev_kits/sltb010a/doc/index.rst +++ b/boards/silabs/dev_kits/sltb010a/doc/index.rst @@ -63,6 +63,8 @@ The sltb010a board configuration supports the following hardware features: +-----------+------------+-------------------------------------+ | UART | on-chip | serial | +-----------+------------+-------------------------------------+ +| DMA | on-chip | ldma | ++-----------+------------+-------------------------------------+ | WATCHDOG | on-chip | watchdog | +-----------+------------+-------------------------------------+ | TRNG | on-chip | true random number generator | diff --git a/boards/silabs/dev_kits/sltb010a/sltb010a-pinctrl.dtsi b/boards/silabs/dev_kits/sltb010a/sltb010a-pinctrl.dtsi new file mode 100644 index 000000000000000..435ca5a0cf46f59 --- /dev/null +++ b/boards/silabs/dev_kits/sltb010a/sltb010a-pinctrl.dtsi @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2024 Silicon Laboratories Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&pinctrl { + usart0_default: usart0_default { + group0 { + pins = , ; + drive-push-pull; + output-high; + }; + group1 { + pins = ; + input-enable; + }; + }; + + usart1_default: usart1_default { + group0 { + pins = ; + drive-push-pull; + output-high; + }; + group1 { + pins = ; + input-enable; + silabs,input-filter; + }; + }; + + i2c0_default: i2c0_default { + group0 { + pins = , ; + drive-open-drain; + bias-pull-up; + }; + }; +}; diff --git a/boards/silabs/dev_kits/sltb010a/sltb010a.dts b/boards/silabs/dev_kits/sltb010a/sltb010a.dts index b3b77a96a05c91e..994a75007ee02dc 100644 --- a/boards/silabs/dev_kits/sltb010a/sltb010a.dts +++ b/boards/silabs/dev_kits/sltb010a/sltb010a.dts @@ -6,7 +6,7 @@ /dts-v1/; #include -#include +#include "sltb010a-pinctrl.dtsi" #include "thunderboard.dtsi" #include @@ -102,7 +102,7 @@ }; &sw_imu_enable { - enable-gpios = <&gpiob GECKO_PIN(4) GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpiob 4 GPIO_ACTIVE_HIGH>; }; &bt_hci_silabs { diff --git a/boards/silabs/dev_kits/sltb010a/sltb010a_0.overlay b/boards/silabs/dev_kits/sltb010a/sltb010a_0.overlay index c108c8e67db4cee..3b3654f9c60bd3a 100644 --- a/boards/silabs/dev_kits/sltb010a/sltb010a_0.overlay +++ b/boards/silabs/dev_kits/sltb010a/sltb010a_0.overlay @@ -11,9 +11,9 @@ }; &sw_sensor_enable { - enable-gpios = <&gpioa GECKO_PIN(4) GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpioa 4 GPIO_ACTIVE_HIGH>; }; &sw_mic_enable { - enable-gpios = <&gpioa GECKO_PIN(0) GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>; }; diff --git a/boards/silabs/dev_kits/sltb010a/sltb010a_0.yaml b/boards/silabs/dev_kits/sltb010a/sltb010a_0.yaml index 4de8c502a07bae0..90a2ebc846afb32 100644 --- a/boards/silabs/dev_kits/sltb010a/sltb010a_0.yaml +++ b/boards/silabs/dev_kits/sltb010a/sltb010a_0.yaml @@ -14,6 +14,7 @@ supported: - gpio - uart - i2c + - dma - spi - clock_control vendor: silabs diff --git a/boards/silabs/dev_kits/sltb010a/sltb010a_2.overlay b/boards/silabs/dev_kits/sltb010a/sltb010a_2.overlay index 224722da280c3a4..8365fd71ee07f73 100644 --- a/boards/silabs/dev_kits/sltb010a/sltb010a_2.overlay +++ b/boards/silabs/dev_kits/sltb010a/sltb010a_2.overlay @@ -12,17 +12,17 @@ }; &button0 { - gpios = <&gpiob GECKO_PIN(3) GPIO_ACTIVE_LOW>; + gpios = <&gpiob 3 GPIO_ACTIVE_LOW>; }; &led0 { - gpios = <&gpioa GECKO_PIN(4) GPIO_ACTIVE_HIGH>; + gpios = <&gpioa 4 GPIO_ACTIVE_HIGH>; }; &sw_sensor_enable { - enable-gpios = <&gpioc GECKO_PIN(6) GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpioc 6 GPIO_ACTIVE_HIGH>; }; &sw_mic_enable { - enable-gpios = <&gpioc GECKO_PIN(7) GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpioc 7 GPIO_ACTIVE_HIGH>; }; diff --git a/boards/silabs/dev_kits/sltb010a/sltb010a_2.yaml b/boards/silabs/dev_kits/sltb010a/sltb010a_2.yaml index 2024a279aeb2248..b0642de163eb71c 100644 --- a/boards/silabs/dev_kits/sltb010a/sltb010a_2.yaml +++ b/boards/silabs/dev_kits/sltb010a/sltb010a_2.yaml @@ -14,5 +14,6 @@ supported: - gpio - uart - i2c + - dma - spi vendor: silabs diff --git a/boards/silabs/dev_kits/sltb010a/sltb010a_defconfig b/boards/silabs/dev_kits/sltb010a/sltb010a_defconfig index 40057c1dd75a495..b7da445368cb136 100644 --- a/boards/silabs/dev_kits/sltb010a/sltb010a_defconfig +++ b/boards/silabs/dev_kits/sltb010a/sltb010a_defconfig @@ -8,4 +8,3 @@ CONFIG_GPIO=y CONFIG_SOC_GECKO_EMU_DCDC=y CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y CONFIG_HW_STACK_PROTECTION=y -CONFIG_PINCTRL=y diff --git a/boards/silabs/dev_kits/sltb010a/thunderboard.dtsi b/boards/silabs/dev_kits/sltb010a/thunderboard.dtsi index e94827c0c810d80..0ec7c11aa157ce9 100644 --- a/boards/silabs/dev_kits/sltb010a/thunderboard.dtsi +++ b/boards/silabs/dev_kits/sltb010a/thunderboard.dtsi @@ -5,13 +5,13 @@ */ #include -#include / { chosen { zephyr,bt-c2h-uart = &usart1; zephyr,console = &usart1; zephyr,shell-uart = &usart1; + zephyr,uart-pipe = &usart1; zephyr,sram = &sram0; zephyr,flash = &flash0; }; @@ -19,7 +19,7 @@ leds { compatible = "gpio-leds"; led0: led_0 { - gpios = <&gpiob GECKO_PIN(0) GPIO_ACTIVE_HIGH>; + gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>; label = "LED 0"; }; }; @@ -27,7 +27,7 @@ buttons { compatible = "gpio-keys"; button0: button_0 { - gpios = <&gpiob GECKO_PIN(1) GPIO_ACTIVE_LOW>; + gpios = <&gpiob 1 GPIO_ACTIVE_LOW>; label = "User Push Button 0"; zephyr,code = ; }; @@ -35,7 +35,7 @@ wake_up_trigger: gpio-wake-up { compatible = "silabs,gecko-wake-up-trigger"; - gpios = <&gpioa GECKO_PIN(5) GPIO_ACTIVE_LOW>; + gpios = <&gpioa 5 GPIO_ACTIVE_LOW>; }; /* GPIOs that power up different sensors */ @@ -138,17 +138,6 @@ status = "okay"; }; -&pinctrl { - i2c0_default: i2c0_default { - group1 { - psels = , - , - , - ; - }; - }; -}; - &i2c0 { pinctrl-0 = <&i2c0_default>; pinctrl-names = "default"; diff --git a/boards/silabs/dev_kits/xg24_dk2601b/Kconfig.defconfig b/boards/silabs/dev_kits/xg24_dk2601b/Kconfig.defconfig index 098b80000ac657b..b19973867328352 100644 --- a/boards/silabs/dev_kits/xg24_dk2601b/Kconfig.defconfig +++ b/boards/silabs/dev_kits/xg24_dk2601b/Kconfig.defconfig @@ -9,10 +9,6 @@ config CMU_HFXO_FREQ config CMU_LFXO_FREQ default 32768 -config FLASH_BASE_ADDRESS - hex - default 0x08000000 - if SOC_GECKO_USE_RAIL config FPU diff --git a/boards/silabs/dev_kits/xg24_dk2601b/doc/index.rst b/boards/silabs/dev_kits/xg24_dk2601b/doc/index.rst index 214ce3b00bcf4b9..c2453e977c095f7 100644 --- a/boards/silabs/dev_kits/xg24_dk2601b/doc/index.rst +++ b/boards/silabs/dev_kits/xg24_dk2601b/doc/index.rst @@ -56,6 +56,8 @@ The board configuration supports the following hardware features: +-----------+------------+-------------------------------------+ | UART | on-chip | serial | +-----------+------------+-------------------------------------+ +| DMA | on-chip | ldma | ++-----------+------------+-------------------------------------+ | TRNG | on-chip | semailbox | +-----------+------------+-------------------------------------+ | WATCHDOG | on-chip | watchdog | @@ -109,7 +111,7 @@ Programming and Debugging .. note:: Before using the kit the first time, you should update the J-Link firmware - from `J-Link-Downloads`_ + in Simplicity Studio. Flashing ======== @@ -169,6 +171,3 @@ this example. .. _BRD2601B User Guide: https://www.silabs.com/documents/public/user-guides/ug524-brd2601b-user-guide.pdf - -.. _J-Link-Downloads: - https://www.segger.com/downloads/jlink diff --git a/boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b-pinctrl.dtsi b/boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b-pinctrl.dtsi new file mode 100644 index 000000000000000..30aaa4655ba9434 --- /dev/null +++ b/boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b-pinctrl.dtsi @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2024 Silicon Laboratories Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&pinctrl { + usart0_default: usart0_default { + group0 { + pins = ; + drive-push-pull; + output-high; + }; + group1 { + pins = ; + input-enable; + silabs,input-filter; + }; + }; + + i2c0_default: i2c0_default { + group0 { + pins = , ; + drive-open-drain; + bias-pull-up; + }; + }; +}; diff --git a/boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b.dts b/boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b.dts index 9605ff58d00d5c0..0859df1b3d4d001 100644 --- a/boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b.dts +++ b/boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b.dts @@ -6,9 +6,9 @@ /dts-v1/; #include -#include #include #include +#include "xg24_dk2601b-pinctrl.dtsi" / { model = "Silicon Labs BRD2601B (xG24 Dev Kit)"; @@ -17,6 +17,7 @@ chosen { zephyr,console = &usart0; zephyr,shell-uart = &usart0; + zephyr,uart-pipe = &usart0; zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,code-partition = &slot0_partition; @@ -35,37 +36,37 @@ leds { compatible = "gpio-leds"; red_led: led_2 { - gpios = <&gpiod GECKO_PIN(2) GPIO_ACTIVE_LOW>; + gpios = <&gpiod 2 GPIO_ACTIVE_LOW>; }; green_led: led_0 { - gpios = <&gpioa GECKO_PIN(4) GPIO_ACTIVE_LOW>; + gpios = <&gpioa 4 GPIO_ACTIVE_LOW>; }; blue_led: led_1 { - gpios = <&gpiob GECKO_PIN(0) GPIO_ACTIVE_LOW>; + gpios = <&gpiob 0 GPIO_ACTIVE_LOW>; }; }; buttons { compatible = "gpio-keys"; button0: button_0 { - gpios = <&gpiob GECKO_PIN(2) GPIO_ACTIVE_LOW>; + gpios = <&gpiob 2 GPIO_ACTIVE_LOW>; zephyr,code = ; }; button1: button_1 { - gpios = <&gpiob GECKO_PIN(3) GPIO_ACTIVE_LOW>; + gpios = <&gpiob 3 GPIO_ACTIVE_LOW>; zephyr,code = ; }; }; wake_up_trigger: gpio-wake-up { compatible = "silabs,gecko-wake-up-trigger"; - gpios = <&gpioa GECKO_PIN(5) GPIO_ACTIVE_LOW>; + gpios = <&gpioa 5 GPIO_ACTIVE_LOW>; }; sensor_enable: gpio_switch_0 { compatible = "regulator-fixed"; regulator-name = "sensor_enable"; - enable-gpios = <&gpioc GECKO_PIN(9) GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpioc 9 GPIO_ACTIVE_HIGH>; regulator-boot-on; }; }; diff --git a/boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b.yaml b/boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b.yaml index 8bfaf749e3291a1..599c5c6657e359c 100644 --- a/boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b.yaml +++ b/boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b.yaml @@ -12,6 +12,7 @@ supported: - counter - gpio - uart + - dma - watchdog - clock_control testing: diff --git a/boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b_defconfig b/boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b_defconfig index 751fbb5cae55700..ea3fbea0c139f14 100644 --- a/boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b_defconfig +++ b/boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b_defconfig @@ -7,7 +7,6 @@ CONFIG_UART_CONSOLE=y CONFIG_SERIAL=y CONFIG_GPIO=y CONFIG_HW_STACK_PROTECTION=y -CONFIG_PINCTRL=y CONFIG_REGULATOR=y CONFIG_SOC_GECKO_EMU_DCDC=y CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y diff --git a/boards/silabs/dev_kits/xg24_ek2703a/CMakeLists.txt b/boards/silabs/dev_kits/xg24_ek2703a/CMakeLists.txt new file mode 100644 index 000000000000000..2e35c87b81db63c --- /dev/null +++ b/boards/silabs/dev_kits/xg24_ek2703a/CMakeLists.txt @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Norik Systems +# SPDX-License-Identifier: Apache-2.0 + +zephyr_library() +zephyr_library_sources(board.c) diff --git a/boards/silabs/dev_kits/xg24_ek2703a/Kconfig b/boards/silabs/dev_kits/xg24_ek2703a/Kconfig new file mode 100644 index 000000000000000..bcc3f461f6e0324 --- /dev/null +++ b/boards/silabs/dev_kits/xg24_ek2703a/Kconfig @@ -0,0 +1,16 @@ +# EFR32XG24 EK2703A board + +# Copyright (c) 2022, Silicon Labs +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_XG24_EK2703A + +config BOARD_XG24_EK2703A + select GPIO + select BOARD_LATE_INIT_HOOK + +module = BOARD_EFR32MG24 +module-str = Board Control +source "subsys/logging/Kconfig.template.log_config" + +endif # BOARD_XG24_EK2703A diff --git a/boards/silabs/dev_kits/xg24_ek2703a/Kconfig.defconfig b/boards/silabs/dev_kits/xg24_ek2703a/Kconfig.defconfig new file mode 100644 index 000000000000000..53290acffd07179 --- /dev/null +++ b/boards/silabs/dev_kits/xg24_ek2703a/Kconfig.defconfig @@ -0,0 +1,26 @@ +# Copyright (c) 2021, Sateesh Kotapati +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_XG24_EK2703A + +config CMU_HFXO_FREQ + default 39000000 + +config CMU_LFXO_FREQ + default 32768 + +if SOC_GECKO_USE_RAIL + +config FPU + default y + +endif # SOC_GECKO_USE_RAIL + +if BT + +config COMMON_LIBC_MALLOC_ARENA_SIZE + default 8192 + +endif # BT + +endif # BOARD_XG24_EK2703A diff --git a/boards/silabs/dev_kits/xg24_ek2703a/Kconfig.xg24_ek2703a b/boards/silabs/dev_kits/xg24_ek2703a/Kconfig.xg24_ek2703a new file mode 100644 index 000000000000000..275ebeb1f6a856d --- /dev/null +++ b/boards/silabs/dev_kits/xg24_ek2703a/Kconfig.xg24_ek2703a @@ -0,0 +1,5 @@ +# Copyright (c) 2021, Sateesh Kotapati +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_XG24_EK2703A + select SOC_PART_NUMBER_EFR32MG24B210F1536IM48 diff --git a/boards/silabs/dev_kits/xg24_ek2703a/board.c b/boards/silabs/dev_kits/xg24_ek2703a/board.c new file mode 100644 index 000000000000000..2ffc7aa210db7b1 --- /dev/null +++ b/boards/silabs/dev_kits/xg24_ek2703a/board.c @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2021 Sateesh Kotapati + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include + +LOG_MODULE_REGISTER(efr32xg24_ek2703a, CONFIG_BOARD_EFR32MG24_LOG_LEVEL); + +void board_late_init_hook(void) +{ + int ret; + + static struct gpio_dt_spec wake_up_gpio_dev = + GPIO_DT_SPEC_GET(DT_NODELABEL(wake_up_trigger), gpios); + + if (!gpio_is_ready_dt(&wake_up_gpio_dev)) { + LOG_ERR("Wake-up GPIO device was not found!\n"); + } + ret = gpio_pin_configure_dt(&wake_up_gpio_dev, GPIO_OUTPUT_ACTIVE); + if (ret < 0) { + LOG_ERR("Failed to configure wake-up GPIO!\n"); + } +} diff --git a/boards/silabs/dev_kits/xg24_ek2703a/board.cmake b/boards/silabs/dev_kits/xg24_ek2703a/board.cmake new file mode 100644 index 000000000000000..a39d499a6c2f0f2 --- /dev/null +++ b/boards/silabs/dev_kits/xg24_ek2703a/board.cmake @@ -0,0 +1,8 @@ +# Copyright (c) 2021, Sateesh Kotapati +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(jlink "--device=EFR32MG24BxxxF1536" "--reset-after-load") +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) + +board_runner_args(silabs_commander "--device=EFR32MG24B210F1536IM48") +include(${ZEPHYR_BASE}/boards/common/silabs_commander.board.cmake) diff --git a/boards/silabs/dev_kits/xg24_ek2703a/board.yml b/boards/silabs/dev_kits/xg24_ek2703a/board.yml new file mode 100644 index 000000000000000..7327014ed54b38c --- /dev/null +++ b/boards/silabs/dev_kits/xg24_ek2703a/board.yml @@ -0,0 +1,6 @@ +board: + name: xg24_ek2703a + full_name: EFR32xG24 Explorer Kit (xG24-EK2703A) + vendor: silabs + socs: + - name: efr32mg24b210f1536im48 diff --git a/boards/silabs/dev_kits/xg24_ek2703a/doc/index.rst b/boards/silabs/dev_kits/xg24_ek2703a/doc/index.rst new file mode 100644 index 000000000000000..e841838b1be4489 --- /dev/null +++ b/boards/silabs/dev_kits/xg24_ek2703a/doc/index.rst @@ -0,0 +1,163 @@ +.. zephyr:board:: xg24_ek2703a + +Overview +******** + +The EFR32xG24 Explorer Kit (xG24-EK2703A) contains +a Wireless System-On-Chip from the EFR32MG24 family built on an +ARM Cortex®-M33 processor with excellent low power capabilities. + +Hardware +******** + +- EFR32MG24B210F1536IM48-B Mighty Gecko SoC +- CPU core: ARM Cortex®-M33 with FPU +- Flash memory: 1536 kB +- RAM: 256 kB +- Transmit power: up to +10 dBm +- Operation frequency: 2.4 GHz +- Crystals for LFXO (32.768 kHz) and HFXO (39 MHz). + +For more information about the EFR32MG24 SoC and BRD2703A board, refer to these +documents: + +- `EFR32MG24 Website`_ +- `EFR32MG24 Datasheet`_ +- `EFR32xG24 Reference Manual`_ +- `BRD2703A User Guide`_ + +Supported Features +================== + +The ``xg24_ek2703a`` board supports the following hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| MPU | on-chip | memory protection unit | ++-----------+------------+-------------------------------------+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| SYSTICK | on-chip | systick | ++-----------+------------+-------------------------------------+ +| COUNTER | on-chip | stimer | ++-----------+------------+-------------------------------------+ +| FLASH | on-chip | flash memory | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial | ++-----------+------------+-------------------------------------+ +| TRNG | on-chip | semailbox | ++-----------+------------+-------------------------------------+ +| WATCHDOG | on-chip | watchdog | ++-----------+------------+-------------------------------------+ +| I2C(M/S) | on-chip | i2c | ++-----------+------------+-------------------------------------+ +| RADIO | on-chip | bluetooth | ++-----------+------------+-------------------------------------+ + +Other hardware features are currently not supported by the port. + +Connections and IOs +=================== + +In the following table, the column **Name** contains Pin names. For example, PA2 +means Pin number 2 on PORTA, as used in the board's datasheets and manuals. + ++-------+-------------+-------------------------------------+ +| Name | Function | Usage | ++=======+=============+=====================================+ +| PA4 | GPIO | LED0 | ++-------+-------------+-------------------------------------+ +| PA7 | GPIO | LED1 | ++-------+-------------+-------------------------------------+ +| PB2 | GPIO | Push Button 0 | ++-------+-------------+-------------------------------------+ +| PB3 | GPIO | Push Button 1 | ++-------+-------------+-------------------------------------+ +| PA5 | USART0_TX | UART Console VCOM_TX US0_TX | ++-------+-------------+-------------------------------------+ +| PA6 | USART0_RX | UART Console VCOM_RX US0_RX | ++-------+-------------+-------------------------------------+ + +The default configuration can be found in +:zephyr_file:`boards/silabs/dev_kits/xg24_ek2703a/xg24_ek2703a_defconfig` + +System Clock +============ + +The EFR32MG24 SoC is configured to use the 39 MHz external oscillator on the +board. + +Serial Port +=========== + +The EFR32MG24 SoC has one USART and two EUSARTs. +USART0 is connected to the board controller and is used for the console. + +Programming and Debugging +************************* + +.. note:: + Before using the kit the first time, you should update the J-Link firmware + in Simplicity Studio. + +Flashing +======== + +The sample application :zephyr:code-sample:`hello_world` is used for this example. +Build the Zephyr kernel and application: + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: xg24_ek2703a + :goals: build + +Connect the xg24_ek2703a to your host computer using the USB port and you +should see a USB connection. + +Open a serial terminal (minicom, putty, etc.) with the following settings: + +- Speed: 115200 +- Data: 8 bits +- Parity: None +- Stop bits: 1 + +Reset the board and you'll see the following message on the corresponding serial port +terminal session: + +.. code-block:: console + + Hello World! xg24_ek2703a + +Bluetooth +========= + +To use the BLE function, run the command below to retrieve necessary binary +blobs from the SiLabs HAL repository. + +.. code-block:: console + + west blobs fetch hal_silabs + +Then build the Zephyr kernel and a Bluetooth sample with the following +command. The :zephyr:code-sample:`bluetooth_observer` sample application is used in +this example. + +.. zephyr-app-commands:: + :zephyr-app: samples/bluetooth/observer + :board: xg24_ek2703a + :goals: build + +.. _EFR32MG24 Website: + https://www.silabs.com/wireless/zigbee/efr32mg24-series-2-socs# + +.. _EFR32MG24 Datasheet: + https://www.silabs.com/documents/public/data-sheets/efr32mg24-datasheet.pdf + +.. _EFR32xG24 Reference Manual: + https://www.silabs.com/documents/public/reference-manuals/efr32xg24-rm.pdf + +.. _BRD2703A User Guide: + https://www.silabs.com/documents/public/user-guides/ug533-xg24-ek2703a.pdf diff --git a/boards/silabs/dev_kits/xg24_ek2703a/dts/bindings/silabs,gecko-wake-up-trigger.yaml b/boards/silabs/dev_kits/xg24_ek2703a/dts/bindings/silabs,gecko-wake-up-trigger.yaml new file mode 100644 index 000000000000000..ba8892f2ce0b2f5 --- /dev/null +++ b/boards/silabs/dev_kits/xg24_ek2703a/dts/bindings/silabs,gecko-wake-up-trigger.yaml @@ -0,0 +1,15 @@ +# Copyright (c) 2022, Antmicro +# SPDX-License-Identifier: Apache-2.0 + +description: GPIO Wake Up Trigger for EFR32MG24 + +compatible: "silabs,gecko-wake-up-trigger" + +include: base.yaml + +properties: + gpios: + type: phandle-array + required: true + description: | + GPIO used as wake up trigger from EM4 sleep diff --git a/boards/silabs/dev_kits/xg24_ek2703a/pre_dt_board.cmake b/boards/silabs/dev_kits/xg24_ek2703a/pre_dt_board.cmake new file mode 100644 index 000000000000000..beb76b85552d14d --- /dev/null +++ b/boards/silabs/dev_kits/xg24_ek2703a/pre_dt_board.cmake @@ -0,0 +1,5 @@ +# Copyright (c) 2021 Linaro Limited +# SPDX-License-Identifier: Apache-2.0 + +# SPI is implemented via usart so node name isn't spi@... +list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge") diff --git a/boards/silabs/dev_kits/xg24_ek2703a/xg24_ek2703a-pinctrl.dtsi b/boards/silabs/dev_kits/xg24_ek2703a/xg24_ek2703a-pinctrl.dtsi new file mode 100644 index 000000000000000..30aaa4655ba9434 --- /dev/null +++ b/boards/silabs/dev_kits/xg24_ek2703a/xg24_ek2703a-pinctrl.dtsi @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2024 Silicon Laboratories Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&pinctrl { + usart0_default: usart0_default { + group0 { + pins = ; + drive-push-pull; + output-high; + }; + group1 { + pins = ; + input-enable; + silabs,input-filter; + }; + }; + + i2c0_default: i2c0_default { + group0 { + pins = , ; + drive-open-drain; + bias-pull-up; + }; + }; +}; diff --git a/boards/silabs/dev_kits/xg24_ek2703a/xg24_ek2703a.dts b/boards/silabs/dev_kits/xg24_ek2703a/xg24_ek2703a.dts new file mode 100644 index 000000000000000..a4bf9f857e5f4e4 --- /dev/null +++ b/boards/silabs/dev_kits/xg24_ek2703a/xg24_ek2703a.dts @@ -0,0 +1,206 @@ +/* + * Copyright (c) 2020 TriaGnoSys GmbH + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include +#include +#include "xg24_ek2703a-pinctrl.dtsi" + +/ { + model = "Silicon Labs BRD2703A (xG24 Explorer Kit)"; + compatible = "silabs,xg24_ek2703a", "silabs,efr32mg24"; + + chosen { + zephyr,console = &usart0; + zephyr,shell-uart = &usart0; + zephyr,uart-pipe = &usart0; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,bt-hci = &bt_hci_silabs; + }; + + aliases { + led0 = &led0; + led1 = &led1; + sw0 = &button0; + sw1 = &button1; + watchdog0 = &wdog0; + }; + + leds { + compatible = "gpio-leds"; + led0: led_0 { + gpios = <&gpioa 4 GPIO_ACTIVE_LOW>; + }; + led1: led_1 { + gpios = <&gpioa 7 GPIO_ACTIVE_LOW>; + }; + }; + + buttons { + compatible = "gpio-keys"; + button0: button_0 { + gpios = <&gpiob 2 GPIO_ACTIVE_LOW>; + zephyr,code = ; + }; + button1: button_1 { + gpios = <&gpiob 3 GPIO_ACTIVE_LOW>; + zephyr,code = ; + }; + }; + + wake_up_trigger: gpio-wake-up { + compatible = "silabs,gecko-wake-up-trigger"; + gpios = <&gpioa 5 GPIO_ACTIVE_LOW>; + }; +}; + +&cpu0 { + clock-frequency = <78000000>; +}; + +&hfxo { + status = "okay"; + ctune = <140>; + precision = <50>; +}; + +&lfxo { + status = "okay"; + ctune = <63>; + precision = <50>; +}; + +&hfrcodpll { + clock-frequency = ; + clocks = <&hfxo>; + dpll-n = <3839>; + dpll-m = <1919>; + dpll-edge = "fall"; + dpll-lock = "phase"; + dpll-autorecover; +}; + +&em23grpaclk { + clocks = <&lfxo>; +}; + +&em4grpaclk { + clocks = <&lfxo>; +}; + +&sysrtcclk { + clocks = <&lfxo>; +}; + +&wdog0clk { + clocks = <&lfxo>; +}; + +&wdog1clk { + clocks = <&lfxo>; +}; + +&usart0 { + current-speed = <115200>; + pinctrl-0 = <&usart0_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2c0 { + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio { + status = "okay"; +}; + +&gpioa { + status = "okay"; +}; + +&gpiob { + status = "okay"; +}; + +&gpioc { + status = "okay"; +}; + +&gpiod { + status = "okay"; +}; + +&wdog0 { + status = "okay"; +}; + +&se { + status = "okay"; +}; + +&dcdc { + status = "okay"; + regulator-boot-on; + regulator-initial-mode = ; + silabs,pfmx-peak-current-milliamp = <120>; +}; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* Reserve 48 kB for the bootloader */ + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x0 0x0000c000>; + read-only; + }; + + /* Reserve 464 kB for the application in slot 0 */ + slot0_partition: partition@c000 { + label = "image-0"; + reg = <0x0000c000 0x00074000>; + }; + + /* Reserve 464 kB for the application in slot 1 */ + slot1_partition: partition@80000 { + label = "image-1"; + reg = <0x00080000 0x00074000>; + }; + + /* Reserve 32 kB for the scratch partition */ + scratch_partition: partition@f4000 { + label = "image-scratch"; + reg = <0x000f4000 0x00008000>; + }; + + /* Set 528Kb of storage at the end of the 1024Kb of flash */ + storage_partition: partition@fc000 { + label = "storage"; + reg = <0x000fc000 0x00084000>; + }; + }; +}; + +&adc0 { + status = "okay"; +}; + +&sysrtc0 { + status = "okay"; +}; + +&bt_hci_silabs { + status = "okay"; +}; diff --git a/boards/silabs/dev_kits/xg24_ek2703a/xg24_ek2703a.yaml b/boards/silabs/dev_kits/xg24_ek2703a/xg24_ek2703a.yaml new file mode 100644 index 000000000000000..551f2754872823c --- /dev/null +++ b/boards/silabs/dev_kits/xg24_ek2703a/xg24_ek2703a.yaml @@ -0,0 +1,21 @@ +identifier: xg24_ek2703a +name: EFR32xG24 Explorer Kit (xG24-EK2703A, BRD2703A) +type: mcu +arch: arm +ram: 256 +flash: 1536 +toolchain: + - zephyr + - gnuarmemb +supported: + - bluetooth + - counter + - gpio + - uart + - watchdog + - clock_control +testing: + ignore_tags: + - pm + - hwinfo +vendor: silabs diff --git a/boards/silabs/dev_kits/xg24_ek2703a/xg24_ek2703a_defconfig b/boards/silabs/dev_kits/xg24_ek2703a/xg24_ek2703a_defconfig new file mode 100644 index 000000000000000..ea3fbea0c139f14 --- /dev/null +++ b/boards/silabs/dev_kits/xg24_ek2703a/xg24_ek2703a_defconfig @@ -0,0 +1,12 @@ +# Copyright (c) 2022 Silicon Labs +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_ARM_MPU=y +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_GPIO=y +CONFIG_HW_STACK_PROTECTION=y +CONFIG_REGULATOR=y +CONFIG_SOC_GECKO_EMU_DCDC=y +CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y diff --git a/boards/silabs/dev_kits/xg27_dk2602a/doc/index.rst b/boards/silabs/dev_kits/xg27_dk2602a/doc/index.rst index cd739beeaedf3cc..c700e1cf9c00214 100644 --- a/boards/silabs/dev_kits/xg27_dk2602a/doc/index.rst +++ b/boards/silabs/dev_kits/xg27_dk2602a/doc/index.rst @@ -47,6 +47,8 @@ The xg27_dk2602a board configuration supports the following hardware features: +-----------+------------+-------------------------------------+ | UART | on-chip | serial | +-----------+------------+-------------------------------------+ +| DMA | on-chip | ldma | ++-----------+------------+-------------------------------------+ Flashing ======== diff --git a/boards/silabs/dev_kits/xg27_dk2602a/thunderboard.dtsi b/boards/silabs/dev_kits/xg27_dk2602a/thunderboard.dtsi index e94827c0c810d80..0ec7c11aa157ce9 100644 --- a/boards/silabs/dev_kits/xg27_dk2602a/thunderboard.dtsi +++ b/boards/silabs/dev_kits/xg27_dk2602a/thunderboard.dtsi @@ -5,13 +5,13 @@ */ #include -#include / { chosen { zephyr,bt-c2h-uart = &usart1; zephyr,console = &usart1; zephyr,shell-uart = &usart1; + zephyr,uart-pipe = &usart1; zephyr,sram = &sram0; zephyr,flash = &flash0; }; @@ -19,7 +19,7 @@ leds { compatible = "gpio-leds"; led0: led_0 { - gpios = <&gpiob GECKO_PIN(0) GPIO_ACTIVE_HIGH>; + gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>; label = "LED 0"; }; }; @@ -27,7 +27,7 @@ buttons { compatible = "gpio-keys"; button0: button_0 { - gpios = <&gpiob GECKO_PIN(1) GPIO_ACTIVE_LOW>; + gpios = <&gpiob 1 GPIO_ACTIVE_LOW>; label = "User Push Button 0"; zephyr,code = ; }; @@ -35,7 +35,7 @@ wake_up_trigger: gpio-wake-up { compatible = "silabs,gecko-wake-up-trigger"; - gpios = <&gpioa GECKO_PIN(5) GPIO_ACTIVE_LOW>; + gpios = <&gpioa 5 GPIO_ACTIVE_LOW>; }; /* GPIOs that power up different sensors */ @@ -138,17 +138,6 @@ status = "okay"; }; -&pinctrl { - i2c0_default: i2c0_default { - group1 { - psels = , - , - , - ; - }; - }; -}; - &i2c0 { pinctrl-0 = <&i2c0_default>; pinctrl-names = "default"; diff --git a/boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a-pinctrl.dtsi b/boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a-pinctrl.dtsi new file mode 100644 index 000000000000000..915d9bfe2096ad3 --- /dev/null +++ b/boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a-pinctrl.dtsi @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2024 Silicon Laboratories Inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&pinctrl { + usart0_default: usart0_default { + group0 { + pins = , ; + drive-push-pull; + output-high; + }; + group1 { + pins = ; + input-enable; + }; + }; + + usart1_default: usart1_default { + group0 { + pins = ; + drive-push-pull; + output-high; + }; + group1 { + pins = ; + input-enable; + silabs,input-filter; + }; + }; + + i2c0_default: i2c0_default { + group0 { + pins = , ; + drive-open-drain; + bias-pull-up; + }; + }; +}; diff --git a/boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a.dts b/boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a.dts index 81342b36d8cf095..f201a09e86a8f78 100644 --- a/boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a.dts +++ b/boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a.dts @@ -6,7 +6,7 @@ /dts-v1/; #include -#include +#include "xg27_dk2602a-pinctrl.dtsi" #include "thunderboard.dtsi" #include @@ -106,25 +106,25 @@ }; &led0 { - gpios = <&gpioa GECKO_PIN(4) GPIO_ACTIVE_HIGH>; + gpios = <&gpioa 4 GPIO_ACTIVE_HIGH>; }; &sw_sensor_enable { - enable-gpios = <&gpioc GECKO_PIN(6) GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpioc 6 GPIO_ACTIVE_HIGH>; }; &sw_mic_enable { - enable-gpios = <&gpioc GECKO_PIN(7) GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpioc 7 GPIO_ACTIVE_HIGH>; }; &sw_imu_enable { - enable-gpios = <&gpiob GECKO_PIN(4) GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpiob 4 GPIO_ACTIVE_HIGH>; }; &button0 { - gpios = <&gpiob GECKO_PIN(3) GPIO_ACTIVE_LOW>; + gpios = <&gpiob 3 GPIO_ACTIVE_LOW>; }; &bt_hci_silabs { diff --git a/boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a.yaml b/boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a.yaml index b725374398e3f84..519f9ce9a9e2dca 100644 --- a/boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a.yaml +++ b/boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a.yaml @@ -13,5 +13,6 @@ supported: - counter - gpio - uart + - dma - clock_control vendor: silabs diff --git a/boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a_defconfig b/boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a_defconfig index 40057c1dd75a495..b7da445368cb136 100644 --- a/boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a_defconfig +++ b/boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a_defconfig @@ -8,4 +8,3 @@ CONFIG_GPIO=y CONFIG_SOC_GECKO_EMU_DCDC=y CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y CONFIG_HW_STACK_PROTECTION=y -CONFIG_PINCTRL=y diff --git a/boards/silabs/radio_boards/common/efr32-series1-common.dtsi b/boards/silabs/radio_boards/common/efr32-series1-common.dtsi index 8ff361eccaaec0a..72e771c1b28b938 100644 --- a/boards/silabs/radio_boards/common/efr32-series1-common.dtsi +++ b/boards/silabs/radio_boards/common/efr32-series1-common.dtsi @@ -11,6 +11,7 @@ chosen { zephyr,console = &usart0; zephyr,shell-uart = &usart0; + zephyr,uart-pipe = &usart0; zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,code-partition = &slot0_partition; diff --git a/boards/silabs/radio_boards/slwrb4104a/Kconfig.defconfig b/boards/silabs/radio_boards/slwrb4104a/Kconfig.defconfig index 37a549f4fa7ea6b..35290c1e5641d6c 100644 --- a/boards/silabs/radio_boards/slwrb4104a/Kconfig.defconfig +++ b/boards/silabs/radio_boards/slwrb4104a/Kconfig.defconfig @@ -10,10 +10,6 @@ config CMU_HFXO_FREQ config CMU_LFXO_FREQ default 32768 -config FLASH_BASE_ADDRESS - hex - default 0x0 - config LOG_BACKEND_SWO_FREQ_HZ default 875000 depends on LOG_BACKEND_SWO diff --git a/boards/silabs/radio_boards/slwrb4104a/board.yml b/boards/silabs/radio_boards/slwrb4104a/board.yml index d1122ace33140b3..65e82240b973e53 100644 --- a/boards/silabs/radio_boards/slwrb4104a/board.yml +++ b/boards/silabs/radio_boards/slwrb4104a/board.yml @@ -1,5 +1,6 @@ -boards: - - name: slwrb4104a - full_name: EFR32BG13 2.4 GHz 10 dBm (SLWRB4104A) - socs: - - name: efr32bg13p632f512gm48 +board: + name: slwrb4104a + full_name: EFR32BG13 2.4 GHz 10 dBm (SLWRB4104A) + vendor: silabs + socs: + - name: efr32bg13p632f512gm48 diff --git a/boards/silabs/radio_boards/slwrb4161a/Kconfig.defconfig b/boards/silabs/radio_boards/slwrb4161a/Kconfig.defconfig index 0c706e35bcbfabc..a9577b3eac532d6 100644 --- a/boards/silabs/radio_boards/slwrb4161a/Kconfig.defconfig +++ b/boards/silabs/radio_boards/slwrb4161a/Kconfig.defconfig @@ -10,10 +10,6 @@ config CMU_HFXO_FREQ config CMU_LFXO_FREQ default 32768 -config FLASH_BASE_ADDRESS - hex - default 0x0 - config LOG_BACKEND_SWO_FREQ_HZ default 875000 depends on LOG_BACKEND_SWO diff --git a/boards/silabs/radio_boards/slwrb4161a/board.yml b/boards/silabs/radio_boards/slwrb4161a/board.yml index fd0c68e48b2a941..4d5fa40b8be3067 100644 --- a/boards/silabs/radio_boards/slwrb4161a/board.yml +++ b/boards/silabs/radio_boards/slwrb4161a/board.yml @@ -1,5 +1,6 @@ -boards: - - name: slwrb4161a - full_name: EFR32MG12 2.4 GHz 19 dBm (SLWRB4161A) - socs: - - name: efr32mg12p432f1024gl125 +board: + name: slwrb4161a + full_name: EFR32MG12 2.4 GHz 19 dBm (SLWRB4161A) + vendor: silabs + socs: + - name: efr32mg12p432f1024gl125 diff --git a/boards/silabs/radio_boards/slwrb4170a/Kconfig.defconfig b/boards/silabs/radio_boards/slwrb4170a/Kconfig.defconfig index b9054a3c46c515e..47f7d487a2526fd 100644 --- a/boards/silabs/radio_boards/slwrb4170a/Kconfig.defconfig +++ b/boards/silabs/radio_boards/slwrb4170a/Kconfig.defconfig @@ -10,10 +10,6 @@ config CMU_HFXO_FREQ config CMU_LFXO_FREQ default 32768 -config FLASH_BASE_ADDRESS - hex - default 0x0 - config LOG_BACKEND_SWO_FREQ_HZ default 875000 depends on LOG_BACKEND_SWO diff --git a/boards/silabs/radio_boards/slwrb4170a/board.yml b/boards/silabs/radio_boards/slwrb4170a/board.yml index 5d9fd340d3e0b98..63a0445c9bb7fd7 100644 --- a/boards/silabs/radio_boards/slwrb4170a/board.yml +++ b/boards/silabs/radio_boards/slwrb4170a/board.yml @@ -1,5 +1,6 @@ -boards: - - name: slwrb4170a - full_name: EFR32MG12 2400/868-915 MHz 19 dBm Dual Band (SLWRB4170A) - socs: - - name: efr32mg12p433f1024gm68 +board: + name: slwrb4170a + full_name: EFR32MG12 2400/868-915 MHz 19 dBm Dual Band (SLWRB4170A) + vendor: silabs + socs: + - name: efr32mg12p433f1024gm68 diff --git a/boards/silabs/radio_boards/slwrb4180a/Kconfig.defconfig b/boards/silabs/radio_boards/slwrb4180a/Kconfig.defconfig index 5f917d659c6c646..1bce3f09eaf0b6b 100644 --- a/boards/silabs/radio_boards/slwrb4180a/Kconfig.defconfig +++ b/boards/silabs/radio_boards/slwrb4180a/Kconfig.defconfig @@ -10,10 +10,6 @@ config CMU_HFXO_FREQ config CMU_LFXO_FREQ default 32768 -config FLASH_BASE_ADDRESS - hex - default 0x0 - config LOG_BACKEND_SWO_FREQ_HZ default 875000 depends on LOG_BACKEND_SWO diff --git a/boards/silabs/radio_boards/slwrb4180a/board.yml b/boards/silabs/radio_boards/slwrb4180a/board.yml index f77ecb3f65b195c..d5f3955ba86aab7 100644 --- a/boards/silabs/radio_boards/slwrb4180a/board.yml +++ b/boards/silabs/radio_boards/slwrb4180a/board.yml @@ -1,5 +1,6 @@ -boards: - - name: slwrb4180a - full_name: EFR32xG21 2.4 GHz 20 dBm (SLWRB4180A) - socs: - - name: efr32mg21a020f1024im32 +board: + name: slwrb4180a + full_name: EFR32xG21 2.4 GHz 20 dBm (SLWRB4180A) + vendor: silabs + socs: + - name: efr32mg21a020f1024im32 diff --git a/boards/silabs/radio_boards/slwrb4180a/doc/index.rst b/boards/silabs/radio_boards/slwrb4180a/doc/index.rst index 4bdaf3763091912..d49a5770e4c5b2e 100644 --- a/boards/silabs/radio_boards/slwrb4180a/doc/index.rst +++ b/boards/silabs/radio_boards/slwrb4180a/doc/index.rst @@ -56,6 +56,8 @@ The board configuration supports the following hardware features: +-----------+------------+-------------------------------------+ | I2C | on-chip | i2c port-polling | +-----------+------------+-------------------------------------+ +| DMA | on-chip | ldma | ++-----------+------------+-------------------------------------+ | WATCHDOG | on-chip | watchdog | +-----------+------------+-------------------------------------+ diff --git a/boards/silabs/radio_boards/slwrb4180a/slwrb4180a-pinctrl.dtsi b/boards/silabs/radio_boards/slwrb4180a/slwrb4180a-pinctrl.dtsi index 74723695d8647ac..146c08618582d84 100644 --- a/boards/silabs/radio_boards/slwrb4180a/slwrb4180a-pinctrl.dtsi +++ b/boards/silabs/radio_boards/slwrb4180a/slwrb4180a-pinctrl.dtsi @@ -1,18 +1,23 @@ /* * Copyright (c) 2023 Antmicro + * Copyright (c) 2024 Silicon Laboratories Inc. * * SPDX-License-Identifier: Apache-2.0 */ -#include -#include +#include &pinctrl { usart0_default: usart0_default { + group0 { + pins = ; + drive-push-pull; + output-high; + }; group1 { - psels = , - , - ; + pins = ; + input-enable; + silabs,input-filter; }; }; }; diff --git a/boards/silabs/radio_boards/slwrb4180a/slwrb4180a.dts b/boards/silabs/radio_boards/slwrb4180a/slwrb4180a.dts index 01027ae6700f437..48154c0b87984d8 100644 --- a/boards/silabs/radio_boards/slwrb4180a/slwrb4180a.dts +++ b/boards/silabs/radio_boards/slwrb4180a/slwrb4180a.dts @@ -16,6 +16,7 @@ chosen { zephyr,console = &usart0; zephyr,shell-uart = &usart0; + zephyr,uart-pipe = &usart0; zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,code-partition = &slot0_partition; diff --git a/boards/silabs/radio_boards/slwrb4180a/slwrb4180a.yaml b/boards/silabs/radio_boards/slwrb4180a/slwrb4180a.yaml index 66ff5e7920f8840..580908453da9cb8 100644 --- a/boards/silabs/radio_boards/slwrb4180a/slwrb4180a.yaml +++ b/boards/silabs/radio_boards/slwrb4180a/slwrb4180a.yaml @@ -13,6 +13,7 @@ supported: - gpio - nvs - uart + - dma - watchdog testing: ignore_tags: diff --git a/boards/silabs/radio_boards/slwrb4180a/slwrb4180a_defconfig b/boards/silabs/radio_boards/slwrb4180a/slwrb4180a_defconfig index 6559f1ffd212052..e70f8f5c5197d2c 100644 --- a/boards/silabs/radio_boards/slwrb4180a/slwrb4180a_defconfig +++ b/boards/silabs/radio_boards/slwrb4180a/slwrb4180a_defconfig @@ -5,4 +5,3 @@ CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y CONFIG_SERIAL=y CONFIG_GPIO=y -CONFIG_PINCTRL=y diff --git a/boards/silabs/radio_boards/slwrb4250b/Kconfig.defconfig b/boards/silabs/radio_boards/slwrb4250b/Kconfig.defconfig index 489fc5c7a6989a9..3ac04f0f6712436 100644 --- a/boards/silabs/radio_boards/slwrb4250b/Kconfig.defconfig +++ b/boards/silabs/radio_boards/slwrb4250b/Kconfig.defconfig @@ -10,10 +10,6 @@ config CMU_HFXO_FREQ config CMU_LFXO_FREQ default 32768 -config FLASH_BASE_ADDRESS - hex - default 0x0 - config LOG_BACKEND_SWO_FREQ_HZ default 875000 depends on LOG_BACKEND_SWO diff --git a/boards/silabs/radio_boards/slwrb4250b/board.yml b/boards/silabs/radio_boards/slwrb4250b/board.yml index 052b39f83c308c1..63de8182fbd5556 100644 --- a/boards/silabs/radio_boards/slwrb4250b/board.yml +++ b/boards/silabs/radio_boards/slwrb4250b/board.yml @@ -1,5 +1,6 @@ -boards: - - name: slwrb4250b - full_name: EFR32FG1 2400/868 MHz 13 dBm Dual Band (SLWRB4250B) - socs: - - name: efr32fg1p133f256gm48 +board: + name: slwrb4250b + full_name: EFR32FG1 2400/868 MHz 13 dBm Dual Band (SLWRB4250B) + vendor: silabs + socs: + - name: efr32fg1p133f256gm48 diff --git a/boards/silabs/radio_boards/slwrb4255a/Kconfig.defconfig b/boards/silabs/radio_boards/slwrb4255a/Kconfig.defconfig index c0ac1bf3b3af38c..ffc370954f58e8b 100644 --- a/boards/silabs/radio_boards/slwrb4255a/Kconfig.defconfig +++ b/boards/silabs/radio_boards/slwrb4255a/Kconfig.defconfig @@ -10,10 +10,6 @@ config CMU_HFXO_FREQ config CMU_LFXO_FREQ default 32768 -config FLASH_BASE_ADDRESS - hex - default 0x0 - config LOG_BACKEND_SWO_FREQ_HZ default 875000 depends on LOG_BACKEND_SWO diff --git a/boards/silabs/radio_boards/slwrb4255a/board.yml b/boards/silabs/radio_boards/slwrb4255a/board.yml index 841a0858e13f4f3..b6740ec96859bc3 100644 --- a/boards/silabs/radio_boards/slwrb4255a/board.yml +++ b/boards/silabs/radio_boards/slwrb4255a/board.yml @@ -1,5 +1,6 @@ -boards: - - name: slwrb4255a - full_name: EFR32FG13 2400/915 MHz 19 dBm Dual Band (SLWRB4255A) - socs: - - name: efr32fg13p233f512gm48 +board: + name: slwrb4255a + full_name: EFR32FG13 2400/915 MHz 19 dBm Dual Band (SLWRB4255A) + vendor: silabs + socs: + - name: efr32fg13p233f512gm48 diff --git a/boards/silabs/radio_boards/slwrb4321a/doc/index.rst b/boards/silabs/radio_boards/slwrb4321a/doc/index.rst index 85237f7286ad026..ccd82c5387e3cc8 100644 --- a/boards/silabs/radio_boards/slwrb4321a/doc/index.rst +++ b/boards/silabs/radio_boards/slwrb4321a/doc/index.rst @@ -112,7 +112,7 @@ Programming and Debugging .. note:: Before using the kit the first time, you should update the J-Link firmware - from `J-Link-Downloads`_ + in Simplicity Studio. Flashing ======== @@ -172,6 +172,3 @@ terminal session: .. _J-Link: https://www.segger.com/jlink-debug-probes.html - -.. _J-Link-Downloads: - https://www.segger.com/downloads/jlink diff --git a/boards/silabs/radio_boards/slwrb4321a/slwrb4321a.dts b/boards/silabs/radio_boards/slwrb4321a/slwrb4321a.dts index 4dfff28a2dc82c5..a778fbfb1801121 100644 --- a/boards/silabs/radio_boards/slwrb4321a/slwrb4321a.dts +++ b/boards/silabs/radio_boards/slwrb4321a/slwrb4321a.dts @@ -18,6 +18,7 @@ chosen { zephyr,console = &usart0; zephyr,shell-uart = &usart0; + zephyr,uart-pipe = &usart0; zephyr,sram = &sram0; zephyr,flash = &flash0; }; diff --git a/boards/silabs/radio_boards/xg23_rb4210a/Kconfig.defconfig b/boards/silabs/radio_boards/xg23_rb4210a/Kconfig.defconfig new file mode 100644 index 000000000000000..ef71c72d3a4b67a --- /dev/null +++ b/boards/silabs/radio_boards/xg23_rb4210a/Kconfig.defconfig @@ -0,0 +1,23 @@ +# Copyright (c) 2024 Yishai Jaffe +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_XG23_RB4210A + +config CMU_HFXO_FREQ + default 39000000 + +config CMU_LFXO_FREQ + default 32768 + +config LOG_BACKEND_SWO_FREQ_HZ + default 875000 + depends on LOG_BACKEND_SWO + +if SOC_GECKO_USE_RAIL + +config FPU + default y + +endif # SOC_GECKO_USE_RAIL + +endif # BOARD_XG23_RB4210A diff --git a/boards/silabs/radio_boards/xg23_rb4210a/Kconfig.xg23_rb4210a b/boards/silabs/radio_boards/xg23_rb4210a/Kconfig.xg23_rb4210a new file mode 100644 index 000000000000000..cec62787ad5a301 --- /dev/null +++ b/boards/silabs/radio_boards/xg23_rb4210a/Kconfig.xg23_rb4210a @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Yishai Jaffe +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_XG23_RB4210A + select SOC_PART_NUMBER_EFR32ZG23B020F512IM48 diff --git a/boards/silabs/radio_boards/xg23_rb4210a/board.cmake b/boards/silabs/radio_boards/xg23_rb4210a/board.cmake new file mode 100644 index 000000000000000..7cbad4e887b54c1 --- /dev/null +++ b/boards/silabs/radio_boards/xg23_rb4210a/board.cmake @@ -0,0 +1,10 @@ +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(jlink "--device=EFR32ZG23BxxxF512") +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) + +board_runner_args(openocd) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) + +board_runner_args(silabs_commander "--device=EFR32ZG23B020F512IM48") +include(${ZEPHYR_BASE}/boards/common/silabs_commander.board.cmake) diff --git a/boards/silabs/radio_boards/xg23_rb4210a/board.yml b/boards/silabs/radio_boards/xg23_rb4210a/board.yml new file mode 100644 index 000000000000000..42d6b9ff707dd5d --- /dev/null +++ b/boards/silabs/radio_boards/xg23_rb4210a/board.yml @@ -0,0 +1,6 @@ +board: + name: xg23_rb4210a + full_name: EFR32xG23 868-915 MHz 20 dBm (xG23-RB4210A) + vendor: silabs + socs: + - name: efr32zg23b020f512im48 diff --git a/boards/silabs/radio_boards/xg23_rb4210a/doc/efr32zg23-xg23-rb4210a.jpg b/boards/silabs/radio_boards/xg23_rb4210a/doc/efr32zg23-xg23-rb4210a.jpg new file mode 100644 index 000000000000000..904a9ae03ac71bd Binary files /dev/null and b/boards/silabs/radio_boards/xg23_rb4210a/doc/efr32zg23-xg23-rb4210a.jpg differ diff --git a/boards/silabs/radio_boards/xg23_rb4210a/doc/index.rst b/boards/silabs/radio_boards/xg23_rb4210a/doc/index.rst new file mode 100644 index 000000000000000..153ef502a7c720e --- /dev/null +++ b/boards/silabs/radio_boards/xg23_rb4210a/doc/index.rst @@ -0,0 +1,152 @@ +.. zephyr:board:: xg23_rb4210a + +Overview +******** + +The EFR32ZG23 Radio Board is the radio board delivered with +`xG23-PK6068A Website`_. It contains a Wireless System-On-Chip from the +EFR32ZG23 family built on an ARM Cortex®-M33 processor with excellent low +power capabilities. + +The BRD4210A a.k.a. xG23-RB4210A radio board plugs into the Wireless Pro Kit +Mainboard BRD4002A and is supported as one of :ref:`silabs_radio_boards`. + +Hardware +******** + +- EFR32ZG23B020F512IM48 SoC +- CPU core: ARM Cortex®-M33 with FPU +- Flash memory: 512 kB +- RAM: 64 kB +- Transmit power: up to +20 dBm +- Operation frequency: 868-915 MHz +- Crystals for LFXO (32.768 kHz) and HFXO (39 MHz). + +For more information about the EFR32ZG23 SoC and BRD4210A board, refer to these +documents: + +- `EFR32ZG23 Website`_ +- `EFR32ZG23 Datasheet`_ +- `EFR32xG23 Reference Manual`_ +- `xG23-PK6068A Website`_ +- `BRD4210A User Guide`_ + +Supported Features +================== + +The board configuration supports the following hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| MPU | on-chip | memory protection unit | ++-----------+------------+-------------------------------------+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| SYSTICK | on-chip | systick | ++-----------+------------+-------------------------------------+ +| COUNTER | on-chip | stimer | ++-----------+------------+-------------------------------------+ +| FLASH | on-chip | flash memory | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial | ++-----------+------------+-------------------------------------+ +| DMA | on-chip | ldma | ++-----------+------------+-------------------------------------+ +| I2C | on-chip | i2c | ++-----------+------------+-------------------------------------+ +| SPI | on-chip | spi | ++-----------+------------+-------------------------------------+ +| TRNG | on-chip | semailbox | ++-----------+------------+-------------------------------------+ +| WATCHDOG | on-chip | watchdog | ++-----------+------------+-------------------------------------+ + +Other hardware features are currently not supported by the port. + +Connections and IOs +=================== + +In the following table, the column **Name** contains Pin names. For example, PA2 +means Pin number 2 on PORTA, as used in the board's datasheets and manuals. + ++-------+-------------+-------------------------------------+ +| Name | Function | Usage | ++=======+=============+=====================================+ +| PB2 | GPIO | LED0 | ++-------+-------------+-------------------------------------+ +| PD3 | GPIO | LED1 | ++-------+-------------+-------------------------------------+ +| PB1 | GPIO | Push Button 0 | ++-------+-------------+-------------------------------------+ +| PB3 | GPIO | Push Button 1 | ++-------+-------------+-------------------------------------+ +| PB0 | GPIO | Board Controller Enable | +| | | VCOM_ENABLE | ++-------+-------------+-------------------------------------+ +| PA8 | USART0_TX | UART Console VCOM_TX US0_TX | ++-------+-------------+-------------------------------------+ +| PA9 | USART0_RX | UART Console VCOM_RX US0_RX | ++-------+-------------+-------------------------------------+ + +The default configuration can be found in +:zephyr_file:`boards/silabs/radio_boards/xg23_rb4210a/xg23_rb4210a_defconfig` + +System Clock +============ + +The EFR32ZG23 SoC is configured to use the 39 MHz external oscillator on the +board. + +Serial Port +=========== + +The EFR32ZG23 SoC has one USART and three EUSARTs. +USART0 is connected to the board controller and is used for the console. + +Programming and Debugging +************************* + +Flashing +======== + +Connect the BRD4002A board with a mounted BRD4210A radio module to your host +computer using the USB port. + +Here is an example for the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: xg23_rb4210a + :goals: flash + +Open a serial terminal (minicom, putty, etc.) with the following settings: + +- Speed: 115200 +- Data: 8 bits +- Parity: None +- Stop bits: 1 + +Reset the board and you should see the following message in the terminal: + +.. code-block:: console + + Hello World! xg23_rb4210a/efr32zg23b020f512im48 + + +.. _xG23-PK6068A Website: + https://www.silabs.com/development-tools/wireless/efr32xg23-pro-kit-20-dbm + +.. _BRD4210A User Guide: + https://www.silabs.com/documents/public/user-guides/ug507-brd4210a-user-guide.pdf + +.. _EFR32ZG23 Website: + https://www.silabs.com/wireless/z-wave/800-series-modem-soc + +.. _EFR32ZG23 Datasheet: + https://www.silabs.com/documents/public/data-sheets/efr32zg23-datasheet.pdf + +.. _EFR32xG23 Reference Manual: + https://www.silabs.com/documents/public/reference-manuals/efr32xg23-rm.pdf diff --git a/boards/silabs/radio_boards/xg23_rb4210a/pre_dt_board.cmake b/boards/silabs/radio_boards/xg23_rb4210a/pre_dt_board.cmake new file mode 100644 index 000000000000000..beb76b85552d14d --- /dev/null +++ b/boards/silabs/radio_boards/xg23_rb4210a/pre_dt_board.cmake @@ -0,0 +1,5 @@ +# Copyright (c) 2021 Linaro Limited +# SPDX-License-Identifier: Apache-2.0 + +# SPI is implemented via usart so node name isn't spi@... +list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge") diff --git a/boards/silabs/radio_boards/xg23_rb4210a/support/openocd.cfg b/boards/silabs/radio_boards/xg23_rb4210a/support/openocd.cfg new file mode 100644 index 000000000000000..38409eb70ad7952 --- /dev/null +++ b/boards/silabs/radio_boards/xg23_rb4210a/support/openocd.cfg @@ -0,0 +1,25 @@ +if {[info exists env(OPENOCD_INTERFACE)]} { + set INTERFACE $env(OPENOCD_INTERFACE) +} else { + # By default connect over Debug USB port using the J-Link interface + set INTERFACE "jlink" +} + +source [find interface/$INTERFACE.cfg] + +transport select swd + +set CHIPNAME efr32 + +source [find target/efm32.cfg] + +$_TARGETNAME configure -event gdb-attach { + echo "Debugger attaching: halting execution" + reset halt + gdb_breakpoint_override hard +} + +$_TARGETNAME configure -event gdb-detach { + echo "Debugger detaching: resuming execution" + resume +} diff --git a/boards/silabs/radio_boards/xg23_rb4210a/xg23_rb4210a-pinctrl.dtsi b/boards/silabs/radio_boards/xg23_rb4210a/xg23_rb4210a-pinctrl.dtsi new file mode 100644 index 000000000000000..9b7f1b02c584bcc --- /dev/null +++ b/boards/silabs/radio_boards/xg23_rb4210a/xg23_rb4210a-pinctrl.dtsi @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2024 Yishai Jaffe + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&pinctrl { + usart0_default: usart0_default { + group0 { + pins = ; + drive-push-pull; + output-high; + }; + group1 { + pins = ; + input-enable; + silabs,input-filter; + }; + }; +}; diff --git a/boards/silabs/radio_boards/xg23_rb4210a/xg23_rb4210a.dts b/boards/silabs/radio_boards/xg23_rb4210a/xg23_rb4210a.dts new file mode 100644 index 000000000000000..c5800aeb520491d --- /dev/null +++ b/boards/silabs/radio_boards/xg23_rb4210a/xg23_rb4210a.dts @@ -0,0 +1,201 @@ +/* + * Copyright (c) 2024 Yishai Jaffe + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include +#include +#include "xg23_rb4210a-pinctrl.dtsi" + +/ { + model = "Silicon Labs BRD4210A"; + compatible = "silabs,xg23_rb4210a", "silabs,efr32zg23"; + + chosen { + zephyr,console = &usart0; + zephyr,shell-uart = &usart0; + zephyr,uart-pipe = &usart0; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + }; + + aliases { + led0 = &led0; + led1 = &led1; + sw0 = &button0; + sw1 = &button1; + watchdog0 = &wdog0; + }; + + leds { + compatible = "gpio-leds"; + led0: led_0 { + gpios = <&gpiob 2 GPIO_ACTIVE_HIGH>; + label = "LED 0"; + }; + led1: led_1 { + gpios = <&gpiod 3 GPIO_ACTIVE_HIGH>; + label = "LED 1"; + }; + }; + + buttons { + compatible = "gpio-keys"; + button0: button_0 { + gpios = <&gpiob 1 GPIO_ACTIVE_LOW>; + label = "User Push Button 0"; + zephyr,code = ; + }; + button1: button_1 { + gpios = <&gpiob 3 GPIO_ACTIVE_LOW>; + label = "User Push Button 1"; + zephyr,code = ; + }; + }; + +}; + +&cpu0 { + clock-frequency = <78000000>; +}; + +&pstate_em3 { + status = "disabled"; +}; + +&hfxo { + status = "okay"; + ctune = <106>; + precision = <50>; +}; + +&lfxo { + status = "okay"; + ctune = <38>; + precision = <50>; +}; + +&hfrcodpll { + clock-frequency = ; + clocks = <&hfxo>; + dpll-n = <3839>; + dpll-m = <1919>; + dpll-edge = "fall"; + dpll-lock = "phase"; + dpll-autorecover; +}; + +&em23grpaclk { + clocks = <&lfxo>; +}; + +&em4grpaclk { + clocks = <&lfxo>; +}; + +&sysrtcclk { + clocks = <&lfxo>; +}; + +&wdog0clk { + clocks = <&lfxo>; +}; + +&wdog1clk { + clocks = <&lfxo>; +}; + +&usart0 { + current-speed = <115200>; + pinctrl-0 = <&usart0_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio { + status = "okay"; +}; + +&gpioa { + status = "okay"; +}; + +&gpiob { + status = "okay"; + + board-controller-enable { + gpio-hog; + gpios = <0 GPIO_ACTIVE_HIGH>; + output-high; + }; +}; + +&gpioc { + status = "okay"; +}; + +&gpiod { + status = "okay"; +}; + +&wdog0 { + status = "okay"; +}; + +&sysrtc0 { + status = "okay"; +}; + +&se { + status = "okay"; +}; + +&dcdc { + status = "okay"; + regulator-boot-on; + regulator-initial-mode = ; + silabs,pfmx-peak-current-milliamp = <80>; +}; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* Reserve 48 kB for the bootloader */ + boot_partition: partition@0 { + label = "mcuboot"; + reg = <0x0 DT_SIZE_K(48)>; + read-only; + }; + + /* Reserve 208 kB for the application in slot 0 */ + slot0_partition: partition@c000 { + label = "image-0"; + reg = <0x0000c000 DT_SIZE_K(208)>; + }; + + /* Reserve 208 kB for the application in slot 1 */ + slot1_partition: partition@40000 { + label = "image-1"; + reg = <0x00040000 DT_SIZE_K(208)>; + }; + + /* Reserve 32 kB for the scratch partition */ + scratch_partition: partition@74000 { + label = "image-scratch"; + reg = <0x00074000 DT_SIZE_K(32)>; + }; + + /* Set 16 kB of storage at the end of the 1536 kB of flash */ + storage_partition: partition@7c000 { + label = "storage"; + reg = <0x0007c000 DT_SIZE_K(16)>; + }; + }; +}; diff --git a/boards/silabs/radio_boards/xg23_rb4210a/xg23_rb4210a.yaml b/boards/silabs/radio_boards/xg23_rb4210a/xg23_rb4210a.yaml new file mode 100644 index 000000000000000..a9229ef60b150c2 --- /dev/null +++ b/boards/silabs/radio_boards/xg23_rb4210a/xg23_rb4210a.yaml @@ -0,0 +1,27 @@ +identifier: xg23_rb4210a +name: EFR32xG23 868-915 MHz 20 dBm Radio Board (xG23-RB4210A, BRD4210A) +type: mcu +arch: arm +ram: 64 +flash: 512 +toolchain: + - zephyr + - gnuarmemb + - xtools +supported: + - clock_control + - counter + - entropy + - flash + - gpio + - i2c + - led + - pinctrl + - spi + - uart + - dma + - watchdog +testing: + ignore_tags: + - pm +vendor: silabs diff --git a/boards/silabs/radio_boards/xg23_rb4210a/xg23_rb4210a_defconfig b/boards/silabs/radio_boards/xg23_rb4210a/xg23_rb4210a_defconfig new file mode 100644 index 000000000000000..d937f7c3052ba54 --- /dev/null +++ b/boards/silabs/radio_boards/xg23_rb4210a/xg23_rb4210a_defconfig @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_ARM_MPU=y +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_GPIO=y +CONFIG_SOC_GECKO_EMU_DCDC=y +CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y diff --git a/boards/silabs/radio_boards/xg24_rb4187c/Kconfig.defconfig b/boards/silabs/radio_boards/xg24_rb4187c/Kconfig.defconfig index 0d0d7b04ce2831b..30f86618bfff5ef 100644 --- a/boards/silabs/radio_boards/xg24_rb4187c/Kconfig.defconfig +++ b/boards/silabs/radio_boards/xg24_rb4187c/Kconfig.defconfig @@ -10,10 +10,6 @@ config CMU_HFXO_FREQ config CMU_LFXO_FREQ default 32768 -config FLASH_BASE_ADDRESS - hex - default 0x08000000 - config LOG_BACKEND_SWO_FREQ_HZ default 875000 depends on LOG_BACKEND_SWO diff --git a/boards/silabs/radio_boards/xg24_rb4187c/board.yml b/boards/silabs/radio_boards/xg24_rb4187c/board.yml index 36457142237540a..d4254a0c42de738 100644 --- a/boards/silabs/radio_boards/xg24_rb4187c/board.yml +++ b/boards/silabs/radio_boards/xg24_rb4187c/board.yml @@ -1,5 +1,6 @@ -boards: - - name: xg24_rb4187c - full_name: EFR32xG24 2.4 GHz 20 dBm (xG24-RB4187C) - socs: - - name: efr32mg24b220f1536im48 +board: + name: xg24_rb4187c + full_name: EFR32xG24 2.4 GHz 20 dBm (xG24-RB4187C) + vendor: silabs + socs: + - name: efr32mg24b220f1536im48 diff --git a/boards/silabs/radio_boards/xg24_rb4187c/doc/index.rst b/boards/silabs/radio_boards/xg24_rb4187c/doc/index.rst index 82804d3e93f29ea..f104714f2b3f773 100644 --- a/boards/silabs/radio_boards/xg24_rb4187c/doc/index.rst +++ b/boards/silabs/radio_boards/xg24_rb4187c/doc/index.rst @@ -53,6 +53,8 @@ The board configuration supports the following hardware features: +-----------+------------+-------------------------------------+ | UART | on-chip | serial | +-----------+------------+-------------------------------------+ +| DMA | on-chip | ldma | ++-----------+------------+-------------------------------------+ | I2C | on-chip | i2c | +-----------+------------+-------------------------------------+ | TRNG | on-chip | semailbox | diff --git a/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c-pinctrl.dtsi b/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c-pinctrl.dtsi index 0ea520ce13f5b63..75e9112e69c1a4b 100644 --- a/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c-pinctrl.dtsi +++ b/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c-pinctrl.dtsi @@ -4,15 +4,19 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include -#include +#include &pinctrl { usart0_default: usart0_default { + group0 { + pins = ; + drive-push-pull; + output-high; + }; group1 { - psels = , - , - ; + pins = ; + input-enable; + silabs,input-filter; }; }; }; diff --git a/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c.dts b/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c.dts index 7c45892f8d145d7..819ed7cd80037d5 100644 --- a/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c.dts +++ b/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c.dts @@ -17,6 +17,7 @@ chosen { zephyr,console = &usart0; zephyr,shell-uart = &usart0; + zephyr,uart-pipe = &usart0; zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,code-partition = &slot0_partition; @@ -35,11 +36,11 @@ leds { compatible = "gpio-leds"; led0: led_0 { - gpios = <&gpiob GECKO_PIN(2) GPIO_ACTIVE_HIGH>; + gpios = <&gpiob 2 GPIO_ACTIVE_HIGH>; label = "LED 0"; }; led1: led_1 { - gpios = <&gpiob GECKO_PIN(4) GPIO_ACTIVE_HIGH>; + gpios = <&gpiob 4 GPIO_ACTIVE_HIGH>; label = "LED 1"; }; }; @@ -47,12 +48,12 @@ buttons { compatible = "gpio-keys"; button0: button_0 { - gpios = <&gpiob GECKO_PIN(1) GPIO_ACTIVE_LOW>; + gpios = <&gpiob 1 GPIO_ACTIVE_LOW>; label = "User Push Button 0"; zephyr,code = ; }; button1: button_1 { - gpios = <&gpiob GECKO_PIN(3) GPIO_ACTIVE_LOW>; + gpios = <&gpiob 3 GPIO_ACTIVE_LOW>; label = "User Push Button 1"; zephyr,code = ; }; diff --git a/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c.yaml b/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c.yaml index 3b08119e53742f6..014021b5548c142 100644 --- a/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c.yaml +++ b/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c.yaml @@ -12,6 +12,7 @@ supported: - bluetooth - gpio - uart + - dma - watchdog testing: ignore_tags: diff --git a/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c_defconfig b/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c_defconfig index 9105d3b33441c16..d937f7c3052ba54 100644 --- a/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c_defconfig +++ b/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c_defconfig @@ -7,4 +7,3 @@ CONFIG_SERIAL=y CONFIG_GPIO=y CONFIG_SOC_GECKO_EMU_DCDC=y CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y -CONFIG_PINCTRL=y diff --git a/boards/silabs/starter_kits/efm32wg_stk3800/doc/index.rst b/boards/silabs/starter_kits/efm32wg_stk3800/doc/index.rst index d78df5eaaf1c04e..e8f4b9e432a03fa 100644 --- a/boards/silabs/starter_kits/efm32wg_stk3800/doc/index.rst +++ b/boards/silabs/starter_kits/efm32wg_stk3800/doc/index.rst @@ -99,7 +99,7 @@ Programming and Debugging .. note:: Before using the kit the first time, you should update the J-Link firmware - from `J-Link-Downloads`_ + in Simplicity Studio. Flashing ======== @@ -162,6 +162,3 @@ the following message: .. _J-Link: https://www.segger.com/jlink-debug-probes.html - -.. _J-Link-Downloads: - https://www.segger.com/downloads/jlink diff --git a/boards/silabs/starter_kits/slstk3400a/doc/index.rst b/boards/silabs/starter_kits/slstk3400a/doc/index.rst index f3e3f6314c56454..917865150080176 100644 --- a/boards/silabs/starter_kits/slstk3400a/doc/index.rst +++ b/boards/silabs/starter_kits/slstk3400a/doc/index.rst @@ -100,7 +100,7 @@ Programming and Debugging .. note:: Before using the kit the first time, you should update the J-Link firmware - from `J-Link-Downloads`_ + in Simplicity Studio. Flashing ======== @@ -162,6 +162,3 @@ Reset the board and you will see this message written to the serial port: .. _J-Link: https://www.segger.com/jlink-debug-probes.html - -.. _J-Link-Downloads: - https://www.segger.com/downloads/jlink diff --git a/boards/silabs/starter_kits/slstk3401a/doc/index.rst b/boards/silabs/starter_kits/slstk3401a/doc/index.rst index 0508a5894757bc6..8e5fa5fb1eeec9e 100644 --- a/boards/silabs/starter_kits/slstk3401a/doc/index.rst +++ b/boards/silabs/starter_kits/slstk3401a/doc/index.rst @@ -111,7 +111,7 @@ Programming and Debugging .. note:: Before using the kit the first time, you should update the J-Link firmware - from `J-Link-Downloads`_ + in Simplicity Studio. Flashing ======== @@ -174,6 +174,3 @@ terminal session: .. _J-Link: https://www.segger.com/jlink-debug-probes.html - -.. _J-Link-Downloads: - https://www.segger.com/downloads/jlink diff --git a/boards/silabs/starter_kits/slstk3402a/doc/index.rst b/boards/silabs/starter_kits/slstk3402a/doc/index.rst index f0dbd560fb396ba..3470e9e670157f6 100644 --- a/boards/silabs/starter_kits/slstk3402a/doc/index.rst +++ b/boards/silabs/starter_kits/slstk3402a/doc/index.rst @@ -134,7 +134,7 @@ Programming and Debugging .. note:: Before using the kit the first time, you should update the J-Link firmware - from `J-Link-Downloads`_ + in Simplicity Studio. Flashing ======== @@ -200,6 +200,3 @@ terminal session: .. _J-Link: https://www.segger.com/jlink-debug-probes.html - -.. _J-Link-Downloads: - https://www.segger.com/downloads/jlink diff --git a/boards/silabs/starter_kits/slstk3701a/doc/index.rst b/boards/silabs/starter_kits/slstk3701a/doc/index.rst index fcde5ddd2187657..d63c3f3844b3d3b 100644 --- a/boards/silabs/starter_kits/slstk3701a/doc/index.rst +++ b/boards/silabs/starter_kits/slstk3701a/doc/index.rst @@ -123,7 +123,7 @@ Programming and Debugging .. note:: Before using the kit the first time, you should update the J-Link firmware - from `J-Link-Downloads`_ + in Simplicity Studio. Flashing ======== @@ -186,6 +186,3 @@ terminal session: .. _J-Link: https://www.segger.com/jlink-debug-probes.html - -.. _J-Link-Downloads: - https://www.segger.com/downloads/jlink diff --git a/boards/snps/em_starterkit/em_starterkit_emsk_em11d_defconfig b/boards/snps/em_starterkit/em_starterkit_emsk_em11d_defconfig index 38979ec4912dbb3..132e072f56f9ce7 100644 --- a/boards/snps/em_starterkit/em_starterkit_emsk_em11d_defconfig +++ b/boards/snps/em_starterkit/em_starterkit_emsk_em11d_defconfig @@ -3,7 +3,6 @@ CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 CONFIG_XIP=n -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_BUILD_OUTPUT_BIN=n CONFIG_ARCV2_INTERRUPT_UNIT=y CONFIG_ARCV2_TIMER=y diff --git a/boards/snps/em_starterkit/em_starterkit_emsk_em7d_2_3_defconfig b/boards/snps/em_starterkit/em_starterkit_emsk_em7d_2_3_defconfig index 42963436cbc3d1e..f3d598c4b108fbd 100644 --- a/boards/snps/em_starterkit/em_starterkit_emsk_em7d_2_3_defconfig +++ b/boards/snps/em_starterkit/em_starterkit_emsk_em7d_2_3_defconfig @@ -3,7 +3,6 @@ CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 CONFIG_XIP=n -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_BUILD_OUTPUT_BIN=n CONFIG_ARCV2_INTERRUPT_UNIT=y CONFIG_ARCV2_TIMER=y diff --git a/boards/snps/em_starterkit/em_starterkit_emsk_em7d_defconfig b/boards/snps/em_starterkit/em_starterkit_emsk_em7d_defconfig index d9fa27c036b5678..2649fc165c82c08 100644 --- a/boards/snps/em_starterkit/em_starterkit_emsk_em7d_defconfig +++ b/boards/snps/em_starterkit/em_starterkit_emsk_em7d_defconfig @@ -3,7 +3,6 @@ CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 CONFIG_XIP=n -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_BUILD_OUTPUT_BIN=n CONFIG_ARCV2_INTERRUPT_UNIT=y CONFIG_ARCV2_TIMER=y diff --git a/boards/snps/em_starterkit/em_starterkit_emsk_em9d_defconfig b/boards/snps/em_starterkit/em_starterkit_emsk_em9d_defconfig index 38979ec4912dbb3..132e072f56f9ce7 100644 --- a/boards/snps/em_starterkit/em_starterkit_emsk_em9d_defconfig +++ b/boards/snps/em_starterkit/em_starterkit_emsk_em9d_defconfig @@ -3,7 +3,6 @@ CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 CONFIG_XIP=n -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_BUILD_OUTPUT_BIN=n CONFIG_ARCV2_INTERRUPT_UNIT=y CONFIG_ARCV2_TIMER=y diff --git a/boards/snps/emsdp/emsdp_emsdp_em11d_defconfig b/boards/snps/emsdp/emsdp_emsdp_em11d_defconfig index 666e1cb41fba3ba..1cbd8610dbb15a4 100644 --- a/boards/snps/emsdp/emsdp_emsdp_em11d_defconfig +++ b/boards/snps/emsdp/emsdp_emsdp_em11d_defconfig @@ -2,7 +2,6 @@ CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 CONFIG_XIP=n -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_BUILD_OUTPUT_BIN=n CONFIG_ARCV2_INTERRUPT_UNIT=y CONFIG_ARCV2_TIMER=y @@ -13,4 +12,3 @@ CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_ARC_MPU_ENABLE=y CONFIG_GPIO=y CONFIG_SPI=y -CONFIG_PINCTRL=y diff --git a/boards/snps/emsdp/emsdp_emsdp_em5d_defconfig b/boards/snps/emsdp/emsdp_emsdp_em5d_defconfig index 03f84b13a6496dc..1cbd8610dbb15a4 100644 --- a/boards/snps/emsdp/emsdp_emsdp_em5d_defconfig +++ b/boards/snps/emsdp/emsdp_emsdp_em5d_defconfig @@ -2,7 +2,6 @@ CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 CONFIG_XIP=n -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_BUILD_OUTPUT_BIN=n CONFIG_ARCV2_INTERRUPT_UNIT=y CONFIG_ARCV2_TIMER=y diff --git a/boards/snps/emsdp/emsdp_emsdp_em6_defconfig b/boards/snps/emsdp/emsdp_emsdp_em6_defconfig index 03f84b13a6496dc..1cbd8610dbb15a4 100644 --- a/boards/snps/emsdp/emsdp_emsdp_em6_defconfig +++ b/boards/snps/emsdp/emsdp_emsdp_em6_defconfig @@ -2,7 +2,6 @@ CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 CONFIG_XIP=n -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_BUILD_OUTPUT_BIN=n CONFIG_ARCV2_INTERRUPT_UNIT=y CONFIG_ARCV2_TIMER=y diff --git a/boards/snps/emsdp/emsdp_emsdp_em7d_defconfig b/boards/snps/emsdp/emsdp_emsdp_em7d_defconfig index d8581e40fabcaab..1c5957e438616aa 100644 --- a/boards/snps/emsdp/emsdp_emsdp_em7d_defconfig +++ b/boards/snps/emsdp/emsdp_emsdp_em7d_defconfig @@ -2,7 +2,6 @@ CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 CONFIG_XIP=n -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_BUILD_OUTPUT_BIN=n CONFIG_ARCV2_INTERRUPT_UNIT=y CONFIG_ARCV2_TIMER=y diff --git a/boards/snps/emsdp/emsdp_emsdp_em7d_esp_defconfig b/boards/snps/emsdp/emsdp_emsdp_em7d_esp_defconfig index d6de8dababf9bac..d347468026cfe0c 100644 --- a/boards/snps/emsdp/emsdp_emsdp_em7d_esp_defconfig +++ b/boards/snps/emsdp/emsdp_emsdp_em7d_esp_defconfig @@ -2,7 +2,6 @@ CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 CONFIG_XIP=n -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_BUILD_OUTPUT_BIN=n CONFIG_ARCV2_INTERRUPT_UNIT=y CONFIG_ARCV2_TIMER=y diff --git a/boards/snps/emsdp/emsdp_emsdp_em9d_defconfig b/boards/snps/emsdp/emsdp_emsdp_em9d_defconfig index 03f84b13a6496dc..1cbd8610dbb15a4 100644 --- a/boards/snps/emsdp/emsdp_emsdp_em9d_defconfig +++ b/boards/snps/emsdp/emsdp_emsdp_em9d_defconfig @@ -2,7 +2,6 @@ CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 CONFIG_XIP=n -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_BUILD_OUTPUT_BIN=n CONFIG_ARCV2_INTERRUPT_UNIT=y CONFIG_ARCV2_TIMER=y diff --git a/boards/snps/hsdk/hsdk_arc_hsdk_2cores_defconfig b/boards/snps/hsdk/hsdk_arc_hsdk_2cores_defconfig index bc0a91f60beca8e..449b4c2a8bda293 100644 --- a/boards/snps/hsdk/hsdk_arc_hsdk_2cores_defconfig +++ b/boards/snps/hsdk/hsdk_arc_hsdk_2cores_defconfig @@ -2,7 +2,6 @@ CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 CONFIG_XIP=n -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_BUILD_OUTPUT_BIN=n CONFIG_ARCV2_INTERRUPT_UNIT=y CONFIG_ARCV2_TIMER=y diff --git a/boards/snps/hsdk/hsdk_defconfig b/boards/snps/hsdk/hsdk_defconfig index 0d17f50041bc10c..75f91c8c1a2bcbb 100644 --- a/boards/snps/hsdk/hsdk_defconfig +++ b/boards/snps/hsdk/hsdk_defconfig @@ -2,7 +2,6 @@ CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 CONFIG_XIP=n -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_BUILD_OUTPUT_BIN=n CONFIG_ARCV2_INTERRUPT_UNIT=y CONFIG_ARCV2_TIMER=y diff --git a/boards/snps/hsdk4xd/hsdk4xd_defconfig b/boards/snps/hsdk4xd/hsdk4xd_defconfig index 00d8ba6ff0df75d..52e7a63c63ae682 100644 --- a/boards/snps/hsdk4xd/hsdk4xd_defconfig +++ b/boards/snps/hsdk4xd/hsdk4xd_defconfig @@ -1,7 +1,6 @@ # SPDX-License-Identifier: Apache-2.0 CONFIG_SYS_CLOCK_TICKS_PER_SEC=100 -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_BUILD_OUTPUT_BIN=n CONFIG_ARCV2_INTERRUPT_UNIT=y CONFIG_ARCV2_TIMER=y diff --git a/boards/snps/iotdk/iotdk_defconfig b/boards/snps/iotdk/iotdk_defconfig index d95ae7777298355..a12a0a63fb27a19 100644 --- a/boards/snps/iotdk/iotdk_defconfig +++ b/boards/snps/iotdk/iotdk_defconfig @@ -1,7 +1,6 @@ # SPDX-License-Identifier: Apache-2.0 CONFIG_XIP=n -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_BUILD_OUTPUT_BIN=n CONFIG_ARCV2_INTERRUPT_UNIT=y CONFIG_ARCV2_TIMER=y diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_em7d_v22.dts b/boards/snps/nsim/arc_classic/nsim_nsim_em7d_v22.dts index 4b52355589a4667..ef9791ff0d7666d 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_em7d_v22.dts +++ b/boards/snps/nsim/arc_classic/nsim_nsim_em7d_v22.dts @@ -6,6 +6,9 @@ /dts-v1/; +#define ICCM_SIZE DT_SIZE_K(256) +#define DCCM_SIZE DT_SIZE_K(128) + #include "nsim_em.dtsi" / { diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_sem.dts b/boards/snps/nsim/arc_classic/nsim_nsim_sem.dts index de118195e3efe79..807d54ba6981b48 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_sem.dts +++ b/boards/snps/nsim/arc_classic/nsim_nsim_sem.dts @@ -4,27 +4,14 @@ * SPDX-License-Identifier: Apache-2.0 */ - /dts-v1/; +#define ICCM_SIZE DT_SIZE_K(256) +#define DCCM_SIZE DT_SIZE_K(256) + #include "nsim_em-sec.dtsi" / { - - model = "nsim_sem"; + model = "snps,nsim_sem"; compatible = "snps,nsim_sem"; - - iccm0: iccm@0 { - compatible = "arc,iccm"; - reg = <0x0 0x40000>; - }; - - dccm0: dccm@80000000 { - compatible = "arc,dccm"; - reg = <0x80000000 0x40000>; - }; - - chosen { - zephyr,sram = &dccm0; - }; }; diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_sem.yaml b/boards/snps/nsim/arc_classic/nsim_nsim_sem.yaml index 53631e7d5fbd224..cc114d849af6091 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_sem.yaml +++ b/boards/snps/nsim/arc_classic/nsim_nsim_sem.yaml @@ -1,5 +1,5 @@ identifier: nsim/nsim_sem -name: SEM Nsim simulator +name: SEM nSIM simulator type: sim arch: arc simulation: diff --git a/boards/snps/nsim/arc_classic/nsim_nsim_sem_mpu_stack_guard.dts b/boards/snps/nsim/arc_classic/nsim_nsim_sem_mpu_stack_guard.dts index 4b1c02279c70ce2..a5d01055853e546 100644 --- a/boards/snps/nsim/arc_classic/nsim_nsim_sem_mpu_stack_guard.dts +++ b/boards/snps/nsim/arc_classic/nsim_nsim_sem_mpu_stack_guard.dts @@ -6,9 +6,12 @@ /dts-v1/; +#define ICCM_SIZE DT_SIZE_K(512) +#define DCCM_SIZE DT_SIZE_K(512) + #include "nsim_em-sec.dtsi" / { - model = "snps,nsim_sem_mpu_stack_guard"; - compatible = "snps,nsim_sem_mpu_stack_guard.dts"; + model = "snps,nsim_sem"; + compatible = "snps,nsim_sem"; }; diff --git a/boards/snps/nsim/arc_classic/support/mdb_em7d_v22.args b/boards/snps/nsim/arc_classic/support/mdb_em7d_v22.args index ea1fa9efbfe8e17..e827823df823f3b 100644 --- a/boards/snps/nsim/arc_classic/support/mdb_em7d_v22.args +++ b/boards/snps/nsim/arc_classic/support/mdb_em7d_v22.args @@ -38,10 +38,10 @@ -dcache_feature=2 -icache=16384,32,2,a -icache_feature=2 - -dccm_size=0x80000 + -dccm_size=0x20000 -dccm_base=0x80000000 -dccm_interleave - -iccm0_size=0x80000 + -iccm0_size=0x40000 -iccm0_base=0x00000000 -Xpct_counters=8 -dmac diff --git a/boards/snps/nsim/arc_classic/support/mdb_hs.args b/boards/snps/nsim/arc_classic/support/mdb_hs.args index b53cdd692210728..9b513b6000e0128 100644 --- a/boards/snps/nsim/arc_classic/support/mdb_hs.args +++ b/boards/snps/nsim/arc_classic/support/mdb_hs.args @@ -34,11 +34,11 @@ -dcache_mem_cycles=2 -icache=65536,64,4,a -icache_feature=2 - -dccm_size=0x40000 + -dccm_size=0x100000 -dccm_base=0x80000000 -dccm_mem_cycles=2 - -iccm0_size=0x40000 - -iccm0_base=0x70000000 + -iccm0_size=0x100000 + -iccm0_base=0x00000000 -mpuv3 -mpu_regions=16 -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24 diff --git a/boards/snps/nsim/arc_classic/support/mdb_hs_hostlink.args b/boards/snps/nsim/arc_classic/support/mdb_hs_hostlink.args index 322ab33998aab6f..2676357f3d05d4a 100644 --- a/boards/snps/nsim/arc_classic/support/mdb_hs_hostlink.args +++ b/boards/snps/nsim/arc_classic/support/mdb_hs_hostlink.args @@ -34,11 +34,11 @@ -dcache_mem_cycles=2 -icache=65536,64,4,a -icache_feature=2 - -dccm_size=0x40000 + -dccm_size=0x100000 -dccm_base=0x80000000 -dccm_mem_cycles=2 - -iccm0_size=0x40000 - -iccm0_base=0x70000000 + -iccm0_size=0x100000 + -iccm0_base=0x00000000 -mpuv3 -mpu_regions=16 -noprofile diff --git a/boards/snps/nsim/arc_classic/support/mdb_hs_mpuv6.args b/boards/snps/nsim/arc_classic/support/mdb_hs_mpuv6.args index 5f7a5a98e692a22..64c68a917cd213e 100644 --- a/boards/snps/nsim/arc_classic/support/mdb_hs_mpuv6.args +++ b/boards/snps/nsim/arc_classic/support/mdb_hs_mpuv6.args @@ -39,7 +39,7 @@ -dccm_size=0x100000 -dccm_base=0x80000000 -dccm_mem_cycles=2 - -iccm0_size=0x40000 - -iccm0_base=0x70000000 + -iccm0_size=0x100000 + -iccm0_base=0x00000000 -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24 -noprofile diff --git a/boards/snps/nsim/arc_classic/support/nsim_hs.props b/boards/snps/nsim/arc_classic/support/nsim_hs.props index 56eb627e6703892..6482a379a0d4a40 100644 --- a/boards/snps/nsim/arc_classic/support/nsim_hs.props +++ b/boards/snps/nsim/arc_classic/support/nsim_hs.props @@ -41,8 +41,8 @@ dccm_size=0x100000 dccm_base=0x80000000 nsim_isa_dccm_mem_cycles=2 - iccm0_size=0x40000 - iccm0_base=0x70000000 + iccm0_size=0x100000 + iccm0_base=0x00000000 mpu_regions=16 mpu_version=3 nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24 diff --git a/boards/snps/nsim/arc_classic/support/nsim_hs_hostlink.props b/boards/snps/nsim/arc_classic/support/nsim_hs_hostlink.props index 9c96ba18083e568..c1afff58cf2695c 100644 --- a/boards/snps/nsim/arc_classic/support/nsim_hs_hostlink.props +++ b/boards/snps/nsim/arc_classic/support/nsim_hs_hostlink.props @@ -41,7 +41,7 @@ dccm_size=0x100000 dccm_base=0x80000000 nsim_isa_dccm_mem_cycles=2 - iccm0_size=0x40000 - iccm0_base=0x70000000 + iccm0_size=0x100000 + iccm0_base=0x00000000 mpu_regions=16 mpu_version=3 diff --git a/boards/snps/nsim/arc_classic/support/nsim_hs_mpuv6.props b/boards/snps/nsim/arc_classic/support/nsim_hs_mpuv6.props index 9556ec1105e0f8f..faa3b7f4163edd2 100644 --- a/boards/snps/nsim/arc_classic/support/nsim_hs_mpuv6.props +++ b/boards/snps/nsim/arc_classic/support/nsim_hs_mpuv6.props @@ -43,6 +43,6 @@ dccm_size=0x100000 dccm_base=0x80000000 nsim_isa_dccm_mem_cycles=2 - iccm0_size=0x40000 - iccm0_base=0x70000000 + iccm0_size=0x100000 + iccm0_base=0x00000000 nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24 diff --git a/boards/sparkfun/micromod/Kconfig.defconfig b/boards/sparkfun/micromod/Kconfig.defconfig index 50f6c3f582aed28..41cda3e459a1a4c 100644 --- a/boards/sparkfun/micromod/Kconfig.defconfig +++ b/boards/sparkfun/micromod/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_MICROMOD_NRF52840 -config BT_CTLR - default BT - endif # BOARD_MICROMOD_NRF52840 diff --git a/boards/sparkfun/nrf52_sparkfun/Kconfig.defconfig b/boards/sparkfun/nrf52_sparkfun/Kconfig.defconfig index 47d8a99ceca0984..415fd0eb5b5fdf0 100644 --- a/boards/sparkfun/nrf52_sparkfun/Kconfig.defconfig +++ b/boards/sparkfun/nrf52_sparkfun/Kconfig.defconfig @@ -6,7 +6,4 @@ if BOARD_NRF52_SPARKFUN -config BT_CTLR - default BT - endif # BOARD_NRF52_SPARKFUN diff --git a/boards/sparkfun/pro_micro_rp2040/board.cmake b/boards/sparkfun/pro_micro_rp2040/board.cmake index 7d557630b9be381..9add174b5659afa 100644 --- a/boards/sparkfun/pro_micro_rp2040/board.cmake +++ b/boards/sparkfun/pro_micro_rp2040/board.cmake @@ -16,7 +16,7 @@ # The value must be the 'stem' part of the name of one of the files # in the openocd interface configuration file. # The setting is store to CMakeCache.txt. -if ("${RPI_PICO_DEBUG_ADAPTER}" STREQUAL "") +if("${RPI_PICO_DEBUG_ADAPTER}" STREQUAL "") set(RPI_PICO_DEBUG_ADAPTER "cmsis-dap") endif() diff --git a/boards/sparkfun/pro_micro_rp2040/sparkfun_pro_micro_rp2040-pinctrl.dtsi b/boards/sparkfun/pro_micro_rp2040/sparkfun_pro_micro_rp2040-pinctrl.dtsi index 5b9c353f802fc5f..b2386014d6f7183 100644 --- a/boards/sparkfun/pro_micro_rp2040/sparkfun_pro_micro_rp2040-pinctrl.dtsi +++ b/boards/sparkfun/pro_micro_rp2040/sparkfun_pro_micro_rp2040-pinctrl.dtsi @@ -47,9 +47,6 @@ }; }; - clocks_default: clocks_default { - }; - ws2812_pio0_default: ws2812_pio_default { ws2812 { pinmux = ; diff --git a/boards/sparkfun/pro_micro_rp2040/sparkfun_pro_micro_rp2040.dts b/boards/sparkfun/pro_micro_rp2040/sparkfun_pro_micro_rp2040.dts index 43761b85a142642..999da05609536ea 100644 --- a/boards/sparkfun/pro_micro_rp2040/sparkfun_pro_micro_rp2040.dts +++ b/boards/sparkfun/pro_micro_rp2040/sparkfun_pro_micro_rp2040.dts @@ -6,7 +6,7 @@ /dts-v1/; -#include +#include #include "sparkfun_pro_micro_rp2040-pinctrl.dtsi" #include "sparkfun_pro_micro_connector.dtsi" #include @@ -58,11 +58,6 @@ }; }; -&clocks { - pinctrl-0 = <&clocks_default>; - pinctrl-names = "default"; -}; - &uart0 { current-speed = <115200>; status = "okay"; diff --git a/boards/sparkfun/thing_plus_matter_mgm240p/Kconfig.defconfig b/boards/sparkfun/thing_plus_matter_mgm240p/Kconfig.defconfig index 9c21ba54457c1bd..1f5a3c940df1df5 100644 --- a/boards/sparkfun/thing_plus_matter_mgm240p/Kconfig.defconfig +++ b/boards/sparkfun/thing_plus_matter_mgm240p/Kconfig.defconfig @@ -12,10 +12,6 @@ config CMU_HFXO_FREQ config CMU_LFXO_FREQ default 32768 -config FLASH_BASE_ADDRESS - hex - default 0x08000000 - if SOC_GECKO_USE_RAIL config FPU diff --git a/boards/sparkfun/thing_plus_matter_mgm240p/doc/index.rst b/boards/sparkfun/thing_plus_matter_mgm240p/doc/index.rst index 2a3961884bf6b19..bd91534fc793ad1 100644 --- a/boards/sparkfun/thing_plus_matter_mgm240p/doc/index.rst +++ b/boards/sparkfun/thing_plus_matter_mgm240p/doc/index.rst @@ -100,7 +100,7 @@ Programming and Debugging .. note:: Before using the kit the first time, you should update the J-Link firmware - from `J-Link-Downloads`_ + in Simplicity Studio. Flashing ======== @@ -163,6 +163,3 @@ this example. .. _MGM240P Schematics: https://cdn.sparkfun.com/assets/0/f/8/4/9/Thing_Plus_MGM240P.pdf - -.. _J-Link-Downloads: - https://www.segger.com/downloads/jlink diff --git a/boards/sparkfun/thing_plus_matter_mgm240p/sparkfun_thing_plus_matter_mgm240p-pinctrl.dtsi b/boards/sparkfun/thing_plus_matter_mgm240p/sparkfun_thing_plus_matter_mgm240p-pinctrl.dtsi index bbec29ee586d2c9..2fd6fc8674cc04e 100644 --- a/boards/sparkfun/thing_plus_matter_mgm240p/sparkfun_thing_plus_matter_mgm240p-pinctrl.dtsi +++ b/boards/sparkfun/thing_plus_matter_mgm240p/sparkfun_thing_plus_matter_mgm240p-pinctrl.dtsi @@ -5,34 +5,40 @@ */ #include -#include +#include &pinctrl { /* configuration for uart0 device, default state */ usart0_default: usart0_default { + group0 { + pins = ; + drive-push-pull; + output-high; + }; group1 { - /* configure PA.6 as UART_RX and PA.5 as UART_TX */ - psels = , - , - ; + pins = ; + input-enable; + silabs,input-filter; }; }; eusart1_default: eusart1_default { + group0 { + pins = , , ; + drive-push-pull; + output-high; + }; group1 { - psels = , - , - , - ; + pins = ; + input-enable; }; }; i2c0_default: i2c0_default { - group1 { - psels = , - , - , - ; + group0 { + pins = , ; + drive-open-drain; + bias-pull-up; }; }; diff --git a/boards/sparkfun/thing_plus_matter_mgm240p/sparkfun_thing_plus_matter_mgm240p.dts b/boards/sparkfun/thing_plus_matter_mgm240p/sparkfun_thing_plus_matter_mgm240p.dts index b518ef2542d9cd3..05db65eb1878321 100644 --- a/boards/sparkfun/thing_plus_matter_mgm240p/sparkfun_thing_plus_matter_mgm240p.dts +++ b/boards/sparkfun/thing_plus_matter_mgm240p/sparkfun_thing_plus_matter_mgm240p.dts @@ -33,14 +33,14 @@ leds { compatible = "gpio-leds"; blue_led: led_1 { - gpios = <&gpioa GECKO_PIN(8) GPIO_ACTIVE_LOW>; + gpios = <&gpioa 8 GPIO_ACTIVE_LOW>; }; }; wake_up_trigger: gpio-wake-up { compatible = "silabs,gecko-wake-up-trigger"; - gpios = <&gpioa GECKO_PIN(5) GPIO_ACTIVE_LOW>; + gpios = <&gpioa 5 GPIO_ACTIVE_LOW>; }; }; diff --git a/boards/sparkfun/thing_plus_matter_mgm240p/sparkfun_thing_plus_matter_mgm240p_defconfig b/boards/sparkfun/thing_plus_matter_mgm240p/sparkfun_thing_plus_matter_mgm240p_defconfig index 28d1fa9d193cad2..fee02fbc812fa71 100644 --- a/boards/sparkfun/thing_plus_matter_mgm240p/sparkfun_thing_plus_matter_mgm240p_defconfig +++ b/boards/sparkfun/thing_plus_matter_mgm240p/sparkfun_thing_plus_matter_mgm240p_defconfig @@ -11,5 +11,4 @@ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=76800000 CONFIG_SOC_GECKO_EMU_DCDC=y CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y CONFIG_HW_STACK_PROTECTION=y -CONFIG_PINCTRL=y CONFIG_REGULATOR=y diff --git a/boards/st/b_g474e_dpow1/b_g474e_dpow1.dts b/boards/st/b_g474e_dpow1/b_g474e_dpow1.dts index 1eb84827718ec49..3c20afabc64cbc3 100644 --- a/boards/st/b_g474e_dpow1/b_g474e_dpow1.dts +++ b/boards/st/b_g474e_dpow1/b_g474e_dpow1.dts @@ -134,7 +134,7 @@ stm32_lp_tick_source: &lptim1 { &adc2 { pinctrl-0 = <&adc2_in8_pc2>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; diff --git a/boards/st/b_l4s5i_iot01a/b_l4s5i_iot01a.dts b/boards/st/b_l4s5i_iot01a/b_l4s5i_iot01a.dts index 064d61fb6910848..d7f5adab5bebcde 100644 --- a/boards/st/b_l4s5i_iot01a/b_l4s5i_iot01a.dts +++ b/boards/st/b_l4s5i_iot01a/b_l4s5i_iot01a.dts @@ -185,9 +185,9 @@ read-only; }; - slot0_partition: partition@1000 { + slot0_partition: partition@10000 { label = "image-0"; - reg = <0x1000 DT_SIZE_K(976)>; + reg = <0x10000 DT_SIZE_K(976)>; }; slot1_partition: partition@104000 { diff --git a/boards/st/b_u585i_iot02a/b_u585i_iot02a-common.dtsi b/boards/st/b_u585i_iot02a/b_u585i_iot02a-common.dtsi index c8d5ca4b790ff9a..39a42c9934aaaa7 100644 --- a/boards/st/b_u585i_iot02a/b_u585i_iot02a-common.dtsi +++ b/boards/st/b_u585i_iot02a/b_u585i_iot02a-common.dtsi @@ -223,7 +223,7 @@ zephyr_udc0: &usbotg_fs { &adc1 { pinctrl-0 = <&adc1_in15_pb0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; st,adc-prescaler = <4>; status = "okay"; }; @@ -231,7 +231,7 @@ zephyr_udc0: &usbotg_fs { &adc4 { pinctrl-0 = <&adc4_in19_pb1>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/disco_l475_iot1/disco_l475_iot1.dts b/boards/st/disco_l475_iot1/disco_l475_iot1.dts index 33e6d973cf89ce7..6ffb695012402a9 100644 --- a/boards/st/disco_l475_iot1/disco_l475_iot1.dts +++ b/boards/st/disco_l475_iot1/disco_l475_iot1.dts @@ -293,7 +293,7 @@ zephyr_udc0: &usbotg_fs { pinctrl-0 = <&adc1_in3_pc2 &adc1_in4_pc3 &adc1_in13_pc4 &adc1_in14_pc5>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_c031c6/nucleo_c031c6.dts b/boards/st/nucleo_c031c6/nucleo_c031c6.dts index 404c1cb29625633..e14cf23512183fa 100644 --- a/boards/st/nucleo_c031c6/nucleo_c031c6.dts +++ b/boards/st/nucleo_c031c6/nucleo_c031c6.dts @@ -117,7 +117,7 @@ &adc1 { pinctrl-0 = <&adc1_in0_pa0 &adc1_in1_pa1 &adc1_in4_pa4>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_c071rb/Kconfig.nucleo_c071rb b/boards/st/nucleo_c071rb/Kconfig.nucleo_c071rb new file mode 100644 index 000000000000000..b0c7abff956bead --- /dev/null +++ b/boards/st/nucleo_c071rb/Kconfig.nucleo_c071rb @@ -0,0 +1,5 @@ +# Copyright (c) 2024 STMicroelectronics +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_NUCLEO_C071RB + select SOC_STM32C071XX diff --git a/boards/st/nucleo_c071rb/arduino_r3_connector.dtsi b/boards/st/nucleo_c071rb/arduino_r3_connector.dtsi new file mode 100644 index 000000000000000..5d62471e418aa1d --- /dev/null +++ b/boards/st/nucleo_c071rb/arduino_r3_connector.dtsi @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2024 STMicroelectronics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + arduino_header: connector { + compatible = "arduino-header-r3"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpioa 0 0>, /* A0 */ + <1 0 &gpioa 1 0>, /* A1 */ + <2 0 &gpioa 4 0>, /* A2 */ + <3 0 &gpiob 0 0>, /* A3 */ + <4 0 &gpioc 4 0>, /* A4 */ + <5 0 &gpioc 5 0>, /* A5 */ + <6 0 &gpiob 7 0>, /* D0 */ + <7 0 &gpiob 6 0>, /* D1 */ + <8 0 &gpioa 10 0>, /* D2 */ + <9 0 &gpioc 7 0>, /* D3 */ + <10 0 &gpiob 5 0>, /* D4 */ + <11 0 &gpiob 4 0>, /* D5 */ + <12 0 &gpioc 8 0>, /* D6 */ + <13 0 &gpioa 8 0>, /* D7 */ + <14 0 &gpioa 9 0>, /* D8 */ + <15 0 &gpiob 3 0>, /* D9 */ + <16 0 &gpioa 15 0>, /* D10 */ + <17 0 &gpioa 7 0>, /* D11 */ + <18 0 &gpioa 6 0>, /* D12 */ + <19 0 &gpioa 5 0>, /* D13 */ + <20 0 &gpiob 9 0>, /* D14 */ + <21 0 &gpiob 8 0>; /* D15 */ + }; +}; + +arduino_i2c: &i2c1 {}; +arduino_spi: &spi1 {}; +arduino_serial: &usart1 {}; diff --git a/boards/st/nucleo_c071rb/board.cmake b/boards/st/nucleo_c071rb/board.cmake new file mode 100644 index 000000000000000..716846e4923c4c7 --- /dev/null +++ b/boards/st/nucleo_c071rb/board.cmake @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: Apache-2.0 + +# keep first +board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw") + +# keep first +include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/st/nucleo_c071rb/board.yml b/boards/st/nucleo_c071rb/board.yml new file mode 100644 index 000000000000000..af125dd1154a05d --- /dev/null +++ b/boards/st/nucleo_c071rb/board.yml @@ -0,0 +1,6 @@ +board: + name: nucleo_c071rb + full_name: Nucleo C071RB + vendor: st + socs: + - name: stm32c071xx diff --git a/boards/st/nucleo_c071rb/doc/img/nucleo_c071rb.webp b/boards/st/nucleo_c071rb/doc/img/nucleo_c071rb.webp new file mode 100644 index 000000000000000..2cd802b7a59b68a Binary files /dev/null and b/boards/st/nucleo_c071rb/doc/img/nucleo_c071rb.webp differ diff --git a/boards/st/nucleo_c071rb/doc/index.rst b/boards/st/nucleo_c071rb/doc/index.rst new file mode 100644 index 000000000000000..7d4637c82a53490 --- /dev/null +++ b/boards/st/nucleo_c071rb/doc/index.rst @@ -0,0 +1,163 @@ +.. zephyr:board:: nucleo_c071rb + +Overview +******** +The STM32 Nucleo-64 development board with STM32C071RB MCU, supports Arduino and ST morpho connectivity. + +The STM32 Nucleo board provides an affordable, and flexible way for users to try out new concepts, +and build prototypes with the STM32 microcontroller, choosing from the various +combinations of performance, power consumption and features. + +The STM32 Nucleo board integrates the ST-LINK/V2-1 debugger and programmer. + +The STM32 Nucleo board comes with the STM32 comprehensive software HAL library together +with various packaged software examples. + +.. image:: img/nucleo_c071rb.webp + :align: center + :alt: Nucleo C071RB + +More information about the board can be found at the `Nucleo C071RB website`_. + +Hardware +******** +Nucleo C071RB provides the following hardware components: + +- STM32 microcontroller in 64-pin package featuring 128 Kbytes of Flash memory + and 24 Kbytes of SRAM. +- Extension resource: + + - Arduino* Uno V3 connectivity + +- On-board ST-LINK/V2-1 debugger/programmer with SWD connector: + +- Flexible board power supply: + + - USB VBUS or external source (3.3V, 5V, 7 - 12V) + - Current consumption measurement (IDD) + +- Four LEDs: + + - USB communication (LD1), USB power fault LED (LD2), power LED (LD3), + user LED (LD4) + +- Two push-button: USER and RESET + +- USB re-enumeration capability. Three different interfaces supported on USB: + + - Virtual COM port + - Mass storage + - Debug port + +More information about STM32C071RB can be found here: +`STM32C0x1 reference manual`_ + +Supported Features +================== + +The Zephyr ``nucleo_c071rb`` board supports the following hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial port-polling; | +| | | serial port-interrupt | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| CLOCK | on-chip | reset and clock control | ++-----------+------------+-------------------------------------+ +| RTC | on-chip | counter | ++-----------+------------+-------------------------------------+ +| IWDG | on-chip | independent watchdog | ++-----------+------------+-------------------------------------+ +| WWDG | on-chip | window watchdog | ++-----------+------------+-------------------------------------+ +| PWM | on-chip | pwm | ++-----------+------------+-------------------------------------+ +| ADC | on-chip | ADC Controller | ++-----------+------------+-------------------------------------+ +| die-temp | on-chip | die temperature sensor | ++-----------+------------+-------------------------------------+ +| I2C | on-chip | i2c | ++-----------+------------+-------------------------------------+ +| DMA | on-chip | Direct Memory Access | ++-----------+------------+-------------------------------------+ +| RTC | on-chip | rtc | ++-----------+------------+-------------------------------------+ +| SPI | on-chip | spi | ++-----------+------------+-------------------------------------+ + +Other hardware features are not yet supported in this Zephyr port. + +The default configuration can be found in +:zephyr_file:`boards/st/nucleo_c071rb/nucleo_c071rb_defconfig` + +Connections and IOs +=================== + +Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as +input (with or without pull-up or pull-down), or as peripheral alternate function. Most of the +GPIO pins are shared with digital or analog alternate functions. All GPIOs are high current +capable except for analog inputs. + +Default Zephyr Peripheral Mapping: +---------------------------------- + +- I2C1 SCL/SDA : PB8/PB9 (Arduino I2C) +- LD1 : PA5 +- LD2 : PC9 +- SPI1 NSS/SCK/MISO/MOSI : PA4/PA5/PA11/PA12 (Arduino SPI) +- UART_2 TX/RX : PA2/PA3 (ST-Link Virtual Port Com) +- USER_PB : PC13 + + +For more details please refer to `STM32 Nucleo-64 board User Manual`_. + +Programming and Debugging +************************* + +Nucleo C071RB board includes an ST-LINK/V2-1 embedded debug tool interface. + +Applications for the ``nucleo_c071rb`` board can be built and +flashed in the usual way (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +Flashing +======== + +The board is configured to be flashed using west `STM32CubeProgrammer`_ runner, +so its :ref:`installation ` is required. + +Flashing an application to Nucleo C071RB +---------------------------------------- + +Here is an example for the :zephyr:code-sample:`blinky` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: nucleo_c071rb + :goals: build flash + +You will see the LED blinking every second. + +References +********** + +.. target-notes:: + +.. _Nucleo C071RB website: + https://www.st.com/en/evaluation-tools/nucleo-c071rb.html + +.. _STM32C0x1 reference manual: + https://www.st.com/resource/en/reference_manual/rm0490-stm32c0x1-advanced-armbased-64bit-mcus-stmicroelectronics.pdf + +.. _STM32 Nucleo-64 board User Manual: + https://www.st.com/resource/en/user_manual/um2953-stm32c0-nucleo64-board-mb1717-stmicroelectronics.pdf + +.. _STM32CubeProgrammer: + https://www.st.com/en/development-tools/stm32cubeprog.html diff --git a/boards/st/nucleo_c071rb/nucleo_c071rb.dts b/boards/st/nucleo_c071rb/nucleo_c071rb.dts new file mode 100644 index 000000000000000..14ae1e59f5e6fae --- /dev/null +++ b/boards/st/nucleo_c071rb/nucleo_c071rb.dts @@ -0,0 +1,154 @@ +/* + * Copyright (c) 2024 STMicroelectronics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include +#include "arduino_r3_connector.dtsi" +#include + +/ { + model = "STMicroelectronics STM32C071RB-NUCLEO board"; + compatible = "st,stm32c071rb-nucleo"; + + chosen { + zephyr,console = &usart2; + zephyr,shell-uart = &usart2; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + }; + + leds: leds { + compatible = "gpio-leds"; + green_led_1: led_1 { + gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>; + label = "User LD1"; + }; + + blue_led: led_2 { + gpios = <&gpioc 9 GPIO_ACTIVE_HIGH>; + label = "User LD2"; + }; + }; + + pwmleds { + compatible = "pwm-leds"; + + green_pwm_led: green_pwm_led { + pwms = <&pwm1 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button: button { + label = "user button"; + gpios = <&gpioc 13 GPIO_ACTIVE_LOW>; + status = "okay"; + zephyr,code = ; + }; + }; + + aliases { + led0 = &green_led_1; + led1 = &blue_led; + pwm-led0 = &green_pwm_led; + sw0 = &user_button; + watchdog0 = &iwdg; + die-temp0 = &die_temp; + volt-sensor0 = &vref; + }; +}; + +&clk_lse { + status = "okay"; +}; + +&clk_hse { + clock-frequency = ; + status = "okay"; +}; + +&rcc { + clocks = <&clk_hse>; + clock-frequency = ; + ahb-prescaler = <1>; + apb1-prescaler = <1>; +}; + +&usart1 { + pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>; + pinctrl-names = "default"; + current-speed = <115200>; + status = "okay"; +}; + +&usart2 { + pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>; + pinctrl-names = "default"; + current-speed = <115200>; + status = "okay"; +}; + +&rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>, + <&rcc STM32_SRC_LSE RTC_SEL(1)>; + status = "okay"; +}; + +&iwdg { + status = "okay"; +}; + +&timers1 { + st,prescaler = <10000>; + status = "okay"; + + pwm1: pwm { + pinctrl-0 = <&tim1_ch1_pa5>; + pinctrl-names = "default"; + status = "okay"; + }; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>; + pinctrl-names = "default"; + status = "okay"; + clock-frequency = ; +}; + +&spi1 { + pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5 + &spi1_miso_pa11 &spi1_mosi_pa12>; + pinctrl-names = "default"; + status = "okay"; +}; + +&adc1 { + pinctrl-0 = <&adc1_in0_pa0 &adc1_in1_pa1 &adc1_in4_pa4>; + pinctrl-names = "default"; + st,adc-clock-source = "SYNC"; + st,adc-prescaler = <4>; + status = "okay"; + vref-mv = <3300>; +}; + +&die_temp { + status = "okay"; +}; + +&vref { + status = "okay"; +}; + +&dma1 { + status = "okay"; +}; + +&dmamux1 { + status = "okay"; +}; diff --git a/boards/st/nucleo_c071rb/nucleo_c071rb.yaml b/boards/st/nucleo_c071rb/nucleo_c071rb.yaml new file mode 100644 index 000000000000000..6332fc1bd1c6a3c --- /dev/null +++ b/boards/st/nucleo_c071rb/nucleo_c071rb.yaml @@ -0,0 +1,21 @@ +identifier: nucleo_c071rb +name: ST Nucleo C071RB +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +supported: + - arduino_gpio + - counter + - dma + - gpio + - i2c + - pwm + - rtc + - spi + - watchdog +ram: 24 +flash: 128 +vendor: st diff --git a/boards/st/nucleo_c071rb/nucleo_c071rb_defconfig b/boards/st/nucleo_c071rb/nucleo_c071rb_defconfig new file mode 100644 index 000000000000000..c60dfffbc3b86c8 --- /dev/null +++ b/boards/st/nucleo_c071rb/nucleo_c071rb_defconfig @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: Apache-2.0 + +# Serial Drivers +CONFIG_SERIAL=y +CONFIG_UART_INTERRUPT_DRIVEN=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# GPIO Controller +CONFIG_GPIO=y diff --git a/boards/st/nucleo_f030r8/nucleo_f030r8.dts b/boards/st/nucleo_f030r8/nucleo_f030r8.dts index 3e346fc20c7ff23..398c3ded4bafd63 100644 --- a/boards/st/nucleo_f030r8/nucleo_f030r8.dts +++ b/boards/st/nucleo_f030r8/nucleo_f030r8.dts @@ -118,7 +118,7 @@ &adc1 { pinctrl-0 = <&adc_in0_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_f031k6/nucleo_f031k6.dts b/boards/st/nucleo_f031k6/nucleo_f031k6.dts index 0b5f9a04161c7a2..496699450875e6f 100644 --- a/boards/st/nucleo_f031k6/nucleo_f031k6.dts +++ b/boards/st/nucleo_f031k6/nucleo_f031k6.dts @@ -103,7 +103,7 @@ &adc1 { pinctrl-0 = <&adc_in0_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_f042k6/nucleo_f042k6.dts b/boards/st/nucleo_f042k6/nucleo_f042k6.dts index 74d700c9c1dc020..0f8a31e35b4dacf 100644 --- a/boards/st/nucleo_f042k6/nucleo_f042k6.dts +++ b/boards/st/nucleo_f042k6/nucleo_f042k6.dts @@ -99,7 +99,7 @@ &adc1 { pinctrl-0 = <&adc_in0_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_f070rb/nucleo_f070rb.dts b/boards/st/nucleo_f070rb/nucleo_f070rb.dts index c504dad4de50c00..8c0b43d71c8b8e2 100644 --- a/boards/st/nucleo_f070rb/nucleo_f070rb.dts +++ b/boards/st/nucleo_f070rb/nucleo_f070rb.dts @@ -121,7 +121,7 @@ &adc1 { pinctrl-0 = <&adc_in0_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_f091rc/nucleo_f091rc.dts b/boards/st/nucleo_f091rc/nucleo_f091rc.dts index b24435909182a21..cb9348240ca1492 100644 --- a/boards/st/nucleo_f091rc/nucleo_f091rc.dts +++ b/boards/st/nucleo_f091rc/nucleo_f091rc.dts @@ -159,7 +159,7 @@ &adc1 { pinctrl-0 = <&adc_in0_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_f207zg/nucleo_f207zg.dts b/boards/st/nucleo_f207zg/nucleo_f207zg.dts index 4f3e8cafde3aa31..724bf9456cc3b73 100644 --- a/boards/st/nucleo_f207zg/nucleo_f207zg.dts +++ b/boards/st/nucleo_f207zg/nucleo_f207zg.dts @@ -164,7 +164,7 @@ zephyr_udc0: &usbotg_fs { &adc1 { pinctrl-0 = <&adc1_in0_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <2>; status = "okay"; }; diff --git a/boards/st/nucleo_f302r8/nucleo_f302r8.dts b/boards/st/nucleo_f302r8/nucleo_f302r8.dts index cb46e89563a6d64..ea85df6c96d1126 100644 --- a/boards/st/nucleo_f302r8/nucleo_f302r8.dts +++ b/boards/st/nucleo_f302r8/nucleo_f302r8.dts @@ -124,7 +124,7 @@ &adc1 { pinctrl-0 = <&adc1_in1_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <2>; status = "okay"; }; diff --git a/boards/st/nucleo_f303k8/nucleo_f303k8.dts b/boards/st/nucleo_f303k8/nucleo_f303k8.dts index efdf58a848fbef8..c4f39c8411384db 100644 --- a/boards/st/nucleo_f303k8/nucleo_f303k8.dts +++ b/boards/st/nucleo_f303k8/nucleo_f303k8.dts @@ -100,7 +100,7 @@ &adc1 { pinctrl-0 = <&adc1_in1_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <2>; status = "okay"; }; diff --git a/boards/st/nucleo_f401re/nucleo_f401re.dts b/boards/st/nucleo_f401re/nucleo_f401re.dts index fbfdc59bea00b62..b73ea3f69ef47a7 100644 --- a/boards/st/nucleo_f401re/nucleo_f401re.dts +++ b/boards/st/nucleo_f401re/nucleo_f401re.dts @@ -180,7 +180,7 @@ &adc1 { pinctrl-0 = <&adc1_in0_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <2>; status = "okay"; }; diff --git a/boards/st/nucleo_f412zg/Kconfig.defconfig b/boards/st/nucleo_f412zg/Kconfig.defconfig deleted file mode 100644 index a2c9ec558818ca4..000000000000000 --- a/boards/st/nucleo_f412zg/Kconfig.defconfig +++ /dev/null @@ -1,18 +0,0 @@ -# NUCLEO-144 F412ZG board configuration - -# Copyright (c) 2017 Florian Vaussard, HEIG-VD -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_NUCLEO_F412ZG - -if NETWORKING - -config USB_DEVICE_STACK - default y - -config USB_DEVICE_NETWORK_ECM - default y - -endif # NETWORKING - -endif # BOARD_NUCLEO_F412ZG diff --git a/boards/st/nucleo_f413zh/Kconfig.defconfig b/boards/st/nucleo_f413zh/Kconfig.defconfig deleted file mode 100644 index 34fb8d56961576d..000000000000000 --- a/boards/st/nucleo_f413zh/Kconfig.defconfig +++ /dev/null @@ -1,18 +0,0 @@ -# NUCLEO-144 F413ZH board configuration - -# Copyright (c) 2017 Florian Vaussard, HEIG-VD -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_NUCLEO_F413ZH - -if NETWORKING - -config USB_DEVICE_STACK - default y - -config USB_DEVICE_NETWORK_ECM - default y - -endif # NETWORKING - -endif # BOARD_NUCLEO_F413ZH diff --git a/boards/st/nucleo_f429zi/nucleo_f429zi.dts b/boards/st/nucleo_f429zi/nucleo_f429zi.dts index 29a36b1155573a2..d05081ed8396f6f 100644 --- a/boards/st/nucleo_f429zi/nucleo_f429zi.dts +++ b/boards/st/nucleo_f429zi/nucleo_f429zi.dts @@ -90,7 +90,7 @@ &adc1 { pinctrl-0 = <&adc1_in0_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <2>; status = "okay"; }; diff --git a/boards/st/nucleo_f446ze/nucleo_f446ze.dts b/boards/st/nucleo_f446ze/nucleo_f446ze.dts index 5eaad0ca83db5be..df262a6f73ef350 100644 --- a/boards/st/nucleo_f446ze/nucleo_f446ze.dts +++ b/boards/st/nucleo_f446ze/nucleo_f446ze.dts @@ -87,7 +87,7 @@ &adc1 { pinctrl-0 = <&adc1_in0_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <2>; status = "okay"; }; diff --git a/boards/st/nucleo_f722ze/nucleo_f722ze.dts b/boards/st/nucleo_f722ze/nucleo_f722ze.dts index 988a1204a9fdd90..00faeae1dbc2e2d 100644 --- a/boards/st/nucleo_f722ze/nucleo_f722ze.dts +++ b/boards/st/nucleo_f722ze/nucleo_f722ze.dts @@ -102,7 +102,7 @@ &adc1 { pinctrl-0 = <&adc1_in3_pa3 &adc1_in10_pc0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <2>; status = "okay"; }; diff --git a/boards/st/nucleo_f746zg/nucleo_f746zg.dts b/boards/st/nucleo_f746zg/nucleo_f746zg.dts index 90c4b4409a0eb67..65416d66d529c26 100644 --- a/boards/st/nucleo_f746zg/nucleo_f746zg.dts +++ b/boards/st/nucleo_f746zg/nucleo_f746zg.dts @@ -176,7 +176,7 @@ zephyr_udc0: &usbotg_fs { &adc1 { pinctrl-0 = <&adc1_in0_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <2>; status = "okay"; }; diff --git a/boards/st/nucleo_f767zi/nucleo_f767zi.dts b/boards/st/nucleo_f767zi/nucleo_f767zi.dts index 4125f4e6bde13b5..c7a113fdfcf56d2 100644 --- a/boards/st/nucleo_f767zi/nucleo_f767zi.dts +++ b/boards/st/nucleo_f767zi/nucleo_f767zi.dts @@ -171,7 +171,7 @@ zephyr_udc0: &usbotg_fs { &adc1 { pinctrl-0 = <&adc1_in0_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <2>; status = "okay"; }; diff --git a/boards/st/nucleo_g070rb/nucleo_g070rb.dts b/boards/st/nucleo_g070rb/nucleo_g070rb.dts index d0491570d1deeab..bfbcfbc27f2e278 100644 --- a/boards/st/nucleo_g070rb/nucleo_g070rb.dts +++ b/boards/st/nucleo_g070rb/nucleo_g070rb.dts @@ -139,7 +139,7 @@ &adc1 { pinctrl-0 = <&adc1_in0_pa0 &adc1_in1_pa1>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; vref-mv = <3300>; diff --git a/boards/st/nucleo_g071rb/nucleo_g071rb.dts b/boards/st/nucleo_g071rb/nucleo_g071rb.dts index 553feebd2e95965..902c30dc43acd00 100644 --- a/boards/st/nucleo_g071rb/nucleo_g071rb.dts +++ b/boards/st/nucleo_g071rb/nucleo_g071rb.dts @@ -147,7 +147,7 @@ <&rcc STM32_SRC_SYSCLK ADC_SEL(0)>; pinctrl-0 = <&adc1_in0_pa0 &adc1_in1_pa1>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; st,adc-prescaler = <4>; status = "okay"; vref-mv = <3300>; diff --git a/boards/st/nucleo_g0b1re/nucleo_g0b1re.dts b/boards/st/nucleo_g0b1re/nucleo_g0b1re.dts index d86d7c6ae8eea67..75ee749e603e4d6 100644 --- a/boards/st/nucleo_g0b1re/nucleo_g0b1re.dts +++ b/boards/st/nucleo_g0b1re/nucleo_g0b1re.dts @@ -163,7 +163,7 @@ zephyr_udc0: &usb { &adc1 { pinctrl-0 = <&adc1_in0_pa0 &adc1_in1_pa1>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_g474re/nucleo_g474re.dts b/boards/st/nucleo_g474re/nucleo_g474re.dts index a91ec3ccb60347b..a31526611312745 100644 --- a/boards/st/nucleo_g474re/nucleo_g474re.dts +++ b/boards/st/nucleo_g474re/nucleo_g474re.dts @@ -203,7 +203,7 @@ stm32_lp_tick_source: &lptim1 { &adc1 { pinctrl-0 = <&adc1_in1_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_h533re/nucleo_h533re.dts b/boards/st/nucleo_h533re/nucleo_h533re.dts index 66fade7dcd2ab9d..7ca0c23ddea3f45 100644 --- a/boards/st/nucleo_h533re/nucleo_h533re.dts +++ b/boards/st/nucleo_h533re/nucleo_h533re.dts @@ -132,7 +132,7 @@ <&rcc STM32_SRC_HCLK ADCDAC_SEL(0)>; pinctrl-0 = <&adc1_inp0_pa0>; /* Arduino A0 */ pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; st,adc-prescaler = <8>; status = "okay"; }; diff --git a/boards/st/nucleo_h563zi/doc/index.rst b/boards/st/nucleo_h563zi/doc/index.rst index c53d2f267cf3658..da88685959cf3a8 100644 --- a/boards/st/nucleo_h563zi/doc/index.rst +++ b/boards/st/nucleo_h563zi/doc/index.rst @@ -167,6 +167,8 @@ The Zephyr nucleo_h563zi board configuration supports the following hardware fea +-----------+------------+-------------------------------------+ | I2C | on-chip | i2c bus | +-----------+------------+-------------------------------------+ +| I3C | on-chip | i3c bus | ++-----------+------------+-------------------------------------+ | UART | on-chip | serial port-polling; | | | | serial port-interrupt | +-----------+------------+-------------------------------------+ @@ -222,6 +224,7 @@ Default Zephyr Peripheral Mapping: - SPI1 SCK/MISO/MOSI/CS: PA5/PG9/PB5/PD14 - UART3 TX/RX : PD8/PD9 (VCP) - USER_PB : PC13 +- I3C1: PD12(SCL) & PD13(SDA) System Clock ------------ diff --git a/boards/st/nucleo_h563zi/nucleo_h563zi-common.dtsi b/boards/st/nucleo_h563zi/nucleo_h563zi-common.dtsi index 246e93926ccba79..5c5cecdf40720d8 100644 --- a/boards/st/nucleo_h563zi/nucleo_h563zi-common.dtsi +++ b/boards/st/nucleo_h563zi/nucleo_h563zi-common.dtsi @@ -78,6 +78,13 @@ status = "okay"; }; +&i3c1 { + pinctrl-0 = <&i3c1_scl_pd12 &i3c1_sda_pd13>; + pinctrl-names = "default"; + i3c-scl-hz = <12500000>; + status = "okay"; +}; + &rcc { clocks = <&pll>; clock-frequency = ; @@ -149,7 +156,7 @@ <&rcc STM32_SRC_HCLK ADCDAC_SEL(0)>; pinctrl-0 = <&adc1_inp3_pa6 &adc1_inp15_pa3>; /* Zio A0, Zio D35 */ pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; st,adc-prescaler = <6>; status = "okay"; }; diff --git a/boards/st/nucleo_h563zi/nucleo_h563zi.yaml b/boards/st/nucleo_h563zi/nucleo_h563zi.yaml index dbaa88e7de6d559..d8db97fe4a3ccd1 100644 --- a/boards/st/nucleo_h563zi/nucleo_h563zi.yaml +++ b/boards/st/nucleo_h563zi/nucleo_h563zi.yaml @@ -25,4 +25,5 @@ supported: - usb_device - rtc - i2c + - i3c vendor: st diff --git a/boards/st/nucleo_h723zg/Kconfig.defconfig b/boards/st/nucleo_h723zg/Kconfig.defconfig index d6d1af51e767b4f..b65c015d77747d6 100644 --- a/boards/st/nucleo_h723zg/Kconfig.defconfig +++ b/boards/st/nucleo_h723zg/Kconfig.defconfig @@ -12,8 +12,4 @@ config NET_L2_ETHERNET endif # NETWORKING -config USB_DC_HAS_HS_SUPPORT - default y - depends on USB_DC_STM32 - endif # BOARD_NUCLEO_H723ZG diff --git a/boards/st/nucleo_h743zi/nucleo_h743zi.dts b/boards/st/nucleo_h743zi/nucleo_h743zi.dts index cc7122b59356760..cd47bf9794c0b59 100644 --- a/boards/st/nucleo_h743zi/nucleo_h743zi.dts +++ b/boards/st/nucleo_h743zi/nucleo_h743zi.dts @@ -150,7 +150,7 @@ zephyr_udc0: &usbotg_fs { &adc1 { pinctrl-0 = <&adc1_inp15_pa3>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; @@ -162,7 +162,7 @@ zephyr_udc0: &usbotg_fs { &adc3 { pinctrl-0 = <&adc3_inp5_pf3>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_h745zi_q/nucleo_h745zi_q_stm32h745xx_m7.dts b/boards/st/nucleo_h745zi_q/nucleo_h745zi_q_stm32h745xx_m7.dts index b9ddb37cb79624e..c79712968e1bc38 100644 --- a/boards/st/nucleo_h745zi_q/nucleo_h745zi_q_stm32h745xx_m7.dts +++ b/boards/st/nucleo_h745zi_q/nucleo_h745zi_q_stm32h745xx_m7.dts @@ -26,6 +26,7 @@ zephyr,dtcm = &dtcm; zephyr,sram = &sram0; zephyr,flash = &flash0; + zephyr,canbus = &fdcan1; }; pwmleds { diff --git a/boards/st/nucleo_h753zi/nucleo_h753zi.dts b/boards/st/nucleo_h753zi/nucleo_h753zi.dts index d4217cfae580f88..83ee70c171de734 100644 --- a/boards/st/nucleo_h753zi/nucleo_h753zi.dts +++ b/boards/st/nucleo_h753zi/nucleo_h753zi.dts @@ -147,7 +147,7 @@ zephyr_udc0: &usbotg_fs { &adc1 { pinctrl-0 = <&adc1_inp15_pa3>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_h7a3zi_q/nucleo_h7a3zi_q.dts b/boards/st/nucleo_h7a3zi_q/nucleo_h7a3zi_q.dts index 410bd0b6904253b..71ee9ccf017b5f7 100644 --- a/boards/st/nucleo_h7a3zi_q/nucleo_h7a3zi_q.dts +++ b/boards/st/nucleo_h7a3zi_q/nucleo_h7a3zi_q.dts @@ -116,7 +116,7 @@ &adc1 { pinctrl-0 = <&adc1_inp15_pa3>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_l073rz/nucleo_l073rz.dts b/boards/st/nucleo_l073rz/nucleo_l073rz.dts index eefd8d428e7e272..11db6940d18c70b 100644 --- a/boards/st/nucleo_l073rz/nucleo_l073rz.dts +++ b/boards/st/nucleo_l073rz/nucleo_l073rz.dts @@ -140,7 +140,7 @@ stm32_lp_tick_source: &lptim1 { &adc1 { pinctrl-0 = <&adc_in0_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_l152re/nucleo_l152re.dts b/boards/st/nucleo_l152re/nucleo_l152re.dts index afcccc8dd01dbca..d1278873fd88d3a 100644 --- a/boards/st/nucleo_l152re/nucleo_l152re.dts +++ b/boards/st/nucleo_l152re/nucleo_l152re.dts @@ -124,7 +124,7 @@ &adc1 { pinctrl-0 = <&adc_in0_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_l412rb_p/nucleo_l412rb_p.dts b/boards/st/nucleo_l412rb_p/nucleo_l412rb_p.dts index 070260451f39502..0ffe454564587f1 100644 --- a/boards/st/nucleo_l412rb_p/nucleo_l412rb_p.dts +++ b/boards/st/nucleo_l412rb_p/nucleo_l412rb_p.dts @@ -117,7 +117,7 @@ &adc1 { pinctrl-0 = <&adc1_in5_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_l476rg/nucleo_l476rg.dts b/boards/st/nucleo_l476rg/nucleo_l476rg.dts index 573c121dfd1a1e0..ecc5ea5cf7af2b0 100644 --- a/boards/st/nucleo_l476rg/nucleo_l476rg.dts +++ b/boards/st/nucleo_l476rg/nucleo_l476rg.dts @@ -167,7 +167,7 @@ stm32_lp_tick_source: &lptim1 { &adc1 { pinctrl-0 = <&adc1_in1_pc0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_l4r5zi/Kconfig.defconfig b/boards/st/nucleo_l4r5zi/Kconfig.defconfig index 31b375e87d2d9e6..57e21974c165e3d 100644 --- a/boards/st/nucleo_l4r5zi/Kconfig.defconfig +++ b/boards/st/nucleo_l4r5zi/Kconfig.defconfig @@ -9,14 +9,4 @@ config SPI_STM32_INTERRUPT default y depends on SPI -if NETWORKING - -config USB_DEVICE_STACK - default y - -config USB_DEVICE_NETWORK_EEM - default y - -endif # NETWORKING - endif # BOARD_NUCLEO_L4R5ZI diff --git a/boards/st/nucleo_l4r5zi/nucleo_l4r5zi.dts b/boards/st/nucleo_l4r5zi/nucleo_l4r5zi.dts index 690e4bea360abf8..ad1586e43828cf6 100644 --- a/boards/st/nucleo_l4r5zi/nucleo_l4r5zi.dts +++ b/boards/st/nucleo_l4r5zi/nucleo_l4r5zi.dts @@ -65,6 +65,7 @@ led2 = &red_led_0; sw0 = &user_button; pwm-led0 = &red_pwm_led; + die-temp0 = &die_temp; volt-sensor0 = &vref; volt-sensor1 = &vbat; }; @@ -206,11 +207,15 @@ zephyr_udc0: &usbotg_fs { &adc1 { pinctrl-0 = <&adc1_in1_pc0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; +&die_temp { + status = "okay"; +}; + &vref { status = "okay"; }; diff --git a/boards/st/nucleo_l552ze_q/nucleo_l552ze_q-common.dtsi b/boards/st/nucleo_l552ze_q/nucleo_l552ze_q-common.dtsi index 1e862347188370a..e0faedcc8e71dcf 100644 --- a/boards/st/nucleo_l552ze_q/nucleo_l552ze_q-common.dtsi +++ b/boards/st/nucleo_l552ze_q/nucleo_l552ze_q-common.dtsi @@ -82,7 +82,7 @@ &adc1 { pinctrl-0 = <&adc1_in1_pc0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_u031r8/nucleo_u031r8.dts b/boards/st/nucleo_u031r8/nucleo_u031r8.dts index 46e29de3bfef983..d82570718ddb815 100644 --- a/boards/st/nucleo_u031r8/nucleo_u031r8.dts +++ b/boards/st/nucleo_u031r8/nucleo_u031r8.dts @@ -105,7 +105,7 @@ &adc1 { pinctrl-0 = <&adc1_in0_pc0 &adc1_in1_pc1>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; vref-mv = <3300>; diff --git a/boards/st/nucleo_u083rc/doc/index.rst b/boards/st/nucleo_u083rc/doc/index.rst index 09db38710c61587..7cd2f5db578070a 100644 --- a/boards/st/nucleo_u083rc/doc/index.rst +++ b/boards/st/nucleo_u083rc/doc/index.rst @@ -49,6 +49,8 @@ They operate at a frequency of up to 56 MHz. - 4 µA wake-up from Stop mode - 52 µA/MHz Run mode - Brownout reset + - SPI (3) + - DMA Controller (2) - Core: @@ -98,6 +100,7 @@ They operate at a frequency of up to 56 MHz. - Candidate for Arm |reg| PSA level 1 and SESIP level 3 certifications - 5 passive anti-tamper pins - 96-bit unique ID + - True Random Number Generator (RNG) NIST SP800-90B compliant - Up to 10 timers, 2 watchdogs and RTC: @@ -106,6 +109,8 @@ They operate at a frequency of up to 56 MHz. 2x watchdogs, SysTick timer - RTC with hardware calendar, alarms and calibration +- 3 low-power 16-bit timers (available in Stop mode). + - Up to 20 communication peripherals: - 1 USB 2.0 full-speed crystal-less solution with LPM and BCD @@ -145,6 +150,8 @@ The Zephyr nucleo_u083rc board configuration supports the following hardware fea | UART | on-chip | serial port-polling; | | | | serial port-interrupt | +-----------+------------+-------------------------------------+ +| WATCHDOG | on-chip | independent watchdog | ++-----------+------------+-------------------------------------+ | ADC | on-chip | adc | +-----------+------------+-------------------------------------+ | DAC | on-chip | DAC Controller | @@ -153,6 +160,20 @@ The Zephyr nucleo_u083rc board configuration supports the following hardware fea +-----------+------------+-------------------------------------+ | PWM | on-chip | pwm | +-----------+------------+-------------------------------------+ +| RTC | on-chip | Real Time Clock | ++-----------+------------+-------------------------------------+ +| SPI | on-chip | spi | ++-----------+------------+-------------------------------------+ +| USB | on-chip | USB full-speed host/device bus | ++-----------+------------+-------------------------------------+ +| DMA | on-chip | Direct Memory Access Controller | ++-----------+------------+-------------------------------------+ +| RNG | on-chip | True Random number generator | ++-----------+------------+-------------------------------------+ +| AES | on-chip | crypto | ++-----------+------------+-------------------------------------+ +| LPTIM | on-chip | Low Power Timer | ++-----------+------------+-------------------------------------+ Other hardware features are not yet supported on this Zephyr port. diff --git a/boards/st/nucleo_u083rc/nucleo_u083rc.dts b/boards/st/nucleo_u083rc/nucleo_u083rc.dts index dc3493fa13ada8b..cfe5e1495621ffc 100644 --- a/boards/st/nucleo_u083rc/nucleo_u083rc.dts +++ b/boards/st/nucleo_u083rc/nucleo_u083rc.dts @@ -44,6 +44,7 @@ aliases { led0 = &green_led_1; sw0 = &user_button; + watchdog0 = &iwdg; }; }; @@ -61,10 +62,26 @@ status = "okay"; }; +&iwdg { + status = "okay"; +}; + &clk_hsi { status = "okay"; }; +&clk_hsi48 { + status = "okay"; +}; + +&clk_lse { + status = "okay"; +}; + +&clk_lsi { + status = "okay"; +}; + &pll { div-m = <1>; mul-n = <6>; @@ -95,17 +112,10 @@ clock-frequency = ; }; -&i2c2 { - pinctrl-0 = <&i2c2_scl_pa7 &i2c2_sda_pa6>; - pinctrl-names = "default"; - status = "okay"; - clock-frequency = ; -}; - &adc1 { pinctrl-0 = <&adc1_in0_pc0 &adc1_in1_pc1>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00100000>, <&rcc STM32_SRC_HSI ADC_SEL(2)>; st,adc-prescaler = <4>; @@ -134,3 +144,48 @@ status = "okay"; }; }; + +stm32_lp_tick_source: &lptim1 { + clocks = <&rcc STM32_CLOCK(APB1, 31U)>, + <&rcc STM32_SRC_LSI LPTIM1_SEL(1)>; + status = "okay"; +}; + +&spi1{ + pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>; + cs-gpios = <&gpioa 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + pinctrl-names = "default"; + status = "okay"; +}; + +&dma1 { + status = "okay"; +}; + +&dmamux1 { + status = "okay"; +}; + +&rng { + clocks = <&rcc STM32_CLOCK(AHB1, 18U)>, + <&rcc STM32_SRC_HSI48 CLK48_SEL(1)>; + status = "okay"; +}; + +&aes { + status = "okay"; +}; + +zephyr_udc0: &usb { + clocks = <&rcc STM32_CLOCK(APB1, 13U)>, + <&rcc STM32_SRC_HSI48 CLK48_SEL(1)>; + pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>; + pinctrl-names = "default"; + status = "okay"; +}; + +&rtc { + clocks = <&rcc STM32_CLOCK(APB1, 10U)>, + <&rcc STM32_SRC_LSE RTC_SEL(1)>; + status = "okay"; +}; diff --git a/boards/st/nucleo_u083rc/nucleo_u083rc.yaml b/boards/st/nucleo_u083rc/nucleo_u083rc.yaml index c4ddc5071c0970f..833c40f2e8659fd 100644 --- a/boards/st/nucleo_u083rc/nucleo_u083rc.yaml +++ b/boards/st/nucleo_u083rc/nucleo_u083rc.yaml @@ -8,11 +8,18 @@ toolchain: - xtools supported: - adc + - aes - arduino_gpio - dac + - dma - gpio - i2c + - lptim - pwm + - rng + - rtc + - spi - usart + - usb ram: 40 flash: 256 diff --git a/boards/st/nucleo_u575zi_q/nucleo_u575zi_q-common.dtsi b/boards/st/nucleo_u575zi_q/nucleo_u575zi_q-common.dtsi index 0d66260badd23ca..171aa4126586ada 100644 --- a/boards/st/nucleo_u575zi_q/nucleo_u575zi_q-common.dtsi +++ b/boards/st/nucleo_u575zi_q/nucleo_u575zi_q-common.dtsi @@ -129,7 +129,7 @@ &adc1 { pinctrl-0 = <&adc1_in1_pc0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; st,adc-prescaler = <4>; status = "okay"; }; @@ -137,7 +137,7 @@ &adc4 { pinctrl-0 = <&adc4_in18_pb0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_u5a5zj_q/doc/index.rst b/boards/st/nucleo_u5a5zj_q/doc/index.rst index ea919c4f10ee728..794a2351d825a0d 100644 --- a/boards/st/nucleo_u5a5zj_q/doc/index.rst +++ b/boards/st/nucleo_u5a5zj_q/doc/index.rst @@ -204,6 +204,8 @@ The Zephyr nucleo_u5a5zj_q board configuration supports the following hardware f +-----------+------------+-------------------------------------+ | RTC | on-chip | rtc | +-----------+------------+-------------------------------------+ +| USB | on-chip | USB 2.0 HS | ++-----------+------------+-------------------------------------+ Other hardware features are not yet supported on this Zephyr port. @@ -245,13 +247,15 @@ Default Zephyr Peripheral Mapping: - UART_2_TX : PD5 - UART_2_RX : PD6 - USER_PB : PC13 +- USB_DM : PA11 +- USB_DP : PA12 System Clock ------------ Nucleo U5A5ZJ Q System Clock could be driven by internal or external oscillator, as well as main PLL clock. By default System clock is driven by PLL clock at -160MHz, driven by 4MHz medium speed internal oscillator. +160MHz, driven by the 16MHz high speed oscillator. Serial Port ----------- @@ -259,13 +263,18 @@ Serial Port Nucleo U5A5ZJ Q board has 6 U(S)ARTs. The Zephyr console output is assigned to USART1. Default settings are 115200 8N1. - Backup SRAM ----------- In order to test backup SRAM you may want to disconnect VBAT from VDD. You can do it by removing ``SB50`` jumper on the back side of the board. +Using USB +--------- + +USB 2.0 high speed (HS) operation requires the HSE clock source to be populated +and enabled. The Nucleo U5A5ZJ-Q includes the 16MHz oscillator and required +jumper settings. Programming and Debugging ************************* diff --git a/boards/st/nucleo_u5a5zj_q/nucleo_u5a5zj_q-common.dtsi b/boards/st/nucleo_u5a5zj_q/nucleo_u5a5zj_q-common.dtsi index ecc9e862c990f48..45d7c817ec6007b 100644 --- a/boards/st/nucleo_u5a5zj_q/nucleo_u5a5zj_q-common.dtsi +++ b/boards/st/nucleo_u5a5zj_q/nucleo_u5a5zj_q-common.dtsi @@ -55,22 +55,23 @@ status = "okay"; }; -&clk_lse { +/* This board has a 16MHz crystal attached */ +&clk_hse { + clock-frequency = ; status = "okay"; }; -&clk_msis { +&clk_lse { status = "okay"; - msi-range = <4>; - msi-pll-mode; }; &pll1 { - div-m = <1>; - mul-n = <80>; - div-q = <2>; - div-r = <2>; - clocks = <&clk_msis>; + /* HSE 16MHz source, outputting 160MHz to sysclk and apbclk */ + div-m = <4>; /* input divisor */ + mul-n = <80>; /* VCO multiplication factor */ + div-q = <2>; /* system clock divisor */ + div-r = <2>; /* peripheral clock divisor */ + clocks = <&clk_hse>; status = "okay"; }; @@ -127,7 +128,7 @@ &adc1 { pinctrl-0 = <&adc1_in1_pc0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; st,adc-prescaler = <4>; status = "okay"; }; @@ -135,7 +136,7 @@ &adc4 { pinctrl-0 = <&adc4_in18_pb0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_u5a5zj_q/nucleo_u5a5zj_q.dts b/boards/st/nucleo_u5a5zj_q/nucleo_u5a5zj_q.dts index a9907afe61429f1..e34b10024ab059e 100644 --- a/boards/st/nucleo_u5a5zj_q/nucleo_u5a5zj_q.dts +++ b/boards/st/nucleo_u5a5zj_q/nucleo_u5a5zj_q.dts @@ -74,3 +74,9 @@ &gpdma1 { status = "okay"; }; + +zephyr_udc0: &usbotg_hs { + pinctrl-0 = <&usb_otg_hs_dm_pa11 &usb_otg_hs_dp_pa12>; + pinctrl-names = "default"; + status = "okay"; +}; diff --git a/boards/st/nucleo_u5a5zj_q/nucleo_u5a5zj_q.yaml b/boards/st/nucleo_u5a5zj_q/nucleo_u5a5zj_q.yaml index cd9370804141065..57c0712ffedb11c 100644 --- a/boards/st/nucleo_u5a5zj_q/nucleo_u5a5zj_q.yaml +++ b/boards/st/nucleo_u5a5zj_q/nucleo_u5a5zj_q.yaml @@ -21,5 +21,6 @@ supported: - backup_sram - dma - rtc + - usb_device ram: 2450 flash: 4096 diff --git a/boards/st/nucleo_wb05kz/doc/index.rst b/boards/st/nucleo_wb05kz/doc/index.rst index e1435584d403898..0c004e5995298f3 100644 --- a/boards/st/nucleo_wb05kz/doc/index.rst +++ b/boards/st/nucleo_wb05kz/doc/index.rst @@ -46,6 +46,14 @@ The Zephyr ``nucleo_wb05kz`` board target supports the following hardware featur +-----------+------------+-------------------------------------+ | FLASH | on-chip | internal flash memory | +-----------+------------+-------------------------------------+ +| I2C | on-chip | i2c | ++-----------+------------+-------------------------------------+ +| SPI | on-chip | spi | ++-----------+------------+-------------------------------------+ +| ADC | on-chip | adc | ++-----------+------------+-------------------------------------+ +| RADIO | on-chip | Bluetooth Low Energy | ++-----------+------------+-------------------------------------+ Other hardware features are not yet supported on this Zephyr port. @@ -53,6 +61,17 @@ Other hardware features are not yet supported on this Zephyr port. The default configuration can be found in the defconfig file: :zephyr_file:`boards/st/nucleo_wb09ke/nucleo_wb09ke_defconfig` +Bluetooh support +---------------- + +BLE support is enabled; however, to build a Zephyr sample using this board, +you first need to fetch the Bluetooth controller library into Zephyr as a binary BLOB. + +To fetch binary BLOBs: + +.. code-block:: console + + west blobs fetch hal_stm32 Connections and IOs =================== diff --git a/boards/st/nucleo_wb05kz/nucleo_wb05kz.dts b/boards/st/nucleo_wb05kz/nucleo_wb05kz.dts index e846abf8ddaf0d9..88f37c00186e45e 100644 --- a/boards/st/nucleo_wb05kz/nucleo_wb05kz.dts +++ b/boards/st/nucleo_wb05kz/nucleo_wb05kz.dts @@ -23,6 +23,7 @@ zephyr,shell-uart = &usart1; zephyr,sram = &sram0; zephyr,flash = &flash0; + zephyr,bt-c2h-uart = &usart1; }; leds: leds { @@ -95,6 +96,10 @@ slow-clock = <&clk_lse>; }; +&bt_hci_wb0 { + status = "okay"; +}; + &usart1 { pinctrl-0 = <&usart1_tx_pa1 &usart1_rx_pb0>; pinctrl-names = "default"; @@ -116,3 +121,16 @@ clocks = <&rcc STM32_CLOCK_BUS_APB1 (1 << 14)>, <&rcc STM32_SRC_SYSCLK SPI3_I2S3_SEL(3)>; }; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + /* Set 8KB of storage at the end of 192KB flash */ + storage_partition: partition@2e000 { + label = "storage"; + reg = <0x0002e000 DT_SIZE_K(8)>; + }; + }; +}; diff --git a/boards/st/nucleo_wb05kz/nucleo_wb05kz.yaml b/boards/st/nucleo_wb05kz/nucleo_wb05kz.yaml index bf602772d9daa95..cf931e9bd375676 100644 --- a/boards/st/nucleo_wb05kz/nucleo_wb05kz.yaml +++ b/boards/st/nucleo_wb05kz/nucleo_wb05kz.yaml @@ -16,4 +16,5 @@ supported: - gpio - i2c - spi + - bluetooth vendor: st diff --git a/boards/st/nucleo_wb09ke/doc/index.rst b/boards/st/nucleo_wb09ke/doc/index.rst index 2e124268b003c2f..bab52ff1ba73296 100644 --- a/boards/st/nucleo_wb09ke/doc/index.rst +++ b/boards/st/nucleo_wb09ke/doc/index.rst @@ -46,6 +46,14 @@ The Zephyr ``nucleo_wb09ke`` board target supports the following hardware featur +-----------+------------+-------------------------------------+ | FLASH | on-chip | internal flash memory | +-----------+------------+-------------------------------------+ +| I2C | on-chip | i2c | ++-----------+------------+-------------------------------------+ +| SPI | on-chip | spi | ++-----------+------------+-------------------------------------+ +| ADC | on-chip | adc | ++-----------+------------+-------------------------------------+ +| RADIO | on-chip | Bluetooth Low Energy | ++-----------+------------+-------------------------------------+ Other hardware features are not yet supported on this Zephyr port. @@ -53,6 +61,17 @@ Other hardware features are not yet supported on this Zephyr port. The default configuration can be found in the defconfig file: :zephyr_file:`boards/st/nucleo_wb09ke/nucleo_wb09ke_defconfig` +Bluetooh support +---------------- + +BLE support is enabled; however, to build a Zephyr sample using this board, +you first need to fetch the Bluetooth controller library into Zephyr as a binary BLOB. + +To fetch binary BLOBs: + +.. code-block:: console + + west blobs fetch hal_stm32 Connections and IOs =================== diff --git a/boards/st/nucleo_wb09ke/nucleo_wb09ke.dts b/boards/st/nucleo_wb09ke/nucleo_wb09ke.dts index 1052c04dd94e0a3..1b8826ed8844227 100644 --- a/boards/st/nucleo_wb09ke/nucleo_wb09ke.dts +++ b/boards/st/nucleo_wb09ke/nucleo_wb09ke.dts @@ -23,6 +23,7 @@ zephyr,shell-uart = &usart1; zephyr,sram = &sram0; zephyr,flash = &flash0; + zephyr,bt-c2h-uart = &usart1; }; leds: leds { @@ -95,6 +96,10 @@ slow-clock = <&clk_lse>; }; +&bt_hci_wb0 { + status = "okay"; +}; + &usart1 { pinctrl-0 = <&usart1_tx_pa1 &usart1_rx_pb0>; pinctrl-names = "default"; @@ -116,3 +121,16 @@ clocks = <&rcc STM32_CLOCK_BUS_APB1 (1 << 14)>, <&rcc STM32_SRC_SYSCLK SPI3_I2S3_SEL(3)>; }; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + /* Set 32KB of storage at the end of 512KB flash */ + storage_partition: partition@78000 { + label = "storage"; + reg = <0x00078000 DT_SIZE_K(32)>; + }; + }; +}; diff --git a/boards/st/nucleo_wb09ke/nucleo_wb09ke.yaml b/boards/st/nucleo_wb09ke/nucleo_wb09ke.yaml index a853e0e1d7fcab4..20c4a33cfec0b72 100644 --- a/boards/st/nucleo_wb09ke/nucleo_wb09ke.yaml +++ b/boards/st/nucleo_wb09ke/nucleo_wb09ke.yaml @@ -16,4 +16,5 @@ supported: - gpio - i2c - spi + - bluetooth vendor: st diff --git a/boards/st/nucleo_wb55rg/nucleo_wb55rg.dts b/boards/st/nucleo_wb55rg/nucleo_wb55rg.dts index f1a0d055aa87f58..d58d2ebde26c3d4 100644 --- a/boards/st/nucleo_wb55rg/nucleo_wb55rg.dts +++ b/boards/st/nucleo_wb55rg/nucleo_wb55rg.dts @@ -181,7 +181,7 @@ &adc1 { pinctrl-0 = <&adc1_in3_pc2 &adc1_in5_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_wba52cg/nucleo_wba52cg.dts b/boards/st/nucleo_wba52cg/nucleo_wba52cg.dts index 0c08acc0bfe6c4f..08b81dba0dc4968 100644 --- a/boards/st/nucleo_wba52cg/nucleo_wba52cg.dts +++ b/boards/st/nucleo_wba52cg/nucleo_wba52cg.dts @@ -125,7 +125,7 @@ &adc4 { pinctrl-0 = <&adc4_in8_pa1>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_wba55cg/nucleo_wba55cg.dts b/boards/st/nucleo_wba55cg/nucleo_wba55cg.dts index d527eea70430383..2070611b3261aac 100644 --- a/boards/st/nucleo_wba55cg/nucleo_wba55cg.dts +++ b/boards/st/nucleo_wba55cg/nucleo_wba55cg.dts @@ -147,7 +147,7 @@ &adc4 { pinctrl-0 = <&adc4_in8_pa1 &adc4_in9_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/nucleo_wl55jc/nucleo_wl55jc.dts b/boards/st/nucleo_wl55jc/nucleo_wl55jc.dts index 98fcc7057aef37a..1fa0c4d9fdb6f5d 100644 --- a/boards/st/nucleo_wl55jc/nucleo_wl55jc.dts +++ b/boards/st/nucleo_wl55jc/nucleo_wl55jc.dts @@ -149,7 +149,7 @@ stm32_lp_tick_source: &lptim1 { &adc1 { pinctrl-0 = <&adc_in5_pb1 &adc_in0_pb13>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/sensortile_box_pro/Kconfig b/boards/st/sensortile_box_pro/Kconfig deleted file mode 100644 index d8dc05c44f6a65e..000000000000000 --- a/boards/st/sensortile_box_pro/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -# SENSORTILE_BOX_PRO board configuration - -# Copyright (c) 2024 STMicroelectronics -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_SENSORTILE_BOX_PRO - -config BOARD_SERIAL_BACKEND_CDC_ACM - bool "Use USB CDC as serial console backend" - default y - -endif # BOARD_SENSORTILE_BOX_PRO diff --git a/boards/st/sensortile_box_pro/Kconfig.defconfig b/boards/st/sensortile_box_pro/Kconfig.defconfig index fffa4f419f8b1b5..a357839f6c4b26f 100644 --- a/boards/st/sensortile_box_pro/Kconfig.defconfig +++ b/boards/st/sensortile_box_pro/Kconfig.defconfig @@ -20,50 +20,6 @@ config SPI_STM32_INTERRUPT default y depends on SPI -if BOARD_SERIAL_BACKEND_CDC_ACM - -config USB_DEVICE_STACK - default y - -config USB_CDC_ACM - default SERIAL - -config USB_DEVICE_INITIALIZE_AT_BOOT - default y if CONSOLE - -config SHELL_BACKEND_SERIAL_CHECK_DTR - default SHELL - depends on UART_LINE_CTRL - -config UART_LINE_CTRL - default SHELL - -config USB_DEVICE_REMOTE_WAKEUP - default n - -config USB_DEVICE_VID - default 0x0483 - -config USB_DEVICE_PID - default 0x5740 - -config USB_DEVICE_PRODUCT - default "Zephyr CDC SensorTile.box PRO" - -if LOG - -# Logger cannot use itself to log -choice USB_CDC_ACM_LOG_LEVEL_CHOICE - default USB_CDC_ACM_LOG_LEVEL_OFF -endchoice - -endif # LOG - -endif # BOARD_SERIAL_BACKEND_CDC_ACM - -DT_CHOSEN_ZEPHYR_CONSOLE := zephyr,console - -config UART_CONSOLE - default y if $(dt_chosen_enabled,$(DT_CHOSEN_ZEPHYR_CONSOLE)) && CONSOLE +source "boards/common/usb/Kconfig.cdc_acm_serial.defconfig" endif # BOARD_SENSORTILE_BOX_PRO diff --git a/boards/st/sensortile_box_pro/doc/index.rst b/boards/st/sensortile_box_pro/doc/index.rst index 1487518e68689e7..528e6762a87585a 100644 --- a/boards/st/sensortile_box_pro/doc/index.rst +++ b/boards/st/sensortile_box_pro/doc/index.rst @@ -221,24 +221,7 @@ Console There are two possible options for Zephyr console output: -- through USB as USB CDC/ACM class. This is the default case present in the board dts file - and is enabled by :kconfig:option:`CONFIG_BOARD_SERIAL_BACKEND_CDC_ACM`. - -.. code-block:: dts - :caption: boards/st/sensortile_box_pro/sensortile_box_pro.dts - - / { - chosen { - zephyr,console = &cdc_acm_uart0; - }; - }; - - &zephyr_udc0 { - cdc_acm_uart0: cdc_acm_uart0 { - compatible = "zephyr,cdc-acm-uart"; - }; - }; - +- through common CDC ACM UART backend configuration for all boards - through UART4 which is available on SWD connector (JP2). In this case a JTAG adapter can be used to connect SensorTile.box PRO and have both SWD and console lines available. diff --git a/boards/st/sensortile_box_pro/sensortile_box_pro.dts b/boards/st/sensortile_box_pro/sensortile_box_pro.dts index 7014fd86a7e5357..85f01ab2a08b98f 100644 --- a/boards/st/sensortile_box_pro/sensortile_box_pro.dts +++ b/boards/st/sensortile_box_pro/sensortile_box_pro.dts @@ -14,9 +14,6 @@ compatible = "st,sensortile-box-pro"; chosen { - zephyr,console = &cdc_acm_uart0; - zephyr,shell-uart = &cdc_acm_uart0; - zephyr,bt-c2h-uart = &cdc_acm_uart0; zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,code-partition = &slot0_partition; @@ -269,16 +266,14 @@ zephyr_udc0: &usbotg_fs { pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>; pinctrl-names = "default"; status = "okay"; - - cdc_acm_uart0: cdc_acm_uart0 { - compatible = "zephyr,cdc-acm-uart"; - }; }; +#include <../boards/common/usb/cdc_acm_serial.dtsi> + &adc1 { pinctrl-0 = <&adc1_in15_pb0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; st,adc-prescaler = <4>; status = "okay"; }; @@ -286,7 +281,7 @@ zephyr_udc0: &usbotg_fs { &adc4 { pinctrl-0 = <&adc4_in19_pb1>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/steval_stwinbx1/Kconfig b/boards/st/steval_stwinbx1/Kconfig deleted file mode 100644 index 520aea81d168add..000000000000000 --- a/boards/st/steval_stwinbx1/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -# STEVAL_STWINBX1 Development kit board configuration - -# Copyright (c) 2024 STMicroelectronics -# SPDX-License-Identifier: Apache-2.0 - -if BOARD_STEVAL_STWINBX1 - -config BOARD_SERIAL_BACKEND_CDC_ACM - bool "Use USB CDC as serial console backend" - default y - -endif # BOARD_STEVAL_STWINBX1 diff --git a/boards/st/steval_stwinbx1/Kconfig.defconfig b/boards/st/steval_stwinbx1/Kconfig.defconfig index 35256e0c2ada75a..3d72efbe742f8f6 100644 --- a/boards/st/steval_stwinbx1/Kconfig.defconfig +++ b/boards/st/steval_stwinbx1/Kconfig.defconfig @@ -20,50 +20,6 @@ config SPI_STM32_INTERRUPT default y depends on SPI -if BOARD_SERIAL_BACKEND_CDC_ACM - -config USB_DEVICE_STACK - default y - -config USB_CDC_ACM - default SERIAL - -config USB_DEVICE_INITIALIZE_AT_BOOT - default y if CONSOLE - -config SHELL_BACKEND_SERIAL_CHECK_DTR - default SHELL - depends on UART_LINE_CTRL - -config UART_LINE_CTRL - default SHELL - -config USB_DEVICE_REMOTE_WAKEUP - default n - -config USB_DEVICE_VID - default 0x0483 - -config USB_DEVICE_PID - default 0x5740 - -config USB_DEVICE_PRODUCT - default "Zephyr CDC STEval-STWinbx1" - -if LOG - -# Logger cannot use itself to log -choice USB_CDC_ACM_LOG_LEVEL_CHOICE - default USB_CDC_ACM_LOG_LEVEL_OFF -endchoice - -endif # LOG - -endif # BOARD_SERIAL_BACKEND_CDC_ACM - -DT_CHOSEN_ZEPHYR_CONSOLE := zephyr,console - -config UART_CONSOLE - default y if $(dt_chosen_enabled,$(DT_CHOSEN_ZEPHYR_CONSOLE)) && CONSOLE +source "boards/common/usb/Kconfig.cdc_acm_serial.defconfig" endif # BOARD_STEVAL_STWINBX1 diff --git a/boards/st/steval_stwinbx1/doc/index.rst b/boards/st/steval_stwinbx1/doc/index.rst index 474127e8bcca1d3..8ef4c10dccaf0a1 100644 --- a/boards/st/steval_stwinbx1/doc/index.rst +++ b/boards/st/steval_stwinbx1/doc/index.rst @@ -230,23 +230,7 @@ Console There are two possible options for Zephyr console output: -- through USB as USB CDC/ACM class. This is the default case present in the board dts file - and is enabled by :kconfig:option:`CONFIG_BOARD_SERIAL_BACKEND_CDC_ACM`. - -.. code-block:: dts - :caption: boards/st/steval_stwinbx1/steval_stwinbx1.dts - - / { - chosen { - zephyr,console = &cdc_acm_uart0; - }; - }; - - &zephyr_udc0 { - cdc_acm_uart0: cdc_acm_uart0 { - compatible = "zephyr,cdc-acm-uart"; - }; - }; +- through common CDC ACM UART backend configuration for all boards - through USART2 which is available on SWD connector (CN4). In this case a JTAG adapter can be used to connect STEVAL-STWINBX1 and have both SWD and console lines available. diff --git a/boards/st/steval_stwinbx1/steval_stwinbx1.dts b/boards/st/steval_stwinbx1/steval_stwinbx1.dts index 1ca613ff12d23f5..c9ef1b4299bc454 100644 --- a/boards/st/steval_stwinbx1/steval_stwinbx1.dts +++ b/boards/st/steval_stwinbx1/steval_stwinbx1.dts @@ -14,9 +14,6 @@ compatible = "st,steval_stwinbx1"; chosen { - zephyr,console = &cdc_acm_uart0; - zephyr,shell-uart = &cdc_acm_uart0; - zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,code-partition = &slot0_partition; @@ -250,16 +247,14 @@ zephyr_udc0: &usbotg_fs { pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>; pinctrl-names = "default"; status = "okay"; - - cdc_acm_uart0: cdc_acm_uart0 { - compatible = "zephyr,cdc-acm-uart"; - }; }; +#include <../boards/common/usb/cdc_acm_serial.dtsi> + &adc1 { pinctrl-0 = <&adc1_in1_pc0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; st,adc-prescaler = <4>; vref-mv = <2750>; status = "okay"; @@ -268,7 +263,7 @@ zephyr_udc0: &usbotg_fs { &adc4 { pinctrl-0 = <&adc4_in3_pc2>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; st,adc-prescaler = <4>; vref-mv = <2750>; status = "okay"; diff --git a/boards/st/stm32c0116_dk/stm32c0116_dk.dts b/boards/st/stm32c0116_dk/stm32c0116_dk.dts index 79b4db1fa25834a..1e388a0a28109c4 100644 --- a/boards/st/stm32c0116_dk/stm32c0116_dk.dts +++ b/boards/st/stm32c0116_dk/stm32c0116_dk.dts @@ -141,7 +141,7 @@ &adc1 { pinctrl-0 = <&adc1_in8_pa8>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <2>; status = "okay"; diff --git a/boards/st/stm32f3_disco/stm32f3_disco.dts b/boards/st/stm32f3_disco/stm32f3_disco.dts index 44a66f038be73c4..01fbad2721fd18b 100644 --- a/boards/st/stm32f3_disco/stm32f3_disco.dts +++ b/boards/st/stm32f3_disco/stm32f3_disco.dts @@ -219,7 +219,7 @@ zephyr_udc0: &usb { &adc1 { pinctrl-0 = <&adc1_in1_pa0>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <2>; status = "okay"; }; diff --git a/boards/st/stm32f411e_disco/stm32f411e_disco.dts b/boards/st/stm32f411e_disco/stm32f411e_disco.dts index 197df98212d3063..1f501e05ae03f6e 100644 --- a/boards/st/stm32f411e_disco/stm32f411e_disco.dts +++ b/boards/st/stm32f411e_disco/stm32f411e_disco.dts @@ -81,6 +81,9 @@ accel0 = &lsm303agr_accel; mcuboot-button0 = &user_button; mcuboot-led0 = &orange_led_3; + die-temp0 = &die_temp; + volt-sensor0 = &vref; + volt-sensor1 = &vbat; }; }; @@ -193,3 +196,20 @@ zephyr_udc0: &usbotg_fs { }; }; }; + +&adc1 { + st,adc-prescaler = <2>; + status = "okay"; +}; + +&die_temp { + status = "okay"; +}; + +&vref { + status = "okay"; +}; + +&vbat { + status = "okay"; +}; diff --git a/boards/st/stm32f412g_disco/doc/index.rst b/boards/st/stm32f412g_disco/doc/index.rst index 7dab509efecc100..db8674826c22cde 100644 --- a/boards/st/stm32f412g_disco/doc/index.rst +++ b/boards/st/stm32f412g_disco/doc/index.rst @@ -41,7 +41,7 @@ More information about the board can be found at the `32F412GDISCOVERY website`_ Hardware ******** -STM32F469I-DISCO Discovery kit provides the following hardware components: +STM32F412G-DISCO Discovery kit provides the following hardware components: - STM32F412ZGT6 in LQFP144 package - ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU diff --git a/boards/st/stm32f413h_disco/Kconfig.stm32f413h_disco b/boards/st/stm32f413h_disco/Kconfig.stm32f413h_disco new file mode 100644 index 000000000000000..0dc50d88be03660 --- /dev/null +++ b/boards/st/stm32f413h_disco/Kconfig.stm32f413h_disco @@ -0,0 +1,5 @@ +# Copyright (c) 2024 STMicroelectronics +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_STM32F413H_DISCO + select SOC_STM32F413XX diff --git a/boards/st/stm32f413h_disco/arduino_r3_connector.dtsi b/boards/st/stm32f413h_disco/arduino_r3_connector.dtsi new file mode 100644 index 000000000000000..1a5a2bc468ce9a8 --- /dev/null +++ b/boards/st/stm32f413h_disco/arduino_r3_connector.dtsi @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2024 STMicroelectronics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + arduino_header: connector { + compatible = "arduino-header-r3"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpioc 0 0>, /* A0 */ + <1 0 &gpioa 1 0>, /* A1 */ + <2 0 &gpioa 2 0>, /* A2 */ + <3 0 &gpioa 5 0>, /* A3 */ + <4 0 &gpiob 1 0>, /* A4 */ + <5 0 &gpioc 4 0>, /* A5 */ + <6 0 &gpiof 6 0>, /* D0 */ + <7 0 &gpiof 7 0>, /* D1 */ + <8 0 &gpiog 13 0>, /* D2 */ + <9 0 &gpiof 10 0>, /* D3 */ + <10 0 &gpiob 6 0>, /* D4 */ + <11 0 &gpioe 6 0>, /* D5 */ + <12 0 &gpiob 0 0>, /* D6 */ + <13 0 &gpioc 13 0>, /* D7 */ + <14 0 &gpioa 4 0>, /* D8 */ + <15 0 &gpiob 8 0>, /* D9 */ + <16 0 &gpioa 15 0>, /* D10 */ + <17 0 &gpiob 5 0>, /* D11 */ + <18 0 &gpiob 4 0>, /* D12 */ + <19 0 &gpiob 12 0>, /* D13 */ + <20 0 &gpiob 11 0>, /* D14 */ + <21 0 &gpiob 10 0>; /* D15 */ + }; +}; + +arduino_i2c: &i2c2 {}; +arduino_spi: &spi3 {}; +arduino_serial: &uart7 {}; diff --git a/boards/st/stm32f413h_disco/board.cmake b/boards/st/stm32f413h_disco/board.cmake new file mode 100644 index 000000000000000..800b779a42dbc46 --- /dev/null +++ b/boards/st/stm32f413h_disco/board.cmake @@ -0,0 +1,10 @@ +# SPDX-License-Identifier: Apache-2.0 + +# keep first +board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw") +board_runner_args(jlink "--device=STM32F413ZH" "--speed=4000") + +# keep first +include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/st/stm32f413h_disco/board.yml b/boards/st/stm32f413h_disco/board.yml new file mode 100644 index 000000000000000..e29d47b57be9b53 --- /dev/null +++ b/boards/st/stm32f413h_disco/board.yml @@ -0,0 +1,6 @@ +board: + name: stm32f413h_disco + full_name: STM32F413H Discovery + vendor: st + socs: + - name: stm32f413xx diff --git a/boards/st/stm32f413h_disco/doc/img/stm32F413H_DiscoveryKit.webp b/boards/st/stm32f413h_disco/doc/img/stm32F413H_DiscoveryKit.webp new file mode 100644 index 000000000000000..93785299b0ba005 Binary files /dev/null and b/boards/st/stm32f413h_disco/doc/img/stm32F413H_DiscoveryKit.webp differ diff --git a/boards/st/stm32f413h_disco/doc/index.rst b/boards/st/stm32f413h_disco/doc/index.rst new file mode 100644 index 000000000000000..49ce176da6514e0 --- /dev/null +++ b/boards/st/stm32f413h_disco/doc/index.rst @@ -0,0 +1,206 @@ +.. zephyr:board:: stm32f413h_disco + +Overview +******** + +The STM32F413H-DISCO Discovery kit features an ARM Cortex-M4 based STM32F413ZH MCU +with a wide range of connectivity support and configurations. Here are +some highlights of the STM32F413H-DISCO board: + + +- STM32F413ZHT6 microcontroller featuring 1.5 Mbyte of Flash memory and 320 Kbytes of RAM in an LQFP144 package +- On-board ST-LINK/V2-1 SWD debugger supporting USB re-enumeration capability: + + - USB virtual COM port + - mass storage + - debug port + +- 1.54 inch 240x240 pixel TFT color LCD with parallel interface and capacitive touchscreen +- I2S Audio CODEC, with a stereo headset jack, including analog microphone input and a loudspeaker output +- Stereo digital MEMS microphones +- MicroSD card connector extension +- I2C extension connector +- 128 Mbit Quad-SPI Nor Flash +- 8 Mbit 16-bit wide PSRAM +- Reset and User buttons +- Two color user LEDs. +- USB OTG FS with Micro-AB connector +- Four power supply options: + + - ST-LINK/V2-1 USB connector + - User USB FS connector + - VIN from Arduino* connectors + - + 5 V from Arduino* connectors + +- Two power supplies for MCU: 2.0 V and 3.3 V +- Compatible with Arduino(tm) Uno revision 3 connectors +- Extension connector for direct access to various features of STM32F413ZHT6 MCU +- Comprehensive free software including a variety of examples, part of STM32Cube package + +More information about the board can be found at the `32F413HDISCOVERY website`_. + +Hardware +******** + +STM32F413H-DISCO Discovery kit provides the following hardware components: + +- STM32F413ZHT6 in LQFP144 package +- ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU +- 100 MHz max CPU frequency +- VDD from 1.7 V to 3.6 V +- 1.5 MB Flash +- 320 KB SRAM +- GPIO with external interrupt capability +- LCD parallel interface, 8080/6800 modes +- 1x12-bit ADC with 16 channels +- RTC +- Advanced-control Timer +- General Purpose Timers (12) +- Watchdog Timers (2) +- USART/UART (10) +- I2C (4) +- SPI (5) +- SDIO +- SAI +- 3xCAN +- USB OTG 2.0 Full-speed +- CRC calculation unit +- True random number generator +- DMA Controller + +More information about STM32F413ZH can be found here: + - `STM32F413ZH on www.st.com`_ + - `STM32F413 reference manual`_ + +Supported Features +================== + +The Zephyr STM32F413H-DISCO board configuration supports the following hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial port-polling; | +| | | serial port-interrupt | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| I2C | on-chip | i2c | ++-----------+------------+-------------------------------------+ +| SPI | on-chip | spi | ++-----------+------------+-------------------------------------+ + +Other hardware features are not yet supported by Zephyr. + +The default configuration can be found in +:zephyr_file:`boards/st/stm32f413h_disco/stm32f413h_disco_defconfig` + + +Pin Mapping +=========== + +STM32F413H-DISCO Discovery kit has 8 GPIO controllers. These controllers are responsible for pin muxing, +input/output, pull-up, etc. + +For more details please refer to `32F413HDISCOVERY board User Manual`_. + +Default Zephyr Peripheral Mapping: +---------------------------------- +- UART_6_TX : PG14 +- UART_6_RX : PG9 +- LD1 : PE3 +- LD2 : PC5 + +System Clock +============ + +STM32F413H-DISCO System Clock could be driven by internal or external oscillator, +as well as main PLL clock. By default System clock is driven by PLL clock at 100MHz, +that is driven by the internal oscillator. + +Serial Port +=========== + +The STM32F413H-DISCO Discovery kit has up to 10 UARTs. The Zephyr console output is assigned to UART6. +Default settings are 115200 8N1. + + +Programming and Debugging +************************* + +STM32F413H-DISCO Discovery kit includes an ST-LINK/V2 embedded debug tool interface. + +Applications for the STM32F413H-DISCO board configuration can be built and +flashed in the usual way (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +Flashing +======== + +The board is configured to be flashed using west `STM32CubeProgrammer`_ runner, +so its :ref:`installation ` is required. + +Alternatively, OpenOCD or JLink can also be used to flash the board using +the ``--runner`` (or ``-r``) option: + +.. code-block:: console + + $ west flash --runner openocd + $ west flash --runner jlink + +Flashing an application to STM32F413H-DISCO +------------------------------------------- + +Connect the STM32F413H-DISCO Discovery kit to your host computer using +the USB port, then run a serial host program to connect with your +board: + +.. code-block:: console + + $ minicom -D /dev/ttyACM0 + +Then build and flash an application. Here is an example for the +:zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: stm32f413h_disco + :goals: build flash + +You should see the following message on the console: + +.. code-block:: console + + Hello World! stm32f413h_disco/stm32f413xx + + +Debugging +========= + +You can debug an application in the usual way. Here is an example for the +:zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: stm32f413h_disco + :maybe-skip-config: + :goals: debug + +.. _32F413HDISCOVERY website: + https://www.st.com/en/evaluation-tools/32f413hdiscovery.html + +.. _32F413HDISCOVERY board User Manual: + https://www.st.com/resource/en/user_manual/um2135-discovery-kit-with-stm32f413zh-mcu-stmicroelectronics.pdf + +.. _STM32F413ZH on www.st.com: + https://www.st.com/en/microcontrollers/stm32f413zh.html + +.. _STM32F413 reference manual: + https://www.st.com/resource/en/reference_manual/rm0430-stm32f413423-advanced-armbased-32bit-mcus-stmicroelectronics.pdf + +.. _STM32CubeProgrammer: + https://www.st.com/en/development-tools/stm32cubeprog.html diff --git a/boards/st/stm32f413h_disco/stm32f413h_disco.dts b/boards/st/stm32f413h_disco/stm32f413h_disco.dts new file mode 100644 index 000000000000000..72315d784e239bc --- /dev/null +++ b/boards/st/stm32f413h_disco/stm32f413h_disco.dts @@ -0,0 +1,102 @@ +/* + * Copyright (c) 2024 STMicroelectronics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include +#include "arduino_r3_connector.dtsi" +#include + +/ { + model = "STMicroelectronics STM32F413H-DISCO board"; + compatible = "st,stm32f413h-disco"; + + chosen { + zephyr,console = &usart6; + zephyr,shell-uart = &usart6; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + }; + + leds { + compatible = "gpio-leds"; + green_led_1: led_1 { + gpios = <&gpioc 5 GPIO_ACTIVE_HIGH>; + label = "User LD1"; + }; + red_led_2: led_2 { + gpios = <&gpioe 3 GPIO_ACTIVE_HIGH>; + label = "User LD4"; + }; + }; + + aliases { + led0 = &green_led_1; + led1 = &red_led_2; + + }; +}; + +&clk_lsi { + status = "okay"; +}; + +&clk_hse { + hse-bypass; + clock-frequency = ; /* STLink 8MHz clock */ + status = "okay"; +}; + +&pll { + div-m = <4>; + mul-n = <100>; + div-p = <2>; + div-q = <8>; + clocks = <&clk_hse>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = ; + ahb-prescaler = <1>; + apb1-prescaler = <2>; + apb2-prescaler = <1>; +}; + +&usart6 { + pinctrl-0 = <&usart6_tx_pg14 &usart6_rx_pg9>; + pinctrl-names = "default"; + current-speed = <115200>; + status = "okay"; +}; + +&uart7 { + pinctrl-0 = <&uart7_tx_pf7 &uart7_rx_pf6>; + pinctrl-names = "default"; + current-speed = <115200>; + status = "okay"; +}; + +&i2c2 { + pinctrl-0 = <&i2c2_scl_pb10 &i2c2_sda_pb11>; + pinctrl-names = "default"; + clock-frequency = ; + status = "okay"; +}; + +&spi3 { + pinctrl-0 = <&spi3_nss_pa15 &spi3_sck_pb12 + &spi3_miso_pb4 &spi3_mosi_pb5>; + pinctrl-names = "default"; + status = "okay"; +}; + +&rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, + <&rcc STM32_SRC_LSI RTC_SEL(2)>; + status = "okay"; +}; diff --git a/boards/st/stm32f413h_disco/stm32f413h_disco.yaml b/boards/st/stm32f413h_disco/stm32f413h_disco.yaml new file mode 100644 index 000000000000000..27f178934f8835e --- /dev/null +++ b/boards/st/stm32f413h_disco/stm32f413h_disco.yaml @@ -0,0 +1,14 @@ +identifier: stm32f413h_disco +name: ST STM32F413H Discovery +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +supported: + - arduino_gpio + - arduino_serial + - arduino_i2c + - arduino_spi +vendor: st diff --git a/boards/st/stm32f413h_disco/stm32f413h_disco_defconfig b/boards/st/stm32f413h_disco/stm32f413h_disco_defconfig new file mode 100644 index 000000000000000..2ae252482c91ba8 --- /dev/null +++ b/boards/st/stm32f413h_disco/stm32f413h_disco_defconfig @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: Apache-2.0 + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable HW stack protection +CONFIG_HW_STACK_PROTECTION=y + +CONFIG_SERIAL=y + +# Console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable GPIO ports A, B, C, D, E, F, G, H +CONFIG_GPIO=y diff --git a/boards/st/stm32f413h_disco/support/openocd.cfg b/boards/st/stm32f413h_disco/support/openocd.cfg new file mode 100644 index 000000000000000..837f0cd29589f23 --- /dev/null +++ b/boards/st/stm32f413h_disco/support/openocd.cfg @@ -0,0 +1,12 @@ +source [find board/stm32f4discovery.cfg] + +$_TARGETNAME configure -event gdb-attach { + echo "Debugger attaching: halting execution" + reset halt + gdb_breakpoint_override hard +} + +$_TARGETNAME configure -event gdb-detach { + echo "Debugger detaching: resuming execution" + resume +} diff --git a/boards/st/stm32f4_disco/stm32f4_disco.dts b/boards/st/stm32f4_disco/stm32f4_disco.dts index fdc52ed97842cad..4e5d9ff87f869cf 100644 --- a/boards/st/stm32f4_disco/stm32f4_disco.dts +++ b/boards/st/stm32f4_disco/stm32f4_disco.dts @@ -77,6 +77,9 @@ led2 = &red_led_5; led3 = &blue_led_6; sw0 = &user_button; + die-temp0 = &die_temp; + volt-sensor0 = &vref; + volt-sensor1 = &vbat; }; }; @@ -167,3 +170,20 @@ zephyr_udc0: &usbotg_fs { pinctrl-names = "default"; status = "okay"; }; + +&adc1 { + st,adc-prescaler = <2>; + status = "okay"; +}; + +&die_temp { + status = "okay"; +}; + +&vref { + status = "okay"; +}; + +&vbat { + status = "okay"; +}; diff --git a/boards/st/stm32g081b_eval/stm32g081b_eval.dts b/boards/st/stm32g081b_eval/stm32g081b_eval.dts index fa29e8147d0dc50..103e745cfe02438 100644 --- a/boards/st/stm32g081b_eval/stm32g081b_eval.dts +++ b/boards/st/stm32g081b_eval/stm32g081b_eval.dts @@ -131,7 +131,7 @@ &adc1 { pinctrl-0 = <&adc1_in3_pa3 &adc1_in9_pb1>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; diff --git a/boards/st/stm32h573i_dk/stm32h573i_dk.dts b/boards/st/stm32h573i_dk/stm32h573i_dk.dts index fcc109526287cd3..97664d80ebab638 100644 --- a/boards/st/stm32h573i_dk/stm32h573i_dk.dts +++ b/boards/st/stm32h573i_dk/stm32h573i_dk.dts @@ -241,7 +241,7 @@ <&rcc STM32_SRC_HCLK ADCDAC_SEL(0)>; pinctrl-0 = <&adc1_inp6_pf12>; /* Arduino A5 */ pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; st,adc-prescaler = <6>; status = "okay"; }; diff --git a/boards/st/stm32h735g_disco/stm32h735g_disco.dts b/boards/st/stm32h735g_disco/stm32h735g_disco.dts index af351902869a4c2..0dc2d17f93da9c9 100644 --- a/boards/st/stm32h735g_disco/stm32h735g_disco.dts +++ b/boards/st/stm32h735g_disco/stm32h735g_disco.dts @@ -124,7 +124,7 @@ &adc1 { pinctrl-0 = <&adc1_inp0_pa0_c>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/stm32h750b_dk/stm32h750b_dk.dts b/boards/st/stm32h750b_dk/stm32h750b_dk.dts index 711a2ba7eee4064..b5c9189288b5778 100644 --- a/boards/st/stm32h750b_dk/stm32h750b_dk.dts +++ b/boards/st/stm32h750b_dk/stm32h750b_dk.dts @@ -239,7 +239,7 @@ }; &adc3 { - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/stm32h7b3i_dk/Kconfig.defconfig b/boards/st/stm32h7b3i_dk/Kconfig.defconfig index 863570e555a1b86..4c7bf8c81cfb379 100644 --- a/boards/st/stm32h7b3i_dk/Kconfig.defconfig +++ b/boards/st/stm32h7b3i_dk/Kconfig.defconfig @@ -22,10 +22,10 @@ if LVGL config CACHE_MANAGEMENT default y -config LV_USE_GPU_STM32_DMA2D +config LV_USE_DRAW_DMA2D default y -config LV_GPU_DMA2D_CMSIS_INCLUDE +config LV_DRAW_DMA2D_HAL_INCLUDE default "stm32h7xx.h" config STM32_LTDC_FB_NUM diff --git a/boards/st/stm32h7s78_dk/stm32h7s78_dk.dts b/boards/st/stm32h7s78_dk/stm32h7s78_dk.dts index 6cd70cbe60d0777..e4192d41641a179 100644 --- a/boards/st/stm32h7s78_dk/stm32h7s78_dk.dts +++ b/boards/st/stm32h7s78_dk/stm32h7s78_dk.dts @@ -148,7 +148,7 @@ &adc1 { pinctrl-0 = <&adc1_inp6_pf12>; /* Arduino A3 */ pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; @@ -156,7 +156,7 @@ &adc2 { pinctrl-0 = <&adc2_inp2_pf13>; /* Arduino A4 */ pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/stm32l496g_disco/stm32l496g_disco.dts b/boards/st/stm32l496g_disco/stm32l496g_disco.dts index a6d1e876f4e81c9..9027656636a476c 100644 --- a/boards/st/stm32l496g_disco/stm32l496g_disco.dts +++ b/boards/st/stm32l496g_disco/stm32l496g_disco.dts @@ -164,7 +164,7 @@ &adc1 { pinctrl-0 = < &adc1_in2_pc1>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/stm32l4r9i_disco/stm32l4r9i_disco.dts b/boards/st/stm32l4r9i_disco/stm32l4r9i_disco.dts index 49737c68c8f56a9..27cfdb2f0a7ad16 100644 --- a/boards/st/stm32l4r9i_disco/stm32l4r9i_disco.dts +++ b/boards/st/stm32l4r9i_disco/stm32l4r9i_disco.dts @@ -190,7 +190,7 @@ pinctrl-0 = <&adc1_in5_pa0 &adc1_in12_pa7 &adc1_in15_pb0 &adc1_in4_pc3 &adc1_in13_pc4>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <1>; }; diff --git a/boards/st/stm32l562e_dk/stm32l562e_dk_common.dtsi b/boards/st/stm32l562e_dk/stm32l562e_dk_common.dtsi index cf09783fc2322b9..bfb3761264ea6e2 100644 --- a/boards/st/stm32l562e_dk/stm32l562e_dk_common.dtsi +++ b/boards/st/stm32l562e_dk/stm32l562e_dk_common.dtsi @@ -277,7 +277,7 @@ stm32_lp_tick_source: &lptim1 { &adc1 { pinctrl-0 = <&adc1_in13_pc4>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/stm32u083c_dk/arduino_r3_connector.dtsi b/boards/st/stm32u083c_dk/arduino_r3_connector.dtsi index 297fd9b7f183065..f2b85867b89ec9b 100644 --- a/boards/st/stm32u083c_dk/arduino_r3_connector.dtsi +++ b/boards/st/stm32u083c_dk/arduino_r3_connector.dtsi @@ -36,3 +36,4 @@ }; arduino_serial: &usart2 {}; +arduino_i2c: &i2c1 {}; diff --git a/boards/st/stm32u083c_dk/stm32u083c_dk.dts b/boards/st/stm32u083c_dk/stm32u083c_dk.dts index 6bf36bc3c87a4eb..4f340422d5152de 100644 --- a/boards/st/stm32u083c_dk/stm32u083c_dk.dts +++ b/boards/st/stm32u083c_dk/stm32u083c_dk.dts @@ -75,7 +75,7 @@ &adc1 { pinctrl-0 = <&adc1_in0_pc0 &adc1_in1_pc1>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00100000>, <&rcc STM32_SRC_HSI ADC_SEL(2)>; st,adc-prescaler = <4>; diff --git a/boards/st/stm32u083c_dk/stm32u083c_dk.yaml b/boards/st/stm32u083c_dk/stm32u083c_dk.yaml index 56767fa5f5dc4a6..3db304b10ef105d 100644 --- a/boards/st/stm32u083c_dk/stm32u083c_dk.yaml +++ b/boards/st/stm32u083c_dk/stm32u083c_dk.yaml @@ -9,6 +9,8 @@ toolchain: supported: - adc - arduino_gpio + - arduino_serial + - arduino_i2c - dac - gpio - i2c diff --git a/boards/st/stm32u5a9j_dk/stm32u5a9j_dk.dts b/boards/st/stm32u5a9j_dk/stm32u5a9j_dk.dts index f8dbb7f8d1817de..5696253f93cfa9f 100644 --- a/boards/st/stm32u5a9j_dk/stm32u5a9j_dk.dts +++ b/boards/st/stm32u5a9j_dk/stm32u5a9j_dk.dts @@ -204,7 +204,7 @@ uart0: &usart3 { &adc1 { pinctrl-0 = <&adc1_in5_pa0 &adc1_in14_pc5>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; st,adc-prescaler = <1>; status = "okay"; @@ -231,7 +231,7 @@ uart0: &usart3 { &adc4 { pinctrl-0 = <&adc4_in5_pf14>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "ASYNC"; st,adc-prescaler = <1>; status = "okay"; diff --git a/boards/st/stm32wb5mm_dk/stm32wb5mm_dk.dts b/boards/st/stm32wb5mm_dk/stm32wb5mm_dk.dts index e11ec3f0f20bd8f..7395329ca23c408 100644 --- a/boards/st/stm32wb5mm_dk/stm32wb5mm_dk.dts +++ b/boards/st/stm32wb5mm_dk/stm32wb5mm_dk.dts @@ -111,7 +111,7 @@ &adc1 { pinctrl-0 = <&adc1_in3_pc2>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/st/stm32wb5mmg/stm32wb5mmg.dts b/boards/st/stm32wb5mmg/stm32wb5mmg.dts index d494b7024dc7c63..29f7de31302789d 100644 --- a/boards/st/stm32wb5mmg/stm32wb5mmg.dts +++ b/boards/st/stm32wb5mmg/stm32wb5mmg.dts @@ -69,7 +69,7 @@ &adc1 { pinctrl-0 = <&adc1_in3_pc2>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/tdk/robokit1/Kconfig.defconfig b/boards/tdk/robokit1/Kconfig.defconfig new file mode 100644 index 000000000000000..7dccfa805bf333b --- /dev/null +++ b/boards/tdk/robokit1/Kconfig.defconfig @@ -0,0 +1,18 @@ +# Copyright (c) 2024 Henrik Brix Andersen +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_ROBOKIT1 + +config ADC_ADS7052_INIT_PRIORITY + default 60 + depends on ADC_ADS7052 + +config SENSOR_INIT_PRIORITY + default 60 + depends on SENSOR + +config EEPROM_INIT_PRIORITY + default 60 + depends on EEPROM + +endif # BOARD_ROBOKIT1 diff --git a/boards/ti/cc1352p1_launchxl/cc1352p1_launchxl_defconfig b/boards/ti/cc1352p1_launchxl/cc1352p1_launchxl_defconfig index 42ca455ed33026e..4e65416ca53736e 100644 --- a/boards/ti/cc1352p1_launchxl/cc1352p1_launchxl_defconfig +++ b/boards/ti/cc1352p1_launchxl/cc1352p1_launchxl_defconfig @@ -16,7 +16,6 @@ CONFIG_CC13X2_CC26X2_BOOTLOADER_BACKDOOR_PIN=15 CONFIG_ARM_MPU=y CONFIG_HW_STACK_PROTECTION=y -CONFIG_PINCTRL=y CONFIG_GPIO=y CONFIG_SERIAL=y diff --git a/boards/ti/cc1352p7_launchpad/support/openocd.cfg b/boards/ti/cc1352p7_launchpad/support/openocd.cfg index 8be969b1819bde0..e66d88411047dde 100644 --- a/boards/ti/cc1352p7_launchpad/support/openocd.cfg +++ b/boards/ti/cc1352p7_launchpad/support/openocd.cfg @@ -1 +1,7 @@ +# Serial could be found using the following command: +# lsusb -d 0451:bef3 -v | grep -i iserial +if { [info exists _ZEPHYR_BOARD_SERIAL] } { + adapter serial $_ZEPHYR_BOARD_SERIAL +} + source [find board/ti_cc26x2x7_launchpad.cfg] diff --git a/boards/ti/cc1352r1_launchxl/cc1352r1_launchxl_defconfig b/boards/ti/cc1352r1_launchxl/cc1352r1_launchxl_defconfig index 872843de16d29b0..3977a366b521075 100644 --- a/boards/ti/cc1352r1_launchxl/cc1352r1_launchxl_defconfig +++ b/boards/ti/cc1352r1_launchxl/cc1352r1_launchxl_defconfig @@ -14,7 +14,6 @@ CONFIG_CC13X2_CC26X2_BOOTLOADER_BACKDOOR_PIN=15 CONFIG_ARM_MPU=y CONFIG_HW_STACK_PROTECTION=y -CONFIG_PINCTRL=y CONFIG_GPIO=y CONFIG_SERIAL=y diff --git a/boards/ti/cc1352r_sensortag/cc1352r_sensortag_defconfig b/boards/ti/cc1352r_sensortag/cc1352r_sensortag_defconfig index 2cddbd5af73e241..84b07413d0c8df5 100644 --- a/boards/ti/cc1352r_sensortag/cc1352r_sensortag_defconfig +++ b/boards/ti/cc1352r_sensortag/cc1352r_sensortag_defconfig @@ -13,7 +13,6 @@ CONFIG_CC13X2_CC26X2_BOOTLOADER_BACKDOOR_PIN=15 CONFIG_ARM_MPU=y CONFIG_HW_STACK_PROTECTION=y -CONFIG_PINCTRL=y CONFIG_GPIO=y CONFIG_SERIAL=y diff --git a/boards/ti/cc26x2r1_launchxl/cc26x2r1_launchxl_defconfig b/boards/ti/cc26x2r1_launchxl/cc26x2r1_launchxl_defconfig index d10e7a152e52d2a..f4aa8c3c5415957 100644 --- a/boards/ti/cc26x2r1_launchxl/cc26x2r1_launchxl_defconfig +++ b/boards/ti/cc26x2r1_launchxl/cc26x2r1_launchxl_defconfig @@ -14,7 +14,6 @@ CONFIG_CC13X2_CC26X2_BOOTLOADER_BACKDOOR_PIN=13 CONFIG_ARM_MPU=y CONFIG_HW_STACK_PROTECTION=y -CONFIG_PINCTRL=y CONFIG_GPIO=y CONFIG_SERIAL=y diff --git a/boards/toradex/verdin_imx8mm/Kconfig.defconfig b/boards/toradex/verdin_imx8mm/Kconfig.defconfig new file mode 100644 index 000000000000000..331e26b4b0b9dd8 --- /dev/null +++ b/boards/toradex/verdin_imx8mm/Kconfig.defconfig @@ -0,0 +1,15 @@ +# VERDIN_IMX8MM board defconfig +# +# Copyright (c) 2024, Toradex +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_VERDIN_IMX8MM + +if !XIP +config FLASH_SIZE + default 0 +config FLASH_BASE_ADDRESS + default 0 +endif + +endif # BOARD_VERDIN_IMX8MM diff --git a/boards/toradex/verdin_imx8mm/Kconfig.verdin_imx8mm b/boards/toradex/verdin_imx8mm/Kconfig.verdin_imx8mm new file mode 100644 index 000000000000000..52de27de01d5ba3 --- /dev/null +++ b/boards/toradex/verdin_imx8mm/Kconfig.verdin_imx8mm @@ -0,0 +1,6 @@ +# Copyright (c) 2024 Toradex +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_VERDIN_IMX8MM + select SOC_PART_NUMBER_MIMX8MM6DVTLZ + select SOC_MIMX8MM6_M4 if BOARD_VERDIN_IMX8MM_MIMX8MM6_M4 diff --git a/boards/toradex/verdin_imx8mm/board.cmake b/boards/toradex/verdin_imx8mm/board.cmake new file mode 100644 index 000000000000000..ae521ff4962c997 --- /dev/null +++ b/boards/toradex/verdin_imx8mm/board.cmake @@ -0,0 +1,11 @@ +# +# Copyright (c) 2024, Toradex +# +# SPDX-License-Identifier: Apache-2.0 +# + +board_set_debugger_ifnset(jlink) +board_set_flasher_ifnset(jlink) + +board_runner_args(jlink "--device=MIMX8MD6_M4") +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/toradex/verdin_imx8mm/board.yml b/boards/toradex/verdin_imx8mm/board.yml new file mode 100644 index 000000000000000..0426a516da06476 --- /dev/null +++ b/boards/toradex/verdin_imx8mm/board.yml @@ -0,0 +1,6 @@ +board: + name: verdin_imx8mm + full_name: Verdin iMX8M Mini + vendor: toradex + socs: + - name: mimx8mm6 diff --git a/boards/toradex/verdin_imx8mm/doc/img/verdin_imx8mm_m4.webp b/boards/toradex/verdin_imx8mm/doc/img/verdin_imx8mm_m4.webp new file mode 100644 index 000000000000000..87a26a21b114169 Binary files /dev/null and b/boards/toradex/verdin_imx8mm/doc/img/verdin_imx8mm_m4.webp differ diff --git a/boards/toradex/verdin_imx8mm/doc/index.rst b/boards/toradex/verdin_imx8mm/doc/index.rst new file mode 100644 index 000000000000000..112596322bcaf48 --- /dev/null +++ b/boards/toradex/verdin_imx8mm/doc/index.rst @@ -0,0 +1,261 @@ +.. zephyr:board:: verdin_imx8mm + +Overview +******** + +The Verdin iMX8M Mini is a System on Module based on the NXP® i.MX 8M Mini family of +embedded System on Chips (SoCs). The i.MX 8M Mini family consists of the i.MX 8M Mini Quad, +i.MX 8M Mini QuadLite, i.MX 8M Mini Dual, i.MX 8M Mini DualLite, i.MX 8M Mini Solo, and i.MX +8M Mini SoloLite. The top-tier i.MX 8M Mini Quad features four Cortex-A53 cores as the main +processor cluster. The cores provide complete 64-bit Armv8-A support while maintaining seamless +backwards compatibility with 32-bit Armv7-A software. The main cores run at up to 1.8 GHz for +commercial graded products and 1.6 GHz for industrial temperature range products. + +In addition to the main CPU complex, the i.MX 8M Mini features a Cortex-M4F processor which +peaks up to 400 MHz. This processor is independent of the main complex and features its own +dedicated interfaces while still being able to access the regular interfaces. This heterogeneous +multicore system allows for the running of additional real-time operating systems on the M4 cores +for time- and security-critical tasks. + +- Board features: + + - RAM: 1GB - 2GB (LPDDR4) + - Storage: + + - 4GB - 17GB eMMC + - 2KB I²C EEPROM + - Wireless: + + - WiFi Dual-band 802.11 ac/a/b/g/n 2.4/5 GHz + - Bluetooth 5/BLE + - USB: + + - 1x USB2.0 Host + - 1x USB2.0 OTG + - Ethernet Gigabit + - Interfaces: + + - MIPI DSI 1x4 Data Lanes + - PCIe Gen 2 + - MIPI CSI-2 + - SPI + - QSPI + - UART + - I²C + - I²S + - SD/SDIO/MMC + - GPIOs + - CAN + - ADC + - S/PDIF + - Debug + + - JTAG 10-pin connector + +More information about the board can be found at the +`Toradex website`_. + +Supported Features +================== + +The Zephyr ``verdin_imx8mm/mimx8mm6/m4`` board target supports the following hardware +features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| SYSTICK | on-chip | systick | ++-----------+------------+-------------------------------------+ +| CLOCK | on-chip | clock_control | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial port-polling; | +| | | serial port-interrupt | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | GPIO output | +| | | GPIO input | ++-----------+------------+-------------------------------------+ + +The default configuration can be found in the defconfig file: +:zephyr_file:`boards/toradex/verdin_imx8mm/verdin_imx8mm_mimx8mm6_m4_defconfig`. + +It is recommended to disable peripherals used by the M4 core on the Linux host. + +Other hardware features are not currently supported by the port. + +Connections and IOs +=================== + +UART: + +Zephyr is configured to use the UART4 by default, which is connected to the FTDI +USB converter on most Toradex carrier boards. + +This is also the UART connected to WiFi/BT chip in modules that have the WiFi/BT +chip. Therefore, if UART4 is used, WiFI/BT will not work properly. + +If the WiFi/BT is needed, then another UART should be used for Zephyr (UART2 for +example). You can change the UART by changing the ``zephyr,console`` and +``zephyr,shell-uart`` in the :zephyr_file:`boards/toradex/verdin_imx8mm/verdin_imx8mm_mimx8mm6_m4.dts` file. + ++---------------+-----------------+---------------------------+ +| Board Name | SoC Name | Usage | ++===============+=================+===========================+ +| UART_1 | UART2 | General purpose UART | ++---------------+-----------------+---------------------------+ +| UART_2 | UART3 | General purpose UART | ++---------------+-----------------+---------------------------+ +| UART_3 | UART1 | Cortex-A53 debug UART | ++---------------+-----------------+---------------------------+ +| UART_4 | UART4 | Cortex-M4 debug UART | ++---------------+-----------------+---------------------------+ + +GPIO: + +All the GPIO banks are enabled in the :zephyr_file:`dts/arm/nxp/nxp_imx8m_m4.dtsi`. + +LED: + +There is no LED in the module itself, this is dependent on the carrier board that +is being used with the module. The device tree is configured to use the GPIO3_IO1, +which can be connected to the LED of the Verdin Development Board or changed in the +:zephyr_file:`boards/toradex/verdin_imx8mm/verdin_imx8mm_mimx8mm6_m4.dts` if needed. + +System Clock +============ + +The M4 Core is configured to run at a 400 MHz clock speed. + +Programming and Debugging +************************* + +The i.MX8MM doesn't have QSPI flash for the M4 and it needs +to be started by the A53 core. The A53 core is responsible to load the M4 binary +application into the RAM, putting the M4 in reset, setting the M4 Program Counter and +Stack Pointer, and get the M4 out of reset. The A53 can perform these steps at the +bootloader level or after the Linux system has booted via RemoteProc. + +The M4 can use up to 3 different RAMs. These are the memory mapping for A53 and M4: + ++------------+-------------------------+------------------------+-----------------------+----------------------+ +| Region | Cortex-A53 | Cortex-M4 (System Bus) | Cortex-M4 (Code Bus) | Size | ++============+=========================+========================+=======================+======================+ +| OCRAM | 0x00900000-0x0093FFFF | 0x20200000-0x2023FFFF | 0x00900000-0x0093FFFF | 256KB | ++------------+-------------------------+------------------------+-----------------------+----------------------+ +| TCMU | 0x00800000-0x0081FFFF | 0x20000000-0x2001FFFF | | 128KB | ++------------+-------------------------+------------------------+-----------------------+----------------------+ +| TCML | 0x007E0000-0x007FFFFF | | 0x1FFE0000-0x1FFFFFFF | 128KB | ++------------+-------------------------+------------------------+-----------------------+----------------------+ +| OCRAM_S | 0x00180000-0x00187FFF | 0x20180000-0x20187FFF | 0x00180000-0x00187FFF | 32KB | ++------------+-------------------------+------------------------+-----------------------+----------------------+ + +For more information about memory mapping see the +`i.MX 8M Applications Processor Reference Manual`_ (section 2.1.2 and 2.1.3) + +At compilation time you have to choose which RAM will be used. This +configuration is done in the file :zephyr_file:`boards/toradex/verdin_imx8mm/verdin_imx8mm_mimx8mm6_m4.dts` +with "zephyr,flash" (when CONFIG_XIP=y) and "zephyr,sram" properties. +The available configurations are: + +.. code-block:: none + + "zephyr,flash" + - &tcml_code + - &ocram_code + - &ocram_s_code + + "zephyr,sram" + - &tcmu_sys + - &ocram_sys + - &ocram_s_sys + +Starting the Cortex-M4 via U-Boot +================================= + +Load and run Zephyr on M4 from A53 using u-boot by copying the compiled +``zephyr.bin`` to the eMMC (can be the FAT or EXT4 partition). You can do it +by using a USB stick or through the ethernet with the scp command, for example. +Power it up and stop at the u-boot prompt. + +Load the M4 binary onto the desired memory and start its execution using: + +.. code-block:: console + + fatload mmc 0:1 ${loadaddr} zephyr.bin + cp.b ${loadaddr} 0x7e0000 + bootaux 0x7e0000 + +Or if the binary is on the ext4 partition: + +.. code-block:: console + + ext4load mmc 0:2 ${loadaddr} /path/to/zephyr.bin + cp.b ${loadaddr} 0x7e0000 + bootaux 0x7e0000 + +If you are using `TorizonCore`_ OS, then you should use partition 1: + +.. code-block:: console + + ext4load mmc 0:1 ${loadaddr} /path/to/zephyr.bin + cp.b ${loadaddr} 0x7e0000 + bootaux 0x7e0000 + +Starting the Cortex-M4 via RemoteProc +===================================== + +Copy the ``zepyhr.elf`` to ``/lib/firmware`` on the target. + +.. note:: + In order to use remoteproc you have to add ``imx8mm-verdin_hmp_overlay.dtbo`` at + the end of the line in the ``/boot/overlays.txt``, then reboot the target. If + you are using `TorizonCore`_, then this file is located at + ``/boot/ostree/torizon-/dtb/overlays.txt``. + +To load and start a firmware use these commands: + +.. code-block:: console + + verdin-imx8mm:~# echo zepyhr.elf > /sys/class/remoteproc/remoteproc0/firmware + verdin-imx8mm:~# echo start > /sys/class/remoteproc/remoteproc0/state + [ 94.714498] remoteproc remoteproc0: powering up imx-rproc + [ 94.720481] remoteproc remoteproc0: Booting fw image zephyr.elf, size 473172 + [ 94.727713] remoteproc remoteproc0: No resource table in elf + [ 94.733615] remoteproc remoteproc0: remote processor imx-rproc is now up + +The M4-Core is now started up and running. You can see the output from Zephyr +on UART4. + +Debugging +========= + +MIMX8MM EVK board can be debugged by connecting an external JLink +JTAG debugger to the J902 debug connector and to the PC. Then +the application can be debugged using the usual way. + +Here is an example for the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: verdin_imx8mm/mimx8mm6/m4 + :goals: debug + +Open a serial terminal, step through the application in your debugger, and you +should see the following message in the terminal: + +.. code-block:: console + + *** Booting Zephyr OS build zephyr-v3.4.0-1251-g43c549305bdb *** + Hello World! verdin_imx8mm_m4 + +.. _Toradex website: + https://developer.toradex.com/hardware/verdin-som-family/modules/verdin-imx8m-mini/ + +.. _i.MX 8M Applications Processor Reference Manual: + https://www.nxp.com/webapp/Download?colCode=IMX8MMRM + +.. _TorizonCore: + https://developer.toradex.com/torizon/ diff --git a/boards/toradex/verdin_imx8mm/verdin_imx8mm-pinctrl.dtsi b/boards/toradex/verdin_imx8mm/verdin_imx8mm-pinctrl.dtsi new file mode 100644 index 000000000000000..ed92bc9f03897ef --- /dev/null +++ b/boards/toradex/verdin_imx8mm/verdin_imx8mm-pinctrl.dtsi @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2023 Toradex + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&pinctrl { + uart4_default: uart4_default { + group0 { + pinmux = <&iomuxc_uart4_rxd_uart_rx_uart4_rx>, + <&iomuxc_uart4_txd_uart_tx_uart4_tx>; + slew-rate = "fast"; + drive-strength = "x6"; + }; + }; + + uart3_default: uart3_default { + group0 { + pinmux = <&iomuxc_uart3_rxd_uart_rx_uart3_rx>, + <&iomuxc_uart3_txd_uart_tx_uart3_tx>; + slew-rate = "fast"; + drive-strength = "x6"; + }; + }; + + uart2_default: uart2_default { + group0 { + pinmux = <&iomuxc_sai3_rxd_uart_cts_b_uart2_rts_b>, + <&iomuxc_sai3_rxd_uart_rts_b_uart2_rts_b>, + <&iomuxc_sai3_txfs_uart_tx_uart2_rx>, + <&iomuxc_sai3_txc_uart_rx_uart2_tx>; + slew-rate = "fast"; + drive-strength = "x6"; + }; + }; + + uart1_default: uart1_default { + group0 { + pinmux = <&iomuxc_sai2_rxfs_uart_rx_uart1_tx>, + <&iomuxc_sai2_rxc_uart_rx_uart1_rx>, + <&iomuxc_sai2_rxd0_uart_rts_b_uart1_rts_b>, + <&iomuxc_sai2_txfs_uart_cts_b_uart1_cts_b>; + slew-rate = "fast"; + drive-strength = "x6"; + }; + }; +}; diff --git a/boards/toradex/verdin_imx8mm/verdin_imx8mm_mimx8mm6_m4.dts b/boards/toradex/verdin_imx8mm/verdin_imx8mm_mimx8mm6_m4.dts new file mode 100644 index 000000000000000..e1b0f61a1ccf0ac --- /dev/null +++ b/boards/toradex/verdin_imx8mm/verdin_imx8mm_mimx8mm6_m4.dts @@ -0,0 +1,74 @@ +/* + * Copyright (c) 2024, Toradex + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "verdin_imx8mm-pinctrl.dtsi" + +/ { + model = "Toradex Verdin iMX8M Mini"; + compatible = "nxp,verdin_imx8mm"; + + aliases { + uart-1 = &uart1; + uart-2 = &uart2; + uart-3 = &uart3; + uart-4 = &uart4; + led0 = &led_0; + }; + + chosen { + zephyr,flash = &tcml_code; + zephyr,sram = &tcmu_sys; + zephyr,console = &uart4; + zephyr,shell-uart = &uart4; + }; + + leds { + compatible = "gpio-leds"; + + led_0: led_0 { + gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&gpio3 { + status = "okay"; +}; + +&mailbox0 { + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_default>; + current-speed = <115200>; + status = "disabled"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_default>; + current-speed = <115200>; + status = "disabled"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_default>; + current-speed = <115200>; + status = "disabled"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_default>; + current-speed = <115200>; + status = "okay"; +}; diff --git a/boards/toradex/verdin_imx8mm/verdin_imx8mm_mimx8mm6_m4.yaml b/boards/toradex/verdin_imx8mm/verdin_imx8mm_mimx8mm6_m4.yaml new file mode 100644 index 000000000000000..dc6f24f56d0746c --- /dev/null +++ b/boards/toradex/verdin_imx8mm/verdin_imx8mm_mimx8mm6_m4.yaml @@ -0,0 +1,21 @@ +# +# Copyright (c) 2024 Toradex +# +# SPDX-License-Identifier: Apache-2.0 +# + +identifier: verdin_imx8mm/mimx8mm6/m4 +name: Toradex Verdin iMX8M Mini +type: mcu +arch: arm +ram: 128 +flash: 128 +toolchain: + - zephyr + - gnuarmemb + - xtools +testing: + ignore_tags: + - net + - bluetooth +vendor: toradex diff --git a/boards/toradex/verdin_imx8mm/verdin_imx8mm_mimx8mm6_m4_defconfig b/boards/toradex/verdin_imx8mm/verdin_imx8mm_mimx8mm6_m4_defconfig new file mode 100644 index 000000000000000..0978045d488d0e3 --- /dev/null +++ b/boards/toradex/verdin_imx8mm/verdin_imx8mm_mimx8mm6_m4_defconfig @@ -0,0 +1,12 @@ +# +# Copyright (c) 2024 Toradex +# +# SPDX-License-Identifier: Apache-2.0 +# + +CONFIG_CLOCK_CONTROL=y +CONFIG_UART_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_CONSOLE=y +CONFIG_XIP=y +CONFIG_GPIO=y diff --git a/boards/u-blox/ubx_bmd300eval/Kconfig.defconfig b/boards/u-blox/ubx_bmd300eval/Kconfig.defconfig index 8ba8ca2d640fa20..f5d3c0f7f67db7c 100644 --- a/boards/u-blox/ubx_bmd300eval/Kconfig.defconfig +++ b/boards/u-blox/ubx_bmd300eval/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_UBX_BMD300EVAL -config BT_CTLR - default BT - endif # BOARD_UBX_BMD300EVAL diff --git a/boards/u-blox/ubx_bmd330eval/Kconfig b/boards/u-blox/ubx_bmd330eval/Kconfig index fbc749c300a6349..a1d19f19bc8a087 100644 --- a/boards/u-blox/ubx_bmd330eval/Kconfig +++ b/boards/u-blox/ubx_bmd330eval/Kconfig @@ -2,8 +2,3 @@ # Copyright (c) 2021 u-blox AG # SPDX-License-Identifier: Apache-2.0 - -# BT_CTLR depends on BT. When BT is enabled we should default to also -# enabling the controller. -config BT_CTLR - default y if BT diff --git a/boards/u-blox/ubx_bmd340eval/Kconfig.defconfig b/boards/u-blox/ubx_bmd340eval/Kconfig.defconfig index 37b10951309cfbb..9db86863bbabc82 100644 --- a/boards/u-blox/ubx_bmd340eval/Kconfig.defconfig +++ b/boards/u-blox/ubx_bmd340eval/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_UBX_BMD340EVAL -config BT_CTLR - default BT - endif # BOARD_UBX_BMD340EVAL diff --git a/boards/u-blox/ubx_bmd345eval/Kconfig.defconfig b/boards/u-blox/ubx_bmd345eval/Kconfig.defconfig index 21e8ac9b5caf498..c972f6639f26d8c 100644 --- a/boards/u-blox/ubx_bmd345eval/Kconfig.defconfig +++ b/boards/u-blox/ubx_bmd345eval/Kconfig.defconfig @@ -6,7 +6,4 @@ if BOARD_UBX_BMD345EVAL_NRF52840 -config BT_CTLR - default BT - endif # BOARD_UBX_BMD345EVAL_NRF52840 diff --git a/boards/u-blox/ubx_bmd360eval/Kconfig b/boards/u-blox/ubx_bmd360eval/Kconfig index 60b85dcb6ddd9f0..c0148fc1c4d80ba 100644 --- a/boards/u-blox/ubx_bmd360eval/Kconfig +++ b/boards/u-blox/ubx_bmd360eval/Kconfig @@ -2,8 +2,3 @@ # Copyright (c) 2021 u-blox AG # SPDX-License-Identifier: Apache-2.0 - -# BT_CTLR depends on BT. When BT is enabled we should default to also -# enabling the controller. -config BT_CTLR - default y if BT diff --git a/boards/u-blox/ubx_bmd380eval/Kconfig.defconfig b/boards/u-blox/ubx_bmd380eval/Kconfig.defconfig index 58afb83796fcd33..47907f3d4c99eb9 100644 --- a/boards/u-blox/ubx_bmd380eval/Kconfig.defconfig +++ b/boards/u-blox/ubx_bmd380eval/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_UBX_BMD380EVAL -config BT_CTLR - default BT - endif # BOARD_UBX_BMD380EVAL diff --git a/boards/u-blox/ubx_evkannab1/Kconfig.defconfig b/boards/u-blox/ubx_evkannab1/Kconfig.defconfig index e12e7d4ebaccd53..93aec0902b7e155 100644 --- a/boards/u-blox/ubx_evkannab1/Kconfig.defconfig +++ b/boards/u-blox/ubx_evkannab1/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_UBX_EVKANNAB1 -config BT_CTLR - default BT - endif # BOARD_UBX_EVKANNAB1 diff --git a/boards/u-blox/ubx_evkninab1/Kconfig.defconfig b/boards/u-blox/ubx_evkninab1/Kconfig.defconfig index 5f897eb6bb1b741..b657e5f34fb504c 100644 --- a/boards/u-blox/ubx_evkninab1/Kconfig.defconfig +++ b/boards/u-blox/ubx_evkninab1/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_UBX_EVKNINAB1 -config BT_CTLR - default BT - endif # BOARD_UBX_EVKNINAB1 diff --git a/boards/u-blox/ubx_evkninab3/Kconfig.defconfig b/boards/u-blox/ubx_evkninab3/Kconfig.defconfig index 2579b8354283849..f976dd594a8bb2a 100644 --- a/boards/u-blox/ubx_evkninab3/Kconfig.defconfig +++ b/boards/u-blox/ubx_evkninab3/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_UBX_EVKNINAB3 -config BT_CTLR - default BT - endif # BOARD_UBX_EVKNINAB3 diff --git a/boards/u-blox/ubx_evkninab4/Kconfig.defconfig b/boards/u-blox/ubx_evkninab4/Kconfig.defconfig index c9e958708bfbfc3..d710b03f8424ede 100644 --- a/boards/u-blox/ubx_evkninab4/Kconfig.defconfig +++ b/boards/u-blox/ubx_evkninab4/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_UBX_EVKNINAB4 -config BT_CTLR - default BT - endif # BOARD_UBX_EVKNINAB4 diff --git a/boards/up-bridge-the-gap/up_squared/up_squared_defconfig b/boards/up-bridge-the-gap/up_squared/up_squared_defconfig index 608e32cdef02b2c..cbc59ed83a7ebbe 100644 --- a/boards/up-bridge-the-gap/up_squared/up_squared_defconfig +++ b/boards/up-bridge-the-gap/up_squared/up_squared_defconfig @@ -9,7 +9,6 @@ CONFIG_SERIAL=y CONFIG_X2APIC=y CONFIG_SMP=y CONFIG_BUILD_OUTPUT_EFI=y -CONFIG_BUILD_NO_GAP_FILL=y CONFIG_APIC_TSC_DEADLINE_TIMER=n CONFIG_HPET_TIMER=y diff --git a/boards/up-bridge-the-gap/up_squared_pro_7000/up_squared_pro_7000_defconfig b/boards/up-bridge-the-gap/up_squared_pro_7000/up_squared_pro_7000_defconfig index fb9be2a4994a301..7fad00df636876f 100644 --- a/boards/up-bridge-the-gap/up_squared_pro_7000/up_squared_pro_7000_defconfig +++ b/boards/up-bridge-the-gap/up_squared_pro_7000/up_squared_pro_7000_defconfig @@ -9,4 +9,3 @@ CONFIG_UART_CONSOLE=y CONFIG_X2APIC=y CONFIG_SMP=y CONFIG_BUILD_OUTPUT_EFI=y -CONFIG_BUILD_NO_GAP_FILL=y diff --git a/boards/vcc-gnd/yd_esp32/yd_esp32_appcpu.dts b/boards/vcc-gnd/yd_esp32/yd_esp32_appcpu.dts index 15f7a6a25d84f6d..3514cbabbd3e15d 100644 --- a/boards/vcc-gnd/yd_esp32/yd_esp32_appcpu.dts +++ b/boards/vcc-gnd/yd_esp32/yd_esp32_appcpu.dts @@ -13,9 +13,11 @@ compatible = "espressif,esp32"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_appcpu_partition; }; }; diff --git a/boards/vcc-gnd/yd_esp32/yd_esp32_procpu.dts b/boards/vcc-gnd/yd_esp32/yd_esp32_procpu.dts index 489580a3e25ea1a..119e18f222ff5dc 100644 --- a/boards/vcc-gnd/yd_esp32/yd_esp32_procpu.dts +++ b/boards/vcc-gnd/yd_esp32/yd_esp32_procpu.dts @@ -31,7 +31,7 @@ }; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/vcc-gnd/yd_esp32/yd_esp32_procpu.yaml b/boards/vcc-gnd/yd_esp32/yd_esp32_procpu.yaml index 7e8e17cf71f0817..99ac539076883fd 100644 --- a/boards/vcc-gnd/yd_esp32/yd_esp32_procpu.yaml +++ b/boards/vcc-gnd/yd_esp32/yd_esp32_procpu.yaml @@ -17,8 +17,4 @@ supported: - spi - counter - entropy -testing: - ignore_tags: - - net - - bluetooth vendor: vcc-gnd diff --git a/boards/vngiotlab/nrf51_vbluno51/Kconfig.defconfig b/boards/vngiotlab/nrf51_vbluno51/Kconfig.defconfig index 4957faeb05c018a..ac83af0b12ab216 100644 --- a/boards/vngiotlab/nrf51_vbluno51/Kconfig.defconfig +++ b/boards/vngiotlab/nrf51_vbluno51/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_NRF51_VBLUNO51 -config BT_CTLR - default BT - endif # BOARD_NRF51_VBLUNO51 diff --git a/boards/vngiotlab/nrf52_vbluno52/Kconfig.defconfig b/boards/vngiotlab/nrf52_vbluno52/Kconfig.defconfig index 700df41dfc6c929..026b4b301a7af35 100644 --- a/boards/vngiotlab/nrf52_vbluno52/Kconfig.defconfig +++ b/boards/vngiotlab/nrf52_vbluno52/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_NRF52_VBLUNO52 -config BT_CTLR - default BT - endif # BOARD_NRF52_VBLUNO52 diff --git a/boards/waveshare/esp32s3_touch_lcd_1_28/Kconfig.defconfig b/boards/waveshare/esp32s3_touch_lcd_1_28/Kconfig.defconfig index 75adffcd0b81b63..f7e7a7467989786 100644 --- a/boards/waveshare/esp32s3_touch_lcd_1_28/Kconfig.defconfig +++ b/boards/waveshare/esp32s3_touch_lcd_1_28/Kconfig.defconfig @@ -3,9 +3,6 @@ if BOARD_ESP32S3_TOUCH_LCD_1_28_ESP32S3_PROCPU -config ENTROPY_GENERATOR - default y - config KERNEL_MEM_POOL default y diff --git a/boards/waveshare/esp32s3_touch_lcd_1_28/doc/img/esp32s3_touch_lcd_1_28.webp b/boards/waveshare/esp32s3_touch_lcd_1_28/doc/img/esp32s3_touch_lcd_1_28.webp new file mode 100644 index 000000000000000..99586a6c5b03535 Binary files /dev/null and b/boards/waveshare/esp32s3_touch_lcd_1_28/doc/img/esp32s3_touch_lcd_1_28.webp differ diff --git a/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_appcpu.dts b/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_appcpu.dts index 949f7a79a324416..53d70cdc115dc0d 100644 --- a/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_appcpu.dts +++ b/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_appcpu.dts @@ -12,7 +12,7 @@ compatible = "waveshare,esp32-s3-touch-lcd-1.28"; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,ipc_shm = &shm0; zephyr,ipc = &ipm0; zephyr,flash = &flash0; diff --git a/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_procpu.dts b/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_procpu.dts index 18e8e900813acb9..55bd4f1e929641d 100644 --- a/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_procpu.dts +++ b/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_procpu.dts @@ -25,7 +25,7 @@ }; chosen { - zephyr,sram = &sram0; + zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,flash = &flash0; diff --git a/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_procpu.yaml b/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_procpu.yaml index 5c81ff792a32072..a2ae32d60f65971 100644 --- a/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_procpu.yaml +++ b/boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_procpu.yaml @@ -15,8 +15,4 @@ supported: - pinmux - nvs - display -testing: - ignore_tags: - - net - - bluetooth vendor: waveshare diff --git a/boards/waveshare/nrf51_ble400/Kconfig.defconfig b/boards/waveshare/nrf51_ble400/Kconfig.defconfig index 65d41b852d32a78..727fc35fece28b4 100644 --- a/boards/waveshare/nrf51_ble400/Kconfig.defconfig +++ b/boards/waveshare/nrf51_ble400/Kconfig.defconfig @@ -5,7 +5,4 @@ if BOARD_NRF51_BLE400 -config BT_CTLR - default BT - endif # BOARD_NRF51_BLE400 diff --git a/boards/waveshare/rp2040_zero/Kconfig b/boards/waveshare/rp2040_zero/Kconfig new file mode 100644 index 000000000000000..1ccd1ffd571d88b --- /dev/null +++ b/boards/waveshare/rp2040_zero/Kconfig @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Iacopo Moles +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_RP2040_ZERO + select RP2_FLASH_W25Q080 diff --git a/boards/waveshare/rp2040_zero/Kconfig.defconfig b/boards/waveshare/rp2040_zero/Kconfig.defconfig new file mode 100644 index 000000000000000..b03a6c6d9d5e6ab --- /dev/null +++ b/boards/waveshare/rp2040_zero/Kconfig.defconfig @@ -0,0 +1,13 @@ +# Copyright (c) 2024 Iacopo Moles +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_RP2040_ZERO + +if I2C_DW + +config I2C_DW_CLOCK_SPEED + default 125 + +endif # I2C_DW + +endif # BOARD_RP2040_ZERO diff --git a/boards/waveshare/rp2040_zero/Kconfig.rp2040_zero b/boards/waveshare/rp2040_zero/Kconfig.rp2040_zero new file mode 100644 index 000000000000000..47a5fbbb7eb5b85 --- /dev/null +++ b/boards/waveshare/rp2040_zero/Kconfig.rp2040_zero @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Iacopo Moles +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_RP2040_ZERO + select SOC_RP2040 diff --git a/boards/waveshare/rp2040_zero/board.cmake b/boards/waveshare/rp2040_zero/board.cmake new file mode 100644 index 000000000000000..4103e36e63569de --- /dev/null +++ b/boards/waveshare/rp2040_zero/board.cmake @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(uf2 "--board-id=RPI-RP2") + +include(${ZEPHYR_BASE}/boards/common/uf2.board.cmake) diff --git a/boards/waveshare/rp2040_zero/board.yml b/boards/waveshare/rp2040_zero/board.yml new file mode 100644 index 000000000000000..4af02703a2e1737 --- /dev/null +++ b/boards/waveshare/rp2040_zero/board.yml @@ -0,0 +1,6 @@ +board: + name: rp2040_zero + full_name: RP2040-Zero + vendor: waveshare + socs: + - name: rp2040 diff --git a/boards/waveshare/rp2040_zero/doc/img/rp2040_zero.png b/boards/waveshare/rp2040_zero/doc/img/rp2040_zero.png new file mode 100644 index 000000000000000..d192b1a7d209604 Binary files /dev/null and b/boards/waveshare/rp2040_zero/doc/img/rp2040_zero.png differ diff --git a/boards/waveshare/rp2040_zero/doc/index.rst b/boards/waveshare/rp2040_zero/doc/index.rst new file mode 100644 index 000000000000000..27e527e32c34b7c --- /dev/null +++ b/boards/waveshare/rp2040_zero/doc/index.rst @@ -0,0 +1,132 @@ +.. zephyr:board:: rp2040_zero + +Overview +******** + +RP2040-Zero, A Low-Cost, High-Performance Pico-Like MCU Board Based On Raspberry Pi Microcontroller RP2040. + +Hardware +******** +- RP2040 microcontroller chip designed by Raspberry Pi in the United Kingdom. +- Dual-core Arm Cortex M0+ processor, flexible clock running up to 133 MHz. +- 264KB of SRAM, and 2MB of on-board Flash memory. +- USB-C connector, keeps it up to date, easier to use. +- The castellated module allows soldering direct to carrier boards. +- USB 1.1 with device and host support. +- Low-power sleep and dormant modes. +- Drag-and-drop programming using mass storage over USB. +- 29 × multi-function GPIO pins (20× via edge pinout, others via solder points). +- 2 × SPI, 2 × I2C, 2 × UART, 4 × 12-bit ADC, 16 × controllable PWM channels. +- Accurate clock and timer on-chip. +- Temperature sensor. +- Accelerated floating-point libraries on-chip. +- 8 × Programmable I/O (PIO) state machines for custom peripheral support. + +Supported Features +================== + +The ``rp2040_zero`` board target supports the following hardware features: + +.. list-table:: + :header-rows: 1 + + * - Peripheral + - Kconfig option + - Devicetree compatible + * - NVIC + - N/A + - :dtcompatible:`arm,v6m-nvic` + * - UART + - :kconfig:option:`CONFIG_SERIAL` + - :dtcompatible:`raspberrypi,pico-uart` + * - GPIO + - :kconfig:option:`CONFIG_GPIO` + - :dtcompatible:`raspberrypi,pico-gpio` + * - ADC + - :kconfig:option:`CONFIG_ADC` + - :dtcompatible:`raspberrypi,pico-adc` + * - I2C + - :kconfig:option:`CONFIG_I2C` + - :dtcompatible:`snps,designware-i2c` + * - SPI + - :kconfig:option:`CONFIG_SPI` + - :dtcompatible:`raspberrypi,pico-spi` + * - USB Device + - :kconfig:option:`CONFIG_USB_DEVICE_STACK` + - :dtcompatible:`raspberrypi,pico-usbd` + * - HWINFO + - :kconfig:option:`CONFIG_HWINFO` + - N/A + * - Watchdog Timer (WDT) + - :kconfig:option:`CONFIG_WATCHDOG` + - :dtcompatible:`raspberrypi,pico-watchdog` + * - PWM + - :kconfig:option:`CONFIG_PWM` + - :dtcompatible:`raspberrypi,pico-pwm` + * - Flash + - :kconfig:option:`CONFIG_FLASH` + - :dtcompatible:`raspberrypi,pico-flash` + * - Clock controller + - :kconfig:option:`CONFIG_CLOCK_CONTROL` + - :dtcompatible:`raspberrypi,pico-clock-controller` + * - UART (PIO) + - :kconfig:option:`CONFIG_SERIAL` + - :dtcompatible:`raspberrypi,pico-uart-pio` + * - SPI (PIO) + - :kconfig:option:`CONFIG_SPI` + - :dtcompatible:`raspberrypi,pico-spi-pio` + +Pin Mapping +=========== + +The peripherals of the RP2040 SoC can be routed to various pins on the board. The configuration of these routes can be modified through DTS. Please refer to the datasheet to see the possible routings for each peripheral. + +Default Zephyr Peripheral Mapping: +---------------------------------- + +.. rst-class:: rst-columns + +- UART0_TX : P0 +- UART0_RX : P1 +- I2C0_SDA : P4 +- I2C0_SCL : P5 +- I2C1_SDA : P6 +- I2C1_SCL : P7 +- ADC_CH0 : P26 +- ADC_CH1 : P27 +- ADC_CH2 : P28 +- ADC_CH3 : P29 + +Programming and Debugging +************************* + +Flashing +======== + +Using UF2 +--------- + +Here is an example of building the sample for driving the built-in RGB led. + +.. zephyr-app-commands:: + :zephyr-app: samples/drivers/led/led_strip + :board: rp2040_zero + :goals: build + :compact: + +You must flash the RP2040-Zero with an UF2 file. One option is to use West (Zephyr’s meta-tool). To enter the UF2 flashing mode just keep the ``BOOT`` button pressed while you connect the USB port, it will appear on the host as a mass storage device. In alternative with the board already connected via USB you can keep the ``RESET`` button pressed, press and release ``BOOT``, release ``RESET``. At this point you can flash the image file by running: + +.. code-block:: bash + + west flash + +In alternative you can locate the generated file at ``build/zephyr/zephyr.uf2 file`` and simply drag-and-drop to the device after entreing the UF2 flashing mode. + +References +********** + +- `Official Documentation`_ +- `WS2812 datasheet`_ + +.. _Official Documentation: https://www.waveshare.com/wiki/RP2040-Zero +.. _WS2812 datasheet: https://cdn-shop.adafruit.com/datasheets/WS2812.pdf diff --git a/boards/waveshare/rp2040_zero/rp2040_zero-pinctrl.dtsi b/boards/waveshare/rp2040_zero/rp2040_zero-pinctrl.dtsi new file mode 100644 index 000000000000000..80b18d450141a09 --- /dev/null +++ b/boards/waveshare/rp2040_zero/rp2040_zero-pinctrl.dtsi @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2024 Iacopo Moles + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +&pinctrl { + uart0_default: uart0_default { + status = "okay"; + group1 { + pinmux = ; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = ; + input-enable; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + i2c1_default: i2c1_default { + group1 { + pinmux = ; + input-enable; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + spi0_default: spi0_default { + group1 { + pinmux = ; + }; + group2 { + pinmux = ; + input-enable; + }; + group3 { + pinmux = ; + }; + }; + + adc_default: adc_default { + group1 { + pinmux = , , , ; + input-enable; + }; + }; + + ws2812_pio0_default: ws2812_pio0_default { + ws2812 { + pinmux = ; + }; + }; +}; diff --git a/boards/waveshare/rp2040_zero/rp2040_zero.dts b/boards/waveshare/rp2040_zero/rp2040_zero.dts new file mode 100644 index 000000000000000..88c41f55d2e87b2 --- /dev/null +++ b/boards/waveshare/rp2040_zero/rp2040_zero.dts @@ -0,0 +1,147 @@ +/* + * Copyright (c) 2024 Iacopo Moles + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "rp2040_zero-pinctrl.dtsi" +#include +#include +/ { + chosen { + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,flash-controller = &ssi; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,code-partition = &code_partition; + }; + + aliases { + rtc = &rtc; + watchdog0 = &wdt0; + led-strip = &ws2812; + }; +}; + +&flash0 { + reg = <0x10000000 DT_SIZE_M(16)>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* Reserved memory for the second stage bootloader */ + second_stage_bootloader: partition@0 { + label = "second_stage_bootloader"; + reg = <0x00000000 0x100>; + read-only; + }; + + /* + * Usable flash. Starts at 0x100, after the bootloader. The partition + * size is 16MB minus the 0x100 bytes taken by the bootloader. + */ + code_partition: partition@100 { + label = "code-partition"; + reg = <0x100 (DT_SIZE_M(16) - 0x100)>; + read-only; + }; + }; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +&i2c0 { + status = "okay"; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; + clock-frequency = ; +}; + +&i2c1 { + status = "okay"; + pinctrl-0 = <&i2c1_default>; + pinctrl-names = "default"; + clock-frequency = ; +}; + +&spi0 { + clock-frequency = ; + status = "okay"; + pinctrl-0 = <&spi0_default>; + pinctrl-names = "default"; +}; + +&timer { + status = "okay"; +}; + +&wdt0 { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&rtc { + clocks = <&clocks RPI_PICO_CLKID_CLK_RTC>; + status = "okay"; +}; + +&adc { + status = "okay"; + pinctrl-0 = <&adc_default>; + pinctrl-names = "default"; +}; + +&pio0 { + status = "okay"; + + pio-ws2812 { + compatible = "worldsemi,ws2812-rpi_pico-pio"; + status = "okay"; + pinctrl-0 = <&ws2812_pio0_default>; + pinctrl-names = "default"; + bit-waveform = <3>, <3>, <4>; + + ws2812: ws2812 { + status = "okay"; + gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>; + chain-length = <1>; + color-mapping = ; + reset-delay = <280>; + frequency = <800000>; + }; + }; +}; + +&pio1 { + status = "okay"; +}; + +zephyr_udc0: &usbd { + status = "okay"; +}; + +&vreg { + regulator-always-on; + regulator-allowed-modes = ; +}; + +pico_spi: &spi0 {}; +pico_i2c0: &i2c0 {}; +pico_i2c1: &i2c1 {}; +pico_serial: &uart0 {}; diff --git a/boards/waveshare/rp2040_zero/rp2040_zero.yaml b/boards/waveshare/rp2040_zero/rp2040_zero.yaml new file mode 100644 index 000000000000000..b93e332f7d815f8 --- /dev/null +++ b/boards/waveshare/rp2040_zero/rp2040_zero.yaml @@ -0,0 +1,24 @@ +identifier: rp2040_zero +name: Waveshare RP2040-Zero +type: mcu +arch: arm +flash: 16384 +ram: 264 +toolchain: + - zephyr + - gnuarmemb + - xtools +supported: + - uart + - gpio + - adc + - i2c + - spi + - hwinfo + - watchdog + - pwm + - flash + - dma + - counter + - clock + - usbd diff --git a/boards/waveshare/rp2040_zero/rp2040_zero_defconfig b/boards/waveshare/rp2040_zero/rp2040_zero_defconfig new file mode 100644 index 000000000000000..3be05ed98623570 --- /dev/null +++ b/boards/waveshare/rp2040_zero/rp2040_zero_defconfig @@ -0,0 +1,13 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=125000000 +CONFIG_SERIAL=y +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_GPIO=y +CONFIG_USE_DT_CODE_PARTITION=y +CONFIG_BUILD_OUTPUT_UF2=y +CONFIG_BUILD_OUTPUT_HEX=y +CONFIG_UART_INTERRUPT_DRIVEN=y +CONFIG_RESET=y +CONFIG_CLOCK_CONTROL=y diff --git a/boards/wch/ch32v003evt/Kconfig.ch32v003evt b/boards/wch/ch32v003evt/Kconfig.ch32v003evt new file mode 100644 index 000000000000000..37a9c2444428b23 --- /dev/null +++ b/boards/wch/ch32v003evt/Kconfig.ch32v003evt @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Michael Hope +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_CH32V003EVT + select SOC_CH32V003 diff --git a/boards/wch/ch32v003evt/board.cmake b/boards/wch/ch32v003evt/board.cmake new file mode 100644 index 000000000000000..41ee69473bf2e68 --- /dev/null +++ b/boards/wch/ch32v003evt/board.cmake @@ -0,0 +1,8 @@ +# Copyright (c) 2024 Michael Hope +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(minichlink) +include(${ZEPHYR_BASE}/boards/common/minichlink.board.cmake) + +board_runner_args(openocd "--use-elf" "--cmd-reset-halt" "halt") +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/wch/ch32v003evt/board.yml b/boards/wch/ch32v003evt/board.yml new file mode 100644 index 000000000000000..291955892dad8f6 --- /dev/null +++ b/boards/wch/ch32v003evt/board.yml @@ -0,0 +1,6 @@ +board: + name: ch32v003evt + full_name: WCH CH32V003EVT + vendor: wch + socs: + - name: ch32v003 diff --git a/boards/wch/ch32v003evt/ch32v003evt-pinctrl.dtsi b/boards/wch/ch32v003evt/ch32v003evt-pinctrl.dtsi new file mode 100644 index 000000000000000..7f33d888e755988 --- /dev/null +++ b/boards/wch/ch32v003evt/ch32v003evt-pinctrl.dtsi @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2024 Michael Hope + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&pinctrl { + usart1_default: usart1_default { + group1 { + pinmux = ; + output-high; + drive-push-pull; + slew-rate = "max-speed-10mhz"; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; +}; diff --git a/boards/wch/ch32v003evt/ch32v003evt.dts b/boards/wch/ch32v003evt/ch32v003evt.dts new file mode 100644 index 000000000000000..d702b6d43d065fa --- /dev/null +++ b/boards/wch/ch32v003evt/ch32v003evt.dts @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2024 Michael Hope + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "ch32v003evt-pinctrl.dtsi" + +/ { + model = "ch32v003evt"; + compatible = "wch,ch32v003"; + + chosen { + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,console = &usart1; + zephyr,shell-uart = &usart1; + }; + + leds { + compatible = "gpio-leds"; + + /* + * Please connect the unconnected LED on the WCH CH32V003EVT + * board to a suitable GPIO pin (like PD4) and then change + * this status to "okay". + */ + status = "disabled"; + + red_led: led0 { + gpios = <&gpiod 4 GPIO_ACTIVE_HIGH>; + }; + }; + + aliases { + led0 = &red_led; + }; +}; + +&clk_hse { + clock-frequency = ; + status = "okay"; +}; + +&pll { + clocks = <&clk_hse>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; +}; + +&gpiod { + status = "okay"; +}; + +&usart1 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&usart1_default>; + pinctrl-names = "default"; +}; diff --git a/boards/wch/ch32v003evt/ch32v003evt.yaml b/boards/wch/ch32v003evt/ch32v003evt.yaml new file mode 100644 index 000000000000000..0968fd0b4e7e215 --- /dev/null +++ b/boards/wch/ch32v003evt/ch32v003evt.yaml @@ -0,0 +1,11 @@ +identifier: ch32v003evt +name: WCH CH32V003 Evaluation Board +type: mcu +arch: riscv +toolchain: + - cross-compile + - zephyr +ram: 2 +flash: 16 +supported: + - gpio diff --git a/boards/wch/ch32v003evt/ch32v003evt_defconfig b/boards/wch/ch32v003evt/ch32v003evt_defconfig new file mode 100644 index 000000000000000..ea223eef702f47b --- /dev/null +++ b/boards/wch/ch32v003evt/ch32v003evt_defconfig @@ -0,0 +1,8 @@ +# Copyright (c) 2024 Michael Hope +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_GPIO=y + +CONFIG_SERIAL=y +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y diff --git a/boards/wch/ch32v003evt/doc/img/ch32v003evt.webp b/boards/wch/ch32v003evt/doc/img/ch32v003evt.webp new file mode 100644 index 000000000000000..9c1e800c7adc8b2 Binary files /dev/null and b/boards/wch/ch32v003evt/doc/img/ch32v003evt.webp differ diff --git a/boards/wch/ch32v003evt/doc/index.rst b/boards/wch/ch32v003evt/doc/index.rst new file mode 100644 index 000000000000000..0c59c492de21ec3 --- /dev/null +++ b/boards/wch/ch32v003evt/doc/index.rst @@ -0,0 +1,107 @@ +.. zephyr:board:: ch32v003evt + +Overview +******** + +The `WCH`_ CH32V003EVT hardware provides support for QingKe 32-bit RISC-V2A +processor and the following devices: + +* CLOCK +* :abbr:`GPIO (General Purpose Input Output)` +* :abbr:`NVIC (Nested Vectored Interrupt Controller)` + +The board is equipped with two LEDs. The `WCH webpage on CH32V003`_ contains +the processor's information and the datasheet. + +Hardware +******** + +The QingKe 32-bit RISC-V2A processor of the WCH CH32V003EVT is clocked by an +external crystal and runs at 48 MHz. + +Supported Features +================== + +The ``ch32v003evt`` board target supports the following hardware features: + ++-----------+------------+----------------------+ +| Interface | Controller | Driver/Component | ++===========+============+======================+ +| CLOCK | on-chip | clock_control | ++-----------+------------+----------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+----------------------+ +| PWM | on-chip | pwm | ++-----------+------------+----------------------+ +| PINCTRL | on-chip | pinctrl | ++-----------+------------+----------------------+ +| TIMER | on-chip | timer | ++-----------+------------+----------------------+ +| UART | on-chip | uart | ++-----------+------------+----------------------+ + +Other hardware features have not been enabled yet for this board. + +Connections and IOs +=================== + +LED +--- + +* LED1 = Unconnected. Connect to an I/O pin (PD4). + +Programming and Debugging +************************* + +Applications for the ``ch32v003evt`` board target can be built and flashed +in the usual way (see :ref:`build_an_application` and :ref:`application_run` +for more details); however, an external programmer is required since the board +does not have any built-in debug support. + +The following pins of the external programmer must be connected to the +following pins on the PCB (see image): + +* VCC = VCC (do not power the board from the USB port at the same time) +* GND = GND +* SWIO = PD1 + +Flashing +======== + +You can use ``minichlink`` to flash the board. Once ``minichlink`` has been set +up, build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +Here is an example for the :zephyr:code-sample:`blinky` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: ch32v003evt + :goals: build flash + +Debugging +========= + +This board can be debugged via OpenOCD or ``minichlink``. + +Testing the LED on the WCH CH32V003EVT +************************************** + +There is 1 sample program that allow you to test that the LED on the board is +working properly with Zephyr: + +.. code-block:: console + + samples/basic/blinky + +You can build and flash the examples to make sure Zephyr is running +correctly on your board. The button and LED definitions can be found +in :zephyr_file:`boards/wch/ch32v003evt/ch32v003evt.dts`. + +References +********** + +.. target-notes:: + +.. _WCH: http://www.wch-ic.com +.. _WCH webpage on CH32V003: https://www.wch-ic.com/products/CH32V003.html diff --git a/boards/wch/ch32v003evt/support/openocd.cfg b/boards/wch/ch32v003evt/support/openocd.cfg new file mode 100644 index 000000000000000..0d24d16ca202579 --- /dev/null +++ b/boards/wch/ch32v003evt/support/openocd.cfg @@ -0,0 +1,15 @@ +#interface wlink +adapter driver wlink +wlink_set +set _CHIPNAME riscv +jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x00001 + +set _TARGETNAME $_CHIPNAME.cpu + +target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME +$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1 +set _FLASHNAME $_CHIPNAME.flash + +flash bank $_FLASHNAME wch_riscv 0x00000000 0 0 0 $_TARGETNAME.0 + +echo "Ready for Remote Connections" diff --git a/boards/wch/index.rst b/boards/wch/index.rst new file mode 100644 index 000000000000000..21745ccfccddeab --- /dev/null +++ b/boards/wch/index.rst @@ -0,0 +1,10 @@ +.. _boards-wch: + +WCH - Nanjing Qinheng Microelectronics Co. +########################################## + +.. toctree:: + :maxdepth: 1 + :glob: + + **/* diff --git a/boards/we/ophelia1ev/Kconfig.defconfig b/boards/we/ophelia1ev/Kconfig.defconfig index c148d6771835ce8..e380a1452e543ee 100644 --- a/boards/we/ophelia1ev/Kconfig.defconfig +++ b/boards/we/ophelia1ev/Kconfig.defconfig @@ -3,7 +3,4 @@ if BOARD_WE_OPHELIA1EV -config BT_CTLR - default BT - endif diff --git a/boards/we/orthosie1ev/we_orthosie1ev.yaml b/boards/we/orthosie1ev/we_orthosie1ev.yaml index 82e60eadc3247d2..0033d15834306c3 100644 --- a/boards/we/orthosie1ev/we_orthosie1ev.yaml +++ b/boards/we/orthosie1ev/we_orthosie1ev.yaml @@ -16,8 +16,4 @@ supported: - spi - counter - entropy -testing: - ignore_tags: - - net - - bluetooth vendor: we diff --git a/boards/we/proteus2ev/Kconfig.defconfig b/boards/we/proteus2ev/Kconfig.defconfig index dcdfd0a06e0b8fd..1733a45b3aba7f6 100644 --- a/boards/we/proteus2ev/Kconfig.defconfig +++ b/boards/we/proteus2ev/Kconfig.defconfig @@ -3,7 +3,4 @@ if BOARD_WE_PROTEUS2EV_NRF52832 -config BT_CTLR - default BT - endif diff --git a/boards/we/proteus3ev/Kconfig.defconfig b/boards/we/proteus3ev/Kconfig.defconfig index ef564abbcbc5ed7..a75ef22e02f14e9 100644 --- a/boards/we/proteus3ev/Kconfig.defconfig +++ b/boards/we/proteus3ev/Kconfig.defconfig @@ -3,7 +3,4 @@ if BOARD_WE_PROTEUS3EV -config BT_CTLR - default BT - endif # BOARD_WE_PROTEUS3EV diff --git a/boards/weact/blackpill_f401cc/blackpill_f401cc.dts b/boards/weact/blackpill_f401cc/blackpill_f401cc.dts index 1fdecac97042344..07d48c5497c3887 100644 --- a/boards/weact/blackpill_f401cc/blackpill_f401cc.dts +++ b/boards/weact/blackpill_f401cc/blackpill_f401cc.dts @@ -125,7 +125,7 @@ zephyr_udc0: &usbotg_fs { &adc1 { pinctrl-0 = <&adc1_in1_pa1>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <2>; status = "okay"; }; diff --git a/boards/weact/blackpill_f401ce/blackpill_f401ce.dts b/boards/weact/blackpill_f401ce/blackpill_f401ce.dts index d670a327019833f..04d490d0f79c4f7 100644 --- a/boards/weact/blackpill_f401ce/blackpill_f401ce.dts +++ b/boards/weact/blackpill_f401ce/blackpill_f401ce.dts @@ -125,7 +125,7 @@ zephyr_udc0: &usbotg_fs { &adc1 { pinctrl-0 = <&adc1_in1_pa1>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <2>; status = "okay"; }; diff --git a/boards/weact/blackpill_f411ce/blackpill_f411ce.dts b/boards/weact/blackpill_f411ce/blackpill_f411ce.dts index d53bfa5f021f572..5acd309cbc9f8b4 100644 --- a/boards/weact/blackpill_f411ce/blackpill_f411ce.dts +++ b/boards/weact/blackpill_f411ce/blackpill_f411ce.dts @@ -126,7 +126,7 @@ zephyr_udc0: &usbotg_fs { &adc1 { pinctrl-0 = <&adc1_in1_pa1>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <2>; status = "okay"; }; diff --git a/boards/weact/mini_stm32h743/Kconfig.defconfig b/boards/weact/mini_stm32h743/Kconfig.defconfig index bcc31baaf59faf9..3ebe575aff6150a 100644 --- a/boards/weact/mini_stm32h743/Kconfig.defconfig +++ b/boards/weact/mini_stm32h743/Kconfig.defconfig @@ -22,14 +22,6 @@ endif # LVGL endif # DISPLAY -if USB_DEVICE_STACK - -config UART_CONSOLE - default CONSOLE - -config USB_DEVICE_INITIALIZE_AT_BOOT - default y - -endif # USB_DEVICE_STACK +source "boards/common/usb/Kconfig.cdc_acm_serial.defconfig" endif # BOARD_MINI_STM32H743 diff --git a/boards/weact/mini_stm32h743/mini_stm32h743.dts b/boards/weact/mini_stm32h743/mini_stm32h743.dts index 5a63ca0f5bede66..abec39683d40730 100644 --- a/boards/weact/mini_stm32h743/mini_stm32h743.dts +++ b/boards/weact/mini_stm32h743/mini_stm32h743.dts @@ -15,8 +15,6 @@ compatible = "weact,mini-stm32h743"; chosen { - zephyr,console = &usb_cdc_acm_uart; - zephyr,shell-uart = &usb_cdc_acm_uart; zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,display = &st7735r_160x80; @@ -155,12 +153,10 @@ zephyr_udc0: &usbotg_fs { pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>; pinctrl-names = "default"; status = "okay"; - - usb_cdc_acm_uart: cdc_acm_uart { - compatible = "zephyr,cdc-acm-uart"; - }; }; +#include <../boards/common/usb/cdc_acm_serial.dtsi> + &quadspi { pinctrl-names = "default"; pinctrl-0 = <&quadspi_clk_pb2 &quadspi_bk1_ncs_pb6 diff --git a/boards/weact/mini_stm32h743/mini_stm32h743_defconfig b/boards/weact/mini_stm32h743/mini_stm32h743_defconfig index 809e85276c9bb04..7feee60d01cceb8 100644 --- a/boards/weact/mini_stm32h743/mini_stm32h743_defconfig +++ b/boards/weact/mini_stm32h743/mini_stm32h743_defconfig @@ -15,9 +15,3 @@ CONFIG_CONSOLE=y # Enable GPIO CONFIG_GPIO=y - -# Logger cannot use itself to log -CONFIG_USB_CDC_ACM_LOG_LEVEL_OFF=y - -# Enable USB -CONFIG_USB_DEVICE_STACK=y diff --git a/boards/weact/mini_stm32h7b0/Kconfig.defconfig b/boards/weact/mini_stm32h7b0/Kconfig.defconfig new file mode 100644 index 000000000000000..4286c38d989c777 --- /dev/null +++ b/boards/weact/mini_stm32h7b0/Kconfig.defconfig @@ -0,0 +1,35 @@ +# Copyright (c) 2024 Linaro Limited +# SPDX-License-Identifier: Apache-2.0 + +# WeAct Studio MiniSTM32H7B0 board configuration + +if BOARD_MINI_STM32H7B0 + +if DISPLAY + +config INPUT + default y + +if LVGL + +configdefault LV_COLOR_16_SWAP + default y + +config LV_Z_BITS_PER_PIXEL + default 16 + +endif # LVGL + +endif # DISPLAY + +if USB_DEVICE_STACK + +config UART_CONSOLE + default CONSOLE + +config USB_DEVICE_INITIALIZE_AT_BOOT + default y + +endif # USB_DEVICE_STACK + +endif # BOARD_MINI_STM32H7B0 diff --git a/boards/weact/mini_stm32h7b0/Kconfig.mini_stm32h7b0 b/boards/weact/mini_stm32h7b0/Kconfig.mini_stm32h7b0 new file mode 100644 index 000000000000000..cf900ccd67028f6 --- /dev/null +++ b/boards/weact/mini_stm32h7b0/Kconfig.mini_stm32h7b0 @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Linaro Limited +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_MINI_STM32H7B0 + select SOC_STM32H7B0XX diff --git a/boards/weact/mini_stm32h7b0/board.cmake b/boards/weact/mini_stm32h7b0/board.cmake new file mode 100644 index 000000000000000..cf935a32ffaf207 --- /dev/null +++ b/boards/weact/mini_stm32h7b0/board.cmake @@ -0,0 +1,8 @@ +# Copyright (c) 2024 Linaro Limited +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(dfu-util "--pid=0483:df11" "--alt=0" "--dfuse") +board_runner_args(jlink "--device=STM32H7B0VB" "--speed=4000") + +include(${ZEPHYR_BASE}/boards/common/dfu-util.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/weact/mini_stm32h7b0/board.yml b/boards/weact/mini_stm32h7b0/board.yml new file mode 100644 index 000000000000000..9baae2f9f9612be --- /dev/null +++ b/boards/weact/mini_stm32h7b0/board.yml @@ -0,0 +1,6 @@ +board: + name: mini_stm32h7b0 + full_name: MiniSTM32H7B0 Core Board + vendor: weact + socs: + - name: stm32h7b0xx diff --git a/boards/weact/mini_stm32h7b0/doc/img/mini_stm32h7b0.webp b/boards/weact/mini_stm32h7b0/doc/img/mini_stm32h7b0.webp new file mode 100644 index 000000000000000..7f92df0963b61e6 Binary files /dev/null and b/boards/weact/mini_stm32h7b0/doc/img/mini_stm32h7b0.webp differ diff --git a/boards/weact/mini_stm32h7b0/doc/index.rst b/boards/weact/mini_stm32h7b0/doc/index.rst new file mode 100644 index 000000000000000..8cf425d55703dc3 --- /dev/null +++ b/boards/weact/mini_stm32h7b0/doc/index.rst @@ -0,0 +1,234 @@ +.. zephyr:board:: mini_stm32h7b0 + +Overview +******** + +The MiniSTM32H7B0 Core board is a compact development board equipped with +an STM32H7B0VBT6 microcontroller. It features a variety of peripherals, +including a user LED and button, a display, and external SPI and QuadSPI +NOR flash memory. + +Key Features + +- STM32 microcontroller in LQFP100 package +- USB OTG or full-speed device +- 1 user LED +- User, boot, and reset push-buttons +- 32.768 kHz and 25MHz HSE crystal oscillators +- External NOR Flash memories: 64-Mbit Quad-SPI and 64-Mbit SPI +- Board connectors: + + - Camera (8 bit) connector + - ST7735 TFT-LCD 160 x 80 pixels (RGB565 3-SPI) + - microSD |trade| card + - USB Type-C Connector + - SWD header for external debugger + - 2x 40-pin GPIO connector + + +More information about the board can be found on the `Mini_STM32H7B0 website`_. + +Hardware +******** + +The MiniSTM32H7B0 Core board provides the following hardware components: + +- STM32H7B0VBT6 in LQFP100 package +- ARM 32-bit Cortex-M7 CPU with FPU +- Chrom-ART Accelerator +- Hardware JPEG Codec +- 280 MHz max CPU frequency +- VDD from 1.62 V to 3.6 V +- 128 KB Flash +- 1.4 MB SRAM +- High-resolution timer (2.1 ns) +- 32-bit timers(2) +- 16-bit timers(10) +- SPI(5) +- I2C(4) +- I2S (4) +- USART(5) +- UART(5) +- USB OTG Full Speed and High Speed(1) +- CAN FD(2) +- SAI(4) +- SPDIF_Rx(4) +- HDMI_CEC(1) +- Dual Mode Quad SPI(1) +- Camera Interface +- GPIO (up to 80) with external interrupt capability +- 16-bit ADC(2) with 16 channels +- 12-bit DAC with 2 channels(2) +- True Random Number Generator (RNG) +- 16-channel DMA +- LCD-TFT Controller with XGA resolution + +More information about STM32H7BO can be found here: + +- `STM32H7B0VB on www.st.com`_ +- `STM32H7B0VB reference manual`_ +- `STM32H7B0VB datasheet`_ + +Supported Features +================== + +The ``mini_stm32h7b0`` board target supports the following hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| WDT | on-chip | watchdog | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| FLASH | on-chip | flash memory | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| SPI | on-chip | spi | ++-----------+------------+-------------------------------------+ +| QSPI NOR | on-chip | off-chip flash | ++-----------+------------+-------------------------------------+ +| SDMMC | on-chip | disk access | ++-----------+------------+-------------------------------------+ +| DISPLAY | on-chip | display | ++-----------+------------+-------------------------------------+ + +Other hardware features have not been enabled yet for this board. + +The default configuration per core can be found in the defconfig file: +:zephyr_file:`boards/weact/mini_stm32h7b0/mini_stm32h7b0_defconfig` + +Pin Mapping +=========== + +MiniSTM32H7B0 Core board has 5 GPIO controllers. These controllers are responsible for pin muxing, +input/output, pull-up, etc. + +For more details please refer to `Mini_STM32H7B0 website`_. + +Default Zephyr Peripheral Mapping: +---------------------------------- + +The MiniSTM32H7B0 Core board is configured as follows + +- USER_LED : PE3 +- USER_PB : PC13 +- SPI1 SCK/MISO/MOSI/NSS : PB3/PB4/PD7/PD6 (NOR Flash memory) +- SPI4 SCK/MOSI/NSS : PE12/PE14/PE11 (LCD) +- QuadSPI CLK/NCS/IO0/IO1/IO2/IO3 : PB2/PB6/PD11/PD12/PE2/PD13 (NOR Flash memory) +- SDMMC1 CLK/DCMD/CD/D0/D1/D2/D3 : PC12/PD2/PD4/PC8/PC9/PC10/PC11 (microSD card) +- USB DM/DP : PA11/PA12 (USB CDC ACM) + +System Clock +============ + +The STM32H7B0VB System Clock can be driven by an internal or external oscillator, +as well as by the main PLL clock. By default, the System clock is driven +by the PLL clock at 280MHz. PLL clock is fed by a 25MHz high speed external clock. + +Serial Port (USB CDC ACM) +========================= + +The Zephyr console output is assigned to the USB CDC ACM virtual serial port. +Virtual COM port interface. Default communication settings are 115200 8N1. + +Programming and Debugging +************************* + +The MiniSTM32H7B0 Core board facilitates firmware flashing via the USB DFU +bootloader. This method simplifies the process of updating images, although +it doesn't provide debugging capabilities. However, the board provides header +pins for the Serial Wire Debug (SWD) interface, which can be used to connect +an external debugger, such as ST-Link. + +Flashing +======== + +To activate the bootloader, follow these steps: + +1. Press and hold the BOOT0 key. +2. While still holding the BOOT0 key, press and release the RESET key. +3. Wait for 0.5 seconds, then release the BOOT0 key. + +Upon successful execution of these steps, the device will transition into +bootloader mode and present itself as a USB DFU Mode device. You can program +the device using the west tool or the STM32CubeProgrammer. + +Flashing an application to MiniSTM32H7B0 +---------------------------------------- + +Here is an example for the :zephyr:code-sample:`hello_world` application. + +First, put the board in bootloader mode as described above. Then build and flash +the application in the usual way. Just add ``CONFIG_BOOT_DELAY=5000`` to the +configuration, so that USB CDC ACM is initialized before any text is printed, +as below: + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: mini_stm32h7b0 + :goals: build flash + :gen-args: -DCONFIG_BOOT_DELAY=5000 + +Run a serial host program to connect with your board: + +.. code-block:: console + + $ minicom -D -b 115200 + +Then, press the RESET button, you should see the following message after few seconds: + +.. code-block:: console + + Hello World! mini_stm32h7b0 + +Replace :code:`` with the port where the board XIAO BLE +can be found. For example, under Linux, :code:`/dev/ttyACM0`. + +Debugging +--------- + +This current Zephyr port does not support debugging. + +Testing the LEDs in the MiniSTM32H7B0 +************************************* + +There is a sample that allows to test that LED on the board are working +properly with Zephyr: + +.. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: mini_stm32h7b0 + :goals: build flash + :gen-args: -DCONFIG_BOOT_DELAY=5000 + +You can build and flash the examples to make sure Zephyr is running correctly on +your board. The LED definitions can be found in +:zephyr_file:`boards/weact/mini_stm32h7b0/mini_stm32h7b0.dts`. + +Testing shell over USB in the MiniSTM32H7B0 +******************************************* + +There is a sample that allows to test shell interface over USB CDC ACM interface +with Zephyr: + +.. zephyr-app-commands:: + :zephyr-app: samples/subsys/shell/shell_module + :board: mini_stm32h7b0 + :goals: build flash + :gen-args: -DCONFIG_BOOT_DELAY=5000 + +.. _Mini_STM32H7B0 website: + https://github.com/WeActStudio/WeActStudio.MiniSTM32H7B0 + +.. _STM32H7B0VB on www.st.com: + https://www.st.com/en/microcontrollers-microprocessors/stm32h7b0vb.html + +.. _STM32H7B0VB reference manual: + https://www.st.com/resource/en/reference_manual/rm0455-stm32h7a37b3-and-stm32h7b0-value-line-advanced-armbased-32bit-mcus-stmicroelectronics.pdf + +.. _STM32H7B0VB datasheet: + https://www.st.com/resource/en/datasheet/stm32h7b0vb.pdf diff --git a/boards/weact/mini_stm32h7b0/mini_stm32h7b0.dts b/boards/weact/mini_stm32h7b0/mini_stm32h7b0.dts new file mode 100644 index 000000000000000..cc09b5dda683079 --- /dev/null +++ b/boards/weact/mini_stm32h7b0/mini_stm32h7b0.dts @@ -0,0 +1,223 @@ +/* + * Copyright (c) 2024 Linaro Limited + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include +#include +#include + +/ { + model = "WeAct Studio MiniSTM32H7B0 Core Board"; + compatible = "weact,mini-stm32h7b0"; + + chosen { + zephyr,console = &usb_cdc_acm_uart; + zephyr,shell-uart = &usb_cdc_acm_uart; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,display = &st7735r_160x80; + }; + + leds { + compatible = "gpio-leds"; + user_led: led { + gpios = <&gpioe 3 GPIO_ACTIVE_HIGH>; + label = "User LED"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button: button { + label = "User PB"; + gpios = <&gpioc 13 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; + zephyr,code = ; + }; + }; + + mipi_dbi_st7735r_160x80 { + compatible = "zephyr,mipi-dbi-spi"; + spi-dev = <&spi4>; + dc-gpios = <&gpioe 13 GPIO_ACTIVE_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + + st7735r_160x80: st7735r@0 { + compatible = "sitronix,st7735r"; + mipi-max-frequency = <20000000>; + mipi-mode = "MIPI_DBI_MODE_SPI_4WIRE"; + reg = <0>; + width = <160>; + height = <80>; + inversion-on; + rgb-is-inverted; + x-offset = <1>; + y-offset = <26>; + pwctr1 = [A2 02 84]; + pwctr2 = [C5]; + pwctr3 = [0A 00]; + pwctr4 = [8A 2A]; + pwctr5 = [8A EE]; + invctr = <7>; + frmctr1 = [01 2C 2D]; + frmctr2 = [01 2C 2D]; + frmctr3 = [01 2C 2D 01 2C 2D]; + vmctr1 = <14>; + gamctrp1 = [02 1C 07 12 37 32 29 2D 29 25 2B 39 00 01 03 10]; + gamctrn1 = [03 1D 07 06 2E 2C 29 2D 2E 2E 37 3F 00 00 02 10]; + colmod = <5>; + /* Set D3 (RGB) bit to 1. LV_COLOR_16_SWAP is enabled by default */ + madctl = <120>; /* Set to <184> to rotate the image 180 degrees. */ + caset = [00 01 00 a0]; + raset = [00 1a 00 69]; + }; + }; + + aliases { + led0 = &user_led; + sw0 = &user_button; + watchdog0 = &iwdg; + sdhc0 = &sdmmc1; + }; +}; + +&clk_lsi { + status = "okay"; +}; + +&clk_hsi48 { + status = "okay"; +}; + +&clk_hse { + clock-frequency = ; + status = "okay"; +}; + +&pll { + div-m = <5>; + mul-n = <112>; + div-p = <2>; + div-q = <2>; + div-r = <2>; + clocks = <&clk_hse>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = ; + d1cpre = <1>; + hpre = <2>; + d1ppre = <1>; + d2ppre1 = <1>; + d2ppre2 = <1>; + d3ppre = <1>; +}; + +&sdmmc1 { + pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9 + &sdmmc1_d2_pc10 &sdmmc1_d3_pc11 + &sdmmc1_ck_pc12 &sdmmc1_cmd_pd2>; + pinctrl-names = "default"; + cd-gpios = <&gpiod 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; + status = "okay"; +}; + +zephyr_udc0: &usbotg_hs { + pinctrl-0 = <&usb_otg_hs_dm_pa11 &usb_otg_hs_dp_pa12>; + pinctrl-names = "default"; + status = "okay"; + + usb_cdc_acm_uart: cdc_acm_uart { + compatible = "zephyr,cdc-acm-uart"; + }; +}; + + +&octospi1 { + pinctrl-names = "default"; + pinctrl-0 = <&octospim_p1_clk_pb2 &octospim_p1_ncs_pb6 + &octospim_p1_io0_pd11 &octospim_p1_io1_pd12 + &octospim_p1_io2_pe2 &octospim_p1_io3_pd13>; + status = "okay"; + + w25q64_qspi: ospi-nor-flash@90000000 { + compatible = "st,stm32-ospi-nor"; + reg = <0x90000000 DT_SIZE_M(64)>; /* 64 Mbits */ + ospi-max-frequency = <40000000>; + status = "okay"; + spi-bus-width = <4>; + data-rate = ; + writeoc = "PP_1_1_4"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + slot0_partition: partition@0 { + reg = <0x00000000 DT_SIZE_M(64)>; + }; + }; + }; +}; + +&spi1 { + pinctrl-0 = <&spi1_sck_pb3 &spi1_miso_pb4 &spi1_mosi_pd7>; + cs-gpios = <&gpiod 6 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + status = "okay"; + w25q64_spi: spi-nor-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + size = ; /* 64 Mbits */ + status = "okay"; + jedec-id = [ef 40 17]; + has-dpd; + t-enter-dpd = <3500>; + t-exit-dpd = <3500>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + storage_partition: partition@0 { + label = "storage"; + reg = <0x00000000 DT_SIZE_M(64)>; + }; + }; + }; +}; + +&gpioe { + status = "okay"; + + lcd_led { + gpio-hog; + gpios = <10 GPIO_ACTIVE_LOW>; + output-high; + }; +}; + +&spi4 { + pinctrl-0 = <&spi4_sck_pe12 &spi4_mosi_pe14>; + cs-gpios = <&gpioe 11 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + status = "okay"; +}; + +&rng { + status = "okay"; +}; + +&backup_sram { + status = "okay"; +}; + +&iwdg1 { + status = "okay"; +}; diff --git a/boards/weact/mini_stm32h7b0/mini_stm32h7b0.yaml b/boards/weact/mini_stm32h7b0/mini_stm32h7b0.yaml new file mode 100644 index 000000000000000..d9904423aa66081 --- /dev/null +++ b/boards/weact/mini_stm32h7b0/mini_stm32h7b0.yaml @@ -0,0 +1,19 @@ +identifier: mini_stm32h7b0 +name: WeAct Studio MiniSTM32H7B0 Core Board +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +ram: 512 +flash: 2048 +supported: + - gpio + - counter + - spi + - backup_sram + - watchdog + - qspi + - video +vendor: weact diff --git a/boards/weact/mini_stm32h7b0/mini_stm32h7b0_defconfig b/boards/weact/mini_stm32h7b0/mini_stm32h7b0_defconfig new file mode 100644 index 000000000000000..77c7a7206196978 --- /dev/null +++ b/boards/weact/mini_stm32h7b0/mini_stm32h7b0_defconfig @@ -0,0 +1,23 @@ +# Copyright (c) 2024 Linaro Limited +# SPDX-License-Identifier: Apache-2.0 + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable HW stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable console +CONFIG_CONSOLE=y + +# Enable GPIO +CONFIG_GPIO=y + +# Logger cannot use itself to log +CONFIG_USB_CDC_ACM_LOG_LEVEL_OFF=y + +# Enable USB +CONFIG_USB_DEVICE_STACK=y diff --git a/boards/weact/stm32g431_core/weact_stm32g431_core.dts b/boards/weact/stm32g431_core/weact_stm32g431_core.dts index ca6dfcf656935bc..1038536369f831b 100644 --- a/boards/weact/stm32g431_core/weact_stm32g431_core.dts +++ b/boards/weact/stm32g431_core/weact_stm32g431_core.dts @@ -154,7 +154,7 @@ stm32_lp_tick_source: &lptim1 { &adc2 { pinctrl-0 = <&adc2_in12_pb2>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; #address-cells = <1>; diff --git a/boards/wemos/esp32s2_lolin_mini/Kconfig.defconfig b/boards/wemos/esp32s2_lolin_mini/Kconfig.defconfig deleted file mode 100644 index cb9fdebc22c3e94..000000000000000 --- a/boards/wemos/esp32s2_lolin_mini/Kconfig.defconfig +++ /dev/null @@ -1,7 +0,0 @@ -# ESP32S2 LOLIN S2 MINI board configuration - -# Copyright (c) 2023 Google, LLC -# SPDX-License-Identifier: Apache-2.0 - -config ENTROPY_GENERATOR - default y diff --git a/boards/wemos/esp32s2_lolin_mini/esp32s2_lolin_mini.yaml b/boards/wemos/esp32s2_lolin_mini/esp32s2_lolin_mini.yaml index 763b8c838f492c6..fcc4d03a44f9cc8 100644 --- a/boards/wemos/esp32s2_lolin_mini/esp32s2_lolin_mini.yaml +++ b/boards/wemos/esp32s2_lolin_mini/esp32s2_lolin_mini.yaml @@ -10,6 +10,5 @@ supported: - uart testing: ignore_tags: - - net - bluetooth vendor: wemos diff --git a/boards/witte/linum/linum.dts b/boards/witte/linum/linum.dts index d4846f3e1c7d785..fe2280ec11726e0 100644 --- a/boards/witte/linum/linum.dts +++ b/boards/witte/linum/linum.dts @@ -203,7 +203,7 @@ zephyr_udc0: &usbotg_fs { &adc1 { pinctrl-0 = <&adc1_inp15_pa3>; pinctrl-names = "default"; - st,adc-clock-source = ; + st,adc-clock-source = "SYNC"; st,adc-prescaler = <4>; status = "okay"; }; diff --git a/boards/wiznet/w5500_evb_pico/board.cmake b/boards/wiznet/w5500_evb_pico/board.cmake index e95d4d3767f655b..a52ac5d15e0cb27 100644 --- a/boards/wiznet/w5500_evb_pico/board.cmake +++ b/boards/wiznet/w5500_evb_pico/board.cmake @@ -13,7 +13,7 @@ # The value must be the 'stem' part of the name of one of the files # in the openocd interface configuration file. # The setting is store to CMakeCache.txt. -if ("${RPI_PICO_DEBUG_ADAPTER}" STREQUAL "") +if("${RPI_PICO_DEBUG_ADAPTER}" STREQUAL "") set(RPI_PICO_DEBUG_ADAPTER "cmsis-dap") endif() diff --git a/boards/wiznet/w5500_evb_pico/w5500_evb_pico-pinctrl.dtsi b/boards/wiznet/w5500_evb_pico/w5500_evb_pico-pinctrl.dtsi index 761354420c6160a..747b0d04e409581 100644 --- a/boards/wiznet/w5500_evb_pico/w5500_evb_pico-pinctrl.dtsi +++ b/boards/wiznet/w5500_evb_pico/w5500_evb_pico-pinctrl.dtsi @@ -54,7 +54,4 @@ input-enable; }; }; - - clocks_default: clocks_default { - }; }; diff --git a/boards/wiznet/w5500_evb_pico/w5500_evb_pico.dts b/boards/wiznet/w5500_evb_pico/w5500_evb_pico.dts index c14cb0b7d649d7b..3f853ce06051b92 100644 --- a/boards/wiznet/w5500_evb_pico/w5500_evb_pico.dts +++ b/boards/wiznet/w5500_evb_pico/w5500_evb_pico.dts @@ -9,7 +9,7 @@ #include -#include +#include #include "w5500_evb_pico-pinctrl.dtsi" #include @@ -112,11 +112,6 @@ }; }; -&clocks { - pinctrl-0 = <&clocks_default>; - pinctrl-names = "default"; -}; - &uart0 { current-speed = <115200>; status = "okay"; diff --git a/boards/xen/xenvm/Kconfig.defconfig b/boards/xen/xenvm/Kconfig.defconfig index 965dc9cda33bd87..66ef1066e4c630b 100644 --- a/boards/xen/xenvm/Kconfig.defconfig +++ b/boards/xen/xenvm/Kconfig.defconfig @@ -7,6 +7,6 @@ config BUILD_OUTPUT_BIN default y config HEAP_MEM_POOL_SIZE - default 16384 if BOARD_XENVM_XENVM + default 16384 endif # BOARD_XENVM diff --git a/boards/xen/xenvm/xenvm_xenvm_gicv3_defconfig b/boards/xen/xenvm/xenvm_xenvm_gicv3_defconfig new file mode 100644 index 000000000000000..2115f9175bd2aa2 --- /dev/null +++ b/boards/xen/xenvm/xenvm_xenvm_gicv3_defconfig @@ -0,0 +1,13 @@ +# Enable UART driver +CONFIG_SERIAL=y + +CONFIG_MAX_XLAT_TABLES=24 + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable logging subsys +CONFIG_LOG=y +CONFIG_LOG_MODE_MINIMAL=n +CONFIG_TIMER_READS_ITS_FREQUENCY_AT_RUNTIME=y diff --git a/cmake/bintools/llvm/target_bintools.cmake b/cmake/bintools/llvm/target_bintools.cmake index cd3d55342b5d87e..f310d57bf2b2bf6 100644 --- a/cmake/bintools/llvm/target_bintools.cmake +++ b/cmake/bintools/llvm/target_bintools.cmake @@ -44,11 +44,8 @@ set_property(TARGET bintools PROPERTY elfconvert_flag_section_remove "--remove-s set_property(TARGET bintools PROPERTY elfconvert_flag_section_only "--only-section=") set_property(TARGET bintools PROPERTY elfconvert_flag_section_rename "--rename-section;") -# Note, placing a ';' at the end results in the following param to be a list, -# and hence space separated. -# Thus the command line argument becomes: -# `--gap-file ` instead of `--gap-fill` (The latter would result in an error) -set_property(TARGET bintools PROPERTY elfconvert_flag_gapfill "--gap-fill;") +# llvm-objcopy doesn't support gap fill argument. +set_property(TARGET bintools PROPERTY elfconvert_flag_gapfill "") set_property(TARGET bintools PROPERTY elfconvert_flag_srec_len "--srec-len=") set_property(TARGET bintools PROPERTY elfconvert_flag_infile "") diff --git a/cmake/compiler/arcmwdt/compiler_flags.cmake b/cmake/compiler/arcmwdt/compiler_flags.cmake index 6b334c1fe84da58..7234afc0c8030a2 100644 --- a/cmake/compiler/arcmwdt/compiler_flags.cmake +++ b/cmake/compiler/arcmwdt/compiler_flags.cmake @@ -167,7 +167,9 @@ set_compiler_property(PROPERTY imacros -imacros) # Security canaries. #no support of -mstack-protector-guard=global" -set_compiler_property(PROPERTY security_canaries -fstack-protector-all) +set_compiler_property(PROPERTY security_canaries -fstack-protector) +set_compiler_property(PROPERTY security_canaries_strong -fstack-protector-strong) +set_compiler_property(PROPERTY security_canaries_all -fstack-protector-all) #no support of _FORTIFY_SOURCE" set_compiler_property(PROPERTY security_fortify_compile_time) diff --git a/cmake/compiler/compiler_flags_template.cmake b/cmake/compiler/compiler_flags_template.cmake index 5a4386f49beb77e..447db04a2d30715 100644 --- a/cmake/compiler/compiler_flags_template.cmake +++ b/cmake/compiler/compiler_flags_template.cmake @@ -92,6 +92,9 @@ set_compiler_property(PROPERTY coverage) # Security canaries flags. set_compiler_property(PROPERTY security_canaries) +set_compiler_property(PROPERTY security_canaries_strong) +set_compiler_property(PROPERTY security_canaries_all) +set_compiler_property(PROPERTY security_canaries_explicit) set_compiler_property(PROPERTY security_fortify_compile_time) set_compiler_property(PROPERTY security_fortify_run_time) @@ -143,3 +146,6 @@ set_compiler_property(PROPERTY no_builtin_malloc) # Compiler flag for defining specs. Used only by gcc, other compilers may keep # this undefined. set_compiler_property(PROPERTY specs) + +# Compiler flag for defining preinclude files. +set_compiler_property(PROPERTY include_file) diff --git a/cmake/compiler/gcc/compiler_flags.cmake b/cmake/compiler/gcc/compiler_flags.cmake index 5d348a2aacc2d5b..204df61d01afe5c 100644 --- a/cmake/compiler/gcc/compiler_flags.cmake +++ b/cmake/compiler/gcc/compiler_flags.cmake @@ -167,13 +167,22 @@ set_property(TARGET compiler-cpp PROPERTY no_rtti "-fno-rtti") set_compiler_property(PROPERTY coverage -fprofile-arcs -ftest-coverage -fno-inline) # Security canaries. -set_compiler_property(PROPERTY security_canaries -fstack-protector-all) +set_compiler_property(PROPERTY security_canaries -fstack-protector) +set_compiler_property(PROPERTY security_canaries_strong -fstack-protector-strong) +set_compiler_property(PROPERTY security_canaries_all -fstack-protector-all) +set_compiler_property(PROPERTY security_canaries_explicit -fstack-protector-explicit) # Only a valid option with GCC 7.x and above, so let's do check and set. if(CONFIG_STACK_CANARIES_TLS) check_set_compiler_property(APPEND PROPERTY security_canaries -mstack-protector-guard=tls) + check_set_compiler_property(APPEND PROPERTY security_canaries_strong -mstack-protector-guard=tls) + check_set_compiler_property(APPEND PROPERTY security_canaries_all -mstack-protector-guard=tls) + check_set_compiler_property(APPEND PROPERTY security_canaries_explicit -mstack-protector-guard=tls) else() check_set_compiler_property(APPEND PROPERTY security_canaries -mstack-protector-guard=global) + check_set_compiler_property(APPEND PROPERTY security_canaries_global -mstack-protector-guard=global) + check_set_compiler_property(APPEND PROPERTY security_canaries_all -mstack-protector-guard=global) + check_set_compiler_property(APPEND PROPERTY security_canaries_explicit -mstack-protector-guard=global) endif() @@ -244,3 +253,5 @@ set_compiler_property(PROPERTY no_builtin -fno-builtin) set_compiler_property(PROPERTY no_builtin_malloc -fno-builtin-malloc) set_compiler_property(PROPERTY specs -specs=) + +set_compiler_property(PROPERTY include_file -include) diff --git a/cmake/emu/simics.cmake b/cmake/emu/simics.cmake index dee1305a1f17528..f20c09f052a776b 100644 --- a/cmake/emu/simics.cmake +++ b/cmake/emu/simics.cmake @@ -1,30 +1,42 @@ -# Copyright (c) 2023 Intel Corporation +# Copyright (c) 2023-2024 Intel Corporation # # SPDX-License-Identifier: Apache-2.0 find_program( SIMICS NAMES simics + NO_DEFAULT_PATH + PATHS ENV SIMICS_PROJECT + # Search exactly for the project's autogenerated 'trampoline' script. ) -zephyr_get(SIMICS_SCRIPT_PATH SYSBUILD GLOBAL) -if(SIMICS_SCRIPT_PATH) - set(SIMICS_SCRIPT ${SIMICS_SCRIPT_PATH}) +if(SIMICS STREQUAL SIMICS-NOTFOUND) + message(WARNING "Simics simulator environment is not found at SIMICS_PROJECT:'${SIMICS_PROJECT}'") else() - set(SIMICS_SCRIPT ${BOARD_DIR}/support/${BOARD}.simics) -endif() + message(STATUS "Found Simics: ${SIMICS}") -get_property(SIMICS_ARGS GLOBAL PROPERTY "BOARD_EMU_ARGS_simics") + zephyr_get(SIMICS_SCRIPT_PATH SYSBUILD GLOBAL) + if(SIMICS_SCRIPT_PATH) + set(SIMICS_SCRIPT ${SIMICS_SCRIPT_PATH}) + else() + set(SIMICS_SCRIPT ${BOARD_DIR}/support/${BOARD}.simics) + endif() -add_custom_target(run_simics - COMMAND - ${SIMICS} - -no-gui - -no-win - ${SIMICS_SCRIPT} - ${SIMICS_ARGS} - -e run - WORKING_DIRECTORY ${APPLICATION_BINARY_DIR} - DEPENDS ${logical_target_for_zephyr_elf} - USES_TERMINAL - ) + get_property(SIMICS_ARGS GLOBAL PROPERTY "BOARD_EMU_ARGS_simics") + + add_custom_target(run_simics + COMMAND + ${SIMICS} + -no-gui + --no-win + --batch-mode + ${SIMICS_SCRIPT} + ${SIMICS_ARGS} + $ENV{SIMICS_EXTRA_ARGS} + -e run + WORKING_DIRECTORY ${APPLICATION_BINARY_DIR} + DEPENDS ${logical_target_for_zephyr_elf} + USES_TERMINAL + ) + +endif() diff --git a/cmake/hex.cmake b/cmake/hex.cmake deleted file mode 100644 index f5eb586f7bd47e1..000000000000000 --- a/cmake/hex.cmake +++ /dev/null @@ -1,64 +0,0 @@ -# SPDX-License-Identifier: Apache-2.0 - -# This code was deprecated after Zephyr v3.5.0 -message(DEPRECATION "The to_hex() and from_hex() functions are deprecated. Please " - "use CMake's math(... OUTPUT_FORMAT ) instead.") - -# from https://gist.github.com/korzo89/71a6de0f388f7cf8b349101b0134060c -function(from_hex HEX DEC) - string(SUBSTRING "${HEX}" 2 -1 HEX) - string(TOUPPER "${HEX}" HEX) - set(_res 0) - string(LENGTH "${HEX}" _strlen) - - while(_strlen GREATER 0) - math(EXPR _res "${_res} * 16") - string(SUBSTRING "${HEX}" 0 1 NIBBLE) - string(SUBSTRING "${HEX}" 1 -1 HEX) - if(NIBBLE STREQUAL "A") - math(EXPR _res "${_res} + 10") - elseif(NIBBLE STREQUAL "B") - math(EXPR _res "${_res} + 11") - elseif(NIBBLE STREQUAL "C") - math(EXPR _res "${_res} + 12") - elseif(NIBBLE STREQUAL "D") - math(EXPR _res "${_res} + 13") - elseif(NIBBLE STREQUAL "E") - math(EXPR _res "${_res} + 14") - elseif(NIBBLE STREQUAL "F") - math(EXPR _res "${_res} + 15") - else() - math(EXPR _res "${_res} + ${NIBBLE}") - endif() - - string(LENGTH "${HEX}" _strlen) - endwhile() - - set(${DEC} ${_res} PARENT_SCOPE) -endfunction() - -function(to_hex DEC HEX) - if(DEC EQUAL 0) - set(${HEX} "0x0" PARENT_SCOPE) - return() - endif() - while(DEC GREATER 0) - math(EXPR _val "${DEC} % 16") - math(EXPR DEC "${DEC} / 16") - if(_val EQUAL 10) - set(_val "A") - elseif(_val EQUAL 11) - set(_val "B") - elseif(_val EQUAL 12) - set(_val "C") - elseif(_val EQUAL 13) - set(_val "D") - elseif(_val EQUAL 14) - set(_val "E") - elseif(_val EQUAL 15) - set(_val "F") - endif() - set(_res "${_val}${_res}") - endwhile() - set(${HEX} "0x${_res}" PARENT_SCOPE) -endfunction() diff --git a/cmake/linker/armlink/target.cmake b/cmake/linker/armlink/target.cmake index b2e1e867f904a3a..be2bb8e89778faf 100644 --- a/cmake/linker/armlink/target.cmake +++ b/cmake/linker/armlink/target.cmake @@ -18,6 +18,9 @@ macro(configure_linker_script linker_script_gen linker_pass_define) set(STEERING_FILE_ARG) set(STEERING_C_ARG) set(linker_pass_define_list ${linker_pass_define}) + set(cmake_linker_script_settings + ${PROJECT_BINARY_DIR}/include/generated/ld_script_settings_${linker_pass_define}.cmake + ) if("LINKER_ZEPHYR_FINAL" IN_LIST linker_pass_define_list) set(STEERING_FILE ${CMAKE_CURRENT_BINARY_DIR}/armlink_symbol_steering.steer) @@ -26,21 +29,29 @@ macro(configure_linker_script linker_script_gen linker_pass_define) set(STEERING_C_ARG "-DSTEERING_C=${STEERING_C}") endif() + file(GENERATE OUTPUT ${cmake_linker_script_settings} CONTENT + "set(FORMAT \"$\" CACHE INTERNAL \"\")\n + set(ENTRY \"$\" CACHE INTERNAL \"\")\n + set(MEMORY_REGIONS \"$\" CACHE INTERNAL \"\")\n + set(GROUPS \"$\" CACHE INTERNAL \"\")\n + set(SECTIONS \"$\" CACHE INTERNAL \"\")\n + set(SECTION_SETTINGS \"$\" CACHE INTERNAL \"\")\n + set(SYMBOLS \"$\" CACHE INTERNAL \"\")\n + " + ) add_custom_command( OUTPUT ${linker_script_gen} ${STEERING_FILE} ${STEERING_C} COMMAND ${CMAKE_COMMAND} + -C ${DEVICE_API_LINKER_SECTIONS_CMAKE} + -C ${cmake_linker_script_settings} -DPASS="${linker_pass_define}" - -DMEMORY_REGIONS="$" - -DGROUPS="$" - -DSECTIONS="$" - -DSECTION_SETTINGS="$" - -DSYMBOLS="$" ${STEERING_FILE_ARG} ${STEERING_C_ARG} -DOUT_FILE=${CMAKE_CURRENT_BINARY_DIR}/${linker_script_gen} -P ${ZEPHYR_BASE}/cmake/linker/armlink/scatter_script.cmake + DEPENDS ${DEVICE_API_LD_TARGET} ) if("LINKER_ZEPHYR_FINAL" IN_LIST linker_pass_define_list) diff --git a/cmake/linker/ld/target.cmake b/cmake/linker/ld/target.cmake index 5e0a117c0143601..37a88b837c48a4c 100644 --- a/cmake/linker/ld/target.cmake +++ b/cmake/linker/ld/target.cmake @@ -18,22 +18,31 @@ endif() # NOTE: ${linker_script_gen} will be produced at build-time; not at configure-time macro(configure_linker_script linker_script_gen linker_pass_define) set(extra_dependencies ${ARGN}) + set(cmake_linker_script_settings + ${PROJECT_BINARY_DIR}/include/generated/ld_script_settings_${linker_pass_define}.cmake + ) if(CONFIG_CMAKE_LINKER_GENERATOR) + file(GENERATE OUTPUT ${cmake_linker_script_settings} CONTENT + "set(FORMAT \"$\" CACHE INTERNAL \"\")\n + set(ENTRY \"$\" CACHE INTERNAL \"\")\n + set(MEMORY_REGIONS \"$\" CACHE INTERNAL \"\")\n + set(GROUPS \"$\" CACHE INTERNAL \"\")\n + set(SECTIONS \"$\" CACHE INTERNAL \"\")\n + set(SECTION_SETTINGS \"$\" CACHE INTERNAL \"\")\n + set(SYMBOLS \"$\" CACHE INTERNAL \"\")\n + " + ) add_custom_command( OUTPUT ${linker_script_gen} COMMAND ${CMAKE_COMMAND} + -C ${DEVICE_API_LINKER_SECTIONS_CMAKE} + -C ${cmake_linker_script_settings} -DPASS="${linker_pass_define}" - -DFORMAT="$" - -DENTRY="$" - -DMEMORY_REGIONS="$" - -DGROUPS="$" - -DSECTIONS="$" - -DSECTION_SETTINGS="$" - -DSYMBOLS="$" -DOUT_FILE=${CMAKE_CURRENT_BINARY_DIR}/${linker_script_gen} -P ${ZEPHYR_BASE}/cmake/linker/ld/ld_script.cmake - ) + DEPENDS ${DEVICE_API_LD_TARGET} + ) else() set(template_script_defines ${linker_pass_define}) list(TRANSFORM template_script_defines PREPEND "-D") @@ -147,7 +156,7 @@ macro(toolchain_linker_finalize) endforeach() string(REPLACE ";" " " zephyr_std_libs "${zephyr_std_libs}") - set(link_libraries " -o ${zephyr_std_libs}") + set(link_libraries " -o ${zephyr_std_libs}") set(common_link " ${link_libraries}") set(CMAKE_ASM_LINK_EXECUTABLE " ${common_link}") diff --git a/cmake/linker/linker_script_common.cmake b/cmake/linker/linker_script_common.cmake index ef5ded66fdd3077..017de14cf6bf4e8 100644 --- a/cmake/linker/linker_script_common.cmake +++ b/cmake/linker/linker_script_common.cmake @@ -132,7 +132,7 @@ function(create_section) set(INDEX 100) set(settings_single "ALIGN;ANY;FIRST;KEEP;OFFSET;PRIO;SECTION;SORT") set(settings_multi "FLAGS;INPUT;PASS;SYMBOLS") - foreach(settings ${SECTION_SETTINGS}) + foreach(settings ${SECTION_SETTINGS} ${DEVICE_API_SECTION_SETTINGS}) if("${settings}" MATCHES "^{(.*)}$") cmake_parse_arguments(SETTINGS "" "${settings_single}" "${settings_multi}" ${CMAKE_MATCH_1}) @@ -652,7 +652,7 @@ foreach(group ${GROUPS}) endif() endforeach() -foreach(section ${SECTIONS}) +foreach(section ${SECTIONS} ${DEVICE_API_SECTIONS}) if("${section}" MATCHES "^{(.*)}$") create_section(${CMAKE_MATCH_1} SYSTEM ${new_system}) endif() diff --git a/cmake/linker_script/arm/linker.cmake b/cmake/linker_script/arm/linker.cmake index bb501a16cdb2f41..ad639f373ccdbea 100644 --- a/cmake/linker_script/arm/linker.cmake +++ b/cmake/linker_script/arm/linker.cmake @@ -41,10 +41,9 @@ zephyr_linker_memory(NAME FLASH FLAGS rx START ${FLASH_ADDR} SIZE ${FLASH_SIZ zephyr_linker_memory(NAME RAM FLAGS wx START ${RAM_ADDR} SIZE ${RAM_SIZE}) zephyr_linker_memory(NAME IDT_LIST FLAGS wx START ${IDT_ADDR} SIZE 2K) -# Only use 'rw' as FLAGS. It's not used anyway. dt_comp_path(paths COMPATIBLE "zephyr,memory-region") foreach(path IN LISTS paths) - zephyr_linker_dts_memory(PATH ${path} FLAGS rw) + zephyr_linker_dts_memory(PATH ${path}) endforeach() if(CONFIG_XIP) diff --git a/cmake/linker_script/common/common-ram.cmake b/cmake/linker_script/common/common-ram.cmake index 48e0c6010aa83d9..5d2f9d18430d623 100644 --- a/cmake/linker_script/common/common-ram.cmake +++ b/cmake/linker_script/common/common-ram.cmake @@ -41,10 +41,12 @@ zephyr_iterable_section(NAME k_msgq GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SU zephyr_iterable_section(NAME k_mbox GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) zephyr_iterable_section(NAME k_pipe GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) zephyr_iterable_section(NAME k_sem GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) -zephyr_iterable_section(NAME k_queue GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) -zephyr_iterable_section(NAME k_condvar GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) zephyr_iterable_section(NAME k_event GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) +zephyr_iterable_section(NAME k_queue GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) zephyr_iterable_section(NAME k_fifo GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) +zephyr_iterable_section(NAME k_lifo GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) +zephyr_iterable_section(NAME k_condvar GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) +zephyr_iterable_section(NAME sys_mem_blocks_ptr GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) zephyr_iterable_section(NAME net_buf_pool GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) @@ -69,10 +71,7 @@ if(CONFIG_USB_DEVICE_STACK) KEEP SORT NAME INPUT ".usb.descriptor*" ) - zephyr_linker_section(NAME usb_data GROUP DATA_REGION NOINPUT ${XIP_ALIGN_WITH_INPUT} SUBALIGN 1) - zephyr_linker_section_configure(SECTION usb_data - KEEP SORT NAME INPUT ".usb.data*" - ) + zephyr_iterable_section(NAME usb_cfg_data GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) endif() if(CONFIG_USB_DEVICE_BOS) @@ -85,6 +84,12 @@ endif() if(CONFIG_RTIO) zephyr_iterable_section(NAME rtio GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) zephyr_iterable_section(NAME rtio_iodev GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) + zephyr_iterable_section(NAME rtio_sqe_pool GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) + zephyr_iterable_section(NAME rtio_cqe_pool GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) +endif() + +if(CONFIG_SENSING) + zephyr_iterable_section(NAME sensing_sensor GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) endif() #if(CONFIG_USERSPACE) @@ -119,7 +124,6 @@ if(CONFIG_PCIE) endif() if(CONFIG_USB_DEVICE_STACK OR CONFIG_USB_DEVICE_STACK_NEXT) - zephyr_iterable_section(NAME usb_cfg_data GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) zephyr_iterable_section(NAME usbd_context GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) zephyr_iterable_section(NAME usbd_class_fs GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) zephyr_iterable_section(NAME usbd_class_hs GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN ${CONFIG_LINKER_ITERABLE_SUBALIGN}) diff --git a/cmake/modules/FindHostTools.cmake b/cmake/modules/FindHostTools.cmake index 1dfce4d3d4a1208..a1ea6631bf5adf5 100644 --- a/cmake/modules/FindHostTools.cmake +++ b/cmake/modules/FindHostTools.cmake @@ -65,6 +65,12 @@ find_program(BOSSAC bossac) # in the mcuboot repository if that's present in some cases) find_program(IMGTOOL imgtool) +# winpty is an optional dependency +find_program(PTY_INTERFACE winpty) +if("${PTY_INTERFACE}" STREQUAL "PTY_INTERFACE-NOTFOUND") + set(PTY_INTERFACE "") +endif() + # Default to the host system's toolchain if we are targeting a host based target if((${BOARD_DIR} MATCHES "boards\/native") OR ("${ARCH}" STREQUAL "posix") OR ("${BOARD}" STREQUAL "unit_testing")) diff --git a/cmake/modules/extensions.cmake b/cmake/modules/extensions.cmake index b91566024ef6534..411398b0ae8dbc1 100644 --- a/cmake/modules/extensions.cmake +++ b/cmake/modules/extensions.cmake @@ -3251,8 +3251,9 @@ function(zephyr_get variable) set(sysbuild_global_${var}) endif() - if(TARGET snippets_scope) - get_property(snippets_${var} TARGET snippets_scope PROPERTY ${var}) + zephyr_scope_exists(scope_defined snippets) + if(scope_defined) + zephyr_get_scoped(snippets_${var} snippets ${var}) endif() endforeach() @@ -3317,11 +3318,54 @@ endfunction(zephyr_get variable) # : Name of new scope. # function(zephyr_create_scope scope) - if(TARGET ${scope}_scope) + zephyr_scope_exists(scope_defined ${scope}) + if(scope_defined) message(FATAL_ERROR "zephyr_create_scope(${scope}) already exists.") endif() - add_custom_target(${scope}_scope) + set_property(GLOBAL PROPERTY scope:${scope} TRUE) +endfunction() + +# Usage: +# zephyr_scope_exists( ) +# +# Check if exists. +# +# : Variable to set with result. +# TRUE if scope exists, FALSE otherwise. +# : Name of scope. +# +function(zephyr_scope_exists result scope) + get_property(scope_defined GLOBAL PROPERTY scope:${scope}) + if(scope_defined) + set(${result} TRUE PARENT_SCOPE) + else() + set(${result} FALSE PARENT_SCOPE) + endif() +endfunction() + +# Usage: +# zephyr_get_scoped( ) +# +# Get the current value of in a specific , as defined by a +# previous zephyr_set() call. The value will be stored in the var. +# +# : Variable to store the value in +# : Scope for the variable look up +# : Name to look up in the specific scope +# +function(zephyr_get_scoped output scope var) + zephyr_scope_exists(scope_defined ${scope}) + if(NOT scope_defined) + message(FATAL_ERROR "zephyr_get_scoped(): scope ${scope} doesn't exists.") + endif() + + get_property(value GLOBAL PROPERTY ${scope}_scope:${var}) + if(DEFINED value) + set(${output} "${value}" PARENT_SCOPE) + else() + unset(${output} PARENT_SCOPE) + endif() endfunction() # Usage: @@ -3342,7 +3386,8 @@ function(zephyr_set variable) zephyr_check_arguments_required_all(zephyr_set SET_VAR SCOPE) - if(NOT TARGET ${SET_VAR_SCOPE}_scope) + zephyr_scope_exists(scope_defined ${SET_VAR_SCOPE}) + if(NOT scope_defined) message(FATAL_ERROR "zephyr_set(... SCOPE ${SET_VAR_SCOPE}) doesn't exists.") endif() @@ -3350,8 +3395,8 @@ function(zephyr_set variable) set(property_args APPEND) endif() - set_property(TARGET ${SET_VAR_SCOPE}_scope ${property_args} - PROPERTY ${variable} ${SET_VAR_UNPARSED_ARGUMENTS} + set_property(GLOBAL ${property_args} PROPERTY + ${SET_VAR_SCOPE}_scope:${variable} ${SET_VAR_UNPARSED_ARGUMENTS} ) endfunction() @@ -4633,7 +4678,7 @@ function(zephyr_linker) endfunction() # Usage: -# zephyr_linker_memory(NAME START
SIZE FLAGS ) +# zephyr_linker_memory(NAME START
SIZE [FLAGS ]) # # Zephyr linker memory. # This function specifies a memory region for the platform in use. @@ -4650,14 +4695,18 @@ endfunction() # All the following are valid values: # 1048576, 0x10000, 1024k, 1024K, 1m, and 1M. # FLAGS : Flags describing properties of the memory region. -# Currently supported: # r: Read-only region # w: Read-write region # x: Executable region -# The flags r and x, or w and x may be combined like: rx, wx. +# a: Allocatable region +# i: Initialized region +# l: Same as ‘i’ +# !: Invert the sense of any of the attributes that follow +# The flags may be combined like: rx, rx!w. function(zephyr_linker_memory) - set(single_args "FLAGS;NAME;SIZE;START") - cmake_parse_arguments(MEMORY "" "${single_args}" "" ${ARGN}) + set(req_single_args "NAME;SIZE;START") + set(single_args "FLAGS") + cmake_parse_arguments(MEMORY "" "${req_single_args};${single_args}" "" ${ARGN}) if(MEMORY_UNPARSED_ARGUMENTS) message(FATAL_ERROR "zephyr_linker_memory(${ARGV0} ...) given unknown " @@ -4665,7 +4714,7 @@ function(zephyr_linker_memory) ) endif() - foreach(arg ${single_args}) + foreach(arg ${req_single_args}) if(NOT DEFINED MEMORY_${arg}) message(FATAL_ERROR "zephyr_linker_memory(${ARGV0} ...) missing required " "argument: ${arg}" @@ -4674,6 +4723,7 @@ function(zephyr_linker_memory) endforeach() set(MEMORY) + zephyr_linker_arg_val_list(MEMORY "${req_single_args}") zephyr_linker_arg_val_list(MEMORY "${single_args}") string(REPLACE ";" "\;" MEMORY "${MEMORY}") @@ -4683,7 +4733,7 @@ function(zephyr_linker_memory) endfunction() # Usage: -# zephyr_linker_memory_ifdef( NAME START
SIZE FLAGS ) +# zephyr_linker_memory_ifdef( NAME START
SIZE [FLAGS ]) # # Will create memory region if is enabled. # @@ -4746,9 +4796,9 @@ function(zephyr_linker_dts_section) endfunction() # Usage: -# zephyr_linker_dts_memory(PATH FLAGS ) -# zephyr_linker_dts_memory(NODELABEL FLAGS ) -# zephyr_linker_dts_memory(CHOSEN FLAGS ) +# zephyr_linker_dts_memory(PATH ) +# zephyr_linker_dts_memory(NODELABEL ) +# zephyr_linker_dts_memory(CHOSEN ) # # Zephyr linker devicetree memory. # This function specifies a memory region for the platform in use based on its @@ -4763,15 +4813,9 @@ endfunction() # NODELABEL