Verilog HDL Implementation of Simple Image Processing

Job

Implement basic image processing operations on the input grayscale image using given value and thresold.

Constraints

 1. Clock Frequency = 100 GHz
 2. Value = 60 (decimal)
 3. Thresold  = 160 (decimal)

Design Prototype

Working

• Convert the Image to binary using Python or Matlab.

• Load entire image into a memory (array of 8 bit registers) of suitable size in the testbench and then supply 8bits (i.e. each pixel value) to the design module at every positive edge of clock.

• Perform following tasks depending on the state of the ‘select’ signal.

   State of ‘select’ signal                   Operation
   
          2’b00                      Increase brightness by ‘Value’
          2’b01                      Decrease brightness by ‘Value’
          2’b10                      Binarize the image using ‘Threshold’
          2’b11                      Invert the image
  

• Store each Byte of the output in another memory and finally write its content to a .txt file using $writememh function.

Results

• Original Image:
  

• Increased Brightness:
  

• Decreased Brightness:
  

• Binarized Image:
  

• Inverted Image: