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Dynamic allocation of mmu translation tables #7192

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4 changes: 1 addition & 3 deletions core/arch/arm/include/mm/core_mmu_arch.h
Original file line number Diff line number Diff line change
Expand Up @@ -76,9 +76,7 @@
* that these magic numbers are correct.
*/
#define CORE_MMU_BASE_TABLE_OFFSET \
(CFG_TEE_CORE_NB_CORE * \
BIT(CFG_LPAE_ADDR_SPACE_BITS - CORE_MMU_BASE_TABLE_SHIFT) * \
U(8))
(BIT(CFG_LPAE_ADDR_SPACE_BITS - CORE_MMU_BASE_TABLE_SHIFT) * U(8))
#endif

#ifndef __ASSEMBLER__
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11 changes: 11 additions & 0 deletions core/arch/arm/kernel/boot.c
Original file line number Diff line number Diff line change
Expand Up @@ -895,6 +895,16 @@ void init_tee_runtime(void)
thread_update_canaries();
}

static bool add_padding_to_pool(vaddr_t va, size_t len, void *ptr __unused)
{
#ifdef CFG_NS_VIRTUALIZATION
nex_malloc_add_pool((void *)va, len);
#else
malloc_add_pool((void *)va, len);
#endif
return true;
}

static void init_primary(unsigned long pageable_part, unsigned long nsec_entry)
{
vaddr_t va = 0;
Expand Down Expand Up @@ -937,6 +947,7 @@ static void init_primary(unsigned long pageable_part, unsigned long nsec_entry)

core_mmu_save_mem_map();
core_mmu_init_phys_mem();
boot_mem_foreach_padding(add_padding_to_pool, NULL);
va = boot_mem_release_unused();
if (!IS_ENABLED(CFG_WITH_PAGER)) {
/*
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