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docs: add docs/library/cn0363/* specific IPs #1550
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Adds documentation for the CN0363 specific IPs: - CN0363 DMA Sequencer; - CN0363 Phase Data Sync. Signed-off-by: Carlos Souza <[email protected]>
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Quick review done using the GitHub GUI
fixes some cosmetic changes Signed-off-by: Carlos Souza <[email protected]>
Signed-off-by: Jorge Marques <[email protected]>
Remove trailing whitespace. Use local project ref. Fix leading backslash. Rename ip labels. Signed-off-by: Jorge Marques <[email protected]>
Mostly better PDF output. Signed-off-by: Jorge Marques <[email protected]>
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Additional review now using the proper tools...
Please do not commit trailing whitespace.
I sent patches privately to help applying the requested changes.
@@ -0,0 +1,97 @@ | |||
.. _cn0363_phase_data_sync: |
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When you have plain pages, without additional resources, you can include in the parent simply as
index.rst
cn0363_dma_sequencer.rst
cn0363_phase_data_sync.rst
Remember, the documentation is highly hierarchical, so docs/library/cn0363/cn0363_phase_data_sync/index.rst
ends up being redundant.
docs/library/cn0363/index.rst
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.. toctree:: | ||
:maxdepth: 2 | ||
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CN0363 DMA Sequencer <cn0363_dma_sequencer/index> | ||
CN0363 Phase Data Sync <cn0363_phase_data_sync/index> |
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With my suggestion, this could be simply:
.. toctree::
:maxdepth: 2
:glob:
*
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.. _cn0363_phase_data_sync: | |||
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CN0363 Phase Data Sync FPGA Peripheral |
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@@ -0,0 +1,104 @@ | |||
.. _cn0363_dma_sequencer: | |||
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CN0363 DMA Sequencer FPGA Peripheral |
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Just CN0363 DMA Sequencer
(change included in the review commit)
.. hdl-component-diagram:: | ||
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The CN0363 Sequencer FPGA Peripheral is part of the | ||
:dokuwiki:`CN0363 HDL project documentation <resources/eval/user-guides/eval-cn0363-pmdz/reference_hdl>` |
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this page already exists in our repo. (change included in the review commit)
I see however that the wiki page seems to be more complete, could you work on improving the imported one?
* - :git-hdl:`/library/cn0363/cn0363_phase_data_sync/cn0363_phase_data_sync.v` | ||
- Verilog source for the peripheral. | ||
* - :git-hdl:`/library/cn0363/cn0363_phase_data_sync/cn0363_phase_data_sync_ip.tcl` |
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leading backslash on git-hdl
(change included in the review commit)
More Information | ||
-------------------------------------------------------------------------------- | ||
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- :dokuwiki:`[Wiki] CN0363 HDL project documentation <resources/eval/user-guides/eval-cn0363-pmdz/reference_hdl>` |
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Link local doc (change included in the review commit)
More Information | ||
-------------------------------------------------------------------------------- | ||
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- :ref:`EVAL-CN0363-PMDZ HDL reference design <cn0363>` |
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Here you used the local ref
docs/library/cn0363/index.rst
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CN0363 library comprises two IPs: | ||
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- **CN0363 DMA Sequencer**; |
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;
is not used in lists.
docs/library/cn0363/index.rst
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Contents | ||
-------- | ||
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This is useless, better ref the Contents list above and leave the toctree hidden.
output.pdf |
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The page does not fully follow the template https://github.com/analogdevicesinc/hdl/blob/main/docs/library/template_ip/index.rst?plain=1 .
It is important to follow the template, one handy trick of the doc is to cycle the pages anchored on a particular section using Ctrl+Alt+Shift+Left/Right so we can "batch" check on particular section.
- TCL script to generate the Vivado IP-integrator project for the | ||
peripheral. | ||
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Signal and Interface Pins |
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Interface
- TCL script to generate the Vivado IP-integrator project for the | ||
peripheral. | ||
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Signal and Interface Pins |
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Interface
- Output | ||
- Reset signal for the processing pipeline | ||
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Theory of Operation |
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Detailed Description
is more used.
- The overflow signal is asserted if a new sample arrives before the | ||
previous one has been consumed. | ||
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Theory of Operation |
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Detailed Description
is more used.
is inserted into the processing pipeline after the reset belongs to the first | ||
channel. | ||
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More Information |
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References
discarded. This allows an application to select which data channels it wants to | ||
capture. | ||
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More Information |
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References
bit is set the channel is sent to the ``dma_wr`` interface, otherwise it is | ||
discarded. This allows an application to select which data channels it wants to | ||
capture. | ||
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Software Support section?
resets the channel swap detection logic and makes sure that the next sample that | ||
is inserted into the processing pipeline after the reset belongs to the first | ||
channel. | ||
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Software Support section?
Adds documentation for the CN0363 specific IPs:
PR Description
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