docs: Add ip_based dma_flock testbench #154
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Most merge conflicts are just the inclusion at the toctree in alphabetical order, by using glob, we can mitigate them. To not include the orphan templates, rename them to _index. Also remove dangling orphan empty project ad7616. Signed-off-by: Jorge Marques <[email protected]>
Signed-off-by: Jorge Marques <[email protected]>
| * Two DMAs, one with the role of writer (stream to memory-mapped) | ||
| and the other with the role of reader (memory-mapped to stream). | ||
| * Two AXI4Stream VIPs, to produce and consume the generated test pattern. | ||
| * One AXI VIP, to emulate a DDR memory between the DMAs. |
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The DDR memory is already inside the test harness.
| Configuration files | ||
| ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | ||
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| The following are the available configuration files along with their |
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Did you try to put the configuration lists into a table?
| The cfg1 is compatbile with test_program and cfg2_fsync and cfg3_fsync_autorun | ||
| are compatible with test_program_frame_delay. |
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Would it make more sense to have a list or table for each test program with the compatible configurations?
| - Generate synchronisation stimulus (if enabled). | ||
| - Wait the number of frames are generated. | ||
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| * Stops the watchdog |
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The testbench doesn't contain any watchdog
| * Do single tests on variant number of frames, distance and clock frequencies: | ||
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| - Remove backpressure at AXIS destination and DDR. | ||
| - Obtain randomized DMA sequencers. |
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Obtain randomized DMA sequences.
I'm guessing that you meant a DMA sequence here, since a sequencer processes sequences; in our case it creates them
| - Obtain randomized DMA sequencers. | ||
| - Enable sequencer test data generation. | ||
| - Configure control and flags of the DMA. | ||
| - Submit the DMA sequencers. |
| depending on the clock ratios between the writer and reader. | ||
| Then asserts if all bytes in the frame are equal to the first byte. | ||
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| The test bench may end before the last frame is fully transferred at the |
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Please add an Info directive to it, as it is something that should be highlighted.
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| Testbenches related dependencies | ||
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | ||
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Please add the HDL related dependencies as well.
IstvanZsSzekely
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PR Description
Merge after #153
PR Type
PR Checklist