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Implement pulse parameters and re-populate enums after a parameter is marked as existing #26

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2 changes: 2 additions & 0 deletions .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -22,3 +22,5 @@ libEb*
libG*
lib*gcc*
libp*

.clangd
184 changes: 180 additions & 4 deletions PICamApp/Db/PICam.template
Original file line number Diff line number Diff line change
Expand Up @@ -2163,8 +2163,156 @@ record(bi, "$(P)$(R)BracketGating_RBV")
}

#TODO Add CustomModulationSequence
#TODO Add DifEndingGate
#TODO Add DifStartingGate

record(ai, "$(P)$(R)RepetitiveGateDelay_RBV") {
field(DTYP, "asynFloat64")
field(INP, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_REPETITIVE_GATE_DELAY")
field(PREC, "3")
field(EGU, "ns")
field(SCAN, "I/O Intr")
}

record(ao, "$(P)$(R)RepetitiveGateDelay") {
field(DTYP, "asynFloat64")
field(OUT, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_REPETITIVE_GATE_DELAY")
field(PREC, "3")
field(EGU, "ns")
}

record(ai, "$(P)$(R)RepetitiveGateWidth_RBV") {
field(DTYP, "asynFloat64")
field(INP, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_REPETITIVE_GATE_WIDTH")
field(PREC, "3")
field(EGU, "ns")
field(SCAN, "I/O Intr")
}

record(ao, "$(P)$(R)RepetitiveGateWidth") {
field(DTYP, "asynFloat64")
field(OUT, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_REPETITIVE_GATE_WIDTH")
field(PREC, "3")
field(EGU, "ns")
}

record(ai, "$(P)$(R)SeqStartGateDelay_RBV") {
field(DTYP, "asynFloat64")
field(INP, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_SEQUENTIAL_STARTING_GATE_DELAY")
field(PREC, "3")
field(EGU, "ns")
field(SCAN, "I/O Intr")
}

record(ao, "$(P)$(R)SeqStartGateDelay") {
field(DTYP, "asynFloat64")
field(OUT, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_SEQUENTIAL_STARTING_GATE_DELAY")
field(PREC, "3")
field(EGU, "ns")
}

record(ai, "$(P)$(R)SeqStartGateWidth_RBV") {
field(DTYP, "asynFloat64")
field(INP, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_SEQUENTIAL_STARTING_GATE_WIDTH")
field(PREC, "3")
field(EGU, "ns")
field(SCAN, "I/O Intr")
}

record(ao, "$(P)$(R)SeqStartGateWidth") {
field(DTYP, "asynFloat64")
field(OUT, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_SEQUENTIAL_STARTING_GATE_WIDTH")
field(PREC, "3")
field(EGU, "ns")
}

record(ai, "$(P)$(R)SeqEndGateDelay_RBV") {
field(DTYP, "asynFloat64")
field(INP, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_SEQUENTIAL_ENDING_GATE_DELAY")
field(PREC, "3")
field(EGU, "ns")
field(SCAN, "I/O Intr")
}

record(ao, "$(P)$(R)SeqEndGateDelay") {
field(DTYP, "asynFloat64")
field(OUT, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_SEQUENTIAL_ENDING_GATE_DELAY")
field(PREC, "3")
field(EGU, "ns")
}

record(ai, "$(P)$(R)SeqEndGateWidth_RBV") {
field(DTYP, "asynFloat64")
field(INP, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_SEQUENTIAL_ENDING_GATE_WIDTH")
field(PREC, "3")
field(EGU, "ns")
field(SCAN, "I/O Intr")
}

record(ao, "$(P)$(R)SeqEndGateWidth") {
field(DTYP, "asynFloat64")
field(OUT, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_SEQUENTIAL_ENDING_GATE_WIDTH")
field(PREC, "3")
field(EGU, "ns")
}

record(ai, "$(P)$(R)DifStartGateDelay_RBV") {
field(DTYP, "asynFloat64")
field(INP, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_DIF_STARTING_GATE_DELAY")
field(PREC, "3")
field(EGU, "ns")
field(SCAN, "I/O Intr")
}

record(ao, "$(P)$(R)DifStartGateDelay") {
field(DTYP, "asynFloat64")
field(OUT, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_DIF_STARTING_GATE_DELAY")
field(PREC, "3")
field(EGU, "ns")
}

record(ai, "$(P)$(R)DifStartGateWidth_RBV") {
field(DTYP, "asynFloat64")
field(INP, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_DIF_STARTING_GATE_WIDTH")
field(PREC, "3")
field(EGU, "ns")
field(SCAN, "I/O Intr")
}

record(ao, "$(P)$(R)DifStartGateWidth") {
field(DTYP, "asynFloat64")
field(OUT, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_DIF_STARTING_GATE_WIDTH")
field(PREC, "3")
field(EGU, "ns")
}

record(ai, "$(P)$(R)DifEndGateDelay_RBV") {
field(DTYP, "asynFloat64")
field(INP, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_DIF_ENDING_GATE_DELAY")
field(PREC, "3")
field(EGU, "ns")
field(SCAN, "I/O Intr")
}

record(ao, "$(P)$(R)DifEndGateDelay") {
field(DTYP, "asynFloat64")
field(OUT, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_DIF_ENDING_GATE_DELAY")
field(PREC, "3")
field(EGU, "ns")
}

record(ai, "$(P)$(R)DifEndGateWidth_RBV") {
field(DTYP, "asynFloat64")
field(INP, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_DIF_ENDING_GATE_WIDTH")
field(PREC, "3")
field(EGU, "ns")
field(SCAN, "I/O Intr")
}

record(ao, "$(P)$(R)DifEndGateWidth") {
field(DTYP, "asynFloat64")
field(OUT, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_DIF_ENDING_GATE_WIDTH")
field(PREC, "3")
field(EGU, "ns")
}

record(longout, "$(P)$(R)EMIccdGain")
{
Expand Down Expand Up @@ -2438,7 +2586,36 @@ record(mbbi, "$(P)$(R)CorrectPixelBias_RBV")
}

#################Hardware I/O
##### Need to add AuxOutput but need to figure out Pulse type
record(ai, "$(P)$(R)AuxOutputDelay_RBV") {
field(DTYP, "asynFloat64")
field(INP, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_AUX_OUTPUT_DELAY")
field(PREC, "3")
field(EGU, "ns")
field(SCAN, "I/O Intr")
}

record(ao, "$(P)$(R)AuxOutputDelay") {
field(DTYP, "asynFloat64")
field(OUT, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_AUX_OUTPUT_DELAY")
field(PREC, "3")
field(EGU, "ns")
}

record(ai, "$(P)$(R)AuxOutputWidth_RBV") {
field(DTYP, "asynFloat64")
field(INP, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_AUX_OUTPUT_WIDTH")
field(PREC, "3")
field(EGU, "ns")
field(SCAN, "I/O Intr")
}

record(ao, "$(P)$(R)AuxOutputWidth") {
field(DTYP, "asynFloat64")
field(OUT, "@asyn($(PORT),$(ADDR),$(TIMEOUT))PICAM_AUX_OUTPUT_WIDTH")
field(PREC, "3")
field(EGU, "ns")
}

record(bo, "$(P)$(R)EnableModulationOutputSignal")
{
field(PINI, "YES")
Expand Down Expand Up @@ -3496,4 +3673,3 @@ record(bi, "$(P)$(R)EnableROISizeYInput")
field(ZNAM, "Disable")
field(ONAM, "Enable")
}

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