Porting to v9.0.50 #215
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Porting to v9.0.50 #215
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This way one can run the tests for the target of interest more
easily:
# one-time setup
$ cd /bld/qemu
$ mkdir -p tests/tcg/arc{,64}
$ ln -s /src/qemu/tests/tcg/arc/Makefile tests/tcg/arc/Makefile
$ ln -s /src/qemu/tests/tcg/arc64/Makefile tests/tcg/arc64/Makefile
# testing
$ cd tests/tcg/arc && make check
$ cd tests/tcg/arc64 && make check
After adding the semihosting support to "arc-sim" board, it is not possible to use the "print" macro in tests anymore. In case the "-semihosting" argument is not passed to qemu, the "arc-sim" will use the memory region method (0x9000_0000) for IO operations.
This patch fixes issue in glibc testsuite.
Fixes delayslot instrucions in case where and itnerrupt happens on a non taken delayslot branch.
Use gensyscalls.sh to generate new syscalls table.
For ARCv3 interrupt vector contains virtual addresses.
Got following error on CentOS 7:
../linux-user/strace.c:1209:18: error: 'FALLOC_FL_KEEP_SIZE' undeclared here (not in a function)
1209 | FLAG_GENERIC(FALLOC_FL_KEEP_SIZE),
| ^~~~~~~~~~~~~~~~~~~
../linux-user/strace.c:48:30: note: in definition of macro 'FLAG_GENERIC'
48 | #define FLAG_GENERIC(name) { name, #name }
| ^~~~
../linux-user/strace.c:1210:18: error: 'FALLOC_FL_PUNCH_HOLE' undeclared here (not in a function)
1210 | FLAG_GENERIC(FALLOC_FL_PUNCH_HOLE),
| ^~~~~~~~~~~~~~~~~~~~
../linux-user/strace.c:48:30: note: in definition of macro 'FLAG_GENERIC'
48 | #define FLAG_GENERIC(name) { name, #name }
| ^~~~
ninja: build stopped: subcommand failed.
make[1]: *** [Makefile:152: run-ninja] Error 1
make[1]: Leaving directory '/SCRATCH/isaev/src/qemu/build'
make: *** [GNUmakefile:11: all] Error 2
Need to explicitly include <linux/falloc.h>.
Fixed stat buffer conversion from linux's stat struct and newlib's stat struct. Added comments. Signed-off-by: Luis Silva <[email protected]>
Modified the previous stat struct conversion to the use of pointers to avoid unnecessary memcopy routines. Signed-off-by: Luis Silva <[email protected]>
This allows applications to retrieve the underlying errno value when a semihosting function fails. Map system errno values back to the equivalent newlib value. Signed-off-by: Keith Packard <[email protected]>
Implemented validation for malloc function to detect NULL return values. When malloc returns NULL, the program exits and display a clear error message. Signed-off-by: Luis Silva <[email protected]>
The code has changed to support the delay slot in a way that the hardware does; through the status32.DE flag.
Signed-off-by: Jose Abreu <[email protected]> target: arc: semfunc-v2: DMB requires TLB update for CPU sync Signed-off-by: Jose Abreu <[email protected]>
Co-authored-by: Cupertino Miranda <[email protected]> Signed-off-by: Bruno Mauricio <[email protected]>
The instructions HALT/DMB/SWI/WEVT/WLFC/SLEEP should end a TB with DISAS_NORETURN instead of DISAS_NEXT. Signed-off-by: BrunoASMauricio <[email protected]>
Use tcg_gen_exit_tb(NULL, 0) instead of tcg_gen_goto_tb(). This way we don't chain the TBs and allow any possible interrupt to be served.
Without any hidden setRegister() macro that changes "ret" behind the scene.
Signed-off-by: Jose Abreu <[email protected]>
This reverts commit b46c4ec. That commit causes random stalls in QEMU when running linux. Eventually, QEMU will get out of the stalls after a minute or so without actually making the CPU spin. Mostly observed during "dhcp" activity and "poweroff". Chance of happening 25%. Mostly in arc64 target, but archs and arc32 are affected as well.
This commit removes the {get,set}{Memory,Register} macros, as well as a
couple of smaller ones, from semfunc-helper.h, and substitutes their
contents directly into semfunc-v{2,3}.c. This is done to increase code
transparency and to make arc_gen_*() function bodies more uniform.
Signed-off-by: Artemiy Volkov <[email protected]>
Replace the existing auto-generated arc_gen_*() functions for all variants of LD, ST, PUSH, and POP instructions by hand-written ones. The new routines allocate fewer temporary registers and perform fewer operations. These changes have been validated by running the check-tcg and dcc.dg/dg.exp tests, as well as booting Linux for archs and hs5x CPUs. Signed-off-by: Artemiy Volkov <[email protected]>
Similarly to the v2 patch, this one replaces the arc_gen_*() functions by hand-written code. The single and double versions of the instructions are based on semfunc-v2.c; in addition to those, the v3-specific long versions are also implemented. These changes have been validated by running check-tcg and gcc.dg/dg.exp tests for the arcv3 architecture, as well as booting Linux for the hs6x CPU. Signed-off-by: Artemiy Volkov <[email protected]>
Since the 128-bit memory instructions do not exist in the arcv2 architecture, delete the corresponding test files and Makefile lines. Signed-off-by: Artemiy Volkov <[email protected]>
For arc64, the Makefile lines adding 128-bit load/store tests to the list of tests to run were commented out. Since there seems to be no reason for this, restore these lines to increase test coverage. Signed-off-by: Artemiy Volkov <[email protected]>
This commit provides support for the translation of push/pop double instructions (a.k.a. pushdl_s and popdl_s) by decomposing them into two 8-byte writes and adjusting the stack pointer as necessary. Changes to the decoder, while unnecessary, are made to reflect those to the opcodes directory in the binutils-gdb repository. Signed-off-by: Artemiy Volkov <[email protected]>
This commit adds several tests for push/pop double long instructions. They come in two varieties: - Standalone tests (check_pushdl.S, check_popdl.S) that verify a couple of corner cases in decoding/translation; - MMU tests (check_mmuv48_07.S) that check whether memory exceptions involving those instructions are generated correctly. All of these tests have been verified with nSIM by uncommenting the final brk instruction. The last test in check_mmuv48_07.S does not pass on QEMU due to misaligned access checks having lower priority than page validity ones, suggesting a fix in the exception handling code. Signed-off-by: Artemiy Volkov <[email protected]>
Currently it is not possible to disable only certain instructions in the decoder. As there might be decoding collisions between FPUv2 module and DSP, it has been decided that DSP instructions are to be removed. Signed-off-by: Bruno Mauricio <[email protected]>
Decoder: Renamed FPUv2 instruction mnemonics There are instructions for FPU that have the same mnemonic and base functionality in ARCv2 and ARCv3 but differ in operand amount (i.e. FDMADD) This requires internal renaming of mnemonics as the semantic function mapping is shared between all versions. Structure: Separated base FPU from ARCv3 FPU FPU for ARCv2 shares some functionality with ARCv3, so it makes sense to create a shared fpu.c/h for that. TCG: Added semantic function support for ARCv2 FPU instructions Signed-off-by: Bruno Mauricio <[email protected]>
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This pull request is the result of an effort to port qemu-arc to the latest version of mainline qemu.
The code has been updated to match the updated internal APIs of qemu.
There is a known issue that I haven't been able to solve.
When creating the ARCCPU class, in
arc_cpu_class_init(defined in filetarget/arc/cpu:419), the properties defined attarget/arc/cpu.c:47are not initialized correctly.This makes the assertion at
target/arc/mmu.c:722fail, and qemu crashes.Debugging qemu-arc with GDB, it appears that the problem comes from the fact that the structure holding all the configurations of the CPU is never initialized with the values coming from the
arc_cpu_properties_list.