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[hw,sram_ctrl,rtl] Add flop stage on RAM output #4714

[hw,sram_ctrl,rtl] Add flop stage on RAM output

[hw,sram_ctrl,rtl] Add flop stage on RAM output #4714

Triggered via pull request January 21, 2025 11:19
Status Cancelled
Total duration 1h 23m 47s
Artifacts 6

ci.yml

on: pull_request
Earl Grey for CW310 Hyperdebug  /  Build bitstream
1h 6m
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW310  /  Build bitstream
1h 7m
Earl Grey for CW310 / Build bitstream
Earl Grey for CW340  /  Build bitstream
1h 18m
Earl Grey for CW340 / Build bitstream
Lint (slow)
12m 2s
Lint (slow)
Build documentation
4m 51s
Build documentation
Airgapped build
8m 0s
Airgapped build
Verible lint
1m 18s
Verible lint
Run OTBN smoke Test
1m 39s
Run OTBN smoke Test
Run OTBN crypto tests
18m 37s
Run OTBN crypto tests
Verilated English Breakfast
7m 51s
Verilated English Breakfast
Verilated Earl Grey
1h 12m
Verilated Earl Grey
CW305's Bitstream
26m 6s
CW305's Bitstream
Build Docker Containers
2m 31s
Build Docker Containers
Build and test software
15m 44s
Build and test software
CW310 ROM_EXT Tests  /  FPGA test
12m 23s
CW310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
8m 45s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
8m 45s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
12m 23s
CW310 Manufacturing Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
0s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
0s
CW310 ROM Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
CW340 Manufacturing Tests / FPGA test
CW340 ROM Tests  /  FPGA test
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
CW340 SiVal Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
CW340 Test ROM Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
0s
Verify FPGA jobs
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Annotations

21 errors
Run OTBN smoke Test
Process completed with exit code 1.
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Some target names have banned characters.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.
CW310 ROM Tests / FPGA test
Canceling since a higher priority waiting request for 'CI-refs/pull/25952/merge' exists
CW310 Test ROM Tests / FPGA test
Canceling since a higher priority waiting request for 'CI-refs/pull/25952/merge' exists
CW310 SiVal Tests / FPGA test
Canceling since a higher priority waiting request for 'CI-refs/pull/25952/merge' exists
CW310 SiVal Tests / FPGA test
The operation was canceled.
CW310 SiVal ROM_EXT Tests / FPGA test
Canceling since a higher priority waiting request for 'CI-refs/pull/25952/merge' exists
CW310 SiVal ROM_EXT Tests / FPGA test
The operation was canceled.
CW310 Manufacturing Tests / FPGA test
Canceling since a higher priority waiting request for 'CI-refs/pull/25952/merge' exists
CW310 Manufacturing Tests / FPGA test
The operation was canceled.
CW310 ROM_EXT Tests / FPGA test
Canceling since a higher priority waiting request for 'CI-refs/pull/25952/merge' exists
CW310 ROM_EXT Tests / FPGA test
The operation was canceled.
Earl Grey for CW340 / Build bitstream
Canceling since a higher priority waiting request for 'CI-refs/pull/25952/merge' exists
Earl Grey for CW340 / Build bitstream
The operation was canceled.

Artifacts

Produced during runtime
Name Size
chip_englishbreakfast_cw305
1.39 MB
partial-build-bin-chip_earlgrey_cw310
6.03 MB
partial-build-bin-chip_earlgrey_cw310_hyperdebug
6 MB
sw_build_test-test-results
72.2 KB
verilated_englishbreakfast
7.02 MB
verilator_earlgrey-test-results
9.06 KB