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[membkdr] Add RAM tiling to membkdr utility #4715

[membkdr] Add RAM tiling to membkdr utility

[membkdr] Add RAM tiling to membkdr utility #4715

Triggered via pull request January 21, 2025 11:20
Status Cancelled
Total duration 1h 40m 7s
Artifacts 8

ci.yml

on: pull_request
Earl Grey for CW310 Hyperdebug  /  Build bitstream
2m 24s
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
29m 32s
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310  /  Build bitstream
2m 29s
Earl Grey for CW310 / Build bitstream
Lint (slow)
11m 56s
Lint (slow)
Build documentation
4m 35s
Build documentation
Airgapped build
8m 48s
Airgapped build
Verible lint
1m 8s
Verible lint
Run OTBN smoke Test
2m 49s
Run OTBN smoke Test
Run OTBN crypto tests
16m 23s
Run OTBN crypto tests
Verilated English Breakfast
7m 53s
Verilated English Breakfast
Verilated Earl Grey
17m 30s
Verilated Earl Grey
CW305's Bitstream
25m 11s
CW305's Bitstream
Build Docker Containers
2m 39s
Build Docker Containers
Build and test software
15m 19s
Build and test software
CW310 ROM_EXT Tests  /  FPGA test
14s
CW310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
0s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
0s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
0s
CW310 Manufacturing Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
CW340 Manufacturing Tests / FPGA test
CW340 ROM Tests  /  FPGA test
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
CW340 SiVal Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
CW340 Test ROM Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
3m 11s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
30m 10s
CW310 ROM Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
0s
Verify FPGA jobs
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Annotations

17 errors
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Some target names have banned characters.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.
CW310 SiVal ROM_EXT Tests / FPGA test
Canceling since a higher priority waiting request for 'CI-refs/pull/25877/merge' exists
CW310 SiVal Tests / FPGA test
Canceling since a higher priority waiting request for 'CI-refs/pull/25877/merge' exists
CW310 Manufacturing Tests / FPGA test
Canceling since a higher priority waiting request for 'CI-refs/pull/25877/merge' exists
CW310 ROM_EXT Tests / FPGA test
Canceling since a higher priority waiting request for 'CI-refs/pull/25877/merge' exists
CW310 ROM_EXT Tests / FPGA test
A task was canceled.
CW310 ROM Tests / FPGA test
Canceling since a higher priority waiting request for 'CI-refs/pull/25877/merge' exists
CW310 ROM Tests / FPGA test
The operation was canceled.
Earl Grey for CW340 / Build bitstream
Canceling since a higher priority waiting request for 'CI-refs/pull/25877/merge' exists
Earl Grey for CW340 / Build bitstream
The operation was canceled.

Artifacts

Produced during runtime
Name Size
chip_englishbreakfast_cw305
1.39 MB
execute_test_rom_fpga_tests_cw310-targets
326 Bytes
execute_test_rom_fpga_tests_cw310-test-results
3.22 KB
partial-build-bin-chip_earlgrey_cw310
5.96 MB
partial-build-bin-chip_earlgrey_cw310_hyperdebug
6.02 MB
sw_build_test-test-results
72.6 KB
verilated_englishbreakfast
7.02 MB
verilator_earlgrey-test-results
8.98 KB