update firmware files

firmware/Makefile

@@ -31,10 +31,6 @@ ifeq (${CROSS_COMPILE},)
 $(error CROSS_COMPILE is undefined)
 endif
 
-ifeq (${FREE_RAM_SIZE},)
-$(error FREE_RAM_SIZE is undefined)
-endif
-
 ################################################################################
 # Default values for build configurations, and their dependencies
 ################################################################################
@@ -169,12 +165,6 @@ else
 $(eval $(call add_define_val,TOC_HEADER_NAME,0xAA640001))
 endif
 
-ifeq (${FREE_RAM_SIZE},64MB)
-$(eval $(call add_define_val,CVI_BUILDROOT_64MB,1))
-else
-$(eval $(call add_define_val,CVI_BUILDROOT_ION,1))
-endif
-
 ifeq (${RTOS_ENABLE_FREERTOS},y)
 $(eval $(call add_define,RTOS_ENABLE_FREERTOS))
 $(eval $(call add_define_val,RTOS_DUMP_PRINT_SZ_IDX,${RTOS_DUMP_PRINT_SZ_IDX}))

firmware/README.rst

@@ -1,10 +1,5 @@
-============
-Milk-V Duo Firmware First Stage Bootloader
-============
+FSBL
+====
 
-This package is obtained from https://github.com/milkv-duo/duo-buildroot-sdk, from which we download the first stage bootloader source and compile it, generating the atf ``bl2.bin``. At the mean time, we will use the ``fiptool.py`` in this package to create the binary file ``fip.bin`` to pack the opensbi, u-boot and so on.
-
-If you are using Buildroot to generate the whole SD card image or the ``fip.bin``, you must say Y to this package!
-
-
-https://github.com/gtxzsxxk/milkv-duo-firmware-fsbl
+FSBL is First Stage Boot Loader.
+Act as ATF BL2.

firmware/lib/cpu/riscv/bl2_entrypoint.S

@@ -2,10 +2,6 @@
 #include "csr.h"
 #include <riscv/asm_macros.S>
 
-#define mxstatus 0x7c0
-#define mhcr 0x7c1
-#define mcor 0x7c2
-
   .option norvc
   .section .text.init,"ax",@progbits
   .globl bl2_entrypoint

firmware/lib/cpu/riscv/cpu.mk

@@ -4,23 +4,24 @@ ASFLAGS +=\
 	$(CPPFLAGS) \
 	-DRISCV \
 	-D__ASSEMBLY__ \
-	-march=rv64imafdc -mstrict-align \
+	-march=rv64imafdcvxthead -mstrict-align \
 	-mcmodel=medany \
 	-mabi=lp64d \
-	-ffreestanding
+	-ffreestanding  \
+	-Wa,--fatal-warnings
 
 TF_CFLAGS += \
 	$(CPPFLAGS) \
 	-DRISCV \
-	-march=rv64imafdc \
+	-march=rv64imafdcvxthead \
 	-mcmodel=medany \
 	-mabi=lp64d \
 	-ffreestanding -fno-builtin -Wall -std=gnu99 \
 	-Os -ffunction-sections -fdata-sections \
 	-fno-delete-null-pointer-checks
 
 TF_LDFLAGS += \
-	 -Os \
+	--fatal-warnings -Os \
 	--gc-sections \
 	${TF_LDFLAGS_aarch64}
 

firmware/plat/cv180x/bl2/bl2_main.c

@@ -46,8 +46,34 @@ int dec_verify_image(const void *image, size_t size, size_t dec_skip, struct fip
 }
 #endif
 
+// Start of addition
+#define UART_DLL 0x04140000
+#define UART_DLH 0x04140004
+#define UART_LCR 0x0414000C
+
+void set_baudrate()
+{
+	// 14 for 115200, 13 for 128000
+	int baud_divisor = 14;
+
+	// set DLAB to 1 to set dll and dlh
+	*(volatile uint32_t*)(UART_LCR) |= (uint32_t)0x80;
+
+	// set divisor
+	*(volatile uint32_t*)(UART_DLL) = (uint32_t)(baud_divisor & 0xff);
+	*(volatile uint32_t*)(UART_DLH) = (uint32_t)((baud_divisor >> 8) & 0xff);
+
+	// set DLAB back to 0
+	*(volatile uint32_t*)(UART_LCR) &= (uint32_t)(~0x80);
+}
+// End of addition
+
 void bl2_main(void)
 {
+	// Start of addition
+	set_baudrate();
+	// End of addition
+
 	ATF_STATE = ATF_STATE_BL2_MAIN;
 	time_records->fsbl_start = read_time_ms();