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Improve ECC parametrization
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Andrea Belano committed Dec 13, 2024
1 parent e024ebd commit c1f176f
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Showing 4 changed files with 128 additions and 73 deletions.
6 changes: 6 additions & 0 deletions packages/pulp_cluster_package.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -82,6 +82,10 @@ package pulp_cluster_package;
bit HMRPresent;
// Enable triple modular redundancy
bit HMRTmrEnabled;
// Enable ECC
bit EnableECC;
// Enable ECC on the hci interconnect
bit ECCInterco;
// Number if I$ banks
byte_t iCacheNumBanks;
// Number of I$ lines
Expand Down Expand Up @@ -196,6 +200,8 @@ package pulp_cluster_package;
HwpeNumPorts: 0,
HMRPresent: 0,
HMRTmrEnabled: 0,
EnableECC: 0,
ECCInterco: 0,
iCacheNumBanks: 2,
iCacheNumLines: 1,
iCacheNumWays: 4,
Expand Down
98 changes: 68 additions & 30 deletions rtl/cluster_interconnect_wrap.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -45,6 +45,7 @@ module cluster_interconnect_wrap
parameter CLUSTER_ALIAS_BASE = 12'h000,

parameter USE_HETEROGENEOUS_INTERCONNECT = 1,
parameter USE_ECC_INTERCONNECT = 0,
parameter hci_package::hci_size_parameter_t HCI_CORE_SIZE = '0,
parameter hci_package::hci_size_parameter_t HCI_HWPE_SIZE = '0,
parameter hci_package::hci_size_parameter_t HCI_MEM_SIZE = '0
Expand Down Expand Up @@ -75,37 +76,74 @@ module cluster_interconnect_wrap
// Wraps the Logarithmic Interconnect + a HWPE Interconnect
generate
if( USE_HETEROGENEOUS_INTERCONNECT || !HWPE_PRESENT ) begin : hci_gen
if (USE_ECC_INTERCONNECT) begin : gen_ecc_interco
hci_ecc_interconnect #(
.N_HWPE ( HWPE_PRESENT ),
.N_CORE ( NB_CORES ),
.N_DMA ( NB_DMAS ),
.N_EXT ( 4 ),
.N_MEM ( NB_TCDM_BANKS ),
.IW ( TCDM_ID_WIDTH ),
.TS_BIT ( TEST_SET_BIT ),
.`HCI_SIZE_PARAM(cores) ( HCI_CORE_SIZE ),
.`HCI_SIZE_PARAM(mems) ( HCI_MEM_SIZE ),
.`HCI_SIZE_PARAM(hwpe) ( HCI_HWPE_SIZE )
`ifndef SYNTHESIS
,
.WAIVE_RQ3_ASSERT ( 1'b1 ),
.WAIVE_RQ4_ASSERT ( 1'b1 ),
.WAIVE_RSP3_ASSERT ( 1'b1 ),
.WAIVE_RSP5_ASSERT ( 1'b1 )
`endif
) i_hci_interconnect (
.clk_i ( clk_i ),
.rst_ni ( rst_ni ),
.clear_i ( 1'b0 ),
.ctrl_i ( hci_ctrl_i ),
.periph_hci_ecc ( hci_ecc_periph_slave ),
.cores ( core_tcdm_slave ),
.hwpe ( hwpe_tcdm_slave [0] ),
.dma ( dma_slave ),
.ext ( ext_slave ),
.mems ( tcdm_sram_master )
);
end else begin : gen_standard_interco
hci_interconnect #(
.N_HWPE ( HWPE_PRESENT ),
.N_CORE ( NB_CORES ),
.N_DMA ( NB_DMAS ),
.N_EXT ( 4 ),
.N_MEM ( NB_TCDM_BANKS ),
.IW ( TCDM_ID_WIDTH ),
.TS_BIT ( TEST_SET_BIT ),
.`HCI_SIZE_PARAM(cores) ( HCI_CORE_SIZE ),
.`HCI_SIZE_PARAM(mems) ( HCI_MEM_SIZE ),
.`HCI_SIZE_PARAM(hwpe) ( HCI_HWPE_SIZE )
`ifndef SYNTHESIS
,
.WAIVE_RQ3_ASSERT ( 1'b1 ),
.WAIVE_RQ4_ASSERT ( 1'b1 ),
.WAIVE_RSP3_ASSERT ( 1'b1 ),
.WAIVE_RSP5_ASSERT ( 1'b1 )
`endif
) i_hci_interconnect (
.clk_i ( clk_i ),
.rst_ni ( rst_ni ),
.clear_i ( 1'b0 ),
.ctrl_i ( hci_ctrl_i ),
.cores ( core_tcdm_slave ),
.hwpe ( hwpe_tcdm_slave [0] ),
.dma ( dma_slave ),
.ext ( ext_slave ),
.mems ( tcdm_sram_master )
);

hci_ecc_interconnect #(
.N_HWPE ( HWPE_PRESENT ),
.N_CORE ( NB_CORES ),
.N_DMA ( NB_DMAS ),
.N_EXT ( 4 ),
.N_MEM ( NB_TCDM_BANKS ),
.IW ( TCDM_ID_WIDTH ),
.TS_BIT ( TEST_SET_BIT ),
.`HCI_SIZE_PARAM(cores) ( HCI_CORE_SIZE ),
.`HCI_SIZE_PARAM(mems) ( HCI_MEM_SIZE ),
.`HCI_SIZE_PARAM(hwpe) ( HCI_HWPE_SIZE )
`ifndef SYNTHESIS
,
.WAIVE_RQ3_ASSERT ( 1'b1 ),
.WAIVE_RQ4_ASSERT ( 1'b1 ),
.WAIVE_RSP3_ASSERT ( 1'b1 ),
.WAIVE_RSP5_ASSERT ( 1'b1 )
`endif
) i_hci_interconnect (
.clk_i ( clk_i ),
.rst_ni ( rst_ni ),
.clear_i ( 1'b0 ),
.ctrl_i ( hci_ctrl_i ),
.periph_hci_ecc ( hci_ecc_periph_slave ),
.cores ( core_tcdm_slave ),
.hwpe ( hwpe_tcdm_slave [0] ),
.dma ( dma_slave ),
.ext ( ext_slave ),
.mems ( tcdm_sram_master )
);
assign hci_ecc_periph_slave.gnt = '0;
assign hci_ecc_periph_slave.r_rdata = '0;
assign hci_ecc_periph_slave.r_opc = '0;
assign hci_ecc_periph_slave.r_id = '0;
assign hci_ecc_periph_slave.r_valid = '0;
end

end else begin : no_hci_gen

Expand Down
95 changes: 52 additions & 43 deletions rtl/pulp_cluster.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -669,30 +669,31 @@ per2axi_wrap #(
//***************************************************

cluster_interconnect_wrap #(
.NB_CORES ( Cfg.NumCores ),
.HWPE_PRESENT ( Cfg.HwpePresent ),
.NB_HWPE_PORTS ( Cfg.HwpeNumPorts ),
.NB_DMAS ( Cfg.DmaNumPlugs ),
.NB_MPERIPHS ( Cfg.NumMstPeriphs ),
.NB_TCDM_BANKS ( Cfg.TcdmNumBank ),
.NB_SPERIPHS ( Cfg.NumSlvPeriphs ),

.DATA_WIDTH ( DataWidth ),
.ADDR_WIDTH ( AddrWidth ),
.BE_WIDTH ( BeWidth ),
.ClusterBaseAddr ( Cfg.ClusterBaseAddr ),
.ClusterPeripheralsOffs ( Cfg.ClusterPeriphOffs ),
.ClusterExternalOffs ( Cfg.ClusterExternalOffs),

.TEST_SET_BIT ( TestSetBit ),
.ADDR_MEM_WIDTH ( AddrMemWidth ),

.PE_ROUTING_LSB ( PeRoutingLsb ),
.CLUSTER_ALIAS ( Cfg.ClusterAlias ),
.USE_HETEROGENEOUS_INTERCONNECT ( Cfg.UseHci ),
.HCI_CORE_SIZE ( HciCoreSizeParam ),
.HCI_HWPE_SIZE ( HciHwpeSizeParam ),
.HCI_MEM_SIZE ( HciMemSizeParam )
.NB_CORES ( Cfg.NumCores ),
.HWPE_PRESENT ( Cfg.HwpePresent ),
.NB_HWPE_PORTS ( Cfg.HwpeNumPorts ),
.NB_DMAS ( Cfg.DmaNumPlugs ),
.NB_MPERIPHS ( Cfg.NumMstPeriphs ),
.NB_TCDM_BANKS ( Cfg.TcdmNumBank ),
.NB_SPERIPHS ( Cfg.NumSlvPeriphs ),

.DATA_WIDTH ( DataWidth ),
.ADDR_WIDTH ( AddrWidth ),
.BE_WIDTH ( BeWidth ),
.ClusterBaseAddr ( Cfg.ClusterBaseAddr ),
.ClusterPeripheralsOffs ( Cfg.ClusterPeriphOffs ),
.ClusterExternalOffs ( Cfg.ClusterExternalOffs ),

.TEST_SET_BIT ( TestSetBit ),
.ADDR_MEM_WIDTH ( AddrMemWidth ),

.PE_ROUTING_LSB ( PeRoutingLsb ),
.CLUSTER_ALIAS ( Cfg.ClusterAlias ),
.USE_HETEROGENEOUS_INTERCONNECT ( Cfg.UseHci ),
.USE_ECC_INTERCONNECT ( Cfg.EnableECC && Cfg.ECCInterco ),
.HCI_CORE_SIZE ( HciCoreSizeParam ),
.HCI_HWPE_SIZE ( HciHwpeSizeParam ),
.HCI_MEM_SIZE ( HciMemSizeParam )

) cluster_interconnect_wrap_i (
.clk_i ( clk_i ),
Expand Down Expand Up @@ -1543,23 +1544,31 @@ logic [Cfg.TcdmNumBank-1:0] scrubber_fix;
logic [Cfg.TcdmNumBank-1:0] scrubber_uncorrectable;
logic [Cfg.TcdmNumBank-1:0] scrubber_trigger;

assign bank_faults = ecc_single_error | ecc_multiple_error; // TODO: check

ecc_manager #(
.NumBanks ( Cfg.TcdmNumBank ),
.ecc_mgr_req_t ( tcdm_scrubber_reg_req_t ),
.ecc_mgr_rsp_t ( tcdm_scrubber_reg_rsp_t )
) i_tcdm_scrubber (
.clk_i ( clk_i ),
.rst_ni ( rst_ni ),
.ecc_mgr_req_i ( tcdm_scrubber_reg_req ),
.ecc_mgr_rsp_o ( tcdm_scrubber_reg_rsp ),
.bank_faults_i ( bank_faults ),
.scrub_fix_i ( scrubber_fix ),
.scrub_uncorrectable_i( scrubber_uncorrectable ),
.scrub_trigger_o ( scrubber_trigger ),
.test_write_mask_no ( /* not used */ )
);
generate
if (Cfg.EnableECC) begin : gen_tcdm_scrubber
assign bank_faults = ecc_single_error | ecc_multiple_error; // TODO: check

ecc_manager #(
.NumBanks ( Cfg.TcdmNumBank ),
.ecc_mgr_req_t ( tcdm_scrubber_reg_req_t ),
.ecc_mgr_rsp_t ( tcdm_scrubber_reg_rsp_t )
) i_tcdm_scrubber (
.clk_i ( clk_i ),
.rst_ni ( rst_ni ),
.ecc_mgr_req_i ( tcdm_scrubber_reg_req ),
.ecc_mgr_rsp_o ( tcdm_scrubber_reg_rsp ),
.bank_faults_i ( bank_faults ),
.scrub_fix_i ( scrubber_fix ),
.scrub_uncorrectable_i( scrubber_uncorrectable ),
.scrub_trigger_o ( scrubber_trigger ),
.test_write_mask_no ( /* not used */ )
);
end else begin : gen_no_tcdm_scrubber
assign bank_faults = '0;
assign scrubber_trigger = '0;
assign tcdm_scrubber_reg_rsp = '0;
end
endgenerate

/* TCDM banks */
tcdm_banks_wrap #(
Expand All @@ -1569,8 +1578,8 @@ tcdm_banks_wrap #(
.AddrWidth ( AddrWidth ),
.BeWidth ( BeWidth ),
.IdWidth ( TCDM_ID_WIDTH ),
.EnableEcc ( 1 ),
.EccInterco ( 1 ),
.EnableEcc ( Cfg.EnableECC ),
.EccInterco ( Cfg.ECCInterco ),
.ProtectedWidth ( ProtectedTcdmWidth ),
.HCI_MEM_SIZE ( HciMemSizeParam )
) tcdm_banks_i (
Expand Down
2 changes: 2 additions & 0 deletions tb/pulp_cluster_tb.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -303,6 +303,8 @@ module pulp_cluster_tb;
HwpeNumPorts: 9,
HMRPresent: 1,
HMRTmrEnabled: 1,
EnableECC: 1,
ECCInterco: 1,
iCacheNumBanks: 2,
iCacheNumLines: 1,
iCacheNumWays: 4,
Expand Down

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