The SoCKit Development Kit presents a robust hardware design platform built around the Altera Cyclone V System-on-Chip (SoC) FPGA, which integrates an ARM-based hard processor system (HPS) consisting of processor, peripherals and memory interfaces tied seamlessly with a 110K Logic Elements FPGA fabric using a high-bandwidth interconnect backbone. The SoCKit development board includes hardware such as high-speed DDR3 memory, video and audio capabilities, Ethernet networking, and much more.
The folders contain the following information:
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Tutorials: Basic tutorials for learning how to use Quartus (Block diagram editor and Verilog code editor), Platform designer (Qsys), Intel SoC EDS (Embedded Development Suite).
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Projects: Contains different interesting projects
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Cores: Some cores I've made/ported
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Beta Projects: Work in progress projects
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Templates: Ready made templates for your projects
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Mister: Info about the Mister port
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Documents: Various useful documentation (schematics, images, ...)
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Others: Some other content
Contributing is needed to increase the amount of resources and projects available to the community. Any language can be used for documenting the projects.
Se necesita la colaboración para poder incrementar los recursos disponibles para la comunidad entorno esta placa de desarrollo. La documentación que acompañe los proyectos puede estar redactada en cualquier idioma.
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https://rocketboards.org/foswiki/Documentation/ArrowSoCKitEvaluationBoard Community support
Forums:
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MiSTer port:
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Main MiSTer port site https://github.com/MiSTer-Arrow-SoCKit/Main_MiSTer/wiki
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Mister SDRAM expansion http://modernhackers.com/128mb-sdram-board-on-de10-standard-de1-soc-and-arrow-sockit-fpga-sdram-riser/
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Info about the port http://modernhackers.com/porting-mister-to-arrow-sockit-fpga/
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Comparison of ported cores between platforms http://modernhackers.com/mister/
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ao486 core for https://github.com/MiSTer-Arrow-SoCKit/ao486_MiSTer