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Marvell Arm64 and armada 7020 #124

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117,374 changes: 117,374 additions & 0 deletions patch/0001-Marvell-support-for-armada7020-on-LK4.9.168.patch

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117,334 changes: 117,334 additions & 0 deletions patch/0001-Marvell-support-for-armada7020-on-LK4.9.189.patch

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Original file line number Diff line number Diff line change
@@ -0,0 +1,59 @@
From b5a750c95de583df71ab719ac9ae455bd6cfe7cc Mon Sep 17 00:00:00 2001
From: gilt <[email protected]>
Date: Mon, 26 Aug 2019 13:43:39 +0300
Subject: [PATCH 4/6] ARM64/PCI: Allow userspace to mmap PCI resources

Change-Id: I87ef6492e4956c77c75470ec010a4f11a9a8bdaf
---
arch/arm64/include/asm/pci.h | 4 ++++
arch/arm64/kernel/pci.c | 19 +++++++++++++++++++
2 files changed, 23 insertions(+)

diff --git a/arch/arm64/include/asm/pci.h b/arch/arm64/include/asm/pci.h
index b9a7ba9..8a18915 100644
--- a/arch/arm64/include/asm/pci.h
+++ b/arch/arm64/include/asm/pci.h
@@ -31,6 +31,10 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
return -ENODEV;
}

+#define HAVE_PCI_MMAP
+extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
+ enum pci_mmap_state mmap_state,
+ int write_combine);
static inline int pci_proc_domain(struct pci_bus *bus)
{
return 1;
diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c
index 1b3eb67..db6dd98 100644
--- a/arch/arm64/kernel/pci.c
+++ b/arch/arm64/kernel/pci.c
@@ -54,6 +54,25 @@ int pcibios_alloc_irq(struct pci_dev *dev)
return 0;
}

+int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
+ enum pci_mmap_state mmap_state, int write_combine)
+{
+ if (mmap_state == pci_mmap_io)
+ return -EINVAL;
+
+ /*
+ * Mark this as IO
+ */
+ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+
+ if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
+ vma->vm_end - vma->vm_start,
+ vma->vm_page_prot))
+ return -EAGAIN;
+
+ return 0;
+}
+
/*
* raw_pci_read/write - Platform-specific PCI config space access.
*/
--
1.8.3.1

169 changes: 169 additions & 0 deletions patch/0042-add-a7020-comexp-dts.patch
Original file line number Diff line number Diff line change
@@ -0,0 +1,169 @@
From 5858434dd9a7301bd90730087b527b684a64ec2a Mon Sep 17 00:00:00 2001
From: gilt <[email protected]>
Date: Mon, 26 Aug 2019 14:58:10 +0300
Subject: [PATCH 5/6] add a7020-comexp dts

Change-Id: If4d6e2b704aad1616ad91871282e678eabb400dd
---
arch/arm64/boot/dts/marvell/Makefile | 1 +
.../boot/dts/marvell/armada-7020-comexpress.dts | 136 +++++++++++++++++++++
2 files changed, 137 insertions(+)
create mode 100644 arch/arm64/boot/dts/marvell/armada-7020-comexpress.dts

diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile
index 55f86c8..da5c1db 100644
--- a/arch/arm64/boot/dts/marvell/Makefile
+++ b/arch/arm64/boot/dts/marvell/Makefile
@@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_BERLIN) += berlin4ct-stb.dtb
# Mvebu SoC Family
dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-db.dtb
dtb-$(CONFIG_ARCH_MVEBU) += armada-7020-amc.dtb
+dtb-$(CONFIG_ARCH_MVEBU) += armada-7020-comexpress.dtb
dtb-$(CONFIG_ARCH_MVEBU) += armada-7040-db.dtb
dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-db.dtb

diff --git a/arch/arm64/boot/dts/marvell/armada-7020-comexpress.dts b/arch/arm64/boot/dts/marvell/armada-7020-comexpress.dts
new file mode 100644
index 00000000..f077419
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-7020-comexpress.dts
@@ -0,0 +1,136 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 Marvell Technology Group Ltd.
+ *
+ * Device Tree file for Marvell Armada 7020 AMC board.
+ */
+
+#include "armada-7020.dtsi"
+
+/ {
+ model = "Marvell Armada-7020 COMEXPRESS board setup";
+ compatible = "marvell,armada7020-comexpress", "marvell,armada7020",
+ "marvell,armada-ap806";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x40000000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ aliases {
+ ethernet0 = &cp0_emac0;
+ ethernet1 = &cp0_emac2;
+ };
+
+};
+
+&i2c0 {
+ status = "okay";
+ clock-frequency = <100000>;
+};
+
+&spi0 {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&cpm_ethernet {
+ status = "okay";
+};
+
+&cp0_emac0 {
+ status = "okay";
+ phy-mode = "10gbase-kr";
+};
+
+&cp0_emac2 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+};
+
+&cp0_ppv22 {
+ status = "okay";
+ l4_chksum_jumbo_port = <0>;
+};
+
+&cp0_eth0 {
+ status = "okay";
+};
+
+&cp0_eth1 {
+ status = "okay";
+};
+
+&cpm_i2c0 {
+ status = "okay";
+ clock-frequency = <100000>;
+};
+
+&cpm_mdio {
+ status = "okay";
+
+ phy0: ethernet-phy@1 {
+ reg = <0x10>;
+ };
+};
+
+&cpm_nand {
+ status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ label = "main-storage";
+ nand-rb = <0>;
+ nand-ecc-mode = "hw";
+ nand-on-flash-bbt;
+ nand-ecc-strength = <8>;
+ nand-ecc-step-size = <512>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "U-Boot";
+ reg = <0 0x200000>;
+ };
+ partition@200000 {
+ label = "Linux";
+ reg = <0x200000 0xd00000>;
+ };
+ partition@1000000 {
+ label = "Filesystem";
+ reg = <0x1000000 0x3f000000>;
+ };
+ };
+ };
+};
+
+&cpm_pcie0 {
+ status = "okay";
+ num-lanes = <4>;
+ num-viewport = <8>;
+
+ ranges = <0x81000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x00010000
+ 0x82000000 0x0 0x00000000 0x8 0x00000000 0x2 0x00000000>;
+};
+
+&cpm_sata0 {
+ status = "okay";
+};
+
+&cpm_sdhci0 {
+ status = "okay";
+ bus-width = <4>;
+ no-1-8-v;
+ broken-cd;
+};
--
1.8.3.1

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