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topology: enable pcm rate setting from top level m4
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Enable setting pcm min and max rate from top level
m4 pipeline macro. This way it is possible to configure
the whole pipeline to correct samplerate range in
1 file. Previously you needed to modify the pipeline
macros where the rate was hardcoded.

Signed-off-by: Jaska Uimonen <[email protected]>
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Jaska Uimonen committed Oct 5, 2018
1 parent 2d7a933 commit 787d09e
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Showing 38 changed files with 242 additions and 169 deletions.
12 changes: 12 additions & 0 deletions topology/m4/pipeline.m4
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Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,8 @@ define(`PIPELINE_PCM_ADD',
`undefine(`SCHEDULE_DEADLINE')'
`undefine(`SCHEDULE_PRIORITY')'
`undefine(`SCHEDULE_CORE')'
`undefine(`PCM_MIN_RATE')'
`undefine(`PCM_MAX_RATE')'
`define(`PIPELINE_ID', $2)'
`define(`PCM_ID', $3)'
`define(`PIPELINE_CHANNELS', $4)'
Expand All @@ -51,6 +53,8 @@ define(`PIPELINE_PCM_ADD',
`define(`SCHEDULE_DEADLINE', $7)'
`define(`SCHEDULE_PRIORITY', $8)'
`define(`SCHEDULE_CORE', $9)'
`define(`PCM_MIN_RATE', $10)'
`define(`PCM_MAX_RATE', $11)'
`include($1)'
`DEBUG_PCM_ADD($1, $3)'
)
Expand All @@ -72,6 +76,8 @@ define(`PIPELINE_PCM_DAI_ADD',
`undefine(`DAI_INDEX')'
`undefine(`DAI_FORMAT')'
`undefine(`DAI_PERIODS')'
`undefine(`PCM_MIN_RATE')'
`undefine(`PCM_MAX_RATE')'
`define(`PIPELINE_ID', $2)'
`define(`PCM_ID', $3)'
`define(`PIPELINE_CHANNELS', $4)'
Expand All @@ -85,6 +91,8 @@ define(`PIPELINE_PCM_DAI_ADD',
`define(`DAI_FORMAT', $12)'
`define(`DAI_PERIODS', $13)'
`define(`DAI_NAME', $10$11)'
`define(`PCM_MIN_RATE', $14)'
`define(`PCM_MAX_RATE', $15)'
`include($1)'
)

Expand All @@ -99,13 +107,17 @@ define(`PIPELINE_ADD',
`undefine(`SCHEDULE_DEADLINE')'
`undefine(`SCHEDULE_PRIORITY')'
`undefine(`SCHEDULE_CORE')'
`undefine(`PCM_MIN_RATE')'
`undefine(`PCM_MAX_RATE')'
`define(`PIPELINE_ID', $2)'
`define(`PIPELINE_CHANNELS', $3)'
`define(`PIPELINE_FORMAT', $4)'
`define(`SCHEDULE_FRAMES', $5)'
`define(`SCHEDULE_DEADLINE', $6)'
`define(`SCHEDULE_PRIORITY', $7)'
`define(`SCHEDULE_CORE', $8)'
`define(`PCM_MIN_RATE', $9)'
`define(`PCM_MAX_RATE', $10)'
`include($1)'
)

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8 changes: 4 additions & 4 deletions topology/sof-apl-da7219.m4
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Original file line number Diff line number Diff line change
Expand Up @@ -32,26 +32,26 @@ DEBUG_START
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
1, 0, 2, s32le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency playback pipeline 2 on PCM 1 using max 2 channels of s32le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
2, 1, 2, s32le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency capture pipeline 3 on PCM 1 using max 2 channels of s32le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
3, 1, 2, s32le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency capture pipeline 4 on PCM 0 using max 4 channels of s32le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
#PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4,
4, 99, 4, s32le,
48, 1000, 0, 0)
48, 1000, 0, 0, 8000, 192000)

#
# DAIs configuration
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8 changes: 6 additions & 2 deletions topology/sof-apl-eq-pcm512x.m4
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Original file line number Diff line number Diff line change
Expand Up @@ -23,11 +23,13 @@ include(`platform/intel/bxt.m4')
# PCM0 ----> volume -----> SSP5 (pcm512x)
#

DEBUG_START

# Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-eq-volume-playback.m4,
1, 0, 2, s32le,
48, 1000, 0, 0)
1, 0, 2, s24le,
48, 1000, 0, 0, 48000, 48000)

#
# DAIs configuration
Expand All @@ -53,3 +55,5 @@ DAI_CONFIG(SSP, 5, 0, SSP5-Codec,
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 32, 3, 3),
SSP_CONFIG_DATA(SSP, 5, 24)))

DEBUG_END
6 changes: 3 additions & 3 deletions topology/sof-apl-hdmi.m4
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Original file line number Diff line number Diff line change
Expand Up @@ -33,19 +33,19 @@ dnl frames, deadline, priority, core)
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
1, 0, 2, s16le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency playback pipeline 2 on PCM 1 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
2, 1, 2, s16le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency playback pipeline 3 on PCM 2 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
3, 2, 2, s16le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

#
# DAIs configuration
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26 changes: 13 additions & 13 deletions topology/sof-apl-nocodec.m4
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Original file line number Diff line number Diff line change
Expand Up @@ -44,79 +44,79 @@ dnl frames, deadline, priority, core)
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
1, 0, 2, s16le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
2, 0, 2, s16le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency playback pipeline 3 on PCM 1 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
3, 1, 2, s16le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency capture pipeline 4 on PCM 1 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
4, 1, 2, s16le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency playback pipeline 5 on PCM 2 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
5, 2, 2, s16le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency capture pipeline 6 on PCM 2 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
6, 2, 2, s16le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency playback pipeline 7 on PCM 3 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
7, 3, 2, s16le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency capture pipeline 8 on PCM 3 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
8, 3, 2, s16le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency playback pipeline 9 on PCM 4 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
9, 4, 2, s16le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency capture pipeline 10 on PCM 4 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
10, 4, 2, s16le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency playback pipeline 11 on PCM 5 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
11, 5, 2, s16le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency capture pipeline 12 on PCM 5 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
12, 5, 2, s16le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Passthrough capture pipeline 13 on PCM 6 using max 4 channels.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4,
13, 6, 4, s32le,
48, 1000, 0, 0)
48, 1000, 0, 0, 8000, 192000)

#
# DAIs configuration
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2 changes: 1 addition & 1 deletion topology/sof-apl-pcm512x.m4
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Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@ DEBUG_START
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
1, 0, 2, s32le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

#
# DAIs configuration
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8 changes: 4 additions & 4 deletions topology/sof-apl-rt298.m4
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Original file line number Diff line number Diff line change
Expand Up @@ -31,25 +31,25 @@ include(`platform/intel/bxt.m4')
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
1, 0, 2, s32le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency playback pipeline 5 on PCM 5 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
5, 5, 2, s16le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency playback pipeline 6 on PCM 6 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
6, 6, 2, s16le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency playback pipeline 7 on PCM 7 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
7, 7, 2, s16le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)
#
# DAIs configuration
#
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20 changes: 10 additions & 10 deletions topology/sof-apl-tdf8532.m4
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Original file line number Diff line number Diff line change
Expand Up @@ -36,61 +36,61 @@ include(`platform/intel/bxt.m4')
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4,
1, 0, 4, s32le,
48, 1000, 0, 0, SSP, 4, s32le, 2)
48, 1000, 0, 0, SSP, 4, s32le, 2, 48000, 48000)

# Low Latency playback pipeline 2 on PCM 1 using max 8 channels of s32le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4,
2, 1, 8, s32le,
48, 1000, 0, 0, SSP, 2, s32le, 2)
48, 1000, 0, 0, SSP, 2, s32le, 2, 48000, 48000)

# Low Latency capture pipeline 3 on PCM 1 using max 8 channels of s32le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4,
3, 1, 8, s32le,
48, 1000, 0, 0, SSP, 2, s32le, 2)
48, 1000, 0, 0, SSP, 2, s32le, 2, 48000, 48000)

# Low Latency playback pipeline 4 on PCM 2 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4,
4, 2, 2, s16le,
48, 1000, 0, 0, SSP, 0, s16le, 2)
48, 1000, 0, 0, SSP, 0, s16le, 2, 48000, 48000)

# Low Latency capture pipeline 5 on PCM 2 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4,
5, 2, 2, s16le,
48, 1000, 0, 0, SSP, 0, s16le, 2)
48, 1000, 0, 0, SSP, 0, s16le, 2, 48000, 48000)

# Low Latency capture pipeline 6 on PCM 3 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4,
6, 3, 2, s16le,
48, 1000, 0, 0, SSP, 1, s16le, 2)
48, 1000, 0, 0, SSP, 1, s16le, 2, 48000, 48000)

# Low Latency playback pipeline 7 on PCM 4 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4,
7, 4, 2, s16le,
48, 1000, 0, 0, SSP, 3, s16le, 2)
48, 1000, 0, 0, SSP, 3, s16le, 2, 48000, 48000)

# Low Latency capture pipeline 8 on PCM 4 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4,
8, 4, 2, s16le,
48, 1000, 0, 0, SSP, 3, s16le, 2)
48, 1000, 0, 0, SSP, 3, s16le, 2, 48000, 48000)

# Low Latency playback pipeline 9 on PCM 5 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4,
9, 5, 2, s16le,
48, 1000, 0, 0, SSP, 5, s16le, 2)
48, 1000, 0, 0, SSP, 5, s16le, 2, 48000, 48000)

# Low Latency capture pipeline 10 on PCM 5 using max 2 channels of s16le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4,
10, 5, 2, s16le,
48, 1000, 0, 0, SSP, 5, s16le, 2)
48, 1000, 0, 0, SSP, 5, s16le, 2, 48000, 48000)


#
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2 changes: 1 addition & 1 deletion topology/sof-apl-wm8804.m4
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Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@ include(`platform/intel/bxt.m4')
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
1, 0, 2, s32le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

#
# DAIs configuration
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8 changes: 4 additions & 4 deletions topology/sof-bdw-rt286.m4
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Original file line number Diff line number Diff line change
Expand Up @@ -33,25 +33,25 @@ include(`platform/intel/bdw.m4')
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-low-latency-playback.m4,
1, 0, 2, s32le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s32le.
# Schedule 48 frames per 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-low-latency-capture.m4,
2, 0, 2, s32le,
48, 1000, 0, 0)
48, 1000, 0, 0, 48000, 48000)

# PCM Media Playback pipeline 3 on PCM 1 using max 2 channels of s32le.
# Schedule 96 frames per 2000us deadline on core 0 with priority 1
PIPELINE_PCM_ADD(sof/pipe-pcm-media.m4,
3, 1, 2, s32le,
96, 2000, 1, 0)
96, 2000, 1, 0, 8000, 192000)

# Tone Playback pipeline 5 using max 2 channels of s32le.
# Schedule 192 frames per 4000us deadline on core 0 with priority 2
PIPELINE_ADD(sof/pipe-tone.m4,
5, 2, s32le,
192, 4000, 2, 0)
192, 4000, 2, 0, 48000, 48000)

# Connect pipelines together
SectionGraph."pipe-bdw-rt286" {
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