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Emit & Dyn_emit now wrap string.format + Vector instruction segment fix #27

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merged 5 commits into from
Nov 30, 2023
Merged

Emit & Dyn_emit now wrap string.format + Vector instruction segment fix #27

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f79d6b8
Emit & Dyn_emit now wrap string.format + Vector instruction segment fix
Nov 26, 2023
39b3a4b
Shorter segcode for vector instructions
Nov 27, 2023
f4bcd4e
Mark the microcode var for later removal
Nov 28, 2023
3090ebf
mark the rest of the microcode debug checks/cases
Nov 28, 2023
19c3e27
Mark the opcodes that check for microcode debugging
Nov 28, 2023
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8 changes: 4 additions & 4 deletions lua/entities/gmod_wire_cpu.lua
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Original file line number Diff line number Diff line change
Expand Up @@ -160,17 +160,17 @@ function ENT:Run()
self:Dyn_EmitState()
self:Emit("VM.CPUIF.OnBreakpointInstruction(VM.IP)")
self:Emit("VM.CPUIF.VMStopped = true")
self:Emit("VM.TMR = VM.TMR + "..self.PrecompileInstruction)
self:Emit("VM.CODEBYTES = VM.CODEBYTES + "..self.PrecompileBytes)
self:Emit("VM.TMR = VM.TMR + %d",self.PrecompileInstruction)
self:Emit("VM.CODEBYTES = VM.CODEBYTES + %d",self.PrecompileBytes)
self:Emit("if true then return end")
self:Emit("end")
self:Emit("if VM.CPUIF.LastInstruction and ((VM.IP > VM.CPUIF.LastInstruction) or VM.CPUIF.ForceLastInstruction) then")
self:Dyn_EmitState()
self:Emit("VM.CPUIF.ForceLastInstruction = nil")
self:Emit("VM.CPUIF.OnLastInstruction()")
self:Emit("VM.CPUIF.VMStopped = true")
self:Emit("VM.TMR = VM.TMR + "..self.PrecompileInstruction)
self:Emit("VM.CODEBYTES = VM.CODEBYTES + "..self.PrecompileBytes)
self:Emit("VM.TMR = VM.TMR + %d",self.PrecompileInstruction)
self:Emit("VM.CODEBYTES = VM.CODEBYTES + %d",self.PrecompileBytes)
self:Emit("if true then return end")
self:Emit("end")
end)
Expand Down
52 changes: 27 additions & 25 deletions lua/wire/zvm/zvm_core.lua
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Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,7 @@
-- Virtual machine implementation core
--------------------------------------------------------------------------------
ZVM = {}
-- TODO: Remove microcode debugging, it's not possible to access normally.
if not SERVER and not CLIENT then
ZVM.MicrocodeDebug = true
end
Expand All @@ -26,12 +27,13 @@
if ZVM.MicrocodeDebug then -- Debug microcode generator
local pad = 0
function ZVM:Emit(text)
-- TODO: Remove microcode debugging, it's not possible to access normally.
if string.find(text,"end") and (not string.find(text,"if"))
then pad = pad - 1 end

if string.find(text,"elseif") or string.find(text,"else")
then self.EmitBlock = self.EmitBlock..string.rep(" ",pad-1)..text.."\n"

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"Whitespace style" 

Style: Please put some whitespace before the operator

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Style: Please put some whitespace after ')'

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else self.EmitBlock = self.EmitBlock..string.rep(" ",pad)..text.."\n"

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Style: Please put some whitespace before the operator
end

if (string.find(text,"if") or string.find(text,"for"))
Expand All @@ -40,8 +42,8 @@
then pad = pad + 1 end
end
else
function ZVM:Emit(text)
self.EmitBlock = self.EmitBlock..text.."\n"
function ZVM:Emit(...)
self.EmitBlock = self.EmitBlock..string.format(...).."\n"
end
end

Expand Down Expand Up @@ -155,8 +157,8 @@

--------------------------------------------------------------------------------
-- Emit preprocessed text
function ZVM:Dyn_Emit(text)
self:Emit(self:Dyn_PreprocessEmit(text))
function ZVM:Dyn_Emit(...)
self:Emit(self:Dyn_PreprocessEmit(string.format(...)))
end


Expand Down Expand Up @@ -196,11 +198,11 @@
--------------------------------------------------------------------------------
-- Emit forced block return
function ZVM:Dyn_EmitBreak(emitIP)
self:Emit("VM.TMR = VM.TMR + "..self.PrecompileInstruction)
self:Emit("VM.CODEBYTES = VM.CODEBYTES + "..self.PrecompileBytes)
self:Emit("VM.TMR = VM.TMR + %d",self.PrecompileInstruction)
self:Emit("VM.CODEBYTES = VM.CODEBYTES + %d",self.PrecompileBytes)
if emitIP then
self:Emit("VM.IP = "..(self.PrecompileIP or 0))
self:Emit("VM.XEIP = "..(self.PrecompileTrueXEIP or 0))
self:Emit("VM.IP = %d",(self.PrecompileIP or 0))
self:Emit("VM.XEIP = %d",(self.PrecompileTrueXEIP or 0))
end
if self.ExtraEmitFunction then self.ExtraEmitFunction(self) end
self:Emit("if true then return end")
Expand Down Expand Up @@ -265,9 +267,9 @@
-- Emit interrupt call
function ZVM:Dyn_EmitInterrupt(intNo,intParam)
self:Dyn_EmitState()
self:Emit("VM.IP = "..(self.PrecompileIP or 0))
self:Emit("VM.XEIP = "..(self.PrecompileTrueXEIP or 0))
self:Dyn_Emit("VM:Interrupt("..intNo..","..intParam..")")
self:Emit("VM.IP = %d",(self.PrecompileIP or 0))
self:Emit("VM.XEIP = %d",(self.PrecompileTrueXEIP or 0))
self:Dyn_Emit("VM:Interrupt(%d,%d)",intNo,intParam)
self:Dyn_EmitBreak()
end

Expand All @@ -280,23 +282,23 @@
if self.RQCAP == 1 then
self:Emit("if VM.MEMRQ > 0 then") -- Extended memory request
self:Emit("if VM.MEMRQ == 1 then") -- Delayed request
self:Emit("VM.IP = "..self.PrecompileStartIP)
self:Emit("VM.XEIP = "..(self.PrecompileTrueXEIP or 0))
self:Emit("VM.IP = %d",self.PrecompileStartIP)
self:Emit("VM.XEIP = %d",(self.PrecompileTrueXEIP or 0))
self:Emit("VM.IDLE = 1")
self:Dyn_EmitState(true)
self:Dyn_EmitBreak()
self:Emit("elseif VM.MEMRQ == 2 then") -- Reading
self:Dyn_EmitState(true)
self:Emit("VM.MEMRQ = 4")
self:Emit("VM.IP = "..self.PrecompileStartIP)
self:Emit("VM.XEIP = "..(self.PrecompileTrueXEIP or 0))
self:Emit("VM.IP = %d",self.PrecompileStartIP)
self:Emit("VM.XEIP = %d",(self.PrecompileTrueXEIP or 0))
self:Emit("VM:Interrupt(28,VM.LADD)")
self:Dyn_EmitBreak()
self:Emit("elseif VM.MEMRQ == 3 then") -- Writing
self:Dyn_EmitState(true)
self:Emit("VM.MEMRQ = 5")
self:Emit("VM.IP = "..self.PrecompileStartIP)
self:Emit("VM.XEIP = "..(self.PrecompileTrueXEIP or 0))
self:Emit("VM.IP = %d",self.PrecompileStartIP)
self:Emit("VM.XEIP = %d",(self.PrecompileTrueXEIP or 0))
self:Emit("VM:Interrupt(29,VM.LADD)")
self:Dyn_EmitBreak()
self:Emit("end")
Expand All @@ -317,7 +319,7 @@
self:Dyn_EmitState()
self:Dyn_EmitBreak(true)
end

-- TODO: Remove microcode debugging, it's not possible to access normally.
if self.MicrocodeDebug then
if Msg then
local str = self.EmitBlock
Expand Down Expand Up @@ -406,12 +408,12 @@

-- Check if we crossed the page boundary, if so - repeat the check
if math.floor(self.PrecompileXEIP / 128) ~= self.PrecompilePreviousPage then
self:Emit("VM:SetCurrentPage("..math.floor(self.PrecompileXEIP/128)..")")
self:Emit("VM:SetCurrentPage(%d)",math.floor(self.PrecompileXEIP/128))
self:Emit("if (VM.PCAP == 1) and (VM.CurrentPage.Execute == 0) and")
self:Emit(" (VM.PreviousPage.RunLevel ~= 0) then")
self:Dyn_EmitInterrupt("14",self.PrecompileIP)
self:Emit("end")
self:Emit("VM:SetPreviousPage("..math.floor(self.PrecompileXEIP/128)..")")
self:Emit("VM:SetPreviousPage(%d)",math.floor(self.PrecompileXEIP/128))

self.PrecompilePreviousPage = math.floor(self.PrecompileXEIP / 128)
end
Expand Down Expand Up @@ -442,7 +444,7 @@

-- Check opcode runlevel
if self.OpcodeRunLevel[Opcode] then
self:Emit("if (VM.PCAP == 1) and (VM.CurrentPage.RunLevel > "..self.OpcodeRunLevel[Opcode]..") then")
self:Emit("if (VM.PCAP == 1) and (VM.CurrentPage.RunLevel > %d) then",self.OpcodeRunLevel[Opcode])
self:Dyn_EmitInterrupt("13",Opcode)
self:Emit("end")
end
Expand Down Expand Up @@ -536,8 +538,8 @@

-- Emit interrupt check prefix
if self.EmitNeedInterruptCheck then
self:Emit("VM.IP = "..(self.PrecompileIP or 0))
self:Emit("VM.XEIP = "..(self.PrecompileTrueXEIP or 0))
self:Emit("VM.IP = %d",(self.PrecompileIP or 0))
self:Emit("VM.XEIP = %d",(self.PrecompileTrueXEIP or 0))
end

-- Emit opcode
Expand Down Expand Up @@ -600,8 +602,8 @@
local instruction = 1
while (instruction <= overrideSteps) and self:Precompile_Step() do
if self.ExtraEmitFunction then
self:Emit("VM.IP = "..(self.PrecompileIP or 0))
self:Emit("VM.XEIP = "..(self.PrecompileTrueXEIP or 0))
self:Emit("VM.IP = %d",(self.PrecompileIP or 0))
self:Emit("VM.XEIP = %d",(self.PrecompileTrueXEIP or 0))
self.ExtraEmitFunction(self)
end
instruction = instruction + 1
Expand Down
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