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Add support NXP S32 HSE CRYPTO driver for S32Z270 #79351

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Add support NXP S32 HSE CRYPTO driver for S32Z270 #79351

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ec5ab83
driver: crypto: add NXP S32 CRYPTO HSE driver
haduongquang Oct 28, 2024
949dba0
boards: enbables support for s32z270 hse crypto
haduongquang Oct 28, 2024
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13 changes: 13 additions & 0 deletions boards/nxp/s32z2xxdc2/doc/index.rst
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Expand Up @@ -170,6 +170,19 @@ EDMA
The EDMA modules feature four EDMA3 instances: Instance 0 with 32 channels,
and instances 1, 4, and 5, each with 16 channels.

CRYPTO
======

The Hardware Security Engine (HSE) supports cryptographic operations, including hashing and
symmetric ciphers, with capabilities for ECB, CBC, and CTR modes using RAM-based key catalogs
with 128-bit or 256-bit key lengths.

.. note::
The driver assumes that the HSE Firmware has been installed and configured (i.e the key catalogs
has been formatted, used MU instances has been activated, etc). HSE Firmware installation and
configuration phase documented in HSE Firmware User Manual. Please contact NXP sales person or
NXP distributor in order to have access to that document.

Programming and Debugging
*************************

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1 change: 1 addition & 0 deletions boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0.yaml
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Expand Up @@ -19,4 +19,5 @@ supported:
- adc
- i2c
- dma
- crypto
vendor: nxp
1 change: 1 addition & 0 deletions boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0_D.yaml
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Expand Up @@ -19,4 +19,5 @@ supported:
- adc
- i2c
- dma
- crypto
vendor: nxp
1 change: 1 addition & 0 deletions boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1.yaml
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Expand Up @@ -19,4 +19,5 @@ supported:
- adc
- i2c
- dma
- crypto
vendor: nxp
1 change: 1 addition & 0 deletions boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1_D.yaml
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Expand Up @@ -19,4 +19,5 @@ supported:
- adc
- i2c
- dma
- crypto
vendor: nxp
1 change: 1 addition & 0 deletions drivers/crypto/CMakeLists.txt
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Expand Up @@ -14,4 +14,5 @@ zephyr_library_sources_ifdef(CONFIG_CRYPTO_IT8XXX2_SHA crypto_it8xxx2_sha.c)
zephyr_library_sources_ifdef(CONFIG_CRYPTO_IT8XXX2_SHA_V2 crypto_it8xxx2_sha_v2.c)
zephyr_library_sources_ifdef(CONFIG_CRYPTO_MCUX_DCP crypto_mcux_dcp.c)
zephyr_library_sources_ifdef(CONFIG_CRYPTO_SI32 crypto_si32.c)
zephyr_library_sources_ifdef(CONFIG_CRYPTO_NXP_S32_HSE crypto_nxp_s32_hse.c)
zephyr_library_link_libraries_ifdef(CONFIG_MBEDTLS mbedTLS)
1 change: 1 addition & 0 deletions drivers/crypto/Kconfig
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Expand Up @@ -84,5 +84,6 @@ source "drivers/crypto/Kconfig.it8xxx2"
source "drivers/crypto/Kconfig.mcux_dcp"
source "drivers/crypto/Kconfig.si32"
source "drivers/crypto/Kconfig.smartbond"
source "drivers/crypto/Kconfig.nxp_s32_hse"

endif # CRYPTO
33 changes: 33 additions & 0 deletions drivers/crypto/Kconfig.nxp_s32_hse
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@@ -0,0 +1,33 @@
# Copyright 2024 NXP
# SPDX-License-Identifier: Apache-2.0

menuconfig CRYPTO_NXP_S32_HSE
bool "NXP S32 HSE crypto driver"
default y
depends on DT_HAS_NXP_S32_CRYPTO_HSE_MU_ENABLED
help
Enable NXP HSE crypto driver.

if CRYPTO_NXP_S32_HSE

config CRYPTO_NXP_S32_HSE_OUTPUT_BUFFER_SIZE
int "The output buffer size for storing the output data of HSE crypto service"
default 128
help
The output buffer size for storing the output data of HSE crypto service.

config CRYPTO_NXP_S32_HSE_AES_KEY_SIZE
int "The size of the key used in cryptographic algorithms, measured in bits."
default 128
help
The size of the key used in cryptographic algorithms, measured in bits.
Only support for 128 bits or 256 bits.

config CRYPTO_NXP_S32_HSE_AES_KEY_GROUP_ID
int "The AES Key Group ID within RAM Key Catalog."
range 0 255
default 0
help
The AES Key Group ID within RAM Key Catalog.

endif #CRYPTO_NXP_S32_HSE
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